Home

Texas Instruments DEM-DAI3793A User's Manual

1. Power On Power Clock Reset Up Down Manager Manager g i SRo O a EEEE ROI AINSL rt SPORP ANTE SPORN AIN1L EIS Digital a HPOL Filter N 4B to LOL 30dB to Digital 12dB AlNiRd e T s s BgA EGOQ een HPOR AIN2R H AIN3R H 4 OdB OdBto pza peo 420dB 21dB MONO o o P MONO MICB O COM o ms Silent Pop Noise HPOL o Mr MOSCA xt pun Li Li L1 Li Li L1 Li Vio Vpp DGND Vp PGND Vc AGND Figure A 4 Headphone Output with Line Input AIN2L AIN2R 78 Reference csv Files Interfacing to DSPs and Package Information SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www ti com Reference csv Files mee _ Module of Possible Power Up Down NE Signal path p MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE LI Li LJ Power On Power Glock Reset Up Down niei Manager i SPOLP SPOLN 0dB 6dB 12dB 18B ATP AIN3L H odB SPORP AIN2L SPORN AIN1L O Digital E HPOL Filter W 4Bto1 LOL 30dB to 12dB mM nmm inimi HPOR AIN1RE H AIN2R E Hen AINSR Ei UNI HPCOM MONO o o P MONO MICB O COM o ms HPOL o Voom HPOR o pnori L Li Li L1 Li Li L1 Li Vio Vpb DGND Vp PGN
2. cR L gt Glock Manager SPOLP SPOLN 0dB 6dB 12dB 18dB 9 ATP AIN3L o l OdB to 62dB Mu SPORP AIN2L c SPORN AIN1LC 20dB 21dB ADL w DAL SWE pgie TI JED au L ADL LE L 30dB to Digital p HPOU 12dB Filter W sito LOL 30dB to 12dB ANIRE e a xz ER ERB 7 77 7 77770707 ys dd AIN2R g AIN3SR g i MONO o o h HPCOM T Mic Bias MONO cBq m COM e cco4 L gg Silent Pop Noise HPOL e Voom COM Controller HPOR o E HDTI Li Li L1 Li Li L1 Li Vio Vpp DGND Vp PGND Ve AGND Figure A 7 Stereo Speaker Output SBAU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information 81 Submit Documentation Feedback Heference csv Files 82 Power On Reset Signal path Wy TEXAS INSTRUMENTS www ti com _ Module of Possible Power Up Down Lee MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE Cl m L Clock Manager SPOLP SPOLN 0dB 6dB 12dB 18B ATP 0dB to 62dB Mu SPORP SPORN 20dB 21dB LA ____ DA Ri Foieni 30dB to Digital z b E 12dB Filter W sito LOL 30dB to 12dB 4t 0 2 L HPOR LOR NN HPCOM MONO o o F MONO COM COM o o pp Silent Pop Noise HPOL e Controller HPOR e E HDT
3. cessere 66 6 4 PCM3793A DEM PCM3793RHB A Board Layout Component Side sees 67 6 5 PCM3793A DEM PCM3793RHB A Board Layout Inner Layer 2 eeeseeseeeen e 68 6 6 PCM3793A DEM PCM3793RHB A Board Layout Inner Layer 3 cesses 69 6 7 PCM3793A DEM PCM3793RHB A Board Layout Solder Side eee 70 A 1 Line Output and Headphone Oultput essesseesseeeeseeen nennen hehehe nnn nnns nnn nnn 75 A 2 Headphone Output with Sound Effect sssssssnnnnnnnnnnnnnnrrrrrnnnnnnnnnnrrnnnnnnnnnnnnnnnnnnnnnnnn nn nnnnnnnn 76 A 3 Cap Le ss Headphone Output cccecceeee eect eee ee ence ence eee eeeeeeeneeeeeeeeeeaeeneeeeeeeeeeaeeeseeeeneeeeeenaeees 77 A 4 Headphone Output with Line Input AIN2L AIN2R eee eect eee eee III IH nnn 78 A 5 Headphone Output with Mono Mic Input AIN1L 20CB 0ceeee eee eee eee e eee ee ee eee eens eee e eee eeeeeeeeeeeee 79 A 6 Headphone Output with Mono Diff Mic Input AIN1L AIN1R 20dB eese 80 A 7 Stereo Speaker e UlieU ame M 81 AS Mono Speaker Output ics wie teen enmt nm EA ERE pepe nsUeIER EE RE RINNS CA EEE a Da 82 A 9 Speaker Output with Line Input AIN2L AIN2R ece eee e cece ee eee eee ee eee eee II I mn hn emn m nenne 83 A 10 Speaker Output with Mono Mic Input AIN1L 200B cesses 84 A 11 Speaker Output with Mono Diff Mic Input AIN1L AIN1R
4. Power Glock S Up Down Audio Interf p um udio Inte zx i D sPOLP ATR 0dB 6dB 12dB 18dB EDEN ATP i AIN3L r 0dB to 62dB Mu SPORP AIN2Lq A 7 SPORN AIN1LC dB To 46dHto 70dBI i JAB a ADL EM D te le sees Digital HPOL Filter LOL __ E d Digital Filter a a d HPOR AIN1RE H AIN2R Hj LOR AINSR E HPCOM T MONO o o F MONO MICBH lt q COM e c 4 5p t Silent Pop Noise HPOL e Vcom O COM Controller HPOR HHDTI L1 L1 L1 L1 LJ LI L1 Vio Vpop DGND Vp PGND Vec AGND Figure A 1 Line Output and Headphone Output SBAU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information 75 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Reference csv Files _ Module of Possible Power Up Down um Signal path p MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE cl L cR L gt Clock Manager l SPOLP i SPOLN 0dB 6dB 12dB 18dB 0 ATP AINSL c 0dB to 62dB Mu i l AIN2L O gt eae AIN1L O 420dB eisai iem Hessen ie ela 21idB ADL ES D j L 430dB to Digital HPOL 12dB Filter W AB to LOL 30dB to 12dB AlMdARd e Igs BRA EGR 770707077 D da AIN2R C AIN3RE P MONO o o S a MICB O lt q coms oua misi ier Silent P
5. I l2 HDTI HPOL HPOR PGND A HPCOM Figure 5 17 Connection for Headphone Output and Insertion Detection 62 Evaluation and Measurements SBAU127 July 2007 Submit Documentation Feedback 35 TEXAS Chapter 6 INSTRUMENTS SBAU127 July 2007 Schematic PCB Layout and Bill of Materials This chapter provides the electrical and physical layout information for the DEM DAI3793A 3794A EVM The bill of materials is included for component and manufacturer reference Topic Page olus Schematics t oer sre reer E ener caesar IET ERE E EE EIS 64 6 2 Printed Circuit Board Layout ccceeeeeeeeeeeeeeeeeeeeeeeeeeees 66 6 3 Component List eee EEEEE 71 SBAU127 July 2007 Schematic PCB Layout and Bill of Materials 63 Submit Documentation Feedback i INSTRUMENTS www ti com Schematics 6 1 Schematics Figure 6 1 and Figure 6 2 illustrate the schematics for the DEM DAI3793A 3794A EVM ji ai Figure 6 1 PCM3793A DEM PCM3793RHB A Connector Daughter Card 1 64 Schematic PCB Layout and Bill of Materials SBAU127 July 2007 Submit Documentation Feedback 435 TEXAS INSTRUMENTS www ti com Schematics Figure 6 2 PCM3793A DEM PCM3793RHB A Daughter Card 1 SBAU127 July 2007 Schematic PCB Layout and Bill of Materials 65 Submit Documentation Feedback D TEXAS INSTRUMENTS
6. r e Silent Pop Noise Controller HPOR o o io Vpp DGND Vg PGND Voo AGND 9 Switches SW1 to SW6 Figure 3 19 Modules Corresponding to Analog Path Function Analog Input Options This option selects the appropriate MUX for the respective left or right channel e MUX1 selects the L channel source AIN1 AIN2 AIN3 e MUX2 selects the R channel source AIN1 AIN2 AIN3 D2S Select Options The analog input can be configured as single end or differential Select the D2S drop down menu to choose between differential or single ended inputs If differential is selected AIN1L and AIN1R are used as differential inputs Analog Mixer Options The analog input DAC output and other channels of the analog input can be combined as an analog mixer source To combine the sources select the Analog Mixer menu to combine the DAC output and incoming stereo or mono analog signal input through PG1 PG5 or PG2 PG6 Mic Boost Options This checkbox sets or resets the 20dB microphone pre amp PG1 L ch or PG2 R ch 36 Set Up Guide SBAU127 July 2007 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com PG5 Gain and PG6 Gain Options PG5 Gain and PG6 Gain Options PG5 gain for the left channel or PG6 for the right channel can be adjusted from the available drop down menu 3 2 3 8 Audio Interface Figure 3 20 shows the Audio Interface Function menu
7. 120 140 Frequency kHz Figure 5 13 D A Amplitude vs Frequency Result OdB Input Amplitude dB Amplitude dB 80 100 120 140 Wy TEXAS INSTRUMENTS www ti com AMPLITUDE vs FREQUENCY 60dB Input Frequency kHz Figure 5 12 D A Amplitude vs Frequency Result 60dB Input AMPLITUDE vs FREQUENCY Wide Range to 130kHz BPZ Zero Data Input 0 20 40 60 80 100 120 Frequency kHz Figure 5 14 D A Amplitude vs Frequency Result Wide Range to 130kHz BPZ Zero Data Input See Appendix A Line Output and Headphone Output for a signal flow block diagram Evaluation and Measurements SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www ti com Connection Diagram for Practical Applications 5 5 Connection Diagram for Practical Applications The PCM3793A 94A Daughter Card has been configured to measure dynamic audio performance by common audio analyzer equipment In a practical application such as portable audio player or cellular phone simple components set up as shown in Figure 5 15 will be reasonable to save assembly and test spaces Specific component values are listed in Table 5 5 Low or High SCKI 7 BCK 1 LRCK 32 DIN 2 DOUT 3 MS ADR 29 MD SDA 30 MC SCL 31 MODE 28 PCM3793A 94A MICB 21 AIN1L 27 AIN1R 26 AIN2L 25
8. Power Up Down Record Playback ALC Signal Processing 1 Signal Processing 2 Analog Path Audio Interface Status detect Digital Amp Audio interface setting 1 DAC fiis v Master Slave Slave ADC lis Y Bit length J Audio interface setting 2 MSR 1000 v NPR 000000 BCK Normal Digital loop back ADC to DAC Figure 3 20 Audio Interface Function Menu Tab Audio Interface Setting 1 Options Use this section of the menu to set the audio data format for the DAC input and ADC output and set the mode as Master or Slave Bit length is fixed at 16 bits Audio Interface Setting 2 Options Use this section of the menu when working in Master mode e MSR sets system clock rate e NPR sets system clock divider rate e BCK chooses between normal and burst BCK output Burst operation of BCK in master mode will contribute to greater overall reduction in power consumption See the PCM3793A data sheet for the possible combinations of these register settings SBAU127 July 2007 Set Up Guide 37 Submit Documentation Feedback P TEXAS INSTRUMENTS www ti com HP Detection Options 3 2 3 9 Status Detect The Status Detect function is shown in Figure 3 21 Power Up Down Record Playback ALC Signal Processing 1 PT Signal Processing 2 Analog Path Audio Interface Status detect Digital Amp HP insertion detection Headphone detection Non invert v Stat
9. www ti com Printed Circuit Board Layout 6 2 Printed Circuit Board Layout Figure 6 3 through Figure 6 7 illustrate the printed circuit board PCB layout for the DEM DAI3793A 3794A EVM Note Board layouts are not to scale These figures are intended to show how the board is laid out they are not intended to be used for manufacturing DEM DAI3793A 3794A EVM PCBs y m E z on 5 seeje e LX gt 2 27 499 7 171 e ee joo HH oo ESS lef e aH ee iS eee a 3 eo eo HE ee e 4 ee i i eo ee ee co ee eec e 002 eo 2 ee eo 2 eo ee BY b o wee zee KOLSA m ee ee s zee ee A L99 23 Te 33 a iei 2 JPS KALAJ oe 9999 o 9 Specker Reh Figure 6 3 PCM3793A DEM PCM3793RHB A Board Layout Silkscreen Side 66 Schematic PCB Layout and Bill of Materials SBAU127 July 2007 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Printed Circuit Board Layout Figure 6 4 PCM3793A DEM PCM3793RHB A Board Layout Component Side SBAU127 July 2007 Schematic PCB Layout and Bill of Materials 67 Submit Documentation Feedback INSTRUMENTS www ti com 3 TEXAS Printed Circuit Board Layout o 9000000 000000 0000000700000 RO 0000 e000 0000 e000 Inner Layer 2 Figure 6 5 PCM3793A DEM PCM3793RHB A Board Layout SBAU127 July 2007 Submit Documentation Feedback Schematic PCB Layout and Bill of Materials 68 ki TEXA
10. Module of Possible Power Up Down EE Signal path p MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE cl Ll L Power On Power Clock Reset Up Down Manager Manager g i SRo YAA A MY 0dB 6dB 12dB 18dB i 1 6dBito 70dB ROI d AIN3L C SPORP AIN2L C SPORN AIN1LH i Digital Digital HPOL Filter Filter 4B to LOL 30dB to Digital Digital 12dB Filter ANiRH S S S 88A PEG 77777777 da AIN2R O AIN3R H 4 m m OdB OdBto PR I HPCOM 420dB 21dB MONO o o H MONO MICB O COM o ms Silent Pop Noise HPOL o Mr Cur lt p bron Li Li L1 Li Li L1 Li Vio Vpp DGND Vp PGND Vc AGND Figure A 12 Line Input AIN2L AIN2R to Headphone Output 86 Reference csv Files Interfacing to DSPs and Package Information SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www ti com EE Signal path MD SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE cl Ll L Ll Heference csv Files l Module of Possible Power Up Down Power On Power Clock Reset Up Down i niei Manager SPOLP SPOLN V quw 5 QdB amp 6dB 1248 41848B 1 1 6dBito 700B PGL AIN3L SPORP AIN2L O SPORN A
11. Step 2 Filtepcatcarator Sa zs f a 3 for l fc 10 4 fb l0 1 E Peg Unit kae M M M M Step 3 Figure 3 13 Signal Processing 1 Function Menu Tab Source Options Select the Source input to choose either the audio processing unit digital input DAC or digital output ADC Internal audio processing can be applied to either the DAC or the ADC This option also allows users to choose an audio source Output Options Select the Source drop down menu to choose between a stereo or mono configuration e The output configuration can be selected by choosing stereo or mono Tone Control Options Move the Bass Mid and Treble sliders to adjust the tone control gain The tones are controlled by the respective tone sliders A three band tone control characteristic plot is shown in Figure 3 14 15 10 Amplitude dB o 10 a 15 10 100 1k 10k 100k Frequency Hz Figure 3 14 Three Band Tone Conirol Bass Mid Treble SBAU127 July 2007 Set Up Guide 31 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com 3D Effect Options 3D Effect Options By implementing a 3D effect in this option box the PCM3793A is enabled to provide 3D sound to the headphone and speaker outputs with low power consumption during either ADC or DAC operation C
12. 5 2 16Q Headphone Output Inserted in Headphone Jack J6 cce cece cece e cece eee ee eee eee e eee eeeeeeeeeeeeeeaeeeee 56 5 3 A D Line Input Parameters iti ooo Uere tre pe nana ER Rr En EAR EE EEEE EEE E 57 5 4 Stereo Speaker Output Parameters eeseesseessesseeesesee eene nnne nnne nh n nen nennen nnne 57 5 5 Recommended External Parts for Basic Connection Diagram ceeseeeeeeen mn 61 6 1 Bil OF Mate ALS EIER 71 A 1 Reda 74 A 2 Recommended Power On Sequence for PCM3793A eceeee cece eee ee ence nese eee e eens nennen ne nenne nnne 99 SBAU127 July 2007 List of Tables 7 Submit Documentation Feedback SYS 2722 PSIA 2722 are registered trademarks of Audio Precision Inc SPI is a trademark of Motorola Inc PS I C are trademarks of NXP Semiconductors TOSLINK is a trademark of Toshiba Corporation All other trademarks are the property of their respective owners 8 List of Tables SBAU127 July 2007 Submit Documentation Feedback 35 TEXAS Preface INSTRUMENTS SBAU127 July 2007 Read This First About This Manual This document provides the information needed to set up and operate the DEM DAI3793A 3794A EVM evaluation module a test platform for the 16 bit low power PCM3793A PCM3794A stereo audio codecs For a more detailed description of the PCM3793A 94A products please refer to the product data sheets available from the Texas Instruments web site at http www ti com Support documents are li
13. AIN2R 24 AIN3L 23 AIN3R 22 Voom 1 8 4 Vio 5 Vpp 6 DGND To Regulator 20 Voc 19 AGND 12 Vea 13 PGND 8 HDTI 17 HPOL LOL 16 HPOR LOR CC qn 9 HPCOM MONO Figure 5 15 Basic Connection Diagram Stereo Headphone Monaural Line Output Table 5 5 Recommended External Parts for Basic Connection Diagram Component Recommended Value Component Recommended Value C1 06 1gF C12 C13 10uF 220yF C7 1yF 10ygF C14 1yF 10uF C8 0 1uF R1 R2 2 2kKQ C9 C10 1uF 4 7yF R3 33kQ C11 4 7uF 10pF R4 10kQ SBAU127 July 2007 Evaluation and Measurements 61 Submit Documentation Feedback Connection Diagram for Practical Applications 5 5 1 Filter Consideration for Speaker Output 3 TEXAS INSTRUMENTS www ti com For a practical application such as a portable audio player or cellular phone a ferrite chip bead will be a connections for headphone output and insertion detection suitable low pass filter to the speaker output see Figure 5 16 Figure 5 17 describes recommended B SPOLP SPORP Cis SPOLN SPORN Chip Bead NEC Tokin N2012ZPS121 Refer to the product data sheet for further information on this application circuit C45 and Cig 1nF B4 and Bo Ferrite Conventional Mode Figure 5 16 Recommended Ferrite Bead Filter for Speaker Output Capless Mode
14. PCM3793A 4 3 Daughter Card 1 PCM3793A Table 4 5 lists the connector references for the first DEM DAI3793A 3794A EVM daughter card 46 Table 4 5 Analog Input and Output Daughter Card 1 3 TEXAS INSTRUMENTS www ti com Connectors Analog Input and Output of Daughter Card 1 J1 Stereo microphone input J2 Monaural microphone input J3 Speaker output terminal for L ch J4 Speaker output terminal for R ch J5 Headphone output Cap less J6 Headphone output JP5 System clock select 1 2 External clock 3 4 SPDIF JP8 1 2 AIN1L 2 3 JP10 JP9 1 2 AIN1R 2 3 JP11 JP10 1 2 JP8 2 3 J2 JP11 1 2 J1 2 3 J2 JP12 Analog input select L channel 1 2 AIN1L 2 3 AIN2L JP13 Analog input select R channel 1 2 AIN1R 2 3 AIN2R JP18 Headphone detection select 1 2 J5 or J6 2 3 Motherboard Simplified descriptions of the analog input and output configuration for Daughter Card 1 are shown in Figure 4 2 and Figure 4 3 Connected to CN114 of motherboard Connected to Connected to CN108 of motherboard Connected to CN109 of motherboard AINL JP8 JP12 1 1 J1 Stereo mic P9 JP13 J2 1 2 2 Mono mic peo PCM3793A AINL AINR Figure 4 2 Analog Input Configuration Daughter Card 1 Switches and Connectors SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www t
15. 3 Click Apply to Filter 1 or Apply to Filter 2 Step 4 Update for each notch filter coefficient Each coefficient is calculated using the following equations a 2 1 a5 cos u ap 1 tan w 2 1 tan w 2 where e fs sampling frequency e 6f center frequency ef bandwidth e W 2rif fs represents the angular center frequency Wy 2rifyfs is the parameter to adjust bandwidth Here are several example coefficient calculations using Equation 3 1 and Equation 3 2 These measurements are also shown in Figure 3 16 Given fs 16kHz f 0 5kHz fy 0 2kHz 85 0 924390492 converted decimal to hex 3B29h a 1 887413868 converted decimal to hex 8735h as F 215 208 3Bh F 207 200 29h a4 F 115 108 87h F 107 100 35h 32 Set Up Guide SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www ti com Notch Filter 1 Coefficient Notch Filter 2 Coefficient Options Figure 3 15 illustrates the notch filter characteristic All users can select any frequencies that can be used by the application system based on the notch filter coefficient theory discussed here f Center Frequency 0dB 3dB yf f Bandwidth Frequency Amplitude dB Frequency Hz Figure 3 15 Notch Filter Characteristic Model Amplitude dB Frequency Hz Figure 3 16 Example of Measured Notch
16. Cock 0 Manager BCK i g v DSP LRCK 8 ADC o DAC oO p DOUT E PCM3793A Figure A 24 Slave Mode Operation Example A 2 Master Mode Operation Figure A 25 illustrates the correct interface for master mode operation SEMI Clock Manager i BCK i D g DSP p LRCK g gt ADC o DAC o p DOUT E Where PCM3793A Figure A 25 Master Mode Operation e SCKI Audio clock 256fs 384fs e BCK Clock for audio transfer 32fs 48fs 64fs e LRCK Sampling rate clock fs e DIN Audio data input for DAC I S Left Justified Right Justified DSP e DOUT Audio data output from ADC I S Left Justified Right Justified DSP 98 Reference csv Files Interfacing to DSPs and Package Information SBAU127 July 2007 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Package Information A 2 1 Register Control with DSP Interface Table A 2 summarizes the recommended power on sequence for the PCM3793A The shaded cells within the table indicate specific register settings that must be configured for the device to properly operate with a DSP interface Table A 2 Recommended Power On Sequence for PCM3793A REGISTER STEP SETTINGS NOTE 1 Turn on all power supplies 2 4027h Headphone amplifier L ch volume 6dB 3 4127h Hea
17. DOWN time ms Vcom capacitor C 4 7 uF Power on off sequence HPCOM MONO HPC HP Line out L ch HPL HP Line out R ch HPR Speaker out L ch SPL Speaker out R ch SPR Diff amp 028 Mic Bias MCB Gain AMP L ch PG1 PG5 Gain AMP R ch PG2 PG6 C 250 400 Signal Processing 1 C 450 750 C 900 1500 User selectable Power Up Power Down time default is 450ms 750ms Figure 3 4 Internal Module Power Up Down Function Menu Tab Table 3 1 Register Mapping for Power Up Down Module Check Box Internal Module Register Analog Bias Analog bias Reg 73 bit7 PBIS Vcom Analog common voltage Reg 74 bitO PCOM HP COM MONO HPC Headphone common mono out buffer Reg 73 bit4 PHPC Mixer L ch XML Analog mixer L ch Reg 72 bito PMXL Mixer R ch XMR Analog mixer R ch Reg 72 bit PMXR HP Line out L ch HPL Headphone Line out amp L ch Reg 73 bit2 PHPL HP Line out R ch HPR Headphone Line out amp R ch Reg 73 bit3 PHPR DAC L ch DAL DAC and interpolation filter L ch Reg 73 bit5 PDAL DAC R ch DAR DAC and interpolation filter R ch Reg 73 bite PDAR Speaker out L ch SPL Speaker amp L ch Reg 73 bito PSPL Speaker out R ch SPR Speaker amp R ch Reg 73 bit PSPR ADC L ch ADL ADC and decimation filter L ch Reg 82 bito PADL ADC R ch ADR A
18. Elna L1 L4 22uH 22R223 Newport Components JP5 1 2x2 Pin A1 4PA 2 54DSA Hirose JP8 JP13 JP18 7 3 Pin A2 3PA 2 54DSA Hirose C7 1 4 7yF 25V R3A 25V47M Elna TP1 TP4 4 Test Pin LC 2 G MAC8 J1 J2 2 HSJ1493 01 040 Hosiden J3 J4 2 MKDSN1 5 2 5 08 Phoenix Contact J5 J6 2 HSJ1493 01 040 Hosiden U1 1 16 bit Stereo Audio Codec 5mm x 5mm QFN 32 pin PCM3793A 94A Texas Instruments SBAU127 July 2007 Submit Documentation Feedback Schematic PCB Layout and Bill of Materials 71 72 Schematic PCB Layout and Bill of Materials SBAU127 July 2007 Submit Documentation Feedback i EXAS Appendix A INSTRUMENTS SBAU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information Topic Page AN iReference csv Eiles 7 eere ETE IRE 74 A 2 interfacing to DSPs reete tee ERI E 98 A 3 Package Information eee eere exe ERE EISE ESSE 99 SBAU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information 73 Submit Documentation Feedback Heference csv Files Wy TEXAS INSTRUMENTS www ti com A 1 Reference csv Files The csv files are bundled with the DEM DAI3793A 3794A EVM Controller These files enable users to execute register settings corresponding to the specific operating modes discussed in the product data sheet by importing them
19. Filter Characteristic SBAU127 July 2007 Set Up Guide 33 Submit Documentation Feedback 9 TEXAS INSTRUMENTS www ti com DAC Oversampling Control Options 3 2 3 6 Signal Processing 2 The Signal Processing 2 Function menu tab is shown in Figure 3 17 Power Up Down Record Playback ALC Signal Processing 1 Signal Processing 2 Analog Path Audio interface Status detect Digital Amp DAC over sampling control 25s x Zero cross control Disable gt De emphasis filter orr xl High Pass Filter lfc 4Hz 4ekHz gt Figure 3 17 Signal Processing 2 Function Menu Tab DAC Oversampling Control Options Select the DAC oversampling control menu to determine the DAC oversampling rate The oversampling control can be set to either 128fs or a range of 192fs 256fs and 384fs The DAC oversampling rate range for 192fs 256fs and 384fs will be selected when the sampling frequency of input data is lower than 24kHz This oversampling rate moves the out of band noise caused by the delta sigma modulator to a higher frequency domain Zero Cross Control Options Select the Zero cross control to enable the zero crossing function When zero crossing is enabled digital attenuation and the analog volume level change at the zero crossing point to avoid an audible zipper noise De Emphasis Filter Options Select the De emphasis filter option menu to enable the de emphasis filter De emphasis can be disabled or enabled for an appropriate sa
20. Following are URLs where you can obtain information on other Texas Instruments products and application solutions Products Applications Amplifiers amplifier ti com Audio www ti com audio Data Converters dataconverter ti com Automotive www ti com automotive DSP dsp ti com Broadband www ti com broadband Interface interface ti com Digital Control www ti com digitalcontrol Logic logic ti com Military www ti com military Power Mgmt power ti com Optical Networking www ti com opticalnetwork Microcontrollers microcontroller ti com Security www ti com security RFID www ti rfid com Telephony www ti com telephony Low Power www ti com lpw Video amp Imaging www ti com video Wireless Wireless www ti com wireless Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2007 Texas Instruments Incorporated
21. Power On E Clock y i Reset Manager Audio Interface Serial Interface SPI I C 4 Dac Y SEIN AZ 0dB 6dB 12dB 18dB I ATP i I E AIN3L O I ay 0dB to G2dB Mu SPORP AIN2L O 2 SPORN AIN1L C odB 20dB omaes j IP 1 eo 30dB to igi Digital SW HPOL 12dB i Filter 648101 LOL 30dB to Digital 12dB HPOR AINIRG LE Flog AIN2Rq rs 1Analog Input R Channel AINSR E 1 REPE EE Gsl OdB OdB to HPCOM 420dB 21dB MONO e o FMONO COM o ug Silent Pop Noise HPOL e T Controller HPOR o F L1 L1 L1 L1 L1 L L1 Vio Vpp DGND Vg PGND Voc AGND Figure A 23 Mono Diff Mic Input AIN1L AIN1R 20dB with ALC SBAU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information 97 Submit Documentation Feedback Interfacing to DSPs A 2 Interfacing to DSPs Refer to the following examples for interfacing the PCM3793A to a digital signal processor DSP in either slave or master mode To implement master mode MSTR 1 of register 84 54h enables master mode operation as discussed in the product data sheet Insert 5440h to the recommended power on sequence after DAC power up 49h of PCM3793A as noted in Table A 2 Example A 1 Slave Mode Operation D TEXAS INSTRUMENTS www ti com Figure A 24 illustrates the proper configuration for slave mode operation SERI
22. ch pm p dB r Mute Digital boost 0dB v Figure 3 9 Playback Function Menu Tab 28 Set Up Guide SBAU127 July 2007 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Headphone Gain Control Options Figure 3 10 shows the corresponding modules for the playback function PCM3794A has no Speaker Output MD MC MS SCKI DOUTBCKLRCK DIN SDA f SCL ADR MODE PONE Clock SPL 44 Up Down Manager Audio Interface Jerial Interface SPI I C D d Manager DGC Y i PA MUS 0dB oy 2dB 18dB um SPR OdB to 62dB Mu 4 Hd i gt i 0 i 6dHto 700B I HPL 5 Digital Digital Filter Filter 30dB to Digital Digital 12dB Filter Filter o7 PG el LN Pf iAnsioa Input R Channel I L I Lil OdB OdBto 20dB 21dB Mic Biak l lt H k l Silent Pop Noise Controller HPOR o o Vio Vbo DGND Vp PGND Ve AGND Figure 3 10 Modules Corresponding to Playback Function Headphone Gain Control Options Move the L ch HPL and R ch HPR sliders to adjust the gain of the analog output from the headphone amplifier Select the Output configuration drop down menu to select either stereo or mono output e The L ch slider controls the Headphone Line amp gain e The R ch slider controls the Headphon
23. into the software Note that each csv file listed in Table A 1 must be implemented after an All Active operation is performed with the power on csv command otherwise these files will not work properly An All Active operation is recommended to start up the device and can be executed by just clicking the All Power On button as discussed in Section 3 2 Table A 1 csv Files Operating Mode csv File Name All Power Down power off csv All Active power on csv Playback with Digital Input 01 Line Output and Headphone Output 01 DAC Line Output and Headphone Output csv 02 Headphone Output with Sound Effect 02 DAC Headphone Output with Sound Effect csv 03 Cap Less Headphone Output O3 DAC Cap Less Headphone Output csv 04 Headphone Output with Line Input AIN2L AIN2R 04 DAC Headphone Output with Line Input csv 05 Headphone Output with Mono Mic Input AIN1L 20dB 05 DAC Headphone Output with Mono Mic Input csv 06 Headphone Output with Mono Diff Mic Input 06 DAC Headphone Output with Mono Diff Mic Input AIN1L AIN1R 20dB CSV 07 Stereo Speaker Output 07 DAC Stereo Speaker Output csv 08 Mono Speaker Output 08 DAC Mono Speaker Output csv 09 Speaker Output with Line Input AIN2L AIN2R 09 DAC Speaker Output with Line Input csv 10 Speaker Output with Mono Mic Input AIN1L 20dB 10 DAC Speaker Output with Mono Mic Input csv 11 Speaker Output with Mono Diff Mic Input AIN1L AIN1R 11 DAC Speaker Output with Mono Diff Mic Input csv 20dB Playback witho
24. mrt eon n sime sare s nnm nnii enim isn sat ER EE mEE M DUE KR E FREE E M EE ME EN EIS 98 List of Figures SBAU127 July 2007 Submit Documentation Feedback List of Tables 1 1 PCM3793A 94A Terminal F hctiOrs ciessun steuern rro RE IER exe KR o REOR E RA e ARR I REPE P RR Ee ANE OK NS 14 3 1 Register Mapping for Power Up Down Module eeesseeeeeeseemmmmlnnnIIII m mI nnn 24 3 2 PCM3793A 94A Resistor 125 7dh RES 4 0 Resistor Value Control cese 25 3 3 PCM3793A 94A Resistor 125 7dh PMT 1 0 Power Up Down Time Control and Register Direct Access 25 4 1 Main Power Supply and RegulalOt ue direne tnit att cininin inicia uinea itu titm me cia nice na E aE 44 4 2 Power Supply Terminals for PCM3793A Power Supply Pins cessere 44 4 3 PAU OD ase icra crane deae om ee ecw ete a oleic iesu Eis ne uide le ate ud ERE eds Cel ETENE T S Ee accents 45 4 4 VF Controller MSP4A20 TUSBIMI D CD 45 4 5 Analog Input and Output Daughter Card 1 ssssssssssssnsnnnrrrnnrnnsnnnnnnnnnnnrrnnrrnnnnnnnnnnnnnnnnne nenn 46 4 6 Analog Input and Outp t Daughter Card 2 ccce cece eee e eee ence eee e eens eee e eens ee eee enhn nennen 48 4 7 Audio Clock and Input Data Control Format Daughter Card 2 cceceeeeeee ence eens eens eeeeeeeeeeeeeeeeeeee 48 5 1 D A Eine Output Parameters i isasssarecamsecwodicatanamanaxatenevecvas teas cde vawevevewenstvavere vere awewessedar eave DIESE 56
25. 10 c cn CN111 JP10 JP11 JP8 gr SE IPS CN112 JP12 oo JP13 QI CN305 CN308 CN113 E E Hs CN114 es te CN115 CN116 Ed cN320 CN117 Daughter card 1 Motherboard Note Silkscreen symbol CN320 is not printed on the motherboard but it is located in the position described Figure 4 4 2 Motherboard 1 EVM Configuration Table 4 1 through Table 4 4 list the connector references for the DEM DAI3793A 3794A EVM motherboard Table 4 1 Main Power Supply and Regulator Connectors Main Power Supply and Regulator CN101 6V to 10V Main Power Supply CN102 GND Table 4 2 Power Supply Terminals for PCM3793A Power Supply Pins Connectors PCMS3793A Power Supply Pins CN103 Vea CN104 Not used Do not care about short or open CN105 Voc CN106 Vpp CN107 Vio 44 Switches and Connectors SBAU127 July 2007 Submit Documentation Feedback 35 TEXAS INSTRUMENTS www ti com Motherboard Table 4 3 Audio I O Connectors Audio l O Pins CN108 Analog audio input for AINSL CN109 Analog audio input for AINSR CN110 Analog audio output for HPOL LOL CN111 Analog audio output for HPOR LOR CN112 Analog audio output for HPCOM MONO CN113 Not used CN114 Analog audio input for AIN1L AIN2L Selected by JP12 1 2 for AIN1L 2 3 for AIN2L on Daughter Card 1 CN115 Analog audio input for AIN1R AIN2R Selecte
26. 208B cesser 85 A 12 Line Input AIN2L AIN2R to Headphone Output 20 eceeee eee eee e eee eee nese IH Ie ne nhe nene nnn 86 A 13 Mono Line Input AIN2L to Headphone Output ccs eeeee eee e eee eee eee III I I nnn 87 A 14 Mono Mic Input AIN1L 20dB to Headphone Output 0c eeee eee eee eee ee ee eee eee eee HH 88 A 15 Mono Diff Mic Input AIN1L AIN1R 20dB to Headphone Output eese 89 A 16 Mono Mic Input AIN1L 20dB to Speaker OUtpUt 22 ccc cece eee eee eee eee eee eee III Im menn 90 Ac17 Linu Input AINSE AINSED cians once ang acerecaciaarcuastierunasiicidcsie daccinu cleinclsinaltata nne MERE E es pH a NER CEU cUN IUE eM uq Eas 91 A18 Mic Input AINTE AINTR X200B 3 ec unrutimu etui E sov M Sexe teu se us E ecc MEME ARM EM DUE NE 92 A 19 Mic Input AIN1L AIN1R 20dB with ALC cece cece eee eee eee eee ee II III nn nmn nennen nnne 93 A 20 Mono Mic Input AIN1L 200B ceceee cece cence eee e eee aAa snes n nnn nnns nnn nennen nnn nne 94 A 21 Mono Mic Input AIN1L 20dB with ALC ccec cece eee ee eee eee etree eee eee ere eee nene e enhn nnne nnn nnne 95 A 22 Mono Diff Mic Input AIN1L AIN1R 200B ceeee eee eee eee eee eee eee eee eee eens IH eee nmn eee nennen 96 A 23 Mono Diff Mic Input AIN1L AIN1R 20dB with ALC cee eee eee eee ee eee eee II HII 97 A24 Slave V ore 20e Tr jo Dn 98 A 25 Master Mode Operation 5 5 eee reor strn
27. 52 0x30 0x52 0x20 0x52 0x00 0x40 0x33 0x40 0x33 0x41 0x33 0x41 0x33 0x44 Ox3F 0x44 Ox3F 0x45 Ox3F 0x45 Ox3F Export Register History to csv file Figure 3 24 Register Setting History Window 40 Set Up Guide SBAU127 July 2007 Submit Documentation Feedback INSTRUMENTS www ti com Speaker Short Detection L Ch Speaker Short Detection R Ch 3 2 5 4 Modifying a csv File The csv file stores a sequence of register settings for the PCM3793A To load a given register setting it should be written in hex code as shown in Figure 3 25 use the left row for resistor addresses and the right row for resistor values o EVM Controller File Setting Help Save register snapshot Exit MW NPowerOr amp eg 2006 0726 Figure 3 25 Opening and Modifying a csv File A sleep line can be inserted for implementing an interval or wait time until executing the next line of the file If the cell is blank no wait time will be executed Files can be imported and exported using the Open script and Save register snapshot options SBAU127 July 2007 Set Up Guide 41 Submit Documentation Feedback 9 TEXAS INSTRUMENTS www ti com Speaker Short Detection L Ch Speaker Short Detection R Ch 3 2 6 Register Direct Access Figure 3 26 illustrates the register direct access dialog Read function The Read function is only available in IC mode The register value can be read in IPC mode To r
28. AU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information 95 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Reference csv Files mee _ Module of Possible Power Up Down iA Signal path s MD MC MS SCKI DOUT BCK LRCK DIN SDA SCL ADR MODE Power On E Clock y Reset Manager Audio Interface Serial Interface SPI I C 4 Dac Y XS EON AZ 0dB 6dB 12dB 18dB I ATP i AINSL c j 0d8 to 624B Mu i ne SPORP AIN2L O 2 SPORN AIN1L C odB 20dB pain eres sie IP 1 eo 30dB to igi Digital SW HPOL 12dB i Filter 648101 LOL Digital HPOR AINIRG Flog AIN2Rq ys 1Analog Input R Channel AIN3R E J OdB to HPCOM DAB MONO o o D MONO COM Silent Pop Noise HPOL o Controller HPOR o PHDTI L1 L1 L1 L1 L1 LI L1 Vo Vpb DGND Vg PGND Vog AGND Figure A 22 Mono Diff Mic Input AIN1L AIN1R 20dB 96 Reference csv Files Interfacing to DSPs and Package Information SBAU127 July 2007 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Reference csv Files _ Module of Possible Power Up Down i Signal path p MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE
29. D Ve AGND Figure A 5 Headphone Output with Mono Mic Input AIN1L 20dB SBAU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information 79 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Reference csv Files _ Module of Possible Power Up Down lum Signal path p MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE LI Li LJ Power On Clock Manager l SPOLP SPOLN 0dB 6dB 12dB 18dB ATP AINSLG OdB to 62dB Mute H 4 i AIN2L O gt ae AINIL O 30dB to Digital E HPOL 12dB Filter W AB to LOL 30dB to Digital 12dB Teest ananena XR HPOR AINIRG r BQZ ATOR AIN2R g AINSR CI rN HPCOM MONO o o P MONO mice MI Bi Soca Bees Silent Pop Noise HPOL e Te Vcom O Controller HPOR lt F Li LI L1 Li Li L1 Li Vio Vpp DGND Vp PGND Ve AGND Figure A 6 Headphone Output with Mono Diff Mic Input AIN1L AIN1R 20dB 80 Reference csv Files Interfacing to DSPs and Package Information SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www ti com Reference csv Files _ Module of Possible Power Up Down um Signal path p MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE cl L
30. DC and decimation filter R ch Reg 82 bit PADR Gain AMP L ch PG1 PG5 Gain amp L ch PG1 and PG5 Reg 82 bit4 PAIL Gain AMP R ch PG2 PG6 Gain amp R ch PG2 and PG6 Reg 82 bit5 PAIR Diff amp D2S D2S for AIN1 Reg 82 bit3 PADS Mic Bias MCB Mic bias amp Reg 82 bit2 PMCB 24 Set Up Guide SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www ti com Power Up Down Time ms Options Power Up Down Time ms Options It is possible to select the Vcom ramp up down time from GND level to a common voltage level or vice versa by choosing a Vcom Capacitor value and time by choosing one of the available checkboxes A 4 7uF Vcom capacitor is chosen as the default setting this capacitor is also mounted on the EVM The 4 7uF Vcom capacitor is the recommended value for operating the EVM This configuration is the recommended power on sequence discussed in the product data sheet To select a different Vcom value choose the appropriate value from the Vcom capacitor drop down menu Be sure to change the capacitor on the EVM to the same value 1 0uF 2 2uF or 10pF The combination of PTM 1 0 and RES 4 0 determines the Vcom ramp up down time as described in Table 3 2 and Table 3 3 To set the ramp up or down time without directly accessing the registers users can select a Vcom capacitor value and time in the group box The ramp up waveform with the defaul
31. DEM DAI3793A 3794A EVM System Diagram csseesseeeeeeeennn enne nnne nnne nnne nnn nnne TS 2 1 EVM ContiQuration xe acoccinad sous aeuo sevo oett ttu date eoe deles vieeumi lea dene P a pus idea rra ok Maley di Nei dui em 19 2 2 EVM and External Equipment Connections eesseeseeeeeeeeee eene e nnn nennen nnn nnne 20 3 1 User Interface WIndOW isse er anu nter rm ra rua rara rara rura a rr a aras sain eed FERRE MEER RR FRED ER RU as 22 3 2 Communication Error Message eceeeeeee eect cece eee e eee eee e eee n ee nhe nnn hne ee ene e nesses nnn nn nnns nnn nnn nnn 23 3 3 Power On Off Sequence Function Buttons 0 ceceee cece cece ee ee cece eee e ee eee eee eee e eee eeeaee snes en eaeeeneeenee 23 3 4 Internal Module Power Up Down Function Menu Tab ceeeeeeee cece eeeee eens I HII Hn 24 3 5 Ramp Up Wave Form with Default Setting cceecee cece ee eee eee e eee ee eee e nena ee ee denedi saasaa isn 26 3 6 Ramp Down Wave Form with Default Setting 0 ccceeee eee ee eee eee ence eee e nn I I mn nenne 26 3 7 Record Function Menu Tab akon iater rn En ri a E UE 26 3 8 EVM Modules Corresponding to Record Function eesseeeeeseeseeennn ne nne n mene 27 3 9 Playback Function Menu TaD ences enex Eee uuu D Ra e Rather seated E dieatewenasenadearaed ME MERE 28 3 10 Modules Corresponding to Playback Function 0cceceeee seen eee teen eee eee e eee ee nn I I ne nene nnn 29 9 11 CA
32. I Li Li L1 Li Li L1 Li Vio Vbo DGND Vp PGND Vec AGND Figure A 8 Mono Speaker Output Reference csv Files Interfacing to DSPs and Package Information SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www ti com Reference csv Files mee _ Module of Possible Power Up Down EE Signal path p MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE LI Li LJ cR rs Clock piPown Manage Manager a d SPOLP J SPOLN Pe P EN MyEue o Wa LSR AIN3L r SPORP AIN2L d SPORN AIN1L ge igi i HPOL Digital Filter W H LO Lor 30dB to Digital 12dB 2 2 2 4 HPOR ANS ced a eo FLOR AIN3RH MCB OdB OdBto HPCOM T 420dB 21dB MONO o 7o F MONO SAY MICBC Mic Bias COM o7o Hne meg M Silent Pop Noise HPOL e HDTI Vcou co Controller HPOR o H Li Li L1 Li Li L1 Li Vio Vbo DGND Vp PGND Vc AGND Figure A 9 Speaker Output with Line Input AIN2L AIN2R SBAU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information 83 Submit Documentation Feedback Heference csv Files A Signal path Power On Reset Power Up Down Manager Y PG1 30dB to 12dB ii Lem MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE cl L Clock Manager Digital Filte
33. I TEXAS INSTRUMENTS DEM DAI3793A 3794A EVM User s Guide July 2007 AIP Consumer Audio TI Japan SBAU127 SBAU127 July 2007 Submit Documentation Feedback Contents Prel ace eee reor rip ema oepeD AE KEIEN AAN EA UNE RON DRd M su o EN ORUN RU Re DAUS 9 1 ard Ee m 11 1 1 Introd ctiori POMS9793A 94A rano irent etes ves edu sexe ngon e de vesxetoseevae suisse RE g edule Ko aide 12 InnEB 481 12 1 2 Pin Assignments and Terminal FUNnCtIONS sssuusssssssssrnrunnnernnnnrruuunnnnrnnnnnrnuuunnuunnnennnnnnn 14 1 3 DEM DAI3793A 3794A EVM Description 0cceceeee eee eee eee e eee nm n I mm ne nemen nenne LS 2 Getting Started M 17 2 1 Electrostatic Discharge Warning cesses III Hm HI Hm mH enhn nnn 18 2 2 Unpacking the EVM eE 18 2 3 Default Config latiOr crea atta wind tarda aceite a E a a tedden debaktel Bead M DE Raid 19 3 SOUP Guid fva E e e a A a 21 3 1 Basic Operating Set D o 22 3 2 Software Control and Operation cccccecceeeeeeeeeeeeeeneeeeeeeeenaeeneeeneeaeeeaeneeeeeeeeenaeeneeeeneaees 22 32 1 User lriterface Panel ixises ie un E EE x Rex iR LER E ORa xax ax SERE CERE EEan 22 23 22 JPowerOm Off SEQUENCE usce ee scicieccicina O enum pacc sent atesinunssicus aiite tiki 23 3 2 3 Module Function Controls s
34. IN1L e i Digital 1 Digital HPOL Filter Filter LOL 30dB to Digital Digital 12dB AINIRG nc EN HARRY AIN2Rq I D 1Analog Input R Channel AIN3RO ry OdB to rN HPCOM Mic Bias 420dB 21dB MONS F MONO MICBH ad COM o gt 5p Silent Pop Noise HPOL e L1 L1 L1 L1 L1 LI L1 Vio Vpop DGND Vp PGND Vec AGND Figure A 13 Mono Line Input AIN2L to Headphone Output SBAU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information 87 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Reference csv Files mee _ Module of Possible Power Up Down Dm Signal path p MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE cl Ll L Power On Power Clock heset Up Down Manager Manager 9 d SPOLP SPOLN V0 eh MY 00B 6dB A2dB 480B FS 6dBito 70dB i ROT i AIN3L H l SPORP AIN2L SPORN AIN1L T i Digital t 1 Digital S a HPOL Filter Filter s 4B to LOL 30dB to Digital Digital 12dB AINIRG PEGG TTT TTT en ad AIN2Rq I D 1Analog Input R Channel AINS3R O r l OdB to rN HPCOM 420dB 21dB MONO o o F MONO mice pMieBias COM r o L pp Silent Pop Noise HPOL e TU Voom Controller HPOR o lt F Li Li L1 Li Li L1 Li Vio Vbo DGND Vp PGND Vc AGND Figure A 14 Mono Mic Input AIN1L 20dB to Headpho
35. LC Function Menu TaD ieiuno ene mnnr tueur aad a a a nmin a Aa Geet athe Sintec cena hanna 30 3 12 ALC Compression and Expansion Characteristics ccseceeeeeee eee e eee eeeeee eee nese eeeeeeeeeeeeeeeeeeeenaeeee 30 3 13 Signal Processing 1 Function Menu Tab cceeeeee cece eee eee e ee eee een enhn nnne nnne enhn nnne nnne nnne 31 3 14 Three Band Tone Control Bass Mid Treble esses HII men 81 39 15 Notch Filter Characteristic Model 5 5 erreur nennen nnne tana nu aR rana eh oe Ira aaa 33 3 16 Example of Measured Notch Filter Characteristic c ccc eeee cece eee ee eee eee eee ene e ences eens ee neeeeneeeeeeee 33 3 17 Signal Processing 2 Function Menu Tab ssssssssssssssnsnnnnnrrnnrrsnnnnnnnnnnnnnrnnnrnnnnnnnnnnnnnnnnnnnnnnnnnn 34 3 418 Analog Path E nction Men Tab aecei eese ei dueniseicer oce setti a uices cuis aaa aa a ea a Eaa ia 35 3 19 Modules Corresponding to Analog Path Function cceceeee eee eens ee ee eee e eee ee nn I mne 36 3 20 Audio Interface Function Menu Tab ccccceee eee ee ee ee eee teen en eee ene hme hehe hee nsn nnn nnne nnn nnn 37 3 21 Status Detect Function Menu Tab sssssssnsnnnnnnnnnnnnnnnnnnnnnrrrnnnnnnnnnnrnnnnnnnnnnnnnnnnnnnnnnnnnnn mannen 38 3 22 Digital Amplifier Function Menu Tab cece cece eee e ee ee eee e enna ee I HI mH nne e nemen hme e hen nnn 39 3 23 LC89052 Interface Format Selection Options eeeeeeee
36. OM o ms pez M Silent Pop Noise HPOL e HDTI Vcou co Controller HPOR o H Li Li LI Li Li L1 Li Vio Vpp DGND Vp PGND Vec AGND Figure A 17 Line Input AIN3L AIN3R SBAU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information 91 Submit Documentation Feedback R Texas INSTRUMENTS www ti com Heference csv Files _ Module of Possible Power Up Down A Signal path s MD MC MS SCKI SDA SCL ADR MODE C L DOUT BCK LRCK DIN m Power On Power Clock Reset Up Down Manaae Manager Togo d SPOLP Y SPOLN Y 0dB 6dB 12dB 18dB Rot ATP SPR AIN3L O A 008 to 62dB Mu SPORE AIN2L 7 2 hsponN AIN1L T i G3 py I 1 Digital gt HPOL 11 Filter Swi 1 7 LOL i t6dB to L 1ADR P i Digital I I AINTRO CMS zu LS D dade AIN2R Q p 1Analog Input R Channel AINSR E 1 E EMEN LZ L B O 1 QQ QL ILL IuVUVD IL OdB to HPCOM mE 21dB MONO o o P MONO MICBO COM o ms Silent Pop Noise HPOL o Vcom o Controller HPOR o E HDT Li Li L1 Li Li L1 Li Vio Vpp DGND Vp PGND Ve AGND Figure A 18 Mic Input AIN1L AIN1R 20dB 92 Reference csv Files Interfacing to DSPs and Package Information SBAU127 July 2007 Submit Documentation Feedback R Texas INSTRUMENTS www ti com Reference csv Files _ Module of Pos
37. Power On Power Clock Reset Up Down nien Manager i SPOLP SPOLN Y uw AY Od Bi 6dB 12dB 18dB 1 6dBito 700B PGI d AIN3L O PT SPORP AIN2L SPORN AIN1L T Digital 1 Digital HPOL Filter Filter sto LOL 30dB to 12dB mE nir mei imm HPOR AIN1RE H AIN2R E LOR AIN3R E HPCOM Mic Bi 420dB 21dB MONO o A MONO MICBO COM o ms HPOL o Vcom O HPOR o HDT L L1 L1 L1 L1 L1 LI L1 Vio Vpb DGND Vp PGND Vo AGND Figure A 16 Mono Mic Input AIN1L 20dB to Speaker Output 90 Reference csv Files Interfacing to DSPs and Package Information SBAU127 July 2007 Submit Documentation Feedback R Texas INSTRUMENTS www ti com Reference csv Files _ Module of Possible Power Up Down A Signal path s MD MC MS SCKI SDA SCL ADR MODE C L DOUT BCK LRCK DIN m Power On Power Clock Reset Up Down Manaae Manager a d SPOLP Y SPOLN Y 0dB 6dB 12dB 18dB rel ATP SPR AIN3L E A 008 to 62dB Mu SPORE AIN2L O 7 2 hsponN AIN1LT i G3 py I gt HPOL I Digital 1 1 Filter Swi 1 7 LOL i t6dB to ________ ADR _ DAI i Digital I I AINTRO Se zu ee D dade AIN2R Q ys 1Analog Input R Channel AINSR E 1 HM E MELLE L LIII QUEM v OdB OdB to HPCOM 420dB 21dB MONO o o P MONO MICBO C
38. S www ti com Slave Mode With Audio Precision SYS 2722 Default Setting o z o a T SCLK T BCK T LRCK TX DATA E SCLK R SCLK R BCK R LRCK RX DATA All short see Reece OJOIOJOIOJOJOIOIO o N E SCK SCK from U003 DIR LC89052T on Daughter Card 2 T SCLK BCK from U003 DIR LC89052T on Daughter Card 2 T BCK Short plug Short plug OIOIOIDJO 9 OJOIOIOJO Q z eo o eo GND TSCK T BCK T LRCK TX DATA R SCLK R BCK R LRCK RX DATA eee OJOJOIOIOJOJOIO All open gt eee O Short plug gt Short plug O O Figure 5 2 Jumper Configuration for Slave Mode Default SBAU127 July 2007 Evaluation and Measurements 51 Submit Documentation Feedback D TEXAS INSTRUMENTS www ti com Master Mode with Audio Precision SYS 2722 5 2 52 Master Mode with Audio Precision SYS 2722 To enable the DEM DAI3793A 3794A EVM motherboard for use in Master mode the path of the S PDIF input to the PCM3793A through DIR is not available for use LRCK and BCK change the respective output states at the PCM3793A side in master mode the respective jumpers of R BCK R LRCK and RX DATA should be removed from CN305 to avoid conflict between the input and output of these clocks Furthermore in this situation DIN to the PCM3793A is also invalid because DIR LC89052T does not
39. S INSTRUMENTS www ti com Printed Circuit Board Layout o e Z 000 oo o s o GP o o z 200 O10 x es Sx LIO 8 x Os O 000000 or or 900000 OT TO e O amp oo oo e 9 9 m vm Figure 6 6 PCM3793A DEM PCM3793RHB A Board Layout Inner Layer 3 SBAU127 July 2007 Schematic PCB Layout and Bill of Materials 69 Submit Documentation Feedback D TEXAS INSTRUMENTS www ti com Printed Circuit Board Layout EE o assess 90 9 9 9 9 o Opto 1 olo o o o o o o o olblo Figure 6 7 PCM3793A DEM PCM3793RHB A Board Layout Solder Side 70 Schematic PCB Layout and Bill of Materials SBAU127 July 2007 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com 6 3 Component List Table 6 1 lists the Bill of Materials for the DEM DAI3793A 3794A EVM Table 6 1 Bill of Materials Component List RefDes Count Description Part Number MFR R3 R5 R6 R7 5 3300 CF1 4C 330J KOA R8 CP1 CP4 4 0 1uF dd sad D Murata C8 C9 C13 C14 4 0 82uF ECQV1H824J Nissei R4 1 100kQ CF1 4C 100kQJ KOA R9 R10 2 10kQ CF1 4C 10kQJ KOA C3 C4 C6 C10 4 10UF 16V R3A 16V100M Elna C1 C2 2 1pF ECEV1HA010NR Panasonic C5 1 1pF 50V R3A 50V10M Elna R1 R2 2 2 2kQ CF1 4C 2 2kQJ KOA C11 C12 C15 4 2 2uF 50V R3A 50V22M Elna C16 C17 C18 220yF R3A 4V2200M
40. TE eo SPORN AINILG i ofan E are AN HPOL Digital x Filter E 1 sinc LOL 30dB to 12dB AlNiRH e Imw x BG2 EQO 777777 H oH AIN2R H AINSR E HPCOM 420dB 21dB MONO o o P MONO mice cpMieBias COM r o L pp Silent Pop Noise HPOL e T Voom El co Controller HPOR o H Li Li LI Li Li L1 Li Vio Vbo DGND Vp PGND Ve AGND Figure A 20 Mono Mic Input AIN1L 20dB 94 Reference csv Files Interfacing to DSPs and Package Information SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www ti com Reference csv Files mee _ Module of Possible Power Up Down EE Signal path p MD MC MS SCKI SDA SCL ADR MODE C L DOUT BCK LRCK DIN m Power On Power Clock Reset Up Down Mana ger E Sas Y 0dB 6dB 12dB 18dB Rot ATP SPR AIN3L C E A 008 to 62dB Mu ANI oo SPORN AINILG i igi HPOL Digital Filter sto LOL 30dB to 12dB AlNiRH e Imw x BG2 EQO 777777 H oH AIN2R H AINSR E HPCOM 420dB 21dB MONO o o P MONO mice cpMieBias COM r o L pp Silent Pop Noise HPOL e T Voom El co Controller HPOR o H Li Li LI Li Li L1 Li Vio Vbo DGND Vp PGND Vc AGND Figure A 21 Mono Mic Input AIN1L 20dB with ALC SB
41. acteristics 5 4 3 4 LC Low Pass Filter Daughter Card 2 provides an LC low pass filter LPF to obtain a clean analog signal from the pulse width modulated PWM output of the speaker output This configuration is shown in Figure 5 7 Additionally a snubber circuit is inserted into the signal line to achieve the best output power performance by suppressing ringing in the PWM pulse however a snubber circuit will have negligible effects in the end system SPOL J3 Snubber Circuit LC LPF SPOR J4 I I m hn NEG oT ME 1 Audio 1 _ gt 14 dE L1220H l TA Analyzer SPOLN e LY Y Y e i fe l l J3 Differential SPOLP _ et 1 E k Input u ndi SS po S m i ex s l 3300 3300 l C8 C9 fi ci 0 82uF T 0 82uF T TP1 22uF T 22uF T l l ri OE amare ie BB T fc Creer 37 5 kHz Note 1 Same configuration at SPORN SPORP Figure 5 7 Speaker Output Filter Configuration 58 Evaluation and Measurements SBAU127 July 2007 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Measurements for Dynamic Characteristics 5 4 4 Amplitude Versus Frequency Performance 5 4 4 1 A D Spectrum Measurement path 17 Line Input AINSL AINSR csv file 17 ADC Line Input csv Note that an unweighted filter and an AES17 bandwidth of 22Hz to 20kHz should b
42. d 1 Set OPT or i Set coax oum for S PDIF input to DIR LC89052T o lente nesa Figure 2 1 EVM Configuration SBAU127 July 2007 Getting Started 19 Submit Documentation Feedback D TEXAS INSTRUMENTS www ti com Default Configuration j USB 3 r Connection 46V to 10V CN102 CN101 CN202 o gnum SWw201 CN201 CN306 CN103B o oo OND BONOS coe Al CN109 Opt Output CN110 CN111 Coax Output CN112 CN113 CNI14 AIN1L AIN2L AIN1R AIN2R Opt Input CN115 Daughter card 1 pag E con Coax Input CN302 Motherboard Digital Audio Interface SO if needed Figure 2 2 EVM and External Equipment Connections The factory default configuration for the DEM DAI3793A 3794A EVM is listed below Motherboard e CN101 CN102 Connect dc power supply positive lead to CN101 and negative lead to CN102 e SW301 Set Opt or Coax output for the proper cable connection Daughter Card 1 DEM PCM3793RHB A e JP14 JP15 JP16 JP17 and JP19 these jumper pins should not be used e For other jumper settings please refer to the chapter Switches and Connectors Daughter Card 2 DEM TRVC LPO e SWO001 Set Opt or Coax for S PDIF input to DIR LC89052T e SWO002 Set to silkscreen SW002 RESET side releasing reset e SWO003 Set X ta to use onboard crystal oscillator There is no need to change the setting of the shorting plugs for basic operation Jumper settings strongly dep
43. d by JP13 1 2 for AIN1R 2 3 for AIN2R on Daughter Card 1 CN116 Not used CN117 Not used U301 TOSLINK S PDIF Optical output CN301 S PDIF coaxial output SW301 Toggle switch Opt Coax selector for S PDIF output U302 TOSLINK S PDIF Optical output CN302 S PDIF coaxial input CN305 2x9 header pins to connect digital audio I F for ADC DAC If using external signal source all shorting plugs should be removed CN306 BNC connector to provide external clock for LC89052T DIR S PDIF receiver on Daughter Card or PCM3793 directly as E SCK CN307 2x5 header pins System clock and bit clock selection to provide DIT4096 DIT S PDIF transmitter SCK and BCK should be provided from LC89052T as initial setting CN308 CN309 CN316 2x9 header pins and SMA connecters x8 for connecting digital audio I F with external devices or equipment If using this feature all shorting plugs on CN305 should be removed CN317 3x10 header pins Path of I C SPl interface selection via USB or parallel port Selected USB port for initial configuration Parallel port is not available CN320 2x3 header pins Word L R clock selection Master or Slave mode Selected Slave mode as initial Table 4 4 I F Controller MSP430 TUSB3410 Connectors I F Controller MSP430 TUSB3410 CN201 USB connector type B CN202 JTAG port SW201 Push switch RESET for MSP430 TUSB3410 SBAU127 July 2007 Switches and Connectors 45 Submit Documentation Feedback Daughter Card 1
44. dphone amplifier R ch volume 6dB 4 4227h Speaker amplifier L ch volume 6dB 5 4327h Speaker amplifier R ch volume 6dB 6 4427h Digital attenuator L ch 24dB 7 4527h Digital attenuator R ch 24dB 8 4620h DAC audio interface format left justified 9 4BCOh Headphone detection enable and inverting polarity Short and thermal detection enable 10 5102h ADC audio interface format left justified 11 5A10h Vcom ramp up down time control PG1 PG2 gain control OdB 129 49E0h DAC DAL DAR and analog bias power up 13 5601h Zero cross detection enable 14 4803h Analog mixer MXL MXR power up 15 5811h Analog mixer input SW2 SW5 select 16 49FCh Headphone amplifier HPL HPR HPC power up 17 4C03h Speaker amplifier shut down release 18 4A01h Vcom power up 19 523Fh Analog front end ADL ADR D2S MCB PG1 2 5 6 power up 20 5711h Analog input MUX3 MUX4 select Analog input MUX1 MUX2 select 21 4FOCh Analog input L ch PG3 volume 0dB 22 500Ch Analog input R ch PG4 volume 0dB 23 Any settings for other devices or wait time 450ms 9 7 24 49FFh Speaker amplifier SPL SPR power up m S995 2 A 3 Package Information 0 Vpp should be turn on prior to or simultaneously with the other power supplies It is recommended to set register data with the System clock input after turning all power supplies on Any level is acceptable for volume or attenuation Level should be resumed by re
45. e Line amp gain e Select the output channel to be stereo mono single ended or mono differential e The HP com drop down list determines the HPCOM MONO pin function Speaker Gain Control Options Move the L ch SPL and R ch SPR sliders to adjust the gain of the analog output from the speaker amplifier Select the Output configuration drop down menu to select either stereo or mono output e The L ch slider controls the speaker amp gain e The R ch slider controls the speaker amp gain e Select the output channel to be either stereo or mono SBAU127 July 2007 Set Up Guide 29 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Digital Attenuation ATP Options Digital Attenuation ATP Options Move the L ch and R ch sliders to adjust the gain of the incoming digital signals prior to conversion by the DAC e The L ch slider adjusts the DAC digital attenuator level e The R ch slider controls the DAC digital attenuator level e Select the output channel to be either stereo or mono e The digital boost option enables a gain control of OdB 6dB 12dB or 18dB for the DAC digital input 3 2 3 4 ALC Automatic Level Control Figure 3 11 shows the Automatic Level Control ALC function menu tab Signal Processing 2 Analog Path Audio Interface Status detect Digital Amp Power Up Down Record Playback Signal Processing 1 Auto Level Control Record Rermven ime 4 S gt Comoren dB 7 Attacktime
46. e Modes With PSIA 2722 54 5 4 Measurements for Dynamic Characteristics 55 5 5 Connection Diagram for Practical Applications 61 SBAU127 July 2007 Evaluation and Measurements 49 Submit Documentation Feedback Slave Mode With Audio Precision SYS 2722 Default Setting 5 1 Slave Mode With Audio Precision SYS 2722 Default Setting These jumper configurations for the DEM DAI3793A 3794A EVM motherboard are the default device settings Simple evaluation using the Audio Precision SYS 2722 as shown in Figure 5 1 is easily managed U302 CN302 U301 CN301 LOEMS 12906891 HIG SCKI BCK Manager LRCK DIT DIT4096 Daughter card 2 Figure 5 1 Slave Mode Configuration With SYS 2722 DIN DOUT eoepneju oipny 3 TEXAS INSTRUMENTS www ti com PCM3793A Daughter card 1 To put the DEM DAI3793A 3794A EVM motherboard into the default slave mode configuration connect the S PDIF input and output to optical jumper U302 or coaxial jumper CN302 and jumper U301 or jumper CN301 Then select SW301 and SWO001 respectively Refer to the jumper combination shown in Figure 5 2 50 Evaluation and Measurements SBAU127 July 2007 Submit Documentation Feedback R Texas INSTRUMENT
47. e set to obtain precise spectrum results AMPLITUDE vs FREQUENCY AMPLITUDE vs FREQUENCY 0 0 BPZ Zero Data Input 60dB Input 20 20 40 40 T T KJ KJ gt 60 v 60 2 2 80 amp 80 E E xt lt x 100 100 120 120 140 140 0 5 10 15 20 Frequency kHz Frequency kHz Figure 5 8 A D Amplitude vs Frequency Figure 5 9 A D Amplitude vs Frequency Result BPZ Zero Data Input Result 60dB Input AMPLITUDE vs FREQUENCY 0 1dB Input 20 40 T KJ gt 60 8 80 E lt x 100 120 140 Frequency kHz Figure 5 10 A D Amplitude vs Frequency Result 1dB Input See Appendix A Line Input AIN3L AIN3R for a signal flow block diagram SBAU127 July 2007 Evaluation and Measurements 59 Submit Documentation Feedback Measurements for Dynamic Characteristics 5 4 4 2 D A Spectrum Measurement path 01 Line Output and Headphone Output csv file 01 DAC Line Output and Headphone Output csv Note that an unweighted filter and an AES17 bandwidth of 22Hz to 20kHz should be set to obtain precise 60 Amplitude dB Amplitude dB spectrum results AMPLITUDE vs FREQUENCY BPZ Zero Data Input 60 80 100 120 140 0 5 10 15 20 Frequency kHz Figure 5 11 D A Amplitude vs Frequency Result BPZ Zero Data Input AMPLITUDE vs FREQUENCY OdB Input 60 80 100
48. e speaker gain control and digital ATT e ALC tunes the Automatic Level Control function e Signal Processing 1 adjusts the tone control and notch filter coefficient e Signal Processing 2 controls DAC oversampling de emphasis and high pass filtering e Analog Path selects analog input differential input and analog mixer e Audio Interface selects the audio interface for ADC and DAC e Status Detect controls headphone short detection and speaker thermal protection e Digital Amp tune switching frequency for digital amplifier This section discusses each of these tab operations and controls SBAU127 July 2007 Set Up Guide 23 Submit Documentation Feedback Software Control and Operation 3 2 8 4 Power Up Down 3 TEXAS INSTRUMENTS www ti com This menu shown in Figure 3 4 allows users to manually power up or power down each module Click the appropriate checkboxes to power up or power down a specific module Table 3 1 shows the register mapping for each module setting Abbreviations such as DAL DAR MXL MXH and ADL ADR stand for corresponding modules that are described in the block diagram of the PCM3793A see Figure 3 8 Signal Processing 2 Analog Path Audio Interface Status detect Digital Amp Record Playback ALC Power Up Down Power up down for each module Analog bias DAC L ch DAL DAC R ch DAR Mixer L ch MXL Mixer R ch MXR ADC L ch ADL ADC R ch ADR Vcom Power UP
49. ead the value enter the Address number in hex code format in the left box and click the Read button Data corresponding to the address appears Write function This window also enables the user to write the register value directly Enter the Address number and data both in hex code format in the respective fields and click the Write button Register direct access Address Data Figure 3 26 Register Direct Access Dialog 42 Set Up Guide SBAU127 July 2007 Submit Documentation Feedback 35 TEXAS Chapter 4 INSTRUMENTS SBAU127 July 2007 Switches and Connectors This chapter reviews the DEM DAI3793A 3794A EVM switch and jumper configuration Topic Page 4 1 OVervieWw eoe SOON EEUU 44 42 Motherboard retaneemeoncardedce cece ar iaoronconeocrarcrenecocnercneecececserarneunecoracs 44 4 3 Daughter Card 1 PCM3793A cceccecececeeeeeeeeeeeeaeeeeeeeees 46 4 4 Daughter Card 2 DIR LC89052T and DIT DIT4096 48 SBAU127 July 2007 Switches and Connectors 43 Submit Documentation Feedback Overview 4 4 Overview 3 TEXAS INSTRUMENTS www ti com Figure 4 1 shows the location of the switches and connectors on the EVM board CN202 9 SW201 CN306 O HITHEHITI CN306 U301 SW004 SWO005 CN301 lojswao Sw003 U302 H sog CI Co swo CN302 Daughter card 2 CN102 CN101 CN201 CN1038 CN106p EICN104 cN108 CN107 x B BN ewig CN307 g CN1
50. eeeeesseeeeeeeenn eene enne nnne nnne 39 3 24 Register Setting History WIDndOWs scienr e erre hne nmrenn etur tenir Rr voile Vcn sn x Dae e dini EDI Rma nn 40 3 25 Opening and Modifying a csv File cece eee eee eee eee eee eee I II IH nenne n eme nme nennen 41 3 26 Register Direct Access Dialog ceceeeeeeenee ener e nee rene ee en ene eneneneeenereaneeeneeenenerenereasonenenenener 42 4 1 EVM Configurations sic Rx 44 4 2 Analog Input Configuration Daughter Card 1 ccccceeceeeeeee eee eee eee eee eee ene eee I IH 46 4 3 Analog Output Configuration Daughter Card 1 cceeceeee ence ee eee eee eee eee eee eee eeeeeeeeeeeeeeeeeeeeeaeeee 47 5 1 Slave Mode Configuration With SYS 2722 cecceceeee eee eee e eee eee eee eee enna enna nese hene me nen nnne 50 5 2 Jumper Configuration for Slave Mode Default ccceeeeee ee ee eee eee eee e eee eee sees eeeeeeeeeeeeeeeeeeeeeeeeneeees 51 5 3 Master Mode Configuration With SYS 2722 cccceeeeeeeee eee n ee eee eee e ee eee eee s ens nnne nnne nnn nnn nnne 52 5 4 Jumper Configuration for Master Mode eccceee cece eee e eee e eee e enna eens enna nnne nnn enne nen nnne 53 5 5 Combined Master and Slave Mode Configuration with SYS 2722 cccceeeeee ence eee e eee ee teen eee eee seen eeeeeee 54 5 6 Jumper Configuration for Combined Master and Slave Modes 20ceeeeeeeeeeeeeee eee eeeeeeeeeeeeeeeeeeeees 55 5 7 Speaker Output Filter Config ra
51. el for negative PCM3793A only SPORP 11 O Speaker output R channel for positive PCM3793A only Voc 20 20 Analog power supply VcoM 18 18 Analog common voltage Vpp 5 5 Power supply for digital core Vio 4 4 Power supply for digital I O Vea 12 12 Power supply for power amplifier 1 3 DEM DAI3793A 3794A EVM Description The DEM DAI3793A 3794A evaluation module permits user control of the entire PCM3793A 94A system The EVM allows users to test playback with and without digital input recording through digital input output with an optical cable or RCA jacks a line input output stereo speaker output PCM3793A only stereo mono headphone output and stereo mono microphone input as shown in Figure 1 3 Optical Line out Line in Figure 1 3 DEM DAI3793A 3794A EVM System Diagram SBAU127 July 2007 Submit Documentation Feedback Description 15 16 Description SBAU127 July 2007 Submit Documentation Feedback 35 TEXAS Chapter 2 INSTRUMENTS SBAU127 July 2007 Getting Started This chapter provides information regarding DEM DAI3793A 3794A EVM handling and unpacking absolute operating conditions and a description of the factory default switch and jumper configuration Topic Page 2 4 Electrostatic Discharge Warning eeeeeeeeeseeeeee 18 2 2 7 Unpacking the EVM ii eere AEAEE A EEE EEE Nee 18 2 3 Default Configuration eere Errem ERR EE 19 SBAU127 J
52. end on the audio interface 20 Getting Started SBAU127 July 2007 Submit Documentation Feedback 35 TEXAS Chapter 3 INSTRUMENTS SBAU127 July 2007 Set Up Guide This chapter discusses how to set up the DEM DAI3793A 3794A EVM and describes the EVM software Topic Page 3 1 Basic Operating Set p eee eI 22 3 2 Software Control and Operation eeseuseeeeesse 22 SBAU127 July 2007 Set Up Guide 21 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Basic Operating Set Up 3 4 Basic Operating Set Up Follow these steps to set up the DEM DAI3793A 3794A EVM for operation Step 1 When using the kit for the first time install the TUSB3410 VCP Virtual COM Port driver to the host PC To install the driver refer to the Virtual COM Port Driver Installation Instructions pdf located in the DEM DAI3793 folder of the software CD or available through the TI web site Step 2 Connect the audio signal sources and or receiver using one of these connections e S PDIF cable optical or coaxial e Analog input output RCA Step 3 Connect microphone speakers headphone an audio amplifier or measurement equipment if necessary Step 4 Confirm that jumpers CN103 CN107 are shorted Step 5 Connect the USB cable between the host PC and the motherboard CN201 Step 6 Apply 6V to 10V to the motherboard CN101 CN102 for power supply Step 7 Execute EVM3793A exe When the installa
53. ent that they have all necessary expertise in the safety and regulatory ramifications of their applications and acknowledge and agree that they are solely responsible for all legal regulatory and safety related requirements concerning their products and any use of TI products in such safety critical applications notwithstanding any applications related information or support that may be provided by TI Further Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety critical applications TI products are neither designed nor intended for use in military aerospace applications or environments unless the TI products are specifically designated by TI as military grade or enhanced plastic Only products designated by TI as military grade meet military specifications Buyers acknowledge and agree that any such use of TI products which TI has not designated as military grade is solely at the Buyer s risk and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO TS 16949 requirements Buyers acknowledge and agree that if they use any non designated products in automotive applications TI will not be responsible for any failure to meet such requirements
54. equired to correct this interference EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of 2 0V to 4 0V and the output voltage range of 2 0V to 4 0V Exceeding the specified input range may cause unexpected operation and or irreversible damage to the EVM If there are questions concerning the input range please contact a TI field representative prior to connecting the input power Applying loads outside of the specified output range may result in unintended operation and or possible permanent damage to the EVM Please consult the EVM User s Guide prior to connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 60 C The EVM is designed to operate properly with certain components above 60 C as long as the input and output ranges are maintained These components include but are not limited to linear regulators switching transistors pass transistors and current sense resistors These types of devices can be identified using the EVM schematic located in the EVM User s Guide When placing measurement probes near these devices during operation please be aware that these devices may be very warm to the touch Mailing Address Texas Instruments Post Office Box 655308 Dallas Texas 75265 Copyright O 2007 Texas Instruments Incorp
55. esono sunna a i oa 23 3 2 4 LC89052T DIR Digital Audio I F Receiver Control Window eeeseeeeeeueeeee 39 3 2 5 Hegister Setting HiIStoy sisstdssg odere re eurui eiaa E a E gea E Race 40 3 2 6 Register Direct ACCESS eeeseeeeieeeelieeeiieeeseee enne nnne nnnm nnnm h nnnm nennen nnn 42 4 Switches and Connectors ii eer nU bend rera eir ERR aaan d io an Easa 43 4 1 e 44 4 2 Motherboard eR ms 44 4 3 Daughter Card 1 POMS 793A asidinin staia ip rera a rie sais nA UE Re MER KNEE 46 4 4 Daughter Card 2 DIR LC89052T and DIT DIT4096 cece eee ee eee eee eee ee eee eee e enna e eee eeee 48 5 Evaluation and Measurements ccececee ee eee eee ee eee eee eee e anata eens mmemememememememnemenenee 49 5 1 Slave Mode With Audio Precision SYS 2722 Default Setting Lese esee essere 50 5 2 Master Mode with Audio Precision SYS 2722 ccceceeeee cece ence nese eee e eens enne nennen nnne 52 5 3 Combined Master and Slave Modes With PSIA 2722 cesses 54 5 4 Measurements for Dynamic Characteristics cceceeeee eee ee cece eee eee eee seen ee nn mn mne 55 5 4 1 Digital to Analog D A Performance cece eeeee cesses HI HI nnnm 56 5 4 2 Analog to Digital A D Performance ccceeeeee eee ee ee eee eeeee ee HH Hn nnn 57 5 4 3 Speaker Output Power Performance essesseesseeseeee ne
56. f needed It is also possible to connect a microcontroller SWO005 DIP switch Sets the DIT4096 system clock and data format Note that the OFF state of this switch sets a HIGH level See the DIT4096 product data sheet TI literature number SBOS225 available for download from the TI web site for further information Table 4 7 describes the audio clock and data control format options for Daughter Card 2 Switches and Connectors Table 4 7 Audio Clock and Input Data Control Format Daughter Card 2 CLKO CLK1 System Clock L L Not used L H 256fg initial setting H L 384fs H H 512fs FMTO FMT1 Input Data Format L L 24 bit left justified MSB first L H 24 bit I S initial setting H L 24 bit right justified MSB first H H 16 bit right justified MSB first SBAU127 July 2007 Submit Documentation Feedback 35 TEXAS Chapter 5 INSTRUMENTS SBAU127 July 2007 Evaluation and Measurements This chapter discusses how to set up jumpers on the DEM DAI3793A 3794A EVM motherboard for performance evaluation using the Audio Precision SYS 2722 or PSIA 2722 audio analyzers The process of measuring dynamic characteristics is then presented along with example characteristic data Topic Page 5 1 Slave Mode With Audio Precision SYS 2722 Default Setting 50 5 2 Master Mode with Audio Precision SYS 2722 52 5 3 Combined Master and Slav
57. ghter Card 2 T BCK Short plug Short plug OJOJO O O 2 OIOIOIOJIOIS o z e o eo GND T SCK T BCK T LRCK TX DATA R SCLK R BCK R LRCK RX DATA All open OJOOOIOOJOI OO OJOJOIO OJOIOJOJO O Short plug gt O O Figure 5 4 Jumper Configuration for Master Mode SBAU127 July 2007 Evaluation and Measurements 53 Submit Documentation Feedback D TEXAS INSTRUMENTS www ti com Combined Master and Slave Modes With PSIA 2722 5 3 Combined Master and Slave Modes With PSIA 2722 As shown in Figure 5 5 the DEM DAI3793A 3794A EVM can provide evaluation for both slave and master modes of the PCM3793A at the same time without setup jumpers on the motherboard if the user has access to the PSIA 2722 analyzer SCKI Manager PSIA 2722 BCK Ii gt amp eee Tee all 5 lt 4 g ED e DIN 8 DOUT PCM3793A Daughter card 1 Figure 5 5 Combined Master and Slave Mode Configuration with SYS 2722 Refer to the jumper combination shown in Figure 5 6 to set up the combined master and slave modes configuration SBAU127 July 2007 54 Evaluation and Measurements Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Measurements for Dynamic Characteristics o z o a T SCLK T BCK T LRCK TX DATA E SCLK R SCLK R BCK R LRCK RX DATA All
58. gister data recorded when system power off IS 4620h Left Justified 4601h Right Justified 4602h DSP 4603h Audio interface format should be set to match the DSP or decoder being used Between steps 12 and 13 add this value for slave configuration 5400h For master configuration add 5440h The PCM3793A requires time for Vcom to reach the common level from GND level The delay depends on the capacitor value for Vcom and the setting of register 125 PTM 1 0 RES 4 0 The default setting is 450ms at Vcom 4 74s U The PCM3794A does not require this setting because it has no speaker output Packaging information includes a thermal pad mechanical drawing and an example board layout These examples are taken from the PCM3793A product data sheet available for download at www ti com SBAU127 July 2007 Submit Documentation Feedback Reference csv Files Interfacing to DSPs and Package Information 99 EVALUATION BOARD KIT IMPORTANT NOTICE Texas Instruments TI provides the enclosed product s under the following conditions This evaluation board kit is intended for use for ENGINEERING DEVELOPMENT DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer use Persons handling the product s must have electronics training and observe good engineering practice standards As such the goods being provided are not intended to be complete in terms of required design mar
59. he DEM DAI3793A 3794A EVM This document is available from the corresponding manufacturer Device Document Manufacturer LC89052 Sanyo Corporation If You Need Assistance If you have questions regarding either the use of this evaluation module or the information contained in the accompanying documentation please contact the Texas Instruments Product Information Center at 972 644 5580 or visit the Tl web site at www ti com FCC Warning This equipment is intended for use in a laboratory test environment only It generates uses and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules which are designed to provide reasonable protection against radio frequency interference Operation of this equipment in other environments may cause interference with radio communications in which case the user at his own expense is required to take whatever measures may be required to correct this interference Trademarks 10 All trademarks are the property of their respective owners Read This First SBAU127 July 2007 Submit Documentation Feedback 35 TEXAS Chapter 1 INSTRUMENTS SBAU127 July 2007 Description The DEM DAI3793A 3794A EVM is a complete evaluation platform for the PCM3793A PCM3794A 16 bit low power stereo audio codec with microphone bias headphone and digital speaker All necessary connectors and circuitry a
60. heck the 3D effect then select an Effect type and an Efficiency drop down menu to obtain the desired 3D enhancement Effect type means the selection of a band pass filter BPF the BPF filters the sound and enables a high percentage of heavy 3D enhancements to be applied to the signal Effect type and efficiency are controlled through the use of checkboxes Notch Filter 1 Coefficient Notch Filter 2 Coefficient Options In some applications incoming noise such as motor control noise CCD noise and other mechanical noise may not be negligible The PCM3793A provides a very useful function to reduce such interference with the notch filter function When the checkbox of Notch Filter 1 Coefficient or Notch Filter 2 Coefficient is checked coefficient a and az of the notch filter can be programmed at each edit box Load the values of f f and fs into the Filter Calculator group box Click Apply to Filter 1 or Apply to Filter 2 The calculated coefficient will then appear in the a and a edit box Finally click the Update button for each Notch filter coefficient To complete the notch filter operation the Update button must be clicked Note that Update step is required each time new or different parameters are loaded to the dialog box Follow these steps to update the notch filter coefficient Step 1 Click the checkbox of Notch Filter 1 Coefficient or Notch Filter 2 Coefficient Step 2 Input the parameter values fe fy and fs Step
61. hese parameters start the EVM software as discussed in Section 3 2 Click A Power On in the startup window or execute power on csv and then execute the csv file that corresponds to the appropriate measurement path discussed in the subsequent sections of this chapter SBAU127 July 2007 Evaluation and Measurements 55 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Measurements for Dynamic Characteristics 5 4 1 Digital to Analog D A Performance Measurement path 01 Line Output and Headphone Output csv file 01 DAC Line Output and Headphone Output csv Table 5 1 D A Line Output Parameters Power Supply Parameter Filter Setting Ri KQ LOL LOR 3 3V THD N OdBFS at 1kHz 400Hz 20kHz AES 17 10 0 00796 0 008 SNR BPZ input 22Hz 20kHz SPCL 10 93 1dB 93 0dB A weighting DR 60dBFS input 22Hz 20kHz SPCL 10 93 1dB 92 9dB A weighting Channel Separation 22Hz 20kHz AES 17 10 90 5dB 90 4dB BPZ input for target channel Table 5 2 16Q Headphone Output Inserted in Headphone Jack J6 Power Supply Parameter Filter Setting R Q HPOL HPOR 3 3V THD N 40mW HP 400Hz 20kHz AES 17 16 0 028 0 027 volume 1dB SNR BPZ input 22Hz 20kHz SPCL 16 93 1dB 93 0dB A weighting DR 60dBFS input 22Hz 20kHz SPCL 16 93 4dB 93 1dB A weighting To obtain the performance results shown in Table 5 1 and Table 5 2 the speaker module should be powered dow
62. i com Daughter Card 1 PCM3793A PCM3793A Connected to HPCOM MONO MOND CN112 of motherboard ca SPOLN J3 39 SPOLP SPOUT L Ch Br 9 9 SPORN 4 J4 It SPORP SPOUT R Ch LINE OUT Connected to L Ch CN110 of motherboard LINE OUT Connected to R Ch CN111 of motherboard J5 HPOUT Cap less J6 HPOUT Figure 4 3 Analog Output Configuration Daughter Card 1 CAUTION Do not insert a headphone to J5 and J6 at the same time Doing so connects resistors in parallel SBAU127 July 2007 Switches and Connectors 47 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Daughter Card 2 DIR LC89052T and DIT DIT4096 4 4 Daughter Card 2 DIR LC89052T and DIT DIT4096 Table 4 6 lists the connector references for the second DEM DAI3793A 3794A EVM daughter card 48 Table 4 6 Analog Input and Output Daughter Card 2 Connectors Analog Input and Output of Daughter Card 2 SWO001 Toggle switch Opt Coax selector for S PDIF input SWO002 Toggle switch Reset Power down LC89052T and DIT4096 SW003 Clock source selection for LC89052T Onboard crystal oscillator or external source from CN306 of motherboard SW004 DIP switch Sets channel status data of the DIT4096 Note that the OFF state of this switch sets a HIGH level Channel status data can be set up i
63. ions should be set with these parameters e Headphone and Speaker Amp Disabled e DAC L channel and DAC R channel Disabled e ALC Off e Mic boost 0dB e Analog mixing Disabled All PGA 0dB The bundled csv file automatically sets the device to these conditions See Appendix A Line Input AIN3L AIN3R for a signal flow block diagram 5 4 3 Speaker Output Power Performance SBAU127 July 2007 Measurement path 07 Stereo Speaker Output csv file 07 DAC Stereo Speaker Output 8ohms csv Table 5 4 Stereo Speaker Output Parameters Power Supply Parameter Speaker Volume Ri Q 3 3V Output Power 6dB 8 THD N 10 SPOL 594 2mW SPOR 594 1mW To obtain the performance results shown in Table 5 4 the headphone module should be powered down and other functions should be set with these parameters e Headphone Amp Disabled e ADC L channel and ADC R channel Disabled e Speaker volume 6dB e ALC Off Ri 80 The bundled csv file automatically sets the device to these conditions except for the speaker volume adjust the speaker volume to 6dB manually after the csv file is loaded Note Adjust the input signal level of the Audio Precision analyzer to meet the target THD N 10 See Appendix A Stereo Speaker Output for a signal flow block diagram Evaluation and Measurements 57 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Measurements for Dynamic Char
64. keting and or manufacturing related protective considerations including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards This evaluation board kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility restricted substances RoHS recycling WEEE FCC CE or UL and therefore may not meet the technical requirements of these directives or other related directives Should this evaluation board kit not meet the specifications indicated in the User s Guide the board kit may be returned within 30 days from the date of delivery for a full refund THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES EXPRESSED IMPLIED OR STATUTORY INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE The user assumes all responsibility and liability for proper and safe handling of the goods Further the user indemnifies TI from all claims arising from the handling or use of the goods Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES TI currently deals with a variety of custome
65. mation About Cautions and Warnings This document contains caution statements CAUTION This is an example of a caution statement A caution statement describes a situation that could potentially damage your software or equipment The information in a caution or a warning is provided for your protection Please read each caution and warning carefully SBAU127 July 2007 Read This First 9 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Related Documentation From Texas Instruments Related Documentation From Texas Instruments The following documents provide information regarding Texas Instruments integrated circuits used in the assembly of the DEM DAI3793A 3794A EVM These documents are available from the TI web site The last character of the literature number corresponds to the document revision that is current at the time of the writing of this User s Guide Newer revisions may be available from the TI web site at http www ti com or call the Texas Instruments Literature Response Center at 800 477 8924 or the Product Information Center at 972 644 5580 When ordering identify the document s by both title and literature number Data Sheet Literature Number PCM3793A PCM3794A Product LAS529A data sheet DIT4096 Product data sheet SBOS225B Additional Documentation The following document provides information regarding selected non Tl components that are used in the assembly of t
66. mpling frequency High Pass Filter Options Choose the High Pass Filter menu to determine the center frequency f of the incoming analog signal inputs to the ADC The cutoff frequency of the ADC high pass filter is provided as a sampling frequency of 48kHz in this drop down menu so that the cutoff will be scaled down to the corresponding value when sampling frequencies other than 48kHz such as 16kHz or 22 05kHz are used The ADC high pass filter cutoff frequency can be set from this option 34 Set Up Guide SBAU127 July 2007 Submit Documentation Feedback i INSTRUMENTS www ti com High Pass Filter Options 3 2 8 7 Analog Path Figure 3 18 shows the Analog Path Function menu D Figure 3 18 Analog Path Function Menu Tab SBAU127 July 2007 Set Up Guide 35 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Analog Input Options Figure 3 19 illustrates the modules that correspond to the analog path function et __ Module of Possible Power Up Down Le MD MC MS DOUTBCKLRCK DIN SDA SCL ADR MODE LJ Power On Reset Mdnager Audio Interface Serial Interface SPI I C T DGC Y ATR 0dB 6dB 12dB 18dB Mute ATP l OdB to 62dB Mute 7 Analog Input L Channel dB to IPG 30dB to 1 Q Aun d 20dB e m 30dB to 12dB PG PGR ee
67. ms z7 Expansion 09B Figure 3 11 ALC Function Menu Tab Auto Level Control Record Options Select Recovery time and Attack time using the respective drop down menu and corresponding gain control for each option to use the automatic level control function ALC compression and expansion characteristics are shown in Figure 3 12 Compression is defined as avoiding degradation of sound quality by saturation when there are strong or excessively large sound data input Expansion means to boost weak or low input data in order to adjust the moderate amplitude level for recording Compression 2dB 6dB 12dB Output Amplitude Expansion OdB 6dB 14dB 24dB Input Amplitude Figure 3 12 ALC Compression and Expansion Characteristics 30 Set Up Guide SBAU127 July 2007 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Source Options 3 2 3 5 Signal Processing Figure 3 13 illustrates the Signal Processing 1 function menu tab Signal Processing 2 Analog Path Audio Interface Status detect Digital Amp Power Up Down Record Playback ALC SignalProcessing1 Source Output Digital input DAC C Digital output ADC Stereo v Tone control Bass Mid Treble Y my Pre gain adjustment for bass boost Step 4 f 3D effect Effect type Narrow Efficiency 0 Notch Filter 1 co at oxoo00 a2 oxo000 Update 1 1 Notch Filter 2 coefficient
68. n and other functions should be set with these parameters Speaker Amp Disabled ADC L channel and ADC R channel Disabled ALC Off Volume 0dB Analog mixing Disabled R 10kQ for the line output R 16Q inserted in the J6 headphone jack for the headphone output The bundled csv file automatically sets the device to these conditions Note The headphone volume should be changed from OdB to 1dB and the signal input level of the Audio Precision analyzer should be changed to 40mW output power when THD N is measured at 16Q See Appendix A Line Output and Headphone Output for a signal flow block diagram 56 Evaluation and Measurements SBAU127 July 2007 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Measurements for Dynamic Characteristics 5 4 2 Analog to Digital A D Performance Measurement path 17 Line Input AINSL AINSR csv file 17 ADC Line Input csv Table 5 3 A D Line Input Parameters Power Supply Parameter Filter Setting Left Channel Right Channel 3 3V THD N 1dB at 1kHz 400Hz 20kHz AES 17 0 009 0 009 SNR BPZ input 22Hz 20kHz SPCL 90 4dB 90 5dB A weighting DR 60dBFS input 22Hz 20kHz AES 17 90 6dB 90 3dB A weighting Channel Separation 22Hz 20kHz AES 17 87 8dB 87 8dB BPZ input for target channel To obtain the performance results shown in Table 5 3 the speaker headphone module should be powered down and other funct
69. ne Output 88 Reference csv Files Interfacing to DSPs and Package Information SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www ti com Reference csv Files mee _ Module of Possible Power Up Down LESEN Signal path p MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE LI Li m LJ Power On Clock Manager 1 l SPOLP SPOLN AZ OdB 6dB 12dB 18dB o ATP AIN3L O A 008 to 62dB Mute SPORP AIN2L G 2I tsporn AIN1L O i Digital 1 Digital a HPOL Filter Filter 4B to LOL 30dB to Digital 12dB ur d ra XR HPOR AINIRG PG2 pHBO AIN2RH AIN3R O FM I HPCOM MONO o o F MONO mice pMieBias COM r o L pp Silent Pop Noise HPOL e Te Vcom O Controller HPOR lt F Li Li L1 Li Li L1 Li Vio Vpp DGND Vp PGND Vc AGND Figure A 15 Mono Diff Mic Input AIN1L AIN1R 20dB to Headphone Output SBAU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information 89 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Reference csv Files mee _ Module of Possible Power Up Down A Signal path s MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE cl Ll L
70. nne nennen nnn nennen 57 5 4 4 Amplitude Versus Frequency Performance eeeeseseeeeeen n n n nennen 59 5 5 Connection Diagram for Practical Applications ceeeeeeeeeeeeennm m 61 5 5 1 Filter Consideration for Speaker OUtDUt 2 cee ee cece ee eee ee ee eee eee e eee IH 62 6 Schematic PCB Layout and Bill of Materials cccccceecececece eee eeeeeeeeeeeseeeeeeeeeees 63 6 1 SIS MUS oaasi e R EEE asta wala x ange motels E 64 6 2 Printed Circuit Board LAyOUt p D 66 6 3 C mponent B PRI a we N ei E EOE EE EE EEEE N 71 A Reference csv Files Interfacing to DSPs and Package Information 73 A 1 Bi2rInugvad c 74 A Related Signal Flow Diagrams soe ERR De en a run esu USE CER NSU EUM mM URN Tu DUE 75 SBAU127 July 2007 Contents 3 Submit Documentation Feedback A 2 Interfacing to DS PS ee LP 98 A 2 1 Register Control with DSP Interface ceeeeee cece cece eee renee eens sees n e mmn nen 99 A 3 Package INOnMatiOn PRONTI a E 99 important gir 100 Contents SBAU127 July 2007 Submit Documentation Feedback List of Figures 1 1 PCM3798A Pin ASSIQNIMGMIS 5 3 ncien ri reel RR ERR RERO e RR RR DIARIA RR RR REP PE DMADUNAM E E ED TEES 14 1 2 PCM3794A Pin Assignments seen tenta rre arra ruunt pu rer R y RR Ra ERR IRE RM nRIRRSXR TEN E cR n a EAE aS 14 1 3
71. op Noise HPOL o i Li Li L1 Li Li L1 Li Vio Vpp DGND Vp PGND Vc AGND Figure A 2 Headphone Output with Sound Effect 76 Reference csv Files Interfacing to DSPs and Package Information SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www ti com Reference csv Files _ Module of Possible Power Up Down EE Signal path p MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE cl L cR L gt Glock Manager l SPOLP i SPOLN 0dB 6dB 12dB 18dB o ATP AINSL c 0dB to 62dB Mu 4 AIN2L C gt ae AINiLG 4200B 21dB ADL w 0DAL SWi Jjje TI 2dB 0 ADL EN DA Y L 30dB to Digital HPOL 12dB Filter W B to LOL 30dB to 12dB ANIRE e a xz B ERB 7 77 7 77770707 pL AIN2R E AINSR CI 1 HPCOM Mic Bias MONO MICB O EA 00 0 0 0000 oo COM 0 rmpi oo Donnan Silent Pop Noise Li Li LI Li Li L1 Li Vio Vpp DGND Vp PGND Vc AGND Figure A 3 Cap Less Headphone Output SBAU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information 77 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Reference csv Files mee _ Module of Possible Power Up Down Is Signal path p MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE LI Li LJ
72. open PARRER OIOOIOIOOlOIOO o N E SCK SCK from U003 DIR LC89052T on Daughter Card 2 T SCLK BCK from U003 DIR LC89052T on Daughter Card 2 T BCK Short plug OJOJOIOJO Short plug e GND T SCK T BCK T LRCK TX DATA R SCLK Short plug gt OlOOOS9 JOIOIOIOIOIg JO OJOJOIO PSIA 2722 R BCK R LRCK RX DATA CN320 OO OO Short plug gt O O Figure 5 6 Jumper Configuration for Combined Master and Slave Modes 5 4 Measurements for Dynamic Characteristics Typical dynamic performance graphs for digital to analog converters DACs generally represent four performance characteristics in addition to other specifications total harmonic distortion and noise THD N signal to noise ratio SNR dynamic range DR and channel separation These graphs also specify the test environment and measurement conditions required in order to meet typical performance values defined in the product data sheet For the DEM DAI3793A 3794A EVM the evaluation environment specifications are Equipment used Audio Precision System Two Cascade Plus e Audio Data format 16 bit Left Justified e SCKI BCK LRCK fs 256fg 64fs 48 kHz Power supply Vpp Vio Vcc Vpa 3 3V Regulated down from 10V applied to the motherboard e Temperature Room ambient Once the lab or test environment is configured according to t
73. orated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All products are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI s standard warranty Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by government requirements testing of all parameters of each product is not necessarily performed TI assumes no liability for applications assistance or customer product design Customers are responsible for their products and applications using Tl components To minimize the risks associated with customer products and applications customers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any TI patent right copyright mask work right or other TI intellectual property right relating to any combination machine or process in which TI product
74. orresponding to Record Function Gain Control for ADC Input Options Move the L ch PG3 and R ch PG4 sliders to adjust the gain of the incoming analog signal inputs to the ADC e The L ch slider manipulates the programmable gain amp PG3 placed in front of the ADC e The R ch slider controls the programmable gain amp PG4 placed in front of the ADC Digital Mute ATR Options Click the respective Digital mute ATR checkboxes if a mute function is needed for the ADC digital output e The mute checkbox enables a digital soft mute on the ADC for each channel e Mute waiting control enables a mute control Digital Out Mute Control Options Select the Digital out mute control drop down menu to enable the mute time control e Apply wait or no wait for the ADC mute SBAU127 July 2007 Set Up Guide 27 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Digital Out Mute Control Options 3 2 3 8 Playback The Playback function is shown in Figure 3 9 Signal Processing 2 Analog Path Audio interface Status detect Digital Amp Power Up Down Record Playback ALC SignalProcessing1 Headphone gain control Ohenne 7 roo dB M Mute on vanene eroon 700 aB P Mule Output configuration Stereo HP COM MONO source select OFF S j Speaker gain control i Zi EPL aa R ch PR I F700 dB Iv Mute Output configuration stereo 9 digital attenuation ATP o J o 8 F Mute R
75. puts OdB 20dB selectable for microphone input OdB to 21dB gain for analog mixing Parameter settings for ALC Three band tone control and 3D sound High pass filter 4Hz 120Hz 240Hz Two stage programmable notch filter Analog mixing control e Pop Noise Reduction Circuit e Short and Thermal Protection Circuit e Package 5mm x 5mm QFN Package e Operating Temperature Range 40 C to 85 C SBAU127 July 2007 Submit Documentation Feedback Introduction PCM3793A 94A Description 13 Pin Assignments and Terminal Functions 1 2 Pin Assignments and Terminal Functions Wy TEXAS INSTRUMENTS www ti com Figure 1 1 and Figure 1 2 show the pin assignments for the PCM3793A 94A Table 1 1 lists the terminal functions AIN2L PCM3793ARHB TOP VIEW HPOL LOL HPOR LOR AINTR AIN1L MODE MS ADR MD SDA MC SCL SPOLP SPOLN PGND Vea SPORP SPORN LRCK Figure 1 1 PCM3793A Pin Assignments HPCOM MONO PCM3794ARHB TOP VIEW I Jo MP vi 23 22 2 AIN2L HPOR LOR AIN1R NC AIN1L MODE MS ADR MD SDA MC SCL LRCK HPCOM MONO Figure 1 2 PCM3794A Pin Assignments Table 1 1 PCM3793A 94A Terminal Functions TERMINAL NAME PCM3793ARHB PCM3794ARHB 1 0 DESCRIPTION AGND 19 19 Ground for analog AIN1L 27 27 Analog input 1 fo
76. r 20dB SIE MONO o o Wy TEXAS INSTRUMENTS www ti com Module of Possible Power Up Down COM o HPOL o HPOR o Li Li L1 Li Li L1 Li Vio Vpp DGND Vp PGND Vc AGND 84 Reference csv Files Interfacing to DSPs and Package Information Figure A 10 Speaker Output with Mono Mic Input AIN1L 20dB SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www ti com Reference csv Files _ Module of Possible Power Up Down Emm Signal path p MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE LI Li LJ Power On Clock i Manager SPOLP SPOLN 0dB 6dB 12dB 18B ATP AIN3L g 1 0dB to 62dB Mute SPORP AIN2L O SPORN AIN1L C 430dB to Digital P HPOU 12dB Filter W l B to LOL 30dB to 12dB rmm nur mmm HPOR AINIR H AIN2R EH md AINSR E FM Og HPCOM Mic Bias MONO o o P MONO MICBO COM o ms HPOL o Voom HPOR o EHDTI L Li Li L1 Li Li L1 Li Vio Vpb DGND Vp PGND Vo AGND Figure A 11 Speaker Output with Mono Diff Mic Input AIN1L AIN1R 20dB SBAU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information 85 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Reference csv Files mee _
77. r PGA Microphone amplifier 20dB and bias e Analog Back End Stereo Mono line output with volume Stereo Mono headphone amplifier with volume and capless mode Stereo Mono digital speaker amplifier BTL with volume e Analog Performance Dynamic range 93dB digital to audio converter DAC Dynamic range 90dB analog to digital converter ADC 40mW 40mW headphone output at R 16Q 700mW 700mW speaker output at R 8Q e Power Supply Voltage 1 71V to 3 6V for digital I O section 1 71V to 3 6V for digital core section 2 4V to 3 6V for analog section 2 4V to 3 6V for power amplifier section Low Power Dissipation 7mW in playback 1 8V 2 4V 48kHz 13mW in record 1 8V 2 4V 48kHz 3 3yW in power down e Sampling Frequency 5kHz to 50kHz Automatic Level Control for Recording e Operation From a Single Clock Input without PLL e System Clock Common audio clock 256f5 384fs 12MHz 24MHz 13MHz 26MHz 13 5MHz 27MHz 19 2MHz 38 4MHz 19 68MHz 39 36MHz e Headphone Plug Insert Detection e C7M or SPI Serial Control Description SBAU127 July 2007 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com e Programmable Function by Register Control Digital attenuation of DAC OdB to 62dB Digital gain of DAC OdB 6dB 12dB 18dB Power up down control for each module 6dB to 70dB gain for analog outputs 30dB to 12dB gain for analog in
78. r L channel AIN1R 26 26 l Analog input 1 for R channel AIN2L 25 25 Analog input 2 for L channel AIN2R 24 24 Analog input 2 for R channel AIN3L 23 23 l Analog input 3 for L channel AIN3R 22 22 Analog input 3 for R channel BCK 1 1 l O Serial bit clock DGND 6 6 Digital ground DIN 2 2 Serial audio data input DOUT 3 3 O Serial audio data output HDTI 8 8 l Headphone plug insertion detection HPCOM MONO 9 9 O Headphone common mono line output HPOL LOL 17 17 O Headphone lineout for R channel HPOR LOR 16 16 O Headphone lineout for L channel LRCK 32 32 l O Left and right channel clock MC SCL 31 31 Mode control clock for three wire two wire interface MD SDA 30 30 l O Mode control data for three wire two wire interface MICB 21 21 O Microphone bias source output MODE 28 28 l Two or three wire interface selection low SPI high C MS ADR 29 29 Mode control select for three wire two wire interface PGND 13 13 Ground for speaker power amplifier 14 Description SBAU127 July 2007 Submit Documentation Feedback INSTRUMENTS www ti com DEM DAI3793A 3794A EVM Description Table 1 1 PCM3793A 94A Terminal Functions continued TERMINAL NAME PCM3793ARHB PCM3794ARHB yo DESCRIPTION SCKI 7 7 System clock SPOLN 14 O Speaker output L channel for negative PCM3793A only SPOLP 15 O Speaker output L channel for positive PCM3793A only SPORN 10 O Speaker output R chann
79. re provided for interfacing to audio test systems and commercial audio equipment Topic Page 1I a introduction P CM3793A 94A 12 1 2 Pin Assignments and Terminal Functions 14 1 3 DEM DAI3793A 3794A EVM Description eeeesesese 15 SBAU127 July 2007 Description 11 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Introduction PCM3793A 94A 1 1 Introduction PCM3793A 94A The PCM3793A 94A is a low power stereo codec designed for portable digital audio applications The device integrates a stereo digital speaker amplifier headphone amplifier line amplifier line input boost amplifier microphone bias programmable gain control analog mixing sound effects and automatic level control ALC features The PCM3794A has no speaker amplifiers It is available in a 5 x 5 QFN package to reduce the overall device footprint The PCM3793A 94A accepts Right Justified Left Justified I2S and digital signal processing DSP formats providing an easy interface to audio DSPs as well as decoders and encoder chips Sampling rates up to 50kHz are supported The user programmable functions are accessible through a two or three wire serial control port Key Features Major features of the PCM3793A 94A include e Analog Front End Stereo single ended input with multiplexer mux Mono differential input Stereo programmable gain amplifie
80. receive clocks LC89052T cannot work in slave mode Therefore any analog output from the DAC is invalid because there is no data input However in this configuration users can confirm master mode operation of both LRCK and BCK from PCM3793A with a digital oscilloscope Users can easily identify master mode without the use of other external equipment such as the PSIA 2722 analyzer The PCM3793A has no integrated internal PLL However the clock manager function can provide LRCK fs and BCK in master mode as described in Figure 5 3 U302 Manager CN302 S E Q S 3 S o 7 3 i g O U301 O E DIT DIT4096 CN301 E i PCM3793A Daughter card 2 Daughter card 1 Isolated by CN305 Figure 5 3 Master Mode Configuration With SYS 2722 Refer to the jumper combination shown in Figure 5 4 to put the DEM DAI3793A 3794A EVM motherboard into master mode configuration Evaluation and Measurements SBAU127 July 2007 Submit Documentation Feedback R Texas INSTRUMENTS www ti com Master Mode with Audio Precision SYS 2722 o z e eo a T SCLK T BCK T LRCK TX DATA E SCLK R SCLK R BCK R LRCK RX DATA Short plug RR OJOIO OJOJOIOJOJO E SCK SCK from U003 DIR LC89052T on Daughter Card 2 T SCLK BCK from U003 DIR LC89052T on Dau
81. rs for products and therefore our arrangement with the user is not exclusive TI assumes no liability for applications assistance customer product design software performance or infringement of patents or services described herein Please read the User s Guide and specifically the Warnings and Restrictions notice in the User s Guide prior to handling the product This notice contains important safety information about temperatures and voltages For additional information on Tl s environmental and or safety programs please contact the TI application engineer or visit www ti com esh No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine process or combination in which such TI products or services might be or are used FCC Warning This evaluation board kit is intended for use for ENGINEERING DEVELOPMENT DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer use It generates uses and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules which are designed to provide reasonable protection against radio frequency interference Operation of this equipment in other environments may cause interference with radio communications in which case the user at his own expense will be required to take whatever measures may be r
82. s or services are used Information published by TI regarding third party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Reproduction of this information with alteration is an unfair and deceptive business practice TI is not responsible or liable for such altered documentation Information of third parties may be subject to additional restrictions Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyers repres
83. s the Record function tab options Signal Processing 2 Analog Path Audio interface Status detect Digital Amp Power Up Down f J Playback ALC Signal Processing 1 Gain control for ADC input Digital mute ATR Que o H fz qe bh gR h po 12 qg V Digital out mute control wait 10 ms at 48 kHz Figure 3 7 Record Function Menu Tab 26 Set Up Guide SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www ti com Gain Control for ADC Input Options Figure 3 8 shows the EVM modules that correspond to the record function _ Module of Possible Power Up Down L MD MC MS SCKI DOUT BCK LRCK DIN SDA SCL ADR MODE LJ L L Li ised Reset Up Down Audio Interface Serial Interface SPI I C DGC Y AA OdB 6dB 12dB 18dB P ATP AIN3L E t A 0dB to 62dB Mu AIN2L EH Analog Input L Channel AIN1L O dB To T r G I Digital Digital Filter Filter Digital Digital Filter Filter AIN1RCU i AIN2R O 1Analog Input R Channel AIN3R E dB to ic Biab 420dB 21dB MONO o o MICBO COM o l Silent Pop Noise HPOL e Vcom L H Controller HPOR o Li Li L1 Li Li L1 Li Vio Vpp DGND Vp PGND Vo AGND Figure 3 8 EVM Modules C
84. select any of these options e PLL SCK Selects the system clock rate for the PCM3793A e XIN SCK or E SCK Selects the crystal oscillator frequency on Daughter Card 2 e CKOUT Div Selects the dividing rate for CKOUT The serial audio data format is controlled by the other part of the drop down menu see Figure 3 23 Select the data format for the DAC interface of the PCM3793A it should match with the DAC setting on the Audio Interface tab SBAU127 July 2007 Set Up Guide 39 Submit Documentation Feedback 9 TEXAS INSTRUMENTS www ti com Speaker Short Detection L Ch Speaker Short Detection R Ch 3 2 5 Register Setting History When any checkboxes are selected on any tab of the software GUI including power up down operation corresponding resistor address and so forth the register value is automatically written into the register setting history panel These parameters can then be saved allowing users to identify a particular sequence setting that was sent to the device under test Any operating sequence settings can be saved as a comma separated value csv file with an identifiable name This archive feature is useful when the same sequence settings are required for continued testing The list of available csv files refreshes and displays when the Clear button is clicked Figure 3 24 shows the Register Setting History display window Register setting history 0x52 0x3C 0x49 OxEF 0x49 OxEE 0x49 OxEC 0x52 0x34 0x
85. sible Power Up Down A Signal path s MD MC MS SCKI SDA SCL ADR MODE C L DOUT BCK LRCK DIN m Power On Power Clock Reset Up Down Manaae Manager Togo d SPOLP Y SPOLN Y 0dB 6dB 12dB 18dB Rot ATP SPR AIN3L O A 008 to 62dB Mu SPORE AIN2L 7 2 hsponN AIN1L T i G3 py I gt HPOL I Digital 1 1 Filter Swi 1 7 LOL i 60B to L 1ADR P i Digital I I AINTRO CMS zu LS D dade AIN2R Q p 1Analog Input R Channel AINSR E 3 OdB to HPCOM mE 21dB MONO o o P MONO MICBO COM o ms Silent Pop Noise HPOL e a Vcom O Controller HPOR e B Li Li L1 Li U L1 Li Vio Vbo DGND Vp PGND Vec AGND Figure A 19 Mic Input AIN1L AIN1R 20dB with ALC SBAU127 July 2007 Reference csv Files Interfacing to DSPs and Package Information 93 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Reference csv Files mee _ Module of Possible Power Up Down A Signal path s MD MC MS SCKI SDA SCL ADR MODE C L DOUT BCK LRCK DIN m Power On Power Clock Reset Up Down Mana ger Manager 3 d Scart Y 0dB 6dB 12dB 18dB Rot ATP SPR AIN3L C E A 008 to 62dB Mu IN
86. sted in the sections of this guide entitled Related Documentation from Texas Instruments and Additional Documentation How to Use This Manual Throughout this document the abbreviation EVM and the term evaluation module are synonymous with the DEM DAI3793A 3794A EVM The abbreviation PCM3793A 94A refers to the PCM3793A 94A family of devices Unless specifically noted the information presented in this manual applies to both the PCM3793A and the PCM3794A Chapter 1 gives an overview of the PCM3793A 94A family of stereo audio coder decoder devices codecs The PCM3793A 94A block diagram and primary features are also discussed Chapter 2 provides general information regarding EVM handling and unpacking absolute operating conditions and the default switch and jumper configuration This chapter also discusses the EVM controller software Chapter 3 is the hardware setup guide for the EVM providing all of the necessary information needed to configure the EVM switches and jumpers for product evaluation Chapter 4 reviews the DEM DAI3793A 3794A EVM switch and jumper configuration Chapter 5 discusses how to set up jumpers on the DEM DAI3793A 3794A EVM motherboard for performance evaluation using an audio analyzer It also presents the process for measuring dynamic characteristics and provides example characteristic data Chapter 6 includes the EVM electrical schematics printed circuit board PCB layout and the bill of materials Infor
87. t setting is shown in Figure 3 5 and the ramp down waveform in Figure 3 6 as references Table 3 2 PCM3793A 94A Resistor 125 7dh RES 4 0 Resistor Value Control RES 4 0 Vcom Resistor Value 10000 60 kQ 11000 24 KQ 11100 12 KQ 11110 6 kQ Others Reserved Table 3 3 PCM3793A 94A Resistor 125 7dh PMT 1 0 Power Up Down Time Control and Register Direct Access Vcom Capacitor Power Up Time Power Down Time Register Direct UF RES 4 0 PTM 1 0 ms ms Access 10 11110 00 450 750 Ox7D1E 11100 11 900 1500 0x7D7C 11000 Do not set 10000 Do not set 4 7 11110 01 250 400 0x7D3E 11100 00 450 750 0x7D1C default 11000 11 900 1500 0x7D78 10000 Do not set 2 2 11110 10 100 300 0x7D5E 11100 01 250 400 Ox7D3C 11000 00 450 750 0x7D18 10000 11 900 1500 0x7D70 1 0 11110 Do not set 11100 10 100 300 Ox7D5C 11000 01 250 400 0x7D38 10000 00 450 750 0x7D10 SBAU127 July 2007 Set Up Guide 25 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Power Up Down Time ms Options z x LJ uU Vcom OO lt Vcom N Headphone Output Headphone Output B B Nea IRITE EE WP sov 9 o ae o com oS F ES E ri Figure 3 5 Ramp Up Wave Form with Default Figure 3 6 Ramp Down Wave Form with Setting Default Setting 3 2 3 2 Record Figure 3 7 show
88. tal Amplifier Figure 3 22 shows the Digital Amplifier function Power Up Down Record Playback ALC Signal Proce sing1 Use Spectrum Spreading Spectrum Spreading control Low Switching frequency 1 5MHz Figure 3 22 Digital Amplifier Function Menu Tab Setting the operating speed of the Class D speaker amplifier depends on the performance requirements click the checkbox to enable this function Spectrum Spreading control with Low Mid or High options and the Switching frequency 1 5MHz to 3MHz can be selected here Using this feature will help reduce EMI noise As the spectrum spreading control moves to high the effect will be remarkable Note however that the signal to noise ratio SNR performance of the speaker output is affected by this function 3 2 4 LC89052T DIR Digital Audio I F Receiver Control Window Figure 3 23 illustrates the LC89052 Interface format choices o E V M Contr o ller File Setting Help Interf gt falus ohn n 7 1 Controlie XINSCK gt Power UpIDOW CK out piv playback wu Signal Processi x Andin interface State e Left Justified IS Right Justified Use Spectrum Spreading Figure 3 23 LC89052 Interface Format Selection Options 3 2 4 1 Audio Clock Data Control Options There are several options available for the audio clock and data control features in the DEM DAI3793A 3794A EVM software For the system audio clock control users can
89. tiOn aano retour exl rmi eme no arem i e aras enam E raE e AED C a 58 5 8 A D Amplitude vs Frequency Result BPZ Zero Data Input eeesseeeeeenn HH 59 5 9 A D Amplitude vs Frequency Result 60dB Input seeeesseeeeeen HH Hn 59 5 10 A D Amplitude vs Frequency Result 1dB Input ccc eeee eee eee ee cece ee eeee HH nnn 59 5 11 D A Amplitude vs Frequency Result BPZ Zero Data INDUt cece eceee eee eee eee e neces HH 60 5 12 D A Amplitude vs Frequency Result 60d0B INDUt 0c cece eee e eee ee ee ee eeee eens mH HI Hm 60 5 13 D A Amplitude vs Frequency Result OdB INput cece cece eee e eee eeeeee ee eeee eee IH HI Hm 60 5 14 D A Amplitude vs Frequency Result Wide Range to 130kHz BPZ Zero Data Input 60 5 15 Basic Connection DIAagralm s oueses ome mo peR RA ROS a a aE aE AE NM EA RARE RRORKR MERE NUE 61 5 16 Recommended Ferrite Bead Filter for Speaker Output sseesseeeeeeenne III eaeeeeeeee 62 5 17 Connection for Headphone Output and Insertion Detection 0 ccceeeeeee eee eee eee eee eee seen m 62 6 1 PCM3793A DEM PCM3793RHB A Connector Daughter Card 1 sees 64 SBAU127 July 2007 List of Figures 5 Submit Documentation Feedback 6 6 2 PCM3793A DEM PCM3793RHB A Daughter Card 1 cceceeee eee eee ence eee ee ence tees eeeeeeeeeeeeeeeeeeeeeeeees 65 6 3 PCM3793A DEM PCM3793RHB A Board Layout Silkscreen Side
90. tion is complete the EVM software is ready to use 3 2 Software Control and Operation This section of the user s guide reviews the operation and configuration of the EVM controller software 3 2 1 User Interface Panel After finishing the installation process as explained in Section 3 1 the user interface panel shown in Figure 3 1 appears 5 EVM Controller z ai x File Setting Help PCM3793A EVM Controller Signal Processing 2 Analog Path Audio Interface Status detect Digital Amp PowerUpiDown Record Playback ALC SignalProcessing1 Register setting history Power up down for each module Analog bias M HPCOM MONO HPC DAC L ch DAL HPiLine out L ch HPL DAC R ch DAR I HP Line out R ch HPR Mixer L ch MXL Speaker out L ch SPL Mixer R ch MXR Speaker out R ch SPR ADC L ch ADL Diffamp 02S ADC R ch ADR Mic Bias MCB Gain AMP L ch PG1 PG5 r iveom Gain AMP R ch PG2 PO6 Power UP DOWN time ms zi Vcom capacitor c C 450 750 ev eas A m eaaa Register direct access Power on off sequence Address Data CHECK THE STATUS INDICATOR Figure 3 1 User Interface Window 22 Set Up Guide SBAU127 July 2007 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Software Control and Operation Check to see that a Ready notation appears in the lower left hand corner after successful 1 C communication is established Otherwise
91. uly 2007 Getting Started 17 Submit Documentation Feedback 3 TEXAS INSTRUMENTS www ti com Electrostatic Discharge Warning 2 1 2 2 18 Electrostatic Discharge Warning Many of the components on the DEM DAI3793A 3794A EVM are susceptible to damage by electrostatic discharge ESD Customers are advised to observe proper ESD handling precautions when unpacking and handling the EVM including the use of a grounded wrist strap at an approved ESD workstation CAUTION Failure to observe ESD handling procedures may result in damage to EVM components Unpacking the EVM Upon opening the DEM DAI3793A 3794A EVM package please check to make sure that the following items are included e One DEM DAI LPC USB Motherboard e One DEM PCM3793RHB A Daughter Card 1 e One DEM TRCV LPC Daughter Card 2 If any of these items are missing please contact the Texas Instruments Product Information Center nearest you to inquire about a replacement Getting Started SBAU127 July 2007 Submit Documentation Feedback Wy TEXAS INSTRUMENTS www ti com Default Configuration 2 3 Default Configuration Figure 2 1 and Figure 2 2 illustrate the default EVM configuration and the default external equipment connection configuration respectively Confirm shorted jumpers CN102 CN101 9o SW201 CN201 to use onboa CN103B CMS oscillator Set OPT or COAX for fitting cable connection Daughter car
92. us HP COM short detection v Status HP short detection L ch v Status HP short detection R ch jv Status Speakerthermal protection L ch Thermal protection recovery Hold v Status Speakerthermal protection R ch Thermal protection recovery Hold v F Status Status read E Figure 3 21 Status Detect Function Menu Tab HP Detection Options Use this section of the menu to enable or disable the HP insertion detection process You can also the HDTI pin logical polarity using the drop down list box HP COM Short Detection Options This section of the menu allows you to enable or disable HP COM port short detection When short detection recovery is set to Release the status bit will automatically reset to O HP Short Detection L Ch HP Detection R Ch These sections of the menu enable or disable HP short detection for the left channel and right channel respectively When short detection recovery is set to Release the status bit will automatically reset to 0 Speaker Short Detection L Ch Speaker Short Detection R Ch These menu sections enable or disable speaker short detection for the left channel and right channel respectively When short detection recovery is set to Release the status bit will automatically reset to 0 38 Set Up Guide SBAU127 July 2007 Submit Documentation Feedback 9 TEXAS INSTRUMENTS www ti com Speaker Short Detection L Ch Speaker Short Detection R Ch 3 2 3 10 Digi
93. ut Digital Input 12 Line Input AIN2L AIN2R to Headphone Output 12 Line Input to Headphone Output csv 13 Mono Line Input AIN2L to Headphone Output 13 Mono Line Input to Headphone Output csv 14 Mono Mic Input AIN1L 20dB to Headphone Output 14 Mono Mic Input to Headphone Output csv 15 Mono Diff Mic Input AIN1L AIN1R 20dB to 15 Mono Diff Mic Input to Headphone Output csv Headphone Output 16 Mono Mic Input AIN1L 20dB to Speaker Output 16 Mono Mic Input to Speaker Output csv Recording 17 Line Input AINSL AINSR 17 ADC Line Input csv 18 Mic Input AIN1L AIN1R 20dB 18 ADC Mic Input csv 19 Mic Input AIN1L AIN1R 20dB with ALC 19 ADC Mic Input with ALC csv 20 Mono Mic Input AIN1L 20dB 20 ADC Mono Mic Input csv 21 Mono Mic Input AIN1L 20dB with ALC 21 ADC Mono Mic Input with ALC csv 22 Mono Diff Mic Input AIN1L AIN1R 20dB 22 ADC Mono Diff Mic Input csv 23 Mono Diff Mic Input AIN1L AIN1R 20dB with ALC 23 ADC Mono Diff Mic Input with ALC csv 74 Reference csv Files Interfacing to DSPs and Package Information SBAU127 July 2007 Submit Documentation Feedback ki TEXAS INSTRUMENTS www ti com Reference csv Files A Related Signal Flow Diagrams 1 Module of Possible Power Up Down pm Signal path Laa MD MC MS SCKI DOUTBCKLRCK DIN SDA SCL ADR MODE LI Li L L LJ L L Li
94. you will see an error box showing a communication error as shown in Figure 3 2 EVM control application x Communication error RDERR0003 Figure 3 2 Communication Error Message If you received this message confirm the set up procedures and restart the software Shut it down and then execute EVM3793A exe There are four primary sections of the user interface panel see Figure 3 1 e Module controller for functions such as playback signal processing audio format and so forth e Power on off sequence controller e Register setting history controller e Register direct access controller 3 2 2 Power On Off Sequence By default each module is set without any of the checkboxes toggled in the Power Up Down menu All modules are set to a power down condition Click A Power On the red box as shown in Figure 3 3 to easily start EVM operation instead of powering up the module manually Press for Power on off sequence osei leu Figure 3 3 Power On Off Sequence Function Buttons Note If pressing the Power On Off sequence button has no effect check to see that the two files power on csv and power off csv are located in the same folder on the PC as the EVM software EVM3793A exe 3 2 38 Module Function Controls The DEM DAI3793A 3794A EVM controller software contains 10 tabs Power Up Down to power up and power down each module e Record executes gain control for ADC input e Playback executes headphon

Texas Instruments DEM-DAI3793A User's Manual

Contents

Download Pdf Manuals

Related Search

Related Contents