Silicon Laboratories C8051T620/2-DK User's Manual
Contents
1. C8051T620 2 DK SILICON LABS C8051T620 2 DEVELOPMENT KIT USER S GUIDE 1 Kit Contents The C8051T620 and C8051T622 Development Kits contain the following items m QC8051T62x Motherboard m C8051T62x Emulation Daughter Board with C8051F34A installed m Socket Daughter Board one of the following e C8051T62x QFN 32 pin C8051T620DK e C8051T622 QFN 24 pin C8051T622DK m Twenty device samples one of the following e C8051T620 GM C8051T620DK e C8051T622 GM C8051T622DK m C8051Txxx Development Kit Quick Start Guide m Product information CD ROM includes e Silicon Laboratories Integrated Development Environment IDE e Evaluation version of 8051 development tools macro assembler linker C compiler e SOUrce code examples and register definition files e Documentation m AC to DC universal power adapter m Two USB cables 2 About the Daughter Boards The C8051T620 and C8051T622 Development Kits include an Emulation Daughter Board EDB and a QFN Socket Daughter Board QFN DB The EDB has an installed C8051F34A device which is a Flash based device that can be used for the majority of C8051T62x 32x code development The QFN DB is intended to allow both programming and system level debugging of C8051T62x 32x devices directly A C8051T62x 32x device cannot be erased once it has been programmed so it is advisable to use the C8051F34A for the majority of code development Refer to AN368 Differences between the C8051F34A and the C8051T2. 400 West Cesar Chavez Austin TX 78701 Tel 1 512 416 8500 Fax 1 512 416 9669 Toll Free 1 877 444 3032 Please visit the Silicon Labs Technical Support web page https www silabs com support pages contacttechnicalsupport aspx and register to submit a technical support request The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice Silicon Laboratories assumes no responsibility for errors and omissions and disclaims responsibility for any consequences resulting from the use of information included herein Additionally Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters Silicon Laboratories reserves the right to make changes without further notice Silicon Laboratories makes no warranty rep resentation or guarantee regarding the suitability of its products for any particular purpose nor does Silicon Laboratories assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation conse quential or incidental damages Silicon Laboratories products are not designed intended or authorized for use in applications intended to support or sustain life or for any other application in which the failure of the Silicon Laboratories product could create a situation where per sonal injury or death may occu
3. C8051T620 2 DK LED1 mm O LED2 ma SW SILICON LABS www silabs com P0 1 P1 2 0 P0 6 SW1LED2 0 O LEDI P2 0 P2 3 e P2 2 J10 ee J15 VPPH PWR ES 3VD VDD PWR VDD EXT 6 VDD PWR VDD DEBUG 9 6 VDD PWR VDD COMM 9 VDD PWR D108 D11H Di2i RUN STOP DEBUG e PWR ee 1 e CTS_DEBUG J12 P1 2 ee k 2 CTS_COMM P5 TX_DEBUG P0 5 TX COMM R8 LED1 m 3 LED2ER sw SILICON LABS www silabs com P0 1 P1 2 P0 6 SW1 LED2 HO LED1 ee P2 2 J10 p 15 VPP 3VD VDD_PWR VDD EXT VDD_PWR VDD_DEBUG VDD_PWR VDD_COMM VDD_PWR D10B D11B D120 RUN STOP DEBUG PWR eco U1 T e e F326 CTS_DEBUG J1 2 J1 3 P1 2 CTS_COMM CJ P5 TX DEBUG P0 5 TX COMM R8 Figure 4 C8051T62x Motherboard Default Shorting Block Positions SILICON LABS Rev 0 4 9 C8051T620 2 DK C8051 162x EDB SILICON LABS www silabs com VBUS VREGIN VDD VREGIN Figure 5 C8051T62x Emulation Daughter Board ES C8051T62
4. 8051 evaluation toolset Virtual COM Port drivers for the CP210x USB to UART Bridge and additional documentation Insert the CD ROM into your PC s CD ROM drive An installer will automatically launch allowing you to install the IDE software or read documentation by clicking buttons on the installation panel If the installer does not automatically start when you insert the CD ROM run autorun exe which is found in the root directory of the CD ROM Refer to the ReleaseNotes txt file on the CD ROM for the latest information regarding the CD contents 4 1 System Requirements The following are the system requirements necessary to run the debug and programming tools m Pentium class host PC running Microsoft Windows 2000 or newer One available USB port 4 2 Development Tools Installation To install the IDE utilities and code examples perform the following steps 1 Click on the Install Development Tools button on the installation utility s startup screen 2 In the Kit Selection box that appears choose the C8051 T620 DK or C8051T622 DK development kit from the list of options 3 In the next screen choose Components to be Installed The programs necessary to download and debug on the MCU are the Silicon Labs IDE and the 8051 Evaluation Toolset The CP210x Drivers are necessary to use the UART capabilities of the target board See 4 3 CP210x USB to UART VCP Driver Installation for more information about installing the CP210
5. tc SILICON LABS C8051T620 2 DK oneuieuos pJeog 191YBNEO pZ NAD 22915089 81 n Idi zr aaa OIA 9LHV4a osOdS 30010 NY NZ XZ La JIMOd amp 69 zdl b Ts sngA ir O O NI93HA qqA 8 3dA1 NNOO 8Sn d azo 0 zd A9Z9 1SY LHS vcNJO ZZ9LISOBO LA l dZL 64Q0 NNOO td ZIVIX C Od LIWLX Z 0d At dZl 640 NNOO ld 0 0 vH O C NI933A OIA dOd ON La OIA y o gt tc 22 SILICON LABS C8051T620 2 DK oneuieuos pJeog 1e1uDneq z dJO OSELLGOSO 61 amb 9LHVILOSOAS 30010 NY NO XZ iq Q N 9 S NI DE E zai ERE fupe ae YA E L sngA SNA L 8 3dAL NNOO 8Sn Q NI93YA qqA d LA NIDIYJA Al dZlL 640 NNOO Cd lid O ld 334A L Od TIVIX 0d LIVIX Z Od At dZt 640 NNOO ld dOd ON L i ad 23 K o gt tc SILICON LABS C8051T620 2 DK AlL dZL 64 0 NNOO ld oneuieuos pieog 1e1uDneq 82 N3O LZELLSO089 oe amb 9L1HV8 0SsOds 3Q0lq NU SZ s lt a Wi I aNd v 0 Ea 0 q ISA SA za e bA SER es A T c6 L sngA sngA L Ir O O 8 3dAL NNOO gsn NIDIYA QdA d JIMOd in 333A L Od TIVIX Od LIWVIX Z Od DL 90d S Od v Od Alt dZt 640 NNOO Cd adA O EEN dOd ON So dOd ON L i K o gt tc 24 SILICON LABS C8051T620 2 DK oneuieuos pieog 19 46ned 92 NdO 9ZELLSOSO Lz aniy Ldl L Tr aga OIA S1Hv8 osod
6. Od9A dV ZIZIENI LYA 0 Zd ted gt T YA Std vid gt T s DR I mE Fadil gt G yi Ltd 9 S Zd ASU id od AG Q val S ld i Ltd as lt C ita ano t anvo 5 eg asx uu ou yi 1VGZI L 0d m NOIK 11929 lt O ld zi a Sida S 0d CL a E O 0 0d gt al 11929 WW ES 02917 GOA Sr 10d Z0d gt A AL SZL 64 NNOOD AL S 41 6 J0 NNOO td td ddA 3no GK glo Ano JLX A INVI 1186 6GZSWA Sa ANY NI 1no NI 7l026038N CO E E L 6ZMI qA en anlO YLX Kb YMd GGA Cd 4NL0 0 LX 220 93YNNA i 19 bi o gt o tc SILICON LABS C8051T620 2 DK oneuieuos peog 191yBneg uoneinuu3 X29116082 91 eunbi4 91HV8 060dS 3Q0lQ iq N SZ SZ 9 S CA N YIMOd Es Fono 28 praedio 29 QO val SEI SNan 8 3dA1 NNOO 8Sn NIDIYA Ga d y e gt WA Qc 0 Zd Ld Sd VPCILSOSO Sila Yid en ld CL AL d 1 630 NNO2 ED Zd dOd on dOd ON So dOd ON S n e dda N SILICON LABS C8051T620 2 DK 9neuieuos pueog 1e1uDneq ze NdO 0291165089 4L e1nDiJ 91HV8 0S0dS 3Q0lQq v v La MM 9 Ig ONS 48d zita ES 1 3 zar Age lena YA m L SNAJA SNEA L 8 3dA1 NNOO Sen Q Q NIDINA daa d Idi er QdA OIA JIMOd Li ee LYS ZENJO OZ9LLSO8D NI933A OIA AL dZl 640 NNOO td TIVIX Od LIVIX Z 0d dOd ON So Al dZl 640 NNOO dOd ON ld dOd ON ly O OIA 21 K o gt
7. of the device Table 3 J1 Terminal Block Descriptions Description VREGIN VIO GND P2 5 Analog Input PO 7 VREF routed to header J14 VDD EXT routed to header J6 7 9 VPP Connection J15 The C8051T62x 32x devices require an external 6 0 V programming voltage applied to the VPP pin during device programming The VPP pin on these devices is shared with P1 5 or P1 1 depending on the device During programming the VPP voltage is automatically enabled when needed Header J15 is provided to allow the user to disconnect the programming circuitry from the VPP pin to avoid interfering with the normal application operation of the GPIO pin When programming the device J15 should be shorted with a shorting block When running normal application code J15 can be removed See Table 4 for more information on which port pins are shared with VPP Table 4 VPP Pin Sharing Device Pin Shared with VPP C8051T620 C8051T621 C8051T320 C8051T321 C80511322 C8051T323 C8051T622 C8051T623 C8051T326 C8051T327 16 Rev 0 4 SILICON LABS C8051T620 2 DK 7 10 Using Alternate Supplies with the C8051T62x Development Kit For most evaluation purposes the onboard 3 3 V supply regulator is sufficient to be used as a VDD power supply However in applications where a different supply voltage is desired e g 1 8 V an external supply voltage can be applied to the board at the analog connector J1 Some dev
8. regulator P3 and its associated circuitry or an external voltage applied to the VDD EXT connection on J1 To select a power supply place a shorting block on J6 across the appropriate pin pair as shown in Figure 12 To connect the main power supply to an attached daughter board place a shorting block across J7 Notes 1 Only one shorting block should be placed on J6 at a time 2 To use the CP2103 s voltage regulator as the board s power supply a USB cable must be connected to P4 and the USB ACTIVE LED D2 must be on 3 To use the USB Debug Adapter s voltage regulator as the board s power supply a USB cable must be connected to P5 and the DEBUG PWR LED D12 must be on D4 J7 J7 J7 J7 VDD Te20 LL vDD PWR VDD Te20 vDD PWR VDD Te20 vDD_PWR VDD Te20 vDD PWR J6 J6 J6 J6 3VD 3VD 3VD FH 3VD e e VDD EXT VDD EXT VDD EXT VDD EXT VDD D BUG VDD PWR yop DEBUG VDD PWR yop DEBUG VDD_PWR vbp DEBUG NOU VDD COMM VDD COMM VDD COMM 6 6 VDD COMM 3 3V Regulator Power CP2103 Regulator Power Debug Circuit Power External Power Source From P3 From USB at P4 From USB at P5 From J1 Connector Figure 12 J6 and J7 Shorting Block Configuration for Power Options 14 Rev 0 4 SILICON LABS C8051T620 2 DK 7 4 USB Debug Adapter DEBUG P5 A Universal Serial Bus USB connector P5 provides the onboard debug and programming interface The debug programming MCU and associated circuitr
9. 14 J15 Daughter board connection Power connector that accepts input from 7 5 to 15 V dc unregulated power adapter USB connector for UART to USB communications interface USB Debug interface connector Analog I O terminal block Port 0 header Port 1 header Port 2 header Port 3 header with access to VDD and GND Power supply selection header See 7 3 Power Supply Headers J6 and J7 on page 14 Power supply enable header that connects power source selected on J6 to the board s main power supply net Communications interface control signal header Connects port pins to the switches labeled SW1 and SW2 Connects port pins to the LEDs labeled LED1 and LED2 Communications interface data signal header Connects potentiometer to the port pin P2 5 Additional connections to ground Connects an external VREF from J1 to P0 7 VPP supply connection used when programming EPROM devices Rev 0 4 SILICON LABS C8051 162x MB CP2103 U2 USB ACTIVE SW1 P1 0 J8 RTS_DEBUG e e P1 1 RTS COMM 0 e C8051T62x MB P1 J11 RX DEBUG e P04 RX COMM SW1 P1 0 SW2 Ji 4 P2 1 U2 USB ACTIVE CP2103 RTS DEBUG P1 1 RTS COMM RX DEBUG 0 UU J8 J11 SW2 00 J14 P2 1 J
10. 3 USB To UART bridge or the USB Debug Adapter The motherboard also allows the C8051T62x 32x s P1 1 and P1 2 to be used as the UART control signals CTS and RTS These two signals are routed to J8 where they can be connected to either the CP2103 or the USB Debug Adapter The jumper options for using either the CP2103 or the Debug Adapter circuit for UART communications can be found in Figure 13 J8 J8 RTS_DEBUG CTS_DEBUG RTS_DEBUG RTS_DEBUG P1 1 P1 2 P1 1 P1 2 RTS COMM CTS COMM RTS COMM CTS COMM J11 J11 RX DEBUG CTS DEBUG RX DEBUG TX DEBUG P0 4 P0 5 P0 4 P0 5 RX_COMM CTS_COMM RX_COMM TX_COMM CP2103 Bridge Debug Adapter Comms USB Connection at P4 USB Connection at P5 Figure 13 Shorting Block Configuration for UART Communication Options 7 7 PORT I O Connectors J2 J3 J4 and J5 Each of the C8051T62x 32x s I O pins as well as 3VD and GND are routed to headers J2 through J5 J2 connects to the microcontroller s Port 0 pins J3 connects to Port 1 J4 connects to Port 2 and J5 connects to Port 3 Rev 0 4 15 SILICON LABS C8051T620 2 DK 7 8 Analog I O J1 and J14 Three of the C8051T62x 32x target device s port pins are connected to the J1 terminal block The terminal block also allows users to input an external voltage that can be used as the power supply of the board Refer to Table 3 for the J1 terminal block connections Placing a shorting block on J14 will connect the PO 7 VREF signal on J1 to the P0 7 pin
11. 62x and C8051T32x Device Families for more details on how the C8051F34A can be used to develop code for the C8051T62x 32x device families Rev 0 4 12 10 Copyright O 2010 by Silicon Laboratories C8051T620 2 DK C8051T620 2 DK 3 Hardware Setup See Figure 1 for a diagram of the hardware configuration 1 Attach the desired daughter board to the motherboard at connectors P1 and P2 2 3 4 Cable 5 Notes If using the QFN Socket Daughter Board place the device to be programmed into the socket Place shorting blocks on J7 and the 3VD VDD_PWR jumper pair on J6 as shown in Figure 1 Connect the motherboard s P5 USB connector to a PC running the Silicon Laboratories IDE using the USB Connect the ac to dc power adapter to connector P3 on the motherboard 1 Use the Reset icon in the IDE to reset the target when connected during a debug session 2 Remove power from the motherboard and remove the USB cable before removing a daughter board from the motherboard Connecting or disconnecting a daughter board when the power adapter or USB cable are connected can damage the motherboard the daughter board or the socketed device Remove power from the motherboard and remove the USB cable before removing a C8051T62x 32x device from the socket Inserting or removing a device from the socket when the power adapter or USB cable are connected can damage the motherboard the daughter board or the socketed device The above hardware setu
12. e project when finished with the debug session to preserve the current target build configuration editor settings and the location of all open debug views To save the project select Project Save Proj ect As from the menu Create a new name for the project and click on Save 5 3 Configuration Wizard 2 Configuration Wizard 2 is a code generation tool for all Silicon Laboratories devices Code is generated through the use of dialog boxes for each device peripheral as shown in Figure 2 finolude Z8051E330 h f Inicializ eci n funacian far ME E RE ff Coll Inis Cevioedi fro void Inic_Device voidi Z Empzy configuraci n Cpen che Peripherals renu choose a peripheral ca confil Figure 2 Configuration Wizard 2 Utility Rev 0 4 5 SILICON LABS C8051T620 2 DK The Configuration Wizard utility helps accelerate development by automatically generating initialization source code to configure and enable the on chip resources needed by most design projects In just a few steps the wizard creates complete startup code for a specific Silicon Laboratories MCU The program is configurable to provide the output in C or assembly language For more information refer to the Configuration Wizard 2 help available under the Help menu in Configuration Wizard 2 or refer to the Configuration Wizard 2 documentation Documentation and software are available on the kit CD and from the downloads webpage ww
13. es can be found in the documentation section of the Development Kit CD or on the Silicon Labs web site http www silabs com appnotes See Table 1 for a list of supported toolsets and associated application notes Table 1 Supported Third Party 8051 Toolsets Application Note AN104 Integrating Keil 8051 Tools into the Silicon Labs IDE AN125 Integrating Raisonance 8051 Tools into the Silicon Labs IDE AN126 Integrating Tasking 8051 Tools into the Silicon Labs IDE HI TECH AN140 Integrating Hi TECH 8051 Tools into the Silicon Labs IDE SDCC AN198 Integrating SDCC 8051 Tools into the Silicon Labs IDE AN236 Integrating IAR 8051 Tools into the Silicon Labs IDE 5 2 Silicon Labs IDE The Silicon Labs IDE integrates a source code editor source level debugger and in system programmer The following sections discuss how to open an example project in the IDE build the source code and download it to the target device 5 2 1 Running the T620_ Blinky or T622 Blinky example program The T620 Blinky or T622 Blinky example program blinks an LED on the target board 1 Open the Silicon Labs IDE from the Start menu 2 Select Project Open Project to open an existing project 3 Browse to the C SiLabs MCU Examples C8051 7T620_1_71320_3 Blinky or SiLabs MCU Exam plesiC8051T622 3 T326 Blinky directory default and select the T620 Blinky C wsp pr T622 Blinky C wsp project file Click Open 4 Once the project
14. ices in the C8051T62x 32x family also support a separate voltage input for the input output voltage of the port pins This Voltage Input Output VIO should be input to J1 on Pin 2 See the C8051T620 21 T320 3 or C8051T620 23 T326 27 data sheet for more information about VIO usage and constraints Notes m When programming a C8051T62x 32x device VDD must be at least 3 3 V VDD can be supplied directly to the device or the on chip 5 V regulator can be used m If an external supply voltage is desired the shorting block on J6 should be placed so that the Pin 3 VDD EXT is shorted to Pin 4 VDD_PWR Rev 0 4 17 SILICON LABS C8051T620 2 DK 8 Schematics 330 QNVIS 440 QNVIS CIWS ZLIHIN HHN z JO 1 9neuieuos p 1e0q 13yl0 A XZ9 115089 PL 94NBIJ 4 A 4Md Y 2 va L 330 GNVIS 330 QNVIS 330 QNVIS 330 QNVIS CUWSZLIHW CUWSZLIHW CIUWSCLIHW CIWSZLIHW CIWSZLIHW OLY ly GHW YHN CHW THA LHW YMd GGA 91HV8 0G0dS 30010 8d 9n830 d 9n83d Sna 8 3dA1 NNOJ 8SN Sd ang snaa lt _ KR WEE eia 3AIL9 V ANN AS3 3022 EECH va G Ds T van E 9n83q YI 9ng30 dda 188 0 d 1vaza 31922 aNadsns gt ey n 9 9 dOLS NNY dMd z A AM WO19ZOXS 9ZE 49 92 315089 MNMd GGA 9n830 00A M07734 A N3349 A in ad ora L L xl au 9ng83d 00A NNOY S19 WAO2 SLY WNOD XM WNOD XL OLY KI asn AL tea WNOO XL S 0d 9830 xi WWO2 S12 Tid o
15. information on configuring the system clock source 7 2 Switches LEDs and Potentiometer J9 J10 and J12 Three switches are provided on the motherboard The RESET switch is connected to the RST pin of the C8051T62x 32x Pressing RESET puts the device into its hardware reset state The switch labeled SW1 can be connected to the C8051T62x 32x s general purpose I O GPIO pins P0 1 and P2 0 and SW2 can be connected to the C8051T62x 32x s general purpose l O GPIO pins P1 0 and P2 1 through header J9 Pressing a switch generates a logic low signal on the port pin Remove its shorting block from the J9 header to disconnect the switch from the port pin Seven LEDs are also provided on the motherboard The red LED labeled PWP D4 is used to indicate a power connection to the motherboard The green LED labeled RUN D10 turns on when the debug circuitry is in a running state the red LED labeled STOP D11 turns on when the debug circuitry is in a halted state and the orange LED labeled DEBUG PWR D12 indicates whether the debug adapter circuit is being powered through P5 s USB connector The red LED labeled VPP D7 indicates when the VPP programming voltage is being applied to the device The green LEDs labeled LED1 D1 and LED2 D2 can be connected to C8051T62x 32x s GPIO pins through header J10 Remove its shorting block from the header to disconnect an LED from the port pin The red LED labeled USB ACTIVE D13
16. is open build the project by clicking on the Build Make Project button in the toolbar or selecting Project Build Make Project from the menu Note After the project has been built the first time the Build Make Project command will only build the files that have been changed since the previous build To rebuild all files and project dependencies click on the Rebuild All button in the toolbar or select Project Rebuild All from the menu 5 Before connecting to the target device several connection options may need to be set Open the Connec tion Options window by selecting Options Connection Options in the IDE menu First select the USB Debug Adapter option Next the correct Debug Interface must be selected C8051T62x 32x devices use Silicon Labs C2 2 wire debug interface Once all the selections are made click the OK but ton to close the window 4 Rev 0 4 SILICON LABS C8051T620 2 DK 6 Click the Connect button in the toolbar or select Debug Connect from the menu to connect to the device 7 Download the project to the target by clicking the Download Code button in the toolbar Note To enable automatic downloading if the program build is successful select Enable Automatic Con nect Download after Build in the Project Target Build Configuration dialog If errors occur during the build process the IDE will not attempt the download 8 Click on the Go button green circle in the toolbar or by selecting Debug gt G
17. location specified in Step 2 by default C SiLabs MCU CP210x Windows At this location run CP210xVCPlInstaller exe 5 o complete the installation process connect the included USB cable between the host computer and the COMM USB connector P4 on the C8051T62x Motherboard Windows will automatically finish the driver installation Information windows will pop up from the taskbar to show the installation progress 6 If needed the driver files can be uninstalled by selecting the Silicon Laboratories CP210x USB to UART Bridge Driver Removal option in the Add or Remove Programs window Rev 0 4 3 SILICON LABS C8051T620 2 DK 5 Software Overview The following software is necessary to build a project download code to and communicate with the target microcontroller m 8051 Evaluation Toolset m Silicon Labs Integrated Development Environment IDE Other useful software that is provided on the development kit CD and the Silicon Labs Downloads website www silabs com mcudownloads includes Configuration Wizard 2 m Keil uVision2 uVision3 and uVision4 Drivers m MCU Production Programmer and Flash Programming Utilities 5 1 8051 Evaluation Toolset The Silicon Labs IDE has native support for many third party 8051 toolsets Included with this kit is an 8051 evaluation assembler compiler and linker For further information on the tools including limitations see the corresponding application note Application not
18. ngag S12 S12 SLY axa axl usa 91HV8 0S0ds 300ld NY AZ 60 us o o ee Te a QNS y iQ J moy 0 q WNOD Z yla gt SNA EE noo snaa_ _ li amp H 3dAL NNOO 8Sf td QNIASAS QNAdSNS ANo l Jnvo 4GK EA ASA czo zo Old9 Toldo 17019 lt aNd Q0A O 070199 WNOD SNEA Jnz v dno colcdo 1NVL JLX A 122 ozo O Wan GGA Ano ZMS w z cadil ASLY 79 w N3339 TEES za ANOS XY i i S vod ta naja xa Se 4 L 3001 ur Zu Xu X1 zi z Q MAT GGA za Zd F Tid UZd 9 9 0d v iam gt our Ge anvof ux IMS La37 ed L_ gt Old x z E lt ro o o N3389 gt ASL Y A La ms gt LMS i 6r 3001 CH Gi WNOD S18 d K B 7 i 90830 S13 HMA UA er NID IYA OIA NI 301 NIV G Zd eu 334A L Od 1X3 GOA UU MAT ICA vir 1X3 00A y o gt e tc 18 SILICON LABS C8051T620 2 DK ano 0291 0291 GGA Tdl Q9 0791 ddA 4Md aaa lt Md GGA L td 9 Zd Std ytd E Cd zd Ved 0 Zd Md ddA Ltd 91d Sid vid d Zi na 1419 KEN Lk er 10d Md GGA 10d 9 0d S Od v Od 0d 0d lOd Go z JO Z INEWIAYIS pieoqiu uloN XZ9LLGOSO GL 94NBIJ AL anvo vie ED EN 912 Y 1 YZZZZNd zo A p lt 119ddA E LITI 11998ZGZSMA 90 ddA lt 3no 401070 lt noo ad INVI ALX lt 9ng3q ada dYZSESON BID TF Oe lt 1X3 00A 10 lt a e 0 d1
19. o from the menu to start run ning the firmware The LED on the target board will start blinking 5 2 2 Creating a New Project Use the following steps to create a new project Once steps 1 5 in this section are complete continue with Step 3 from Section 5 2 1 1 Select Project New Project to open a new project and reset all configuration settings to default 2 Select File New File to open an editor window Create your source file s and save the file s with a rec ognized extension such as c h or asm to enable color syntax highlighting 3 Right click on New Project in the Project Window Select Add files to project Select files in the file browser and click Open Continue adding files until all project files have been added 4 For each of the files in the Project Window that you want assembled compiled and linked into the target build right click on the file name and select Add file to build Each file will be assembled or compiled as appropriate based on file extension and linked into the build of the absolute object file Note If a project contains a large number of files the Group feature of the IDE can be used to organize Right click on New Project in the Project Window Select Add Groups to project Add predefined groups or add customized groups Right click on the group name and choose Add file to group Select files to be added Continue adding files until all project files have been added 5 Save th
20. p instructions configure the development system to be powered through the onboard 3 3 V regulator For other power options see 7 3 Power Supply Headers J6 and J7 on page 14 C SW1 ofee SW2 ee P21 J9 S05 1T62x MB C8051T62x EDB 00 J14 U1 J2 www silabs com E eS F34A SILICON LABS J3 VBUS VDD VREGIN VREGIN J4 J5 U2 USB ACTIVE UE CP2103 J8 RTS DEBUG CTS DEBUG P1 1 e P1 2 RTS COMM e CTS COMM J11 RX DEBUG TX DEBUG e P0 5 e TX COMM P0 4 1 RX COMM H8 LED 1a LED2 gl PO 1 P1 2 SW1 LED2 P2 0 P2 3 J12 C SW2 P0 6 LED1 P2 2 SILICON LABS W ww silabs com J10 AC Adapter lt W Place shorting blocks on dli J7 and J6 as shown J15 VPPB J 3VD VDD_EXT VDD_DEBUG VDD_COMM Vi VDB VDD_PWR VDD_PWR D108 D118 D12H STOP RUN DEBUG PWR USB Cable lt ED Figure 1 Hardware Setup Emulation Daughter Board Rev 0 4 SILICON LABS C8051T620 2 DK 4 Software Installation The included CD ROM contains the Silicon Laboratories Integrated Development Environment IDE
21. r C8051T620 23 1326 27 data sheet 6 2 Blinking LED Example The example source files T620 Blinky asm and 17620 Blinky c or T622 Blinky asm and T622 Blinky c show examples of several basic C8051T62x functions These include disabling the watchdog timer WDT configuring the Port I O crossbar configuring a timer for an interrupt routine initializing the system clock and configuring a GPIO port When compiled assembled and linked these programs flash the green LED on the C8051 T62x Motherboard about five times a second using the interrupt handler with a timer Rev 0 4 7 SILICON LABS C8051T620 2 DK 7 Development Boards The C8051T620 2 Development Kit includes a motherboard that interfaces to various daughter boards The C8051T62x Emulation Daughter Board contains a C8051F34A device to be used for preliminary software development The C8051T620 Socket Daughter Board and C80511622 Socket Daughter Board allow programming and evaluation of the actual C8051T62x devices Numerous input output 1 0 connections are provided on the motherboard to facilitate prototyping Figure 3 shows the C8051T62x Motherboard and indicates locations for various l O connectors Figure 4 shows the factory default shorting block positions Figures 5 6 and 7 show the available C8051T62x daughter boards Figures 8 9 10 and 11 show the available C8051T32x daughter boards P1 P2 P3 P4 P5 J1 J2 J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J
22. r Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap plication Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders E 28 Rev 0 4 ES SILICON LABS
23. ramming and debugging interface and a communications interface to the target microcontroller s UART The ToolStick Terminal software can access the debug hardware s communications path and provides a terminal like interface on the PC Note that for concurrent debugging and UART communications the CP2103 USB to UART bridge is also included onboard In addition to the standard terminal functions Send File Receive File Change Baud Rate two GPIO pins on the target microcontroller can be controlled using the terminal for either RTS CTS handshaking or software configurable purposes The ToolStick Terminal software is available on the downloads webpage www silabs com mcudownloads 6 Rev 0 4 SILICON LABS C8051T620 2 DK 6 Example Source Code Example source code and register definition files are provided by default in the SiLabs MCU Examples C80517T620_1_1320_3 or SiLabsIMCUlExamplesiC80517T622 3 1326 7 directory during IDE installation These files may be used as a template for code development 6 1 Register Definition Files Register definition files C8051T620 inc C8051T622 inc C8051T620 defs h C8051T622 defs h and compiler_defs h define all SFR registers and bit addressable control status bits They are installed by default into the SiLabs MCU Examples C8051T620_1_1320_3 or SiLabs MCU Examples C80517T622 3_T326_7 directory during IDE installation The register and bit names are identical to those used in the C8051T620 21 1320 3 o
24. s 3qolq NY NE AZ La SIMOd 69 09 Zdl esac E z L sngA SngA L ur 8 3dAl NNOO Hen O O NIDIYA aaa d UIVLX Z 0d v e uw N x Ho gt Le N VU oo at At dZt 640 NNOO td OIA NID SYA dOd ON Ly O OIA 25 K o gt tc SILICON LABS C8051T620 2 DK 9 J2u9y9s peog 191yBneg 82 NJO 22 15089 Ze amb 69 09 Soa L Ee em sngA SNA L ur tal 8H AdAL NNOO 8sn O C d NI93HA GGA ED EE y o gt tc LA O O NIDIHA OIA L dZLl 63Q0 NNOO td TIVIX Od LIWLX Z Od At dZt 640 NNOO ld 00 ya dOd ON ta qqA 26 SILICON LABS DOCUMENT CHANGE LIST Revision 0 2 to Revision 0 3 Updated 4 2 Development Tools Installation on page 3 Updated 4 3 CP210x USB to UART VCP Driver Installation on page 3 Updated Figure 17 on page 21 Updated Figure 18 on page 22 Updated Figure on page 27 Revision 0 3 to Revision 0 4 Updated 1 Kit Contents on page 1 Updated 2 About the Daughter Boards on page 1 Updated 6 Example Source Code on page 7 e Updated project paths Updated 7 Development Boards on page 8 Updated 8 Schematics on page 18 e Added Figures 19 20 21 and 22 Updated C8051T62x references to include C8051T32x devices Updated data sheet references Rev 0 4 SILICON LABS C8051T620 2 DK 27 C8051T620 2 DK CONTACT INFORMATION Silicon Laboratories Inc
25. w silabs com mcudownloads 5 4 Keil uVision2 uVision3 and uVision4 Silicon Laboratories Drivers As an alternative to the Silicon Laboratories IDE the uVision debug driver allows the Keil uVision2 uVision3 and uVision4 IDEs to communicate with Silicon Laboratories on chip debug logic In system Flash memory programming integrated into the driver allows for rapid updating of target code The uVision2 uVision3 and uVision4 IDEs can be used to start and stop program execution set breakpoints check variables inspect and modify memory contents and single step through programs running on the actual target hardware For more information refer to the uVision driver documentation The documentation and software are available on the kit CD and from the downloads webpage www silabs com mcudownloads 5 5 Programming Utilities The Silicon Labs IDE is the primary tool for downloading firmware to the MCU during development There are two software programming tools that are intended for use during prototyping or in the field the MCU Production Programmer and the Flash Programming Utilities The MCU Production Programmer is installed with the IDE to the directory C Silabs MCU Utilities Production Programmen default The Flash Programming Utilities can be optionally installed from the CD and are installed to C Silabs MCU Utilities FLASH Programming default 5 6 ToolStick Terminal The onboard debug circuitry provides both an in system prog
26. will turn on whenever the CP2103 USB to UART bridge is connected to a PC and has successfully completed enumeration Also included on the C8051T62x Motherboard is a 10 kQ thumbwheel rotary potentiometer reference number R8 The potentiometer can be connected to the C8051T62x 32x s P2 5 pin through the J12 header Remove the shorting block from the header to disconnect the potentiometer from the port pin Rev 0 4 13 SILICON LABS C8051T620 2 DK Table 2 lists the port pins and headers corresponding to the switches LEDs and potentiometer Table 2 Motherboard l O Descriptions Daughter Card s P2 0 J9 4 6 Switch Daughter Card s P1 0 J9 1 3 Daughter Card s P2 1 J9 3 5 Green LED labeled LED1 Daughter Card s P0 6 J10 2 4 Daughter Card s P2 2 J10 4 6 Green LED labeled LED2 Daughter Card s P1 2 J10 1 3 Daughter Card s P2 3 J10 3 5 Red LED labeled PWR D4 Daughter Card s VDD J6 J7 Red LED labeled VPP D7 Daughter Card s VPP pin J15 See VPP Pin Sharing on page 16 Green LED labeled RUN Debug Adapter Signal None Red LED labeled STOP None Orange LED labeled DEBUG PWR None Green LED labeled USB ACTIVE U2 CP2103 s SUSPEND None 7 3 Power Supply Headers J6 and J7 The main power supply of the motherboard which is used to power the daughter board can be provided by either the USB Debug Adapter s on chip voltage regulator the CP2103 USB to UART bridge s on chip voltage
27. x QFN32 SKT DB J3 SILICON LABS www silabs com PS o gt m gt e o Q a gt VIO 8 VREGIN 6 VREGIN VDD Figure 6 C8051T620 QFN32 Socket Daughter Board lt SILICON LABS www silabs com C8051T622 QFN24 SKT DB J3jee Figure 7 C8051T622 QFN24 Socket Daughter Board 10 Rev 0 4 SILICON LABS C8051T620 2 DK C8051T320 QFP32 SKT DB SILICON LABS www silabs com J 2 SILICON LABS www silabs com SILICON LABS www silabs com Figure 10 C8051T326 QFN28 Socket Daughter Board Rev 0 4 SILICON LABS 11 C8051T620 2 DK C8051T327 QFN28 SKT DB SILICON LABS www silabs com Figure 11 C8051T327 QFN28 Socket Daughter Board 12 Rev 0 4 SILICON LABS C8051T620 2 DK 7 1 System Clock Sources The C8051T62x 32x devices feature a calibrated internal oscillator that is enabled as the system clock source on reset After reset the internal oscillator operates at a frequency of 48 MHz 1 5 by default but may be configured by software to operate at other frequencies Therefore in many applications an external oscillator is not required However if you wish to operate the C8051T62x 32x device at a frequency not available with the internal oscillator an external oscillator source may be used Refer to the C8051T620 21 T320 3 or C8051T620 23 T326 2 data sheet for more
28. x drivers See 5 Software Overview for an overview of all applicable software included on the CD ROM 4 Installers selected in Step 3 will execute in sequence prompting the user as they install programs documentation and drivers 4 3 CP210x USB to UART VCP Driver Installation The C8051T62x Motherboard includes a Silicon Laboratories CP2103 USB to UART Bridge Controller Device drivers for the CP2103 need to be installed before PC software such as HyperTerminal can communicate with the board over the USB connection If the Install CP210x Drivers option was selected during installation this will launch a driver unpacker utility 1 Follow the steps to copy the driver files to the desired location The default directory is C SiLabs MCU CP21 0x 2 he final window will give an option to install the driver on the target system Select the Launch the CP210x VCP Driver Installer option if you are ready to install the driver 3 If selected the driver installer will now launch providing an option to specify the driver installation location After pressing the Install button the installer will search your system for copies of previously installed CP210x Virtual COM Port drivers It will let you know when your system is up to date The driver files included in this installation have been certified by Microsoft 4 If the Launch the CP210x VCP Driver Installer option was not selected in Step 3 the installer can be found in the
29. y are powered through the USB connector which can also supply the rest of the motherboard by routing the USB Debug Adapter s power through J6 The USB Debug Adapter also provides a data communications interface that can be used when the debug adapter is not debugging or programming a C8051T62x 32x device 7 5 UART to USB Communications Interfaces COMM P4 The C8051T62x Motherboard provides UART to USB communications interfaces through both the CP2103 USB to UART bridge device and the communications interface of the USB Debug Adapter The CP2103 bridge device connects to a PC through the USB connector labeled COMM P4 This USB connector supplies power to the CP2103 and can supply power to the rest of the motherboard by configuring J6 and J7 as shown in Figure 12 To use the CP2103 as a communications interface the CP2103 Virtual COM Port drivers must be installed on a PC The USB Debug Adapter s communications interface connects to a PC through P5 Access to the USB Debug Adapter s communications interface is provided by the Windows program called ToolStick Terminal which is available for download for free from the Silicon Laboratories website See the ToolStick Terminal help file for information on how to use ToolStick Terminal 7 6 Communications Interface Selector Headers J8 and J11 The C8051T62x Motherboard routes the C8051T62x 32x s P0 4 UART TX and P0 5 UART RX to J11 where those signals can be connected to either the CP210
Download Pdf Manuals
Related Search