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Omega OME-A822PG User's Manual

1. Usea single connection to frame ground not A GND or D GND a OME A 822PGL PGH Vin A GND i p E D GND V roc OME A 822PGL PGH Hardware Manual 35 2 10 Using OME DB 8225 CJC Output The OME DB 8225 daughter board contains built in cold junction compensation CJC circuitry that provides a 10mV per Deg C output With 0 0 Volts 273 Deg C The OME A 822 should be protected from drafts and direct sunlight in order to accurately reflect room temperature CJC Calibration 1 Connect the OME A 822PGL PGH to the OME DB 8225 CN1 2 Set the OME A 822PGL PGH to single ended Mode 3 Set the JP1 jumper to 1 2 and the JP2 jumper to 2 3 single ended mode 4 Read the temperature from a digital thermometer placed near D1 D2 See the OME DB 8225 Layout 5 Read OME A 822PGL PGH analog input channel 0 single ended Channel 0 6 Adjust VRI until a stable reading of 10mV per deg C is attained For example when the ambient temperature is 24 deg C the reading value of CJC will be 2 97V 273 deg c 24 deg c X 10 mV degc 2 97V You will need an A D channel for the CJC calibration AIO is reserved for CJC calibration when used in single ended mode and CHO HI amp CHO LO is reserved for the differential mode differential mode is recommended when working with thermocouples OME A 822PGL PGH Hardware Manual 36 3 Connector The OME A 822PGL PGH provides three connectors Connector 1 CN1 contains
2. Base address 6x266 IrqNo 15 DmaNo 1 OME A 822PGL PGH Hardware Manual 49 5 2 3 FUNCTION TEST The FUNCTION TEST main menu contains seven submenus they are D A TEST Digital I O A D MULTIPLEX A D use IRQ A D use DMA A D GAIN Timer 0 The main menu is shown below Calibration Watatu I eag slyecialTest ua I 0 A D Multiple A D use IRQ A D use re A D GAIN liner 6 A822PGH Base address B8x288 IrqNo 15 DmaNo 1 The D A TEST menu is shown below OME A 822PGL PGH Hardware Manual 50 lt D A TEST gt Test Screen balibrat ion DA Test Test count 2 DA channel 1 DA channel 2 8333H gt 1 888U 8333H gt 1 8808U Cp pause Escl quit t Inc delay I 11 Dec delay delay 488 A822PGH Base address B8x2880 IrqNo 15 DmaNo 1 Assume D A output range 0 to 5V Send D A output to both channels simultaneously Press lt p gt pause screen press lt p gt again release screen Press lt Up gt key to increase screen delay Press lt Down gt key to decrease screen delay Press lt ESC gt key to quit OME A 822PGL PGH Hardware Manual 51 lt Digital I O gt Test Screen balibrat ion Digital I O TEST DI Test count 154993 Hex Status 5D7 NE OK CSD69 ate OK 5D66 1 50 OK 5D6B Fk OK 5D6C1Gb Ka OK CSD6D 1h OK SD6E 1502 OK CSD6F ate OK Please use 28 cable connect CN1 lt gt CNZ D pl pause Escl quit T Inc delay 11 Dec delay A822PGH
3. Base address Bx288 IrqNo 15 DmaNo 1 Connect CN1 to CN2 16 bit up counter is sent to 16 channel DO 16 channel DO is connected to 16 channel DI 16 channel DI are readback and show on the screen If DO equals DI then OK shown on screen If DO does not equal DI then Error shown on screen Press lt p gt pause screen press lt p gt again release screen Press lt Up gt key to increase the screen delay Press lt Down gt key to decrease the screen delay Press lt ESC gt key to quit OME A 822PGL PGH Hardware Manual 52 lt A D Multiplexer gt Test Screen balibrat ion i sjyecialTest AD TEST Polling Test count 1515 Channel Value 795V 9720 967V 381U B 9Y 2620 651V 948U 274U 925U 674U 439V 356U B49U 195U 459U A822PGH Base address B8x288 IrqNo 15 DmaNo 1 8 1 2 3 4 5 6 7 8 9 ft om pb fot jad WN mt C OC OG OG B BIN C 4S WWW h a Assume 16 channel single ended bipolar gain 1 analog input signals Input range from 5V to 5V Continue to scan 16 channels Press lt ESC gt key to quit OME A 822PGL PGH Hardware Manual 53 lt A D use IRQ gt Test Screen balibrat ion AD TEST Interrupt Test count 2 Channel Ci 16 C2 14 14 3K Hz Read AD number 999 1888 4 958 Min 4 934 Average 4 942 8881 1881 2881 3881 46901 508 6081 7808 888 9601 939 6201 937 129 944 2261 941 3261 944
4. syecialTest Ie lp olt Set LIO Bit Pattern RQ Clock Test A Clock Test A822PGH Base address Bx288 IrqNo 15 DmaNo 1 OME A 822PGL PGH Hardware Manual 58 5 2 5 Help The Help menu will display the software version as shown below balibration Funct ionfjest syecialTest About ABZ2Z2Diag Version 1 808 June 1996 A822PGH Base address 6x266 IrqNo 15 DmaNo 1 OME A 822PGL PGH Hardware Manual 59 WARRANTY DISCLAIMER OMEGA ENGINEERING INC warrants this unit to be free of defects in materials and workmanship for a period of 13 months from date of purchase OMEGA s WARRANTY adds an additional one 1 month grace period to the normal one 1 year product warranty to cover handling and shipping time This ensures that OMEGA s customers receive maximum coverage on each product If the unit malfunctions it must be returned to the factory for evaluation OMEGA s Customer Service Department will issue an Authorized Return AR number immediately upon phone or written request Upon examination by OMEGA if the unit is found to be defective it will be repaired or replaced at no charge OMEGA s WARRANTY does not apply to defects resulting from any action of the purchaser including but not limited to mishandling improper interfacing operation outside of design limits improper repair or unauthorized modification This WARRANTY is VOID if the unit shows evidence of having been tampered with or shows evidence of ha
5. 429 941 529 941 6281 946 729 939 8261 941 9261 939 939 939 941 939 939 941 941 937 939 949 8681 949 1681 939 269 941 3691 939 469 939 569 941 6681 941 769 939 869 941 9681 946 8881 951 1LI1881 944 2861 941 3861 944 486 944 5891 941 6881 941 L 7881 941 8891 941 9861 941 941 944 951 941 941 946 939 941 951 AA US S o o o o oun AA ALA HAHAH HD AL AA DAHA HH HD A AA HAHAH HL A ADHD AHH HD A Cpl pause Esc quit PageUp Inc channel PageDn 1 Dec channel t1 Inc C1 I 11 Dec C1 1 Inc C2 7 Dec CZ A822PGH Base address Bx2880 IrqNo 15 DmaNo 1 Assume single ended bipolar gain 1 Use lt PgUp gt key to select the next channel Use lt PgDn gt key to select the previous channel Use lt Up gt lt Down gt key to adjust C1 Use lt Left gt lt Right gt key to adjust C2 The sample rate The pacer timer rate 2000 C1 C2 K Use lt p gt key to pause screen use next lt p gt key to release screen Use lt ESC gt to quit The A D mode control register 0x06 gt select pacer trigger and use interrupt transfer One cycle samples 1000 A D data points Minimum maximum and average values are shown on the screen OME A 822PGL PGH Hardware Manual 54 lt A D use DMA gt Test Screen balibrat ion AD TEST Interrupt Test count 2 Channel
6. Accuracy bit Resolution 12 bits OME A 822PGL PGH Hardware Manual 5 1 3 4 DA Converter Channels 2 independent type 12 bit multiplying Analog device AD 7541 Linearity 1 2 bit Output range 0 to SV or 0 to 10V jumper selected may be used with other AC or DC reference input Maximum output limit 10V Output drive 5mA settling time 0 6 microseconds to 0 01 for full scale step 1 3 5 Digital I O Output port 16 bits TTL compatible Output Low VOL 05 Vmax IOL 8 mA max Output High VOH 2 7Vmin IOH 400uA max Input port 16 bits TTL compatible Input Low VIL 0 8V max IIL 0 4mA max Input High VIH 2 0V min IIL 204A max 1 3 6 Interrupt Channel Level 3 4 5 6 7 10 11 12 14 15 jumper selectable Enable Via control register OME A 822PGL PGH Hardware Manual 6 1 3 7 Programmable Timer Counter Type 82C54 8 programmable timer counter Counters Counter and counter2 are cascaded as a 32 bit pacer timer Counter0 is a user available timer counter The software driver also uses counterO to implement a machine independent timer Clock input frequency DC to 10 MHz Pacer output 0 00047Hz to 0 5MHz Input gate TTL compatible Internal Clock 2 MHz 1 3 8 Direct Memory Access Channel DMA Level CH1 or CH3 jumper selectable Enable via DMA bit of control register Termination by interrupt on T C Transf
7. E11IE11 and quit Change setting SH1 Address 266H 18U EXT 12 5U 2 im JP3 INTCLK DIFF INT JP2 EXTCLK JP6 E HB ono DMA 3 NO DNA Setup Ga libration Funct ionfjest sfjec ialTest Ie lp 8822 Card IRQ No 3456791 6 Escl quit but not change IRQ No CR change IRQ No gt Inc IRQ No Dec IRQ No and quit SH1 Address 266H 18U s 5U INTCLK DIFF INT B JP2 EXT 12 SINGL JP3 EXTCLK JP6 ES agi ono DMA 3 NO DNA OME A 822PGL PGH Hardware Manual 48 5 2 2 CALIBRATION The CALIBRATION menu contains ten submenu items they are D A Reference voltage D A Channel 0 gain D A channel 1 gain A D Gain A D Offset A D Bipolar Offset A D Unipolar Offset These items relate to the calibration of the OME A 822PGL PGH The CALIBRATION main menu is a graphic representation of the OME A 822PGL PGH board layout In order to maintain the specified performance it may be required to calibrate the board after working with it for an extended period of time There are seven variable resistors VRs that need to be adjusted during the calibration process When you highlight one of the first seven menu items the associated VR will begin to blink and a message window will appear that will instruct you how to adjust the VR The main menu screen is shown below Funct ionfjest syecialTest reference voltage D A channel gain D A channel gain AYZZPGH
8. Ci 16 C2 14 14 3K Hz Read AD number 999 1888 4 958 Min 4 934 Average 4 942 8881 1881 2881 3881 46901 508 6081 7808 888 9601 939 6201 937 129 944 2261 941 3261 944 429 941 529 941 6281 946 729 939 8261 941 9261 939 939 939 941 939 939 941 941 937 939 949 8681 949 1681 939 269 941 3691 939 469 939 569 941 6681 941 769 939 869 941 9681 946 8881 951 1LI1881 944 2861 941 3861 944 486 944 5891 941 6881 941 L 7881 941 8891 941 9861 941 941 944 951 941 941 946 939 941 951 AA US S o o o o oun AA ALA HAHAH HD AL AA DAHA HH HD A AA HAHAH HL A ADHD AHH HD A Cpl pause Esc quit PageUp Inc channel PageDn 1 Dec channel Ctl Inc C1 I 11 Dec C1 1 Inc C2 7 Dec CZ A822PGH Base address Bx288 IrqNo 15 DmaNo 1 Assume single ended bipolar gain 1 Use lt PgUp gt key to select the next channel Use lt PgDn gt key to select the previous channel Use lt Up gt lt Down gt key to adjust C1 Use lt Left gt lt Right gt key to adjust C2 Sample rate pacer timer rate 2000 C1 C2 K Use lt p gt key to pause screen use next lt p gt key to release screen Use lt ESC gt to quit A D mode control register 0x02 gt select pacer trigger and use DMA transfer One cycle samples 1000 A D data po
9. Free 0800 1 66342 e mail info omegashop cz 11 rue Jacques Cartier 78280 Guyancourt France TEL 33 0 1 61 37 29 00 FAX 33 0 1 30 57 54 27 Toll Free in France 0800 466 342 e mail sales omega fr Daimlerstrasse 26 D 75392 Deckenpfronn Germany TEL 49 0 7056 9398 0 FAX 49 0 7056 9398 29 Toll Free in Germany 0800 639 7678 e mail info omega de One Omega Drive River Bend Technology Centre Northbank Irlam Manchester M44 5BD United Kingdom TEL 44 0 161 777 6611 FAX 44 0 161 777 6622 Toll Free in United Kingdom 0800 488 488 e mail sales omega co uk It is the policy of OMEGA to comply with all worldwide safety and EMC EMI regulations that apply OMEGA is constantly pursuing certification of its products to the European New Approach Directives OMEGA will add the CE mark to every appropriate device upon certification The information contained in this document is believed to be correct but OMEGA Engineering Inc accepts no liability for any errors it contains and reserves the right to alter specifications without notice WARNING These products are not designed for use in and should not be used for patient connected applications OME A 822PGH PGL Enhanced Multi Function Card Hardware Manual OME A 822PGL PGH Hardware Manual 1 Tables of Contents OME A 822PGL PGH Hardware Manual 2 1 Introduction 4 1 1 General Descrip
10. high 8 bits are stored in address BASE 7 2 4 5 Clear Interrupt Request WRITE Base 8 Clear Interrupt Request Format X don t care XXXXXXXX any 8 bits data is validate If the OME A 822PGL PGH is used in the interrupt transfer mode an on board hardware status bit will be set after each A D conversion This bit must be cleared by software before the next hardware interrupt Writing any value to address BASE 8 will clear this hardware bit and the hardware will generate another interrupt when next A D conversion is completed OME A 822PGL PGH Hardware Manual 19 2 4 6 A D Gain Control Register ARE Base 9 A D Gain Control Register Format The only difference between the OME A 822PGL and OME A 822PGH is the GAIN control function The OME A 822PGL provides gains of 1 2 4 8 and the OME A 822PGH provides gains of 1 10 100 1000 The gain control register control the gain of the A D input signal Bipolar Unipolar will affect the gain factor It is important to select the correct gain control code according to Bipolar Unipolar input NOTE gt If the gain control code is changed the hardware needs an extra delay for the gain settling time The gain settling time is different for the different gain control codes The software driver does not take care the gain settling time so the user needs to add the delay If the application program will run on different machines the user needs to implement a machine indepe
11. jumper set to internal or external reference voltage sec 2 3 2 If JP2 is set to internal and JP1 is set to 5V the D A output range is 0 to SV If JP2 is set to internal and JP1 is set to 10V the D A output range is 0 to 10V If JP2 is set to external the external reference voltage can be AC DC 10V The block diagram is given below D A channel 0 Base 4 5 Base 6 7 OME A 822PGL PGH DA channel I NOTE The D A output latch registers use a double buffer structure The user must send the low byte data first then send the high byte data If the user only sends the high byte the low byte data will be the previous value OME A 822PGL PGH Hardware Manual 31 2 9 Analog Input Signal Connection The OME A 822 can measure signals in the single ended or differential mode In the differential mode each channel has a unique signal HIGH and signal LOW connection In the single ended mode all channels have a unique signal HIGH connection but share a common LOW or ground connection Differential connections are very useful for low level signals millivolt since they better reject electrical noise that can affect the quality of the measurement A differential connection is also necessary when a common ground is unacceptable The benefit of using a single ended connection is that twice the number of channels is available In general a single ended connection is often a good choice when working with higher level signal
12. number of the product and warranty and 3 Repair instructions and or specific problems 3 Repair instructions and or specific problems relative to the product relative to the product OMEGA s policy is to make running changes not model changes whenever an improvement is possible This affords our customers the latest in technology and engineering OMEGA is a registered trademark of OMEGA ENGINEERING INC O Copyright 2002 OMEGA ENGINEERING INC All rights reserved This document may not be copied photocopied reproduced translated or reduced to any electronic medium or machine readable form in whole or in part without the prior written consent of OMEGA ENGINEERING INC Where Do I Find Everything I Need for Process Measurement and Control OMEGA Of Course Shop online at www omega com TEMPERATURE Zg Thermocouple RTD amp Thermistor Probes Connectors Panels amp Assemblies Wire Thermocouple RTD amp Thermistor A Calibrators amp Ice Point References A Recorders Controllers amp Process Monitors A Infrared Pyrometers PRESSURE STRAIN AND FORCE 4 Transducers amp Strain Gages A Load Cells amp Pressure Gages 4 Displacement Transducers A Instrumentation amp Accessories FLOW LEVEL 4 Rotameters Gas Mass Flowmeters amp Flow Computers A Air Velocity Indicators A Turbine Paddlewheel Systems A Totalizers amp Batch Controllers pH CONDUCTIVITY A pH Electrodes Testers amp Accesso
13. simple to use but does not control the sampling rate very precisely In the software trigger mode the program issues a software trigger command sec 2 4 9 to initiate the A D conversion The program then must poll the A D status bit until the ready bit is O sec 2 4 2 The pacer trigger can control the sample rate very precisely In the pacer trigger mode the pacer timer sec 2 6 will generate periodic trigger signals to the A D converter The converted data can be transferred to the CPU by polling or interrupt or by DMA transfer OME A 822PGL PGH Hardware Manual 22 The software driver provides three data transfer methods polling interrupt and DMA The polling subroutine A 822 AD PollingVar or A 822 AD PollingArray set the A D mode control register to 0x01 This control word enables software trigger and polling transfer The interrupt subroutine A 822 AD INT START sets the A D mode control mode register to ox06 This control word enables pacer trigger and interrupt transfer The DMA subroutine A 822 AD DMA START sets the A D mode control register to 0x02 This control word means pacer trigger and DMA transfer Please refer to sec 2 7 for detailed information 2 4 9 A D Software Trigger Control Register WRITE Base C A D Software Trigger Control Register X don t care XXXXXXXX any 8 bits data is validate The A D converter can be triggered by software trigger or pacer trigger The details are given
14. table lists the registers and their locations Baset3 Base 6 Base A B Reserved Am Mode Control A D Software Trigger Control D Reserved DOLowByt E Reserved DO High Byte F JReemed fReserved OME A 822PGL PGH Hardware Manual 16 2 4 1 8254 Counter The 8254 Programmable timer counter has 4 registers from Base 0 through Base 3 For detailed programming information on the 8254 please refer to Intel s Microsystem Components Handbook Baset0 18254 Counter 0 8254 Counter 0 Base 1 8254 Counter 1 8254 Counter I Base 2 18254 Counter 2 8254 Counter 2 Baset3 Reserved 8254 Counter Control 2 4 2 AID Input Buffer Register READ Base 4 A D Low Byte Data Format ne TENE Jr l bd READ Base 5 A D High Byte Data Format oo freapy for pio po os A D 12 bit data D11 D0 DII MSB DO LSB READY 1 A D 12 bit data not ready 0 A D 12 bit data is ready The low 8 bit A D data is stored in address BASE 4 and the high 4 bit data is stored in address BASE 5 The READY bit is used as an indicator for the A D conversion When an A D conversion is completed the READY bit will clear to zero OME A 822PGL PGH Hardware Manual 17 2 4 3 D A Output Latch Register WRITE Base 4 Channel 1 D A Low Byte Data Format D ps fps a s3 p2 pi o WRITE Base 5 Channel I D A High Byte Data Format x k k px ju ji pos Js WRITE Base 6 Channel 2 D A Low Byte Data Format pr je l
15. the 16 digital inputs Connector 2 CN2 contains the 16 digital outputs Connector 3 CN3 contains the analog inputs analog outputs and timer counter I O 3 1 CN1 CN2 CN3 Pin Assignment CN1 Digital Input Pin Assignment ph Digital npurorrme p B Digtilpu2TIL k 5 Digtilpu4TTL 6 7 Digmilpu6TIL BG 2 1 o Digital Input STIL iO Digital Input TTL um ND it ND 17 GND 18 GND 19 5V Output 2V Output CN2 Digital Output Pin Assignment 1 DigialOuputO TTL D Digital Output TTL 3 DigtiOupu2 TTL Digital Output TTL 5 DigtiOupu4 TTL 6 Digital Output TTL 7 Digital Output6TTL 8 Digital Output YTTL 10 uoo Digital Output 10 TTL Digital Output 11 TTL Digital Output 12 TTL__ 14 16 11 Digital Output 12 TTL MI Digital Output 13TTL Digital Output 14 TTL es c Digital Output 15 TTL 17 GND 18 OND OME A 822PGL PGH Hardware Manual 37 o jDigtalOwpu TTL fio SINGLE ENDED SIGNAL MODE CN3 Analog input Analog output and Timer Counter Pin Assignment Analog Input 0 20 Analog Input 8 B Anaogiput2 2 Analog Input 10 a Analog Input 3 123 Analog Input Analog Input 12 Analog Input s s Analog Input 13 Analog Input 14 4 Analog Input 7 7 Analog Input 15 Analog GND 8 Analog GND Analog GND D9 Analog GND D A internal 5V 10V JE um voltage output voltage reference input voltage reference 30 voltage reference input vol
16. 22PGL PGH used for calibration they are described below VRI A D offset adjustment VR2 AD gain adjustment VR3 DA channel 0 gain adjustment D A channel 1 gain adjustment VR4 D A channel I gain adjustment VRS DA reference voltage adjustment VR6 Jap unipolar offset adjustment VR7 AMD programmable amplifier offset adjustment OME A 822PGL PGH Hardware Manual 41 4 2 D A Calibration or OO ST EN docu DER e e eS Run the A82XDIAG EXE program Press the Right Arrow Key to select CALIBRATION Press the Down Arrow Key to select G D A REFERENCE Press the Enter Key Connect VREF pin 11 of CN3 toa DVM Digital Volt Meter Adjust VRS until the DVM 4 9988V Press the ESC Key Select and Execute A D A REFERENCE 1 item Connect D A channel 0 pin 30 of CN3 to the DVM Adjust VR3 until the DVM 4 9988V Press the ESC Key Select and Execute B D A REFERENCE item Connect D A channel 1 pin 32 of CN3 to the DVM Adjust VR4 until the DVM 4 9988V OME A 822PGL PGH Hardware Manual 42 4 3 A D Calibration SRO OP Be LOU qua ro Run the A82XDIAG EXE Press Right Arrow Key to select CALIBRATION Press the Down Arrow Key to select C A D REFERENCE item Press the Enter Key Input a stable 4 9988V to A D channel 0 pin 1 of CN3 Adjust VR2 until the A D data shown on the screen is between 4094 to 4095 P
17. ME A 822PGL PGH Input Buffer Register OME A 822PGL PGH Input Buffer Register External Device OME A 822PGL PGH Hardware Manual 25 2 6 8254 Timer Counter The 8254 Programmable timer counter has 4 registers from Base 0 through Base 3 For detailed programming information about the 8254 please refer to Intel s Microsystem Components Handbook The block diagram is shown below Qvcc CN3 33 10K CN3 16 m ui Cin Cout CN3 37 Counter 0 2M PACER CLK Cin clock input CN3 35 Cout clock output Counter 1 Qvcc INTCLK internal clock CN3 connector CN3 10K Counter 2 PEU CN3 34 The counter0 counter and counter2 are all 16 bit counters Counter 1 and counter 2 are cascaded as a 32 bit timer This 32 bit timer is used as a pacer timer The software driver A 822 Delay uses counter 0 to implement a machine independent timer for settling time delay sec 2 4 6 and sec 2 4 7 If A 822 Delay is not used counter0 can be used as a general purpose timer counter NOTE When using A 822 Delay to implement a machine independent timer the JP6 jumper must be set to internal 2M clock OME A 822PGL PGH Hardware Manual 26 2 7 A D Conversion This section explains how to perform A D conversions The A D conversion can be triggered 3 ways by software trigger by pacer trigger or by external trigger to the A D converter At the end of A D conversion it is possible to transfer data by 3 ways
18. OME A 822 software driver can support 8 different cards in one system but only 2 of these cards can use the interrupt transfer function OME A 822PGL PGH Hardware Manual 13 2 3 6 JP6 User Timer Counter Clock Input Selection INTCLK EXTCLK EXTCLK The OME A 822PGL PGH has 3 independent 16 bit timer counters The cascaded counterl and counter2 are used as a pacer timer Counter0 can be used as a user programmable timer counter The user programmable timer counter can be set to 2M internal clock or external clock ExtCLK CN3 pin 37 The block diagram is given in section 2 6 The clock source must be very stable Using the 2M internal clock is strongly suggested The OME A 822PGL PGH software driver uses counter0 as a machine independent timer If users program calls the A 822 Delay subroutine counter0 will be programmed as a machine independent timer More detailed information is provided in section 2 6 NOTE if you use A 822 Delay the JP6 jumper must be set to internal 2M clock OME A 822PGL PGH Hardware Manual 14 2 3 7 JP7 DMA DACK Selection JP8 DMA DRQ Selection The DMA channel can not shared The OME A 822 software driver can support 8 different boards in one PC based system but only two of these boards can use the DMA transfer function OME A 822PGL PGH Hardware Manual 15 2 4 I O Register Address The OME A 822PGL PGH occupies 16 consecutive PC I O addresses The following
19. Selection Select 5V D A voltage output 0 to 5V both channel Select 10V D A voltage output 0 to 10V both channel JP1 is valid only if JP2 is set to D A internal reference voltage OME A 822PGL PGH Hardware Manual 11 2 3 2 JP2 DIA Int Ext Ref Voltage Selection JP2 vref If JP2 is set to internal reference then JP1 should be set to 5V or 10V internal reference voltage If JP2 is set to external reference then ExtRef1 CN3 pin 31 is the external reference voltage for D A channel 1 and ExtRef2 CN3 pin 12 is the external reference voltage for D A Channel 2 2 3 3 JP3 Single ended Differential Selection Differential SINGLE The OME A 822PGL PGH offers 16 single ended or 8 differential analog input channels The JP3 jumper sets the inputs to single ended or differential mode You can not select single ended and differential simultaneously Refer to Sec 2 9 first OME A 822PGL PGH Hardware Manual 12 2 3 4 JP4 A D Trigger Source Selection INTTRG INTTRG EXTTRG EXTTRG The OME A 822PGL PGH supports two trigger types internal trigger and external trigger The external trigger comes from ExtTrg CN3 pin 17 There are two types of internal triggers software trigger and pacer trigger More detailed information is given in section 2 4 8 2 3 5 JP5 Interrupt Level Selection NO Interrupt IRQ 3 4 5 6 7 9 10 11 12 1415NC The interrupt channel can not be shared The
20. User s Gui omega om Shop online at www omega com e mail info Comega com IS09001 11809002 CERTIFIED CERTIFIED CORPORATE QUALITY CORPORATE QUALITY STAMFORD CT MANCHESTER UK OME A822PG ISA Bus Multi Functional Board Hardware Manual omega com CEOMEGA OMEGAnet Online Service Internet e mail www omega com info omega com USA ISO 9001 Certified Canada Servicing North America One Omega Drive P O Box 4047 Stamford CT 06907 0047 TEL 203 359 1660 FAX 203 359 7700 e mail info omega com 976 Bergar Laval Quebec H7L 5A1 Canada TEL 514 856 6928 FAX 514 856 6886 e mail info omega ca For immediate technical or application assistance USA and Canada Mexico Benelux Czech Republic France Germany Austria United Kingdom ISO 9002 Certified Sales Service 1 800 826 6342 1 800 TC OMEGA Customer Service 1 800 622 2378 1 800 622 BEST Engineering Service 1 800 872 9436 1 800 USA WHEN TELEX 996404 EASYLINK 62968934 CABLE OMEGA En Espa ol 001 203 359 7803 e mail espanol omega com FAX 001 203 359 7807 info omega com mx Servicing Europe Postbus 8034 1180 LA Amstelveen The Netherlands TEL 31 0 20 3472121 FAX 31 0 20 6434643 Toll Free in Benelux 0800 0993344 e mail sales amp omegaeng nl Frystatska 184 733 01 Karvin Czech Republic TEL 420 0 59 6311899 FAX 420 0 59 6311114 Toll
21. channel In differential mode D2 D0 selects the active channel and D3 has no affect NOTE The settling time of the multiplexer depends on the resistance of the input sources source resistance about 0 1K ohm gt settling time about 3 us source resistance about IK ohm settling time about 5 us source resistance about 10K ohm gt settling time about 10 us source resistance about 100K ohm gt settling time about 100 us OME A 822PGL PGH Hardware Manual 21 2 4 8 A D Mode Control Register WRITE Base B A D Mode Control Register Format x jp jp bo X k k D2 X don t care Mode Select Trigger Type Transfer Type D2 DI Do Software Trig Pacer Trig Software interrupt DMA o fo fo kr k k k k o p fh pedet Xx seler X X oh p k Slt KK fetest pl Jo x get jSeet seet X X disable JP4 Select External Trigger Mode Select Trigger Type Transfer Type D2 D1 DO extemal Trigger Software Interrupt DMA 0 0 0 x X X X obh k KKK o p jk KK Select a f j sero seet seet x The A D conversion can be divided into 2 stages trigger stage and transfer stage The trigger stage will generate a trigger signal to the A D converter and the transfer stage will transfer the result to the CPU The trigger method may be internal trigger or external trigger The internal trigger can be software trigger or pacer trigger The software trigger is
22. e PC memory by three modes polling interrupt and DMA OME A 822PGL PGH Hardware Manual 28 2 7 2 AID Conversion Trigger Modes OME A 822PGL PGH supports three trigger modes 1 Software Trigger Write any value to the A D software trigger control register BASE A to initiate an A D conversion cycle This mode is very simple but it is very difficult to achieve a precise sample rate 2 Pacer Trigger Mode The block diagram of the pacer timer is shown in section 2 6 The pacer timer can provide a very precise sample rate 3 External Trigger Mode When a rising edge of an external trigger signal is applied an A D conversion will be performed The external trigger source comes from pin 17 of CN3 2 7 3 A D Transfer Modes OME A 822PGL PGH supports three transfer modes 1 polling transfer This mode can be used with all trigger modes More detailed information is given in section 2 4 8 The software scans the A D high byte data register BASE 5 until READY BIT 0 The low byte data is available in BASE 4 2 interrupt transfer This mode can be used with the pacer trigger or external trigger More detailed information is given in section 2 4 8 The user can set the IRQ level by adjusting jumper JP5 A hardware interrupt signal is sent to the PC when an A D conversion is 3 Diyidldtethsfer This mode can be used with the pacer trigger or external trigger More detailed information is given in section 2 4 8 The user can se
23. er 10 CFR 21 NRC used in or with any nuclear installation or activity or 2 in medical applications or used on humans Should any Product s be used in or with any nuclear installation or activity medical application used on humans or misused in any way OMEGA assumes no responsibility as set forth in our basic WARRANTY DISCLAIMER language and additionally purchaser will indemnify OMEGA and hold OMEGA harmless from any liability or damage whatsoever arising out of the use of the Product s in such a manner RETURN REQUESTS INQUIRIES Direct all warranty and repair requests inquiries to the OMEGA Customer Service Department BEFORE RETURNING ANY PRODUCT S TO OMEGA PURCHASER MUST OBTAIN AN AUTHORIZED RETURN AR NUMBER FROM OMEGA S CUSTOMER SERVICE DEPARTMENT IN ORDER TO AVOID PROCESSING DELAYS The assigned AR number should then be marked on the outside of the return package and on any correspondence The purchaser is responsible for shipping charges freight insurance and proper packaging to prevent breakage in transit FOR WARRANTY RETURNS please have the FOR NON WARRANTY REPAIRS consult OMEGA following information available BEFORE for current repair charges Have the following contacting OMEGA information available BEFORE contacting OMEGA 1 Purchase Order number under which the product 1 Purchase Order number to cover the COST was PURCHASED of the repair 2 Model and serial number of the product under 2 Model and serial
24. er rate 100K conversions sec OME A 822PGL PGH Hardware Manual 7 1 4 Applications Signal analysis FFT amp frequency analysis Transient analysis Production testing Process control Vibration analysis Energy management Industrial and laboratory measurement and control 1 5 Product Check List The OME A 8322PGL PGH includes the following items OME A 822PGL PGH multifunction card OME A 822PGL PGH CD ROM Attention If any of these items are missing or damaged please contact our customer service department Save the shipping materials and carton in case you want to ship or store the product in the future OME A 822PGL PGH Hardware Manual 8 2 Hardware Configuration 2 1 Board Layout HDd IDdcc8 V MJIWNO snd VSI lt i e uec N har o2 et I Pig Cn Rien nN lion I snd VSI OME A 822PGL PGH Hardware Manual 9 2 2 O Base Address Setting The OME A 822PGL PGH occupies 16 consecutive locations in I O address space The base address is set by DIP switch SW1 The default address is 0x220 A9 A8 AT A6 AS A4 ttt SWI BASE ADDRESS 200 20F F on noe ost ox 230 23F re M default base address is 0x220 OME A 822PGL PGH Hardware Manual 10 The PC I O port map is given below EGA 2BO2DF EGA BC0 3CF EGA DEC 2E7 ATGPIB SDO3DF CGA 2 3 Jumper Settings 2 3 1 JP1 D A Internal Reference Voltage
25. in sec 2 4 8 and sec 2 7 Writing any value to address BASE C will generate a trigger pulse to the A D converter and initiate an A D conversion The address BASE 5 offers a ready bit to indicate an A D conversion is completed The software driver uses this control word to detect the OME A 822PGL PGH hardware board The software initiates a software trigger and checks the ready bit If the ready bit can not cleared to zero in a fixed time the software driver will return a error message If there is an I O BASE address error the ready bit will not be cleared to zero The software driver A 822 CheckAddress uses this method to detect the I O BASE address setting OME A 822PGL PGH Hardware Manual 23 2 4 10 D O Output Latch Register WRITE Base D D O Output Latch Low Byte Data Format D ps js jp jp jp jt jp j WRITE Base E D O Output Latch High Byte Data Format Dis p pi3 pi2 pn DIO D O 16 bits output data D15 D0 D15 MSB DO LSB The OME A 822PGL PGH provides 16 TTL compatible digital outputs The lower 8 bits are stored in address BASE D The high 8 bits are stored in address BASE E OME A 822PGL PGH Hardware Manual 24 2 5 Digital I O The OME A 822PGL PGH provides 16 digital input channels and 16 digital output channels All levels are TTL compatible The connection diagram and block diagram are given below Output Latch Register External Output Latch Register Device O
26. ints Minimum Maximum and Average values are shown on the screen OME A 822PGL PGH Hardware Manual 55 lt DA GAIN gt Test Screen Betup Ga libration sfjec ialTest Ie lp A D Gain Test GainMode A822 BI 1 Count 684 A D chB B x BFF 2 498 D A ch B B xB8B6B6 2 588 Please connect CN3 pin 1 to CN3 pin 38 A D 8 D A 8 Escl quit T1I 4 Change Gain C 7 Change D A value A822PGH Base address B8x288 IrqNo 15 DmaNo 1 Assume single ended bipolar gain 1 A D channel 0 connected to D A channel 0 Use lt Up gt lt Down gt key to adjust gain control code Use lt Left gt lt Right gt key to adjust D A output value Use software trigger and polling transfer mode Press lt ESC gt key to quit OME A 822PGL PGH Hardware Manual 56 lt Timer 0 gt Test Screen Betup Ga libration sfjec ialTest Ie lp Timer 6 Test Timer Mode 3 Va lue 6C1C If value is not constant gt Timer is OK CN3 pin 16 high gt low gt high gt low gt Escl quit A822PGH Base address Bx2880 IrqNo 15 DmaNo 1 Assume JP6 set to internal 2M clock Ifthe counterO is functioning normally the value will increment automatically OME A 822PGL PGH Hardware Manual 57 5 2 4 SPECIAL TEST The SPECIAL TEST menu contains four submenu items they are D A Volt Set DIO Bit Pattern IRQ Clock Test and DMA Clock Test These functions are reserved for factory testing Betup Gal ibration Funct ionfjest
27. ndent timer The software driver A 822 delay is designed for this purpose If this subroutine is used then counter2 as described in sec 2 6 is reserved by the software driver to implement the machine independent timer OME A 822PGL GAIN CONTROL CODE TABLE ae a e y 5V m Bh B uv h a Bl psu W 12v b b p b Bl psu p w 009sv o b p h vm Ee Lo wow b o p po UN pw p pvesv b h p h ww a kh vev h p hp UNI psu 8 DVtol2sV D h h h pl pus fos ftv jq p p p BI Bipolar UNI Unipolar X don t care N A not available OME A 822PGL PGH Hardware Manual 20 OME A 822PGH GAIN CONTROL CODE TABLE TETEN SE ER m pa e Bev h b h BI ou fioo oov p b h b BI ft3o0us i00 p oosv p b h fh om dm i C p ux psu o ew b x jas ho peor b h E h UNI 1300us 1000 B pe ps fv 1 pb bb Bl psu 5 piv h b pbp h BI ou fo rov h b h bp B fi3oous soo oov h b h h BI Bipolar UNI Unipolar X don t care N A not available 2 4 7 A D Multiplex Control Register WRITE Base A A D Multilexer Control Register Format pa for fo D3 A D input channel selection data 4 bits D3 D0 D3 MSB DO LSB X don t care Single ended mode D3 D0 Differential mode D2 D0 D3 don t care The OME A 822PGL PGH provides 16 single ended or 8 differential analog input signals In single ended mode D3 D0 selects the active
28. no RQ no save option it ABZZPGH Base address 6x266 IrqNo 15 DmaNo 1 OME A 822PGL PGH Hardware Manual 46 5 2 1 Setup The Setup menu allows the user to setup the board configuration There are six functions in this muen Card type Base Addresss DMA no IRQ no Save option eXit Card type lt Up Down gt key to select A 822PGL PGH lt Enter gt key to select Base Address lt Up Down gt key to select base address lt Enter gt key to select DMA no lt Up Down gt key to select DMA no lt Enter gt key to select IRQ no lt Left Right gt key to select IRQ no lt Enter gt key to select Save option lt Left Right gt key to select yes no lt Enter gt key to select eXit lt Left Right gt key to select yes no lt Enter gt key to select Base address selection screen alibration Funct ionfjest syecialTest 8822 Card Base Address Address x206 ON HEHEHE B 123456 nn a 1 V JP1 Escl quit but not change base address CR change base address and quit 5U i 11 Inc Address 11 Dec Address DIFF EXT 12 SINGL JP3 SH1 Address 266H 0 m Hg m 12345 z DMA 3 B JPs E NO DMA 34567911111N IRQ OME A 822PGL PGH Hardware Manual 47 DMA no and IRQ no selection screen Setup Ga libration Funct ionfjest sfjec ialTest Ie lp A822 Card DMA No JP JP8 pma B ES DM 3 NODMA DMA 1 Escl quit but not change DMA No CR change DMA No
29. onfiguration file the user must select the save function to save any changes When the A82XDIAG EXE utility starts it will automatically check if the jumper setting of the I O base address matches the value stored in the configuration file If the addresses do not match an error message will appear as shown below OME A 822PGL PGH Hardware Manual 44 balibrat ion Funct ionfjest sjyecialTest Error Cannot find A822 card in address 8x228 A822PGH Base address x228 IrqNo 12 DmaNo 3 Although you can continue by pressing any key it is recommended that the jumper situation be corrected since many operations in the A82XDIA utility check the I O base address and report an error if the configuration file and the actual jumper settings do not match OME A 822PGL PGH Hardware Manual 45 5 2 Running The Diagnostic Utility The initial screen of A82XDIAG is shown below There are five main menus in the initial screen They are Setup Calibration FunctionTest sPecialTest and Help Use the Left or Right key to select the main menu Then use the Up or Down key to select the menu item Alternately the user can press the command key to highlight the menu item A command key in a menu item is the character that is highlighted To execute a function associated with a highlighted menu item just press lt Enter gt and press lt Esc gt to abort the current function Salibration Funct ionfjest sjyecialTest Base pm IMA
30. or thermocouple measurement and a terminal block for easy signal connection The CJC is connected to A D channel 0 The OME A 822PGL PGH can connect to an OME DB 8225 through a 37 pin D sub connector on CN3 3 2 2 OME DB 37 The OME DB 37 is a general purpose 37 pin screw terminal board It connects to a 37 pin D sub connector 3 2 3 OME DB 16P The OME DB 16P is a 16 channel isolated digital input board The OME A 822PGL PGH provides 16 channels of non isolated TTL compatible digital inputs via the CN1 connector If used with the OME DB 16P the OME A 822PGL PGH can provide 16 channels of isolated digital input Isolation can protect the computer if abnormal or excessive input signals are received 3 2 4 OME DB 16R The OME DB 16R provides 16 SPDT relay outputs The OME A 822PGL PGH provides 16 TTL compatible digital outputs via CN2 If connecting to the OME DB 16R the OME A 822PGL PGH can provide 16 relay outputs to control external devices OME A 822PGL PGH Hardware Manual 40 4 Calibration The OME A 822PGL PGH is factory calibrated for optimum performance Recalibration is suggested for high vibration environments The following items are required for calibrating the OME A 822PGL PGH One 6 digit multimeter One stable voltage source 4 9988V Diagnostic program this program included with the OME A822PGL PGH 4 1 Description of Variable Resistors There are seven variable resistors VRs on the OME A 8
31. os jp jp jo fj jp j WRITE Base 7 Channel 2 D A High Byte Data Format x k xp po jp os D A 12 bit output data D11 D0 D11 MSB DO LSB X don t care The D A converter will convert the 12 bit digital data to an analog output The lower 8 bits of D A channel 1 are stored in the address BASE 4 and the high 4 bits are stored in the address BASE 5 The address BASE 6 and BASE 7 store the 12 bit data for D A channel 2 The D A output latch registers are designed with a double buffered structure so the analog output latch registers will not update until the high 4 bit digital data are written If the user sends the high 4 bit data first the D A 12 bit output latch registers will update at once So the lower 8 bits will be the previous data latched in the register This action will cause an error on the D A output voltage The user must send the low 8 bits first and then send the high 4 bits to update the 12 bit D A output latch register NOTE Send the low 8 bits first then send the high 4 bits OME A 822PGL PGH Hardware Manual 18 2 4 4 Dll Input Buffer Register READ Base 6 D I Input Buffer Low Byte Data Format D ps fps jp jp jp or jp j READ Base 7 D I Input Buffer High Byte Data Format Dis pia pi3 pi2 pii DIO D I 16 bits input data D15 D0 D15 MSB DO LSB The OME A 822PGL PGH provides 16 TTL compatible digital inputs The low 8 bits are stored in the address BASE 6 The
32. ould be made between analog ground and the negative of the power supply An isolated power supply is strongly suggested Figure 4 demonstrates how to connect a 4 20mA current loop Since the card reads voltages the current is converted to voltage by passing it through a shunt resistor By Ohms law V IR when using a 250Q resistor 4 mA will be converted to 1V and 20mA to 5V If the source is linear the output voltage range will also be linear OME A 822PGL PGH Hardware Manual 32 Figure 1 A Connecting to a Grounded Source in Differential Mode A D CHn HI A D CHn LO AGND i If the source is grounded a second ground connection on the card could result in a ground loop n Channel Number Figure 1 B Connecting to a Floating Source in Differential Mode A D CHn A D CHn 7 n Channel Number OME A 822PGL PGH Hardware Manual 33 Figure 2 Connecting to Multiple Sources in Single Ended Mode A D CHO A D CH1 A D CHn n Channel Number Figure 3 Connecting to Bridge Transducers A D CHOHI A D CHOLO A D CH1HI A D CH1LO A D CHnHI n Channel Number Vex Transducer Excitation OME A 822PGL PGH Hardware Manual 34 Figure 4 Connecting to a 4 20 mA Source A D CHn n Channel Number R is a shunt resistor A 2500 shunt resistor converts 4 20mA to 1 5Vdc Signal Shielding The signal shielding is the same for the connections shown in Figure 1 to Figure 4
33. ple rate of the A D converter is 100 K samples sec Software selectable input ranges PC AT compatible ISA bus A D trigger mode software trigger pacer trigger external trigger 16 single ended or 8 differential analog input signals Programmable high gain 0 5 1 5 10 50 100 500 1000 OME A 822PGH Programmable low gain 0 5 1 2 4 8 OME A 822PGL 2 channel 12 bit D A voltage output 16 digital input 16 digital output TTL compatible Interrupt handling Bipolar Unipolar operation I channel general purpose programmable 16 bit timer counter OME A 822PGL PGH Hardware Manual 4 1 3 Specifications 1 3 1 Power Consumption 5V 960 mA maximum OME A 822PGL PGH Operating temperature 20 C to 60 C 1 3 2 Analog Inputs Channels 16 single ended or 8 differential Input range software programmable OME A 822PGL bipolar E10V 5V 2 5V 1 25V 0 0625V unipolar 0 to 10V 0 to 5V 0 to 0 2 5V 0 to 1 25 V OME A 822PGH bipolar 10 5V 1V 0 5V 0 1V 0 05V 0 01V 0 005V unipolar 0 to 10V 0 to 1V 0 to 0 1V 0 to 0 01V Input current 250 nA max 125 nA typical at 25 deg C On chip sample and hold Caution refer to Sec 2 9 first Over voltage continuous single channel to 70 Vp p Input impedance 10 Q 6pF 1 3 3 A D Converter Type successive approximation Burr Brown ADS 774 or SIPEX SP774B equivalent Conversion time 8 microsec
34. ress the ESC Key Select and Execute the D A D OFFSET item Input a stable OV to A D channel 0 pin of CN3 Adjust VR1 until the A D data shown on the screen is between 2048 to 2049 Press the ESC Key Repeat step_3 to step_11 until there is no need to adjust VR2 VR1 Select and Execute E PGA OFFSET item Input a stable OV to A D channel 0 pin I of CN3 Adjust VR7 until the A D data shown in screen between 2048 to 2049 Press ESC Key Select and Execute F PGA REFERENCE item Input a stable OV to A D channel 0 pinl of CN3 Adjust VR6 until the A D data shown on screen is between 0 and I OME A 822PGL PGH Hardware Manual 43 5 Diagnostic Utility 5 1 Introduction The A82XDIAG EXE diagnostic utility is a menu driven program which allows complete testing of the OME A 822PGL PGH board To run the diagnostic utility change to the subdirectory used in the installation process C OME A 822 for example Then type A82XDIAG lt Enter gt to start the application These steps are shown below C gt CD A822 lt Enter gt C A822 gt CD DIAG lt Enter gt C A822 DIAG gt A82XDIAG lt Enter gt A configuration file named OME A 82X CFG is associated with the A82XDIAG EXE programThe configu ration of the OME A 822PGL PGH board is stored in this file The stored information includes the board s I O base address interrupt number and DMA channel Changes are not automatically saved to the c
35. ries A Benchtop Laboratory Meters 4 Controllers Calibrators Simulators amp Pumps 4 Industrial pH amp Conductivity Equipment DATA ACQUISITION A Data Acquisition amp Engineering Software 4 Communications Based Acquisition Systems 4 Plug in Cards for Apple IBM amp Compatibles A Datalogging Systems A Recorders Printers amp Plotters HEATERS 4 Heating Cable l Cartridge amp Strip Heaters A Immersion amp Band Heaters WF Flexible Heaters 4 Laboratory Heaters ENVIRONMENTAL MONITORING AND CONTROL 4 Metering amp Control Instrumentation 4 Refractometers 4 Pumps amp Tubing A Air Soil amp Water Monitors A Industrial Water amp Wastewater Treatment A pH Conductivity amp Dissolved Oxygen Instruments M4031 0104
36. s SV or 10V for example especially if the signal is coming from an isolated device such as a signal conditioner Several different types of wiring diagrams are discussed below Figure 1 A shows a differential connection to a grounded source If the source is grounded making a second connection to the card s ground could cause a ground loop resulting in erroneous data It is important to note that the maximum common mode voltage between the input source and AGND is 70Vp p If the card is connected to a source with a common mode voltage greater than 70Vp p the input multiplexer will be permanently damaged When measuring common mode voltage it is best to use an oscilloscope rather than a multi meter Figure 1 B shows a differential connection to a floating source In such cases a connection should be made between the low channel input and analog ground Figure 2 shows connection of multiple sources in single ended mode This connection assumes creating one common ground will not cause a problem This is normally the case when connecting to devices that are isolated or floating Figure 3 demonstrates how to connect bridge transducers Bridge transducers include strain gauges load cells and certain type of pressure transducers The diagram assumes that there is a single external power supply providing power to the bridge Each bridge is connected to a differential channel No connection is made between channel low and analog ground A connection sh
37. sion mode will be used The software driver supports three different modes polling interrupt and DMA The polling mode sec 2 4 9 is the simplest but most limited The software driver should be used for interrupt or DMA mode The analog input signals come from CN3 These signals may be single ended or differential and must match the setting of JP3 The multiplexer can select 16 single ended or 8 differential signals into the gain control module The settling time of multiplexer depends on the source resistance Because the software doesn t account for the settling time the user should provide sufficient delay when switching channels sec 2 4 7 The gain control module also requires settling time if the gain control code is changed Since the software doesn t account for settling time the user should provide sufficient delay if the gain control code is changed sec 2 4 6 The software driver provides a machine independent timer A 822 Delay for settling time delay This subroutine assumes that the JP6 jumper is set to the internal 2M clock and uses counter to implement a machine independent timer If A 822 Delay is used counterO will be reserved and can not be used as a user programmable timer counter The A D converter needs a trigger signal to start an A D conversion cycle The OME A 822PGL PGH supports three trigger modes software pacer and external trigger The result of the A D conversion can be transferred into th
38. t the DMA channel by adjusting jumpers JP7 and JP8 Two hardware DMA requests signals are sent sequentially to the PC when an A D conversion is completed The single mode transfer of the 8237 is suggested OME A 822PGL PGH Hardware Manual 29 2 7 4 Using software trigger and polling transfer If the user needs to control the A D converter without the A 822 software driver software trigger and polling transfer is suggested The program steps are listed below 1 send 0x01 to the A D mode control register software trigger polling transfer refer to Sec 2 4 8 2 send channel number to the multiplexer control register refer to Sec 2 4 7 3 send the gain control code value to the gain control register refer to Sec 2 4 6 4 delay the settling time refer to Sec 2 4 6 and Sec 2 4 7 5 send any value to the software trigger control register to generate a software trigger signal refer to Sec 2 4 9 6 scan the READY bit of the A D high byte data until READY 0 refer to Sec 2 4 2 7 read the 12 bit A D data refer to Sec 2 4 2 8 convert the 12 bit binary data to a floating point value OME A 822PGL PGH Hardware Manual 30 2 8 D A Conversion The OME A 822PGL PGH provides two 12 bit D A converters Before using the D A converter function you should address the following items D A output register BASE 4 BASE 5 BASE 6 BASE 7 sec 2 4 3 JP1 jumper set to internal reference voltage 5V or 10V sec 2 3 1 JP2
39. tage output 14 User timer counter s GATE control input control input w Sd timer counter output Bs moeie output l l 7 External trigger source 36 Reserved input TTL 18 Reserved 37 User timer counter external clock input internal 2M 5V Output XXXXXXX This pin not available OME A 822PGL PGH Hardware Manual 38 DIFFERENTIAL SIGNALS CN3 Analog input Analog output and Timer Counter Pin Assignment Analog Input 0 3 jAmoginput2 s 22 Analog Input 4 Analog input 3 p3 Analog Input 3 Analog Input 4 2 Analog Input 5 Ds Analog Input 5 7 Anslog Input 6 26 Analog Input 6 Analog Input 7 7 D7 Analog Input 7 Analog GND bg Analog GND Analog GND D9 Analog GND D A internal 5V 10V NE J voltage output D A channel 0 external voltage reference input 13 voltage reference output voltage reference input 30 or A voltage output control input control input IgG timer counter output 35 ITimer counter 1 output 1 17 External trigger source 36 Reserved input TTL 18 Reserved 37 User timer counter external clock input internal 2M 19 fsVouput XXXXXXX This pin not available OME A 822PGL PGH Hardware Manual 39 3 2 Daughter Board The OME A 822PGL PGH can be connected with many different daughter boards The daughter boards are described below 3 2 1 OME DB 8225 The OME DB 8225 provides an on board CJC Cold Junction Compensation circuit f
40. those are polling interrupt and DMA Before using the A D conversion functions the user should be aware of the following issues A D data register BASE 4 BASE 5 stores the A D conversion data sec 2 4 2 A D gain control register BASE 9 selects the gain sec 2 4 6 A D multiplexer control register BASE A selects the analog input channel sec 2 4 7 A D mode control register BASE B selects the trigger type and transfer type sec 2 4 8 A D software trigger control register is BASE C sec 2 4 9 JP3 selects single ended or differential input sec 2 3 3 JP4 selects internal external trigger sec 2 3 4 JP5 selects the IRQ level sec 2 3 5 JP6 selects the internal external clock for counter0 sec 2 3 6 JP7 and JP8 selects the DMA channel sec 2 3 7 There are 3 trigger types software pacer external trigger sec 2 4 8 There are 3 transfer types polling interrupt DMA sec 2 4 8 The block diagram is given below OME A 822PGL PGH OME A 822PGL PGH Hardware Manual 27 2 7 1 A D conversion flow Before using the A D converter the user should configure the following hardware settings 1 select single ended or differential input JP3 refer to Sec 2 9 first 2 select internal trigger or external trigger JP4 3 select IRQ level if needed JP5 4 select DMA channel if needed JP7 JP8 5 select internal clock or external clock for counter if needed JP6 The user must decide which A D conver
41. tion 32 2 10 Using OME DB 8225 CJC Output 36 Connector 37 3 1 CNI CN2 CN3 Pin Assignment 37 3 2 Daughter Board 40 3 2 1 OME DB 8225 40 3 2 2 OME DB 37 40 3 2 3 OME DB 16P 40 3 2 4 OME DB 16R 40 Calibration 41 4 1 Description of Variable Resistors 41 4 2 D A Calibration 42 4 3 A D Calibration 43 Diagnostic Utility 44 5 1 Introduction 44 52 Running The Diagnostic Utility 46 52 1 Setup 47 5122 CALIBRATION 49 5 2 3 FUNCTION TEST 50 5 2 4 SPECIAL TEST 58 5 2 5 Help 59 OME A 822PGL PGH Hardware Manual 3 1 Introduction 1 1 General Description The OME A 822PGL PGH is a high performance multifunction analog digital I O board for PC AT compatible computers The OME A 822PGL provides low gain 0 5 1 2 4 8 The OME A 822PGH provides high gain 0 5 1 5 10 50 100 500 1000 The OME A 822PGL PGH contains a 12 bit ADC with up to 16 single ended or 8 differential analog inputs The maximum sample rate of the A D converter is 100Ksample sec There are two 12 bit DACs with voltage output 16 channels of TTL compatible digital input 16 channels of TTL compatible digital output and one 16 bit counter timer channel for timing input and output The following A D performance bench marks were achieved on a 33MHz 486 computer e Polling mode about 100Ksample sec with single task OS Interrupt mode about 60Ksample sec with single task OS DMA mode about 100Ksample sec with single task OS 1 2 Features The maximum sam
42. tion 4 1 2 Features 4 1 3 Specifications 5 1 3 1 Power Consumption 5 1 3 2 Analog Inputs 5 1 3 3 A D Converter 5 1 3 4 DA Converter 6 1 3 5 Digital I O 6 1 3 6 Interrupt Channel 6 1 3 7 Programmable Timer Counter 7 1 3 8 Direct Memory Access Channel DMA 7 1 4 Applications 8 1 5 Product Check List 8 2 Hardware Configuration 9 2 1 Board Layout 9 2 2 T O Base Address Setting 10 2 3 Jumper Settings 11 2 3 1 JP1 D A Internal Reference Voltage Selection 11 2 3 2 JP2 D A Int Ext Ref Voltage Selection 12 2 3 3 JP3 Single ended Differential Selection 12 2 3 4 JP4 A D Trigger Source Selection 13 2 3 5 JP5 Interrupt Level Selection 13 2 3 6 JP6 User Timer Counter Clock Input Selection 14 2 3 7 JP7 DMA DACK Selection JP8 DMA DRQ Selection 15 2 4 I O Register Address 16 2 4 1 8254 Counter 17 2 4 2 A D Input Buffer Register 17 2 4 3 D A Output Latch Register 18 2 4 4 D I Input Buffer Register 19 2 4 5 Clear Interrupt Request 19 2 4 6 A D Gain Control Register 20 2 4 7 A D Multiplex Control Register 21 2 4 8 A D Mode Control Register 22 2 4 9 A D Software Trigger Control Register 23 2 4 10 D O Output Latch Register 24 2 5 Digital I O 25 2 6 8254 Timer Counter 26 2 7 A D Conversion 27 2 7 1 A D conversion flow 28 2 7 2 A D Conversion Trigger Modes 29 2 7 3 A D Transfer Modes 29 2 7 4 Using software trigger and polling transfer 30 2 8 D A Conversion 31 2 9 Analog Input Signal Connec
43. ving been damaged as a result of excessive corrosion or current heat moisture or vibration improper specification misapplication misuse or other operating conditions outside of OMEGA control Components which wear are not warranted including but not limited to contact points fuses and triacs OMEGA is pleased to offer suggestions on the use of its various products However OMEGA neither assumes responsibility for any omissions or errors nor assumes liability for any damages that result from the use of its products in accordance with information provided by OMEGA either verbal or written OMEGA warrants only that the parts manufactured by it will be as specified and free of defects OMEGA MAKES NO OTHER WARRANTIES OR REPRESENTATIONS OF ANY KIND WHATSOEVER EXPRESS OR IMPLIED EXCEPT THAT OF TITLE AND ALL IMPLIED WARRANTIES INCLUDING ANY WARRANTY OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED LIMITATION OF LIABILITY The remedies of purchaser set forth herein are exclusive and the total liability of OMEGA with respect to this order whether based on contract warranty negligence indemnification strict liability or otherwise shall not exceed the purchase price of the component upon which liability is based In no event shall OMEGA be liable for consequential incidental or special damages CONDITIONS Equipment sold by OMEGA is not intended to be used nor shall it be used 1 as a Basic Component und

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