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Intel D810EMO User's Manual

1. 2 50 1 S00 000 po 0000000000o00000r Description 000000000000 BESSERES C OM08926 Reference Designator Tomm OO Fan 2 chassis fan Fan 1 processor fan Primary IDE Slimline IDE Serial debug port Power PCI ATAPI CD ROM see Table 22 page 42 see Table 23 page 42 see Table 24 page 42 see Table 25 page 43 see Table 26 page 43 see Table 27 page 44 see Table 28 page 45 see Table 29 page 45 JS J7J1 J7E1 J8E1 J7C1 J8B1 J4B1 J2D1 Figure 5 Internal I O Connectors For information about The power connector The functions of the fan connectors Refer to Section 1 13 2 1 page 30 Section 1 13 2 2 page 30 41 Intel Desktop Board D810EMO MO810E Technical Product Specification 42 Table 22 Chassis Fan Connector J2J1 Pin 1 Signal Name Ground 12 V Ground Table 23 Processor Fan Connector J7J1 Pin Signal Name 1 Ground 2 12 V 3 FAN_TACH1 Table 24 Primary IDE Connector J7E1 Pin a aj ow 13 15 17 19 21 23 25 27 29 31 33 35 37 39 Signal Name Reset IDE Data 7 Data 6 Data 5 Data 4 Data 3 Data 2 Data 1 Data 0 Ground DDRQO 1 0 Write UO Read IOCHRDY DDACKO IRQ 14 DAG Address 1 DAGO Address 0 Chip Select 1P Activity Pin 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38
2. Serial Port _ Port Interface Controller Cache PCI Bus Hardware a SMBus ab Bus Digital Monitor Controller AC 97 Link 10 100 ST D ZE lt Mbps gt lt PCI Bus gt CD ROM Ethernet Subsystem Analog ee eee Coden Line Out PCI Bus GE Connector OM09093 12 Figure 2 Block Diagram 1 2 Online Support Product Description Find information about Intel desktop boards under Product Info or Customer Support at these World Wide Web sites http www intel com design motherbd http support intel com support motherboards desktop 1 3 Design Specifications Table 2 lists the specifications applicable to the D810EMO MO810E board Table 2 Specifications Reference Specification Version Revision Date This specification is Name Title and Ownership available at AC 97 Audio Codec 97 Version 2 1 ftp download intel com May 1998 pc supp platform ac97 Intel Corporation ACPI Advanced Configuration Version 1 0 http www teleport com acpi and Power Interface July 1 1998 Specification 2X only Intel Corporation Microsoft Corporation and Toshiba Corporation AGP Accelerated Graphics Port Version 2 0 the Accelerated Graphics Interface Specification May 4 1998 Implementers Forum at Intel Corporation http Awww agpforum org AMI BIOS American Megatrends AMIBIOS 99 http www ami com amibios BIOS Specification June 1999 bi
3. e Disabled e 1 IDE default e 2 IDE e 3 IDE e 4 IDE Description Specifies the boot sequence according to the device type The computer will attempt to boot from up to four devices as specified here Only one of the devices can be an IDE hard disk drive To specify the boot sequence 1 Select the boot device with lt T gt or lt J gt 2 Press lt Enter gt to set the selection as the intended boot device The default settings for the first through fourth boot devices are respectively e ATAPI CDROM e IDE HDD e Intel UNDI PXE 2 0 build 071 e Disabled NOTE To configure the computer to boot from an IDE hard disk drive set a boot device in this Setup feature to DE HDD Determine the IDE channel and master or slave mode of the drive Then in the next Setup feature IDE Drive Configuration set that channel and mode to 1 IDE 1 IDE specifies the IDE hard disk drive to boot from The 2 through 4 IDE settings are ignored See the note above for more information To specify the drive to boot from 1 Use lt T gt or lt gt to select the channel and master or slave mode of the drive to boot from 2 Press lt Enter gt 3 Use lt T gt or lt J gt to select 1 IDE 4 Press lt Enter gt to set the selection Notes 1 ARMD FDD ATAPI removable device floppy disk drive LS 120 ARMD HDD ATAPI removable device hard disk drive UNDI Universal network interface car
4. e Support for self identifying peripherals that can be connected or disconnected while the computer is running e Automatic mapping of function to driver and configuration e Support for isochronous and asynchronous transfer types over the same set of wires e Support for up to 127 physical devices e Guaranteed bandwidth and low latencies appropriate for telephony audio and other applications e Error handling and fault recovery mechanisms built into the protocol gt NOTE Computer systems that have an unshielded cable attached to a USB port may not meet FCC Class B requirements even if no device or a low speed USB device is attached to the cable Use shielded cable that meets the requirements for full speed devices For information about Refer to The location of the USB connectors on the back panel l Figure 4 page 39 The signal names of the USB connectors Table 17 page 40 The location of the USB port connector for the front panel l Figure 6 page 46 The signal names for the USB port connector for the front panel Table 30 page 47 The USB and UHCI specifications Table 2 page 13 Intel Desktop Board D810EMO MO810E Technical Product Specification 1 6 3 IDE Support The board has two independent bus mastering IDE interfaces These interfaces support e ATAPI devices such as CD ROM drives e ATA devices using the transfer modes listed in Table 51 on page 79 The BIOS supports logical block addressing LBA and
5. Denmark and Finland 2 15 2 EMC Regulations 58 Table 40 lists the EMC regulations the board complies with when it is correctly installed in a compatible host system Table 40 EMC Regulations Regulation Title FCC Class B Title 47 of the Code of Federal Regulations Parts 2 and 15 Subpart B pertaining to unintentional radiators USA CISPR 22 2 Edition 1993 Limits and methods of measurement of Radio Interference Class B Characteristics of Information Technology Equipment International VCCI Class B ITE Implementation Regulations for Voluntary Control of Radio Interference by Data Processing Equipment and Electronic Office Machines Japan EN55022 1994 Class B Limits and methods of measurement of Radio Interference Characteristics of Information Technology Equipment Europe EN50082 1 1992 Generic Immunity Standard Currently compliance is determined via testing to IEC 801 2 3 and 4 Europe ICES 003 1997 Interference Causing Equipment Standard Digital Apparatus Class B Including CRC c 1374 Canada AS NZ 3548 Australian Communications Authority ACA Standard for Electromagnetic Compatibility Technical Reference 2 15 3 Certification Markings This printed circuit assembly has the following product certification markings UL Joint Recognition Mark Consists of small c followed by a stylized backward UR and followed by a small US Component side Manufacturer
6. Mode AC Watts 3 3V 45V 12 V 12V 5 VSB Windows 98 ACPISO 46W 190A 223A 02A 002A 017A Windows 98 ACPI S1 22W 1 37A 0 38 A 10 24 0 02A 0 143A Windows 98 ACPIS3 IW looa looa looa 00A 013A Windows 98 ACPI S5 1w 00A 00A 0 0A 0 0A 10 11 A 53 Intel Desktop Board D810EMO MO810E Technical Product Specification 2 11 3 Power Supply Considerations System integrators should refer to the power usage values listed in Table 35 when selecting a power supply for use with this board The power supply must comply with the following recommendations found in the indicated sections of the ATX form factor specification see Table 2 on page 13 The potential relation between 3 3 VDC and 5 VDC power rails Section 4 2 The current capability of the 5 VSB line Section 4 2 1 2 All timing parameters Section 4 2 1 3 All voltage tolerances Section 4 2 2 2 11 4 Fan Power Requirements Table 36 lists the maximum DC voltage and current requirements for the chassis fan when the board is in sleep mode or normal operating mode Power consumption is independent of the operating system used and other variables 54 Table 36 Chassis Fan J3A2 DC Power Requirements Mode Voltage Maximum Current Amps Normal SO 12 VDC 250 mA Sleep S1 12 VDC 250 mA Sleep S3 0 VDC 0 mA For information about Refer to The location of the chassis fan connector l Figure 5 page 41 The signal names of the
7. 9 WO Shield Dimensions iiio en a dee E eege eA aE 52 10 Eligh Temperature Zong Ss tac e a A R 55 11 Memory Map of the Flash Memory Device occoconcnccccccncccccconconnnannnccccnnncnnnnnannncncnnnnnns 62 Tables Te RG AIG SUMMA Y EE 10 A O 13 3 Processors Supported by the EE 16 4 System Memory Confguratton ENNEN 17 5 Supported Graphics Refresh Rates AAA 22 6 LAN Connector LED States tee e dra 26 7 Effects of Pressing the Power Switch 27 8 Power States and Targeted System Power 28 9 Wake Up Devices and WC 29 10 Fan Connector Kee aia Me Se E a eee eee EE 30 1T System Memory Map ad eege eege 33 12 MOM odo 34 13 DMA GhaninelS simi 35 14 PCI Configuration Space EE ad 36 E AAT oE EEEE EE E A 36 16 PCI Interrupt Routing Map cocida 37 17 USB ee 40 18 VGA Port EELER See ee 40 Ve BT Ree Lee A0 20 Audio Line EE 40 vii Intel Desktop Board D810EMO MO810E Technical Product Specification viii MISA COMeciO start ct 40 Chassis Fan Connector Eh BEE 42 Processor Fan Connector GIS Geesse id eset 42 Primary IDE Connector J Eran 42 Slimline IDE Connector GET 43 Serial Debug Port Connector UCI 43 Power Connector LST Seeerei 44 PCI Bus Connector J4B1 dios 45 ATAPI CD ROM Connector J2D1 EE 45 USB Por Connector JVA EE 47 Front Panel Connector dC Tis id da 47 slates for a single colored Power LED incida ii 48 States for a Dual colored Power LED ANNE 48 BIOS Setup Configuration Jumper
8. If no password is set any user can change all Setup options For information about Refer to Setting user and supervisor passwords Section 4 4 5 page 82 69 Intel Desktop Board D810EMO MO810E Technical Product Specification 70 4 BIOS Setup Program What This Chapter Contains Ce W lle dee e AAA 71 4 27 Matpiebaneechlentt tests Seel ci 72 SN E NN 74 44 Agvaneed Men a Se 75 445 SEGUN Melendi 83 SG Power Mel e ii aada 84 A BIO A Ed 85 AB AECH len Hee Mee 87 4 1 Introduction The BIOS Setup program can be used to view and change the BIOS settings for the computer The BIOS Setup program is accessed by pressing the lt F2 gt key after the Power On Self Test POST memory test begins and before the operating system boot begins The menu bar is shown below Maintenance Main Advanced Security Power Boot Exit Table 42 lists the BIOS Setup program menu functions Table 42 BIOS Setup Program Menu Functions Maintenance Main Advanced Security Power Boot Exit Clears Allocates Configures Sets Configures Selects boot Saves or passwords and resources for advanced passwords power options and discards BIS credentials hardware features and security management power supply changes to enables components available features features controls Setup extended through the program configuration chipset options modes NOTE The Setup screens described in this chapter apply to boards with BIOS identifi
9. Velocity change of 170 inches second Packaged Half sine 2 millisecond Product Weight pounds Free Fall inches Velocity Change inches sec lt 20 36 167 21 40 20 152 41 80 24 136 81 100 18 118 Vibration Unpackaged 5 Hz to 20 Hz 0 01 g Hz sloping up to 0 02 g Hz 20 Hz to 500 Hz 0 02 g Hz flat Packaged 10 Hz to 40 Hz 0 015 g Hz flat 40 Hz to 500 Hz 0 015 g Hz sloping down to 0 00015 g Hz 57 Intel Desktop Board D810EMO MO810E Technical Product Specification 2 15 Regulatory Compliance This section describes the board s compliance with safety and EMC regulations 2 15 1 Safety Regulations Table 39 lists the safety regulations the board complies with when it is correctly installed in a compatible host system Table 39 Safety Regulations Regulation Title UL 1950 CSA950 3 edition Bi National Standard for Safety of Information Technology Equipment Dated 07 28 95 including Electrical Business Equipment USA and Canada EN 60950 2 Edition 1992 with The Standard for Safety of Information Technology Equipment including Amendments 1 2 3 and 4 Electrical Business Equipment European Community IEC 950 2 edition 1991 with The Standard for Safety of Information Technology Equipment including Amendments 1 2 3 and 4 Electrical Business Equipment International EMKO TSE 74 SEC 207 94 Summary of Nordic deviations to EN 60950 Norway Sweden
10. Z Io0T mUuo uwuys gt Crystal Semiconductor CS4297A codec Creative ES1373D digital audio controller 4 MB display cache Back panel I O connectors Intel 82810E DC 133 GMCH Processor socket DIMM socket Primary IDE connector Slimline Secondary IDE connector Coos er SC H OM08923 Front panel connector Power connector SMSC LPC47M102 I O controller Intel 82801AA ICH Intel 82559 PCI LAN Controller Speaker Battery PCI bus connector Figure 1 Board Components Intel Desktop Board D810EMO MO810E Technical Product Specification 1 1 3 Block Diagram Figure 2 is a block diagram of the major functional areas of the board ee ce eee USB gt Porto Primary E Secondary IDE ATA33 66 ENEE Interface USB ee ergeet lt gt Hub O 66 100 133 rocessor MHz Host Bus Socket l 4 810E Chipset dl 82810E 100 MHz 82802AB SDRAM LR Graphics Memory lg AHA 82801AA I O Controller Hub Firmware Hub Bus Controller Hub Bus ICH FWH GMCH E EE S 2 x DIMM ree Socket H e 4 MB VGA Display _ gt Display LPE VO
11. 2 3 3 V 12 12 V 3 Ground 13 Ground 4 5 V 14 PS ON power supply remote on off 5 Ground 15 Ground 6 5 V 16 Ground 7 Ground 17 Ground 8 PWRGD Power Good 18 PS_FAN_EN 9 5 VSB 19 5 V 10 12 V 20 5 V 44 Technical Reference Table 28 PCI Bus Connector J4B1 Pin A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 Signal Pin Signal Pin Signal Pin Signal Ground TRST B1 12V A32 AD16 B32 ADI7 raw m2 Ground TCK A33 33V B33 C BE2 45V TMS B3 Ground A34_ FRAME B34 Ground 45 V TDI 1 B4 Noconnect TDO A35 Ground B35 IRDY 5 V B5 5V A36 TRDY B36 3 3V NTa Bee 5v A87 Ground B37 DEVSEL INTC IP NIR A38 STOP B38 Ground 5 V B8 INTD A39 3 3V B39 LOCK Reserved B9 No connect PRSNT1 A40 Reserved B40 PERR 4 5V VO B10 Reseved Ai Reserved B41 3 3V Reserved B11 No connect PRSNT2 A42 Ground B42 SERR Ground B12 Ground A43 PAR B43 3 3V Ground B13 Ground A44 AD15 B44 C BE1 33Vaux B14 Reseved A8 3 3V B45 AD14 RST B15 Ground A46 AD13 B46 Ground 45V 0 B16 CLK A47 ADN B47 AD12 GNT B17 Ground A48 Ground B48 AD10 Ground B18 REQ A49
12. 40 Signal Name Ground Data 8 Data 9 Data 10 Data 11 Data 12 Data 13 Data 14 Data 15 Key Ground Ground Ground P_ALE Cable Select pullup Ground Reserved ATA_66 Detect DAG2 Address 2 Chip Select 3P Ground Table 25 Slimline IDE Connector J8E1 Technical Reference Pin Signal Name Pin Signal Name 1 AUD_LCR_R 2 AUD_RCD_R 3 AUD_CDGND_R 4 AUD_CDGND_R 5 N C 6 N C 7 Reset IDE 8 Ground 9 Data 7 10 Data 8 11 Data 6 12 Data 9 13 Data 5 14 Data 10 15 Data 4 16 Data 11 17 Data 3 18 Data 12 19 Data 2 20 Data 13 21 Data 1 22 Data 14 23 Data 0 24 Data 15 25 Ground 26 Key 27 DDRQ1 28 Ground 29 UO Write 30 Ground 31 UO Read 32 Ground 33 IOCHRDY 34 P_ALE Cable Select pullup 35 DDACK1 36 Ground 37 IRQ 15 38 Reserved 39 DAG1 Address 1 40 Reserved 41 DAGO Address 0 42 DAG2 Address 2 43 Chip Select 1S 44 Chip Select 3S 45 Activity 46 Ground 47 VCC 48 VCC 49 Ground 50 N C Table 26 Serial Debug Port Connector J7C1 Pin Signal Name Pin Signal Name 1 DCD Data Carrier Detect 2 DSR Data Set Ready 3 SIN Serial Data In 4 RTS Request to Send 5 SOUT Serial Data Out 6 CTS Clear to Send 7 DTR Data Terminal Ready 8 RI Ring Indicator 9 10 Ground Key 43 Intel Desktop Board D810EMO MO810E Technical Product Specification Table 27 Power Connector J8B1 Pin Signal Name Pin Signal Name 1 3 3 V 11 3 3 V
13. Chapter Contains wech sch sesch sch sch sech sesch sesch sc ch sesch sch sch A hb ch hb OD OO zl OO Ob G hi A OM zk OH KEE dee e de E heen 10 Online Supportere aa a dasa ak st nd set ease tet ea sles aed age deen dee 13 Design Specifications EE 13 Processorn eebe ee eebe ee 16 Systeri Memory O AS 17 Intel 810E Chipset A traamusie oietant want ieee aeantand winaiiante 18 VO Controller ca cocida a a E E E R 21 Serial Debug Portuaria 21 Graphics Subsystem et cuestas atlas E 22 Audio SUBS Mia 23 Hardware Monitor COMPONENT corioxionicaoriiccc iii 24 LEPINE SUMS VS Ue eas E e O O acia daa 25 Power Management Features Zaegt e sting li tege 27 Intel Desktop Board D810EMO MO810E Technical Product Specification 1 1 Overview 1 1 1 Feature Summary Table 1 summarizes the D810EMO MO810E board s major features Table 1 Feature Summary Form Factor Processor Memory Chipset Direct AGP Video Audio UO Controller FlexATX 9 0 inches by 7 5 inches Support for either an Intel Pentium III processor in a Flip Chip Pin Grid Array FC PGA package or an Intel Celeron processor in an FCPGA package or a PPGA package e One 168 pin dual inline memory module DIMM socket e Supports up to 256 MB of 100 MHz non ECC synchronous DRAM SDRAM e Support for serial presence detect SPD and non SPD DIMMs Intel 810E chipset consisting of e Intel 82810E DC 133 Graphics M
14. KB 400 MHz 66 MHz 128 KB 366 MHz 66 MHz 128 KB All supported onboard memory can be cached up to the cachability limit of the processor For information about Refer to Processor support for the D810EMO MO810E http support intel com support motherboards desktop board Processor data sheets http www intel com design litcentr Product Description 1 5 System Memory AX CAUTION To be fully compliant with all applicable Intel SDRAM memory specifications the board should be populated with DIMMs that support the Serial Presence Detect SPD data structure If your memory modules do not support SPD you will see a notification to this effect on the screen at power up The BIOS will attempt to configure the memory controller for normal operation however DIMMs may not function at the determined frequency A CAUTION Because the main system memory is also used as video memory the board requires a 100 MHz SDRAM DIMM even though the host bus frequency is 66 MHz It is highly recommended that an SPD DIMM be used since this allows the BIOS to read the SPD data and program the chipset to accurately configure memory settings for optimum performance If non SPD memory is installed the BIOS will attempt to correctly configure the memory settings but performance and reliability may be impacted The board has one DIMM socket The minimum memory size is 32 MB and the maximum memory size is 256 MB The BIOS automatically detects mem
15. Mi User available 4 wo Reserved math coprocessor A Primary IDE if present else user available 4 al Secondary IDE if present else user available F Default but can be changed to another IRQ 36 Technical Reference 2 7 PCI Interrupt Routing Map This section describes interrupt sharing and how the interrupt signals are connected between the PCI bus connector and onboard PCI devices The PCI specification specifies how interrupts can be shared between devices attached to the PCI bus In most cases the small amount of latency added by interrupt sharing does not affect the operation or throughput of the devices In some special cases where maximum performance is needed from a device a PCI device should not share an interrupt with other PCI devices Use the following information to avoid sharing an interrupt with a PCI add in card PCI devices are categorized as follows to specify their interrupt grouping e INTA By default all add in cards that require only one interrupt are in this category For almost all cards that require more than one interrupt the first interrupt on the card is also classified as INTA e INTB Generally the second interrupt on add in cards that require two or more interrupts is classified as INTB This is not an absolute requirement e INTC and INTD Generally a third interrupt on add in cards is classified as INTC and a fourth interrupt is classified as INTD The ICH PCI to LPC b
16. NOTE The back panel audio line out connector is designed to power headphones or amplified speakers only Poor audio quality may occur if passive non amplified speakers are connected to this output 39 Intel Desktop Board D810EMO MO810E Technical Product Specification Table 17 USB Connectors Pin Signal Name 1 5 V fused 2 USBPO USBP1 3 USBPO USBP1 4 Ground Table 18 VGA Port Connector Pin Signal Name Pin Signal Name Pin Signal Name 1 Red 6 Ground 11 No connect 2 Green gt 7 Gouda 2 MONA o 3 Blue 8 Ground 13 HSYNC 4 No connect 9 Fused VCC 14 VSYNC 5 Ground 10 Ground 15 MONID2 Table 19 LAN Connector Signal Name TX TX RX Ground Ground RX Ground Ground Y 5 NI o a A WO DM gt Table 20 Audio Line Out Connector Pin Signal Name Tip Audio left out Ring Audio right out Sleeve Ground Table 21 Mic In Connector Pin Signal Name Tip Mono in Ring Mic bias voltage Sleeve Ground 40 2 8 2 Internal UO Connectors Figure 5 shows the location of the internal I O connectors Hem O Technical Reference 1 1 mO00000000 f 10 u o0o000000000 20 2 oo0r00000 oo00000000 40 goooooo0o000000000000 39 1
17. Settings LI9rEI 50 Power USO aer toca 53 Chassis Fan J3A2 DC Power Requirement occcccnooccccccccccononnncnnnnccnonnnnnnnnnnnonanannnos 54 Thermal Considerations for Components ANNE 56 Board Environmental Specifications ENNEN 57 Safety Regulations EE 58 EMG Regulations EE 58 Supervisor and User Password Functions oooocccccccccnnonccnnnncnonnnancnnnncnnnnnnnccnnnnncnnnnncnos 69 BIOS Setup Program Menu Funchons kee 71 BIOS Setup Program Function Keys sorda 72 Maintenance Menu E 72 Extended Configuration SubMenu iis iis cesncccttscelsteeseednessseeteacnenceetapieechenadtaeyiuccsinadeia gies 73 Ee n EE 74 Advanced Me 2 a 75 Et UE en Enn Usd 76 Peripheral Configuration SUDMeNU kk 77 IDE Configuration SUBMENU tacon id a lie 78 Primary Secondary IDE Master Slave Gubmenus 79 Event Log Configuration Submenu coooococccccncnononanonccccnnnnnnnnoncnnnnnnnnn ono nnccnnnnnnn nn nncnnnnnnnes 81 Video Configuration Suba in iia 82 Security ET EE 83 Power Men iii id do 84 BOO Mist att nadia 85 SNO O OS ee names ee 87 BIOS Error Messages sc e 89 Uncompressed INIT Code Checkpoints AAA 91 Boot Block Recovery Code Checkpoint oooocccccncccoccccncccnnnnnancnnncnonannnnncnnnncnnnnnnncnnnnnos 91 Runtime Code Uncompressed in F000 Shadow RAM c ccccccccccccceceeeeeeeeeeeeeeeeeees 92 TEE enne e Un EE 95 Upper Nibble High Byte Functions kee 95 Lower Nibble High Byte FUNCUONS isis 96 Beep CodeS eege 97 1 Product Description What This
18. The Creative Sound Blaster AudioPCI 128V features Creative ES1373D digital audio controller Interfaces to the PCI bus as a Plug and Play device 100 DOS legacy compatible Access to main memory through the PCI bus for wavetable synthesis support does not require a separate wavetable ROM device Conforms to the PC 98 and PC 99 design guides For information about Refer to Creative Sound Blaster AudioPCl 128V http www soundblaster com 1 10 2 Creative ES1373D Digital Audio Controller The Creative ES1373D digital audio controller s features include PCI 2 1 compliant PCI bus master for PCI audio 128 voice wavetable synthesizer Aureal A3Dt API Sound Blaster Prot Roland MPU 401 MIDI joystick compatible Ensoniq 3D positional audio and Microsoft DirectSoundt 3D support 1 10 3 Crystal Semiconductor CS4297A Analog Codec The Crystal Semiconductor CS4297A is a fully AC 97 compliant codec The codec s features include 18 bit stereo full duplex operation Up to 48 kHz sampling rate Connects to ES1373D digital controller using a five wire digital interface 23 Intel Desktop Board D810EMO MO810E Technical Product Specification 1 10 4 Audio Connectors The audio connectors include the following Line out back panel Mic in back panel ATAPI CD ROM connects an internal ATAPI CD ROM drive to the audio mixer For information about Refer to The back panel audio connectors Section 2 8 1 page 39 The locat
19. The El Torito specification Section 1 3 page 13 3 7 2 Booting Without Attached Devices For use in embedded applications the BIOS has been designed so that after passing the POST the operating system loader is invoked even if the keyboard and mouse are not connected 67 Intel Desktop Board D810EMO MO810E Technical Product Specification 3 8 USB Legacy Support 68 USB legacy support enables USB devices such as keyboards mice and hubs to be used even when no Operating system USB drivers are in place By default USB legacy support is set to Auto USB legacy support is used in accessing the BIOS Setup program and installing an operating system that supports USB This sequence describes how USB legacy support operates in the default auto mode 1 When you power up the computer USB legacy support is disabled 2 POST begins 3 USB legacy support is temporarily enabled by the BIOS This allows you to use a USB keyboard to enter the BIOS Setup program or the maintenance mode 4 POST completes and disables USB legacy support unless it was set to Enabled while in the BIOS Setup program Or if set to Auto while in the BIOS Setup program and a USB keyboard or mouse is connected then USB Legacy support will be enabled 5 The operating system loads While the operating system is loading USB keyboards and mice are not recognized unless USB legacy support was set to Enabled while in the BIOS Setup program or if USB legacy support w
20. chassis fan connector Table 23 page 42 Technical Reference 2 12 Thermal Considerations A CAUTION An ambient temperature that exceeds the board s maximum operating temperature by 5 C to 10 C could cause components to exceed their maximum case temperature and malfunction For information about the maximum operating temperature see the environmental specifications in Section 2 14 Figure 10 shows the localized high temperature zones OM08931 Creative ES1373D Intel 82801AA ICH Intel 82810E DC 133 GMCH Processor moo DS Processor voltage regulator area Figure 10 High Temperature Zones 55 Intel Desktop Board D810EMO MO810E Technical Product Specification Table 37 provides maximum component case temperatures for board components that could be sensitive to thermal changes Case temperatures could be affected by the operating temperature current load or operating frequency Maximum case temperatures are important when considering proper airflow to cool the board Table 37 Thermal Considerations for Components Component Maximum Case Temperature Intel Celeron Processor 366 MHz 85 C 400 MHz 85 C 433 MHz 85 C 466 MHz 706 500 MHz 70 C 533 MHz 70 C Intel Pentiu
21. do any processing after video ROM returns control 2E If EGA VGA not found then do display memory R W test 2F EGA VGA not found Display memory R W test about to begin 30 Display memory R W test passed About to look for the retrace checking 31 Display memory R W test or retrace checking failed To do alternate display memory R W test 32 Alternate display memory R W test passed To look for the alternate display retrace checking 34 Video display checking over Display mode to be set next 37 Display mode set Going to display the power on message 38 Different buses init input IPL general devices to start if present See Section 5 3 for details of different buses 39 Display different buses initialization error messages See Section 5 3 for details of different buses 3A New cursor position read and saved To display the Hit lt DEL gt message continued Error Messages and Beep Codes Table 61 Runtime Code Uncompressed in F000 Shadow RAM continued Code Description of POST Operation 40 To prepare the descriptor tables 42 To enter in virtual mode for memory test 43 To enable interrupts for diagnostics mode 44 To initialize data to check memory wrap around at 0 0 45 Data initialized Going to check for memory wrap around at 0 0 and finding the total system memory size 46 Memory wrap around test done Memory size calculation over About to
22. go for writing patterns to test memory 47 Pattern to be tested written in extended memory Going to write patterns in base 640 K memory 48 Patterns written in base memory Going to find out amount of memory below 1 M memory 49 Amount of memory below 1 M found and verified Going to find out amount of memory above 1 M memory 4B Amount of memory above 1 M found and verified Check for soft reset and going to clear memory below 1 M for soft reset If power on go to check point AER 4C Memory below 1 M cleared SOFT RESET Going to clear memory above 1 M 4D Memory above 1 M cleared SOFT RESET Going to save the memory size Go to check point 52h 4E Memory test started NOT SOFT RESET About to display the first 64 K memory size 4F Memory size display started This will be updated during memory test Going for sequential and random memory test 50 Memory testing initialization below 1 M complete Going to adjust displayed memory size for relocation shadow 51 Memory size display adjusted due to relocation shadow Memory test above 1 M to follow 52 Memory testing initialization above 1 M complete Going to save memory size information 53 Memory size information is saved CPU registers are saved Going to enter in real mode 54 Shutdown successful CPU in real mode Going to disable gate A20 line and disable parity NMI 57 A20 address line parity NMI disable successful Going to adjust memory size depending
23. log are valid View event log Enter Displays the event log Clear all event logs e No default Clears the event log after rebooting e Yes Event Logging e Disabled Enables logging of events e Enabled default Mark events as read Enter Marks all events as read 81 Intel Desktop Board D810EMO MO810E Technical Product Specification 4 4 5 Video Configuration To access this menu select Advanced on the menu bar then Video Configuration Maintenance Main Advanced Security Power Boot Bop Boot Configuration Peripheral Configuration IDE Configuration Event Log Configuration Video Configuration The submenu represented by Table 52 is used to select the video adapter Table 53 Video Configuration Submenu Feature Options Description Primary Video Adapter e AGP default Selects the Direct AGP or PCI video controller as the e PCI display device that will be active when the systems boots 82 BIOS Setup Program 4 5 Security Menu To access this menu select Security from the menu bar at the top of the screen Maintenance Main Advanced Security Power Boot Exit The menu represented by Table 54 is for setting passwords and security features Table 54 Security Menu Feature Options Description Supervisor Password Is No options Reports if there is a supervisor password set User Password Is No options Reports if there is a user pass
24. of the keyboard 76 BIOS Setup Program 4 4 2 Peripheral Configuration Submenu To access this submenu select Advanced on the menu bar then Peripheral Configuration Maintenance Main Advanced Security Power Boot Exit Boot Configuration Peripheral Configuration IDE Configuration Event Log Configuration Video Configuration The submenu represented in Table 49 is used for enabling the onboard serial port audio and LAN devices and legacy USB support Table 49 Peripheral Configuration Submenu Feature Options Description Serial Port A e Disabled Enables or disables the serial port e Enabled e Auto default Base l O address e 3F8 default Specifies the base I O address for the serial port This e 2F8 option appears only when Serial Port A is set to Enabled e 3E8 e 2E8 Interrupt e IRQ3 Specifies the interrupt assigned to the serial port This e IRQ 4 default option appears only when Serial Port A is set to Enabled Audio Device e Disabled Enables or disables the onboard audio subsystem e Enabled default LAN Device e Disabled Enables or disable the onboard LAN controller e Enabled default Legacy USB Support e Disabled Enables or disables USB legacy support Enabled default See Section 3 8 on page 68 for more information 77 Intel Desktop Board D810EMO MO810E Technical Product Specification 4 4 3 IDE Configuration Submenu To access t
25. page 47 J8C1 Figure 6 External l O Connectors 2 8 3 1 USB Port Connector Technical Reference Table 30 lists the signal names of the USB port connector Table 30 USB Port Connector J7A1 2 8 3 2 Signal Name USB_PWR USB_P2RL USB_P2RL Ground Key no pin Front Panel Connector Signal Name USB_PWR USB_P3RL USB_P3RL Ground USB_FP_OC Table 31 lists the signal names of the front panel connector Table 31 Front Panel Connector J8C1 Pin Signal In Out Description Pin Signal In Out Description Hard Drive Activity LED Power Sleep Message Waiting LED 1 HD_PWR Out Hard disk LED pull up 2 HDR_BLNK_GRN Out Front panel 330 Q to 5 V green LED 3 HD_LED Out Hard disk active LED 4 HDR BLNK_YEL i Front panel yellow LED Reset Switch Power Switch 5 GND Ground 6 SW_ON In Front panel power switch 7 FP_RESET in Front panel Reset 8 GND Ground button Infrared Port l Miscellaneous 9 5 V Out IR Power 10 NIC 11 IRRX In IrDA serial input 12 GND 13 GND Ground 14 Pin removed 15 IRTX Out IrDA serial output 16 45V 47 Intel Desktop Board D810EMO MO810E Technical Product Specification 2 8 3 2 1 Power Sleep Message Waiting LED Connector Pins 2 and 4 can be connected to a single or dual colored LED Table 32 lists the possible states for a single colored LED Table 33 shows the possible states f
26. s recognition mark Consists of a unique UL recognized manufacturer s logo along with a flammability rating 94V 0 Solder side UL File Number for desktop boards E139761 Component side PB Part Number Intel bare circuit board part number Solder side 746506 003 Battery Side Up marking located on the component side of the board in close proximity to the battery holder FCC Logo Declaration Solder side ACA C Tick mark Consists of a unique letter C with a tick mark followed by N 232 Located on the component side of the board and on the shipping container CE Mark Component side The CE mark should also be on the shipping container 59 Intel Desktop Board D810EMO MO810E Technical Product Specification 60 3 Overview of BIOS Features What This Chapter Contains A a A E E dane aan 61 3 2 BIOS Flash Memory Organization ENEE 62 3 37 Resource CONAGUA titi 62 3 4 System Management BIOS GMDBIOE cece tere eeenee eset ee eee eeecnaaeeeeeeeeeeeeenaas 64 3 5 ABIOS Bee 65 3 6 Recovering BIOS Data scores 66 3 7 Boot Op EE 67 38 USB Legacy EEN sio hee ees eae 68 3 9 BIOS Security EE 69 3 1 Introduction The board uses an Intel AMI BIOS which is stored in flash memory and can be upgraded using a disk based program In addition to the BIOS the flash memory contains the BIOS Setup program POST the PCI auto configuration utility and Plug and Play support This board supports system BIOS shadowing allowin
27. 13 Power Management FE US sica taba 27 A e E EN 27 1 13 2 Hardware SUPPOR mtrs 29 2 Technical Reference a El e ee dere 33 Bee Ee e EE 33 23 E E 34 24 DMA ei 35 2 5 PCI Configuration Space Map isc cio ion EEEE EEN EEEE EEN 36 2 6 Jee an In RIA IS 36 2 7 PCI Interrupt Routing Maps cars ataca adds 37 LO CAM A hii E RE 38 2 8 1 Back Panel I O Connectors sastdoiadarrla ridad 39 2 8 2 Internal I O Connectors ee EEN SE 41 2 8 3 External I O CONNECT Sica aa 46 Intel Desktop Board D810EMO MO810E Technical Product Specification vi 2 9 Jumper E 49 2 10 Mechanical Considerations oegdekeechtege tiara iria 51 2 10 1 FlexATX Form Factor sidonia 51 210 2 WO Shield tamal ina etnia teat 52 2 11 Electrical Considerations Au 53 2 11 1 Add in Board Consideratons ke 53 2 11 2 Power Consumption EE 53 2 11 3 Power Supply Consideratons nc ccnnnnnnnns 54 2 11 4 Fan Power Requiem Sutil ie 54 2 12 Thormal ee 55 2 13 ROMAN A A 56 2 14 ENVIFO MENA DEE 57 2 15 Regulatory COMPACT e 58 2 15 1 Safety Regulations uccoiisi taa latas es 58 2152 EMG e ME EE 58 2 153 Certification Markings socorrer ads 59 Overview of BIOS Features 31 Introducido 61 3 2 BIOS Flash Memory Organization ENEE 62 3 3 Resource Configuration ui SENGES 62 3 3 1 PCI EE HEES aspas daa 62 3 3 2 PODES o Ee 63 3 4 System Management BIOS GMDIOE nono ccnnnnnnnannnnns 64 Be BOS DG AG Ss d e Ee 65 3 5 1 Language Support ds da 65 3 5 2 Custom Splash credit e 65 3 6 Rec
28. 4 Maintenance Menu Feature Options Description Clear All Passwords Confirm Yes No Selecting Yes clears the user and supervisor passwords gt Clear BIS Credentials Confirm Yes No Selecting Yes clears the WfM BIS Boot Integrity Note Service credentials Extended Configuration See Extended Selecting User Defined allows setting system Configuration Submenu control and video memory cache modes CPU Information CPU Microcode Update No options Displays CPU s Microcode Update Revision Revision CPU Stepping Signature No options Displays CPU s Stepping Signature Note For information about the BIS refer to the Intel web site at http developer intel com design security index1 htm BIOS Setup Program 4 2 1 Extended Configuration Submenu To access this submenu select Maintenance on the menu bar then Extended Configuration Maintenance Main Advanced Security Power Boot Exit Extended Configuration The submenu represented by Table 45 is for setting system control and video memory cache mode This submenu becomes available when User Defined is selected under Extended Configuration Table 45 Extended Configuration Submenu Feature Options Description Extended Configuration e Default Selecting user defined allows you to select Default or default User Defined Selecting User Defined allows you to configure the items listed under Memory Control below Note
29. 5 2 Port 80h POST Codes During the POST the BIOS generates diagnostic progress codes POST codes to I O port 80h If the POST fails execution stops and the last POST code generated is left at port 80h This code is useful for determining the point where an error occurred Displaying the POST codes requires an add in card often called a POST card The POST card can decode the port and display the contents on a medium such as a seven segment display The tables below offer descriptions of the POST codes generated by the BIOS Table 59 defines the Uncompressed INIT Code Checkpoints Table 60 describes the Boot Block Recovery Code Checkpoints and Table 61 lists the Runtime Code Uncompressed in F000 Shadow RAM Some codes are repeated in the tables because that code applies to more than one operation Table 59 Uncompressed INIT Code Checkpoints Code Description of POST Operation DO D1 D3 D4 D5 D6 D7 D8 D9 NMI is disabled Onboard KBC RTC enabled if present Init code Checksum verification starting Keyboard controller BAT test CPU ID saved and going to 4 GB flat mode Do necessary chipset initialization start memory refresh do memory sizing Verify base memory Init code to be copied to segment 0 and control to be transferred to segment 0 Control is in segment 0 To check recovery mode and verify main BIOS checksum If the BIOS is in recovery mode or the main BIOS checksum is bad go to check point EO for recove
30. 8000 DFFFF 96 KB Available high DOS memory open to PCI bus 640 K 800 K A0000 C7FFF Video memory and BIOS 639 K 640 K 9FCOO 9FFFF 1 KB Extended BIOS data movable by memory manager software 512 K 639 K 80000 9FBFF 127 KB Extended conventional memory OK 512K 00000 7FFFF 512K Conventional memory 33 Intel Desktop Board D810EMO MO810E Technical Product Specification 2 3 I O Map Table 12 1 0 Map Address hex Size Description 0000 000F 16 bytes DMA Controller 0020 0021 2 bytes Programmable Interrupt Control PIC 0040 0043 4 bytes System Timer 0060 1 byte Keyboard controller byte reset IRQ 0061 1 byte System Speaker 0064 1 byte Keyboard controller CMD STAT byte 0070 0071 2 bytes System CMOS Real Time Clock 0072 0073 2 bytes System CMOS 0080 008F 16 bytes DMA Controller 0092 1 byte Fast A20 and PIC 00A0 00A1 2 bytes PIC 00C0 00DF 32 bytes DMA 00FO 1 byte Numeric data processor 0170 0177 8 bytes Secondary IDE channel 01FO 01F7 8 bytes Primary IDE channel 02E8 02EF 8 bytes COM4 video 8514A 02F8 02FF 8 bytes COM2 0376 1 byte Secondary IDE channel command port 0377 bits 6 0 7 bits Secondary IDE channel status port 03B0 03BB 12 bytes Intel 82810E DC133 Graphics Memory Controller Hub GMCH 03C0 03DF 32 byte Intel 82810E Graphics Memory Controller Hub GMCH 03E8 03EF 8bytes COM 03F6 1 byte Primary IDE channel command
31. A coin cell battery powers the real time clock and CMOS memory When the computer is not plugged into a wall socket the battery has an estimated life of three years When the computer is plugged in the 3 3 V standby current from the power supply extends the life of the battery The clock is accurate to 13 minutes year at 25 C with 3 3 VSB applied The time date and CMOS values can be specified in the BIOS Setup program The CMOS values can be returned to their defaults by using the BIOS Setup program NOTE If the battery and AC power fail standard defaults not custom defaults will be loaded into CMOS RAM at power on Product Description gt NOTE The recommended method of accessing the date in systems with Intel desktop boards is indirectly from the Real Time Clock RTC via the BIOS The BIOS on Intel desktop boards contains a century checking and maintenance feature This feature checks the two least significant digits of the year stored in the RTC during each BIOS request INT 1Ah to read the date and if less than 80 i e 1980 is the first year supported by the PC updates the century byte to 20 This feature enables operating systems and applications using the BIOS date time services to reliably manipulate the year as a four digit value For information about Refer to Proper date access in systems with Intel desktop boards http support intel com support year2000 1 7 I O Controller The SMSC LPC47M102 I O con
32. ADO9 B49 Ground PMER B19 5V VMO A50 Key B50 Key AD30 B20 labi A51 Key B51 Key 3 3 V B21 AD29 A52 C BEO B52 ADOS8 Ap B22 Gruna fa53 3 3V B53 AD07 Ap B23 AD 7 A54 ADO B54 3 3V Ground B24 AD 35 App AD04 B55 AD05 AD34 B25 433V A56 Ground B56 AD03 Dep B26 C BE3 a57 ADO2 B57 Ground 3 3 V B27 AD23 A58 ADOO B58 ADO1 AD22 B28 Ground A59 5V O B59 5V I O AD20 B29 lab Aen REQ6 CH B60 ACK64C Ground B30 AD19 A61 5V B61 5V ADR o B31 asav lA62 5V B62 5V These signals in parentheses are optional in the PCI specification and are not currently implemented Table 29 ATAPI CD ROM Connector J2D1 Pin Signal Name 1 Left audio input from CD ROM 2 CD audio differential ground 3 CD audio differential ground 4 Right audio input from CD ROM 45 Intel Desktop Board D810EMO MO810E Technical Product Specification 2 8 3 External UO Connectors Figure 6 shows the locations of the external I O connectors 46 2 o0000 00 16 9000000 OM08927 Reference Item Description Designator A USB ports see Table 30 page 47 J7A1 B Front panel see Table 31
33. CPI provides controls and information so that the operating system can facilitate Plug and Play device enumeration and configuration ACPI is used only to enumerate and configure devices that do not have other hardware standards for enumeration and configuration PCI devices on a desktop board for example are not enumerated by ACPI 1 13 2 Hardware Support N CAUTION If Wake on network event and Instantly Available technology features are used the power supply must be capable of providing adequate 5 V standby current Failure to provide adequate standby current can damage the power supply The total amount of standby current required depends on the wake devices supported and manufacturing options Refer to Section 2 11 3 on page 54 for additional information The board provides several hardware features that support power management including e Power connector e Wake on network event e Instantly Available technology e Wake on Ring e Resume on Ring Wake on network event and Instantly Available technology require power from the 5 V standby line The sections discussing these features describe the incremental standby power requirements for each Wake on Ring and Resume on Ring enable telephony devices to access the computer when it is in a power managed state The method used depends on the type of telephony device external or internal and the power management mode being used ACPI gt NOTE The use of Wake on Ring and Res
34. EMO MO810E Technical Product Specification Table 64 describes the lower nibble of the high byte and indicates the bus on which the routines are being executed Table 64 Lower Nibble High Byte Functions Value Description Generic DIM Device Initialization Manager Onboard system devices ISA devices EISA devices ISA PnP devices PCI devices a A WwW N 5 4 Speaker A 47 Q inductive speaker is mounted on the board The speaker provides audible error code beep code information during the power on self test POST For information about Refer to The location of the onboard speaker l Figure 1 page 11 96 Error Messages and Beep Codes 5 5 BIOS Beep Codes Whenever a recoverable error occurs during power on self test POST the BIOS displays an error message describing the problem see Table 65 The BIOS also issues a beep code one long tone followed by two short tones during POST if the video configuration fails a faulty video card or no card installed or if an external ROM module does not properly checksum to zero An external ROM module for example a video BIOS can also issue audible errors usually consisting of one long tone followed by a series of short tones For more information on the beep codes issued check the documentation for that external device There are several POST routines that issue a POST terminal error and shut down the system if they fail Bef
35. If User Defined is selected the status will be displayed in the Advanced Menu as Extended Configuration Used e User Defined Memory Control SDRAM Auto e Auto default Sets extended memory configuration options to auto or Configuration e User Defined user defined CAS Latency es 3 Selects the number of clock cycles required to address a e 2 column in memory e Auto default SDRAM RAS to 3 Selects the number of clock cycles between addressing a CAS delay 2 row and addressing a column e Auto default SDRAM RAS e 3 Selects the length of time required before accessing a new Precharge e 2 row e Auto default 73 Intel Desktop Board D810EMO MO810E Technical Product Specification 4 3 Main Menu To access this menu select Main on the menu bar at the top of the screen Maintenance Main Advanced Security Power Boot EX iE Table 46 describes the Main menu This menu reports processor and memory information and is for configuring the system date and system time Table 46 Main Menu Feature Options Description BIOS Version No options Displays the version of the BIOS Processor Type No options Displays processor type Processor Speed No options Displays processor speed System Bus No options Displays the host bus frequency Frequency Cache RAM No options Displays the size of second level cache Total Memory No options Displays the total amount o
36. Intel Desktop Board D8 1OEMO MO810E Technical Product Specification l n February 2000 Order Number A00653 001 The Intel Desktop Board D810EMO MO810E may contain design defects or errors known as errata that may cause the product to deviate from published specifications Current characterized errata are documented in the Intel Desktop Board D810EMO MO810E Specification Update Revision History Revision Revision History Date 001 First release of the Intel Desktop Board D810EMO MO810E Technical February 2000 Product Specification This product specification applies to only standard D810EMO MO810E boards with BIOS identifier MO81010A 86A Changes to this specification will be published in the Intel Desktop Board D810EMO MO810E Specification Update before being incorporated into a revision of this document Information in this document is provided in connection with Intel products No license express or implied by estoppel or otherwise to any intellectual property rights is granted by this document Except as provided in Intel s Terms and Conditions of Sale for such products Intel assumes no liability whatsoever and Intel disclaims any express or implied warranty relating to sale and or use of Intel products including liability or warranties relating to fitness for a particular purpose merchantability or infringement of any patent copyright or other intellectual property right Intel products are not intended for
37. J Itis the first connector in the 5J area Kilobyte 1024 bytes Kilobit 1024 bits Megabyte 1 048 576 bytes Megabit 1 048 576 bits Gigabyte 1 073 741 824 bytes An address or data value ending with a lowercase h indicates a hexadecimal value Volts Voltages are DC unless otherwise specified This symbol is used to indicate third party brands and names that are the property of their respective owners Contents 1 Product Description Tat SOVGINIGW a Guladnam aries needa natlenenien 10 1 1 1 Feature SUMMARY cid a ed 10 1 1 2 BOAT Old 11 1 1 3 de A A dae wl cd 12 1 2 ellen veros a aE bases ade E EEA despa ada uncut EE REA AE EA EEEE ite 13 143 IDESIQN Re re en EE 13 E e EE 16 1S Stein 17 16 Intel A EE 18 1 6 1 Dirett AGP tai tc 22h es ci trio 19 1 6 2 A ee 19 1 6 3 HAN 20 1 6 4 Real Time Clock CMOS SRAM and Battery ooooococococoocccccccccccccnnnnnnnnnnnnnnnn 20 Tee MOON TOS estar dto 21 1 8 Serial Debug E 21 19 Graphics Subsystem EE 22 1 30 NELO oE SLAVES EE 23 1 10 1 Creative Sound Blaster AudioPCI 120 23 1 10 2 Creative ES1373D Digital Audio CGontroller 23 1 10 3 Crystal Semiconductor CS4297A Analog Codec cccccccnoccoccccccccnnnaaanncccnnnnnnns 23 1 10 4 A dio enn Le 24 1 Hardware Monitor Component icociorins drid l 24 2 LAN SUS SIMed stes tits is eek 25 1 12 1 Intel 82559 PCI LAN Controller accion oi cea 25 1 12 2 LAN RETTEN E ul E 26 1 123 RAR LAN Connector LEDs REENEN 26 1
38. M gt Controller Hub Bus ICH A Ee GMCH A A A SMBus PCI Bus LPC Bus Display v i Interface AG Link OM09130 Figure 3 Intel 810E Chipset Block Diagram For information about The Intel 810E chipset The resources used by the chipset Refer to http developer intel com Chapter 2 The chipset s compliance with ACPI and AC 97 Table 2 page 13 Product Description 1 6 1 Direct AGP Direct integrated AGP is a high performance bus independent of the PCI bus for graphics intensive applications such as 3 D applications AGP overcomes certain limitations of the PCI bus related to handling large amount of graphics data with the following features e Pipelined memory read and write operations that hide memory access latency e Demultiplexing of address and data on the bus for nearly 100 percent bus efficiency For information about Refer to The location of the VGA port connector Figure 4 page 39 Obtaining the Accelerated Graphics Port Interface Specification Table 2 page 13 1 6 2 USB The board supports up to four USB ports one USB peripheral can be connected to each port For more than four USB devices an external hub can be connected to any of the ports Two USB ports are implemented with stacked back panel connectors The other two ports can be routed from the connector at location J7A1 via a cable to the front panel The board fully supports UHCI and uses UHC I compatible software drivers USB features include
39. O810E Technical Product Specification 32 2 Technical Reference What This Chapter Contains 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 2 10 2 11 2 12 2 13 2 14 2 15 ITROCUCTION 4 did a 33 Memor Map siii a cd lea 33 ege 34 DIMAzG En 35 PCI Configuration Space Map scort trata 36 Interrupts ee e aE ant ele NE EE OAE E 36 PCI Interrupt Routing Map accua See dE Ee AEN dE Ee 37 GONNECIOS a EE 38 J mper Block eene eege tet Utama ees eee Oat mest 49 Mechanical Considerati0NS cccoocccccnnccnnncnnnnaccnnncnnnnnnnnnncnn ono ncn conc nc nn cnn nan cn nan nn nana 51 Electrical CoNsSiderati0nNS a a a aa aa aeaa iar 53 Thermal Consideraiions narco narco nana n narco na nannno 55 SIE ei EE 56 ENVIO Ma aid 57 Regulatory Compliance siii 58 2 1 Introduction Sections 2 2 2 6 contain several standalone tables Table 11 describes the system memory map Table 12 shows the I O map Table 13 lists the DMA channels Table 14 defines the PCI configuration space map and Table 15 describes the interrupts The remaining sections in this chapter are introduced by text found with their respective section headings 2 2 Memory Map Table 11 System Memory Map Address Range decimal Address Range hex Size Description 1024 K 262144 K 100000 FFFFFFF 255 MB Extended memory 960 K 1024 K F0000 FFFFF 64 KB Runtime BIOS 896 K 960 K E0000 EFFFF 64 KB Reserved 800 K 896 K C
40. and execute CMOS setup 88 Returned from CMOS setup program and screen is cleared About to do programming after setup 89 Programming after setup complete Going to display power on screen message 8B First screen message displayed lt WAIT gt message displayed PS 2 Mouse check and extended BIOS data area allocation to be done DC Setup options programming after CMOS setup about to start 8D Going for hard disk controller reset 8F Hard disk controller reset done Floppy setup to be done next 91 Floppy setup complete Hard disk setup to be done next 95 Init of different buses optional ROMs from C800 to start See Section 5 3 for details of different buses 96 Going to do any init before C800 optional ROM control 97 Any init before C800 optional ROM control is over Optional ROM check and control will be done next 98 Optional ROM control is done About to give control to do any required processing after optional ROM returns control and enable external cache 99 Any initialization required after optional ROM test over Going to setup timer data area and printer base address 9A Return after setting timer and printer base address Going to set the RS 232 base address 9B Returned after RS 232 base address Going to do any initialization before coprocessor test 9C Required initialization before coprocessor is over Going to initialize the coprocessor next 9D Coprocessor initialized Going to do any initialization afte
41. as set to Auto while in the BIOS Setup program and a USB keyboard or mouse is connected After the operating system loads the USB drivers the USB devices are recognized by the operating system To install an operating system that supports USB enable USB Legacy support or set it to Auto in the BIOS Setup program and follow the operating system s installation instructions Once the operating system is installed and the USB drivers have been configured USB legacy support is no longer used USB Legacy support can be left enabled or set to auto in the BIOS Setup program if needed Notes on using USB legacy support e Do not use USB devices with an operating system that does not support USB USB legacy is not intended to support the use of USB devices in a non USB aware operating system e USB legacy support is for keyboards mice and hubs only Other USB devices are not supported Overview of BIOS Features 3 9 BIOS Security Features The BIOS includes security features that restrict access to the BIOS Setup program and who can boot the computer A supervisor password and a user password can be set for the BIOS Setup program and for booting the computer with the following restrictions The supervisor password gives unrestricted access to view and change all the Setup options in the BIOS Setup program This is supervisor mode The user password gives restricted access to view and change Setup options in the BIOS Setup program This is user
42. ce e DMA engine for movement of commands status and network data across the PCI bus e Integrated physical layer interface including Complete functionality necessary for the 10Base T and 100Base TX network interfaces when in 10 Mbit sec mode the interface drives the cable directly A complete set of Media Independent Interface MII management registers for control and status reporting IEEE 802 3u Auto Negotiation for automatically establishing the best operating mode when connected to other 10Base T or 100Base TX devices whether half or full duplex capable e Integrated power management features including support for wake on network event from an ACPI S3 state using the PCI bus PME signal For information about Refer to The LAN subsystem s PCI specification compliance Table 2 page 13 25 Intel Desktop Board D810EMO MO810E Technical Product Specification 1 12 2 LAN Subsystem Software The Intel 82559 Fast Ethernet WfM PCI LAN software and drivers are available from Intel s World Wide Web site For information about Refer to Obtaining LAN software and drivers Section 1 2 page 13 1 12 3 RJ 45 LAN Connector LEDs Two LEDs are built into the RJ 45 LAN connector Table 6 describes the LED states when the board is powered up and the LAN subsystem is operating Table 6 LAN Connector LED States LED Color LED State Condition Green Off 10 Mbit sec data rate is selected On 100 Mbit
43. ction 3 6 page 66 Technical Reference 2 10 Mechanical Considerations 2 10 1 FlexATX Form Factor The board is designed to fit into a FlexATX form factor chassis The board can also be installed in a microATX form factor chassis Figure 8 illustrates the mechanical form factor for the board Dimensions are given in inches millimeters The outer dimensions are 9 0 inches by 7 5 inches 228 6 millimeters by 190 5 millimeters Location of the I O connectors and mounting holes are in compliance with the FlexATX addendum of the microATX specification see Section 1 3 6 50 165 10 6 10 154 94 5 20 132 08 0 00 1 00 25 40 7 E 0 75 19 05 GE 1 80 45 72 8 25 209 55 8 00 203 20 OM08929 Figure 8 Board Dimensions 51 Intel Desktop Board D810EMO MO810E Technical Product Specification 2 10 2 UO Shield The back panel I O shield for the board must meet specific dimension and material requirements Systems based on this board need the back panel I O shield to pass certification testing Figure 9 shows the critical dimensions of the I O shield Dimensions are given in inches millimeters For dimensions given to two decimal places the tolerance is 0 02 inches 5 08 millimeters The figur
44. d NIC driver interface PXE Pre boot execution environment BIOS Setup Program 4 8 Exit Menu To access this menu select Exit from the menu bar at the top of the screen Maintenance Main Advanced Security Power Boot Exit The menu represented in Table 57 is for exiting the BIOS Setup program saving changes and loading and saving defaults Table 57 Exit Menu Feature Description Exit Saving Changes Exits and saves the changes in CMOS SRAM Exit Discarding Changes Exits without saving any changes made in the BIOS Setup program Load Setup Defaults Loads the factory default values for all the Setup options Load Custom Defaults Loads the custom defaults for Setup options Save Custom Defaults Saves the current values as custom defaults Normally the BIOS reads the Setup values from flash memory If this memory is corrupted the BIOS reads the custom defaults If no custom defaults are set the BIOS reads the factory defaults Discard Changes Discards changes without exiting Setup The option values present when the computer was turned on are used 87 Intel Desktop Board D810EMO MO810E Technical Product Specification 88 5 Error Messages and Beep Codes BIOS Error Messages Port 80h POST Codes Bus Initialization Checkpoints Speaker n BIOS Beep Codes 65 What This Chapter Contains 5 1 5 2 5 3 5 4 5 5 5 1 BIOS Error Messages Table 58 lists the error messages and
45. d and its components to the vendors system integrators and other engineers and technicians who need this level of information It is specifically not intended for general audiences What This Document Contains Chapter Description A description of the hardware used on this board A map of the resources of the board The features supported by the BIOS Setup program The contents of the BIOS Setup program s menus and submenus Nh ou H a A description of the BIOS error messages beep codes and POST codes Typographical Conventions This section contains information about the conventions used in this specification Not all of these symbols and abbreviations appear in all specifications of this type Notes Cautions and Warnings gt NOTE Notes call attention to important information A CAUTION Cautions are included to help you avoid damaging hardware or losing data A WARNING Warnings indicate conditions that if not observed can cause personal injury Intel Desktop Board D810EMO MO810E Technical Product Specification Other Common Notation D NxnX KB Kbit MB Mbit GB xxh x x V Used after a signal name to identify an active low signal such as USBPO When used in the description of a component N indicates component type xn are the relative coordinates of its location on the board and X is the instance of the particular part at that general location For example J5J1 is a connector located at 5
46. design chipsets datashts 2 4 DMA Channels Table 13 DMA Channels DMA Channel Number Data Width System Resource 0 8 or 16 bits Audio 1 8 or 16 bits Audio 2 8 or 16 bits Open 3 8 or 16 bits Open Audio 4 Reserved cascade channel 5 16 bits Open 6 16 bits Open 7 16 bits Open 35 Intel Desktop Board D810EMO MO810E Technical Product Specification 2 5 PCI Configuration Space Map Table 14 PCI Configuration Space Map Bus Device Function Number hex Number hex Number hex Description 00 00 00 Memory controller of Intel 82810E component 00 01 00 Graphics controller of Intel 82810E component 00 1E 00 Link to PCI bridge 00 1F 00 PCI to LPC bridge 00 1F 01 IDE controller 00 1F 02 USB controller 1 00 1F 03 SMBus controller 00 E Im Reserved 00 1F 05 AC 97 audio controller 00 1F 06 AC 97 modem controller 01 01 00 Intel 82559 PCI LAN controller 01 07 00 PCI Audio Accelerator ES1373D 01 09 00 PCl bus connector 2 6 Interrupts Table 15 Interrupts IRQ System Resource NMI I O channel check Reserved interval timer Reserved keyboard buffer full Reserved cascade interrupt from slave PIC COM2 COM1 User available User available Audio User available CO N oi a A WO MY CH Real time Clock o Reserved for ICH system management bus e o User available User available 4
47. e bus initialization checkpoints Table 62 Bus initialization Checkpoints Checkpoint Description 2A Different buses init system static and output devices to start if present 38 Different buses init input IPL and general devices to start if present 39 Display different buses initialization error messages 95 Init of different buses optional ROMs from C800 to start While control is inside the different bus routines additional checkpoints are output to port 80h as a WORD to identify the routines under execution In these WORD checkpoints the low byte of the checkpoint is the system BIOS checkpoint from which the control is passed to the different bus routines The high byte of the checkpoint is the indication of which routine is being executed in the different buses Table 63 describes the upper nibble of the high byte and indicates the function that is being executed Table 63 Upper Nibble High Byte Functions Value Description func 0 disable all devices on the bus concerned func 1 static devices init on the bus concerned func 2 output device init on the bus concerned func 3 input device init on the bus concerned func 4 IPL device init on the bus concerned func 5 general device init on the bus concerned func 6 error reporting for the bus concerned func 7 add on ROM init for all buses N oa A oO N 95 Intel Desktop Board D810
48. e control Specifies number of sectors per block for transfers from the hard disk drive to memory Check the hard disk drive s specifications for optimum setting continued 79 Intel Desktop Board D810EMO MO810E Technical Product Specification Table 51 Primary Secondary IDE Master Slave Submenus continued Feature Options Description PIO Mode e Auto default Configures the PIO mode 0 e 1 Auto sets the PIO mode to the fastest speed supported 2 es 3 es A Ultra DMA e Disabled default Specifies the Ultra DMA mode for the drive e Mode 0 e Mode 1 e Mode 2 e Mode 3 e Mode 4 Use ARMD Drive As e Auto Specifies the type of ARMD drive e Floppy default This option appears only if an ARMD drive is attached to e Hard Disk an IDE interface 80 BIOS Setup Program 4 4 4 Event Log Configuration To access this menu select Advanced on the menu bar then Event Log Configuration Maintenance Main Advanced Security Power Boot Bag Boot Configuration Peripheral Configuration IDE Configuration Event Log Configuration Video Configuration The submenu represented by Table 52 is used to configure the event logging features Table 52 Event Log Configuration Submenu Feature Options Description Event log No options Indicates if there is space available in the event log Event log validity No options Indicates if the contents of the event
49. e indicates the position of each cutout Additional design considerations for I O shields relative to chassis requirements are described in the ATX specification See Section 1 3 for information about the ATX specification 0 33 Dia 2 L 0 00 E 8 50 0 47 12 03 AA d Sp oo D EA An 0 68 i les C i 17 32 0 66 16 86 8 St 33 ay ao Ss S oS tou Wig Wir 2 e Gi ij O ER OM08930 Figure 9 I O Shield Dimensions 52 Technical Reference 2 11 Electrical Considerations 2 11 1 Add in Board Considerations The board is designed to provide 2 A average of 5 V current for an add in board in the PCI slot 2 11 2 Power Consumption Table 35 lists voltage and current specifications for a computer that contains the board and the following e 550E MHz Intel Pentium III processor with a 256 KB cache e 256 MB SDRAM e 6 2 GB IDE hard disk drive e Toshiba Mobile CD ROM drive This information is provided only as a guide for calculating approximate power usage with additional resources added Values for the Windowst 98 desktop mode are measured at 640 x 480 x 256 colors and 60 Hz refresh rate AC watts are measured with a typical 145 W power supply nominal input voltage and frequency with true RMS wattmeter at the line input Table 35 Power Usage DC Amps at
50. e of connected IDE device When selected displays the Secondary IDE Slave submenu 4 4 3 1 BIOS Setup Program Primary Secondary IDE Master Slave Submenus To access these submenus select Advanced on the menu bar then IDE Configuration and then the master or slave to be configured Maintenance Main Advanced Security Boot Configuration Power Boot Exit Peripheral Configuration IDE Configuration Primary IDE Master Primary IDE Slave Secondary IDE Master Secondary IDE Slave Diskette Configuration Event Log Configuration Video Configuration There are four IDE submenus primary master primary slave secondary master and secondary slave Table 51 shows the format of the IDE submenus For brevity only one example is shown Table 51 Primary Secondary IDE Master Slave Submenus Feature Type Options e None e User e Auto default e CD ROM e ATAPI Removable e Other ATAPI e IDE Removable Description Specifies the IDE configuration mode for IDE devices User allows the user to change the other features in this table Auto automatically sets the other features in this table Any setting other than None or Auto enables the user to set features LBA Mode Control Multi Sector Transfers e Disabled e Enabled default e Disabled e 2 Sectors e 4 Sectors e 8 Sectors e 16 Sectors default Enables or disables the LBA mod
51. e these connectors for powering devices external to the computer chassis A fault in the load presented by the external devices could cause damage to the computer the interconnecting cable and the external devices themselves This section describes the board s connectors The connectors can be divided into the following groups e Back panel I O connectors see page 39 USB 2 VGA LAN Audio line out Micin e Internal I O connectors see page 41 Fans 2 IDE 2 Serial debug port Power PCI ATAPI CD ROM e External I O connectors see page 46 USB ports Front panel Power Sleep Message waiting LED power switch hard drive activity LED reset switch and infrared port Technical Reference 2 8 1 Back Panel I O Connectors Figure 4 shows the location of the back panel I O connectors OM08925 Item Description A USB port 0 see Table 17 page 40 B USB port 1 see Table 17 page 40 C VGA port see Table 18 page 40 D LAN see Table 19 page 40 E Audio line out see Table 20 page 40 F Mic in see Table 21 page 40 Figure 4 Back Panel I O Connectors gt
52. ed by default This splash screen can be replaced with a custom splash screen A utility is available from Intel to assist with creating a custom splash screen The custom splash screen can be programmed into the flash memory using the BIOS upgrade utility Information about this capability is available on the Intel Support World Wide Web site For information about Refer to The Intel World Wide Web site Section 1 2 page 13 65 Intel Desktop Board D810EMO MO810E Technical Product Specification 3 6 Recovering BIOS Data 66 Some types of failure can destroy the BIOS For example the data can be lost if a power outage occurs while the BIOS is being upgraded in flash memory The BIOS can be recovered from either a 1 44 MB diskette for recovery from an LS 120 diskette drive configured as an ATAPI removable IDE device or from a CD ROM for use in an ATAPI CD ROM drive using the BIOS recovery mode When recovering the BIOS be aware of the following e Recovery requires the use of bootable media in a bootable device e Because of the small amount of code available in the nonerasable boot block area there is no video support You can only monitor this procedure by listening to the speaker or looking at the recovery drive LED e Two beeps indicate the beginning of the BIOS recovery process e Two beeps and the end of activity in the recovery drive indicate successful BIOS recovery e A series of continuous beeps indicates a failed BIOS
53. emory Controller Hub GMCH e Intel 82801AA I O Controller Hub ICH e Intel 82802AB 4 Mbit Firmware Hub FWH e Intel 82810E DC 133 GMCH e 4 MB of display cache e VGA port connector on back panel Audio Codec 97 AC 97 compatible audio subsystem consisting of the following e Creative Sound Blastert AudioPCl 128V digital audio controller ES1373D e Crystal Semiconductor CS4297A analog codec SMSC LPC47M102 SIO low pin count LPC interface I O controller Peripheral e Up to four universal serial bus USB ports Interfaces e Two IDE interfaces with Ultra DMA support Serial Debug One 9 pin stake pin serial debug port connector Port Expansion One PCI bus connector at PCI slot 5 location capabilities Management e Intel 82559 local area network LAN controller Level 4 Support e Hardware monitor Instantly e Support for PCI Local Bus Specification Revision 2 2 Available PC e Suspend to RAM support e Wake on USB ports BIOS e Intel AMI BIOS stored in an Intel 82802AB 4 Mbit firmware hub FWH e Support for Advanced Configuration and Power Interface ACPI Plug and Play and SMBIOS CH NOTE The D8I0EMO MOSIOE board is designed to support only USB aware operating systems For information about Product Description Refer to The board s compliance level with ACPI Plug and Play and SMBIOS Table 2 page 13 1 1 2 Board Layout Figure 1 shows the location of the major components on the board
54. er MO81010A 86A Boards with other BIOS identifiers might have differences in some of the Setup screens NOTE In this chapter all examples of the BIOS Setup Program menu bar include the maintenance menu however the maintenance menu is displayed only when the board is in configuration mode Section 2 9 on page 49 tells how to put the board in configuration mode 71 Intel Desktop Board D810EMO MO810E Technical Product Specification Table 43 lists the function keys available for menu screens Table 43 BIOS Setup Program Function Keys BIOS Setup Program Function Key Description lt gt OF lt gt gt Selects a different menu screen lt gt or lt gt Selects an item lt Tab gt Selects a field lt Enter gt Executes command or selects a submenu lt F9 gt Load the default configuration values for the current menu lt F10 gt Save the current values and exits the BIOS Setup program lt Esc gt Exits the menu 4 2 Maintenance Menu 72 To access this menu select Maintenance on the menu bar at the top of the screen Maintenance Main Advanced Security Power Boot Exit Extended Configuration The menu shown in Table 44 is for clearing the Setup passwords and the Wired for Management Boot Integrity Service credentials and for changing extended configuration memory settings Setup only displays this menu in configuration mode See Section 2 9 on page 49 for configuration mode setting information Table 4
55. extended cylinder head sector ECHS translation modes The drive reports the transfer rate and translation mode to the BIOS The board supports laser servo LS 120 diskette technology through its IDE interfaces The LS 120 drive can be configured as a boot device by setting the BIOS Setup program s Boot menu to one of the following e ARMD FDD ATAPI removable media device floppy disk drive e ARMD HDD ATAPI removable media device hard disk drive The board has two IDE interface connectors The primary IDE connector is a standard 40 pin IDE interface The secondary IDE connector is a 50 pin Slimline IDE connector intended for use with devices such as 2 5 inch hard disk drives and mobile CD ROM drives The Slimline IDE connector has the standard IDE interface pins but also includes audio and power signals For information about Refer to The location of the IDE connectors l Figure 5 page 41 The signal names of the primary IDE connector Table 24 page 42 The signal names of the Slimline secondary IDE connector Table 25 page 43 BIOS Setup program s Boot menu Table 56 page 85 1 6 4 Real Time Clock CMOS SRAM and Battery 20 The real time clock is compatible with DS1287 and MC146818 components The clock provides a time of day clock and a multicentury calendar with alarm features and century rollover The real time clock supports 256 bytes of battery backed CMOS SRAM in two banks that are reserved for BIOS use
56. f RAM on the board Memory Bank 0 No options Displays type of DIMM installed Language English Displays the current language Processor Serial e Disabled default When enabled displays the processor s serial number Number e Enabled Not supported by all processor types and speeds System Time Hour minute and Specifies the current time second System Date Day of the week Specifies the current date month day and year 74 BIOS Setup Program 4 4 Advanced Menu To access this menu select Advanced on the menu bar at the top of the screen Maintenance Main Advanced Security Power Boot E iE Boot Configuration Peripheral Configuration IDE Configuration Event Log Configuration Video Configuration Table 47 describes the Advanced menu This menu is used for setting advanced features that are available through the chipset Table 47 Advanced Menu Feature Options Description Extended Configuration No options Indicates the setting of the Extended Configuration submenu from the Maintenance Menu Used indicates that the Extended Configuration submenu is being used Not Used the default indicates that the Extended Configuration submenu is not being used Boot Configuration No options Configures Plug and Play and the Numlock key and resets configuration data When selected displays the Boot Settings Configuration submenu gt Peripheral Configuration No o
57. g the BIOS to execute from 64 bit onboard write protected DRAM The BIOS displays a message during POST identifying the type of BIOS and a revision code The initial production BIOS is identified as MO81010A 86A For information about Refer to The board s compliance level with Plug and Play Table 2 page 13 61 Intel Desktop Board D810EMO MO810E Technical Product Specification 3 2 BIOS Flash Memory Organization The Intel 82802AB Firmware Hub FWH includes a 4 Mbit 512 KB symmetrical flash memory device Internally the device is grouped into eight 64 KB blocks that are individually erasable lockable and unlockable Figure 11 shows the organization of the flash memory The last two 8 KB blocks of the fault tolerance area are the parameter blocks These blocks contain data such as BIOS updates vital product data VPD logo System Management BIOS SMBIOS interface and extended system configuration data ESCD information The backup block contains a copy of the fault tolerance block 080000 ore 64 KB Block 7 Boot Block TEE 64 KB Block 6 osos 64 KB Block 5 sate 64 KB Block 4 L Main System BIOS Zeen 64 KB Block 3 e 64 KB Block See 8 KB Parameter Block 2 eae 64 KB Block 1 Fault Tolerance 8 KB Parameter Block 1 000005 64 KB Block O Backup 48 KB Reserved OM08376 Figure 11 Memory Map of the Flash Memory Device 3 3 Resource Config
58. his submenu select Advanced on the menu bar 78 then IDE Configuration Maintenance Main Advanced Security Power Boot Exit Boot Configuration Peripheral Configuration Primary Primary IDE Configuration Secondary IDE Master Secondary IDE Slave IDE Master IDE Slave Diskette Configuration Event Log Configuration Video Configuration The menu represented in Table 50 is used to configure IDE device options Table 50 IDE Configuration Submenu Feature Options Description IDE Controller e Disabled e Primary e Secondary e Both default Hard Disk Pre Delay e Disabled default e 3 Seconds e 6 Seconds e 9 Seconds e 12 Seconds e 15 Seconds e 21 Seconds e 30 Seconds Specifies the integrated IDE controller Primary enables only the Primary IDE Controller Secondary enables only the Secondary IDE Controller Both enables both IDE controllers Specifies the hard disk drive pre delay gt Primary IDE Master No options Primary IDE Slave No options Reports type of connected IDE device When selected displays the Primary IDE Master submenu Reports type of connected IDE device When selected displays the Primary IDE Slave submenu gt Secondary IDE Master No options Secondary IDE Slave No options Reports type of connected IDE device When selected displays the Secondary IDE Master submenu Reports typ
59. ion Color Palette Available Refresh Frequencies Hz 640 x 480 16 colors 60 70 72 75 85 256 colors 60 70 72 75 85 64 K colors 60 70 72 75 85 16 Mcolors 60 70 72 75 85 720x480 256colors 75 85 64 K colors 75 85 16 M colors 75 85 720x576 256colors 60 75 85 64 K colors 60 75 85 16 M colors 60 75 85 800 x 600 256 colors 60 70 72 75 85 64 K colors 60 70 72 75 85 16 M colors 60 70 72 75 85 1024 x 768 256 colors 60 70 72 75 85 64 K colors 60 70 72 75 85 16 Mcolors 60 70 72 75 85 1152 x 864 256 colors 60 70 72 75 85 64 K colors 60 70 72 75 85 16 Mcolors 60 70 72 75 85 1280 x 1024 256 colors 60 70 72 75 85 64 K colors 60 70 72 75 85 16 M colors 60 70 75 85 1600 x 1200 256 colors 60 70 72 75 85 For information about Refer to 22 Product Description 1 10 Audio Subsystem The Audio Codec 97 AC 97 compatible audio subsystem includes these features Split digital analog architecture for improved signal to noise ratio 2 85 dB measured at line out from any analog input including line in and CD ROM 3 D stereo enhancement Power management support for ACPI 1 0a The audio subsystem consists of these devices Creative Sound Blaster AudioPCI 128V Crystal Semiconductor CS4297A stereo audio codec Audio connectors For information about Refer to Obtaining audio software and utilities Section 1 2 page 13 1 10 1 Creative Sound Blaster AudioPCl 128V
60. ion of the ATAPI CD ROM connector Figure 5 page 41 The signal names of the ATAPI CD ROM connector Table 29 page 45 1 11 Hardware Monitor Component 24 The hardware monitor component provides low cost instrumentation capabilities The features of the component include Internal ambient temperature sensing Remote thermal diode sensing for direct monitoring of processor temperature Power supply monitoring 12 5 3 3 2 5 VCCP to detect levels above or below acceptable values SMBus interface The hardware monitor component enables the board to be compatible with the Wired for Management WfM specification For information about Refer to The board s compatibility with the WfM specification Table 2 page 13 Product Description 1 12 LAN Subsystem The Intel 82559 Fast Ethernet Wired for Management WfM PCI LAN subsystem provides both 10Base T and 100Base TX connectivity Features include e 32 bit 33 MHz direct bus mastering on the PCI bus e 10Base T and 100Base TX capability using a single RJ 45 connector with connection and activity status LEDs e EEE 802 3u Auto Negotiation for the fastest available connection e Jumperless configuration the LAN subsystem is completely software configurable For information about Refer to The WfM specification Table 2 page 13 1 12 1 Intel 82559 PCI LAN Controller The Intel 82559 PCI LAN controller s features include e CSMA CD Protocol Engine e PCI bus interfa
61. ipheral device e An ATA 66 compatible cable e ATA 66 operating system device drivers For information about Refer to The supported version of ATAPI Table 2 page 13 gt NOTE Do not connect an ATA device as a slave on the same IDE cable as an ATAPI master device For example do not connect an ATA hard drive as a slave to an ATAPI CD ROM drive 63 Intel Desktop Board D810EMO MO810E Technical Product Specification 3 4 System Management BIOS SMBIOS 64 SMBIOS is a Desktop Management Interface DMI compliant method for managing computers in a managed network The main component of SMBIOS is the management information format MIF database which contains information about the computing system and its components Using SMBIOS a system administrator can obtain the system types capabilities operational status and installation dates for system components The MIF database defines the data and provides the method for accessing this information The BIOS enables applications such as Intel LANDesk Client Manager to use SMBIOS The BIOS stores and reports the following SMBIOS information e BIOS data such as the BIOS revision level e Fixed system data such as peripherals serial numbers and asset tags e Resource data such as memory size cache size and processor speed e Dynamic data such as event detection and error logging Non Plug and Play operating systems such as Windows NTT require an additional interface for obtaini
62. leep mode switch Table 7 lists the system states based on how long the power switch is pressed depending on how ACPI is configured with an ACPI aware operating system Table 7 Effects of Pressing the Power Switch and the power switch is If the system is in this state pressed for the system enters this state Off ACPI G2 S5 state Less than four seconds Power on On ACPI GO state Soft off Suspend On ACPI GO state Fail safe power off Sleep ACPI G1 state Wake up Sleep ACPI G1 state Power off For information about Refer to The board s compliance level with ACPI Section 1 3 page 13 27 Intel Desktop Board D810EMO MO810E Technical Product Specification 1 13 1 1 28 System States and Power States Under ACPI the operating system directs all system and device power state transitions The operating system puts devices in and out of low power states based on user preferences and knowledge of how devices are being used by applications Devices that are not being used can be turned off The operating system uses information from applications and user settings to put the system as a whole into a low power state Table 8 lists the power states supported by the board along with the associated system power targets See the ACPI specification for a complete description of the various system and power states Table 8 Power States and Targeted System Power Global States Sleeping States CPU States De
63. m IIl Processor 500E MHz 85 C 550E MHz 85 C 600E MHz 85 C 600EB MHz 85 C Intel 82810E DC 133 GMCH 70 C Intel 82801AA ICH 100 C Creative ES1373D 70 C CAUTION The voltage regulator area can reach a temperature of up to 85 C in an open chassis Ensure that there is proper airflow to this area of the board Failure to do so may result in damage to the voltage regulator circuit System integrators should ensure that proper airflow is maintained in the voltage regulator circuit item E in Figure 10 Components in this area could be damaged without adequate airflow 2 13 Reliability 56 The mean time between failures MTBF prediction is calculated using component and subassembly random failure rates The calculation is based on the Bellcore Reliability Prediction Procedure TR NWT 000332 Issue 4 September 1991 The MTBF prediction is used to estimate repair rates and spare parts requirements The Mean Time Between Failures MTBF data is calculated from predicted data at 55 C Board MTBF 330 526 hours Technical Reference 2 14 Environmental Table 38 lists the environmental specifications for the board Table 38 Board Environmental Specifications Parameter Specification Temperature Non Operating 40 C to 70 C Operating 0 C to 55 C Shock Unpackaged 30 g trapezoidal waveform
64. mode If only the supervisor password is set pressing the lt Enter gt key at the password prompt of the BIOS Setup program allows the user restricted access to Setup If both the supervisor and user passwords are set users can enter either the supervisor password or the user password to access Setup Users have access to Setup respective to which password is entered Setting the user password restricts who can boot the computer The password prompt will be displayed before the computer is booted If only the supervisor password is set the computer boots without asking for a password If both passwords are set the user can enter either password to boot the computer Table 41 shows the effects of setting the supervisor password and user password This table is for reference only and is not displayed on the screen Table 41 Supervisor and User Password Functions Supervisor Password to Password Password Set Mode User Mode Setup Options Enter Setup During Boot Neither Can change all Can change all None None None options options Supervisor Can change all Can change a Supervisor Password Supervisor None only options limited number of options User only N A Can change all Enter Password User User options Clear User Password Supervisor Can change all Can change a Supervisor Password Supervisor or Supervisor or and user set options limited number Enter Password user user of options
65. nectors l Figure 5 page 41 The signal names of the chassis fan connector Table 22 page 42 The signal names of the processor fan connector Table 23 page 42 1 13 2 3 Wake on Network Event A CAUTION 30 For Wake on network event the 5 V standby line for the power supply must be capable of providing adequate 5 V standby current Failure to provide adequate standby current when implementing Wake on network event can damage the power supply Refer to Section 2 11 3 on page 54 for additional information Wake on network event enables remote wakeup of the computer through a network The LAN subsystem whether onboard or as a PCI bus network adapter monitors network traffic at the Media Independent Interface Upon detecting a Magic Packett the LAN subsystem asserts a wakeup signal that powers up the computer The board supports Wake on network event through the PCI bus PME signal Product Description 1 13 2 4 Instantly Available Technology A CAUTION For Instantly Available technology the 5 V standby line for the power supply must be capable of providing adequate 5 V standby current Failure to provide adequate standby current when using this feature can damage the power supply Refer to Section 2 11 3 on page 54 for additional information Instantly Available technology enables the board to enter the ACPI S3 Suspend to RAM sleep state While in the S3 sleep state the computer will appear to be off the power supply is off
66. ng the SMBIOS information The BIOS supports an SMBIOS table interface for such operating systems Using this support an SMBIOS service level application running on a non Plug and Play operating system can obtain the SMBIOS information For information about Refer to The board s compliance level with SMBIOS Section 1 3 page 13 Overview of BIOS Features 3 5 BIOS Upgrades The BIOS can be upgraded using the Intel Flash Memory Update utility that is available from Intel This utility supports the following BIOS maintenance functions e Upgrading the flash BIOS from bootable recovery media e Changing the language section of the BIOS e Verifying that the upgrade BIOS matches the target system to prevent accidentally installing an incompatible BIOS e Updating the BIOS boot block BIOS upgrades and the Intel Flash Memory Update utility are available from Intel through the Intel World Wide Web site lt gt NOTE Please review the instructions distributed with the upgrade utility before attempting a BIOS upgrade For information about Refer to The Intel World Wide Web site Section 1 2 page 13 3 5 1 Language Support The BIOS Setup program and help messages are supported in five languages US English German Italian French and Spanish The default language is US English which is present unless another language is selected in the BIOS Setup program 3 5 2 Custom Splash Screen During POST an Intel splash screen is display
67. oard D810EMO MO810E Technical Product Specification 90 Table 58 BIOS Error Messages continued Error Message Checking NVRAM Update OK Updated Failed Keyboard Error Explanation NVRAM is being checked to see if it is valid NVRAM was invalid and has been updated NVRAM was invalid but was unable to be updated Error in the keyboard connection Make sure keyboard is connected properly Memory Size Decreased Memory Size Increased Memory size has decreased since the last boot If no memory was removed then memory may be bad Memory size has increased since the last boot If no memory was added there may be a problem with the system Memory Size Changed No Boot Device Available Off Board Parity Error Memory size has changed since the last boot If no memory was added or removed then memory may be bad System did not find a device to boot A parity error occurred on an offboard card This error is followed by an address On Board Parity Error Parity Error A parity error occurred in onboard memory This error is followed by an address A parity error occurred in onboard memory at an unknown address NVRAM CMOS PASSWORD cleared by Jumper lt CTRL_N gt Pressed NVRAM CMOS and passwords have been cleared The system should be powered down and the jumper removed CMOS is ignored and NVRAM is cleared User must enter Setup Error Messages and Beep Codes
68. on relocation shadow 58 Memory size adjusted for relocation shadow Going to clear Hit lt DEL gt message 59 Hit lt DEL gt message cleared lt WAIT gt message displayed About to start DMA and interrupt controller test 60 DMA page register test passed To do DMA 1 base register test 62 DMA 1 base register test passed To do DMA 2 base register test 65 DMA 2 base register test passed To program DMA unit 1 and 2 66 DMA unit 1 and 2 programming over To initialize 8259 interrupt controller 7F Extended NMI sources enabling is in progress 80 Keyboard test started Clearing output buffer checking for stuck key to issue keyboard reset command 81 Keyboard reset error stuck key found To issue keyboard controller interface test command 82 Keyboard controller interface test over To write command byte and init circular buffer 83 Command byte written global data init done To check for lock key continued 93 Intel Desktop Board D810EMO MO810E Technical Product Specification 94 Table 61 Runtime Code Uncompressed in F000 Shadow RAM continued Code Description of POST Operation 84 Lock key checking over To check for memory size mismatch with CMOS 85 Memory size check done To display soft error and check for password or bypass setup 86 Password checked About to do programming before setup 87 Programming before setup complete To uncompress SETUP code
69. or a dual colored LED Table 32 States for a Single colored Power LED LED State Description ACPI State Off Not running 1 S3 S5 Steady Green Running So Blinking Green Running message waiting So Table 33 States for a Dual colored Power LED LED State Description ACPI State Op Poweroff S5 Steady Green Running So Blinking Green Running message waiting So Steady Yellow Sleeping S1 S3 Blinking Yellow Sleeping message waiting S1 S3 gt NOTE To use the message waiting function ACPI must be enabled in the operating system and a message capturing application must be invoked 2 8 3 2 2 Power Switch Connector Pins 6 and 8 can be connected to a front panel power switch The switch must pull pin 6 to ground for at least 50 ms to signal the power supply to switch on or off The time requirement is due to internal debounce circuitry on the board At least two seconds must pass before the power supply will recognize another on off signal 2 8 3 2 3 Hard Drive Activity LED Connector Pins 1 and 3 can be connected to an LED to provide a visual indicator that data is being read from or written to a hard drive For the LED to function properly an IDE drive must be connected to the onboard IDE interface 2 8 3 2 4 Reset Switch Connector Pins 5 and 7 can be connected to a momentary SPST type switch that is normally open When the switch is closed the board resets and runs the POST 48 Technical Refe
70. ore shutting down the system the terminal error handler issues a beep code signifying the test point error writes the error to 1 O port 80h attempts to initialize the video and writes the error in the upper left corner of the screen using both monochrome and color adapters If POST completes normally the BIOS issues one short beep before passing control to the operating system Table 65 Beep Codes Beep Description Refresh failure Parity cannot be reset First 64 KB memory failure Timer not operational Not used 8042 GateA20 cannot be toggled Exception interrupt error Display memory R W error Not used 0 0 NI oO A WO PY 0 CMOS Shutdown register test error 1 Invalid BIOS e g POST module not found etc 97 Intel Desktop Board D810EMO MO810E Technical Product Specification 98
71. ory type size and frequency The board supports the following memory features e 3 3 V 168 pin DIMM with gold plated contacts e 100 MHz SDRAM e Serial Presence Detect SPD or non SPD memory BIOS recovery requires an SPD DIMM e Non ECC 64 bit memory e Unbuffered single or double sided DIMM The board is designed to support the DIMM configurations listed in Table 4 below Table A System Memory Configuration DIMM Size Non ECC Configuration 32 MB 4 Mbit x 64 64 MB 8 Mbit x 64 128 MB 16 Mbit x 64 256 MB Note 32 Mbit x 64 Note A 256 MB DIMM used with this board must be built with 128 Mbit device technology For information about Refer to The PC Serial Presence Detect Specification Table 2 page 13 Obtaining copies of PC SDRAM specifications http www intel com design pcisets memory Intel Desktop Board D810EMO MO810E Technical Product Specification 1 6 Intel 810E Chipset The Intel 810E chipset consists of the following devices e 82810E DC 133 Graphics Memory Controller Hub GMCH with accelerated hub architecture AHA bus e S2801AA I O Controller Hub ICH with AHA bus e 82802AB Firmware Hub FWH The chipset provides the host memory display and I O interfaces shown in Figure 3 66 100 133 MHz Host Bus 4 ATA33 66 USB gt 810E Chipset d d 82810E 100 MHz z 82802AB cl Graphics Memory AHA 82801AA UO Controller Hub y SC
72. os platforms desktop html American Megatrends Inc ATA 3 Information Technology Version 6 ATA Anonymous FTP Site AT Attachment 3 Interface ftp fission dt wdc com X3T10 2008D ATAPI Information Technology Version 18 T13 Anonymous FTP Site AT Attachment with Packet August 13 1998 ftp fission dt wdc com Interface Extensions Contact T13 Chair x3t13 project d1153r18 pdf T13 1153D Seagate Technology ATX ATX Specification Version 2 01 http download intel com February 1997 design motherbd atx htm Intel Corporation El Torito Bootable CD ROM format Version 1 0 the Phoenix Technologies web specification January 25 1995 site at Phoenix Technologies Ltd http www ptltd com techs and IBM Corporation specs html FlexATX FlexATX Addendum to the Version 1 0 http www teleport com ffsupprt microATX Specification spec FlexAT Xaddn1_01 pdf continued 13 Intel Desktop Board D810EMO MO810E Technical Product Specification 14 BIOS August 12 1998 Table 2 Specifications continued Reference Specification Version Revision Date and This specification is Name Title Ownership available at IrDA Serial Infrared Physical Version 1 1 October 17 1995 E mail irda netcom com Layer Link Specification Infrared Data Association Phone 510 943 6546 Fax 510 943 5600 LPC Low Pin Count Interface Version 1 0 http www Inte com Specification September 29 1997 design chipsets ind
73. overing BIOS Data sans venient aaia 66 Bul Boot Cen Eeer iii 67 3 7 1 CD ROM and Network Boot imitar morata 67 3 7 2 Booting Without Attached Devices ooooooccccccccconoccccncncconananccononcnnnnnnnnncnnnncnnns 67 3 8 USB Legacy EBEN EE auch ERE E 68 39 BIOS Sec rity EE 69 BIOS Setup Program 41 Intro UE ees eegen eet ek ld ls a ebe aba la 71 4 2 Maintenance Men 72 4 2 1 Extended Configuration SUDMeNU kk 73 4 3 Main Men scese gani ee EE EEE TE E A label dese bebe Hav enletkiveles 74 4 4 Advanced E EE 75 4 4 1 Boot Configuration Submenu cooococccccccccconononannncnnnnncnonnnnnnnncnnnnncnnnncnnnnnnnnnnnnos 76 4 4 2 Peripheral Configuration SUDMeNU oocccoocccccccnnncnonnnncnnnnnnano cnn nnnnnnnnrn nc nnnnnannns 77 4 4 3 Reen le IL le BEE TEE 78 4 4 4 Event Log Configuration Au 81 AAS Video Configuration ao tado 82 Contents 45 Securty MEN ada iii 83 AG Power Mon EE 84 4 7 A BOOT EI EE 85 4 81 EXITO ONU escote Eed a 87 5 Error Messages and Beep Codes 5 1 BIOS Error Mess Le EE 89 5 2 Port t POST Codes us aia 91 5 3 Bus initialization Checkpoints serna 95 S ET oT E eege E A T 96 5 5 BIOS Beep COUSS i A 97 Figures T Board COMPONEN Si A 11 NR E Le TL EE 12 3 Intel 810E Chipset Block Diagram ENEE 18 4 Back Panel I O Connectors mins rta 39 5x internal VOvCOMMOCIONS EE 41 6 External WO Connectors cuna sunt Gin ie aie agentes Gi eee eH aaa ae 46 7 Location of the Jumper Block dci ia 49 Si Board DIMENSIONS EE 51
74. port 03F8 03FF 8 bytes COM1 04D0 04D1 2 bytes Edge level triggered PIC OCF8 OCFB 4 bytes PCI configuration address register OCF9 1 byte Turbo and reset control register OCFC OCFF 4 bytes PCI configuration data register FFAO FFA7 8 bytes Primary bus master IDE registers FFA8 FFAF 8 bytes Secondary bus master IDE registers continued 34 Technical Reference Table 12 UO Map continued Address hex Size Description 96 contiguous bytes starting on a ICH ACPI TCO 128 byte divisible boundary 64 contiguous bytes starting ona Onboard resource 64 byte divisible boundary 32 contiguous bytes starting on a ICH USB 32 byte divisible boundary 16 contiguous bytes starting on a ICH SMBus 16 byte divisible boundary 4096 contiguous bytes starting on Intel 82810EAA PCI Bridge a 4096 byte divisible boundary 32 contiguous bytes starting ona Intel 82559 LAN Controller 32 byte divisible boundary 96 contiguous bytes starting ona LPC47M102 PME Status 128 byte divisible boundary 64 contiguous bytes starting on a Creative ES1373D Digital Audio Controller 64 byte divisible boundary Notes 1 Default but can be changed to another address range 2 Dword access only 3 Byte access only gt NOTE Some additional I O addresses are not available due to ICH addresses aliasing For information about ICH addressing refer to Intel web site at http developer intel com
75. provides a brief description of each Table 58 BIOS Error Messages Error Message GA20 Error Explanation An error occurred with Gate A20 when switching to protected mode during the memory test Pri Master HDD Error Pri Slave HDD Error Sec Master HDD Error Sec Slave HDD Error Pri Master Drive ATAPI Incompatible Pri Slave Drive ATAPI Incompatible Sec Master Drive ATAPI Incompatible Sec Slave Drive ATAPI Incompatible Could not read sector from corresponding drive Corresponding drive is not an ATAPI device Run Setup to make sure device is selected correctly Cache Memory Bad CMOS Battery Low CMOS Display Type Wrong An error occurred when testing L2 cache Cache memory may be bad The battery may be losing power Replace the battery soon The display type is different than what has been stored in CMOS Check Setup to make sure type is correct CMOS Checksum Bad CMOS Settings Wrong The CMOS checksum is incorrect CMOS memory may have been corrupted Run Setup to reset values CMOS values are not the same as the last boot These values have either been corrupted or the battery has failed CMOS Date Time Not Set DMA Error HDC Failure The time and or date values stored in CMOS are invalid Run Setup to set correct values Error during read write test of DMA controller Error occurred trying to access hard disk controller continued 89 Intel Desktop B
76. ptions Configures peripheral ports and devices When selected displays the Peripheral Configuration submenu IDE Configuration No options Specifies type of connected IDE device Event Log Configuration No options Configures Event Logging When selected displays the Event Log Configuration submenu gt Video Configuration No options Specifies the primary video adapter 75 Intel Desktop Board D810EMO MO810E Technical Product Specification 4 4 1 Boot Configuration Submenu To access this submenu select Advanced on the menu bar then Boot Configuration Maintenance Main Advanced Security Power Boot Exit Boot Configuration Peripheral Configuration IDE Configuration Event Log Configuration Video Configuration The submenu represented by Table 48 is for setting Plug and Play options resetting configuration data and the power on state of the Numlock key Table 48 Boot Configuration Submenu Feature Options Description Plug amp Play O S es No default Specifies if a Plug and Play operating system is being used No lets the BIOS configure all devices Yes lets the operating system configure Plug and Play devices Not required with Plug and Play operating systems e Yes Reset Config Data e No default Clears the BIOS configuration data on the next boot e Yes Numlock e Off e On default Specifies the power on state of the Numlock feature on the numeric keypad
77. r coprocessor test 9E Initialization after coprocessor test is complete Going to check extended keyboard keyboard ID and Num Lock A2 Going to display any soft errors A3 Soft error display complete Going to set keyboard typematic rate A4 Keyboard typematic rate set To program memory wait states A5 Going to enable parity NMI A7 NMI and parity enabled Going to do any initialization required before giving control to optional ROM at E000 A8 Initialization before E000 ROM control over E000 ROM to get control next A9 Returned from E000 ROM control Going to do any initialization required after E000 optional ROM control AA Initialization after E000 optional ROM control is over Going to display the system configuration AB Put INT13 module runtime image to shadow AC Generate MP for multiprocessor support if present AD Put CGA INT10 module if present in shadow continued Error Messages and Beep Codes Table 61 Runtime Code Uncompressed in F000 Shadow RAM continued Code Description of POST Operation AE Uncompress SMBIOS module and init SMBIOS code and form the runtime SMBIOS image in shadow B1 Going to copy any code to specific area 00 Copying of code to specific area done Going to give control to INT19 boot loader 5 3 Bus Initialization Checkpoints The system BIOS gives control to the different buses at several checkpoints to do various tasks Table 62 describes th
78. recovery BIOS recovery media can be either a 1 44 MB diskette or a CD ROM The recovery media must be bootable and it must contain the BIOS update files copied to it BIOS upgrades and the Intel Flash Memory Upgrade utility are available from Intel Customer Support through the Intel World Wide Web site NOTE BIOS recovery cannot be accomplished using non SPD DIMMs SPD data structure is required for the recovery process NOTE If the computer is configured to boot from an LS 120 diskette in the Boot menu the BIOS recovery diskette must be a standard 1 44 MB diskette not a 120 MB diskette For information about Refer to The BIOS recovery mode Section 2 9 page 49 The Boot menu in the BIOS Setup program Section 4 7 page 85 Contacting Intel customer support Section 1 2 page 13 Overview of BIOS Features 3 7 Boot Options In the BIOS Setup program the user can choose to boot from an ATAPI removable media device hard drives CD ROM or the network Boot devices are defined in priority order The default setting 1s for the CD ROM drive to be the primary boot device and the hard drive to be the secondary boot device 3 7 1 CD ROM and Network Boot Booting from CD ROM is supported in compliance to the El Torito bootable CD ROM format specification The network can also be selected as a boot device This selection allows booting from a network add in card with a remote boot ROM installed For information about Refer to
79. rence 2 9 Jumper Block Jh CAUTION Do not move jumpers with the power on Always turn off the power and unplug the power cord from the computer before changing a jumper setting Otherwise damage to the board could occur Figure 7 shows the location of the BIOS Setup jumper block This 3 pin jumper block determines the BIOS Setup program e mode Table 34 describes the jumper settings for the three modes normal configure and recovery OM08928 Figure 7 Location of the Jumper Block 49 Intel Desktop Board D810EMO MO810E Technical Product Specification 50 Table 34 BIOS Setup Configuration Jumper Settings J8F1 Function Mode Normal Configure Recovery Jumper Setting 1 2 2 3 None For information about How to access the BIOS Setup program The maintenance menu of the BIOS Setup program BIOS recovery Configuration The BIOS uses current configuration information and passwords for booting After the POST runs Setup runs automatically The maintenance menu is displayed The BIOS attempts to recover the BIOS configuration Bootable recovery media is required Refer to Section 4 1 page 71 Section 4 2 page 72 Se
80. ridge has four programmable interrupt request PIRQ input signals Any PCI interrupt source either onboard or from a PCI add in card connects to one of these PIRQ signals Because there are only four signals some PCI interrupt sources are mechanically tied together on the board and therefore share the same interrupt Table 16 lists the PIRQ signals and shows how the signals are connected to the PCI bus connectors and to onboard PCI interrupt sources Table 16 PCI Interrupt Routing Map ICH PIRQ Signal Name PCiinterrupt Source PIRQA PIRAB PIRQC PIRQD AGP Controller INTA IS SE IER ICH Audio Controller INTC ICH USB Controller IFE NTD Intel 82559 PCI LAN Controller INTC PCI Bus Connector INTA INB INC IND NOTE The ICH can connect each PIRQ line internally to one of the IRQ signals 3 4 5 6 7 10 11 14 and 15 Typically a device that does not share a PIRQ line will have a unique interrupt However in certain interrupt constrained situations it is possible for two or more of the PIRQ lines to be connected to the same IRQ signal 37 Intel Desktop Board D810EMO MO810E Technical Product Specification 2 8 Connectors A CAUTION 38 Only the back panel I O connectors of the board have overcurrent protection The internal board connectors are not overcurrent protected and should connect only to devices inside the computer chassis such as fans and internal peripherals Do not us
81. ription Table 2 Specifications continued Reference Specification Version Revision Date and This specification is Name Title Ownership available at UHCI Universal Host Controller Version 1 1 This guide is available at Interface Design Guide March 1996 http www usb org Intel Corporation developers USB Universal Serial Bus Version 1 1 http www usb org Specification September 23 1998 developers docs html Compaq Computer Corporation Intel Corporation Microsoft Corporation and NEC WiM Wired for Management Version 2 0 Baseline December 18 1998 Intel Corporation http developer intel com ial WfM wfmspecs htm 15 Intel Desktop Board D810EMO MO810E Technical Product Specification 1 4 Processor CAUTION The board supports processors that draw a maximum of 22 amps Using a processor that draws more than 22 amps can damage the processor the board and the power supply See the processor s data sheet for current usage requirements The board supports the processors listed in Table 3 The host bus frequency is automatically selected Table 3 Processors Supported by the Board Processor Type Processor Speed Host Bus Frequency L2 Cache Size Pentium Ill processor 600EB MHz 133 MHz 256 KB 600E MHz 100 MHz 256 KB 550E MHz 100 MHz 256 KB 500E MHz 100 MHz 256 KB Celeron processor 533 MHz 66 MHz 128 KB 500 MHz 66 MHz 128 KB 466 MHz 66 MHz 128 KB 433 MHz 66 MHz 128
82. ry else go to check point D7 for giving control to main BIOS Find main BIOS module in ROM image Uncompress the main BIOS module Copy main BIOS image to F000 shadow RAM and give control to main BIOS in F000 shadow RAM Table 60 Boot Block Recovery Code Checkpoints Code Description of POST Operation E0 Onboard floppy controller if any is initialized Compressed recovery code is uncompressed in F000 0000 in shadow RAM and give control to recovery code in F000 Shadow RAM Initialize interrupt vector tables initialize system timer initialize DMA controller interrupt controller E8 Initialize extra Intel Recovery Module E9 Initialize floppy drive EA Try to boot from floppy If reading of boot sector is successful give control to boot sector code EB Booting from floppy failed look for ATAPI LS 120 ZipT devices EC Try to boot from ATAPI If reading of boot sector is successful give control to boot sector code EF Booting from floppy and ATAPI device failed Give two beeps Retry the booting procedure again go to check point E9 91 Intel Desktop Board D810EMO MO810E Technical Product Specification 92 Table 61 Runtime Code Uncompressed in F000 Shadow RAM Code Description of POST Operation 03 NMI is Disabled To check soft reset power on 05 BIOS stack set Going to disable cache if any 06 POST code to be uncompres
83. sec date rate is selected Yellow Off LAN link is not established On steady state LAN link is established On brighter and pulsing The computer is communicating with another computer on the LAN 26 Product Description 1 13 Power Management Features Power management is implemented at several levels including e Advanced Configuration and Power Interface ACPI e Hardware support Power connector Wake on network event Instantly Available technology Wake on Ring Resume on Ring 1 13 1 ACPI If the board is used with an ACPI aware operating system the BIOS can provide ACPI support ACPI gives the operating system direct control over the power management and Plug and Play functions of a computer The use of ACPI with this board requires the support of an operating system that provides full ACPI functionality ACPI features include e Plug and Play including bus and device enumeration e Power management control of individual devices add in boards some add in boards may require an ACPI aware driver video displays and hard disk drives e Methods for achieving less than 30 watt system operation in the Power On Suspend sleeping state and less than 5 watt system operation in the Suspend to RAM sleeping state e A Soft off feature that enables the operating system to power off the computer e Support for multiple wake up events see Table 9 on page 29 e Support for a front panel power and s
84. sed 07 CPU init and CPU data area init to be done 08 CMOS checksum calculation to be done next 0B Any initialization before keyboard BAT to be done next DC KB controller 1 B free To issue the BAT command to keyboard controller OE Any initialization after KB controller BAT to be done next OF Keyboard command byte to be written 10 Going to issue Pin 23 24 blocking unblocking command 11 Going to check pressing of lt INS gt lt END gt key during power on 12 To init CMOS if Init CMOS in every boot is set or lt END gt key is pressed Going to disable DMA and Interrupt controllers 13 Video display is disabled and port B is initialized Chipset init about to begin 14 8254 timer test about to start 19 About to start memory refresh test 1A Memory Refresh line is toggling Going to check 15 us ON OFF time 23 To read 8042 input port and disable Megakey GreenPC feature Make BIOS code segment writeable 24 To do any setup before Int vector init 25 Interrupt vector initialization to begin To clear password if necessary 27 Any initialization before setting video mode to be done 28 Going for monochrome mode and color mode setting 2A Different buses init system static output devices to start if present See Section 5 3 for details of different buses 2B To give control for any setup required before optional video ROM check 2C To look for optional video ROM and give control 2D To give control to
85. the fans are off and the power LED is amber When signaled by a wake up device or event the system quickly returns to its last known wake state Table 9 on page 29 lists the devices and events that can wake the computer from the S3 state The board supports the PCI Bus Power Management Interface Specification For information on the versions of these specifications see Section 1 3 Add in boards that also support these specifications can participate in power management and can be used to wake the computer 1 13 2 5 Wake on Ring lt gt NOTE Wake on Ring requires the use of a modem external USB or internal PCI that supports the Wake on Ring feature The operation of Wake on Ring can be summarized as follows e Wakes up the computer from the ACPI S5 state e Requires two calls to access the computer First call restores the computer Second call enables access when the appropriate software is loaded e Detects incoming calls differently for external as opposed to internal modems For external USB modems the USB bus is monitored for the RING_DETECT signal For internal PCI modems incoming calls are detected through the PCI bus PME signal 1 13 2 6 Resume on Ring The operation of Resume on Ring can be summarized as follows e Resumes operation from the ACPI S1 state e Requires only one call to access the computer e Detects incoming call similarly for external and internal modems 31 Intel Desktop Board D810EMO M
86. troller provides the following features e Low pin count LPC interface e One serial port e Infrared IrDA interface e Intelligent power management including a programmable wake up event interface e Fan control One pulse width modulation PWM fan speed control output One fan tachometer input The BIOS Setup program provides configuration options for the I O controller For information about Refer to SMSC LPC47M102 I O controller http www smsc com The IrDA interface Section 2 8 3 page 46 1 8 Serial Debug Port The board has one 9 pin serial debug port connector The serial debug port s NS16C550 compatible UART supports data transfers at rates of up to 115 2 kbits sec with BIOS support The serial debug port can be assigned as COM1 3F8h COM2 2F8h COM3 3E8h or COM4 2E8h For information about Refer to The location of the serial debug port connector Figure 5 page 41 The signal names of the serial debug port connector Table 26 page 43 21 Intel Desktop Board D810EMO MO810E Technical Product Specification 1 9 Graphics Subsystem The Intel 82810E DC 133 GMCH graphics memory controller hub component provides the following graphics support features e Integrated 2 D and 3 D graphics engines e Integrated hardware motion compression engine e Integrated 230 MHz DAC Table 5 lists the refresh rates supported by graphics subsystem Table 5 Supported Graphics Refresh Rates Resolut
87. u represented in Table 56 is used to set the boot features and the boot sequence Table 56 Boot Menu Feature Options Description Quiet Boot e Disabled Disabled displays normal POST messages e Enabled default Enabled displays the OEM logo instead of POST messages Quick Boot e Disabled Enables the computer to boot without running certain e Enabled default POST tests Scan User Flash e Disabled default Enables the BIOS to scan the flash memory for user Area e Enabled binary files that are executed at boot time After Power Failure e Stays Off Specifies the mode of operation if an AC Power loss e Last State default occurs Power On restores power to the computer Stay Off keeps the power off until the power button is pressed Last State restores the previous power state before power loss occurred On PME e Stay Off default Specifies how the computer responds to a PME wakeup l event when the power is off from an ACPI S3 state e Power On e Power On continued 85 Intel Desktop Board D810EMO MO810E Technical Product Specification 86 Table 56 Boot Menu continued Feature First Boot Device Second Boot Device Third Boot Device Fourth Boot Device IDE Drive Configuration Primary Master IDE Primary Slave IDE Secondary Master IDE Secondary Slave IDE Options e ARMD FDD Note 1 e ARMD HDD Note 2 e IDE HDD e ATAPI CDROM e Intel UNDI PXE 2 0 Note 3
88. ume on Ring technologies from an ACPI state require the support of an operating system that provides full ACPI functionality 29 Intel Desktop Board D810EMO MO810E Technical Product Specification 1 13 21 Power Connector When used with an ATX compliant power supply that supports remote power on off the board can turn off the system power through software control To enable soft off control in software advanced power management must be enabled in the BIOS Setup program and in the operating system When the system BIOS receives the correct power management command from the operating system the BIOS turns off power to the computer With soft off enabled if power to the computer is interrupted by a power outage or a disconnected power cord when power resumes the computer returns to the power state it was in before power was interrupted on or off For information about Refer to The location of the power connector Figure 5 page 41 The signal names of the power connector Table 27 page 44 The ATX specification Section 1 3 page 13 1 13 2 2 Fan Connectors The board has two fan connectors The functions of these connectors are described in Table 10 Table 10 Fan Connector Descriptions Connector Function Chassis fan Provides 12 V DC for a system or chassis fan Processor fan Provides 12 V DC for a processor fan or active fan heatsink For information about Refer to The location of the fan con
89. uration 3 3 1 PCI Autoconfiguration 62 The BIOS can automatically configure PCI devices PCI devices may be onboard or add in cards Autoconfiguration lets a user insert or remove PCI cards without having to configure the system When a user turns on the system after adding a PCI card the BIOS automatically configures interrupts the I O space and other system resources PCI devices can share an interrupt Autoconfiguration information is stored in ESCD format For information about Refer to The board s compliance level with Plug and Play Table 2 page 13 Overview of BIOS Features 3 3 2 PCI IDE Support If you select Auto in the BIOS Setup program the BIOS automatically sets up the two PCI IDE connectors with independent I O channel support The primary IDE interface supports hard drives up to ATA 66 and recognizes any ATAPI devices including CD ROM drives tape drives and Ultra DMA drives The secondary IDE interface supports to ATA 33 The BIOS determines the capabilities of each drive and configures them to optimize capacity and performance To take advantage of the high capacities typically available today hard drives are automatically configured for Logical Block Addressing LBA and to PIO Mode 3 or 4 depending on the capability of the drive You can override the auto configuration options by specifying manual configuration in the BIOS Setup program To use ATA 66 features the following items are required e An ATA 66 per
90. use in medical life saving or life sustaining applications Intel may make changes to specifications and product descriptions at any time without notice The D810EMO MO810E board may contain design defects or errors known as errata that may cause the product to deviate from published specifications Current characterized errata are available on request Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order Copies of documents which have an ordering number and are referenced in this document or other Intel literature may be obtained from Intel Corporation P O Box 5937 Denver CO 80217 9808 or call in North America 1 800 548 4725 Europe 44 0 1793 431 155 France 44 0 1793 421 777 Germany 44 0 1793 421 333 other Countries 708 296 9333 T All other brands and names are the property of their respective owners Copyright 2000 Intel Corporation All rights reserved Preface This Technical Product Specification TPS specifies the board layout components connectors power and environmental requirements and the BIOS for the D810EMO MO810E desktop board It describes the standard product and available manufacturing options The D810EMO desktop board is known in some documentation and sales collateral as the MO810E Both names refer to the same product Intended Audience The TPS is intended to provide detailed technical information about the boar
91. ustry Intel Corporation lpc htm MicroATX microATX Motherboard Version 1 0 http www teleport com Interface Specification December 1997 ffsupprt spec Intel Corporation microatxspecs htm SFX Power Supply Version 1 1 http www teleport com Design Guide February 1998 ffsupprt spec Intel Corporation microatxspecs htm PCl PCI Local Bus Version 2 2 http Awww pcisig com Specification December 18 1998 PCI Special Interest Group PCI Bus Power Version 1 1 http Awww pcisig com Management Interface December 18 1998 Specification PCI Special Interest Group Plug and Plug and Play BIOS Version 1 0a ftp download intel com Play Specification May 5 1994 ial wfm bio10a paf Compaq Computer Corp Phoenix Technologies Ltd and Intel Corporation SDRAM PC SDRAM Unbuffered Revision 1 0 http www intel com DIMMs DIMM Specification February 1998 design chipsets memory 64 and Intel Corporation sdram htm S1 72 bit PC Serial Presence Revision 1 2A http www intel com Detect SPD December 1997 design chipsets memory Specification Intel Corporation sdram htm S1 SMBIOS System Management Version 2 3 http developer intel com ial wfm design smbios Award Software International Inc Dell Computer Corporation Hewlett Packard Company Intel Corporation International Business Machines Corporation Phoenix Technologies Limited American Megatrends Inc and SystemSoft Corporation continued Product Desc
92. vice States Targeted System Power GO working SO working CO working D0 working Full power gt 30 W state state G1 sleeping S1 CPU stopped C1 stop D1 D2 D3 5 W lt power lt 30 W state grant device specification specific G1 sleeping S3 Suspend to No power D3 no power Power lt 5 W state RAM Context except for wake saved to RAM up logic G2 S5 S5 Soft off No power D3 no power Power lt 5W Context not saved except for wake Cold boot is up logic required G3 No power to the No power D3 no power for No power to the system so mechanical off system wake up logic that service can be AC power is except when performed disconnected provided by from the battery or external computer source system chassis power supply Total system power is dependent on the system configuration including add in boards and peripherals powered by the Dependent on the standby power consumption of wake up devices used in the system Product Description 1 13 1 2 Wake Up Devices and Events Table 9 lists the devices or specific events that can wake the computer from specific states Table 9 Wake Up Devices and Events These devices events can wake up the computer from this state Power switch 1 S3 S5 RTCalam S1 8538 55 LAN S SS Modem S1 S3 USB S1 S3 PCI bus PME 3 1 13 1 3 Plug and Play In addition to power management A
93. word set Set Supervisor Password Set User Password Password can be up to seven Specifies the supervisor password alphanumeric characters Password can be up to seven Specifies the user password alphanumeric characters Clear User Password le Yes default Clears the user password Note 1 e No User Access Level le Limited Sets BIOS Setup Utility access rights for user Note 2 e No Access level e View Only Unattended Start Note 1 Notes e Full default e Disabled default e Enabled Enables or disables Wake on network event capability The keyboard remains locked until a password is entered 1 This feature appears only if a user password has been set 2 This feature appears only if both a user password and a supervisor password have been set 83 Intel Desktop Board D810EMO MO810E Technical Product Specification 4 6 Power Menu To access this menu select Power from the menu bar at the top of the screen Maintenance Main Advanced Security Power Boot E IiE The menu represented in Table 55 is for setting the power management features Table 55 Power Menu Feature Options Description ACPI Suspend State e S1 State default Specifies the ACPI suspend state e S3 State 84 BIOS Setup Program 4 7 Boot Menu To access this menu select Boot from the menu bar at the top of the screen Maintenance Advanced Security IDE Drive Configuration The men

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