Intel Core 2 Duo User's Manual
Contents
1. Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit October 2007 User s Manual Order Number 318476001US 25 n Intel Core 2 Duo Processor and Intel Q35 Express Chipset Setting Up and Configuring the n Development Kit 3 0 Setting Up and Configuring the Development Kit This chapter discusses basic board set up and operation Please refer to Chapter 2 0 for the board layout jumper setting location and the component reference designator 3 1 Overview The board consists of a baseboard populated with one Intel Core 2 Duo processor E6400 the Intel Q35 Express chipset and other system board components and peripheral connectors Note This board is shipped as an open system allowing for maximum flexibility in changing hardware configuration and peripherals Since the board is not in a protective chassis take extra precaution when handling and operating the system Figure 16 Intel Q35 Development Kits 3 2 Installing Board Standoffs Caution The evaluation board in this development kit is shipped as an open system allowing for maximum flexibility in changing hardware configuration and peripherals in the lab Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual October 2007 26 Order Number 318476001US Setting Up and Configuring the Development Kit I ntel Core 2 Duo Processor and Intel Q35 n tel Express Chipset Figu2. I ntel Core 2 Duo Processor and I ntel Q35 Express Chipset intel Figure 1 Board Features Reset button PCI Slot NN mme tree M PCI Express x1 Slot Power Button SPI EEPROM Secondary Port 80 LED Display SPI EEPROM Primary PCI Express x16 Graphics ot LGA775 Processor Socket Intel I O Controller Hub ICH SATA Port Intel Q35 Memory Controller Hub MCH 2x2 Standard Power Supply 2x12 Standard Power Supply 2 DIMM per channel DDR2 2 DIMM per channel DDR2 667 800 Channel B 667 800 Channel A 2 2 System Block Diagram This section will document the common features that are applicable to the Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit Figure 2 shows a simple block diagram of the development kit Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit October 2007 User s Manual Order Number 318476001US 11 n tel Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit Hardware Features Figure 2 Intel amp Q35 Express Chipset Development Kit block diagram PCI Express LGA775 Graphics x1 slot Primary processor Dual Channe Integrated Graphics VGA a o8 x ap a iE e o gt ss8Jdx 3 Od OLX Output DDR3 1066 IIS g g Graphics Sues 3 p Memory 5 m 2 Controller J om z Hub PIRE T GMCH IPT Epress SATA port C x1 PCI l
3. Table 2 October 2007 Intel Literature Centers Location Telephone Number U S and Canada 1 800 548 4725 U S from overseas 708 296 9333 Europe U K 44 0 1793 431155 Germany 44 0 1793 421333 France 44 0 1793 421777 Japan fax only 81 0 120 47 88 32 Order Number 318476001US Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual 9 n tel Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit Hardware Features 2 1 Development Kit Hardware Features This chapter describes the features of the Intel Q35 Development Kit These recommendations would largely apply to other designs incorporating Intel amp Q35 chipset This documentation should be used in conjunction with the datasheets specification updates and platform design guides for the Intel O Controller Hub 9 ICH9 Family and the Intel Q35 Express Chipset Contact your Intel representative for the availability of these documents Intel Q35 Express Chipset Development Kit Overview Figure 1 shows overview of the major features present on the development kit board Refer to next page for system block diagram of the development kit s motherboard Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual 10 October 2007 Order Number 318476001US Development Kit Hardware Features
4. InstantlP Intel Intel logo Intel386 Intel486 Intel740 IntelDX2 IntelDX4 IntelSX2 Intel Core Intel Inside Intel Inside logo Intel Leap ahead Intel Leap ahead logo Intel NetBurst Intel NetMerge Intel NetStructure Intel SingleDriver Intel SpeedStep Intel StrataFlash Intel Viiv Intel vPro Intel XScale IPLink Itanium Itanium Inside MCS MMX Oplus OverDrive PDCharm Pentium Pentium Inside skoool Sound Mark The Journey Inside VTune Xeon and Xeon Inside are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries Other names and brands may be claimed as the property of others Copyright 2007 Intel Corporation All Rights Reserved Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual October 2007 2 Order Number 318476 001US Contents I ntel Core 2 Duo Processor and Intel Q35 Express Chipset l n tel Contents 1 0 About This Manual eene de px pae tex xd epa rn ERU iinet siege XR RENE A EU ERE E RARE etewagada s 6 liL CONTENT OVerVIQW iie eerte ei pet iR ER daa be E bei aaa a a adden eda OR a e Dr ar Dn E Ide 6 1 2 Text CONVENTIONS 5 urere a ER ORE Dea FRE RNRO cnet AN RR ERREUR InKRo ER E Ua AER 6 1 3 Glossary of Terms and Acronyms sssssssssssssse nme senses nennen nnn 7 1 4 Support ODEIOTS ues exe ed in ere e hi ca eR cutn RU a ns e CR RA RR ER at Ra 8 1 4 1 Electronic Support Systems
5. O Controller Express Hub ICH euinsax sngls Azalia Link 69 x1 PCI amp v Express i HC Conr Audio odec e eez 2 3 Development Kit I nventory Checklists This section describes major hardware items which should be available on this development kit Table 3 Development Kit Hardware Items 1x 4 Layer Micro BTX form factor targeted dimensions 10 5 x 10 4 motherboard 1x Intel Core 2 Duo E6400 Processors in the LGA775 Socket 2x 1 GBytes DDR2 800 DIMM 1x BTX Heatsink with fan 1x CD ROM contain chipset drivers this include Intel GMA3100 driver 8x hex standoffs and 4x screws for bench top usage Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual October 2007 12 Order Number 318476001US a Development Kit Hardware Features I ntel Core 2 Duo Processor and I ntel Q35 Express Chipset n tel Table 4 Development Kit Board Specification 1 PCI Express x16 2 PCle x1 1 PCI expansion slots 1394a e 1 front panel headers for support of 1 port e 1 back panel port Universal Serial Bus 2 0 2front panel headers for support of 4 ports e 1 internal header for support of 2 ports 6 back panel ports 6 SATA 3 Gb sec ports 1 port used for eSATA Table 5 Internal 1 O headers 2x5 Front Panel I O header 2x7 Front Panel audio header 1x2 Chassis intrusion head
6. Processor and Intel Q35 Express Chipset Development Kit User s Manual 35 E Intel Core 2 Duo Processor and Intel Q35 Express Chipset Setting Up and Configuring the n Development Kit Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual October 2007 36 Order Number 318476001US
7. Q35 Express Chipset Development Kit User s Manual 21 m n tel Intel Core 2 Duo Processor and I ntel Q35 Express Chipset Development Kit Hardware Features 2 8 1 Table 10 2 8 2 Table 11 2 8 3 Jumper Functions Table 10 provides a list of the setting definitions for the Intel Core 2 Duo Processor and Intel 9 Q35 Express Chipset Development Kit Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit Board Jumpers Description Jumper Description Default Position Clear CMOS J6LB 1 2 Normal 2 3 Clear CMOS 1 2 RTC Reset 115LB 1 2 J 1 2 Normal 2 3 Clear Config Recovery J7LB 1 2 Normal 2 3 Configure jumper removed 1 2 recovery Manufacturing mode sei enable if jumper plug in Empty USB 2 0 Front Panel There are 4 USB 2 0 Front Panel can be found in the development kits board Front panel USB header thermistor protection is required USB front panel is label as U14LB U15LB U16LB and U1FW on the boards Refer to Figure 12 for header location of U14LB U15LB and U16LB Refer to Figure 13 for U1FW 9 1 10 2 USB Front Panel Pin Number Definition 5V 5V USB Dx USB Dy USB Dx USB Dy GND GND OO MO NN OD a BY WI N e No pin Hd o No connect 1394a Header The development kit board supports a 1394a solution on the PCle bus w
8. marked reserved or undefined Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them Intel processor numbers are not a measure of performance Processor numbers differentiate features within each processor family not across different processor families See http www intel com products processor number for details The Intel Core 2 Duo Processor and Intel 9 Q35 Express Chipset Development Kit may contain design defects or errors known as errata which may cause the product to deviate from published specifications Current characterized errata are available on request Hyper Threading Technology requires a computer system with an Intel Pentium 4 processor supporting HT Technology and a HT Technology enabled chipset BIOS and operating system Performance will vary depending on the specific hardware and software you use See http www intel com products ht Hyperthreading more htm for additional information Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order Copies of documents which have an order number and are referenced in this document or other Intel literature may be obtained by calling 1 800 548 4725 or by visiting Intel s website at http www intel com BunnyPeople Celeron Celeron Inside Centrino Centrino logo Core Inside FlashFile i960
9. product during an electrical storm Ensure that any equipment to which this product will be attached is also connected to properly wired and grounded receptacles Note Ensure that setting up the ATX power supply is the final step performed in the process of assembly 1 Physically inspect the motherboard for obvious defects Note that each reference board has been tested prior to distribution but a visual check should be performed to ensure no damage has occurred during shipping Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual October 2007 30 Order Number 318476001US m Setting Up and Configuring the Development Kit I ntel Core 2 Duo Processor and Intel Q35 l n tel Express Chipset Figure 23 October 2007 2 Set jumpers to default positions Refer to Section 2 8 1 for default positions 3 Install the processor and ensure the 4 pin CPU fan power connector is installed on header shown in Figure 23 CPU Fan location 4 pin CPU Fan Power Install the DDR2 DIMM in the Channel A Slot 0 connector DIMMs should never be inserted or removed unless the power supply is disconnected from the AC power source Refer to Section 2 5 for system memory configuration Connect a SATA hard drive USB keyboard USB mouse and VGA monitor video card is optional Connect a 2x12 standard power supply and 2x2 standard power supply as well Refer to Figure 24 for th
10. that uses SDVO as an input May have a variety of output formats including DVI LVDS HDMI TV out etc SMI System Management Interrupt SMI is used to indicate any of several system conditions such as thermal sensor events throttling activated access to System Management RAM chassis open or other system state related activity Rank A unit of DRAM corresponding to eight x8 SDRAM devices in parallel or four x16 SDRAM devices in parallel ignoring ECC These devices are usually but not always mounted on a single side of a DIMM 1 4 Support Options 1 4 1 Electronic Support Systems Intel s site on the World Wide Web http www intel com provides up to date technical information and product support This information is available 24 hours per day 7 days per week providing technical information whenever you need it Product documentation is provided online in a variety of web friendly formats at http developer intel com 1 4 2 Additional Technical Support If you require additional technical support please contact your field sales representative or local distributor 1 5 Product Literature Product literature can be ordered from the following Intel literature centers Intel Core 2 Duo Processor and Intel 9 Q35 Express Chipset Development Kit User s Manual 8 October 2007 Order Number 318476001US About This Manual Intel Core 2 Duo Processor and Intel Q35 Express Chipset
11. 5 Express Chipset Development Kit Hardware Features Figure 8 2 6 Figure 9 2 6 1 Single Channel Asymmetric Mode Configuration with 3x DI MMs Channel A DIMM 0 Channel A DIMM 1 Channel B DIMM 0 Channel B DIMM 1 Back Panel Connectors Figure 9 shows back panel connectors for the development kit Back panel Connectors Side Speaker Line in Jack 1394a Port PJS EAN Port cas Rear Line out e Jack fe USB Port Center Mic In Jack VGA Analog Total 6 eSATA Port Display Sub Ports Woofer Speaker Out Jack Audio Connectors This development kit board supports up to 7 1 channel audio configuration It is backward compatible with 5 1 2 1 and stereo 2 channel audio configuration as well Line In Jack Light Blue This audio jack is used to for line in devices including some optical devices Line Out Jack Light Green This audio jack is used for line out devices It s used in 2 1 5 1 and 7 1 channel audio configuration It can be used for headphone and stereo speaker as well Mic I n Jack Pink This audio jack is use for microphone input Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual 18 October 2007 Order Number 318476001US Development Kit Hardware Features ntel Core 2 Duo Processor and I ntel Q35 Express Chipset n tel 2 6 2 Figure 10 Table 8 2 6 3 2 6 4 2 6 5
12. 6 shows a dual channel configuration using 4 DIMMs In this example the combined capacity of the 2x DIMMs in Channel A equals the combined capacity of the 2x DIMMs in Channel B Also the DIMMs are matched between DIMM 0 and DIMM 1 of both channels Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual 16 October 2007 Order Number 318476001US m Development Kit Hardware Features l ntel Core 2 Duo Processor and I ntel Q35 Express Chipset n tel Figure 6 Dual Channel I nterleaved Mode Configuration with 4x DI MMs Channel A DIMM Channel A DIMM Channel B DIMM Channel B DIMM 2 5 2 Single Channel Asymmetric Mode Configurations Figure 7 shows a single channel configuration using 1x DIMM In this example only the DI MM 0 socket of Channel A is populated Channel B is not populated Figure 7 Single Channel Asymmetric Mode Configuration with 1x DI MM Channel A DIMM 0 Channel A DIMM 1 Channel B DIMM 0 Channel B DIMM 1 Figure 8 shows a single channel configuration using 3x DIMMs In this example the combined capacity of the 2x DIMMs in Channel A does not equal the capacity of the single DIMM in the DIMM O socket of Channel B Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual October 2007 17 Order Number 318476001US n tel Intel Core 2 Duo Processor and Intel Q3
13. Express port typically the external graphics interface It communicates with the 1 O controller hub Intel ICH9 and other 1 0 controller hubs over the DMI interconnect In this document MCH refers to the Intel amp Q35 MCH component MEC Media Expansion Card also known as ADD2 card Refer to ADD2 term for description PCI Express Third Generation input output graphics attach called PCI Express Graphics PCI Express is a high speed serial interface whose configuration is software compatible with the existing PCI specifications The specific PCI Express implementation intended for connecting the G MCH to an external Graphics Controller is a x16 link and replaces AGP Primary PCI The Primary PCI is the physical PCI bus that is driven directly by the ICH9 component Communication between Primary PCI and the G MCH occurs over DMI Note that the Primary PCI bus is not PCI Bus 0 from a configuration standpoint SDVO Serial Digital Video Out SDVO SDVO is a digital display channel that serially transmits digital display data to an external SDVO device The SDVO device accepts this serialized format and then translates the data into the appropriate display format i e TMDS LVDS TV Out This interface is not electrically compatible with the previous digital display channel DVO For the 82Q965 GMCH it will be multiplexed on a portion of the x16 graphics PCI Express interface SDVO Device Third party codec
14. I OS checksum is bad go to check point EO else goto checkpoint D7 Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual October 2007 32 Order Number 318476001US Setting Up and Configuring the Development Kit l ntel Core 2 Duo Processor and Intel Q35 l n tel Express Chipset D7 D8 D9 E1 E8 EC EE Restore CPUID value to register Bootblock runtime module transferred to system memory Main BIOS runtime code is to be decompressed Copy main BIOS into system memory OEM memory detection configuration error Range reserved for chipset vendors OEMs Boot Block Recovery Code Checkpoints EO E9 EA EB EF EF FO F1 F2 F3 F5 FA FB F4 FC FD FF Initialize Floppy Controller DMA controller and interrupt controller Set up floppy controller and data Attempt to read from floppy Enable ATAPI hardware Attempt to read from ARMD and ATAPI CDROM Disable ATAPI hardware Jump back to checkpoint E9 Read error occurred on media Jump back to checkpoint EB Floppy read error Search for pre defined recovery file in root directory Recovery file not found Start reading FAT table and analyze FAT to find the clusters occupied by the recovery file Start reading recovery file cluster by cluster Disable L1 cache Check validity of recovery file configuration against configuration of FLASH part Enable FLASH write through POEM and chipset specific meth
15. Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual October 2007 Order Number 318476 001US INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS NO LICENSE EXPRESS OR IMPLIED BY ESTOPPEL OR OTHERWISE TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT EXCEPT AS PROVIDED IN INTEL S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY RELATI NG TO SALE AND OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTI ES RELATING TO FITNESS FOR A PARTI CULAR PURPOSE MERCHANTABILITY OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT Intel products are not intended for use in medical life saving life sustaining critical control or safety systems or in nuclear facility applications Intel may make changes to specifications and product descriptions at any time without notice Intel Corporation may have patents or pending patent applications trademarks copyrights or other intellectual property rights that relate to the presented subject matter The furnishing of documents and other materials and information does not provide any license express or implied by estoppel or otherwise to any such patents trademarks copyrights or other intellectual property rights Designers must not rely on the absence or characteristics of any features or instructions
16. October 2007 Center Subwoofer Speaker Out Jack Orange This audio jack is used to connect to center subwoofer speakers in a 5 1 and 7 1 channel audio configuration Rear Speaker Out Black This audio jack is used to connect to rear speakers in a 5 1 and 7 1 channel audio configuration Side Speaker Out Gray This audio jack is used to connect to side speakers for 7 1 channel audio configuration only RJ 45 LAN Connector with I ntegrated LEDs Two LEDs are built into the RJ 45 LAN connector as shown in Figure 10 Table 8 describes the LED states when the board is powered up and the Gigabit LAN subsystem is operating LAN Connector LED locations Green LED D Green Yellow LED LAN Connector LED status LED Color LED State Condition Off LAN link is not established Left Green On LAN link is established Blinking LAN activity is occurring N A Off 10 Mbits sec data rate is selected Right Green On 100 Mbits sec data rate is selected Yellow On 1000 Mbits sec data rate is selected USB Port The USB port supports the USB 1 1 2 0 specification Coaxial S PDIF I n Out Connector This connector provides digital audio input and output from external audio system that supports digital coaxial audio Ensure that the audio system provides a coaxial digital in out connector eSATA Port This development kits support the first generation eSATA port Intel Core 2 Duo Pro
17. SRM for retention Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit October 2007 User s Manual Order Number 318476001US 29 Intel Core 2 Duo Processor and Intel Q35 Express Chipset Setting Up and Configuring the Development Kit Figure 22 Tightening Heatsink on the SRM and Board 3 4 Board Setup and Configuration before Boot Follow the steps below to operate the board Warning Before starting ensure the power supply is not connected to the board Ensure a safe and static free work environment before removing any components from their anti static packaging The Development Platform is susceptible to electrostatic discharge which may cause failure or unpredictable operation The Development Platform must be operated on a flame retardant surface because a chassis is not included with the platform Caution Connecting the wrong cable or reversing a cable may damage the board and may damage the device being connected Since the board is not in a protective chassis use caution when connecting cables to the board Caution The power supply cord is the main disconnect device to main power AC power The Socket outlet should be installed near the equipment and should be readily accessible To avoid shock ensure that the power cord is connected to a properly wired and grounded receptacle Do not connect disconnect any cables or perform installation maintenance of the boards in this
18. ation J2BC sssssssssssss Im s mem nenne aa sena nna nnns 20 12 Major Jumper and Header Locations sssssssssssssn e Hm mese nnne 21 13 Location for 1394a Header and USB Front Panel ssssssssssse enne 23 14 SPI Socket with Retaining Clip i iiiscseise eene then hh RR RR RRREYRRRAGRRTR GR GXRR AR ER IRR AERE YER ERA 24 15 SPI Bevice Installation iet era REESE RERU M EYIRDERIRY EEEE RR TE DE P DX PR E meena 25 16 Intel Q35 Development Kits cc meme eem hene mena 26 l7 MOUNTING Hole LOCATIONS iur erp s eper rerit arre eet c EF ER ERR a Deda Heise Ee ER FNEREE eee DER ERAN IE 27 18 Mounting the Standoff for BTX Heatsink cece cece eee eee eterna tes 28 19 Casing with Support and Retention Module ccc cece eee Henn 28 20 BTX board alignment on SRM nena 29 21 Heatsink Aligrimient iioii darren e tre eene imr eade e e Fa Rer Ure Kate er eb eK ka e E Fere E 29 22 Tightening Heatsink on the SRM and Board sssssssssssssn meme nene 30 23 CPU Far lOCAUON censet exe aen RR ERR KERkR RR RR AR RARRXARRRRRRPR D RR ERR RR DUEDKR REX ERI Papae br FR RR 31 24 2x12 Standard power supply and 2x2 power supply sssssssse 32 Tables 1 BI guo ws 7 2 Intel Literature Centers 5 deuce etes cash ike rne ER rh iS PRI o Reda s SX ERRERR EA LE FAR RENE RR ER ER PEE GERE E es 9 3 Development Kit Hardware Items esssssssssesesee enemies nein 12 4 Development Kit Board Speci
19. cessor and Intel Q35 Express Chipset Development Kit User s Manual Order Number 318476001US 19 n tel Intel Core 2 Duo Processor and ntel Q35 Express Chipset Development Kit Hardware Features 2 7 2 7 1 Figure 11 2 7 2 Caution 2 7 3 Debug Features Extended Debug Probe XDP The reference board provides a J TAG compliant test access port TAP for attachment of an XDP connector The XDP connector and associated circuitry enable the use of the ITP for the particular processor to interrupt the boot sequence and view processor status The XDP connector is located on the backside of the board at location J 2BC Refer to Figure 11 to the XDP connector location Take notes that ITP XDP SSA connector is needed Refer to diagram below for the ITP XDP SSA connector ITP XDP Connector location J 2BC ITP XDP Connector ITP XDP SSA Connector is f g needed in order to EN RT connect to ITP XDP2 3 tools Power LEDs Power LEDs on the board indicate when standby power is being applied to the standby planes When lit they indicate that no DIMM modules should be inserted or removed To install or replace DIMM modules insure that AC power to the power supply is removed by unplugging the AC power cord from the power supply or placing the switch on the power supply to the open position Removing DIMM modules when the standby power LEDs is lit could result in damage to the memor
20. de is equivalent to single channel bandwidth operation for real world applications This mode is used when only a single DIMM is installed or the memory capacities are unequal Technology and device width can vary from one channel to the other If different speed DIMMs is used between channels the slowest memory timing will be used Figure 3 illustrates the memory channel and DIMM configuration Figure 3 Memory Channel and DI MM Configuration 2 5 1 Dual Channel Interleaved Mode Configurations Figure 4 shows a dual channel configuration using two DIMMs In this example the DIMM O0 sockets of both channels are populated with identical DIMMs Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit October 2007 User s Manual Order Number 318476001US 15 m n tel Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit Hardware Features Figure 4 Dual Channel Interleaved Mode Configuration with 2x DI MMs Channel A DIMM 0 Channel A DIMM 1 Channel B DIMM 0 Channel B DIMM 1 Figure 5 shows a dual channel configuration using 3 DIMMs In this example the combined capacity of the two DIMMs in Channel A equal the capacity of the single DIMM in the DIMM 0 socket of Channel B Figure 5 Dual Channel Interleaved Mode Configuration with 3x DIMMs Channel A DIMM 0 Channel A DIMM 1 Channel B DIMM 0 Channel B DIMM 1 Figure
21. e location Plug the power cable into the back of the power supply leaving the switch in the OFF position Once the board is set up plug the cord into the power source Switch on the power supply Press the power button Refer to Figure 24 or Figure 1 for power on button location Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual Order Number 318476001US 31 n Intel Core 2 Duo Processor and Intel Q35 Express Chipset Setting Up and Configuring the n e Development Kit Figure 24 2x12 Standard power supply and 2x2 power supply Power on button 2x12 Standard power supply 2x2 Standard power supply 3 5 Post Codes Definitions The CRB BIOS writes progress and error codes to Port 80 during POST These codes are defined below 3 5 1 Normal Post Codes Uncompressed INIT code checkpoints Before D1 Early chipset and SIO initialization NMI disabled D1 Perform keyboard controller BAT test Save power on CPUID to scratch CMOS DO Go to flat mode with 4GB limit Start checksum verification D2 Disable cache and begin sizing full memory array D3 Additional chipset initialization re enable cache D4 T base 512 MB of memory adjust policies and cache first 8 D5 Bootblock code copied from ROM to lower system memory BIOS now executes out of RAM D6 Check for recovery mode and verify main BIOS checksum If either in recovery mode or main B
22. ebug Feat res cernere se eei eene e ia inei eo Rieti wd Fen e Ee De EET KC HE UR Feb Fark e dua 20 2 7 1 Extended Debug Probe XDP ssssssssssssseee mmm meme mener ens 20 2 7 2 POWer LEDS essersi ek Rex EXR MEERERERRRRRR RR DRGRNRERXRERRERRXERR KR NER i nn 20 2 1 3 Port 80 POST Code LEDS ox ene E EE RPXY ER XERIA T YU NR RN EX RA RR pk ins 20 2 7 4 Voltage Reference vcs iciisisietcccisetsnaitenretcnadninees caves KRRRR REA RATE NER ERE KR ERR ER pagi a 21 2 8 Development Kit Major Connectors and Jumpers sssssssssess mene 21 2 8 1 Jumper Functions rssicon rer tunis sansa ERRARE ARR EYE E ERE RR EE de RERYR RE 22 2 8 2 USB 2 0 Front Panel cir b EX RE RERRORE ER UNEXDLEERIREIE RN XGA cus GE Ra 22 2 9 3 139438 Header acer t een ren Pe Recte e e E BUE M e RR RU e RE 22 2 9 SPI Removal Installation Technique cece cece meme menn 23 2 9 1 SPI Device REMOVAL ea beati te e trn ri RR e REEL ERE EARS ER MERE KR PR ERE 24 2 9 2 SPI Device Instalati Meri eicere ener rb nter rhe eed pem ran Fan i le EIER 24 3 0 Setting Up and Configuring the Development Kit sssusouseseeeeeeee 26 3 1 OVERVIEW iiri RERRDR Peete haan nee ee ade E DRE PRERE AM REM Rinne 26 3 2 Installing Board Standoffs ccc enter rene ener aes 26 3 3 BTX Heatsink Setup with SRM ccc cee emen nennen nnn 28 3 3 1 SRM Alignment on any BTX Board cect cece e eee eter eee ered 28 3 4 Board Setup and Configurat
23. er 3 four wire fan headers 2x8 High Definition audio header Table 6 Supported Intel Technologies Sheet 1 of 2 Technology Features support Reference Documentation Enables remote down the wire management of out of band networked systems regardless of system state helping improve efficiency Intel amp Active Management asset management and system security and Technology with System availability http www intel com technology Defense feature Intel System Defense Feature can help block platform technology intel amt ICH8 DO only incoming software attacks isolate a device from the network if infected and proactively alert embedded system vendors if critical software agents are missing Dual independent display expands viewable workspace for devices such as point of sale terminals with two monitors Provides next generation graphics performance for advanced embedded operating systems Delivers richer visual color and picture clarity without the need for additional discrete graphics cards Intel Graphics Media Accelerator 3000 http www intel com products chipsets gma3000 demo demo html Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit October 2007 User s Manual Order Number 318476001US 13 n tel Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit Hardware Features Table 6 Supported I nte
24. ff for BTX Heatsink 3 3 BTX Heatsink Setup with SRM This section describes BTX casing which uses Support and Retention Module SRM as shown in Figure 19 Note SRM is not included in this development kits Figure 19 Casing with Support and Retention Module 3 3 1 SRM Alignment on any BTX Board Attach the BTX Thermal Module Assembly TMA over the processor to the Support and Retention Module SRM by following procedures described below Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual October 2007 28 Order Number 318476001US Setting Up and Configuring the Development Kit I ntel Core 2 Duo Processor and Intel Q35 Express Chipset 1 Place the uBTX board on the Support and Retention Module SRM so that the holes A B C and D on the PCB line up with the corresponding locations on the SRM see Figure 19 The board and SRM assembly should look like Figure 20 Figure 20 BTX board alignment on SRM 2 Place the heatsink on top of the processor The heatsink should align with the holes on the SRM and board as shown below Figure 21 Clean the surface of the processor with isopropyl alcohol before attaching the heatsink Figure 21 Heatsink Alignment 3 Use two 6 32 screws to partially tighten the rear end of the heatsink to the board and the SRM as shown in Figure 22 The screw uses the threaded holes of the
25. fication need 13 5 Internal I O headers iiec een ke tte engan EE RR X ER ER ER RR RRERTRRERYRR Ry RR Y Aa RARO KR Rd 13 6 Supported Intel Technologies cccce ccc m memes enne eee rene nennen 13 7 Additional Feat res isset ect sa I nnen RRR RR RXRREGERRERRERRRRRRRXRRRPERRPEEIrERRRR E Re REA 14 8 LAN Connector LED Status ixi tre E RR RERUORERAPRERRISQRERUE EFRIREP QR NER PRG NOR G KY RO E ERR ns 19 9 Voltage Reference detail erre ette ern nexa nia R9 Rer RR E RRRPEREE ERR RENA erect es 21 10 Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit Board Jumpers DeseripblODi s iis cus citi GS orte t shad ek n EE ENS b RR X unas UAR XR KR EA CAROLE AR RE UR RR 22 Il USB Front Panel mirnesa keen oe idea cede tete eEEo Eat ade adie dhe Fa bake nda mer adus PA 22 12 1394a H68G6GI teta nt nen dix eade FU enl tr nce reto e dn e e Rute Eh e Ret UE RU CHAR GE ACA ne 23 Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual October 2007 4 Order Number 318476 001US Revision History I ntel Core 2 Duo Processor and Intel Q35 Express Chipset l n tel Revision History Date Revision Description October 2007 001 Initial release October 2007 Order Number 318476 001US Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual 5 n tel Intel Core 2 Duo Processor and I
26. group is represented by the signal name followed by a variable n For example the lower chip select signals are named CSO CS1 CS2 and so on they are collectively called CSn A pound symbol appended to a signal name identifies an active low signal Port pins are represented by the port abbreviation a period and the pin number e g P1 0 1 3 Glossary of Terms and Acronyms This section defines conventions and terminology used throughout this document Table 1 Definition Sheet 1 of 2 Term Description Advanced Digital Display Card 2 9 Generation This card provides digital display options for an Intel Graphics Controller that supports ADD2 cards It plugs into a x16 PCI ADD2 Card Express connector but uses the multiplexed SDVO interface The card adds Video In capabilities to platform This Advanced Digital Display Card will not work with an Intel Graphics Controller that supports DVO and ADD cards It will function as an ADD2 card in an ADD2 supported system but video in capabilities will not work ACPI Advanced Configuration and Power Interface Core The internal base logic in the G MCH DDR2 A second generation Double Data Rate SDRAM memory technology DMI G MCH Intel ICH9 Direct Media Interface DVI Digital Video Interface Specification that defines the connector and interface for digital displays FSB Front Side Bus FSB is synonymous with Host or processor bus GMA 3100 In
27. ion before BOot ccceccece eee ee ene ee eee mme 30 3 5 Post Codes Definitions iecore ehr rera tmr Kiet E Re bo mx tana BEAR E a E ERE angie ans PER Ed 32 3 5 1 Normal Post CodeS iren eost ea urn beia resi Ven ae Qe eV ea nde n Fea pa ce PA 32 Figures L Board EeatUL 6S iiesiisaeeseh rae EE ORE RES ER EREWRRRR RXEXR RERR XR RON RRRERARRRERRRY T RRGRRIPRE PR KARXYIrRRRPAS 11 2 Intel Q35 Express Chipset Development Kit block diagram ssessee 12 3 Memory Channel and DIMM Configuration sssssssssssse Heer nnns 15 4 Dual Channel Interleaved Mode Configuration with 2x DIMMS sse 16 5 Dual Channel Interleaved Mode Configuration with 3X DIMMS ceceeene ene ee teeta tent ees 16 Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit October 2007 User s Manual Order Number 318476 001US 3 n tel Intel Core 2 Duo Processor and Intel Q35 Express Chipset Contents 6 Dual Channel Interleaved Mode Configuration with 4x DIMMS csse 17 7 Single Channel Asymmetric Mode Configuration with 1x DIMM sssenm HH 17 8 Single Channel Asymmetric Mode Configuration with 3x DIMMs s sem 18 9 Back panel ConnectOFs eei ret Ld mr eat beet e ce GR DER ERR LER T RO GRE RE UAE ER ER NER ERR 18 10 LAN Connector LED loCatlOr s 25 tre etna seem tease ehoen REF te esd ar Vei a E oa Seva te vedas VEU FL ie 19 11 ITP XDP Connector loc
28. ith a single 1394a port on the back panel see Figure 9 and another header supporting a 1394a port see Figure 13 Front panel 1394a header thermistor protection is required Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual 22 October 2007 Order Number 318476001US Development Kit Hardware Features ntel Core 2 Duo Processor and I ntel Q35 Express Chipset n tel Figure 13 Location for 1394a Header and USB Front Panel xb i D Lol Il AL Mustela DIL LIT tos ULFW USB Front Panel o EEEERE 10 2 Table 12 1394a Header Pin Number Definition NDCD A NSINA NSOUT A NDTR A GND NDSR A NRTS A NCTS A NRI A OO CO NN DOD OW AJ WwW N e Hd o No Pin 2 9 SPI Removal Installation Technique When removing or installing the SPI device care must be taken to avoid damage to the SPI socket The cap is constructed of plastic and can easily be damaged Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit October 2007 User s Manual Order Number 318476001US 23 n tel Intel Core 2 Duo Processor and I ntel Q35 Express Chipset Development Kit Hardware Features 2 9 1 Figure 14 2 9 2 SPI Device Removal To remove the SPI device from the socket use a tweezer tip to gently pry one leg of the cap away from the socket There is a small latch
29. l Technologies Sheet 2 of 2 Technology Features support Reference Documentation Helps improve system performance by optimizing use of available memory bandwidth and reducing latency of memory Intel amp Fast Memory Access access by monitoring all pending read write requests allows safe and efficient overlapping of commands on all system bus interfaces http www intel com products chipsets q965 q963 demo demo html With a second hard drive added provides Intel Matrix Storage quicker access to digital photo video and Technology Intel ICH8 data files with RAID 0 5 and 10 and greater EU a cas DO only data protection against a hard disk drive ge sos failure with RAID 1 5 and 10 Enables premium digital sound and delivers advanced features such as multiple audio streams and jack re tasking http www intel com design chipsets Support for microphone array enables hdaudio htm enhanced voice capture for high quality input to voice driven activities Intel High Definition Audio Table 7 Additional Features 6 Analog audio connectors and 2 digital audio connectors Piezo speaker for BIOS POST codes BIOS configuration jumper Clear CMOS jumper Power Button Reset Button XDP connector 2 4 Processor Support The Intel Q35 Development Kit supports the following processors in the LGA775 Socket with FSB of 800 1067 1333 MHz The
30. ntel Q35 Express Chipset About This Manual 1 1 1 2 About This Manual This user s manual describes the use of the Intel Q35 Express Chipset Development Kit This manual has been written for OEMs system evaluators and embedded system developers All jumpers headers LED functions and their locations on the board along with subsystem features and POST codes are defined in this document For the latest information about the Intel Q35 Express Chipset Development Kit reference platform visit http developer intel com design intarch devkits index htm iid embed_body devkits For design documents related to this platform such as schematics and layout please contact your Intel Representative Content Overview Chapter 1 0 About This Manual This chapter contains a description of conventions used in this manual The last few sections explain how to obtain literature and contact customer support Chapter 2 0 Development Kit Hardware Features This chapter provides information on the development kit features and the board capability This includes the information on board component features jumper settings pin out information for connectors and overall development kit board capability Chapter 3 0 Setting Up and Configuring the Development Kit This chapter provides instructions on how to configure the evaluation board and processor assembly by setting BTX heatsink jumpers connecting peripherals p
31. od Detect FLASH type Recovery file size does not match FLASH part size Erase FLASH Program FLASH Flash program successful Disable FLASH write Restore CPUID into register Runtime POST Code Checkpoints 03 04 05 06 October 2007 Order Number 318476001US Disable NMI Parity EGA video and DMA controllers Initialize BIOS POST and runtime data area Verify CMOS checksum Initialize status register A Initialize interrupt hardware and interrupt vector table Do R W to CH 2 count reg Initialize CH 0 as system timer Install POSTINTCH handler Enable IRQO in PIC for system timer interrupt Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual 33 intel 08 CO C1 C2 C5 C6 C7 0A OB oc OE 13 11 12 13 24 30 2A 2C 2E 31 33 37 38 39 3A 3B 3C 40 50 52 Intel Core 2 Duo Processor and Intel Q35 Express Chipset Setting Up and Configuring the Development Kit Initialize CPU The BAT test performed on KBC Auto detection of KB and MS Early CPU Init Start Disable cache and init local APIC Set up boot strap processor information Set up boot strap processor for POST Enumerate and set up application processors Re enable cache for boot strap processor Early CPU Init Exit Initialize 8042 compatible keyboard controller Detect PS 2 mouse Detect keyboard in KBC port Test and initialization of different input devices Uncom
32. on the bottom of the leg of the cap Once the cap latch is disengaged the cap may be removed without causing damage to the latches on the ends With the SPI device exposed move the small retaining clip to release the SPI device from the socket see Figure 14 The SPI device should now spring up to allow removal from the socket SPI Socket with Retaining Clip 1 Follow the unclench process 2 Clamp the fresh IC at to unclench the cover location 1 and location 2 with tweezers As As AUR 3 Remove the fresh IC from the socket SPI Device Installation To Install an SPI device in a socket first place the side opposite from the retaining clip into the socket at an angle of approximately 15 degrees Continue to gently insert the device into the socket until the metal retaining clip latches the device in place as shown in Figure 15 Carefully place the cap straight down over the device until both ends latch into the socket The installation is now complete Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual 24 October 2007 Order Number 318476001US Development Kit Hardware Features ntel Core 2 Duo Processor and I ntel Q35 Express Chipset n tel Figure 15 SPI Device Installation 1 Place the fresh IC into the 2 Close the cover socket Match pin 1 on the IC to pin 1 on the socket am 3 Lock the cover with the hook
33. ore 2 Duo Processor and Intel Q35 l n tel Express Chipset 60 75 78 7A 7C 84 85 87 8C 8D 8E 90 AO Al A2 A4 A7 A8 A9 AA AB AC Bl 00 61 70 October 2007 Order Number 318476001US Initialize NUM LOCK status and program typematic rate Initialize INT 13 and prepare for IPL detection Initialize IPL devices controlled by BIOS and option ROMs Initialize option RMs Generate and write contents of ESCD in NVRAM Log errors encountered during POST Display errors and prompt for user response Execute BIOS setup if requested Late POST chipset register initialization Build ACPI tables if supported Program peripheral parameters Enable Disable NMI as selected Late POST initialization of system management interrupt Check for boot password Clean up work needed before boot to OS Prepare runtime image for different BIOS modules Initialize MS IRQ Routing Table Initialize runtime language module Display system configuration screen Initialize CPU for boot program MTRRs Prepare CPU for boot including final MTRR values Wait for user input at configuration display if needed Uninstall POST INT1CH vector and INTO9 vector De initialize ADM module Prepare BBS for INT19 boot End of POST initialization of chipset registers Save system context for ACPI Pass control to OS loader via INT19 OEM POST error Reserved for chipset vendors and system manufacturers Intel Core 2 Duo
34. press all language BIOS logo and Silent logo Early POST initialization of chipset registers Going to check pressing of lt INS gt lt END gt key during power on To init CMOS if Init CMOS in every boot is set or lt END gt key is pressed Going to disable DMA and Interrupt controllers Video display is disabled and port B is initialized Chipset init about to begin Uncompress and initialize platform specific BIOS modules Initialize System Management Interrupt Initialize different devices through Device Initialization Manager DIM Detect and initialize video adapter with optional ROM Initialize all output devices Allocate memory for ADM module Uncompress and initialize ADM module Initialize silent boot mode Set window to display text information Display sign on message CPU information setup message and OEM specific information Initialize different devices through DIM Initialize DMAC 1 and DMAC 2 Initialize RTC date time Test and display total memory in system Mid POST initialization of chipset registers Detect peripheral devices Program memory hole or implementation specific adjustments to system memory Update CMOS memory size Allocate memory for extended BIOS data area Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual 34 October 2007 Order Number 318476001US Setting Up and Configuring the Development Kit l ntel C
35. re 17 October 2007 environment Since the board is not in a protective chassis the user is required to observe extra precautions when handling and operating the system The board is a standard uBTX form factor and provides non plated mounting holes with top and bottom ground rings If the board is not going to be used in a chassis standoffs are included for bench top use in the lab environment The development kit includes eight hex standoffs and for screws to attach to the board for bench top use Four of the standoffs are used to mount the heatsink refer to Section 3 3 for heatsink installation Attach standoffs to the screws to the board at the following mounting hole locations 1 Insert screw through top mounting hole for the BTX Heatsink Refer to Figure 17 for the mounting hole location 2 Place standoff on backside of board and hand tighten to screw Refer to Figure 18 for guide 3 Repeat for additional standoffs on the board until all standoffs are installed Refer to Figure 17 for recommended mounting hole locations Mounting Hole Locations J24LB Recommended Mounting Hole Locations Mounting Hole for BTX heatsink Locations Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual Order Number 318476001US 27 n Intel Core 2 Duo Processor and Intel Q35 Express Chipset Setting Up and Configuring the l n Development Kit Figure 18 Mounting the Stando
36. roviding power and configuring the BIOS Text Conventions The following notations may be used throughout this manual The pound symbol appended to a signal name indicates that the signal is active low Variables Variables are shown in italics Variables must be replaced with correct values Instructions Instruction mnemonics are shown in uppercase When you are programming instructions are not case sensitive You may use either upper case or lower case Numbers Hexadecimal numbers are represented by a string of hexadecimal digits followed by the character H A zero prefix is added to numbers that begin with A through F For example FF Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual 6 October 2007 Order Number 318476001US About This Manual I ntel Core 2 Duo Processor and Intel Q35 Express Chipset l n tel is shown as OFFH Decimal and binary numbers are represented by their customary notations That is 255 is a decimal number and 1111 1111 is a binary number In some cases the letter B is added for clarity Units of Measure The following abbreviations are used to represent units of measure GByte gigabytes KByte kilobytes MByte megabytes MHz megahertz W watts V volts Signal Names Signal names are shown in uppercase When several signals share a common name an individual signal is represented by the signal name followed by a number while the
37. se processors with long life support are also supported by this development kit e Intel Core 2 Duo E6400 Included in the development kit Intel Core 2 Duo E4300 Intel Pentium Dual Core Processor E2160 e Intel Celeron 440 Refer to this link for other processors which is also supported by Intel Q35 Express Chipset http developer intel com products chipsets Q35_Q33 index htm 2 5 System Memory The Intel Q35 Express Chipset supports two types of memory organization These are interleaved mode and asymmetric mode The Q35 supports Listed here are the summary of the system memory supported Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual October 2007 14 Order Number 318476001US m Development Kit Hardware Features l ntel Core 2 Duo Processor and I ntel Q35 Express Chipset n tel Non ECC DDR2 667 800 512Mb 1Gb and 2Gb technology 4 DIMMs 4GB maximum per channel 8GB total memory Dual channel Interleaved mode This mode offers the highest throughput for real world applications Dual channel mode is enabled when the installed memory capacities of both DIMM channels are equal Technology and device width can vary from one channel to the other but the installed memory capacity for each channel must be equal If different speed DIMMs is used between channels the slowest memory timing will be used Single channel Asymmetric mode This mo
38. serisi noiniaii rk ak ER RR R ERXRARRER ER ER ERERRRR VERa 8 1 4 2 Additional Technical SUPPOFt iriiri eirinn tn eee emm memes menn 8 1 5 Product Literat re essen ikke kata prx REX RR XX RR FER FERYRERRREYA YR ORGG K XY KR PRRETN ness Rad ga 8 2 0 Development Kit Hardware Features sss 10 2 1 Intel Q35 Express Chipset Development Kit Overview sss 10 2 2 System Block Diagralric usce verear eee ecork i Oren A TEE LER ei aaia D E DERUEER AERE AS E 11 2 3 Development Kit Inventory Checklists sss nne 12 2 4 Processor Supporterne ee e c EX PRIRXPRCHREREIAK KR MR Rd ERE TREE Mx PIA FR PRO Rer eR Y d uen 14 2 5 System MGMONY isi REX RRRR RR REXRRERERTENEXRERRPEYRRRFR RR ERRERERERXERE E REFER ERR XAR GU ne 14 2 5 1 Dual Channel Interleaved Mode Configurations cecseseeeneeee 15 2 5 2 Single Channel Asymmetric Mode Configurations csse 17 2 0 Back Panel Connectors escaped Ex YR RU RERE CERERI AGER PUR RIA RERU CREER RPEX RU ERE 18 2 6 1 JAudio CornnectOoFs icis beer trn rt EC RR mE IR REOR cnet x X RATE RR Rr KA EE n 18 2 6 2 RJ 45 LAN Connector with Integrated LEDs ssssss mm 19 2 6 3 USB PONC 50 ose tenant i eoa efe race tsa Doe Karo nd adf De eas wala ORAN EUER RUN RR 19 2 6 4 Coaxial S PDIF In Out Connector ccc teeter ener eee 19 2 6 5 eSATA POM sii fia cies pare met ei te Ra Leda d l4 nk Five ug dac ped Cuni e CE Ke EE ete 19 2 7 D
39. tel amp Graphic Media Accelerator 3100 Eighth generation I O Controller Hub component that contains additional functionality Intel ICH9 compared to previous ICHs The I O Controller Hub component contains the primary PCI interface LPC interface USB2 ATA 100 and other I O functions It communicates with the G MCH over a proprietary interconnect called DMI IGD Internal Graphics Device Low Voltage Differential Signaling A high speed low power data transmission standard LVDS used for display connections to LCD panels October 2007 Order Number 318476001US Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual 7 intel Intel Core 2 Duo Processor and Intel Q35 Express Chipset About This Manual Table 1 Definition Sheet 2 of 2 Term Description ADD2 Card Advanced Digital Display Card 2 0 Generation This card provides digital display options for an Intel Graphics Controller that supports ADD2 cards It plugs into a x16 PCI Express connector but uses the multiplexed SDVO interface The card adds Video In capabilities to platform This Advanced Digital Display Card will not work with an Intel Graphics Controller that supports DVO and ADD cards It will function as an ADD2 card in an ADD2 supported system but video in capabilities will not work MCH Memory Controller Hub component that contains the processor interface DRAM controller and x16 PCI
40. y devices on those modules Port 80 POST Code LEDs Two LEDs display the POST codes output from Port 80 to indicate the progress of the boot sequence or display the POST code of the last operation successfully completed during the boot sequence Please refer to Section 3 4 for more information on Port 80 code reference Intel Core 2 Duo Processor and Intel Q35 Express Chipset Development Kit User s Manual 20 October 2007 Order Number 318476001US Development Kit Hardware Features I ntel Core 2 Duo Processor and I ntel Q35 Express Chipset 2 7 4 Table 9 2 8 Figure 12 October 2007 Voltage Reference intel See Table 9 for details of the expected voltage levels for each voltage rail on the CRB Voltage Reference detail Voltage Rail Expected Voltage Voltage Rail Expected Voltage VCC 5 0 V_1P25_CORE 1 25 VCC3 3 3 V_1P25_CL_MCH 1 25 12V 12 V 1P25 PCIEXPRESS 1 25 12V 12 V SM 1 8 V 5PO STBAG 5 0 V SM VIT 0 9 V_3P3_STBY G 3 3 V_3P3_CL 3 3 V 1P5 ICH 1 5 V 3P3 PCIVAUX 3 3 V 1P05 ICH CORE 1 05 VDD CLK 3 3 V FSB VIT 1 2 VCC CLK IO 0 8 VCCP Varies Development Kit Major Connectors and Jumpers Figure 12 shows major jumpers and headers used on the development kit Major Jumper and Header Locations J6LB J115LB J14LB J15LB J16LB J7LB J4LB J 10LB Order Number 318476001US Intel Core 2 Duo Processor and Intel
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