Cypress CYV15G0101EQ User's Manual
Contents
1. Features m Multi rate adaptive equalization m Operates from 143 to 1485 Mbps serial data rate m SMPTE 292M SMPTE 344M and SMPTE 259M compliant m Supports DVB ASI at 270 Mbps m Cable length indicator for HD SDI and SD SDI data rates m Maximum cable length adjustment for HD SDI and SD SDI data rates m Carrier detect and mute functionality for HD SDI and SD SDI data rates m Equalizer bypass mode m Seamless connection with HOTLink II family m Equalizes up to 350m of Canare L 5CFB and Belden 1694A coaxial cable at 270 Mbps m Typically equalizes up to 200m of Canare L 5CFB and Belden 1694A coaxial cable at 1 485 Gbps m Low power 160 mW at 3 3V m Single 3 3V supply m 16 pin SOIC m 0 18 um CMOS technology CYV15G0101EQ m Pb free and RoHS compliant m Uses Cypress CLEANLink technology m Pin compatible to existing equalizer devices Functional Description The CYV15G0101EQ is a multi rate adaptive equalizer designed to equalize and restore signals received over 750 coaxial cable The equalizer meets SMPTE 292M SMPTE 344M and SMPTE 259M data rates The CYV15G0101EQ is optimized to equalize up to 350m of Belden 1694A coaxial cable at 270 Mbps and typically up to 200m of Belden 1694A coaxial cable at 1 485 Gbps The CYV15G0101EQ connects seamlessly to the HOTLink II family of transceivers The CYV15G0101EQ has DC restoration to compensate for the DC content of the SMPTE pathological patterns A cable length indicato2. 04184 Rev E Page 7 of 10 Feedback ES 4 CYPRESS CYV15G0101EQ PERFORM Typical Application Circuit Figure 4 Interfacing CYV15G0101EQ to the HOTLink II SerDes CD MUTE 3 3 3V C12 C10 tir A 0 01 uF RXD7 SDASEL 0 01 uF hib BNC JACK RXD6 LPEN cu RXD5 HM 2 Ni VEE RXD3 VEE EE 500 1 H RXD1 IN1 VEE n 6 D MCLADJ AGC 4 mm 8B 71 9 PEN BYPASS AGC 97 40 See E Tu R gt RXCKSEL CYV15G0101EQ eti R15 RXCLK RXMODE _ d RXCLKC RXRATEL lol MCLADJ CYV15G0101DXB Document Number 001 04184 Rev E Page 8 of 10 Feedback CYV15G0101EQ Ux SSS CYPRESS PERFORM Ordering Information i Operating Ordering Code Package Name Package Type Range CYV15G0101EQ SXC 5716 15 Pb free 16 Pin 150 Mil SOIC 0 to 70 C Package Dimension 0 386 9 804 0 393 9 982 Figure 5 16 Pin 150 Mil SOIC S16 15 PIN 1ID DIMENSIONS IN INCHES MM MIN MAX REFERENCE JEDEC MS 012 PACKAGE WEIGHT 0 15gms PART STANDARD PKG LEAD FREE PKG 0 150 3 810 0 157 3 987 0 230 5 842 0 244 6 197 16 15 0 010 0 254 5216 15 45 0 016 0 406 0 016 0 406 Eo 0 0
3. 07510 1901 0 8 0 0098 0 249 DO 0 035 0 889 SEATING PLANE 0 061 1 549 0 068 1 727 NE lom gt 0 050 1 270 BSC 0 0138 0 350 0 0192 0 487 0 004 0 102 0 0098 0 249 51 85068 Page 9 of 10 Feedback Document Number 001 04184 Rev E gt 22 CYPRESS CYV15G0101EQ PERFORM Document History Page Document Title CYV15G0101EQ Multi Rate Video Cable Equalizer Document Number 001 04184 ISSUE ORIG OF REV ECN NO DATE CHANGE DESCRIPTION OF CHANGE ad 389196 SEE ECN BCD New preliminary datasheet 394763 BCD Updated preliminary datasheet for release to the internet B 431556 SEE ECN BCD Changed AC and DC parameters 504487 FRE Updated AC and DC parameters Changed datasheet status from preliminary to final D 514998 SEE ECN FRE Fixed typo in diagrams on page 2 E 1396423 SEE ECN UKK AESA Updated AC and DC electrical characteristics and pin description of MCLADJ and Cypress Semiconductor Corporation 2007 The information contained herein is subject to change without notice Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product Nor does it convey or imply any license under patent or other rights Cypress products are not warranted nor intended to be used for medical life su
4. 2 8V If CD MUTE is used as an output the incoming data stream is present and the cable length does not exceed that set by MCLADJ then the voltage at the CD MUTE output is less than 0 8V If CD MUTE is used as an input and is set LOW the equalizer serial outputs are not muted If the CD MUTE is used as an input and is set HIGH then the equalizer serial outputs are muted When an invalid signal or a signal transmitted with a launch amplitude of less than 500 mV at HD data rates is received the equalizer s serial outputs are muted BYPASS The CYV15G0101EQ has a bypass mode that allows the user to bypass equalizers equalization and restoration functions When the bypass mode is set HIGH the signal presented at the equalizer s differential serial inputs SDI SDI is routed to the equalizer s differential serial outputs SDO SDO without equalizing When BYPASS is set LOW the incoming video data stream is equalized and presented at the equalizer s differential serial outputs SDO SDO In equalizer bypass mode CD MUTE is not functional AGC Place a capacitor of 1 uF between the AGC pins of the CYV15G0101EQ equalizer Page 4 of 10 Feedback CYPRESS PERFORM Maximum Ratings Exceeding maximum ratings may shorten the useful life of the device These user guidelines are not tested Power Up Requirements The CYV15G0101EQ contains one power supply The voltage CYV15G0101EQ
5. D TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE Cypress reserves the right to make changes without further notice to the materials described herein Cypress does not assume any liability arising out of the application or use of any product or circuit described herein Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress product in a life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges Use may be limited by and subject to the applicable Cypress software license agreement Document Number 001 04184 Rev E Revised October 25 2007 Page 10 of 10 PSoC Designer Programmable System on Chip and PSoC Express are trademarks and PSoC is a registered trademark of Cypress Semiconductor Corp All other trademarks or registered trademarks referenced herein are property of the respective corporations Purchase of components from C press or one of its sublicensed Associated Companies conveys a license under the Philips 2 Patent Rights to use these components an system provided that the system conforms to the IC Standard Specification as defined by Philips HOTLink Il is a trademark of Cypress Semiconductor Corp All other trademarks or registered
6. DJ input When the maximum cable length set by MCLADJ is reached CD is driven high and the differential output is muted If MCLADJ functionality is not needed this pin should be left floating or tied to ground to allow maximum equalized cable length MCLADJ works at both SD and HD data rates BYPASS LVTTL Input Equalizer Bypass When BYPASS is set HIGH the signal presented at the equalizer s differential serial inputs SDI SDI is routed to the equalizer s differential serial outputs SDO SDO without performing equalization When BYPASS is set LOW the incoming video data stream is equalized and presented at the equalizer s serial differential outputs SDO SDO In equalizer bypass mode CD MUTE is not functional AGC Analog Automatic Gain Control Place a capacitor of 1 uF between the AGC pins SDO SDO Differential Differential Serial Outputs The equalized serial video data stream is presented at the Output SDO SDO differential serial CML output SDI SDI Differential Differential Serial Inputs SDI SDI accepts either a single ended or differential serial video Input data stream over 75Q coaxial cable Power Power 3 3V Power GND Gnd Connect to Ground Page 3 of 10 Feedback Document Number 001 04184 Rev E Equalizer Operation The CYV15G0101EQ is a high speed adaptive cable equalizer designed to equalize standard definition SD and high definition HD serial digital interface 501 video data str
7. Vepmute X CD MUTE Input Voltage Required to Min to Mute 2 5 V Force Outputs to Mutel VcpMurE CD MUTE Input Voltage Requiredto to Activate 1 V Force Activel l Notes 1 Production test 2 Calculated results from production test 3 Not tested Based on characterization Document Number 001 04184 Rev E Page 5 of 10 b gt YPRESS CYV15G0101EQ PERFORM AC Electrical Characteristics Parameter Description Test Conditions Min Typ Max Unit E Serial Input Data E 143 1485 Mbps Input Voltage Swing Single ended at the transmitter 5000 1200 mV HD data rate Input Voltage Swing Single ended at the transmitter 50018 1200 mV SD data rate Output Voltage Swingl Differential 500 load 450 700 950 mV Output Jitter for Various Cable 270 Mbps 0 211 UI Lengths and Data Rates Belden 1694A 0 350m Canare L 5CFB 0 350m 800 mV transmit amplitude Equalizer pathological pattern 1 485 Gbps 0 25111 Ul Belden 1694A 0 140m Canare L 5CFB 0 140m 800 mV transmit amplitude Equalizer pathological pattern 1 485 Gbps 0 3171 UI Belden 1694A 140 200m Canare L 5CFB 140 200m 800 mV transmit amplitude Equalizer pathological pattern Output Rise Fall Timel 4l 20 80 HD data rate 80 120 220 ps Output Rise Fall Time 41 20 80 SD data rate 80 120 350 ps Mismatch in Rise Fa
8. ator CLI is an analog output that gives an output voltage proportional to the equalized cable length CLI gives an approximation of the length of cable at the differential serial inputs SDI SDI works at high definition HD data rates and standard definition SD data rates The graph in Figure 3 on page 7 illustrates the output voltage at various Belden 1694A cable lengths With an increase in cable length CLI output voltage decreases Document Number 001 04184 Rev E CYV15G0101EQ MCLADJ Maximum Cable Length Adjust MCLADJ sets the approximate maximum amount of cable to be equalized When the maximum cable length set by MCLADJ is reached CD is driven high and the outputs are muted MCLADJ works at SD and HD data rates The graph in Figure 2 on page 7 illustrates the voltage required at MCLADJ input to equalize various Belden 1694A cable lengths for SD and HD data rates If MCLADJ functionality is not needed this pin should be left floating or tied to ground to allow maximum equalized cable length CD MUTE Carrier Detect MUTE CD MUTE is a bidirectional pin that provides an indication of the signal present at the equalizer s input or it controls the muting of the equalizer s output The CD MUTE operates for both HD and SD data rates If CD MUTE is used as an output and the incoming data stream is not present or the cable length exceeds that set by MCLADJ the voltage at the CD MUTE output is greater than
9. eams CYV15G0101EQ equalizer is optimized to equalize up to 350m of Canare L 5CFB and Belden 1694 cable at 270 Mbps and typically up to 200m of Canare L 5CFB and Belden 16944 cable at 1 485 Gbps The CYV15G0101EQ equalizer contains one power supply and typically consumes 160 mW power at 3 3V The multi rate equalizer meets the SMPTE 259M SMPTE 292M SMPTE 344M and DVB ASI video standards It meets all patho logical requirements for SMPTE 292M as defined by RP198 and for SMPTE 259M as defined by RP178 The CYV15G0101EQ multi rate cable equalizer is auto adaptive from 143 Mbps to 1 485 Gbps The CYV15G0101EQ equalizer has variable gain and multiple equalization stages that reverse the effects of the cable This equalization is achieved by separate regulation of the lower and higher frequency components in the signal to give a clean output eye diagram The CYV15G0101EQ has DC restoration to compensate for the DC content of the SMPTE pathological patterns SDI SDI The CYV15G0101EQ accepts single ended or differential serial video data streams over 750 coaxial cable It is recommended to AC couple the SDI and SDI inputs as they are internally biased to 1 2V SDO SDO The CYV15G0101EQ has differential serial output interface drivers that use current mode logic CML drivers to provide source matching for the transmission line These outputs are either AC coupled or DC coupled to the HOTLink Il SerDes device CLI Cable Length Indic
10. hreshold Block Mute Control Block A A DC Restore BYPASS SDI SDI __ Equalizer Differential Output SDO SDO Pinouts Figure 1 Pin Diagram 16 Pin SOIC Top View 16 2 CD MUTE VCC 2 15 VCC GND 3 14 GND SDI 4 13 SDO __ CYV15G0101EQ __ SDI 5 12 SDO GND 6 11 GND 7 10 MCLADJ AGC 8 9 BYPASS Document Numb er 001 04184 Rev E Page 2 of 10 Feedback Signal Description length CLI works at both SD SDI and HD SDI data rates Characteristics RV FO RM Table 1 Pin Descriptions CYV15G0101EQ Single Channel Cable Equalizer Carrier Detect or Mute Indicator CYV15G0101EQ Cable Length Indicator CLI provides an analog voltage proportional to the equalized cable When the incoming data stream is present and the cable length does not exceed that set by Name Control Signals MCLADJ the CD MUTE outputs a voltage less than 0 8V LI When the incoming data stream is not present or the cable length exceeds that set by CD MUTE Analog Output LVTTL IO Output MCLADJ the CD MUTE outputs a voltage greater than 2 8V Input When the CD MUTE pin is set LOW the equalizer s differential serial outputs are not muted When the CD MUTE pin is set HIGH the equalizer s differential serial outputs are muted MCLADJ Analog Input Maximum Cable Length Adjust The maximum equalized cable length is set by the voltage applied to the MCLA
11. ll Timel 41 30 ps Duty Cycle Distortion 41 HD color bar pattern 20 ps Overshootl 41 10 Input Return Loss 15 dB Input Resistancel 41 Single ended 2 5 Input 41 Single ended E 1 Output Resistancel 41 Single ended E 50 e Q Notes 4 Not tested Guaranteed by design simulations 7 Based on characterization at 25 C Voc 3 3V Document Number 001 04184 Rev E 5 Based on characterization across temperature and voltage with 140m of Belden 1694A cable transmitting SMPTE Equalizer Pathological Test Pattern 6 Based on characterization across temperature and voltage with 350m of Belden 1694A cable transmitting SMPTE Equalizer Pathological Test Pattern Page 6 of 10 Feedback 7 CYPRESS CYV15G0101EQ PERFORM Typical Performance Graphs Unless otherwise stated 3 3V TA 25 C Figure 2 MCLADJ Input Voltage vs Belden 1694A Cable Length at SD SDI and HD SDI Data Rates 24 2 6 2 5 2 4 io VOLTAGE V to 50 100 150 200 250 300 350 CABLE LENGTH m Figure 3 Output Voltage vs Belden 1694 Cable Length at SD SDI and HD SDI Data Rates 2 7 2 6 2 5 2 4 2 3 2 2 2 1 VOLTAGE V 100 150 200 250 300 350 CABLE LENGTH m 0 50 Document Number 001
12. on any input or IO pin must not exceed the power pin during power up Storage Temperature 65 to 150 Ambient Temperature with Operating Range Power 55 to 125 C Ambient Supply Voltage to Ground Potential 0 5V to 3 8V Range Temperature Vec DC Voltage Applied to Outputs V 5 in High Z 0 5V to 0 5V DC Input Voltage 0 5V to Voc 40 5V Electro Static Discharge ESD HBM gt 2000 V JEDEC EIA JESD A114A Latch Up gt 200 mA DC Electrical Characteristics Parameter Description Test Conditions Min Typ Max Unit Voc Supply Voltage 3 135 3 8 3 465 V Pp Power Consumption 125 160 190 mW ls Supply Current 38 48 60 mA VCMOUT Output Common Mode Voltage Load 500 VCC V AVSDO 2 2 9 Input Common Mode Voltage 1 14 V Bypass High Input Common Mode Voltage 0 2 9 V Bypass Low CLI DC Voltage 0m 2 2 2 65 2 95 V CLI DC Voltage No Signal 1 5 1 9 2 3 V E Floating MCLADJ DC Voltage 1 3 V MCLADJ Rangel 0 4 0 72 1 02 V CD MUTE Output Voltage Carrier Not Present 2 8 V VCD MUTE OL Carrier Present 0 8 V
13. pport life saving critical control or safety applications unless pursuant to an express written agreement with Cypress Furthermore Cypress does not authorize its products for use as critical components in life support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user The inclusion of Cypress products in life support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges Any Source Code software and or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign United States copyright laws and international treaty provisions Cypress hereby grants to licensee a personal non exclusive non transferable license to copy use modify create derivative works of and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement Any reproduction modification translation compilation or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND EXPRESS OR IMPLIED WITH REGARD TO THIS MATERIAL INCLUDING BUT NOT LIMITE
14. r CLI provides an indication of the cable length being equalized at HD SDI and SD SDI data rates The maximum cable length adjust MCLADJ sets the approximate maximum cable length to equalize at SD and HD data rates The CYV15G0101EQ s differential serial outputs SDO SDO mute when the approximate cable length set by MCLADJ is reached CD MUTE is a bidirectional pin that provides an indication of the signal present at the equalizer inputs It also controls muting the outputs of the equalizer at HD and SD data rates Power consumption is typically 160 mW at 3 3V Equalizer System Connection Diagram HOTLink II Cable Serial Links HOTLink II 09837 Dri gt Multi Rate In erlalizer fiver Copper Cable Cable Deserializer Connections Equalizer Cypress Semiconductor Corporation Document Number 001 04184 Rev E 198 Champion Court San Jose CA 95134 1709 408 943 2600 Revised October 25 2007 Feedback CYPRESS CYV15G0101EQ PERFORM Equalizer Block Diagram CYV15G0101EQ Multi Rate Video Cable Equalizer Block Diagram os MEE Carrier Detect and justor and Mute gt MCLADJ gt T
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