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AMD SimNow Simulator 4.4.4 User's Manual

1. User Manual September 1 a 2008 Instruction eene Mnemonic Opcode Description CMOVNZ reg 64 reg mem64 OF 45 r Move if not zero ZF 0 a CMOVNE reg16 reg mem16 OF 45 r Move if not equal ZF 0 A CMOVNE reg32 reg mem32 OF 45 r Move if not equal ZF 0 Af CMOVNE reg64 reg mem64 OF 45 r Move if not equal ZF 0 Ff CMOVBE reg16 reg mem16 OF 46 r a below or equal CF 1 or ZF RW CMOVBE reg32 reg mem32 OF 46 r nas below or equal CF or ZF w CMOVBE reg64 reg mem64 OF 46 r ae below or equal CF or ZF w CMOVNA regl6 reg mem16 OF 46 r Move if not above CF 1 or ZF 1 Af CMOVNA reg32 reg mem32 OF 46 r Move if not above CF 1 or ZF 1 A CMOVNA reg64 reg mem64 OF 46 r Move if not above CF 1 or ZF 1 ei CMOVNBE reg16 reg mem16 OF 47 r Ge SC below or equal CF 0 or Vv CMOVNBE reg32 reg mem32 OF 47 r SS EE PETOK EE E e D CMOVNBE reg64 reg mem64 OF 47 dr Te ao below or equal CF 0 or Wi CMOVA reg1l6 reg mem16 OF 47 r Move if above CF 1 or ZF 0 ei CMOVA reg32 reg mem32 OF 47 r Move if above CF 1 or ZF 0 Af CMOVA reg64 reg mem64 OF 47 r Move if above CF 1 or ZF 0 Af CMOVS reg16 reg mem16 OF 48 r Move if sign SF 1 Af CMOVS reg32 reg mem32 OF 48 r Move if sign SF 1 ei CMOVS reg64 reg mem64 OF 48 r M
2. ll Figure 14 3 Message Log Window 14 6 Logging CPU Cycles Setting up the simulator to log CPU cycles requires most of the steps detailed in Section 14 5 Logging PCI Configuration Cycles However in this case the messages from the CPU are captured The steps are 1 Open the Device Window View Show Devices Double click on the CPU device This will bring up the device Properties Window that will list available logging options Select the desired logging options Click OK to accept the configuration See Section 7 1 AweSim Processor Device on page 51 to obtain detailed information about CPU Logging options 2 Select View Log Window from the Main Window Menu This will bring up a Message Log dialog box similar to the one shown in Figure 14 3 3 Log messages will only be captured from devices that have a check beside their name If the CPU device does not have a check then check it by clicking its check box 4 Repeat the steps here 166 Chapter 14 BIOS Developer s Quick Start Guide AMD Confidential User Manual September 12 2008 14 7 Creating a Floppy Disk Image Use the DiskTool utility to create a floppy disk image file suitable for loading into the simulator DiskTool is located in the SimNow Tools directory To create an image of a physical floppy disk see Section 13
3. h User Manual September 12 2008 Instruction Supported Mnemonic Opcode Description PP Rotate a 32 bit register or memory ROR reg imm32 1 D1 0 operand left 1 bit e Rotate a 32 bit register or memory ROR reg mem32 CL D3 0 operand right the number of bits e specified in the CL register Rotate a 32 bit register or memory e operand right the number of bits ROR reg mem32 imm8 C1 0 ib specified by an 8 bit immediate L i value Rotate a 64 bit register or memory ROR reg tmmba 1 D1 0 operand right 1 bit Vv Rotate a 64 bit register or memory ROR reg mem64 CL D3 0 operand right the number of bits Af specified in the CL register Rotate a 64 bit register or memory operand right the number of bits ROR reg mem64 imm8 C1 0 ib specified by an 8 bit immediate C value Loads the sign flag the zero flag the auxiliary flag the parity flag SAHF 9E and the carry flag from the AH e register into the lower 8 bits of the EFLAGS register Shift an 8 bit register or memory SAL reg mem8 1 ny 4 location left 1 bit 4 Shift an 8 bit register or memory SAL reg mem8 CL D2 4 location left the number of bits e specified in the CL register Shift an 8 bit register or memory f location left the number of bits SAL reg mem8 imm8 SR specified by an 8 bit immediate wf value Shift a 16 bit register or memory SAL reg mem16 1 Ee location left 1 bit 4 Shift a 16 bit register or
4. GetDimmType lt DimmNo gt Returns the DIMM type of memory module DimmNo GetDimmSize lt DimmNo gt Returns the DIMM size of memory module DimmNo GetDimmBanks lt DimmNo gt Returns the DIMM banks of memory module DimmNo GetDimmWidth lt DimmNo gt Beran the DIMM width of memory module DimmNo GetSpdData lt DimmNo gt Returns SPD data of memory module DimmNo DeleteDimm lt DimmNo gt Deletes memory module DimmNo from current configuration GetSpdDataByte lt DimmNo gt lt Addr gt Returns a specific SPD data byte stored at lt Addr gt on Dimm lt DimmNo gt SetSpdDataB yte lt DimmNo gt lt Addr gt lt Data gt Sets the SPD data byte lt Data gt at SPD Address lt Addr gt on DIMM lt DimmNo gt A 7 25 Keyboard and Mouse By default the GUI uses keyboard key and keyboard mousemove commands to send input to the simulator These can be overridden using the Gui_Key_Device and Gui_Mouse_Device registry keys For example if you connect a USB keyboard device to the simulation you can have keystrokes use the USB keyboard rather than the old keyboard 1 simnow gt keyboard usage Automation Command Description Key lt XX gt XX Forwards the specified key to the simulated system E g the following command forwards the ENTER keystroke to the simulated system keyboard key 1C Appendix A 247 AMD Confidential User Manual
5. Debugger 8 AweSimfProcessor Dimm AMD 8th Reneration PCI Bus 10 SME AMD SMB Hub Devise PCI Bus 11 4 Q _ 2 Winbond W83627HF PCliBus 7 Intel R Pro 1000 SIO 5 MT Desktop Network Adapter 16 Memory Device 4 Emerald Graphics 12 gt USB JumpDrive 15 oer agai PCA9548 Device 13 AT24C Device 14 Figure 3 5 Computer Simulation in cheetah_1p bsd File This computer is a single processor AMD SI Generation machine with 256 MB of memory a Southbridge that supports two IDE chains VGA output and a SuperIO that supports a keyboard mouse and floppy drive This computer also comes with a USB JumpDrive and NIC device Right clicking on any icon brings up a Workspace Popup menu Figure 3 3 that allows access to the Device Property window which includes a list of all components that the selected component is connected to An example Device Property window is shown in Figure 3 4 The right click Workspace Popup menu also allows you to delete or Chapter 3 Graphical User Interface 13 User Manual AMD Confidential September 12 2008 disconnect the selected device from all its connections Please note that this feature is not supported by the public release version of the simulator Table 3 1 lists each component in the cheetah_Ip bsd computer For more information about devices and possible device configuration please refer to Section 7 Device
6. MOVSX reg64 reg mem8 BE FE Move the contents of an 8 pit register or memory location to a 64 bit register with sign extension MOVSX reg32 reg mem16 BF Jr Move the contents of a 16 bit register or memory location to a 32 bit register with sign extension MOVSX reg64 reg mem16 BF Jr Move the contents of a 16 bit register or memory location to a 64 bit register with sign extension MOVSXD reg64 reg mem32 63 ic Move the contents of a 32 pit register or memory operand to a 64 bit register with sign extension KSISISISI SISI SISI Se SS SS Se Sn SS SS Se Se Se SS 206 Appendix A User Manual AMD Confidential September 12 2008 Instruction Mnemonic Opcode Description Supported MOVZX regl6 reg mem8 B6 r Move the bit register wit contents of an register or memory operand to a 16 8 bit h zero extension wi MOVZX reg32 reg mem8 B6 r Move the bit register wit cont register or memory operand to a 32 ents et an 8 bit h zero extension MOVZX reg64 reg mem8 B6 Jr Move the bit register wit cont register or memory operand to a 64 ents of an 8 bit h zero extension MOVZX reg32 reg mem16 B7 r Move the cont ents of a 16 bit bit register with zer register or memory operand to a 32 o extension MO
7. Enabling Graphics Hardware Acceleration on Windows Server Operating Systems Graphics Hardware Acceleration and DirectX are disabled by default on a Windows Server configuration to ensure maximum stability and uptime But if you need to improve the graphics performance the following steps will guide you through on how you can enable hardware acceleration Right click the desktop and then click Properties on the menu Click the Settings tab and then click on Advanced Click the Troubleshoot tab Move the Hardware Acceleration slider across to full see Figure 7 12 Click Ok and then click Close Si AS 72 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 Display Properties Themes Desktop Screen Saver Appearance Settings Default Monitor and Matrox Millennium G400 English PR Information Options DN Monitor Settings Color General Adapter Monitor Troubleshoot Color Management m Are you having problems with your graphics hardware These settings can help you troubleshoot display related problems Hardware acceleration Display Manually control the level of acceleration and performance supplied by Default Monitor o your graphics hardware Use the Display Troubleshooter to assist you in making the change Screen resolutio Less _ Hardware acceleration All accelerations are enabled Use this setting if your computer has no proble
8. Difference from Real Hardware While the processor device is a faithful simulation of the software visible portion of an AMD microprocessor it is not a model of the specific AMD microprocessor hardware Because of this the processor device is not equivalent in certain areas Any issues related to timing such as the time to execute a given instruction will be different The TLB models do not exactly match any particular processor so any software that depends on exact TLB walking behaviors may not function correctly Chapter 7 Device Configuration 53 AMD Confidential User Manual September 12 2008 7 2 Debugger Device The debugger allows debugging tasks such as break pointing single stepping and other standard tasks Interfaces The debugger has no interfaces the debugger is present if it is in the Device Window To add the Debugger Device follow these steps 1 Select View Show Devices 2 Click and drag the Debugger Device icon from the device list on the left side into the workspace area on the right side of the Device Window 3 Add an additional debugger for each processor you wish to debug Initialization and Reset State The debugger initially is disabled and attached to processor 0 Configuration Options In the Main Window select View Show Debugger Click the Attach button to configure which processor is being debugged To use the CPU Debugger please refer to Section 10 1 Using the C
9. bsd file 15 1 2 Concept Diagrams A device group is a device with its own identity name description icon help file etc But it is also like a BSD in fact every BSD has a single created device group called the Machine device Tthe default user s view into SimNow is from the context of looking inside the Machine device This encapsulation of devices inside device group s results in a hierarchy tree with a Machine device group as the root node In this way a device group tree is like a folder directory tree folder is to device group as file is to device library as demonstrated in Figure 3 6 Figure 3 6 Device group BSD with one machine group and three child devices Any device can also connect to its sibling devices Figure 3 6 does not depict any port connections Figure 3 7 depicts the same example device tree but with a different conceptual view devices are inside groups arrows represent possible port connections between sibling devices 170 Chapter 15 Frequently Asked Questions FAQ AMD Confidential User Manual September 1 KG 2008 Figure 3 7 Device group different conceptual view devices are inside groups The previous diagrams show child devices inside device groups On the standard top level view the context of inside the machine device we would more simply just see three devices see Figure 3 8 arrows represent possible port connections between the devices Figure 3 8 Device Gro
10. 5 lt FUNCTION KEY 5 gt ctrl b lt CONTROL BRAKE gt 6 lt FUNCTION KEY 6 gt alt m lt ALT MAKE gt 7 lt FUNCTION KEY 7 gt alt b lt ALT BRAKE gt Table 15 14 Prefix Sequences keyboard text A 7 26 JumpDrive 1 simnow gt jumpdrive usage Automation Command Description Loads the contents of the specified image file lt HostFileName gt to the memory Saves the contents of the memory to an Savelmage lt HostFileName gt image file on the host specified by lt HostFileName gt Imports the requested file into the image ImportFile lt HostFileName gt lt ImageFileName gt lt mageFileName gt using the given host file name lt HostFileName gt Exports the requested file from the image ExportFile lt ImageFileName gt lt HostFileName gt lt mageFileName gt to the given host file name lt HostFileName gt LoadImage lt HostFileName gt 248 Appendix A AMD Confidential User Manual September 12 2008 Automation Command Description Initialize lt SizeInMB gt Initialize the jump drive image with a single partition of the requested size specified by lt SizelnMB gt The JumpDrive supports image sizes from 64 Mbytes to 8192 Mbytes 8 Gbytes ImportDir lt HostPathName gt lt ImagePathName gt Imports a directory from the host system into the jump drive The host path name lt HostPathName gt can contain wildcards in the last element If the last ele
11. DiskTool on page 157 When the image has been created it can be loaded into the simulation as described in Section 5 1 1 Open a Simulation Definition on page 36 Chapter 14 BIOS Developer s Quick Start Guide 167 AMD Confidential User Manual September 12 2008 This page is intentionally blank 168 Chapter 14 BIOS Developer s Quick Start Guide AMD Confidential User Manual September 12 2008 15 Frequently Asked Questions FAQ Why is the mouse cursor very difficult to control inside the simulated display area The mouse on the Host and in the Guest do not track each other very well in general We provide another mouse mode to help with this Click on the menu item Special Keyboard Grab Mouse and Keyboard see Section 3 3 Device Groups A platform bsd consists of devices and each device is an instance of either a device library CS bel or so or a device group bsg A device group is an aggregation of devices into a single composite device that has some customized aspects includes its name icon ports initial and default state Device groups are a particular class of devices They have the same properties and characteristics as traditional devices but also allow the user to extend and tailor specific device s to meet a particular hardware implementation or configuration Device groups provide a method that allows the user to group or collect one or more devices libraries or
12. When the VGA display window has the focus any keyboard messages and mouse click messages received by the window are routed via a DEVCWINDOWMSG message through the simulators I O subsystem The keyboard or mouse device accepts these messages and simulates key presses and key releases to match the keys While certain key combinations do not result in the generation of keyboard messages by the OS this does enable you to use the real keyboard to interact with the simulation in many cases Supported VESA BIOS Graphics Modes Only supports flat and linear frame buffer with 16 bit 64K 5 6 5 colors and 32 bit 16 8M 8 8 8 8 colors modes Table 7 2 shows the subset of standard VESA mode numbers supported Mode Number Resolution Color depth 10Eh 320x200 16 bit 111h 640x480 16 bit 114h 800x600 16 bit 117h 1024x768 16 bit 11Ah 1280x1024 16 bit Table 7 2 Supported Standard VESA Modes Table 7 3 shows the supported custom VESA mode numbers Chapter 7 Device Configuration 63 AMD Confidential User Manual September 1 2 2008 Mode Number Resolution Color depth 140h 320x200 32 bit 141h 640x480 32 bit 142h 800x600 32 bit 143h 1024x768 32 bit 144h 1280x720 16 bit 145h 1280x720 32 bit 146h 1280x960 16 bit 147h 1280x960 32 bit 148h 1280x1024 32 bit 149h 1600x1200 16 bit 14Ah 1600x1200 32 bit 14Bh 1920x1080 16 bit 14Ch 1920x1080 32 bit 14Dh 1920x
13. on page 51 Section 7 10 AMD 8th Generation Integrated Northbridge Device on page 82 Difference from Real Hardware See the following sections Section 7 1 AweSim Processor Device on page 51 Section 7 10 AMD 8th Generation Integrated Northbridge Device on page 82 132 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 7 30 AMD Magny Cours Device The AMD Magny Cours device is a 12 core processor node suitable for a G34 socket It emulates a planned product that derives from a revision of the AMD Family10h product line The device iteself is composed of 12 individual AweSim Processor Devices that are connected to dual AMD 8th Generation Integrated Northbridge Devices For more information on Group Devices see Section 3 3 Device Groups on page 3 3 Interface Magny Cours has several connection ports It has 4 HyperTransport links split to form 8 sub links Each sub link can connect to a coherent HyperTransport device such as another AMD Istanbul Device or a non Coherent HyperTransport device such as AMD amp 131 PCI X Controller These ports are mutually exclusive and should be connected to only one other device Magny Cours also exposes four DRAM channel interfaces DCTO DCT1 DCT2 and DCT3 to interface with system memory Contents of a BSD See the following sections Section 7 1 AweSim Processor Device on page 51
14. JournalClear masterlslavel0I1 Clears the journal discards any changes made to the drive JournalDebug masterlslavel0I1 This may no longer do anything it originally enabled a debug verification mode DVDROMStatus masterlslavel0I1 Displays the status for the DVD ROM device or a particular volume SetDVDROM masterlslavel0l1 offlonlOI1 Sets master or slave to DVD ROM device Eject masterlslavelOl1 offl lt filename gt This command is valid only for drives configured as ATAPI The command will set the Media Ejected flag to true and will optionally set a new image file to File Us the special name off without the quotes if you want to leave the drive without an image file i e empty after the eject DMADelay masterlslavel0l1 lt usec delay gt Sets the DMA delay for specified drive master or slave to usec delay Noise offlonlOl1 Turn on to print debug messages SetImageType masterlslavel0I1 ID RAW AUTO This command is used to tell SimNow which type of hard disk image is used ID indicates that the hard disk image contains an ID block RAW indicates that the hard disk image is a sector by sector copy identical to the source AUTO indicates that SimNow will try to identify the used type of hard disk image automatically GetImageType masterlslavel0I1 Returns the current image type setting ID RAW or AUTO See SetImageType
15. Quadword 64 bit operand in a 128 bit XMM register or memory e xmm mem128 Double quadword 128 bit operand in a 128 bit operand in an XMM register or memory e xmmI mem128 Double quadword 128 bit operand in a 128 bit operand in an XMM register or memory specified as the left most first operand in the instruction syntax e xmm2 mem128 Double quadword 128 bit operand in a 128 bit operand in an XMM register or memory specified as the right most second operand in the instruction syntax A 6 1 2 Opcode Syntax In addition to the notation shown in above in Mnemonic Syntax on page 192 the following notation indicates the size and type of operands in the syntax of instruction syntax e digit Indicates that the ModRM byte specifies only one register or memory r m operand The digit is specified by the ModRM reg field and is used as an instruction opcode extension Valid digit values range from 0 to 7 e r Indicates that the ModRM byte specifies both a register and operand and a reg mem register or memory operand e cb cw cd cp Specified a code offset value and possibly a new code segment register value The value following the opcode is either one byte cb two bytes cw four bytes cd or six bytes cp e ib iw id Specifies an immediate operand value The opcode determines whether the value is signed or unsigned The value following the opcode ModRM or SIB byte is either one b
16. Returns enabled if logging is enabled otherwise it DMALogStatus returns disabled A 7 12 8 Generation Northbridge 1 simnow gt sledgenb usage Automation Command Description LogHT 011 Enables 1 or disables 0 logging HTLogStatus Ee if logging is enabled otherwise it returns disabled LogPCIConfig 011 Enables 1 or disables 0 PCI Config logging Returns enabled if PCI Config logging is enabled Ee otherwise it returns disabled GetConfig Displays Northbridge logging configuration ProductFile lt FileName gt Loads the specified product file FileName A 7 13 DBC 1 simnow gt dbc usage Automation Command Description GetParam Ee disk block cache parameters size depth and SetParam lt size gt lt depth gt lt bits gt Sets disk block cache parameters A 7 14 AMD 8111 Device 1 simnow gt 8111 usage Automation Command Description This specifies the HyperTransport protocol base unit ID The IC s logic uses this value to determine the unit IDs for HyperTransport request and response packets BaseID 00101 The Base ID must be 00 or 01 GetBaseID Returns the HyperTransport base unit ID BUID HtInterrupts O11 Enables 1 or disables 0 HyperTransport interrupts Returns enabled if HyperTransport interrupts are enabled otherwise it returns disabled IoLog OI1 Enables 1 or disables 0 IO logging Return
17. The simulator does not support nested task switching using the rFLAGS nested task bit NT and the TSS back link field An interrupt return IRET to the previous task nested task will result in a FeatureNotImplemented exception and the simulation will be stopped Appendix A 223 AMD Confidential User Manual September 12 2008 A 6 4 Virtualization Instruction Reference For more information on Virtualization Technology see AMD Publication 33047 AMD64 Virtualization Technology Instruction Siapported Mnemonic Opcode Description PP CLGI OF 01 DD Clear Global Interrupt Flag Af Invalidates the TLB mapping for the INVLPGA OF 01 DF virtual page specified in rAX and the ef ASID specified in ECX Alternate notation for move from CR8 to MOV reg32 CR8 FO 20 r reni aber Af MOV reg64 CR8 FO 20 r EE notation for move register to w Alternate notation for move from CR8 to MOV CR8 regq32 FO 22 r EEN e MOV CR8 reg64 FO 22 r EE notation for move register to A Secure initialization and jump with ALNET OF 01 DE attestation 4 STGI OF 01 DC Set Global Interrupt Flag A VMLOAD OF 01 DA Load State from VMCB Af VMCALL OF 01 D9 Call VMM A VMRUN OF 01 D8 Run Virtual Machine A VMSAVE OF 01 DB Save State to VMCB Ff A 6 5 64 Bit Media Instruction Reference These instructions described in this section operate on data located in the 64 bit MMX registers Most
18. User Manual AMD Confidential September 12 2008 30 Chapter 3 Graphical User Interface AMD Confidential User Manual September 1 jae 2008 4 Disk Images The simulator uses hard drive images to provide simulated hard disks to the simulated computer There are several ways to obtain hard drive images e Install your OS onto a hard drive in a real system then move it to the secondary drive in a system and use DiskTool to copy the contents of the drive to an hdd image file e Make a blank hard drive image and a DVD CD ROM ISO image and install a fresh operating system onto the hard drive image To make the hard drive and DVD CD ROM images refer to Section 4 1 Creating A Blank Hard Drive Image and Section 13 DiskTool on page 157 e To use a physical DVD CD ROM e Click on the l button or select View Show Devices to open the Device Window Figure 3 2 on page 9 e Open the Southbridge s properties window by double clicking on it and choose the HDD Secondary Channel tab e Ona Windows host type D where D is the drive letter for the DVD CD ROM and on a Linux host type dev cdrom in the Master Drive Image Filename field e Check the DVD ROM check box below the Filename field The simulator can access media via the following mechanisms e IDE Hard Disk e DiskTool IDE hard disk image is a flat file consisting of a 512 byte header the ID
19. e R the contents of a 64 bit register th the contents of a 64 bit register or memory operand On Olh OJK OJO O Ojo o Ojo o Ojo o Ok Oo Ok 0 O H OU T imm8 AL ib Output the byte in the AL register to the port specified by an 8 bit immediate value OU T imm8 AX ib Output the word in the AX register to the port specified by an 8 bit immediate value OU T imm8 EAX ib Output the doubleword in the EAX register to the port specified by an 8 bit immediate value OU T DX AL Output the byte in the AL register to the output port specified in DX OU T DX AX Output the word in the AX register to the output port specified in DX OU T DX EAX Output the doubleword in the EAX register to the output port specified in DX OU TS DX mem8 Output the byte in DS rSI to the port specified in DX and then increment or decrement rSI OU TS DX mem16 Output the word in DS rSI to the port specified in DX and then increment or decrement rSI OU TS DX mem32 in DS rSI to and then Output the doubleword the port specified in DX increment or decrement rSI OU TSB Output the byte in DS rSI to the port specified in DX and then increment or decrement rSI OU TSW Output the word in DS rSI to the port specified in DX and then increment or decrement rSI OU TSD in DS rSI to and then Output th
20. 18 Figure 7 29 AMD 8151 Device Properties Dialog 98 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 Differences from Real Hardware Clock sensitive functionality like setting bus HyperTransport bus protocol is not simulated speeds is not supported The Chapter 7 Device Configuration 99 AMD Confidential User Manual September 12 2008 7 17 Raid Device Compaq SmartArray 5304 The RAID device uses disk images which are accessed as simulated volumes by the RAID controller Storage devices like ATA HDD and RAID are implemented with concepts like disk block cache journaling file and memory stores This page describes journaling in more detail A simulated volume in the RAID device is represented by an image file and one or more optional journals The combination of an image and zero or more optional journals is used to hold the contents of a simulated volume While creating a volume assign a disk image file to it e g raid image 0 imagefilename One or more additional journals can be added to the image file The image file uses a data block to store the data and the journal files use sparse indexing to hold just the blocks that have been changed Not only does journaling provide an efficient way to access the data blocks in the simulated volume but it also gives the user the flexibility to change the data block size Journals can be created eith
21. Configuration Options The only configuration options for AMD 8131 are to enable or disable hot plug for each of its PCI X bridges as shown in Figure 7 26 You cannot enable or disable hot plug after a simulation has already begun D AMD 8131 PCI X Controller 10 Properties Connections 1 0 Logging Hot Plug Hot Plug Bridge A Enable C Hot Plug Bridge B Enable Figure 7 26 AMD 8131 Device Hot Plug Configuration Differences from Real Hardware Clock sensitive functionality like setting bus speeds is not supported Neither are system errors or power management 94 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 7 14 AMD 8132 PCI X Controller The AMD 8132 PCI X Controller is a HyperTransport tunnel that provides two PCI X buses and two IOAPICs These PCI X buses may or may not be configured as hot plug capable depending on the platform Interface AMD 8132 has two types of interfaces HyperTransport and PCI buses It has two HyperTransport links HTO and HT1 that can connect to other HyperTransport link capable devices Either HyperTransport link can be set to be the upstream HyperTransport link The PCI bus interfaces in the AMD 8132 must be connected to a PCI Bus device which provides the Slot interfaces with which to connect devices for simulation Initialization and Reset State When first initialized AMD 8132 device is in its default state This is described in deta
22. PCI X Controller is ccsianssdassasnaserensusdesensvensdnevedcanacote aineeated veered 94 TAA AMD 8132 PCI X e EE 95 TIS er e Ee RRE 97 7 16 AMD 8151 AGP Bridge RE 98 7 17 Raid Device Compaq SmartArray 23204 100 LS Sek El Devices see ee Ee 101 B ISEN TT e e e AE S EE E AS 103 T20 EC DOV E a ees ee es ese esas 104 7 21 USB Keyboard and USB Mouse Device5 ccscssseeseccetscesonteseentencenners 105 T22 XTR Device cscs sescadeiky aw eegen EEN R A A TERE 106 RE USNA NEE 107 gescht HAGCOCINGO XTR IitaGet andes ike hee 107 iv Contents AMD Confidential User Manual September 1 2 2008 T22 1 27 SlOp WA RECO DEE 107 EN Nae JOUR Play pack EE 107 7 22 1 4 Stop XTR EE 108 Hee EE 110 T222 XML Str ctu eniri EE 110 7 22 2 2 XTR Binary File Contents ccc eccsesscsseecceseeseeeesseseeseeees 112 T223 EE 112 P22 EMAON S a eene 113 7223 Ex mpe CERN 113 KS AUMPDTIVE RN 119 7 24 E1000 Network Adapter Device cee cesscecssncecssececsscceesscceessccesssceeeeseees 120 7 24 1 Simulated Link Negotnatnon eeeceeeencecseececeeececeeeeecseeeecseeeeeneeeees 121 242 he Mediator Daemon s lt ccsaes tenis dens e E etedaaar 122 7 24 3 MAC Addresses for use with the Adapter ssssssessseeesseessessesssesesseee 123 7 24 4 Example Configurations oi cccssesiies desscacdessahesscasundohisyhes seeesocnadeaqies Meetccedss 123 T244 T Absolute NICs ssisntccaiiinnscemninusian diainpecansii
23. Section 7 10 AMD 8th Generation Integrated Northbridge Device on page 82 Configuration Options See the following sections Section 3 3 Working with Device Groups on page 18 Section 7 1 AweSim Processor Device on page 51 Section 7 10 AMD 8th Generation Integrated Northbridge Device on page 82 Log Messages See the following sections Section 7 1 AweSim Processor Device on page 51 Section 7 10 AMD 8th Generation Integrated Northbridge Device on page 82 Difference from Real Hardware See the following sections Section 7 1 AweSim Processor Device on page 51 Section 7 10 AMD 8th Generation Integrated Northbridge Device on page 82 Chapter 7 Device Configuration 133 AMD Confidential User Manual September 1 2 2008 This page is intentionally blank 134 Chapter 7 Device Configuration User Manual AMD Confidential September 12 2008 8 PCI Configuration Viewer The PCI Config Viewer can be used to scan PCI buses and report information about the configuration space settings for each PCI device PCI bus number PCI device number PCI function number The columns show the low nibble 0 Fh of the PCI configuration space register The rows show the high nibble 00 FOh of the PCI configuration space register AMD 8151 System Controller D AMD 8117 LPC 1 AMD 8111 IDE 1 2 AMD 8111 SMB
24. You should get a message box indicating that registration was successful 4 Execute the command Regrgs exdiamdserver rgs MODULE path and file name of exdi64ps dll usually C SimNow exdi64ps dll When running the Windows kernel debugger you must provide command line information that tells the debugger how to attach to the EXDI Server The command line for this is ke ke exch elek POSE 7 LSP DC AEA TAG LE EE VCD SODDA 104 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 7 21 USB Keyboard and USB Mouse Devices USB legacy emulation is not yet supported by the simulator model USB 2 0 support is very limited only basic PCI configuration and memory read and write functionality is available By default the simulator uses the keyboard device model to send user s keystrokes to the simulation For example when the user presses Enter with the host mouse on the graphics display window the simulator sends the internal command keyboard key 0x10 0x80 to its command interpreter If the user has a USB keyboard or mouse in his simulation he can redirect the simulator to use these USB devices for keyboard and mouse input He does this by modifying the following simulator registry keys Gui_Key_Device usbkey and Gui_Mouse_Device usbmouse from the top level View Registry With these changes when the user presses the Enter key in simulation the simulator will send the internal command
25. contain the same information for each hard drive channel The user has two options for drive simulation an image of a hard drive created with DiskTool see Section 13 on page 157 or use of a real hard disk Using a real drive requires Windows 2000 and a drive that is able to be isolated locked from the rest of the system You cannot use the drive s that the OS and or the simulator reside on To use a drive image enter a file name in the Image Filename field A browse window is activated by pressing the right most button All disk devices Primary Master etc by default have the disk journaling feature turned on which allows simulations to write to the disk image during normal operation and not affect the contents of the real disk image This is useful for being able to kill a simulation in the middle for multiple copies of the simulator running at the same time etc Journal contents are saved in BSD checkpoint files but lost if you don t save a checkpoint before exiting To change journal settings or commit journal contents to the hard disk image go to the Device View Window then the AMD 8111 Southbridge then the configuration for the hard disk in question on either the Primary or Secondary IDE controller Here you can either commit the contents of the journal to the hard disk image or turn off journaling for the hard disk image in question 88 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008
26. lt Init Device CPUO Type CPU Item RBP Data OOOOOOOOOBOBEFEO gt lt Init Device CPUO Type CPU Item RSP Data 00000000B043ADCC gt lt Init Device CPUO Type CPU Item R8 Data 0000000000000000 gt lt Init Device CPUO Type CPU Item R9 Data 0000000000000000 gt lt Init Device CPUO Type CPU Item R10 Data 0000000000000000 gt lt Init Device CPUO Type CPU Item R11 Data 0000000000000000 gt lt Init Device CPUO Type CPU Item R12 Data 0000000000000000 gt lt Init Device CPUO Type CPU Item R13 Data 0000000000000000 gt lt Init Device CPUO Type CPU Item R14 Data 0000000000000000 gt Chapter 7 Device Configuration 113 AMD Confidential User Manual September 12 2008 lt Init Device CPUO Type CPU Item R15 Data 0000000000000000 gt lt Init Device CPUO Type CPU Item ModeFlags Data 00000001 gt lt Init Device CPUO Type CPU Item EFlags Data 0000000000000002 gt lt Init Device CPUO Type CPU Item ES Data 00000023 gt lt Init Device CPUO Type CPU Item ESBase Data 0000000000000000 gt lt Init Device CPUO Type CPU Item ESLimit Data OOOOOOOOFFFFFFFF gt lt Init Device CPUO Type CPU Item ESFlags Data 00000CF3 gt lt Init Device CPUO Type CPU Item CS Data 00000008 gt lt Init Device CPUO Type CPU Item CSBase Data 0000000000000000 gt lt Init Device CPUO Type CP
27. v b w d lt data gt Creates and enables a breakpoint for the indicated I O address Sets the pass count to count or O if not specified Defaults to read write but can be set to read only or write only using the r or w options v enables the data lt data gt check capability for b yte wJord or dJouble word I O accesses For example bi 80 w vb c0 stands for break when byte 0xCO is written to I O port 0x80 DL LS ker Display the settings of one or all breakpoints 148 Chapter 10 CPU Debugger User Manual AMD Confidential September 12 2008 Debugger Command Definition bm lt address gt r w lt Pass count gt v b w d lt data gt Creates and enables a breakpoint for the indicated memory address Sets the pass count to count or 0 if not specified Defaults to read or write but can be set to read only or write only using the r or w options v enables the data lt data gt check capability for b yte wJord or dJouble word memory accesses For example bm 1000 w vb c0 stands for break when byte USCH is written to memory address 0x 1000 bs lt Vector gt lt Pass count gt Creates and enables a breakpoint for the indicated software interrupt vector Sets the pass count to count or 0 if not specified bx lt address gt lt Pass count gt Creates and enables a breakpoint for the indicated code fetch address Sets the pass count to coun
28. 0 or w JA rel8off 77 cb Jump if above CF 0 or ZF 0 Af JA rell6off OF 87 cw Jump if above CF 0 or ZF 0 ef JA rel320ff OF 87 cd Jump if above CF 0 or ZF 0 ei 202 Appendix A AMD Confidential th User Manual September 12 2008 Instruction EE Mnemonic Opcode Description PP JS rel8off 78 cb Jump if sign SF 1 a JS rell6off OF 88 cw Jump if sign SF 1 A JS rel32off OF 88 cd Jump if sign SF 1 e JNS rel8off 79 cb Jump if not sign SF 0 Ff JNS rell6 off OF 89 cw Jump if not sign SF 0 A JNS rel32o0ff OF 89 cd Jump if not sign SF 0 A JP rel8off 7A cb Jump if parity PF 1 Af JP rell6off OF 8A cw Jump if parity PF 1 Af JP rel32o0ff OF 8A cd Jump if parity PF 1 e JPE rel8off 7A cb Jump if parity even PF 1 A JPE rell6off OF 8A cw Jump if parity even PF 1 Af JPE rel320ff OF 8A cd Jump if parity even PF 1 ef INP rel8off 7B cb Jump if not parity PF 0 Af JNP rell6off OF 8B cw Jump if not parity PF 0 A JNP rel32off OF 8B cd Jump if not parity PF 0 A JPO rel8off 7B cb Jump if parity odd PF 0 e JPO rell off OF 8B cw Jump if parity odd PF 0 A JPO rel32off OF 8B cd Jump if parity odd PF 0 f JL rel8off 7C cb Jump if less SF lt gt OF e JL rell6off OF 8C
29. 02 00 00 00 00 01 IP Address Static IP address 192 168 0 1 Visibility Can only communicate with BSD s in the same simulator process using multiple machines Mediator String N A Table 7 13 Isolated Client Server Simulator Server Example MAC 02 00 00 00 00 02 IP Address Static IP address 192 168 0 2 124 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 Visibility Can only communicate with BSD s in the same simulator process using multiple machines Mediator String N A Table 7 14 Isolated Client Server Simulator Client 1 7 24 5 Visibility Diagram Figure 7 34 depicts the mediator routing packets to and from several simulator sessions in different domains The session running BSD 3 is using an absolute MAC address and therefore is globally visible This session is no different than any other machine running on the external network All simulator sessions connected to any mediator will be able to see this machine Notice also that domains one and two are using identical BSDs that are running simultaneously To prevent collisions on the external network the mediator will not route broadcast packets to these sessions as they are using a fixed MAC classification The gateway will be able to do network address translation NAT for each BSD in each domain to make sure that there are no collisions between the two d
30. 1 or disables 0 HyperTransport interrupts Returns enabled if HyperTransport interrupts are ER enabled otherwise it returns disabled IoLog OI1 Enables 1 or disables 0 IO logging JoLogStatus E enabled if IO Logging is enabled otherwise it returns disabled MemLog 011 Enables 1 or disables 0 IO logging Returns enabled if Memory Logging is enabled Mentos tins otherwise it returns disabled SmiSciLog 011 Enables 1 or disables 0 IO logging Po Returns enabled if SMI SCI Logging is enabled SE otherwise it returns disabled Version Displays the binary revision of the RD790 model SetPcilrqMap BasePcilrq 0 3 ChipPcilrq 0 7 Depending on platform configuration it maps base PCIIRQ A B C D 0 3 from PCI bridge to ATI chip internal PCITRQ A B C D E F G H 0 7 GetPcilrqMap BasePcilrq 0 3 Returns the ATI chip internal PCIIRQ A B C D E F G H_ 0 7 which the specific base PCIIRQ A B C D 0 3 is mapped to GetPcilrqTotal Returns the total number of chip internal PCIIRQs A 7 30 ATI RS480 1 simnow gt rs780 usage 252 Appendix A AMD Confidential User Manual September 12 2008 Automation Command Description SetRev lt rev gt Sets the internal chip revision number of RS480 device to lt rev gt GetRev Displays the internal chip revision number of the RS480 device A 7
31. 3 2 2 2 ele Dee 12 3 2 2 3 Dis onnect DEVICE deene EE ees 12 3 2 2 4 Delete Devita resanse ns aie nui non anda duties 13 3 2 3 Example Computer Description eesessseeseesersereeresstssresressersresreeseeseesreesee 13 3 2 4 Device Window Quick Reference ccssscccessssceceeseseeecsssseceeeeesnees 15 3 3 Device E EN 15 3 3 1 KT 16 Se Concept Eeer 17 3 3 3 Working with Device E 18 3 3 4 Shell Automation Commands for Device Groups eeeeeeeeeeeeeeteeeees 19 3 3 4 1 DEVICE TOG EEN 19 3 3 4 2 Enabled vs Disabled vs Mixed eee secesseceeeeeeeeeceeeeeeeeeees 20 3 3 5 Device E EE 20 3 3 5 1 Example 1GB DDR2 memory 0 0 eceeeceeseeeeceeseeeeeeseeeeneeseeeees 21 3 3 5 2 Example Quad Core Node AE 22 3 3 5 3 Example SuperlO device ccc eccceseessssecseeescsseesceseeseeseeseeaeens 24 3 3 6 Creating a Device Group E 24 Sr Man Eeer 24 3 4 1 SimStats and RRE TEE 24 3 4 2 CPU Statistics ET 25 3 4 2 1 Translation Graph EE 25 3 4 2 2 R al HS EE 25 3 4 2 3 Invalidation Rate Graph EE 26 3 4 2 4 Exception Rate tabu eege geegent ebe 26 3 4 2 5 PIO n 26 3 4 2 6 Ee Graph ed 27 Contents iii AMD Confidential User Manual September 1 2 2008 3 4 3 Simulated Video ceissssassal escedeaisvecsaaicagedeiasesaivideydaadasesideasesodatewaiadevieedaees 27 3 4 4 Hard Disk and Floppy Display lt szss4cs72sssdee 5 d4eseateasadscassesodaqesqeordadvsedeatseces 27 3 4 5 Using Hard Drive DVD CD ROM and Flo
32. 3 Graphical User Interface The simulator has a cross platform GUI that uses the Qt toolkit We welcome bug reports and usability feedback on the simulator Numeric Display Menu Bar Main Window Tool Bar Components lt 4 AMD SimNow Main Window File View Special Keyboard Help 2s dal g dd HO e Graphs Numeric Display s RE Simulator Stats IDE Primary Display IDE Secondary Display Floppy Display Diagnostic Ports 1 311 61 Host Seconds 134 263 808 master read D master read 430 read 02 00 03 83 80 00 Lg 26 76 Sim Seconds 22 382 928 master witten D master witten 172 written 00 00 00 00 87 84 15 0 Avg MIPS Reset Avg D slave read D slave read 00 00 00 CB e3 e0 D slave written D slave written 8 91 MIPS DMA PIO mode PIO PIO mode Real MIPS Graph System Properties ___System Restore Autoe Updates _ General ComputerName Hardware Advanced Invalidation Rate Graph System My te Microsoft Windows XP Professional x64 Edition e Version 2003 Exception Rate Graph Service Pack 1 Registered to SimNow ester Tey ete err ocr Dy Advanced Micro Devices Inc 76588 371 0497215 51703 PIO Rate Graph Computer AMD Engineering Sample 00 SL LL 802 MHz 512 MB of RAM MMIO Rate Graph Microsoft Windows Kee Professional x64 Edition i Take a tour of Windows XP x To learn about the exciting new fe
33. 88 E aa LO EAEI EEEE NTE A TEES 74 Configuration blei 5 Eiei o aile Ere ETE EET 2 61 65 Console Window ssesseeeseeeessesererrrreerrrerrrreee 24 H CPUID ege 188 CR PCE ne ladies at 190 Host Operating Systems 0 eee cece eeeeees 3 Create Device Connection cece eeeeeee 11 HyperTransport Technology Creating Floppy Disk Image 167 Coherent Ae geet ec 82 Cycle Accutates cerie oireisiin 1 LEE 84 D Link capable devices 0 0 eee eee eee eneeeee 82 Messages viv eebe 83 Debug Nor Coherent eae eaea 82 Find Pattern aeneis en 147 OR a ereer eek 14 95 Read Write MSRS ssseeeeseeeeeseeesessreeseees 146 Upstream Lmk eee eeeeeceeeceeneeceseeeeneeees 96 Reading CPU MSRS ossee 146 I Reading PCI Configuration Registers 146 Set Breakpoint eeessesesererereseserersreeessese 143 Insert CD ROM simiri iiieoo 39 Single Stepping sseeseeseseeeseeeersrrerrsrrerreee 144 INTAIOAPIC airis 86 Skip Instruction 145 IR 74 Stepping OVER seisi irer 144 TRQ Routing Dm 92 View MeMOLy s csccssccessesescscessagetseseee steeds 145 Deprecated Devices eee eetceseceseceeeeneeeeee 10 Index 255 AMD Confidential User Manual September 12 2008 J Prescott New Instruction ccc00ceeeeeeeeeeee 227 een eegenen 88 89 PS 2 EE 74 ler tte UE 100 R JOYSUCK EE 74 EE 100 K RAM Memory Device ceeceesceesseceeeeeceseeeeneeees 77 SE ania 104191 Ee EE 164 L RDPM C stees ee abn tian 190 Linux eLA E E a E E EE 7 41
34. Configuration on page 49 Device Short Description AMD Debugger Standard debugging support AweSim Processor Simulated Processor DIMM Bank DIMM Memory Modules AMD 8 Generation Integrated Northbridge Integrated Northbridge treated as a separate device in simulation AMD 8111 Southbridge Southbridge supporting Hard drives DVD CD ROM drives Floppy drives USB ports CMOS and POST ports AMD 8132 PCI X Controller The AMD 8132 PCI X Controller is a HyperTransport tunnel that provides two PCI X buses and two IOAPICs These PCI X buses may or may not be configured as hot plug capable depending on the platform Emerald Graphics Device Simulated VGA device Matrox G400 Graphics Device Simulated VGA SVGA device Simulated PCI Bus which can connect PCI Bus multiple PCI devices such as bridges and PCI VGA Winbond W83627HE SIO SuperlO Chip with keyboard mouse and floppy or e ex woo Memory Device Device that contains a configurable BIOS ROM image SMB Hub Device The SMB hub device is used to connect one SMBus to any of four SMBus SMB branches e The PCA9548 is an NR channel System iii EE Management Bus SMB switch The AT24C device is a_ Serial S AT24C Device EEPROM device 14 Chapter 3 Graphical User Interface AMD Confidential User Manual September 1 Ka 2008 Symbol Devi
35. Data 00000000000006D9 gt lt Init Device CPUO Type CPU Item CR8 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item TSC Data 00000000000000E3 gt lt Init Device CPUO Type SREG Item M00000010 Data 00000000000000E3 gt lt Init Device CPUO Type SREG Item MC0010111 Data 0000000001000000 gt lt Init Device CPUO Type SREG Item MC0000080 Data 00000000 gt lt Init Device CPUO Type SREG Item MC0000100 Data 000000007FFDEOO0O gt lt Init Device CPUO Type SREG Item MC0000101 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0000102 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0011004 Data 000000008001350C gt lt Init Device CPUO Type SREG Item MOOOOO0FE Data 0000000000000508 gt lt Init Device CPUO Type CPU Item FCW Data 0000107F gt lt Init Device CPUO Type CPU Item FSW Data 00000020 gt lt Init Device CPUO Type CPU Item FTW Data OOOOFFFF gt lt Init Device CPUO Type CPU Item FDS Data 00000000 gt lt Init Device CPUO Type CPU Item FCS Data 00000000 gt lt Init Device CPUO Type CPU Item FIP Data 0000000000000000 gt lt Init Device CPUO Type CPU Item FOP Data 00000000 gt 114 Chapter 7 Device Configuration AMD Confidential User Manual September 1 SA 2008 lt Init Device CPUO Type CPU Item FPO Data 000000000000
36. Floppy Disk A No disk present Figure 4 1 DiskTool Dialogue Window For information about supported options and modes that DiskTool supports please refer to Section 13 DiskToo on page 157 Figure 4 2 shows the DiskTool shell window c C simnow disktool exe Disk Device found at SCSI Port Bus Target LUN Opening WDC WDi2G BB DAA1 as PHYSICALDRIVEG Cylinders 4589 Heads Secto Bytes Media Type 12 Completed Device has been successfully identified Disk Device found at SCSI Port Bus Target 1 LUN Opening WDC WD1i2G6 BB G DAA1 as PHYSICALDRIVE1 Cylinders 4589 Heads Secto Bytes Media Type 12 Completed Device has been successfully identified Disk Device found at SCSI Port 1 Bus Target 1 LUN Opening IC35L 2QAVER 7 as PHYSICALDRIVE2 Cylinders 561 Heads Secto Bytes Media Type 12 Completed Device has been successfully identified Figure 4 2 DiskTool Shell Window 32 Chapter 4 Disk Images AMD Confidential User Manual September 12 2008 To create a blank disk image click on the Create Blank Disk Image button on the right side of the DiskTool dialog window see Figure 4 1 A Save As dialog will ask you for the location and image filename that will be created Choose the location where you want to store the blank image file and then enter the image filename Click on the Save button An additional dialog see Figur
37. Instruction s d Mnemonic Opcode Description upporte Perform unsigned division of EDX EAX by the contents of a 32 bit register DIV reg mem32 F7 6 or memory location and store the D quotient in EAX and the remainder in EDX Perform unsigned division of RDX RAX by the contents of a 64 bit register DIV reg mem64 F7 6 or memory location and store the e quotient in RAX and the remainder in RDX ENTER imm16 0 CB iw 00 Create a procedure stack frame ENTER imm16 1 CB iw 01 Create a nested stack frame for a amp procedure ENTER imm16 imm8 CB iw ib Create a nested stack frame for a amp procedure Perform signed division of AX by the contents of an 8 bit register or IDIV reg mem8 F6 7 memory location and store the e quotient in AL and the remainder in AH Perform signed division of DX AX by the contents of a 16 bit register or IDIV reg mem16 F7 7 memory location and store the e quotient in AX and the remainder in DX Perform signed division of EDX EAX by the contents of a 32 bit register or IDIV reg mem32 F7 7 memory location and store the e quotient in EAX and the remainder in EDX Perform signed division of RDX RAX by the contents of a 64 bit register or DIV reg mem64 EI 7 memory location and store the D quotient in RAX and the remainder in RDX Multiply the contents of AL by the a contents of an 8 bit memory or MUL reg mem8 6 5 register operand and put the signed wf result in AX Multiply the contents of AX by th
38. ROM EE 71 Loopback Device sseeseeseseeeeeeeresreerrerrersee 40 S Log A Ss SE EE EE SE Beggen E ed ee 230 EE EISEN EE 4 26 EX ceptions dese EES 52 SEM thre ce ad ee Sa Aan hie Bo add ky 189 T O RTE 140 Shell 230 N 52 bell en Kat ku EE 24 Linear Memory Accesses sseseeeeeeeeeeeeeeeee 52 Sinele Steppin See Debu Register State Changes seseeeseeeeeseeereeeeee 52 GC SC SE LPCAISA Bridge i aer BOS ee EC LPT 74 SMB Ges eee ee EE 14 80 81 NEE EE 14 101 M SMB Base Address 58 MAC AddreS oo 123 SOE PO WEL 2 Segen el eene 8 Soft Sleeps shoes il keh eh See edd 8 Mediator D aemon 122 SOIlOIDSC ee se E E eed E telat e 45 Memory Confteurator eee eeeeeeeeeees 163 KE RE 164 Message LOS ingiere 137 E 8 POLE Reien Ee 60 Microcode Patching eeseeeeeeeeeeeeeereeereerseee 190 I S MPOr aen eoa ee ea eE aaoi 60 Microsoft DirectX 9 2 KI RAR 164 MED EE 74 Stepping Overen eA a aiani See Debug MIPS leese e E EA 25 Sto 7 EE 136 gt aE e n NE A E E eis N LEE 107 Mouse Cursor raot erneieren cennette eierens 169 10 74 Multiple Virtual_Mappines 190 Super IO eege H e EE EE 61 65 N Switching CD Images osooso 180 System Requirements 000 0 eee eeeeeeeeeeeees 3 Named Pipe 151 152 153 154 238 239 240 Nested Task ge AEN 225 T P KT 25 RE OH DEE 53 Pacifica Virtualization Technology 146 Triple Fault ninn 190 Parton erni enn ea a E ais 159 OR 225 Es E Cpe ean eee ee eee eee 94 PC
39. This command reads the first 102400 sectors from device dev hd0 and places them in the image file image hdd Option P Put the image file lt ImageName gt to physical device lt DeviceName gt Syntax PI P lt DeviceName gt lt ImageName gt Example disktool p dev hd0 image hdd This command reads image file image hdd and writes data to physical device dev hdo Chapter 13 DiskTool 157 AMD Confidential User Manual September 12 2008 Option E Erase Write zeros to all blocks physical device Syntax El E lt DeviceName gt Example disktool e dev hdO This command writes zeros to all sectors on device dev hdo Option N Create a new blank image file that represents a freshly formatted device Syntax NI N lt ImageName gt lt ImageSize gt Example disktool n image hdd 102400 This command creates an image file named image hdd that represents a physical hard disk drive containing 102400 sectors each sector is 512 bytes 13 2 GUI Mode The DiskTool GUI window is shown in Figure 13 2 DiskTool will only display floppy drives and DVD CD and HDD drives that are connected to either the primary or the secondary IDE controller It will not display external USB or firewire drives drives attached to SCSI controllers etc DiskTool displays the names of these devices in the Physical Drives list box using names appropriate for the host operating system When running under Wi
40. User Manual September 12 2008 Figures Figure 3 1 Main Window In Smulaton E 7 Figure 3 2 Device Meed eee 9 Figure 3 3 Workspace Popup Menu isi scscsesscdesussssenszsequis cosseccedavacvadaqas stecsedacnesesbeseendenss 11 Figure 3 4 Add Connection Dialog of Device Properties WindoW sessesesessesseessees 12 Figure 3 5 Computer Simulation in cheetah_1p bsd File eeeeeecesecneeeneeeneeeeees 13 Figure 3 1 Device group BSD with one machine group and three child devices 17 Figure 7 2 Device group different conceptual view devices are inside groups 17 Figure 7 3 Device Group 2 group devices 1 library device ee eeeeeeeeeeeeeeeeeteeeeeseees 18 Figure 3 62 Modify Group EE 18 Figure 3 7 Device Group ssississsiissis sesionet seitas iriste kiini E E EEEE REE a pean ales 18 Figure 3 8 Example DIMM Device CERN 21 Figure 3 9 Created DIMM Device Group eet 21 Figure 3 10 Children of DIMM Device Group sesesessseeseesrsesesresseesresrersessresreesresresreesee 22 ter 11s Console Window essesi eng ee Seeerei 24 Figure 3 12 Progress Meter and Diagnostic Porte 25 Figur 3 13 CPU Translation Graph EE 25 Figure 3 14 CPU Real MIPS EE ik eda eles A R nadie 26 Figure 3 15 CPU Invalidation rap ege enee EEN 26 Figure 3 16 CPU Exception Rate E EE 26 Fig rte 3 177CPU PIO Rate Graph eege een 27 Figure 3 18 CPU MMIO Rate Graph ssssseesessesseseeesesssesresseserssresseesrssrensessresressrese
41. and 32 Bits Per Pixel video modes ILOAD Pseudo DMA Window Transfers Programmable transparent BLTer Linear packed pixel frame buffer Supported DirectX 6 1 Features Alpha TestO Alpha Blending Functions Normal Blending Transparency Blending Additive Blending Soft Additive Blending Multiplicative Blending Depth Test Z Buffer 15 bit 16 bit 24 bit and 32 bit Texel Width 4 8 12 15 16 and 32 bit UV Texture Coordinate support DMA Vertex Engine S EEE Supported Graphics Modes The Matrox G400 provides three different display modes text VGA or SVGA VGA graphics and SVGA graphics Table 7 4 list all of the display modes which are available through BIOS calls Mode Number Type Organization Resolution No of colors Supported 0x00 VGA 40x25 Text 360x400 16 e 0x01 VGA 40x25 Text 360x400 16 A 0x02 VGA 80x25 Text 720x400 16 w 0x03 VGA 80x25 Text 720x400 16 A 0x04 VGA Packed pixel 2 bpp 320x200 4 A 0x05 VGA Packed pixel 2 bpp 320x200 4 Af 0x06 VGA Packed pixel 1 bpp 640x200 2 Af 0x07 VGA 80x25 Text 720x400 2 e 0x0D VGA Multi plane 4 bpp 320x200 16 e Ox0E VGA Multi plane 4 bpp 640x200 16 Af Ox0F VGA ulti plane 1 bpp 640x350 2 Af 0x10 VGA ulti plane 4 bpp 640x350 16 Af 0x11 VGA ulti plane 1 bpp 640x480 2 e 0x12 VGA ulti plane 4 bpp 640x480 16 e 0x13 VGA Packed pixel 8 bpp 320x200 256 Ff 70 Chapter 7
42. creating device Winbond W83627HF SIO creating device Memory Device creating device Emerald Graphics allocate map memory BSD Load completed Figure 15 1 Console Window The automation commands are sent to a specific device by starting the command with the name of the device followed by a period For example to send the Modules command to the shell device you would use 1 simnow gt shell modules If more than one device exists in the currently loaded BSD for example most BSDs include two IDE controllers you identify the specific device by following the device name with a colon and then the number of the device you are interested in For example to send the DVDROMStatus command to the second IDE controller you would use 1 simnow gt ide 1 DVDROMStatus 0 Omitting the colon and the device number causes the simulator to assume device 0 The following two commands are equivalent 228 Appendix A AMD Confidential User Manual September 1 oe 2008 1 simnow gt ide 0 DVDROMStatus 0 1 simnow gt ide DVDROMStatus 0 In addition to the commands supported by the various devices detailed below all devices support the usage and ausage command These commands return a brief description of each of the commands supported by a specific device For example to get a non alphabetic ordered list of the commands supported by the shell you could send the command 1 simnow gt shell usage To get an alphabetic
43. e imm32 64 Doubleword 32 bit or quadword 64 bit immediate e imm64 Quadword 64 bit immediate e mem An operand of unspecified size in memory e mems Byte 8 bit operand in memory e memI16 Word 16 bit operand in memory e mem16 32 Word 16 bit or doubleword 32 bit operand in memory e mem32 Doubleword 32 bit operand in memory e mem32 48 Doubleword 32 bit or 48 bit operand in memory e mem48 48 bit operand in memory e mem64 Quadword 64 bit operand in memory e mem16 16 Two sequential word 16 bit operands in memory e mem16 32 A doubleword 32 bit operand followed by a word 16 bit operand in memory e mem32real Single precision 32 bit floating point operand in memory 190 Appendix A AMD Confidential User Manual September 12 2008 e mem32int Doubleword 32 bit integer operand in memory e mem64real Double precision 64 bit floating point operand in memory e mem64int Quadword 64 bit integer operand in memory e memS amp 0real Double extended precision 80 bit floating point operand in memory e memS amp 0dec 80 bit packed BCD operand in memory containing 18 4 bit BCD digits e mem Zen 16 bit x87 control word or x87 status word e meml4 28env 14 byte or 28 byte x87 environment The x87 environment consists of the x87 control word x87 status word x87 tag word last non control instruction pointer last data poi
44. i e the number of times the breakpoint should be hit before breaking into the debugger In addition the BM and BI commands accept an optional parameter that specifies whether to break on a read input or write output transaction to the specified address Examples of each command are shown in Table 10 1 4 After setting up and enabling the breakpoint s enter G on the command line to resume CPU execution This will execute the debugger s Go command returning the CPU to continuous execution If a breakpoint is hit the simulation will pause and the debugger will gain attention Command Description Break on the next execution of the instruction located at linear address 0x1234ABCD Break on the third execution of the instruction located at linear address 0x1234ABCD Break on the fourth read of the memory location OxABCD1234 linear Break on the fourth access read or write of the memory location OxABCD 1234 linear BI 80 w 3 Break on the fourth write to I O address 0x80 BX 1234abcd BX 1234ABCD 2 BM abcd1234 r 3 BM abcd1234 3 Table 10 1 Debugger Breakpoint Command Examples 10 1 2 Single Stepping the Simulation 1 Stop the simulation as described in Section 3 1 Tool Bar Buttons on page 7 2 Open the Debugger Window View Show Debugger or click on gt The simulation will pause and the Debugger Window will appear 3 The bottom pane in the Deb
45. intthrt sets the interrupt throttle rate to value rxdelay sets the amount of link idle time required before generating an rx interrupt to value txdelay sets the amount of link idle time required before generating an tx interrupt to value getTuneValues Displays the values set by using the automation command tune A 7 28 XTR 1 simnow gt xtrnb usage Automation Command Description xtrfile lt filename xml gt Sets XTR XML file to use during playback debug lt 011 gt Enables 1 or Disables 0 extended debug information for XTR Playback Appendix A 251 User Manual AMD Confidential September 12 2008 Automation Command Description xtrlogfile lt filename log gt Sets name of the log file where XTR messages should be logged This is optional and if not used the log is directed to the simulators log status Displays the status of XTR playback 1 simnow gt xtrsvc usage Automation Command Description xtrenable lt 0 1 gt Enables 1 or Disables 0 XTR Record All other values are invalid xtrfile lt filename xml gt Sets the XTR XML file for XTR Record XTRMemBits n Sets number of bits for memory address bits to scan n 16 32 or 48 Default is 32 Xtrstatus Displays the status of XTR Record A 7 29 ATI SB400 SB600 SB700 1 simnow gt sb600 usage Automation Command Description HtInterrupts O11 Enables
46. location or register AND the contents of a 64 bit register AND reg64 reg mem64 23 Jr with the contents of a 64 bit memory e location or register Test whether a 16 bit array index is BOUND reg16 mem16 mem16 62 r within the bounds specified by the e two 16 bit values in meml16 amp mem16 Test whether a 32 bit array index is BOUND reg32 mem32 amp mem32 62 r within the bounds specified by the ef two 32 bit values in mem32 amp mem32 o Bit scan forward on the contents of BSF regl16 reg mmem8 OF BC r Ge e S e Bit scan forward on the contents of BSF reg32 reg mmem32 OF BC r RE e 8 Bit scan forward on the contents of BSF reg64 reg mmem64 OF BC r reg mem64 e Bit scan reverse on the contents of BSR reg16 reg mmem8 OF BD r EE e Bit scan reverse on the contents of BSR reg32 reg mmem32 OF BD r reg mem32 e E Bit scan reverse on the contents of BSR reg64 reg mmem64 OF BD r reg membe ef 194 Appendix A AMD Confidential User Manual September 1 a 2008 Instruction S ted Mnemonic Opcode Description EPPOI BSWAP reg32 OF C8 rd Reverse the byte order of reg32 e BSWAP reg64 OF C8 rd Reverse the byte order of reg 64 A BT reg mem16 reg16 OF A3 r EH BT reg mem32 reg32 OF A3 r ee ene EE Bit SS e e 1 h I i BT reg mem64 reg64 OF
47. lt Entries gt lt Depth gt lt Block Size gt Set the parameters for disk block cache For e g raid setdbc 32768 5 512 SetJournalParameters lt Super Block Size gt lt Index Block Size gt lt Index Levels gt lt DiskBlock Size gt Set the Journal Parameters For raid setjournalparameters 8192 512 3 512 e g GetJournalParameters Displays the Journal parameters A 7 24 DIMM 1 simnow gt dimm usage Automation Command Description Enables 1 or disables 0 the PDL Error Simulation If PdlErrorSim 011 enabled then the DIMM device monitors PDL settings for all RAM reads GetPdlErrorSim Returns enabled if PdlErrorSim is enabled otherwise it returns disabled OutOfRangeResp OxFF invert The Out of Range Response selection specifies how the data should be altered if a PDL is out of range The OxFF option specifies that the return data should be forced to all ones The Invert option specifies that the return data should be a bitwise inversion of the valid data GetOutOfRangeResp Returns the specified options set by OutOfRangeResp The SMB Base Address entry selects the 8 bit address SMBBaseAddr lt addr gt that this DIMM device responds to The SMB address is used for the reading of DIMM SPD data GetSMBBase Returns the specified SMB Base address ImportSPD lt DimmNo gt lt fullpath gt ImportSPD provides the option of loading SPD ROM data to DimmNo from t
48. or dJouble word to the indicated port Chapter 10 CPU Debugger 149 User Manual AMD Confidential September 12 2008 Debugger Command Definition D Similar to the command single steps the simulation one instruction unless the current instruction is a call software interrupt or repeated string instruction in which case this command sets a temporary execution breakpoint at the instruction sequentially following the current instruction and starts simulation r regname lt value gt Displays and optionally alters the contents of various CPU registers For a list of register names that are supported type R Normally the display is in the current CPU mode To force 16 bit 32 bit or 64 bit register display type R16 R32 or R64 respectively R16 Display 16 bit registers until the next instruction R32 Display 32 bit registers until the next instruction R64 Display 64 bit registers until the next instruction s lt Bus gt lt Device gt lt Function gt Displays the PCI configuration registers associated with the given Bus Device and Function number t count Executes count instructions The default value for count is 1 u address range Disassembles instructions starting at the given address and continuing for length instructions Instructions are disassembled using the current CPU execution mode Displays the vers
49. to defined address BaseAddress BaseAddress lt value gt Value is the base address of the device in hex GetBaseAddress Returns the base address of the device in hex SizeInBlocks lt value gt Value is the total size of the memory device given in decimal value for the number of 32 Kbyte blocks 32 Kbyte blocks are used because not initialized memory is dynamically allocated when addressed in 32 Kbyte chunks GetSizeInBlocks Returns the number of 32 Kbyte blocks allocated by this device InitFile lt filename gt filename is the name of the binary file that is used to initialize the memory contents Note that the device initializes memory for the content length of the file If you specify a 512 Kbyte ROM and use a 256 Kbyte image file the first 256 Kbytes are initialized Returns the path and name of the init file see above GetInitFile InitFile Turns 1 the memory device into a ROM Writes to the ReadOnly lt 011 gt device are ignored when the read only option is selected GetReadOnly Returns true if memory is read only otherwise it returns false SystemBios lt OI1 gt Tells 1 the memory device that it is the system BIOS GetSystemBios Returns true if memory is used as a System BIOS otherwise it returns false MemAddrMask lt OI1 gt Enables 1 or disables 0 memory address masking If enabled 1 it indicates that the address receive
50. usbkey key 0x10 0x80 to its command interpreter When the user moves the mouse around the simulator display the simulator will send commands such as usbmouse mousemouve 10 10 to the interpreter Chapter 7 Device Configuration 105 AMD Confidential User Manual September 12 2008 7 22 XTR Device XTR is a trace record and playback mechanism that is instrumental for applications that are not dependent on the specific version of the CPU An XTR trace contains the interaction of the processor with the rest of the system in an XML based log file The XTR trace file can be played back and could be used to simulate behavior of one or more devices within a system which in turn may be used to analyze the CPU s performance or to perform conformance analysis between various revs and models of the CPU XTR may also be used in studies where the behavior of some devices needed but the use of an actual device or its software model is either difficult of impossible due to various constraints XTR has two files a binary file which has the memory dump of the system and an XML based text file which contains the log of the events or messages that go in and out a non coherent port of the Northbridge including the DMA signals from devices on the host s secondary bus to the DIMM XTR playback mechanism essentially replaces all the devices including the Northbridge and downwards and feeds the processor with the data present in the XTR XML file The str
51. 1 or disables 0 decoding of HyperTransport messages ForcelInitFile lt filename gt The ForcelnitFile command allows the user to change the BIOS ROM path once the simulation has already started This is legitimate only when the new BIOS ROM is a byte for byte copy of the initial BIOS ROM that simulation began with i e same file different path GetCommandSequence Prints which of the two command sequences the flash device is programmed to CommandSequence lt 0 1 gt 0 SST 1 ATMEL Allows to set the command sequence to SST or ATMEL GetFlashMode Tells you if the device is configured to act as a flash memory FlashMode lt 01 1 gt Allows the user to set the memory device as flash memory A 7 23 Raid 1 simnow gt raid usage Automation Command Description Noise enableldisable Enable to print debug messages otherwise disable RomImage lt File name gt Allows a boot ROM image to be supported at the moment the emulation does not work with any known ROM images SetVolume lt Vol gt lt Image file gt lt Journal file gt This was the original way to setup the image and journal files rather than having two separate commands DeleteVolume lt Vol gt Undoes the Image or Journal commands and puts the volume back in an unintialized state Sync This command flushes the in memory caches out to the files Type 530415312 Th
52. 31 ATI RS780 1 simnow gt rs780 usage Automation Command Description SetRev lt rev gt Sets the internal chip revision number of RS780 device to lt rev gt GetRev Displays the internal chip revision number of the RS780 device Version Displays the binary revision of the RS780 model A 7 32 ATI RD790 RD780 RX780 1 simnow gt rd7 90 usage Automation Command Description SetRev lt rev gt Sets the internal chip revision number of RD790 device to lt rev gt GetRev Displays the internal chip revision number of the RD790 device Version Displays the binary revision of the RD790 model SetPackageType lt RD790 RX780 gt Sets package type to RD790 or RX780 GetPackageType Displays current package type A 7 33 ATI RD890S RD890 RD780S RX880 1 simnow gt rd890 usage Automation Command Description SetRev lt rev gt Sets the internal chip revision number to lt rev gt GetRev Displays the internal chip revision number Version Displays the binary revision SetPackageType lt RD890S RD890 RD870S RX880 gt Sets package type to RD890S RD8 amp 90 RD8 amp 70S or RX880 GetPackageType Displays current package type Appendix A 253 AMD Confidential User Manual September 1 SE 2008 254 Appendix A AMD Confidential User Manual September 12 2008 Index y Device EE 93 Dev
53. 780 See Section 1 Overview on page 1 What is a BSD file See Section 6 1 BSD Files on page 45 Chapter 15 Frequently Asked Questions FAQ 177 AMD Confidential User Manual September 12 2008 What do you need to run the simulator See Section 2 Installation on page 3 What generic BSD files are provided with the simulator See Section A 2 1 Computer Platform Files on page 184 How do I load a BSD file See Section 5 1 1 Open a Simulation Definition File on page 36 How do I Start Stop Reset Press Soft Sleep or Press Soft Power for simulations See Section 3 1 Tool Bar Buttons on page 7 What kind of hardware does the simulator require See Section 2 1 System Requirements on page 3 What host operating systems can the simulator be run on See Section 2 1 System Requirements on page 3 What Guest operating systems are supported See Section A 3 Supported Guest Operating Systems on page 186 What devices are supported See Section 7 Device Configuration 3 on page 49 What about graphics video adapter See Section 1 Overview on page 1 and Section 7 4 Emerald Graphics Device on page 61 What about networking See Section 7 24 E1000 Network Adapter Device on page 120 How does the simulator access media What are Hard Disk DVD CD ROM Disk or Floppy Disk images See Section 4 Disk Images on pa
54. A 7 3 USB 1 simnow gt usb usage Automation Command Description log enableldisable mifsopt Enables or disables Memory m Interrupt i Frame f StateChange s PCI Config p Transfer t or and IO 0 logging 234 Appendix A AMD Confidential User Manual September 12 2008 A 7 4 CMOS 1 simnow gt cmos usage Automation Command Description Load lt filepath gt Loads CMOS data stored at filepath For example cmos load c cmos dat Save lt filepath gt Saves CMOS data to filepath e g cmos save c cmos dat SetTime lt seconds gt lt minutes gt lt hours gt lt days since Sunday gt lt day of the month gt lt months since January gt lt years since 1900 gt Sets CMOS Time to specified time For instance cmos SetTime 00 00 12 00 31 12 14 sets the CMOS time to Sunday December 31th 2004 at 12 00 00 GetByte lt addr gt Returns byte in CMOS that is stored at address addr SetByte lt addr gt lt data gt Sets byte in CMOS at address addr to value stored in data GetData Dumps complete CMOS GetRamSize Returns the CMOS RAM size in bytes ClearTo lt value gt Sets entire CMOS to specified value value A 7 5 ACPI 1 simnow gt acpi usage Automation Command Description PowerButton Triggers PowerButton ACPI message SleepButton Triggers SleepButton ACPI m
55. AMD Sao Paulo Device The AMD Sao Paulo device is a 8 core processor node suitable for a G34 socket It emulates a planned product that derives from a revision of the AMD Family10h product line The device iteself is composed of 8 individual AweSim Processor Devices that are connected to a single AMD 8th Generation Integrated Northbridge Device For more information on Group Devices see Section 3 3 Device Groups on page 3 3 Interface Sao Paulo has several connection ports It has 4 HyperTransport links split to form 8 sub links Each sub link can connect to a coherent HyperTransport device such as another AMD Istanbul Device or a non Coherent HyperTransport device such as AMD amp 131 PCI X Controller These ports are mutually exclusive and should be connected to only one other device Sao Paulo also exposes two DRAM channel interfaces DCTO and DCT 1 to interface with system memory Contents of a BSD See the following sections Section 7 1 AweSim Processor Device on page 51 Section 7 10 AMD 8th Generation Integrated Northbridge Device on page 82 Configuration Options See the following sections Section 3 3 Working with Device Groups on page 18 Section 7 1 AweSim Processor Device on page 51 Section 7 10 AMD 8th Generation Integrated Northbridge Device on page 82 Log Messages See the following sections Section 7 1 AweSim Processor Device
56. Athlon64 cpu setnumcores 1 cpu forcefinegrainedevents 1 GIE SSESisSuacVjoe ww 212 adddevice xtrnb euer ives Processor GO CRU Bus OY Msacicials 42 MCU Goes OU connect Awesim Processor 0 Interrupt IOAPIC Bus xtrnb 2 Interrupt IOAPIC Bus cpu type K8 modifyregistry System Bus Frequency 100 xtrnb xtrfile lt filename xml gt xtrnb debug 1 xtrnb xtrlogfile lt filename playback log gt SetLogFile lt filename log gt SetLogFileEnabled 1 SetErrorLogFile lt filename errlog gt Chapter 7 Device Configuration 107 AMD Confidential User Manual September 12 2008 SetErrorLogFileEnabled 1 GO Tee PE Ruin Cia cae sell 7 22 1 4 Stop XTR Playback XTR Playback will stop automatically when End Of Trace EOT event is reached It could also be stopped prematurely by clicking on the stop button or by executing the stop automation command Initialization and Reset State XTR Record does not have any special Initialization or Reset state Init from BSD The BSD contents of XTRNB are loaded The XTR XML file is skipped the number of lines to the last event read and the system prepares itself for playback Init from Automation Script The CPU is initialized from the initialization data in XML and the system prepares itself for playback This method does not support persistent storage of XTR state to be replayed later Reset The XTR file handle is closed All t
57. BTR reg mem32 imm8 OF BA 6 ib the carry flag and then clear the e selected bit Copy the value of the selected bit to BTR reg mem64 imm64 OF BA 6 ib the carry flag and then clear the e selected bit Copy the value of the selected bit to BTS reg mem16 reg16 OF AB r the carry flag and then set the ei selected bit Copy the value of the selected bit to BTS reg mem32 reg32 OF AB r the carry flag and then set the e selected bit Copy the value of the selected bit to BTS reg mem64 reg64 OF AB r the carry flag and then set the ef selected bit Copy the value of the selected bit to BTS reg mem16 imm8 OF BA 5 ib the carry flag and then set the e selected bit Copy the value of the selected bit to BTS reg mem32 imm8 OF BA 5 ib the carry flag and then set the e selected bit Copy the value of the selected bit to BTS reg mem64 imm8 OF BA 5 ib the carry flag and then set the e selected bit Near call with the target specified CALL rell6off EG iw by a 16 bit relative displacement C f Near call with the target specified CALL relj2Zoff E8 id by a 32 bit relative displacement C CALL reg mem16 FF 2 Near call with the target specified w by reg mem16 Appendix A 195 AMD Confidential User Manual September 12 2008 Instruction Sonnac M
58. CMOS Drive 0 Image Filename kel Joumal import export commit Drive 1 Image Filename el Joumal import export commit Drive 2 Image Filename di Joumal import export commit Drive 3 Image Filename di Joumal import export commit Figure 7 36 ATI SB600 SATA Configuration Dialog Log Messages These SouthBridge devices have the ability to log messages to the Message Log Window as specified by the options in the Logging Option tab These devices can log I O mapped Transactions Memory mapped Transactions and SMI and SCI assertions Difference from Real Hardware These Southbridge devices differ from other devices mainly in those items that deal with real time operation Those items cannot be modeled in the current simulator The functionality of the USB 2 0 controller is also absent PCI registers and memory mapped registers are the only portion present Hardware supporting HD Audio is also not modelled in SimNow Chapter 7 Device Configuration 129 AMD Confidential User Manual September 12 2008 7 27 ATI RS480 RS780 RD790 RD890 Northbridge Devices The ATI RS480 RD790 RS780 feature set includes an upstream HyperTransport CPU interface a PCI E interface and an A Link PCI E dowstream interface to the SouthBridge Depending on the part and the platform each device may have s
59. D GetBaseIRQ lt SlotID gt Returns the Base IRQ of slot SlotID Slot lt SlotID gt 011 Enables 1 or disables 0 slot wit specified SlotID SlotStatus lt SlotID gt Returns enabled if slot SlotID is enabled otherwise it returns disabled GetConfig Displays PCI Bus configuration information A 7 21 SIO 1 simnow gt sio usage Automation Command Description The Lock 1 or Unlock 0 Registers option activates BreakOnLock 011 the breakpoint anytime the lock or unlock sequence is hit Returns enabled if BreakOnLock is enabled otherwise it EE returns disabled Enable 1 or disable 0 breakpoints whenever any of H the device configuration registers is read GetReadStatus Returns enabled if BreakOnRead is enabled otherwise it returns disabled Enable 1 or disable 0 breakpoints whenever any of Presson the device configuration registers is modified GetWriteStatus Returns enabled if BreakOnWrite is enabled otherwise it returns disabled GetConfig Displays SIO configuration information Appendix A 243 User Manual AMD Confidential September 12 2008 A 7 22 Memory Device 1 simnow gt memdevic usag Automation Command Description Save lt filename gt Creates file filename and saves the contents of the currently loaded ROM to filename Load lt filename gt Loads the specified MemDevice filename
60. DIMM Device Group The device GUI for the children of Dimm DDR2 1GBx2 0 would look like this Chapter 3 Graphical User Interface 21 AMD Confidential User Manual September 1 E 2008 d gt Machine 1 gt Dimm DDR 1GBx2 0 Drag Icons to insert new devices Shift drag to add connections Show Deprecated Devices d AMD 8th Generation Integrated Northbridge il Dimm Bank 0 een Figure 3 13 Children of DIMM Device Group If we looked at the options and configuration of the device library gt Machine 1 gt Dimm DDR2 1GBx2 0 gt Dimm Bank 0 either from the GUI or from the console we would see that it is already configured as DDR2 with 2 dimm slots 1GB each This example demonstrates a broad concept An existing device that has a more generic and abstract definition such as a non configured Dimm Bank can be wrapped in a device group to give it an identity as a particular hardware implementation such as an already configured Dimm DDR2 1GBx2 More generally any device can be wrapped by a device group to give an alternate default configuration for the device s state archive data 3 3 5 2 Example Quad Core Node Next we will consider examples relevant to the ability of a device group to have multiple child devices default archive data for each child device and connections between the child devices These next examples are based on a quad core processor node Building a processor nod
61. DS rSI into AX and then LODS une AD increment or decrement rsSI 4 Load doubleword at DS rSI into EAX LODS memz AD and then increment or decrement rSI 4 Load quadword at DS rSI into RAX and LODS mem64 AR then increment or decrement rSI w Load byte at DS rSI into AL and then LODSB ne increment or decrement rSlI 4 Load word at DS rSI into AX and then LODSW AD increment or decrement rsSI 4 Load doubleword at DS rSI into EAX PS Se and then increment or decrement rSI sw Load quadword at DS rSI into RAX and LODSO AD then increment or decrement rSI w Decrement rCX and then jump short if LOOP rel8o0ff E2 cb SE ECH e 204 Appendix A User Manual AMD Confidential September 12 2008 Instruction Mnemonic Opcode Description Supported LOOPE rel8off El cb Decrement rCX and then jump short if rCX is not 0 and ZF is 1 LOOPNE rel8off EO cb Decrement rCX and then jump short if rCX is not 0 and ZF is 0 LOOPNZ rel8off EO cb Decrement rCX and then jump short if rCX is not 0 and ZF is 0 LOOPZ rel8off El cb Decrement rCX and then jump short if rCX is not 0 and ZF is 1 MFENCE OF AE FO Force strong ordering of load and store operations serialized MOV reg mem8 reg8 88 Jr Move the contents of an 8 bit register to an 8 bit destination register or memory operand MOV reg mem16 reg16 89 Jr
62. Device s Del Disconnect Device s Group Devices Ctrl G What s This Help Figure 3 9 Modify Group Click on Modify Group Show Devices This will open a separate show device viewer window AweSim Processor 0 AMD Sth Generation AweSim Processor 5 Integrated Northbridge 6 Figure 3 10 Device Group If any modifications are done to the device group then they will be saved with the BSD Note that it is possible to modify a device group to a point where its children look nothing like the original device 18 Chapter 3 Graphical User Interface AMD Confidential User Manual September 12 2008 3 3 4 Shell Automation Commands for Device Groups The shell automation commands that are used for a device also work for a device group For example shell KnownDevices lists all known devices both device libraries and device groups For example a device group exposes ports and connections so shell AvailablePorts and shell Connect etc work with a device regardless of whether it s a group or a library 3 3 4 1 Device Tree You can optionally reference a device in the parent and child grouping device tree using the syntax separator gt between device parent and child and gt Machine 1 as the root device Here are some examples using a machine and platform that just has two 4 core Node devices 1 simnow gt shell createddevices WAS core Noce Ow 4 core Node 1 1 simnow gt shell
63. Dimm Bank 0 10 Logger Matrox R MGA G400 Graphics Adapter 0 10 Logger Memory Device 0 10 Logger PCI Bus 0 10 Logger Winbond W83627HF SIO 0 Journal 0 Journal 1 Journal 2 Journal 3 Keyboard Controller 0 Keyboard Controller Scancode Translator 0 Matrox R MG4 G400 Graphics Adapter 0 Memory Device 0 PCI Bus 0 SubDevAta 0 Winbond W83627HF SIO 0 Clear Window Save Window Contents C Log to Console Figure 9 1 Message Log The left hand window lists all of the currently loaded modules The user may individually enable or disable logging from a given module by using the checkbox next to the module s name In addition the user may configure module specific logging options by double clicking on the module name The top right window contains three checkboxes which allow the user to control whether messages are displayed in the log window written to a file or logged to the AMD SimNow console The bottom right window is used to display the informational message if the Log to Window option is selected To open the log file the first time a simulation is started check the Log To File box is checked The log file will remain open until one of the following events occurs e The BSD is closed or the simulator program terminates e The simulation is stared with the Log To File box unchecked e The simulation is started with a new log file name specified 138 Chapter 9 Logging AMD Confidenti
64. Generation Integrated Northbridge using the Northbridge s Memory Bus and the DIMM s Generic Bus Add the AMD 8151 AGP Tunnel This is a HyperTransport tunnel and AGP bridge Connect it to the Northbridge using each device s HyperTransport Bus 0 46 Chapter 6 Create a Simulated Computer AMD Confidential User Manual September 12 2008 10 11 12 13 14 Add the Matrox Millenium G400 Graphics Device This is the simulated video device Connect it to the AMD 8151 AGP Tunnel Device using AMD 8151 AGP Tunnel AGP Bus and the Graphics Device s AGP or PCI Bus Add the Southbridge Device Connect it to AMD 8151 AGP Tunnel using AMD 8151 AGP Tunnel HyperTransport Bus 1 and HyperTransport Bus 0 Also connect AMD 8111 _ to the DIMM device using AMD 8111 System Management Bus 0 and DIMM s Generic Bus Add the Winbond W83627HE SIO device This is a Super IO device that supports keyboard mouse and floppy disk Connect it to Southbridge using Winbond s Generic Bus and Southbridge s LPC Bus Add the PCI Bus Connect it to AMD 8111 Southbridge using both devices PCI Bus 0 Add the Memory Device This will contain the System BIOS image Connect it to AMD 8111 Southbridge device using AMD 8111 LPC Bus and the Memory Device s Generic Bus 6 3 Solo bsd Device Configuration To configure each device right click on the device and choose Configure Device from the workspace popup menu see also Section 7
65. JumpDrive it is created automatically 1 simnow gt jumpdrive importfile c test bin tmp test bin 62 99 Mbytes Available Appendix A 249 AMD Confidential User Manual September 12 2008 1 simnow gt This copies all files from C tmp into the root of the JumpDrive Any subdirectories are also copied 1 simnow gt jumpdrive importdir c tmp Deene Age GS Eeer loam gt Vresti ot 62 89 Mbytes Available This example shows how to import all exe files from C tmp into the root of the JumpDrive 1 simnow gt jumpdrive importdir c tmp exe Importing c tmp appl exe gt appl exe Importing c tmp app2 exe gt app2 exe 62 60 Mbytes Available This example shows how to export the appl ee file from the root of the JumpDrive into C tmp on the host 1 simnow gt jumpdrive exportfile appl exe c tmp Exporting appl exe gt c tmp appl exe To find out what is already stored in the root of the JumpDrive device enter the following 1 simnow gt jumpdrive dir DiLeseeiterca O12 A lt DIR gt tmp 103936 test bin 103916 appl exe 11099316 app2 exe 62 60 Mbytes Available To get information about how much space is left on the JumpDrive device enter the following 1 simnow gt jumpdrive free 62 60 Mbytes Available To save the contents of the JumpDrive to the image file C test img on the host s hard disk enter 1 simnow gt jumpdrive saveimage c t
66. Move the contents of a 16 bit register to a 16 bit destination register or memory operand MOV reg mem32 reg32 89 Jr Move the contents of a 32 pit register to a 32 bit destination register or memory operand MOV reg mem64 reg64 89 Jr Move the contents of a 64 bit register to a 64 bit destination register or memory operand MOV reg8 reg mem8 8A Jr Move the contents of an 8 bit register or memory operand to an 8 bit destination register MOV regl6 reg mem16 8B Jr Move the contents of a 16 bit register or memory operand to a 16 bit destination register MOV reg32 reg mem32 8B Jr Move the contents of a 32 pit register or memory operand to a 32 bit destination register MOV reg64 reg mem64 8B Jr Move the contents of a 64 bit register or memory operand to a 64 bit destination register MOV reg16 32 64 mem16 segReg DC L Move the contents of a segment register to a 16 bit 32 bit or 64 bit destination register or to a 16 bit memory operand MOV segReg reg mem16 8E Jr 16 bit to a of a operand Move the contents register or memory segment register MOV AL moffset8 AO Move 8 bit data at a specified memory offset to the AL register MOV AX moffset16 Al Move 16 bit data at a specified memory offset to the AX register MOV EAX moffset32 Al Move 32 bit data at
67. OF ef Jump short if the 16 bit count Hae Sears E3 cb register CX is zero C Jump short if the 32 bit count Hele E Pa register ECX is zero z Jump short if the 32 bit count JOKA EE EE register RCX is zero e Short jump with the target specified e EB E by an 8 bit signed displacement 4 Appendix A 203 AMD Confidential h User Manual September 12 2008 Instruction Supported Mnemonic Opcode Description e Short jump with the target specified JMP rell6off EQ cw by a 16 bit signed displacement C a Short jump with the target specified JMP rel3zoff E9 cd by a 32 bit signed displacement d S Near jump with the target specified JMP reg mem16 FF 4 reg mem16 ei E Near jump with the target specified JMP reg mem32 FF 4 reg mem32 e S Near jump with the target specified JMP reg mem64 FF 4 reg mem64 e Far jump direct with the target JMP FAR pntrl16 16 EA cd specified by a far pointer contained e in the instruction Far jump direct with the target JMP FAR pntrl16 32 EA cp specified by a far pointer contained e in the instruction S Far jump indirect with the target i SS nee eee SE 5 specified by a far pointer in memory w Far jump indirect with the target ee ER fs specified by a far pointer in memory 4 Load the
68. PCI CONFIG READ Bus 0 Device 1B Function 0 Register 00 ByteCount 04 Data OOOOOOFF 10 Logger Emerald Graphics 0 PCI CONFIG READ Bus 0 Device 1C Function 0 Register 00 ByteCount 04 Data OOOOOOFF 10 Logger Memory Device 0 PCI CONFIG READ Bus 0 Device 1D Function 0 Register 00 ByteCount 04 Data OOOOOOFF 10 Logger PCI Bus 0 PCI CONFIG READ Bus 0 Device 1E Function 0 Register 00 ByteCount 04 Data OOOOOOFF gene EE PCI CONFIG READ Bus D Device 1F Function 0 Register 00 ByteCount 04 Data 000000FF Journal PCI CONFIG READ Bus 0 Device 7 Function 0 Register 43 ByteCount 01 Data 00000030 Journal 2 PCI CONFIG WRITE Bus 0 Device 7 Function 0 Register 43 ByteCount 01 Data 00000080 Jounal PCI CONFIG READ Bus 0 Device 7 Function 0 Register 43 ByteCount 01 Data 00000080 Keyboard Controller 0 PCI CONFIG WRITE Bus 0 Device 7 Function 0 Register 43 ByteCount 01 Data 00000030 Keyboard Controller Scancade Translator 0 PCI CONFIG READ Bus 0 Device 7 Function 0 Register 43 ByteCount 01 Data 00000030 Memory Device 0 PCI CONFIG WRITE Bus 0 Device 7 Function 0 Register 43 ByteCount 01 Data 00000030 PCI Bus 0 SubDevAta 0 Winbond W83627HF SIO 0 Clear Window Save Window Contents PCI CONFIG WRITE Bus Device Function Register 6C ByteCount 04 Data 00000005 Register 70 ByteCount 04 Data 00000000 Register 74 ByteCount 04 Data 00000006
69. POP 9D FLAGS register 4 e Pop a doubleword from the stack into POPED R the EFLAGS register 4 Pop a quadword from the stack into POPFO 9D the RFLAGS register C Gen E Prefetch processor cache line into Ll PREFETCH mem8 OF OD 0 data cache Af Gg Prefetch processor cache line into Ll PREFETCHW MEME om N data cache and mark it modified 4 simi e Move data closer to the processor PREFETCHENTA memg OF 18 0 using the NTA reference 4 ere e Move data closer to the processor Pee ere OF 18 1 using the TO reference C ECH o Move data closer to the processor PREFETCHTL MEME SE using the Tl reference sw Gin a Move data closer to the processor FREER ee ae OF ae fs using the T2 reference 4 Push the contents of a 16 bit PUSH reg mem16 FF 6 register or memory operand onto the Af stack Push the contents of a 22 bit PUSH reg mem32 FF 6 register or memory operand onto the e Stack Push the contents of a 64 bit PUSH reg mem64 FF 6 register or memory operand onto the e stack Push the contents of a 16 bit PUSH foots at SEHR register onto the stack 4 Push the contents of a 32 bit PUSH eee DU vd register onto the stack C Push the contents of a 64 bit EE DU rq register onto the stack e Push an 8 bit immediate value sign PUSH imm8 6A extended to 16 32 or 64 bits onto Af the stack pe L Push a 16 bit immediate value onto PUSH imm16 68 SE e P Push the contents of a 32 bit PU ae Se register onto the stack 4 Push the contents of
70. ROM arrays are cleared Reset initializes the RAM arrays to all ones but does not alter the SPD ROM arrays Configuration options are not affected by reset Contents of a BSD The RAM arrays SPD ROM arrays and all configuration option settings are saved in the BSD Configuration Options Chapter 7 Device Configuration 57 AMD Confidential User Manual September 12 2008 D Dimm Bank 5 Properties Connections 120 Logging Options Dimm 0 Dimm 1 PDL Error Simulation Control C Enable PDL Error Simulation DIF Invert System Management Configuration SMB Base Address a0 General Maximum Number of Dimms 2 Change MaxDimms Figure 7 5 DIMM Bank Options Properties Dialog Figure 7 5 shows the dialog for configuring DIMM bank options The PDL Error Simulation Control section specifies the type of error that the DIMM device will generate when a memory read is attempted and when a Northbridge PDL is set outside the valid response range These settings apply to all four simulated DIMMs If Enable PDL Error Simulation is selected then the DIMM device monitors PDL settings for all RAM reads The OxFF option specifies that the return data should be forced to all ones The Invert option specifies that the return data should be a bitwise inversion of the valid data The SMB Base Address entry selects the 8 bit address that this DIMM device responds to The SMB address is used for the readin
71. SREG Item MC0010113 Data 0000000000000001 gt lt Init Device CPUO Type SREG Item MC0011020 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0011023 Data 0000000000000000 gt lt Init Device CPUO Type APIC Length 1024 gt lt Data Length 16 Value 00000000000000000000000010000400 gt lt Data Length 16 Value 00000000000000000000000000000000 gt lt Data Length 16 Value 00000000000000000000000000000000 gt lt Data Length 16 Value 000000000000000OffffffffffOO00000 gt lt Data Length 16 Value 00000000000000000000000000000000 gt lt Data Length 16 Value 00000000000000000000000000000000 gt lt Data Length 16 Value 00000000000000000000000000000000 gt lt Data Length 16 Value 00000000000000000000000000000000 gt lt Data Length 16 Value 00000000000000000000000000000000 gt lt Data Length 16 Value 00000000000000000000000000000000 gt lt Data Length 16 Value 00000000000000000000000000000000 gt lt Data Length 16 Value 00000000000000000000000000000000 gt lt Data Length 16 Value 00000000000000000000010000000000 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000000000000000000000000000000 gt lt Data Length 16 Value 00000000000000000000000000000000 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00
72. Seconds 00 02 00 0383 80 BIOS and low level Sim Seconds is the 6 70 Sim Seconds 00 00 00 00 87 84 diagnostic software number of seconds of simulated time that 10 8 Avg MIPS Reset Avg 00 00 00 CA 3 ei has past since aj 971 MIPS MIPS are the simulator started instantaneous value of MIPS are the total Sege Sie number of simulated dimension is millions of instructions executed simulated instruction Sieg d eer Eer executed per second of i y host user and system the Hosts Seconds CPU time Figure 3 15 Progress Meter and Diagnostic Ports The simulation counter measures the number of microseconds of simulated time However it is not a performance or cycle based simulator so the simulated time is estimated 3 4 2 CPU Statistics Graphs There are several graphs that can be displayed on the left side of the Main Window These graphs can be activated by the View gt CPU Graphs menu selection 3 4 2 1 Translation Graph The Translation Graph updates once a second Full vertical scale means the address Translation cache tcache is full Dark color on the bottom of the graph represents percent of tcache containing valid translations Lighter color above the dark color represents percent of tcache containing invalidated translations Black color growing from the top represents the meta data that describes the translations Percent of tcache Translation Graph Meta Data that containing describes the Invalidated Trans
73. September 12 2008 Moves the mouse cursor to relative position DeltaX and MouseMove lt DeltaX gt lt DeltaY gt DeltaY MouseLeftDown Generates a left mouse button down event MouseRightDown Generates a right mouse button down event MouseLeftUp Generates a left mouse button up event MouseRightUp Generates a right mouse button up event MouseMoveAbs lt X gt lt Y gt Moves the mouse cursor to absolute x y position Log enableldisable id Enables or disables logging This command injects keyboard input from the command line It takes basic text such as keyboard text Text dd This command can handle more complex sequences with other NV prefixed strings see Table 15 14 Table 15 14 shows the currently defined prefix sequences Prefix Action Prefix Action r lt RETURN gt 8 lt FUNCTION KEY 8 gt t lt TAB gt 9 lt FUNCTION KEY 9 gt lt BACKSLASH gt 10 lt FUNCTION KEY 10 gt Am lt DOUBLE QUOTE gt tab lt TAB gt K lt SINGLE QUOTE gt del lt DELETE gt esc lt ESCAPE gt up lt UP ARROW gt 1 lt FUNCTION KEY 1 gt down lt DOWN ARROW gt 2 lt FUNCTION KEY 2 gt left lt LEFT ARROW gt 3 lt FUNCTION KEY 3 gt right lt RIGHT ARROW gt 4 lt FUNCTION KEY 4 gt ctrl m lt CONTROL make gt
74. Subtract the contents of a 64 bit register or memory operand from a 64 bit destination register 2 EST p AL imm8 ib AND an immediate 8 bit value with the contents of the AL register and set rFLAGS to reflect the result si q EST AX imm16 A9 iw AND an immediate 16 bit value with the contents of the AX register and set rFLAGS to reflect the result q EST EAX imm32 A9 id AND an immediate 32 bit value with the contents of the EAX register and set rFLAGS to reflect the result TESI RAX imm32 AQ id AND a sign extened immediate 32 bit value with the contents of the RAX register and set rFLAGS to reflect the result TEST reg mem8 imm8 F6 0 ib AND an immediate 8 bit value with the contents of an 8 bit register or memory operand and set rFLAGS to reflect the result si 2 EST reg mem16 imm16 F7 0 iw value with register or rFLAGS to AND an immediate 16 bit the contents of a 16 bit memory operand and set reflect the result TEST reg mem32 imm32 F7 0 id value with register or rFLAGS to AND an immediate 32 bit the contents of a 32 bit memory operand and set reflect the result TEST reg mem64 imm32 F7 0 id AND a sign extened immediate 32 bit value with the contents of a 64 bit register or memory operand and set rFLAGS to reflect the result TEST reg mem8 re
75. Translucency Full Alpha Blending Full Texture Mapping Gouraud Shaded Fills ALPHA FOG STENCIL Trapezoids functions Bitblts a Color Patterning 8x8 b Expansion Character Drawing 1 bpp Planar Lines a With Line style b With Depth c Polyline Polysegment using Vector Pseudo DMA Mode Image Load ILOAD a Linear Color Expansion Character Drawing bpp b Loading the Texture Color Palette Loading any accelerator registers through the Pseudo DMA Window ZBuffer Direct Access Procedure when ZBuffer is in AGP Space Table Fog Video Scaler Texture Unit blending Texture Staging Supported 2D Features Bus Mastering PCI AGP Raster Operations 0 D I S D amp S D amp S S D amp S D D S D amp S D amp S D S D DI S S D IS DIS 1 Hardware Clipping Software Hardware Cursor a Three Color Cursor b XGA Cursor c X Windows Cursor d 16 Color Palletized Cursor Bitblts a Two Operand b Transparent Two Operand c With Expansion Character Drawing lbpp Image Load ILOAD a Two operand b With Expansion Character Drawing 1bpp Rectangles Chapter 7 Device Configuration 69 AMD Confidential User Manual September 12 2008 a Patterned Fills b Constant Shaded c Gouraud Shaded partially d Texture Mapping partially e Trapezoids a Constant Shaded e Lines a Auto Lines line open line close b Solid Lines line open line close 8 15 16 24
76. Turning off journaling is recommended during the installation process for an operating system D AMD 8111 1 0 Hub 4 Properties Gg annections 1 0 Logging Logging Device Options Primary HDD Channel lt gt Master Drive Image Filename C en_windows_xp_professional_x64 hdd bed C DVD ROM Eject Slave Drive Image Filename C en_windows_xp_professional_x64 iso kand DVD ROM Figure 7 22 HDD Primary Channel Properties Dialog AMD 8111 Southbridge Device Options The AMD 8111 device has specific configuration requirements that relate to device option type and HyperTransport information The Default Base Unit ID is a way of telling the device of the strapping option for ID selection The Generate HT Messages for Interrupts selection specifies whether interrupts go out the HyperTransport port in a HyperTransport format or out the INT IOAPIC bus as a classic interrupt pin Chapter 7 Device Configuration 89 AMD Confidential User Manual September 12 2008 D AMD 8111 1 0 Hub 4 Properties Connections 10 Logging Logging Device Options Primary HDD Chann gt Default Base Unit ID ID oo ID 01 HyperTransport Generate HyperTransport Messages for Interrupts Figure 7 23 Device Options Properties Dialog AMD 8111 chipset Log Messages The AMD 8111 device produces log messages to the Message Log Window as specified by the options in the Logging Option
77. Type CPU Item XMMOO Data 00000000000000000000000000000000 gt lt Init Device CPUO Type CPU Item XMMO0O Data 00000000000000000000000000000000 gt lt Init Device CPUO Type CPU Item XMMO1 Data 00000000000000000000000000000000 gt lt Init Device CPUO Type CPU Item XMMO0O2 Data 00000000000000000000000000000000 gt lt Init Device CPUO Type CPU Item XMMO3 Data 00000000000000000000000000000000 gt Chapter 7 Device Configuration 115 AMD Confidential User Manual September 12 2008 lt Init Device CPUO Type CPU Item XMM04 Data 00000000000000000000000000000000 gt lt Init Device CPUO Type CPU Item XMMO5 Data 00000000000000000000000000000000 gt lt Init Device CPUO Type CPU Item XMMO6 Data 00000000000000000000000000000000 gt lt Init Device CPUO Type CPU Item XMM0O7 Data 00000000000000000000000000000000 j lt Init Device CPUO Type CPU Item XMM0O8 Data 00000000000000000000000000000000 gt lt Init Device CPUO Type CPU Item XMM0O9 Data 00000000000000000000000000000000 gt lt Init Device CPUO Type CPU Item XMM10 Data 00000000000000000000000000000000 gt lt Init Device CPUO Type CPU Item XMM11 Data 00000000000000000000000000000000 gt lt Init Device CPUO Type CPU Item XMM12 Data 00000000000000000000000000000000 gt lt Init Device CPUO Type CPU Item XMM13 Data 00000000000000000000000
78. blocks you would like created 32 Kbyte blocks are used because non initialized memory is dynamically allocated when addressed in 32 Kbyte chunks The third field is the name of the binary file you use to initialize the memory contents The device initializes memory for the content length of the file If you specify a 512 Kbyte ROM and use a 256 Kbyte image file the first 256 Kbytes are initialized The Init File selection comes with a browse button for easier selection Selecting the Read Only option turns the memory device into a ROM Writes to the device are ignored when the Read Only option is selected Chapter 7 Device Configuration 77 AMD Confidential User Manual September 12 2008 Selecting the System BIOS ROM option tells the memory device it is the system BIOS The memory device only responds to memory address ranges accompanied by a chip select that is generated by the Southbridge device Selecting Flash Mode option tells the memory device that it is configured as a flash memory device There are two command sequences supported by our flash memory device SST and ATMEL which can be selected by the drop down below Selecting the Memory Address Masking option indicates that the address received by the memory device is masked by a bit mask with the same number of bits as the size of the memory device e g a 256 Kbyte ROM uses an 18 bit mask or it is masked by 0x003FFFF This enables the ROM to be remapped dynamically
79. but you can not copy only the 2nd partition LINUX Note The list box always shows dev fd0 and dev fd1 If you click on one of these and the physical device does not actually exist the GUI will hang for a short time and will then display information in the lower list box indicating that a 4Kb media is installed in this device DiskTool only recognizes device names dev hda through dev hdz In addition it looks for the file proc ide hd media and uses the information in that file to determine whether the device is a hard drive or a DVD CD drive If the file does not exist or if its contents cannot be parsed the device will not be listed The buttons on the right side of the DiskTool Window correspond to the four command line options listed above In addition there are About and Exit buttons that perform the obvious function When creating a new blank image or when getting an image from a physical device to an image file an additional dialog is presented that allows you to select how large the new image file should be The options in this dialog mirrors the Image Size options for the equivalent command line commands After launching DiskTool you are presented with the interface shown in Figure 13 2 Chapter 13 DiskTool 159 AMD Confidential User Manual September 12 2008 WW SimNow DiskTool Physical Drives Create Disk Image From Host Disk PHYSICALDRIVEDO C GEI PHYSICALDRIVE1 DI Copy Disk Image To Host Dis
80. button 7 Click OK to close the configuration property sheet and accept the changes If the contents of SPD byte 0 Number of SPD Bytes Used is set to zero the DIMM will not respond to any SMBUS accesses This allows simulation of a DIMM module that does not include an SPD ROM 14 4 Clearing CMOS View the Devices Window and double click on the Southbridge Choose the CMOS tab Save the current CMOS to disk and call it blank cmos Open the file in Notepad and change all the data fields from their current values to the desired fill pattern usually 0x00 or OxFF do not include the h character in the file Save the file These first three steps are needed only once 3 Reload the file into the simulator whenever you wish to clear CMOS 4 View the Diagnostic Port Output in the Main Window as shown in Figure 14 2 N e Diagnostic Ports 00 00 00 00 83 80 00 00 00 00 87 84 00 00 00 DU e3 e0 Figure 14 2 Diagnostics Display The Diagnostic Display displays data written to three I O address ranges 0x80 0x83 0x84 0x87 OxEO0 OxE3 Currently the Diagnostic Display is implemented only for Southbridge device If the system configuration includes a Southbridge device then the Diagnostic Display will be displayed 14 5Logging PCI Configuration Cycles Northbridge devices can be configured to produce PCI configuration cycle log messages Complete the following steps to enable and capture of these log messages 1 Open
81. classify the simulator s MAC addresses By default these values are FA CD but can be configured to avoid collisions with real hardware Table 7 9 Mediator Command Line Switches 7 24 3 MAC Addresses for use with the Adapter The MAC address that the simulated adapter is using determines the level of visibility that the model will have with other simulator sessions and with the real network The mediator routes packets to simulator sessions that have FA CD in the high two bytes of the MAC address The simulator sessions that have anything other than FA CD can only communicate with other simulator sessions in the same process space using a multi machine approach MAC Address beginning with FA CD and having a third byte between 0x00 and 0x20 are classified as absolute Simulated adapters using this class of MAC Address are logically equivalent to plugging a real computer into a real network These sessions can see real network traffic and are visible to all simulator sessions running via the mediator In addition all broadcast traffic including ARP s are routed to this class of MAC addresses Allocations of absolute MAC addresses need to be coordinated such that they are not replicated on the same host subnet MAC addresses beginning with FA CD and having a third byte between 0x21 and 0x80 are Classified as fixed The simulator adapters using this class of MAC address can access the rea
82. com pipe port pipe SimNow Com1 We recommend not starting the kernel debugger too early To achieve best results launch the kernel debugger after the O S kernel has loaded and it is trying to establish a connection with the kernel debugger 11 2GDB Interface Getting the gdb interface in the simulator to work involves a sequence of commands in both the simulator and gdb The current implementation requires the simulator to be started and told to be ready for gdb to connect and then having gdb connect As long as the gdb command target remote is issued last the interface should be established It has been observed that after shutting down the simulator the port used by the gdb interface may not become immediately available for reuse If this happens just shut down both the simualtor and gdb and start again and the problem should go away 11 2 1 Simple Approach This assumes you are running the simulator and gdb on the same machine e Start the simualtor 152 Chapter 11 Debug Interface AMD Confidential User Manual September 12 2008 e Run the following automation command 1 simnow gt shell gdb lt ENTER gt e Start gdb gdb gt set architecture 1386 x86 64 lt ENTER gt gdb gt target remote 2222 lt ENTER gt 11 2 2 Alternate Approach This assumes you are running the simualtor and gdb on the same machine e Start the simulator e Run the following automation comma
83. configured locally to the processor is saved in the BSD Configuration Options The Device Properties Window is used to set various processor identification and behavior options Figure 7 1 shows the Processor Type tab for the AweSim processor device Here you can specify which member of the AMD microprocessor family should be simulated The default is a standard AMD microprocessor See Section A 2 3 Product Files ID on page 185 Note The public release version of the simulator doesn t contain any product files Chapter 7 Device Configuration 51 AMD Confidential User Manual September 12 2008 D AweSim Processor 0 Properties Connections 1 0 Logging Logging Processor Type Current Product name productfile Opteron L1_JH FO_ 800Mbhz id To change please choose from the following product files This Aas the side effect of reselling the BSD Athlon64 754_ SH CO_ 800MHz id Athlon64 S1_SH EO_ 800MHz id Athlon64 754_SH CG_ 800MHz id Opteron 940_JH EO_ 800MHz x2 id Athlon64 754_SH DO_ 800MHz id Opteron 940_SH B3_ 800MHz id Athlon64 754_SH EO_ 800MHz id Opteron 940_SH CO_ 800MHz id Athlon64 939_JH EO_ 800MHz x2 id Opteron 940_SH CG_ 800MHz id Athlon64 939_SH CG_ 800MHz id Opteron 940_SH DO_ 800MHz id Athlon64 939_SH DO_ 800MHz id Opteron 940_SH EO_ 800MHz id Athlon64 939_SH EQ_ 800MH2z id Opteron L1_JH FO_ 800Mhz2 id Auslese CA KA CILLA CORAN N zl a te L3 CL E OOOOk Aas al Fig
84. dialog lists all 256 bytes of data held in the simulated SPD ROM The list box provides a description of each byte index in the ROM If a description is selected the corresponding data byte is displayed in the text box to the right The Import SPD and Export SPD buttons provide the option of loading and saving SPD ROM data The file format is an unformatted binary image with an extension of spd The bottom section of the dialog is used to configure DDR PDL Response ranges for the simulated DIMM PDL response ranges can be individually set for each of 16 PDLs Adjusting the Low and High value modifies the response range for a particular PDL When an appropriate response range is set for one PDL the same range can be applied to all 16 PDLs by clicking on the Match PDLs button The Reset PDLs button sets all 16 PDL response ranges to their maximum range 0 255 Log Messages This device does not produce log messages Difference from Real Hardware The DIMM device does not simulate timing related issues except for PDL error simulation The performance of real DIMM hardware is highly dependent on timing and loading issues ECC simulation is not provided 60 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 7 4 Emerald Graphics Device The Emerald graphics device provides an industry standard PCI AGP VGA compatible video device The device provides a fully functional set of PCI configuration
85. disables 0 analyzer specified by num UnloadAnalyzer lt num gt Unloads analyzer specified by num MCAFault lt bank gt lt GenerateMCAFault 0l1 gt lt Status Reg gt lt Address Reg gt Causes a generic MCA fault if GenerateMCAFault is true 1 at specified Bank AddressReg and status ProductFile lt FileName gt Use product file to set fuses and configure CPU and Northbridge CodeGen lt command gt lt args gt Sets or disables and enables code generator settings and options Command must be one of the commands shown in Table 15 13 Args depends on the command parameter see Table 15 13 DumpProfile lt blocks to dump gt This command is limited to showing a profile of blocks without symbols based on the current epoch For more information please refer to Section A 7 17 1 Profiling in SimNow A 7 17 1 Profiling in SimNow Technology Here is an example use of the profiling command and its output 240 Appendix A AMD Confidential User Manual September 12 2008 1 simnow gt dumpprofile 3 34962861 000000 instructions executed since the last epoch Executed 3571672 times CS D 0 LongBit 0 physical addr 00000000000e41de eip 00000000000041de 00000000000041de cmp 04f0h aah 00000000000041e3 Jaz S OSla 0000000000000000 This block s execution was 20 431234 percent of the total since the last epoch Executed 229430 times CS D 0 LongBit 0 physi
86. ef SETNS reg mem8 OF 99 Set byte if not sign SF 0 ef SETP reg mem8 OF 9A Set byte if parity PF 1 Af SETPE reg mem8 OF 9A Set byte if parity even PF 1 ef SETNP reg mem8 OF 9B Set byte if not parity PF 0 ef SETPO reg mem8 OF 9B Set byte if parity odd PF 0 ef SETL reg mem8 OF 9C Set byte if less SF lt gt OF Af SETNGE reg mem8 OF 9C eg had if not greater or equal SF w SETNL reg mem8 OF 9D Set byte if not less SF OF Af SETGE reg mem8 OF 9D SC byte if greater or equal SF w om Set byte if less or equal ZF 1 or SETLE reg mem8 OF 9E SF lt gt OF Af Ee ies Set byte if not greater ZF 1 or SF SETNG reg mem8 OF 9E lt gt OF e Ei SE Set byte if not less or equal ZF 0 SETNLE reg mem8 OF 9 and SF OF e SETG reg mem8 OF OF eas byte if greater ZF 0 and SF d im i Force strong ordering of serialized SFENCE OPARE Ee store operations e Shift an 8 bit register or memory SHL reg mem8 1 DO 4 location left 1 bit 4 Shift an 8 bit register or memory SHL reg mem8 CL D2 4 location left the number of bits Af specified in the CL register Shift an 8 bit register or memory o location left the number of bits SHL reg mem8 imm8 ER 4 ib specified by an 8 bit immediate C value 7 Shift a 16 bit register or memory SHL reg mem16 1 DEA location left 1 bit 4 Shift a 16 bit register or memory SHL reg mem16 CL D3 4 location left the number of bits ei specified in the CL register Shift a 16 bit re
87. filename gt lt format gt DisplayScreenShot takes a screen shot This command supports multiple displays Index is a number that identifies the desired display An Index of O means that a screen shot from display 0 will be taken Filename is the name of the snapshot file The file name includes the full pathname for the file any valid path drive names C or server names servername can be used If a pathname is not given the current default path is used Format must be one of the formats that GetScreenShotFormats returns e g BMP or PNG GetScreenShotFormats This command gives the list of supported formats that can be used LogConsoleStdErr LogConsoleStdErr reports if stderr logging is currently enabled SetLogConsoleStdErr lt 0 1 gt SetLogConsoleStderr cause console logging to go to stderr 1 or stdout 0 The default is the current behavior of logging to stderr ForceSingleStep lt 0 1 gt Enabled 1 or disables 0 single stepping XTRInstDmpFile lt FileName gt Dumps instruction to file lt FileName gt LoglIO lt device gt lt all gt lt feature gt reset lt 0 E Enables 1 or disables 0 IO logging lt feature gt for lt device gt or lt all gt devices Supported IO logging features are PCI IO IOfpdis MEM MEMfpdis and GETMEMPTR The reset options sets the selected lt feature gt on lt device gt or lt all gt devices to its default
88. groups into one composite device To the user the composite device will look and feel no different than a normal device library and for the most part the two should be indistinguishable A device group can consist of one or more child devices with some optional initialization state associated with each child device and those devices can optionally be connected to each other It may be helpful to think of a device group as a BSD within a BSD However a device group also has its own identity as a device and it can support external connection ports that allow it be connected to other devices in the same manner as a traditional device library 15 1 1 Terms If any of the language and wording used in these Device Groups sections is unclear it may help to refer to this list of terms Device A device library or device group also a known device or created device Device Library Contains binary implementation of device functionality has no child devices associated with az bel Windows or bsl Linux file Device Group Grouping of one or more devices libraries and groups into a single device gets its functionality through aggregation of its children and from its group specific properties aspects associated with a bsg file Known Device A device that the shell knows about i e the shell has all the necessary information to create an instance of this device Known devices appear in the left hand pane of the D
89. image files that are saved by the JumpDrive itself Section A 7 26 JumpDrive on page 250 describes the JumpDrives automation commands Interface The JumpDrive device has an USB interface that can connect to any USB controller e g you can connect the JumpDrive device to the AMD 8111 I O Hub Initialization and Reset State The JumpDrives initialized state is all zero There is no partition table or any other structure defined It is totally blank The default size is 64 Mbytes The JumpDrive is not modified after a reset Contents of a BSD The JumpDrive device saves its entire state including the contents of its memory to the BSD Any data that exists on the JumpDrive device will be restored when the BSD is reloaded Configuration Options Most of the automation commands will return an error if the JumpDrive is plugged into the simulated computer i e if the JumpDrive device is connected to a USB controller The device must be not connected i e unplugged to issue commands that alter the JumpDrive image Chapter 7 Device Configuration 119 AMD Confidential User Manual September 1 2 2008 7 24 E1000 Network Adapter Device The network adapter device models an Intel Pro 1000 MT Desktop Network Adapter The adapter depends heavily on MAC address assignment in order to determine how visible it is to real network resources or other simulator network sessions The adapter model requires a separate mediator proc
90. into different memory address ranges in conjunction with the aforementioned chip select Selecting the Jnitialized unwritten memory to hex option initializes otherwise not initialized memory with a separate field for specifying the byte to use for initialization Selecting the Memory is non cacheable option tells the system if the memory described by the device is non cacheable r S Memory Device 7 Properties Connections L Logging Memory Configuration Base Address ff00000 32k Aligned in hex Size 32 32k Blocks in decimal Init File images MMKA03 9 ROM BS Read Only System BIOS ROM V Flash Mode V Memory Address Masking E Initialized unwritten memory to hex F Memory is non cacheable Figure 7 14 Memory Configuration Properties Dialog 78 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 Difference from Real Hardware The memory device differs in that it is a generic memory model When configured as a BIOS ROM it does not contain flash specific information that a modern flash ROM contains for programming information purposes Chapter 7 Device Configuration 79 AMD Confidential User Manual September 12 2008 7 8 PCA9548 SMB Device The PCA9548 is an 8 channel System Management Bus SMB switch Interface The PCA9548 has one input port and eight output ports as well as a programmable i
91. on page 81 Contents of a BSD The current state of all internal registers and any internal state variables are saved in the BSD Configuration Options The AT24C device can be configure to store an AT24C16A 16Kb AT24C32A 32Kb or AT24C64A 64Kb 2 Wire Bus serial EEPROM D A124C Device 10 Properties Connections 1 0 Logging SMB Config SMB Base Address 0x30 Type AT24C164 AT24C324 AT24C64A Figure 7 31 AT24C Device Configuration Chapter 7 Device Configuration 103 AMD Confidential User Manual September 12 2008 7 20EXDI Server Device This interface and the instructions contained herein applies only to the Windows operating system hosted version of the simulator The simulator provides a special device known as the EXDI Server Device This device can be added to any BSD When a BSD containing the EXDI Server Device is loaded the EXtended Debugging Interface becomes available This allows client debugging software such as CmdeXdi and the Windows kernel debugger to interact with the platform being simulated as if it were a real hardware platform The installation of the simulator should provide all the COM registration hooks that are required If it does not here are the steps to manually register the EXDI server 1 Open a command window run cmd exe Change the current directory to the location where the simulator was installed 3 Execute the command Regsvr32 exdi64ps dll
92. operand Shift bits of a 32 bit destination register or memory operand to the SHLD reg mem32 reg32 imm8 OF A4 r ib SC EE e shifting in bits from the second operand Shift bits of a 32 bit destination register or memory operand to the SHLD reg me326 reg32 CL OF A5 r left the number of bits specified in ef the CL register while shifting in bits from the second operand Shift bits of a 64 bit destination register or memory operand to the SHLD reg mem64 reg64 imm8 OF A4 r ib a eee EE A shifting in bits from the second operand Shift bits of a 64 bit destination register or memory operand to the SHLD reg mem16 reg16 CL OF A5 r left the number of bits specified in Af the CL register while shifting in bits from the second operand Shift an 8 bit register or memory SHR reg mem8 1 DO 5 operand right 1 bit C Shift an 8 bit register or memory SHR reg mem8 CL D2 5 operand right the number of bits A specified in the CL register Shift an 8 bit register or memory e e operand right the number of bits SHR reg mem8 imm8 C0 5 ib specified by an 8 bit immediate Ce value Shift a 16 bit register or memory SHR reg mem16 1 D1 5 operand right 1 bit L Shift a 16 bit register or memory SHR reg mem16 CL D3 5 operand right the number of bits ei specified in the CL register Shift a 16 bit register or memory A operand right the number of bits SHR reg mem16 imm8 GC specified by an 8 bit immediate sf value Shift a 32 bit register or memo
93. page 150 can be used to match any character Command Description Finds the first occurrence of ASCII pattern PCI in the given memory range 0x1000 0x2000 Same as above but finds all occurrence of the ASCII pattern PCI using the none case sensitive search algorithm Finds all occurrences of the binary pattern 0x55 OxAA in the given memory range starting at physical address OxFO000 and ends at OxFOO00 0xFFFF Table 10 6 Find Pattern Example ql 0x1000 L 0x2000 PCI qa noncase 0x1000 L 0x2000 PCI qa OxF0O000 P OxFFFF 0x55 OxAA 10 2 Debugger Command Reference The CPU Debugger Window consists of five areas as shown in Figure 10 1 The top most area displays the current CPU integer registers in 16 32 or 64 bit mode depending on the current mode of the CPU The next area displays a disassembly of the next six instructions starting at the current CS RIE IP The next area displays 128 bytes of memory as bytes words dwords or qwords The address size and physical or virtual attributes are based on the most recent D command The next area is a general message window where messages and information are displayed The bottom area is the command area where debugger commands are entered Chapter 10 CPU Debugger 147 User Manual AMD Confidential September 12 2008 Table 10 7 lists the debugger commands and their definitions Definition Debugger Command Displays an abbrevia
94. purpose register MOVNTI mem32 reg32 OF C3 Jr Stores a 32 it general purpose register value into a 32 bit memory location minimizing cache pollution MOVNTI mem64 reg64 OF C3 Jr Stores a 64 bit general purpose register value into a 64 bit memory location minimizing cache pollution MOVS mem8 mem8 A4 Move byte at DS rSI to ES rDI and then increment or decrement rSI and rDI MOVS mem16 mem16 A5 Move word at DS rSI to ES rDI and then increment or decrement rSI and rDI MOVS mem32 mem32 A5 Move doubleword at DS rSI to ES rDI and then increment or decrement rSI and CDI MOVS mem64 mem64 A5 Move quadword at DS rSI to ES rDI and then increment or decrement rSI and rDI MOVSB A4 Move byte at DS rSI to ES rDI and then increment or decrement rSI and IDL MOVSW A5 Move word at DS rSI to ES rDI and then increment or decrement rSI and rDI MOVSD A5 Move doubleword at DS rSI to ES rDI and then increment or decrement rSI and CDI MOVSQ A5 Move quadword at DS rSI to ES rDI and then increment or decrement rSI and CDI MOVSX regl6 reg mem8 BE Jr Move the contents of an 8 pit register or memory location to a 16 bit register with sign extension MOVSX reg32 reg mem8 BE JE Move the contents of an 8 bit register or memory location to a 32 bit register with sign extension
95. reg mem32 OF 42 r Move if carry CF 1 ei CMOVC reg64 reg mem64 OF 42 r Move if carry CF 1 Af CMOVNAE regl16 reg mem16 OF 42 r Move if not above or equal CF 1 Ff CMOVNAE reg32 reg mem32 OF 42 r Move if not above or equal CF 1 Af CMOVNAE reg64 reg mem64 OF 42 r Move if not above or equal CF 1 e CMOVNB regl6 reg mem16 OF 43 r Move if not below CF 0 Af CMOVNB reg32 reg mem32 OF 43 r Move if not below CF 0 Ff CMOVNB reg64 reg mem64 OF 43 r Move if not below CF 0 Af CMOVNC reg16 reg mem16 OF 43 r Move if not carry CF 0 Ff CMOVNC reg32 reg mem32 OF 43 r Move if not carry CF 0 Af CMOVNC reg64 reg mem64 OF 43 r Move if not carry CF 0 Ff CMOVAE reg16 reg mem16 OF 43 r Move if above or equal CF 0 Af CMOVAE reg32 reg mem32 OF 43 r Move if above or equal CF 0 Af CMOVAE reg64 reg mem64 OF 43 r Move if above or equal CF 0 Ff CMOVZ regl6 reg mem16 OF 44 r Move if zero ZF 1 Ff CMOVZ reg32 reg mem32 OF 44 r Move if zero ZF 1 Af CMOVZ reg64 reg mem64 OF 44 r Move if zero ZF 1 Af CMOVE regl6 reg mem16 OF 44 r Move if equal ZF 1 Af CMOVE reg32 reg mem32 OF 44 r Move if equal ZF 1 Ff CMOVE reg64 reg mem64 OF 44 r Move if equal ZF 1 Af CMOVNZ reg16 reg mem16 OF 45 r Move if not zero ZF 0 ei CMOVNZ reg32 reg mem32 OF 45 r Move if not zero ZF 0 Af 196 Appendix A AMD Confidential
96. simulation definition file click on the Close BSD button l This button is only enabled when a system definition file has been loaded or created earlier Please make sure you save any changes that you make to the system configuration before clicking on the Close BSD button 1 to close the system definition file Otherwise all changes will be lost The Save BSD button lal is only enabled active when a system definition BSD file has been loaded or created To save your current system definition click on the Save BSD button bel or click on the File menu item and select Save BSD To open a system definition file BSD file click on the Open BSD button and select the desired BSD file from the Open File Dialog Window The Open BSD button is only enabled active when no other system definition file has been open yet To create a blank or new system definition file click on the New BSD button 1 This button is disabled when a system definition file has been loaded or created earlier In this case you must close your current system definition file click on the Close BSD button 41 or click on the File menu item and select Close BSD Please make sure you save any changes that have been made to the system definition file before you click on the Close BSD button l Note when closing the BSD file all changes will be lost If you want to modify the current system definition use th
97. tab shown in Figure 7 24 The device can log I O mapped Transactions Memory mapped Transactions and SMI and SCI assertions 90 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 D AMD 8111 1 0 Hub 4 Properties Connections 1 0 Logging Logging Device Options Primary HDD Chann gt Options C Log 10 mapped Transactions C Log Memory mapped Transactions C Log SMI and SCI assertions Figure 7 24 Logging Options Properties Dialog AMD 8111 chipset Differences from Real Hardware The AMD 8111 Southbridge device differs from other devices mainly in those items that deal with real time operation Those items cannot be modeled in the current simulator The model does not include any of the power management registers The functionality of the USB 2 0 controller is also absent PCI registers and memory mapped registers are the only portion present For experimental purposes the AMD 8111 Southbridge device supports an optional IOMMU based on IOMMU spec 1 2 that can be enabled and disabled via the automation command 8 SetIOMMU O 1 The addition of this block to the device model does not reflect any real or planned hardware When enabled the AMD 8111 device s IOMMU PCI registers live in a capability block of the PCI Bridge When enabled the AMD 8111 device s IOMMU delivers interrupts via PCIINTD The AMD 8111 device doesn t support PCI Express This limits the number of distinct reques
98. the contents of a 64 bit register with the contents of 64 bit XADD reg mem64 reg64 OF Cl r destination register or memory e operand and load their sum into the destination Exchange the contents of AX register XCHG AX regl6 90 rw with the contents of a 16 bit ei register Exchange the contents of a 16 bit XCHG reg16 AX 90 rw register with the contents of the AX e register Exchange the contents of EAX register XCHG AX reg32 90 rd with the contents of a 32 bit e register Exchange the contents of a 32 bit XCHG reg32 AX 90 rd register with the contents of the EAX ei register Exchange the contents of RAX register XCHG RAX reg64 90 rq with the contents of a 64 bit e register Exchange the contents of a 64 bit XCHG reg64 RAX 90 rq register with the contents of the RAX ei register Exchange the contents of an 8 bit XCHG reg mem8 reg8 86 Jr register with the contents of an 8 A bit register or memory operand Exchange the contents of an 8 bit XCHG reg8 reg mem8 86 r register or memory operand with the e contents of an 8 bit register Exchange the contents of a 16 bit XCHG reg mem16 reg16 87 Ar register with the contents of a 16 e bit register or memory operand Exchange the contents of a 16 bit XCHG regl6 reg mem16 By Ze register or memory operand with the e contents of a 16 bit register Exchange the contents of a 32 bit XCHG reg mem32 reg32 87 Ar register with the contents of a 32 e bit register or memory operan
99. timer and DMA controller The legacies AT devices have the standard behavior and IO addresses unless otherwise noted Interfaces The Southbridge devices have several connection points Possible connection points include a PCI bus a SMB bus a LPC bus an INT IOAPIC bus for interrupt signaling and ISA and HyperTransport ports depending on the device type The PCI bus acts as a host bus AMD 8111 The SMB connects to devices such as the DIMM or the SMB hub The LPC bus provides connectivity to devices such as Super IO s and BIOS ROMs A HyperTransport port is used for main connectivity for the AMD 8111 device to the reset of the system Initialization and Reset State When first initialized the Southbridge devices are in the default state This is described in detail in the respective datasheets The legacy CMOS sub device initializes to all zeroes When reset a Southbridge device takes on all default register values as above The exception to this is that the CMOS contents remain the same Contents of a BSD The BSD file contains the contents of all registers It also saves the contents of any buffers and states of all internal devices HDD controllers PIT PIC etc When the BSD file is read in all buffers are filled with past data and all states are restored to their saved states Common Configuration Options The USB dialogue window shown in Figure 7 20 gives the user the ability to enable or disable USB ports of the USB contr
100. value 232 Appendix A AMD Confidential User Manual September 12 2008 Automation Command Description GetLogIO lt device gt Returns IO logging status of lt device gt For example GetLogIO USB Jumpdrive returns the following information PCI Disabled IO Disabled 1Ofpdis Enabled MEM Disabled MEM fpdis Enabled GETMEMPTR Disabled Fastpath lt device gt lt all gt lt i m gt Enables the IO lt i gt or MEM lt m gt fastpath for the given lt device gt or lt all gt devices GetFastpath lt device gt all lt i m gt Returns enabled or disabled depending on if fastpath is enabled or disabled for the given lt device gt or all devices The lt i gt option returns the IO fastpath status The lt m gt option returns the MEM fastpath status SetVGAQuantum lt time gt Sets the quantum value for the VGA signature mechanism If the VGA signature matches with any of the preset golden VGA signatures the simulation stops Get VGAQuantum Returns the quantum value for the VGA signature mechanism Generate VGA Signature lt index gt Returns the VGA signature for the present screenshot It is an MD5 sum generated from the contes of the present screen SetGoldenVGASignature lt index gt Sets golden signature s needed for comparision by the VGA signature mechanism EnableVGASignature lt 0 1 gt Enables 1 or disables 0 the VGA signat
101. 0 off lt press go button gt lt wait 5 seconds gt lt press Stop button gt 1 simnow gt ide l image 0 c fc3 x86 64 disc2 iso The serial connection to Microsoft s KLernel Debugger seems to be unstable What can I do See Section 11 1 Kernel Debugger on page 151 How can I obtain the full release version of the simulator See Section 1 Overview on page 1 Why doesn t the OS find a connected USB device The USB port may not be soft enabled For example to soft enable USB port 1 simnow gt usb 0 Port enable 0 180 Chapter 15 Frequently Asked Questions FAQ AMD Confidential User Manual September 12 2008 A Appendix A 1 Format of Floppy and Hard Drive Images The floppy disk format assumes a standard 1 44 Mbyte floppy disk consisting of 80 cylinders 2 heads and eighteen 512 byte sectors per head 36 sectors per cylinder The image file consists simply of each sector starting with the first sector of the first cylinder on the first head and proceeding sequentially through the last sector of the last cylinder on the second head The total size of the image file is identical to the total capacity of a 1 44 Mbyte floppy disk or 1 474 560 bytes The hard disk image is formatted in a similar fashion with the exception that the total number of cylinders heads and sectors per head varies Because of this the hard disk image file contains a 512 byte header before the raw data This 512 byte he
102. 00000000 gt lt Init Device CPUO Type CPU Item FP1 Data 00000000000000000000 gt lt Init Device CPUO Type CPU Item FP2 Data 3ffee6455d0000000000 gt lt Init Device CPUO Type CPU Item FP3 Data 3ffdb139430000000000 gt lt Init Device CPUO Type CPU Item FP4 Data 4005c45c6d0000000000 gt lt Init Device CPUO Type CPU Item FP5 Data 4004ccf8aa0000000000 gt lt Init Device CPUO Type CPU Item FP6 Data 40018ac7100000000000 gt lt Init Device CPUO Type CPU Item FP7 Data 40068d00470000000000 gt lt Init Device CPUO Type SREG Item MC0000081 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0000082 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0000083 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M0000001B Data 00000000FEE00900 gt lt Init Device CPUO Type SREG Item M00000200 Data 0000000000000006 gt lt Init Device CPUO Type SREG Item M00000202 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000204 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000206 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000208 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M0000020A Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M0000020C Data 0000000000000000 gt lt Ini
103. 000000000 gt lt Init Device CPUO Type CPU Item XMM14 Data 00000000000000000000000000000000 gt lt Init Device CPUO Type CPU Item XMM15 Data 00000000000000000000000000000000 gt lt Init Device CPUO Type SREG Item MC0010010 Data 0000000000160601 gt lt Init Device CPUO Type SREG Item MC0010015 Data 000000000A000000 gt lt Init Device CPUO Type SREG Item MC0010016 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0010017 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0010018 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0010019 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC001001A Data 0000000080000000 gt lt Init Device CPUO Type SREG Item MC001001D Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0010030 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0010031 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0010032 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0010033 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0010034 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0010035 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item MC0010112 Data 0000000000000000 gt lt Init Device CPUO Type
104. 00000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Valu
105. 000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt 116 Chapter 7 Device Configuration AMD Confidential User Manual September 1 SA 2008 lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 000001000000010
106. 00x1200 64K Af Table 7 4 Matrox G400 VESA Modes Memory Interface The Matrox G400 supports a total of 32 megabytes of SGRAM SDRAM memory comprised of one or two banks of 8 16 or 32 Mbytes each In Power Graphics Mode the resolution depends on the amount of available memory Table 7 5 shows the memory configuration for each standard VESA resolution in pixel depth Single Frame Buffer Mode Single Z Buffer No Z Z 16 bits Z 32 bits Resolution 8 bit 16 bit 24 bit 32 bit 8 bit 16 bit 32 bit 8 bit 16 bit 32 bit 640x480 8M 8M 8M 8M 8M 8M 8M 8M 8M 8M 720x480 8M 8M 8M 8M 8M 8M 8M 8M 8M 8M 800x600 8M 8M 8M 8M 8M 8M 8M 8M 8M 8M 1024x768 8M 8M 8M 8M 8M 8M 8M 8M 8M 8M 1152x864 8M 8M 8M 8M 8M 8M 8M 8M 8M 8M 1280x1024 8M 8M 8M 8M 8M 8M 8M 8M 8M 10M 1600x1200 8M 8M 8M 8M 8M 8M 16M 16M 16M 16M 1920x1080 8M 8M 8M 8M 8M 8M 16M 16M 16M 16M 1800x1440 8M 8M 8M 16M 8M 16M 16M 16M 16M 16M 1920x1200 8M 8M 8M 8M 8M 8M 16M 16M 16M 16M 2048x1536 8M 8M 16M 16M 16M 16M 32M 16M 32M 32M Table 7 5 Supported Resolutions in Power Graphics Mode Chapter 7 Device Configuration 71 AMD Confidential User Manual September 12 2008 Supported Guest Operating Systems Table 7 6 shows all operating systems which are tested and known to work with the Matr
107. 08 The pipe is not created until the first go command will be executed This can be achieved by clicking on the go button followed by a click on the stop button This command sequence will setup the named pipe If you try to connect the kernel debugger without setting up the named pipe as described the kernel debugger will return an error message In case you have difficulties to establish a connection or the connection is unstable or KD has difficulties to stay in sync with the simulated OS You can set a multiplier to delay the baud rate The baud rate is normally modeled based on the time elapsed on the simulated system The simulated system may be running at 1 100 of normal time which will give longer time delays than the kernel debugger can tolerate Consequently we provide a way to speed up the modeled baud rate by up to 100 times For example to delay the baud rate by 1 100th of normal you would use the following automation command Serial 1 SetMultiplier 1 By default the multiplier is 100 which means the modeled rate is unchanged The user may set it in the range 1 to 100 When set to 1 the modeled rate is 100 times faster than the baud rate so the system delays will be that much shorter See also Section A 7 10 Serial on page 238 The following command will connect the kernel debugger to the simulator using a pipe as communication channel C Program Files Debugging Tools for Windows Gd obir kel k
108. 1 stop bit BAUD can be one of the following values 1200 2400 4800 9600 14400 38400 56000 57600 or 115200 See also Section 11 1 Kernel Debugger on page 151 e none Tells the simulator to discard any written data and always return receiver empty on reads SetMultiplier nMultiplier Use the SetMultiplier automation command to specify the baud rate delay time used to make the serial based communication to Microsoft s kernel debugger in some cases much more stable A valid nMultiplier value must be in the range of nMultiplier gt 1 and nMultiplier lt 100 For example to delay the baud rate by 1 00th of normal you would enter SetMultiplier 1 The default for nMultiplier is 100 GetMultiplier Returns the current value of nMultiplier A 7 11 HyperTransport Technology Configuration 1 simnow gt sledgeldt usage Automation Command Description Link 01112 O11 Enables or disables link 0 1 or 2 For example sledgeldt link O I enables link 0 and sledgeldt link O 0 disables linkO LinkStatus 01112 Returns the link status of link 0 1 or 2 Link Width 01112 8116 Sets link width to 8 or 16 bit of link 0 1 or 2 GetLink Width 01112 Returns link width in bits of link 0 1 or 2 GetConfig Displays LDT configuration LogDMA OIL Enables 1 or disables 0 DMA logging 238 Appendix A AMD Confidential User Manual September 1 oe 2008
109. 1200 16 bit 14Eh 1920x1200 32 bit 14Fh 2048x1536 16 bit 150h 2048x1536 32 bit Table 7 3 Supported Custom VESA Modes Improve Graphics Performance When you run Windows in simulation and you open a menu list box tool tips or other screen element the object may open very slow To disable this option use the following steps 1 Click Start point to Settings and then click Control Panel Double click Display 3 Click Effects clear the Use the following transition effects for menus and tooltips check box click ok and then close Control Panel 64 Chapter 7 Device Configuration AMD Confidential User Manual September 1 g 2008 7 5 Matrox MGA G400 PCIAGP The Matrox G400 graphics device provides a high performance PCI AGP VGA compatible video device The device provides a fully functional set of PCI configuration registers and a 2D drawing engine The AGP interface is currently somewhat minimal and is not capable of generating neither AGP cycles nor AGP specific modes at this time High performance device drivers are available for most operating systems Windows Linux and Solaris The Matrox G400 supports full acceleration of all GDI and DirectDraw functions Figure 7 9 shows the integrated components of the Matrox G400 graphics device Features and components which are currently not supported by the Matrox G400 graphics device model have a O symbol in the following block diagram High Resolution Colo
110. 3 4 2 4 Exception Rate Graph The Exception Rate Graph updates once a second If this value exceeds what can be displayed on this graph the graph line turns red A rate of zero appears as a horizontal line one pixel high Full vertical scale represents a rate of one exception taken by the simulator per ten simulated instructions These exceptions may be internal to the simulator and not turn into exceptions in the simulated machine The lower darker color represents all such exceptions other than segmentation violation SEGV exceptions The upper lighter color represents all the SEGV exceptions This upper lighter color is a minimum of a one pixel high line i e a value of zero SEGV exceptions still shows a one pixel high line of the lighter color Exception Rate Graph All exceptions other than segmentation violations SEGV Exceeded what can be displayed Segmentation violations SEGV Figure 3 19 CPU Exception Rate Graph 3 4 2 5 PIO Rate Graph The PIO Rate Graph updates once a second If the port I O PIO rate exceeds what can be displayed on this graph the graph line turns red A rate of zero will appear as a horizontal line one pixel high Full scale represents one PIO per ten simulated 26 Chapter 3 Graphical User Interface AMD Confidential User Manual September 1 Ka 2008 instructions Darker color on the bottom of the graph represents the read PIO s the lighter color represents the write PIO s Wri
111. 4 OS Distribution e SuSE 9 Pro and newer e RedHat 64Bit Enterprise 3 and above e Fedora Core 2 and newer Recommended SuSE 9 1 or newer for AMD64 Build 1218 or newer Approx 64MB of memory plus Memory Approx 150 MB of memory for each simulated processor plus the amount of simulated RAM Processor AMD Athlon 64 or AMD Opteron 1 Gigabyte of free hard disk space for the simulator and devices plus 3 Gigabytes free space for disk file images 3 5 inch 1 44 MB floppy drive CD ROM Drive Table 2 1 Software and Hardware Requirements Hard Disk Space Other Hardware Running the simulator on a Linux kernel prior to version 2 6 10 may cause the simulator to malfunction The bug is in the 64 bit path only and the symptom is in signals that are not associated with system calls still being treated as system calls as they go back to user space i e in certain cases it tries to restart the system call even when it did not come from a system call Updating the Linux kernel to kernel version 2 6 10 or later resolves this problem The simulator may stress the system more than most applications including the base operating system AMD has received reports that the simulator has caused some systems to crash and in general this has been traced to unstable hardware Hardware instability can also crash applications or operating systems inside the simulator 2 2 Installation Procedure Insert the CD ROM into your sys
112. 5 HDD Primary Channel Properties Dialog AMD 8111 Southbridge 89 Figure 7 26 Device Options Properties Dialog AMD 8111 chipset eee 90 Figure 7 27 Logging Options Properties Dialog AMD 8111 chpset eee 91 Figure 7 28 PCI Bus Properties Dialog sicesisessassvasseiecsavaian Edge dE 93 Figure 7 29 AMD 8131 Device Hot Plug Configuration ccccesceeeeeeeeeeteeeeeeees 94 Figure 7 30 AMD 8132 Device Hot Plug Configuration 0 eceeceeecsseceeeneeeeeeeees 95 Figure 7 31 AMD 8132 Properties Dalog eeeseeeencecesececeeeeeceeceeceseeecstececsteeeenaeees 96 Figure 7 32 AMD 8151 Device Properties Dnalog 98 Figure 7 33 SMB Hub Properties Dialog lt c c2acsewtnsgnd eel eee 102 Figure 7 34 AT24C Device Configuration ccc gees ktadesgtedgfesge eerste Set 103 Figure 7 35 Communication via Mediator 0 eee eeeceeeeeesseeesseeeseceseeeeaeecsaeeneeeseeeeaees 120 Figure 7 36 Multi Machine Communication without a Mediator eee eeeeeeeeeeeee 121 Figure 7 37 Visibility Diagram sac sects cette ee ee sie eee ia ated 125 Figure 7 38 Plug and Play Monitor Device Confgeuraton eeeeseesseceseeeeeeeenees 127 Figure 7 39 ATI SB600 SATA Configuration Dialog cee eeeceeeeceeeeeeeeeeeeeeeeneeeenaes 129 Figure 8 1 PCI Configuration EE 135 Figure 9 1 Message Log ironien a a daha A 138 Figure 9222 Error Loe oaa Sis e a iia A E e A A AE EEEE re aed 139 Fig re 9 3 VO Logging Dilo Zivis ioris irete t eet 140
113. 6 imm16 81 0 iw Add imm16 to reg mem16 e ADD reg mem32 imm32 81 0 id Add imm32 to reg mem32 A ADD reg mem64 imm32 81 0 id Add sign ext imm32 to reg mem64 ei ADD reg mem16 imm8 83 0 ib Add sign ext imm8 to reg mem16 A ADD reg mem32 imm8 83 0 ib Add sign ext imm8 to reg mem32 e ADD reg mem64 imm8 83 0 ib Add sign ext imm8 to reg mem64 e ADD reg mem8 reg8 00 r Add reg8 to reg mem8 ei ADD reg mem16 reg16 01 r Add regl6 to reg mem16 A ADD reg mem32 reg32 DI r Add reg32 to reg mem32 A kel La Appendix A AMD Confidential h User Manual September 12 2008 Instruction SE Mnemonic Opcode Description PP ADD reg mem64 reg64 DI r Add reg64 to reg mem64 e ADD reg8 reg mem8 02 r Add reg mem8 to reg8 e ADD regl16 reg mem16 03 r Add reg mem16 to regl A ADD reg32 reg mem32 03 r Add reg mem32 to reg32 Af ADD reg64 reg mem64 03 r Add reg mem64 to reg64 A AND the contents of AL with an AND AL imm8 24 ib immediate 8 bit value and store the e result in AL AND the contents of AX with an AND AX imm16 25 iw immediate 16 bit value and store the e result in AX AND the contents of EAX with an AND EAX imm32 25 id immediate 32 bit value and store the Ff result in EAX AND the contents of RAX with a sign AND RAX imm32 25 id extended immedia
114. 7 6 Supported Guest Operating Systems ssssssessssesessseeesseeesseesseessessseeessseesseeso 72 Table 7 7 Execution Control Blaegzereien ergeet Zegnge en deiten oct ches bea cacedeed aha nemesensans 112 Table 7 8 Internal Execution Control Flags 2 00 0 eeeeeecesececeseeeceeeeeceeeeeceeeeeeeeeesteeeesaes 113 Table 7 9 Mediator Command Line Switches ccceeescccssececeeececesececeeeeecseeeeesteeeesaes 123 Table 7 10 MAC Address Assignments E 124 Table 7 11 Client Server Simulator Semer 124 Table 7 12 Client Server Simulator Client 1 124 Table 7 13 Isolated Client Server Simulator Server ccccesccecesececeeeeecseeceeeeeeeesaes 124 Table 7 14 Isolated Client Server Simulator Client 1 125 Table 10 1 Debugger Breakpoint Command Examples eeccceesceceeeeceeeeeeeteeeeeees 144 Table 10 2 Debugger Memory Dump Command Examples cccceesseeeseeeeeteeeeeees 146 Table 10 3 Debugger Pacifica Memory Dump Command Examples ssssseseseeeeeee 146 Fable 10 4 ee eege 147 Table 10 5 MSR Write Example sjs secsiasstenicatasaceaasvadjoiecaspacae es sesdaacssunndesouedecetanscsdesadaadent 147 Table 10 6 Find Pattern Beamte sass sagesess SEENEN 147 Table 10 7 Debugger Commands and Definitions 2 00 0 eee eeeeeeceeeeeeneeceeeeneeeeeeeenees 150 Table 15 1 Computer Platform Files Bin 184 Tabl e 15 2 Products E EE 185 Table 15 3 Hard Disk Images inince i 186 Table 15 4 Memory EN 186 Ta
115. 86 interrupts are taken and profiling does not affect the target machine s selection of code paths at all The dumpprofile command by itself causes all profile blocks to be displayed This output can be quite voluminous The user can select just the most frequently executing blocks by using an optional numeric argument For example dumpprofile 10 will dump the ten most frequently executing blocks Blocks are ordered by their frequency of execution not weighted by the number of instructions in a block Therefore a short block executing 100 times will be displayed before a long block executing 99 times In this example the short block represents fewer total instructions executed The sense of time that the simulator uses is quite simple each instruction takes one instruction count with REP instructions taking one extra count per iteration Therefore profiles from the simulator can differ substantially from those obtained from other tools Appendix A 241 AMD Confidential User Manual September 12 2008 The simulator works by translating guest x86 instructions to long mode user mode instructions which it then executes These translated instructions are grouped into blocks called translations These translations exist in a translation buffer which is typically about 64 MB When the translation buffer is full and space for another translation is needed the simulator disposes of the contents of the translation buffer and starts a new ep
116. A gi L i t 1 Figure 3 6 Device group BSD with one machine group and three child devices Any device can also connect to its sibling devices Figure 3 6 does not depict any port connections Figure 3 7 depicts the same example device tree but with a different conceptual view devices are inside groups arrows represent possible port connections between sibling devices 3J J Figure 3 7 Device group different conceptual view devices are inside groups Chapter 3 Graphical User Interface 17 AMD Confidential User Manual September 12 2008 The previous diagrams show child devices inside device groups On the standard top level view the context of inside the machine device we would more simply just see three devices see Figure 3 8 arrows represent possible port connections between the devices ee ng zen Figure 3 8 Device Group 2 group devices 1 library device 3 3 3 Working with Device Groups From the main SimNow window View Show Devices opens a device viewer GUI window for the machine device group We can also open a device viewer GUI window that views any device group s children Right click the device icon and select Modify Group Show Devices from the popup menu If Modify Group Show Devices is not present then the device the user has clicked on is not a group Configure Device Ctrl E Modify Group Show Devices Ctrl M Add Connection Delete
117. A3 r ee SEET ei BT reg mem16 imm8 OF BA 4 ib eee eas The Selected bit to w BT reg mem32 imm8 OF BA 4 ib coe ngs Ene EE te ER w BT reg mem64 imm8 OF BA 4 ib Ge E Selected Dit to A Copy the value of the selected bit to BTC mem mem16 reg16 OF BB r the carry flag and then complement ei the selected bit Copy the value of the selected bit to BTC mem mem32 reg32 OF BB r the carry flag and then complement D the selected bit Copy the value of the selected bit to BTC mem mem64 reg64 OF BB r the carry flag and then complement Af the selected bit Copy the value of the selected bit to BTC reg mem16 imm8 OF BA 7 ib the carry flag and then complement e the selected bit Copy the value of the selected bit to BTC reg mem32 imm8 OF BA 7 ib the carry flag and then complement ei the selected bit Copy the value of the selected bit to BTC reg mem64 imm8 OF BA 7 ib the carry flag and then complement ei the selected bit Copy the value of the selected bit to BTR reg mem16 reg16 OF B r the carry flag and then clear the Af selected bit Copy the value of the selected bit to BTR reg mem32 reg32 OF B3 r the carry flag and then clear the Af selected bit Copy the value of the selected bit to BTR reg mem64 reg64 OF B r the carry flag and then clear the Af selected bit Copy the value of the selected bit to BTR reg mem16 imm8 OF BA 6 ib the carry flag and then clear the Af selected bit Copy the value of the selected bit to
118. AMD AMD SimNow Simulator 4 4 4 User s Manual Revision Date 2 00 September 2008 Advanced Micro Devices Inc One AMD Place Sunnyvale CA 94088 simnow amd com AMDO 2004 2008 Advanced Micro Devices Inc The Contents of this document are provided in connection with Advanced Micro Devices Inc AMD products AMD makes no representations or watranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice No license whether express implied arising by estoppels or otherwise to any intellectual property rights is granted by this publication Except as set forth in AMD s Standard Terms and Conditions of Sale AMD assumes no liability whatsoever and disclaims any express or implied warranty relating to its products including but not limited to the implied warranty of merchantability fitness for a particular purpose or infringement of any intellectual property right AMD s products are not designed intended authorized or warranted for use as components in systems intended for surgical implant into the body or in other applications intended to support or sustain life or in any other application in which the failure of AMD s product could create a situation where personal injury death or severe property or environmental damage may occur AMD reserves
119. AMD Athlon64 1 939 CG Ki Athlon64 939_SH D0O_ 800MHz id AMD Athlon64 1 939 DO Ki Athlon64 939_SH EO_ 800MHz id AMD Athlon64 1 939 EU Ki Athlon64 AM2_JH F2G_ 800MHz x2 id AMD Athlon64 2 AM2 F2G Af Athlon64 AM2_JH FO_ 800MHz id AMD Athlon64 1 AM2 FO e Athlon64 S 1_JH F2G_ 800MHz x2 id AMD Athlon64 2 S1 F2G ei Athlon64 S 1_SH FO_ 800MHz id AMD Athlon64 1 S1 FO Af Opteron 940_JH EO_ 800MHz x2 id AMD Opteron 2 940 EO Ei Opteron 940_SH B3_ 800MHz id AMD Opteron 1 940 B3 AS Opteron 940_SH C0_ 800MHz id AMD Opteron 1 940 CO x Opteron 940_SH CG_ 800MHz id AMD Opteron 1 940 CG x Opteron 940_SH D0_ 800MH72 id AMD Opteron 1 940 DO AS Opteron 940_SH E0_ 800MHz id AMD Opteron 1 940 EO AS Opteron L1_JH FO_ 800Mhz x2 id AMD Opteron 2 Ll FO A Opteron L1_JH F2G_ 800Mhz x2 id AMD Opteron 2 LI F2G Af Opteron L1_SH F0O_ 800Mhz id AMD Opteron 1 LI FO ei Family 10hDR L1_A0 id Family 10h 4 L1 AO Ff Family10hDR L1_BO id Family 10h 4 L1 BO Af Family 10hDR L1_C0 id Family 10h 4 L1 CU Af Family10hDR AM2_BO0 id Family 10h 4 AM2 BO e Family 1OhBL AM3_C2A id Family 10h 4 AM3 C2A e Familyl10hHY G3M_DOA id Family 10h 12 or 8 G34 DOA Af Familyl1OhHY G3S_DOA id Family 10h 6 or 4 G34 DOA Af Family10hHY L1_DOA id Family 10h 6 L1 DOA w Family11h S1_A0 id Family 11h 2 S1 AO ei Family11h S1_B0 id Family 11h 2 S1 BO e Table 15 2 Product Files A 2 4 Image Files HDD FDD ROM SPD BIN An image file is an exact representation of
120. Buses To view the PCI Config Viewer Dialog select the View Show PCI Config Viewer entry from the Main Window menu To scan a PCI bus you must first load a bsd file that contains a CPU device The dialog should look like the one shown in Figure 8 1 8 2 Modifying the PCI Configuration contents To modify the PCI configuration registers of a specific PCI device select a device listed in the PCI Config Viewers list box The PCI Config Viewer shows the contents of all PCI configuration registers of the selected device To modify a certain byte of a PCI configuration register click on the desired hex value and enter a new hex value To apply the changes click on the Apply Register Modifications button Read only bits cannot be modified using the PCI Config Viewer Modified values appear in red in the PCI configuration register list until you click on the Apply Register Modifications button or close the PCI Config Viewer dialog To change the byte view of the PCI configuration registers to a dword view check the DWORD PCI Access check box 136 Chapter 8 PCI Configuration Viewer AMD Confidential User Manual September 12 2008 9 Logging The simulator provides support for three types of logging e A message log that can provide detailed text data from simulator devices and modules e An error log that provides text messages in response to critical errors or unexpected conditions e I O Logging that provid
121. CPUO Type CPU Item LDTLimit Data 000000000000FFFF gt lt Init Device CPUO Type CPU Item LDTFlags Data 00000000 gt lt Init Device CPUO Type CPU Item TR Data 00000028 gt lt Init Device CPUO Type CPU Item TSSBase Data 0000000080042000 gt lt Init Device CPUO Type CPU Item TSSLimit Data 00000000000020AB gt lt Init Device CPUO Type CPU Item TSSFlags Data 00000089 gt lt Init Device CPUO Type CPU Item IDTBase Data 000000008003F400 gt lt Init Device CPUO Type CPU Item IDTLimit Data 00000000000007FF gt lt Init Device CPUO Type CPU Item GDTBase Data 000000008003F000 gt lt Init Device CPUO Type CPU Item GDTLimit Data O00000000000003FF gt lt Init Device CPUO Type CPU Item DRO Data 0000000000000000 gt lt Init Device CPUO Type CPU Item DR1 Data 0000000000000000 gt lt Init Device CPUO Type CPU Item DR2 Data 0000000000000000 gt lt Init Device CPUO Type CPU Item DR3 Data 0000000000000000 gt lt Init Device CPUO Type CPU Item DR6 Data 00000000FFFFOFF0 gt lt Init Device CPUO Type CPU Item DR7 Data 0000000000000400 gt lt Init Device CPUO Type CPU Item CRO Data 0000000080010031 gt lt Init Device CPUO Type CPU Item CR2 Data 000000000000000C gt lt Init Device CPUO Type CPU Item CR3 Data 000000000043D000 gt lt Init Device CPUO Type CPU Item CR4
122. Configuration AMD Confidential User Manual September 12 2008 7 15PCI X Test Device This PCI X Test Device model provides a simulation of a generic PCI X device Its main purpose is to provide BIOS programmers with a tool to test the PCI X configuration cycle This device is implemented as a single function device Interface The interface varies from system to system In the AMD Athlon 64 or AMD Opteron processor based system configurations it can be connected to AMD 8131 PCI X or AMD 8111 Southbridge devices Initialization and Reset State At creation and reset states the PCI X device registers have the default hard coded values By default the PCI X device is set to have no I O memory space and interrupt capability The PCI X device has a default Device ID and Vendor ID At reset the device configuration does not change and the values from the device configuration will be eventually read into the PCI X registers when the configured system is restarted Contents of a BSD PCI X register and interrupt signals are saved in the BSD Differences from Real Hardware This is a generic PCI X device It doesn t have real a memory buffer and I O buffer For memory and I O space transaction if the transaction belongs to this device s memory or I O address range the PCI X device simply outputs a message to the Log Window which identifies its memory or I O cycle Interrupt can be de asserted by doing an I O transaction Interrupts can a
123. CreatedDevices gt Machine 1 4 core Node 0 4 core Node 1 1 simnow gt shell createddevices gt Machine 1 gt 4 core Node 0 Cpu 0 AweSim Processor 0 KS AweSim Processor 1 ez 2 AweSim Processor 2 Goer AweSim Processor 3 sledgenb 0 AMD 8th Generation Integrated Northbridge 4 1 simnow gt shell createddevices gt Machine 1 gt 4 core Node 1 Cpu 4 AweSim Processor 0 enz AweSim Processor 1 Cows 6 AweSim Processor 2 Cous 7 AweSim Processor 3 sledgenb 1 AMD 8th Generation Integrated Northbridge 4 1 simnow gt shell modules Siess shell 0 Cours O sledgeldt 0 sledgenb 1 sledgenb 0 Cpu ES PER Cows 3 sledgeldt 1 Cpu 4 Cows 5 E EES CpGuz Notice the shell modules list is flat but the devices are in a tree structure that allows us to have both a gt Machine 1 gt 4 core Node 0 gt AweSim Processor 0 Chapter 3 Graphical User Interface 19 AMD Confidential User Manual September 12 2008 and a gt Machine 1 gt 4 core Node 1 gt AweSim Processor 0 Also notice that our default view ignores the tree and just shows us two devices 4 core Node 0 and 4 core Node 1 3 3 4 2 Enabled vs Disabled vs Mixed tr Shell device commands like shell Location or shell AddDevice have generic meanings regardless of whether the device is a group or library But some are defined from an aggregation of the
124. Description AAA 37 Create an unpacked BCD number ef AAD D5 Adjust two BCD digits in AL and AH ef AAM D4 e of unpacked BCD values A Ss 3 tie fontente Of tie Aa EE S ADC AL imm8 14 ib Add imm8 to AL CF A ADC AL imm16 14 iw Add imm16 to AX CF A ADC EAX imm32 15 id Add imm32 to EAX CF ei ADC DAN imm32 15 id Add sign ext imm32 to RAX CF A ADC reg mem8 imm8 80 2 ab Add imm8 to reg mem8 CF A ADC reg mem16 imm16 81 2 iw Add imm16 to reg mem16 CF A ADC reg mem32 imm32 81 2 id Add imm32 to reg mem32 CF A ADC reg mem64 imm32 81 2 id aa sign ext imm32 to reg mem64 w ADC reg mem16 imm8 83 2 ib Add sign ext imm8 to reg mem16 CF e ADC reg mem32 imm8 83 2 ib Add sign ext imm8 to reg mem32 CF A ADC reg mem64 imm8 83 2 ib Add sign ext imm8 to reg mem64 CF A ADC reg mem8 reg8 0 r Add reg8 to reg mem8 CF e ADC reg mem16 reg16 IL Ce Add reg16 to reg mem16 CF A ADC reg mem32 reg32 1 Ar Add reg32 to reg mem32 CF A ADC reg mem64 reg64 Re Add reg64 to reg mem64 CF ei ADC reg8 reg mem8 2 r Add reg mem8 to reg8 CF A ADC regl16 reg mem16 3 r Add reg mem16 to reg16 CF A ADC reg32 reg mem32 3 r Add reg mem32 to reg32 CF A ADC reg64 reg mem64 Be AE Add reg mem64 to reg64 CF e ADD AL imm8 04 ib Add imm8 to AL e ADD AX imm16 05 iw Add imm16 to AX A ADD EAX imm32 05 id ADD imm32 to EAX A ADD RAX imm64 05 id ADD imm64 to RAX WZ ADD reg mem8 imm8 80 0 ib Add imm8 to reg mem8 e ADD reg mem1
125. Device Configuration on page 49 L Configure the Matrox Millenium G400 Graphics Device e Goto its Configuration tab e Choose the BIOS file Images g400_897 21 bin Configure the Memory device e Goto its Memory Configuration tab Set the base address to fffcO000 Set the Size to 8 Set the Init File to Images ASLAO00 3 BIN Check the boxes for Read Only System BIOS ROM Memory Address Masking Memory is non cacheable e Clear the boxes for Initialized unwritten memory Configure the PCI device e Goto its PCI Bus Configuration tab e For the PCI Slot 1 add device ID 4 set Base IRQ Pin to PCIIRQ A and check the Enable Slot box e For the next three devices use Device IDs 5 6 and 7 with PCURQs B C and D in that order Check their Enable Slot boxes as well Chapter 6 Create a Simulated Computer 47 AMD Confidential User Manual September 12 2008 B Pci Bus 6 Properties cea aay PO Bus Conipaston Wi Device ID 0 31 Base IRQ Pin Enable Slot PCI Slot 1 4 PCIIRGA w K PCI Slot 2 PCIIRQ B w K PCI Slot 3 PCIIROC ze K K PCI Slot 4 PCIIRQ D ze PCI Slot 5 v b i PCI Slot 6 Figure 6 3 PCI Bus Configuration dialog window 4 Configure the DIMM Memory device e Goto the Dimm 0 tab e Click Import SPD e Open the SPD file Images simnow_DDR_256M spd 5 Configure the AweSim CPU device e Goto the Processor Type t
126. Device Configuration AMD Confidential User Manual September 1 KG 2008 Mode Number Type Organization Resolution No of colors Supported 0x0108 VGA 80x60 Text 640x480 16 Ki 0x0109 VGA 132x25 Text 1056x400 16 Ei 0x010A VGA 132x43 Text 1056x350 16 e 0x010B VGA 132x50 Text 1056x400 16 Ki 0x010C VGA 132x60 Text 1056x480 16 0x0100 SVGA Packed pixel 8 bpp 640x400 256 Af 0x0101 SVGA Packed pixel 8 bpp 640x480 256 Af 0x0110 SVGA Packed pixel 16 bpp 640x480 32K Af 0x0111 SVGA Packed pixel 16 bpp 640x480 64K Af 0x0112 SVGA Packed pixel 16 bpp 640x480 16 ei 0x0102 SVGA ulti plane 4 bpp 800x600 16 Ki 0x0103 SVGA Packed pixel 8 bpp 800x600 256 Af 0x0113 SVGA Packed pixel 16 bpp 800x600 32K Af 0x0114 SVGA Packed pixel 16 bpp 800x600 64K Af 0x0115 SVGA Packed pixel 32 bpp 800x600 16 Af 0x0105 SVGA Packed pixel 8 bpp 1024x768 256 Af 0x0116 SVGA Packed pixel 16 bpp 1024x768 32K Af 0x0117 SVGA Packed pixel 16 bpp 1024x768 64K Jy 0x0118 SVGA Packed pixel 32 bpp 1024x768 16 e 0x0107 SVGA Packed pixel 8 bpp 1280x1024 256 ef 0x0119 SVGA Packed pixel 16 bpp 1280x1024 32K Af OxO11A SVGA Packed pixel 16 bpp 1280x1024 64K Af 0x011B SVGA Packed pixel 32 bpp 1280x1024 16 A Ox011c svGA Packed pixel 8 bpp 1600x1200 256 e 0x011D SVGA Packed pixel 16 bpp 1600x1200 32K Af OxO011E SVGA Packed pixel 16 bpp 16
127. E probe sector and a raw image of data from the hard disk if the raw data is cut off before the end of the disk the disk image from there on will just read as Zero e IDEDVD ROM The simulator does not simulate DVD ROM insert events e DVD ROM disk image is a flat file of the raw image of a data DVD CD ROM These correspond exactly to ISO file images for example e IDE DVD ROM direct access e Floppy Disk e Floppy disk image a flat file of the raw image of a floppy disk e Floppy direct access Please refer to Section 13 DiskTool on page 157 to find out how to set up a Windows or Linux hard drive image for the simulator 4 1 Creating A Blank Hard Drive Image To create a hard drive image use DiskTool You can start DiskTool by launching disktool exe in your install directory For convenience you can create a desktop shortcut to launch DiskTool When you run DiskTool you will see the DiskTool dialog Chapter 4 Disk Images 31 AMD Confidential User Manual September 12 2008 window as shown in Figure 4 1 It will also open a shell window as shown in Figure 4 2 that is used to inform the user about all physical drives which DiskTool has detected E SimNow DiskTool Physical Drives Create Disk Image From Host Disk H PHYSICALDRIVEO C G F r PHYSICALDRIVE1 DI Copy Disk Image To Host Disk PHYSICALDRIVE2 E Create Blank Disk Image Drive Information Erase Host Disk
128. ESC and ALT F4 menu items on the Special Keyboard menu All user button definitions are stored in the UserButtons section Each user button definition is defined by a single line This example defines one user button BUTTONO The string to the left of the equal sign is the path including the file name of the icon that will be placed in the toolbar menu To the right of the equal sign is the string that represents the automation command please refer to Section A 7 Automation Chapter 2 Installation 5 AMD Confidential User Manual September 12 2008 Commands on page 230 that will be executes when the user clicks on the defined user button Note that minimal parsing of the text is done so it is important that no spaces exist around the separating comma 2 6 Updates and Questions Please refer to the Release Notes located at SimNow docs to obtain the latest information about the simulator If you have any question regarding the simulator please refer to Section 15 Frequently Asked Questions FAQ on page 169 or contact your AMD account representative Appendixes are provided that describe e Format of Floppy and Hard Drive Images page 183 Bill of Material page 184 Supported Guest Operating Systems page 186 CPUID page 188 Known Issues page 190 Instruction Reference page 192 Automation Commands page 230 6 Chapter 2 Installation AMD Confidential User Manual September 12 2008
129. F DeliveryMode 07 Level F TriggerMode F Vector 00 Destination 00 gt lt Event Device CPUO Type PIN ICount 326462 Name INTR Level D gt lt Event Device CPUO Type INTACK ICount 326462 Vector 00000000000000d1 gt lt Event Device CPUO Type IOW ICount 326532 Address 70 Size 1 gt Data Length 1 Value 0c gt lt Event gt lt Event Device CPUO Type IOR Count 326536 Address 71 Size 1 gt lt Data Length 1 Value cO gt lt Event gt lt Event Device CPUO Type IOW ICount 326541 Address 70 Size 1 gt Data Length 1 Value 0c gt lt Event gt lt Event Device CPUO Type IOR ICount 326545 Address 71 Size 1 gt lt Data Length 1 Value 00 gt lt Event gt lt Event Device XTR Type EOT ICount 400967 gt lt AmdEventTrace gt 118 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 7 23 JumpDrive Device The purpose of the JumpDrive device is to allow easy import and export of data between a host system and a simulation environment You can import files from the host system on to the JumpDrive where they will be accessible by the simulated operating system Data can also be exported from the JumpDrive back to the host system after the simulation ended The image file used by the JumpDrive is very different from any other image files that the simulator supports The only image files that can be loaded are those
130. Figure 10 1 CPU Debugger Window isccssisicasasicccasscaseiecasoascnsrsecdcasacashades tescdevsnecoanteastcas 143 Figure 13 1 Disk Tool Shell e LE 159 Figure 13 2 DiskT ol GUI WindOW iosi e RA A eee 160 Figure 13 3 DiskTool Drive Information sseesseseseseesessesesesressesererressersresressessresreeseeee 160 Figure 13 4 DiskTool Progress Window seesseesseseeeseesessesesesresseseresressesnresresserseesreeseeee 161 Figure 14 1 Memory Configurator eege ee eege 164 Figure 14 2 Diagnostics Display esesssesesesesesessesseseresresseseresresseserestessesstestesserseesreeseeee 165 Figure 14 3 Message Log Window TEE 166 Figure 15 1 Console WUEREN 230 Figures AMD Confidential User Manual September 12 2008 Tables Table 1 1 Feature Overview Public Release versus Full Release A 2 Table 2 1 Software and Hardware Reourements 3 Table 3 1 Cheetah er aer Devices isrener gs dee eege E e saensieoaahedecnkenrs 15 Table 3 2 Device Window Quick Reterence 15 Table3 37 KE 28 Table 5 1 Command Line Argument 36 Table 5 2 Newmachine Command Arguments cescccsecceceeeecseececeeceecsneeeesteeeenaeees 42 Table 7 1 Supported Eeer 50 Table 7 2 Supported Standard VESA Moleggeeeedteertegr eege 63 Table 7 3 Supported Custom VESA Mode cececssscecssceeseeceessccecssccecsscceesseceesseees 64 Table 7 4 Matrox G400 VESA Modes AA 71 Table 7 5 Supported Resolutions in Power Graphics Mode 71 Table
131. Groups on page 3 3 Interface AMD Istanbul Device has several connection ports It has 4 HyperTransport links split to form 8 sub links Each sub link can connect to a coherent HyperTransport device such as another AMD Istanbul Device or a non Coherent HyperTransport device such as AMD amp 131 PCI X Controller These ports are mutually exclusive and should be connected to only one other device AMD Istanbul Device also exposes two DRAM channel interfaces DCTO and DCT1 to interface with system memory Contents of a BSD See the following sections Section 7 1 AweSim Processor Device on page 51 Section 7 10 AMD 8th Generation Integrated Northbridge Device on page 82 Configuration Options See the following sections Section 3 3 Working with Device Groups on page 18 Section 7 1 AweSim Processor Device on page 51 Section 7 10 AMD 8th Generation Integrated Northbridge Device on page 82 Log Messages See the following sections Section 7 1 AweSim Processor Device on page 51 Section 7 10 AMD 8th Generation Integrated Northbridge Device on page 82 Difference from Real Hardware See the following sections Section 7 1 AweSim Processor Device on page 51 Section 7 10 AMD 8th Generation Integrated Northbridge Device on page 82 Chapter 7 Device Configuration 131 AMD Confidential User Manual September 12 2008 7 29
132. I X Configuration Cycle n se 97 U BD ste eech LEE 55 Usage Command cassssccsssssssssanssessnarsesessnses 231 Enable Error Simulation sesesececeeecerererern 58 User Defined Keys 5 Error Simulation Control 58 EE IG EE 60 V EE KE N E EE 61 65 EE Virtual Address Space wo cece eeseesecsseeereeees 4 Playon a pieedei dons E AE eines 7 PnP Monor EE 126 Ww TDC es oo aya Ret ee tae 126 Winbond W83627HE 74 NEE e Eet 126 Work 10 Ee 24 ae ace Ce a 256 Index AMD Confidential September 12 2008 User Manual X Recordi ebe EEENREN NEESS ee 107 ee ee 106 an Pee Be ine hee NEE IOR PAAA a Sa a a ee 257 Index
133. L register nput a word from the port at the N AX DX ED address specified by the DX register e and put it into the AX register nput a doubleword from the port at e the address specified by the EDX H BAX EDX ED register and put it into the EAX C register 7 ncrement the contents of an 8 bit NC reg mem8 FE 0 register or memory location by 1 C erer ncrement the contents of a 16 bit NC reg memi6 P 0 register or memory location by 1 A GE ncrement the contents of a 32 bit NC reg mem32 F 0 register or memory location by 1 4 a ncrement the contents of a 64 bit NC reg mem64 P 0 register or memory location by 1 A ncrement the contents of a 16 bit NC regl6 40 rw register by 1 Ff ncrement the contents of a 32 bit NC reg32 40 rd ER e nput a byte from the port specified by Dx put it into the memor NS mem8 DX se location specified in ES rDI and sf then increment or decrement CDI nput a word from the port specified by DX put it into the memory INS Rene DX SR location specified in ES rDI and sf then increment or decrement CDI nput a doubleword from the port specified by DX put it into the INS mema2 DX sD memory location specified in ES rDI v and then increment or decrement CDI nput a byte from the port specified by Dx put it into the memory INS on location specified in ES rDI and C then increment or decrement CDI nput a word from the port specified by DX put it into the memory INOW oR location sp
134. ModeFlags Data 00000001 gt The upper 32 bit of ModeFlags must contain Execution Control flags Please refer to Section 7 22 3 ModeFlags on page 112 for more information lt Init Device CPU0 Type SREG Item TSC Data 0000000000000000 gt The initialization information for MSRs Note that initialization information for TSC will be ignored Please use M00000010 for writes to TSC lt Init Device CPU0 Type APIC Length 1024 gt 110 Chapter 7 Device Configuration AMD Confidential User Manual September 1 ge 2008 lt Init gt APIC initialization information lt INSTR Device CPU0 Type FJMP ICount 6778 JMP 1 RIP f86b0619 gt An FJMP Instruction RIP is optional and is only used to double check whether if the FJMP is taken at the correct instruction JMP attribute can have the following values JMP 0 Force Do not take jump for this instruction JMP 1 Force Take jump for this instruction lt Event Device CPU0 Type IOW ICount 6817 Address a038 Size 2 gt lt Data Length 2 Value 40af gt lt Event gt Defines an IOR or IOW dormant event lt Event Device CPU0 Type DMAW ICount 8403 Address 000000000c 254340 Length 64 gt lt Data Length 64 Value 6d00005f5e5bc3909ac04600b7c04600d4c04600eec0460008c1460022c146003cc146 002fc2460067c2460085c24600a3c24600909090909090909090909090 gt lt Event gt Defines a DMAW event lt Event Device CPU0 Type PIN ICoun
135. Now Instruction Sei 227 A 6 8 Prescott New Josee Ee Ee 227 A 6 8 1 MONITOR Setup Monitor Address 228 A 6 8 2 MW AIT Monitor Walt eenegen 229 A 7 Automation Commands 1253 Eege Dee Eege ee 230 A 7 1 Eeer 231 A 7 2 LIRE 235 A 7 3 Ee 236 A 7 4 CMOS asec tins en cia ae Ale Sins ss ncaa eT a ee 237 A 7 5 EE ee re e ee ege a 237 A 7 6 e 237 A 7 7 RE 237 A 7 8 AMD 15 17M GP Ee TE 238 A 7 9 VGA EE 238 ATIO ee ien tele Mee ates aja 238 A 7 11 HyperTransport Technology Configuration 00 cece eeeeeeeeeereeeeeee 240 A 7 12 SIb Generation N ge EE 241 BITS WD BC eege ees 241 AGIA AMD 81I RE 241 ALAIS PEHO gate E EET ek 242 E E Jounal EE 242 E KEE EE E 242 A 7 17 1 Profiling in SimNow Technolog 242 A 7 17 2 CPU Code Generator Commands n nssoseesssseeesseeeessereesseseesssseeee 244 ATTS eelere ee 244 A 7 19 Matrox MGA G400 Grapnbcs eeeeeceseeeeesececeeeeecseeeeceeeeeceteeeeeeeeees 245 A720 PETS ee Geer E R E 245 E DT Le WEE 245 P22 MO Eege dees 246 ATF Radi r a a a a a a aS 247 A724 DIMM RE 248 A 7 25 Keyboard and Mouse eege deet Eed Ee H 249 POP 26 tte ee eeng 250 Bah 2 UE OOO EE 253 ee KT 253 A 7 29 ATI SB400 SB600 SB700 ae eege ba ae eee ine 254 E NN REN 254 ATIE POI EE 255 A 7 32 ATI RD790 RD780 RX780 vccsssessecsassecssdessieaddavsaccdlasnsetioarevinedussdeaetnanvesss 255 A 7 33 ATI RDSOOS IRDSOOIRIDIHOSIRXNNU 255 Indek pran n n a E R R E A A E E E E E 257 Contents vii AMD Confidential
136. PU Debugger on page 143 Log Messages This device does not create log messages 54 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 7 3 DIMM Device The DIMM device provides a simulation model of an array of up to four dual inline memory modules DIMMs The model provides RAM storage and serial presence detect SPD ROM access for each DIMM Bytes 0 5 13 and 31 zero based of the SPD data are used to configure the DIMM model The remaining SPD entries are available for BIOS probing but are not used to configure the DIMM model The RAM array for each DIMM is sized based on parameters contained in the SPD array SPD array bytes 5 and 31 are used to calculate the size of the DIMM s RAM array If byte 0 in the SPD array has a value of zero then the DIMM device does not respond to any SMBUS read attempts on the module This indicates to the reading device that an SPD ROM is not available on the DIMM module By appropriately setting bytes 5 and 31 and clearing byte 0 the model simulates a valid DIMM that contains no SPD ROM Dual data rate DDR DIMMs use bidirectional data strobe signals to latch data on transfers The Northbridge device contains Programmable Delay Lines PDLs that are used to delay the Data Qualification Signal DQS signals so that the edges are centered on the valid data window BIOS algorithms are used to locate the valid data window and adjust the PDLs accordingly Phy
137. ROM and floppy can be created in custom sizes with the DiskTool program Section 13 DiskTool on page 157 that is provided with the simulator A simulation can be saved at any point in the simulation to a media file from which the simulation can be re run at a later time A simple diagnostic port model known as Port80 device displays values written by the BIOS in a pane of the simulator s main window Other panes display guest simulated machine and simulator host processor times The simulator requires several files to be specified Binary files containing the BIOS and disk images are stored in the images directory The simulator home directory stores bsd files which contain the configuration of the system how models are connected together and their settings and the logical state of all the devices in the simulator When starting a simulation from reset the bsd file is rather small and only contains the configuration information When the simulation starts the simulated memory is allocated When the simulation is halted and Chapter 1 Overview 1 AMD Confidential User Manual September 12 2008 saved the bsd file will have grown significantly slightly larger than the size of simulated memory The graphics device supplied with the simulator is a 2D and 3D graphics card with linear frame buffer and DirectX 6 support AMD currently plans to provide a graphics model with the simulator which will als
138. S development memory parameter tuning and multi processor system simulation Section 2 1 System Requirements on page 3 describes supported host Operating Systems Section A 3 Supported Guest Operating Systems on page 186 describes supported guest Operating Systems The simulator has between a 10 1 and 100 1 slowdown rate from the host CPU depending on whether the workload is in the CPU core or accessing simulated devices intensively The simulator is designed to create an accurate model of a system from the program s view Device models contain all the program visible state but the actual functionality is abstracted In many cases only the functionality needed to satisfy the software is implemented Software may be run on the simulator in an unmodified form This includes BIOS drivers O S and applications The simulator has a concept of time but it is not a cycle accurate simulator The basic timing mechanism is an instruction all instructions execute in the same amount of time and are one tick in length This tick time is scaled and used by the rest of the system Long latency events like disk or floppy access have some minimum latency built in because we found legacy software that relied on the physical latency of these peripherals The simulator contains all the classic pieces of a PC system CPU memory Northbridge Southbridge display IDE drives floppy keyboard and mouse support Images hard disk DVD CD
139. SF ZF AF PF and CF flags LAHE 2E into the AH register 4 LDS reg16 mem16 16 c5 Ar Load DS regl6 with a far pointer from w memory LDS reg32 mem16 32 65 fr Load DS reg32 with a far pointer from w memory LES reg16 mem16 16 C4 r Load ES regl6 with a far pointer from w memory LES reg32 mem16 32 C4 r Load ES reg32 with a far pointer from w memory LFS reg16 mem16 16 OF B4 r Load FS regl6 with a far pointer from A memory LFS reg32 mem16 32 OF B4 r Load FS reg32 with a far pointer from w memory LGS reg16 mem16 16 OF B5 r Load GS regl16 with a far pointer from A memory LGS reg32 mem16 32 OF BS r Load GS reg32 with a far pointer from w memory LSS reg16 mem16 16 OF B2 r Load SS regl6 with a far pointer from w memory LSS reg32 mem16 32 OF B2 r Load SS reg32 with a far pointer from w memory ri Store effective address in a 16 bit LEA regl6 mem 8D r EEN e 7 Store effective address in a 32 bit LEA reg32 mem 8D r GE e e Store effective address in a 64 bit LEA reg64 mem 8D r See e E Set the stack pointer SP to the value D E in the BP register and pop BP amp Set the stack pointer ESP to the LEAVE c9 value in the EBP register and pop amp EBP Set the stack pointer RSP to the LEAVE cg value in the RBP register and pop RBP LFENCE OF AE E8 Force strong ordering of serialize A load operations Load byte at DS rSI into AL and then LODS memg AG increment or decrement rsSI 4 Load word at
140. U Item CSLimit Data OOOOOOOOFFFFFFFF gt lt Init Device CPUO Type CPU Item CSFlags Data 00000C9B gt lt Init Device CPUO Type CPU Item SS Data 00000010 gt lt Init Device CPUO Type CPU Item SSBase Data 0000000000000000 gt lt Init Device CPUO Type CPU Item SSLimit Data OQOOOOOOOFFFFFFFF gt lt Init Device CPUO Type CPU Item SSFlags Data 00000C93 gt lt Init Device CPUO Type CPU Item DS Data 00000023 gt lt Init Device CPUO Type CPU Item DSBase Data 0000000000000000 gt lt Init Device CPUO Type CPU Item DSLimit Data OOOOOOOOFFFFFFFF gt lt Init Device CPUO Type CPU Item DSFlags Data O00000CF3 gt lt Init Device CPUO Type CPU Item FS Data 00000038 gt lt Init Device CPUO Type CPU Item FSBase Data 000000007FFDEOOO gt lt Init Device CPUO Type CPU Item FSLimit Data 0000000000000FFF gt lt Init Device CPUO Type CPU Item FSFlags Data 000004F3 gt lt Init Device CPUO Type CPU Item GS Data 00000000 gt lt Init Device CPUO Type CPU Item GSBase Data 0000000000000000 gt lt Init Device CPUO Type CPU Item GSLimit Data 000000000000FFFF gt lt Init Device CPUO Type CPU Item GSFlags Data 00000000 gt lt Init Device CPUO Type CPU Item LDTR Data 00000000 gt lt Init Device CPUO Type CPU Item LDTBase Data 0000000000000000 gt lt Init Device
141. VZX reg64 reg mem16 B7 r Move the contents register or memory o of a 16 bit perand to a 64 bit register wit h zero extension MUL reg mem8 Fe 4 Multiplies an S bit memory operand by the the AX register register or contents of the AL register and stores the result in MUL reg mem16 F7 4 Multiplies a L6 bit memory operand by the the DX AX register register or contents of the AX register and stores the result in MUL reg mem32 F7 4 Multiplies a 32 bit memory operand by the FAX register and store the EDX EAX register register or contents of the s the result in MUL reg mem64 F7 4 Multiplies a 64 bit memory operand by the RAX register and store the RDX RAX register register or contents of the s the result in NEG reg mem8 F6 3 Performs a tow s compl on an 8 bit operand regist Lement negation er or memory NEG reg mem16 F7 3 Performs a tow s compl on a 16 bit operand regist lement negation er or memory NEG reg mem32 F7 3 Performs a tow s compl on a 32 bit operand regist lement negation er or memory NEG reg mem64 E7 3 Performs a tow s compl on a 64 bit operand regist lement negation er or memory NOP 90 Performs no operation NOT reg mem8 F6 2 Com
142. WAIT Monitor Wait Opcode Instruction Description OF 01 C9 MWAIT Monitor Wait The simulator does not recognize this instruction Therefore the simulator generates an invalid opcode exception Appendix A 227 AMD Confidential User Manual September 12 2008 A 7 Automation Commands The simulator can be controlled externally through a scripting interface by issuing automation commands These commands are directed toward either the shell or toward any device that is part of the currently loaded BSD Automation commands are plain ASCII text and are sent to the simulator s automation interface The method for sending automation commands to the interface and for retrieving the response is host dependent on the host OS Figure 15 1 shows the simulators Console Window The Console Window is the user interface to the simulators automation interface All automation commands can be send from the Console Window to the simulators automation interface as explained in the following sections C SimNow simnow exe Using image path Images Using library path devices 1 simnow gt Opening C SimNow solo bsd info creating device 6 Debugger creating device AweSim Processor creating device AMD 8151 AGP Tunnel creating device AMD 8th Generation Integrated Northbridge creating device AMD 8111 170 Hub creating device Dimm Bank creating device PCI Bus
143. a 64 bit PUNE as d register onto the stack A PUSH CS OE Push the CS selector onto the stack A PUSH SS 16 Push the SS selector onto the stack A PUSH DS 1E Push the DS selector onto the stack A PUSH ES 06 Push the ES selector onto the stack A PUSH FS OF AO Push the FS selector onto the stack A PUSH GS OF A8 Push the GS selector onto the stack A PUSHF 9C Push the FLAGS word onto the stack A PUSHFD 9C Push the EFLAGS word onto the stack A PUSHFQ 9C Push the RFLAGS word onto the stack ei Rotate the 9 bits consisting of the RCL reg mem8 1 DO 2 carry flag and an 8 bit register or ef memory location left 1 bit Rotate the 9 bits consisting of the carry flag and an 8 bit register or RCL reg mem8 CL Bete memory location left the number of C bits specified in the CL register Appendix A 209 AMD Confidential User Manual September 1 ER 2008 Instruction s ted Mnemonic Opcode Description PROLE Rotate the 9 bits consisting of the carry flag and an 8 bit register or RCL reg mem8 imm8 CD 2 ib memory location left the number of D bits specified by an 8 bit immediate value Rotate the 17 bits consisting of the RCL reg mem16 1 DI 2 carry flag and a 16 bit register or e memory location left 1 bit Rotate the 17 bits consisting of the carry flag and a 16 bit register or RCL reg memi6 CL D3 2 memory location left the nu
144. a media including the contents and the logical format A 2 4 1 Hard Disk Image Files Table 15 3 shows hard disk image files present in the simulator These images can be found in the simulators image folder see Section 2 3 Directory Structure and Executable on page 4 Appendix A 183 User Manual AMD Confidential September 12 2008 File name Description Bare 4gig hdd 4 GB bare hard disk image Bare 8gig hdd 8 GB bare hard disk image Table 15 3 Hard Disk Images A 2 4 2 Memory SPD Files When a computer is booted started serial presence detect SPD is information stored in an electrically erasable programmable read only memory EEPROM chip on memory module that tells the BIOS the memory module s size data width and speed The BIOS uses this information to configure the memory properly for maximum reliability and performance File name Description Present in Public Release simnow_DDR_32M spd 32MB DDR memory simnow_DDR_64M spd 64MB DDR memory simnow_DDR_128M spd 128MB DDR memory simnow_DDR_256M spd 256MB DDR memory simnow_DDR_512M spd 512MB DDR memory simnow_DDR_1G spd 1024MB DDR memory simnow_DDR_2G spd 2048MB DDR memory simnow_DDR_4G spd 4096MB DDR memory simnow_DDR_32M_Reg spd 32MB registered DDR memory simnow_DDR_64M_Reg spd 64MB registered DDR memory simnow_DDR_128M_Re
145. a specified memory offset to the EAX register MOV RAX moffset64 Al Move 64 bit data at a specified memory offset to the RAX register MOV moffset8 AL A2 Move the contents of the AL register to an 8 bit memory offset MOV moffset16 AX A3 Move the contents of the AX register to a 16 bit memory offset MOV moffset32 EAX A3 Move the contents of the EAX register to a 32 bit memory offset MOV moffset64 RAX A3 Move the contents of the RAX register to a 64 bit memory offset MOV reg8 imm8 BO rb Move an 8 bit immediate value into an 8 bit register MOV reg16 imm16 B8 rw Move a 16 bit immediate value into a 16 bit register MOV reg32 imm32 B8 rd Move a 32 bit immediate value into a 32 bit register MOV reg64 imm64 B8 trg Move a 64 bit immediate value into a 64 bit register MOV reg mem8 imm8 C6 0 Move an 8 bit immediate value to an 8 bit register or memory operand MOV reg mem16 imm16 C7 0 Move a 16 bit immediate value to a 16 bit register or memory operand MOV reg mem32 imm32 C7 0 Move a 32 bit immediate value to a 32 bit register or memory operand MOV reg mem64 imm64 C7 0 Move a 64 bit immediate value to a 64 bit register or memory operand MOVD xmm reg mem32 66 OF 6E r Move 32 bit value from a general purpose register or 32 bit memory locat
146. ab e Choose the Ahtlon64 754_SH CO_ 8OOMHz id product file as shown in Figure 7 1 on page 52 6 4 Save and Run The created simulated computer is identical to the solo bsd computer You can close the Device Window and save the file from the File Save BSD or by clicking on the EI button All that remains is to set up disk images see Section 4 1 Creating A Blank Hard Drive Image on page 31 Section 5 2 1 Assigning Disk Images on page 38 and Section 13 DiskTool on page 157 and run the simulation 48 Chapter 6 Create a Simulated Computer AMD Confidential User Manual September 1 g 2008 7 Device Configuration Each section in this chapter provides a description of how to configure device models in the simulator s Device Properties window These device models include the CPU CPU debugger Northbridge DIMM memory modules AMD graphics device Southbridge Super IO memory device PCA9548 and PCA9556 SMB PCI bus AMD 8131 PCLX device PCI X test device AMD 8132 PCI X device Raid device SMB Hub device EXDI server and the USB keyboard and mouse devices These sections should be considered as a reference for how to configure a device model and are not intended to document how to use the model within the simulator The full release version of the simulator ships with more devices then the public release version Table 7 1 gives an overview of supported devices depending on the simula
147. adDQSTiming LoByte Figure 7 19 Northbridge DDR2 Training Properties Dialog When the DDR2 DRAM Controller is selected and DDR2 DRAM is being used you can manually modify these values to verify the correctness of the DDR2 training algorithmn The DDR2 Training Properties Dialog contains the lowest and highest values that the BIOS can program into these registers While these registers are programmed out of bounds DRAM access will be corrupted Note the DDR2 Training Properties Dialog is only useful for BIOS developer and the values should only be modified and used by BIOS developers Log Messages If Log PCI Configuration Cycles is selected the device produces log messages whenever the PCI configuration data register OxCFC is accessed Log files can get very large Reads from this I O mapped register produce PCI CONFIG READ messages and writes to the register produce PCI CONFIG WRITE messages The formats of the PCI CONFIG READ and PCI CONFIG WRITE messages are as follows PCI CONFIG READ Bus a Device b Function c Register d Data e PCI CONFIG WRITE Bus a Device b Function c Register d Data e where a b c d and e are all hexadecimal numbers 84 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 The data value e is always one byte two hex digits in width The device will log multiple messages for PCI configuration accesses that are greater than one byte in width For example a d
148. ader is identical to the information provided by the drive in response to the ATA command IDENTIFY Following the 512 byte header is the data for each sector from the device As with the floppy the data starts with the first sector of the first cylinder on the first head Unlike floppies however the image file may end before the last sector of the last cylinder on the last head If an attempt is made by the simulator to access data on the drive image that is beyond the end of the available data but still within the bounds defined by the geometry of the device the simulator will extend the image file dynamically The BSD file contains the contents of all Viper Plus registers It also saves the contents of any buffers and the states of all internal devices HDD controllers PIT PIC etc When the BSD file is read in all buffers are filled with past data and all states are restored to their saved states The symbol files that the debugger uses are in a simple text format Each line contains an address length and symbol name Any line that starts with a semicolon is considered a comment Following is a sample file SimNow Debugger Symbol File Format Address Length Symbolic Name 004011 0 Sie main 00401la3c 0 GetModuleHandleA 4 00401a42 0 _GetCommandLineA 0 The address value may be an absolute address or a module relative address For the latter case the load address may be specified when the symbols are loaded into the debugg
149. age 77 How do I change the amount of system RAM installed in a BSD See Section 7 3 DIMM Device on page 55 How do I change the processor type of a processor in a BSD See Section 7 1 AweSim Processor Device Configuration Options on page 51 How do I enable or disable IDE Hard Disk image journaling See Section 5 2 1 Assigning Disk Image on page 38 or A 7 2 IDE on page 235 Why does Windows Server 2003 crash See Section A 3 Supported Guest Operating Systems on page 187 DiskTool displays an Operation failed message box See Section 13 2 GUI Mode on page 158 Why doesn t the simulator work on Linux kernels prior to version 2 6 10 See Section 2 1 System Requirements on page 3 Why is the graphics performance in simulation so slow See Section 7 4 Emerald Graphics Device Improve Graphics Performance on page 64 Chapter 15 Frequently Asked Questions FAQ 179 AMD Confidential User Manual September 12 2008 Why doesn t the simulated Operating System correctly recognize the DVD CD after I changed the DVD CD image When changing DVD CD images clear the old image allow the simulation to run for a couple of seconds and then set the new image This gives the Operating System a chance to see that the DVD CD ROM is not ready and it more correctly detects that the DVD CD image has changed For example lt press Stop button gt 1 simnow gt ide l image
150. ah Ip bad 5 1 1 Open a Simulation Definition File Click on 7 and select one of the bsd files located in the SimNow directory The bsd files contain pre configured simulation definitions designed to model a specific AMD processor based computer system For this example load the cheetah_Ip bsd file from in the SimNow directory Upon loading the BSD file the Main Window shown in Figure 5 2 will be filled with three sections The left column contains informational graphs if selected see Section 3 4 2 CPU Statistics Graphs on page 25 the top row contains numeric displays of simulation statistics and disk drive access information and the remainder contains the Simulation Display Area of the simulated machine The Simulation Display Area remains blank until the simulated machine is started 36 Chapter 5 Running the Simulator AMD Confidential User Manual September 12 2008 Menu Bar Tool Bar Main Window Numeric Display Components lt 1 AMD SimNow Main Window File Weu Special Keyboard Help a A oga Graphs amp Numeric Display s A Simulator Stats IDE Primary Display IDE Secondary Display Diagnostic Ports Floppy Display 0 Host Seconds 0 master read D masterread O00 00 00 00 83 80 0 read 0 Sim Seconds D master written D master written 00 00 00 00 87 84 D written 0 Avg MIPS D slave read Oslaveread 00 00 00 00 e3 e0 T MIPS 0 slave written 0 slave written Translation Graph mode m
151. ains the interface using some of the most often used simulation components Please also see the walkthrough of building a single processor system in Section 6 Create a Simulated Computer on page 45 Represents Device Message Routing D SimNow Device Window Drag Icons to insert new devices C Show Deprecated Devices AMD gag MD 8111 70 Hub AweSimProcessor fe AMD 8132 PCI X Controller Debugger W AT24C Device E Processor PB dinm Bank Hi Intel R Pro 1000 MT Desktop Network Adapter Ka Emerald Graphics USB isp JumpDrive t gt G Memory Device wm PCA9548 Device a PCI Bus d AMD 8th Generation Integrated Northbridge PCI Bus 10 AMD 8132 PCS Controfer 9 Winbond W83627HF SIO 5 PCI Bus 7 Intel R Pro 1000 MT Desktop Network Adapter 16 Memory Device 4 USB Emerald Graphics gt USB JumpDrive 15 we j a PCA9548 Device 13 we AT24C Device 14 W SMB Hub Device SMB gr Winbond W83627HF SIO Device List Workspace Figure 3 2 Device Window Chapter 3 Graphical User Interface 9 System Configuration AMD Confidential User Manual September 12 2008 The Device Window shown in Figure 3 2 with the cheetahI_p bsd computer simulation loaded graphically depicts a simulated computer system In the simulator a computer system is defined as a collection of device models that communicate with each other by exchanging messages The icons in th
152. al User Manual September 12 2008 9 2 Error Log The simulator provides an interface that loaded modules may use to report critical errors or unexpected conditions The messages are always written to a file and the most recent messages may be displayed in a window The error log may not be disabled The most recent error log entries may be viewed by selecting the View Error Log entry from the Main Window menu shown in Figure 9 2 The error log file is enabled by checking the Log to File check box in the Message log dialog Figure 9 2 and setting a filename for the error log This file is created or truncated to zero length if it already exists and opened whenever a BSD file is opened or anew BSD is created The error log is closed whenever the BSD is closed x 1 SimNow Error Log Log to File eo log eg 100 Buffer Size in Kbytes cisc cpu cpp CPracessor GenerateException shutdown due to triple fault Fatal error reached stopping Simulation Error message s follow Bailing out NOTE Simulation cannot be restarted until a reset is asserted Simulation state CAN be inspected with the SimNow debugger Clear Window Save Window Contents Figure 9 2 Error Log Chapter 9 Logging 139 AMD Confidential User Manual September 12 2008 9 3 LO Logging This is a generic feature available on all devices for logging slave accesses i e accesses responded to by this device Several
153. any data read from or written to the simulated serial ports is made available to the host machine The serial ports can each be configured to do this using either a named pipe or the actual serial port hardware The automation commands GetCommPort and SetCommPort are used for this purpose see Section A 7 10 Serial on page 238 Use the serial ports SetCommPort command to set the simulated serial port to use a specific COM port For example to set the second serial port in the simulation to use COM64 for its communication you would type Serial 1 SetCommPort COM4 57600 The simulator will program the appropriate COM port COM4 in the above example to 57600 baud 8 bits no parity 1 stop bit no flow control All characters transmitted by the simulation through the serial port second serial port in the above example will be sent out to the given COM port COM4 in the above example In the same manner all data received by the simulator through the given COM port COM4 in the above example will appear as received data in the simulated COM port To set the simulated serial port COM1 to use a named pipe you would type Serial 1 SetCommPort pipe The simulator will program the appropriate COM port COM1 in the above example to use the named pipe pipe SimNow Com on the host to transfer data between host and the simulated machine Chapter 11 Debug Interface 151 AMD Confidential User Manual September 12 20
154. apter 7 Device Configuration AMD Confidential User Manual September 12 2008 7 18SMB Hub Device The SMB hub device is used to connect one SMBus to any of four SMBus branches The device is programmed via read byte and write byte commands on the SMBus where the 7 bit address field is 0x18 The SMB hub device models the combination of two physical devices manufactured by Philips Semiconductors the PCA9516 5 channel rC hub and the PCA9556 Octal SMBus and I C registered interface In the simulator s device model the two devices are configurable via GPIO x enables segment x as shown in Figure 7 30 Interface The SMB hub has five SMBus interfaces SMBO can be connected within the SMB hub to any of the four other SMBuses SMB 1 3 Typically SMBO is connected to a SMBus connection on a Southbridge device and the other SMBus ports are connected to other devices in the system Initialization and Reset State When first initialized or reset the SMB hub registers are set to their default state The internal registers and their default states are described in the PCA9556 data sheet Contents of a BSD The current state of all internal registers and any internal state variables are saved in the BSD Configuration Options The SMB Hub device allows you to enable up to eight GPIO segments GPIOO GPIO7 to connect SMB devices to SMB hub device as shown in Figure 7 30 Chapter 7 Device Configuration 101 AMD Confidential Use
155. ard Disk and Floppy Display The IDE Primary byte counts IDE Secondary byte counts and Floppy disk byte counts displays appear when a Southbridge device is added to the workspace Chapter 3 Graphical User Interface 27 AMD Confidential User Manual September 1 E 2008 IDE Primary Display IDE Secondary Display Floppy Display 82 500 096 master read 0 master read 465 read 4 545 536 master written D master written 165 written 0 slave read 0 slave read 0 slave written 0 slave written DMA PIO mode PIO PIO mode Figure 3 22 Primary Secondary and Floppy Displays When a disk is accessed in simulation the status information is updated 3 4 5 Using Hard Drive DVD CD ROM and Floppy Images Section 4 on page 31 describes how to create disk images To use a disk image created by DiskTool go to the Main Window File Menu and choose one of the Set Image menu items This brings up an open file dialog Select your drive image and click on Ok Standard file extensions for disk images are shown in Table 3 3 Image Type File Extension Hard Drive Image hdd Floppy Drive Image fdd DVD CD ROM Image iso Generic Image img Table 3 3 Image Types After an image is selected any changes to the image are stored in journal form in the BSD file unless journaling is disabled in the Southbridge for hard drive images or SuperlO for floppy drive images device If journaling is disable
156. are accessed D Winbond W83627HF SIO 47 Properties Connections 1 0 Logging Super I0 Device Breakpoints C PNP Lock Unlock Registers C Read Device Registers C Write Device Registers Floppy Data File Floppy B Data File o Figure 7 13 Super IO Properties Dialog Winbond W83627HF Chapter 7 Device Configuration 75 AMD Confidential User Manual September 12 2008 Floppy Configuration Options The floppy is capable of reading disk images of real floppies created with the DiskTool Utility described in Section 13 on page 157 To use an image first create an image file with DiskTool and then specify the floppy image file in the Super I O configuration dialog page Difference from Real Hardware Keyboard Mouse Floppy COM1 and COM2 differ from real hardware Baud rate parity and stop bits are ignored Communication is always available Baud rate timing is approximate Modem status and line status always show the device is ready The default values of the control registers are read writable or read only as defined by the appropriate Super IO specification 76 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 7 7 Memory Device The memory device enables you to add memory devices to the system You can configure the memory device for emulation of ROM or dynamic memory You specify the total memory size and the beginning address to which the
157. ate value with CME ene SE the contents of the AL register A y i Compare a 16 bit immediate value with CMP AX AMMI 6 aD ew the contents of the AX register C P Compare a 32 bit immediate value with CMP BAX imm opad the contents of the EAX register C 4 Compare a 32 bit immediate value with OME Eat amiss one the contents of the RAX register we Compare an 8 bit value with the CMP reg mem8 imm8 80 7 ib contents of an 8 bit register or e memory operand Compare a 16 bit value with the CMP reg mem16 imm16 81 7 iw contents of a 16 bit register or e memory operand Compare a 32 bit value with the CMP reg mem32 imm32 81 7 id contents of a 32 bit register or e memory operand Compare a 32 bit signed immediate CMP reg mem64 imm32 81 7 id value with the contents of a 64 bit Af register or memory operand Compare an 8 bit signed immediate CMP reg mem16 imm8 83 7 ib value with the contents of a 16 bit e register or memory operand Compare an 8 bit signed immediate CMP reg mem32 imm8 83 7 id value with the contents of a 32 bit ei register or memory operand Compare an 8 bit signed immediate CMP reg mem64 imm8 83 7 id value with the contents of a 64 bit e register or memory operand Compare the contents of an 8 bit CMP reg mem8 reg8 38 Jr register or memory operand with the ef contents of an 8 bit register Compare the contents of a 16 bit CMP reg mem16 reg16 39 r register or memory operand with the Ff contents of a 16 bit registe
158. atures in XP now click bere To take the tour later click All Programs on the Start menu wal then click Accessories 12 14PM Simulator status 2D Engine Simulation Display Color Space Area Figure 3 1 Main Window In Simulation 3 1 Tool Bar Buttons The Tool Bar shown in Figure 3 1 contains up to eleven control buttons The simulation can be started by clicking on the Play button SA The simulation can be stopped by clicking on the Stop button LS 1 To reset the entire simulator stop the simulation first by clicking on the Stop button and then click on the Reset button 1 Chapter 3 Graphical User Interface 7 AMD Confidential User Manual September 1 E 2008 The power management Soft Power button Q and Soft Sleep button 21 are available only on simulated systems that have an Advanced Configuration and Power Interface ACPI BIOS Clicking on the Soft Power button puts the simulated system in a very low power consumption mode The working context can be restored if it is stored on nonvolatile media The simulated system appears to be off Clicking on the Soft Sleep button simulates a power consumption reduction The power consumption is reduced to one of several levels depending on how the system is to be used The lower the level of power consumption the more time it takes the system to return to the working state To close a previously loaded system
159. ber of the AMD 8151 AGP device value must be between 1 and 255 Gets the internal Chip revision number of the AMD 8151 AGP SetRev lt Rev gt GetRev device A 7 9 VGA 1 simnow gt vga usage Automation Command Description Bios lt filename gt Loads the specified BIOS file GetBios Returns the active BIOS file name VGA O0I1 1 enables the VGA 0 disables it GetVGA Returns current status of the VGA registers true if enabled and false if disabled GetConfig Displays VGA configuration A 7 10 Serial 1 simnow gt serial usage Previous versions of the simulator always used only the named pipe format Because of this the named pipe was created as soon as the BSD was loaded Because the new version allows you to dynamically alter the communications method the transport is not created until you hit go for the first time or after making any change to the transport method What this means is that if you are using a named pipe you will have to press go before the named pipe is actually created 236 Appendix A User Manual AMD Confidential September 12 2008 Automation Command Description SetLoopback 011 0 disables loop back 1 enables loop back GetLoopback Returns true if loop back is enabled otherwise it returns false Returns information regarding how the simulated serial port is configured The result will be either e pipe SimNow COMn This indicates tha
160. ble 15 5 Supported Guest Operating Systems ssssssssessesssessseseesseessressesseesseeesseee 187 Table 15 6 CPUID Standard Feature vmmplementaton 189 Table 15 7 CPUID Extended Feature mmplementaton 189 Table 15 8 General Purpose Instruction Retference eee eeseesceeeeeereeseseceseeeeeeeenees 223 Table 15 9 System Instruction Reterence cee cceesecesceceseeeceeeeecseeeeceeeeecsseeeeseeeesaes 225 Table 15 10 3DNow Instruction Reference sssnnseesseessenssessseeeseeesstessersseesseeesseee 227 Table 15 11 Extension to 3DNow Instruction Reference 0 0 00 eeeeceeeeceeeeeeeeeeteeeeees 227 Table 15 12 Prescott New Instruction Reference ssssssessesesesssesessseessresseesseesseresseee 228 Table 15 13 CodeGen Command Overview s hccsiss ccssstesesastvnssvesaactebes deasdeccazedyhesnpaetonsats 244 Table 15 14 Prefix Sequences kevboard text 250 Tables xi User Manual AMD Confidential September 12 2008 Figures AMD Confidential User Manual September 12 2008 1 Overview The AMD SimNow simulator is an AMD64 technology compatible x86 platform simulator for AMD s family of processors It is designed to provide an accurate model of a computer system from the program OS and programmer s point of view It allows fast simulation of an entire computer system plus standard debugging features such as break pointing memory viewing and single stepping The simulator allows such work as BIOS and O
161. cal addr 000000000002fd99 eip 000000000000Fd99 000000000000 FA99 lodsb ds esi 000000000000fdqd9b add ah al 000000000000Fd9d loop 04h 0000000000000020 This block s execution was 1 968632 percent of the total since the last epoch Executed 178599 times CS D 0 LongBit 0 physical addr 00000000000274b2 eip 00000000000074b2 00000000000074b2 mov ax 5724h 00000000000074b5 cmp ax 371lah 00000000000074b9 XS Eil 0000000000000040 This block s execution was 1 532475 percent of the total since the last epoch The simulator contains a code profiling facility that is accessed through the dumpprofile automation command There is no graphical user interface to the profiling facility at this time Profiling in the simulator has some limitations and features not present in most systems The limitations are that no symbolic information is present in the output and that only execution since the beginning of the last epoch see the last paragraph for an explanation of an epoch is measured The feature which is most unusual is that the user can ask for a profile at any time there is no profiling mechanism that needs to be enabled before execution takes place Another feature is that all code in the system is profiled even code executed with interrupts off and code in all modes 16 bit mode 32 bit legacy mode 32 bit compatibility mode long mode SMM mode etc is measured equally This profiling mechanism is non intrusive no x
162. can only be executed by privileged software such as the operating system kernel and interrupt handlers that run at the highest privilege level Only system instructions can access certain processor resources such as the control registers model specific register and debug registers Instruction Gasser Mnemonic Opcode Description PP Adjust the RPL of a destination segment selector to a level not less than the RPL of 1 ARPL reg mem16 reg16 63 r the segment selector specifies in the 16 bit v source register CLI FA Clear the interrupt flag IF to zero e CLTS op 06 Geet the task switched TS flag in CRO to e HLT F4 Halt instruction execution e NT 3 CE Trap to debugger at interrupt 3 zZ S Flush internal caches and trigger external NVD GE 08 cache flushes 4 CG Invalidate the TLB entry for the page LEE mema OF OL 77 containing a specified memory location A RET CF Return from interrupt 16 bit operand size bt RETD CF Return from interrupt 32 bit operand size bt RETO CF Return from interrupt 64 bit operand size bt Reads the GDT LDT descriptor referenced by a the 16 bit source operand masks the LAR Peg be reg mem16 PER attributes with FFOOh and saves the result sf in the 16 bit destination register Reads the GDT LDT descriptor referenced by s the 16 bit source operand masks the LAR reg32 reg meml6 OF 02 r sttriputes with OOFFFFO0h and saves the L
163. categories of generic I O logging are available Logging is performed to the I O loggers see Section 9 1 Message Log on page 137 of names similar to the device you are enabling the logging for Caveat Currently devices which route to other devices may appear as if they are responding to the messages themselves so bridge devices will likely log everything that is behind them D Emerald Graphics 11 Properties Connections Lo Logging VGA SubDevice Framebuffe Options C Log PCI Config Space Accesses C Log I O Space Accesses Disable Fastpath 1 0 when Logging C Log Memory Space Accesses Disable Fastpath Memory when Logging C Log Fastpath Memory Requests when Logging Figure 9 3 I O Logging Dialog Log PCI Config Space Accesses Checking this will log PCI Config Space accesses made to the device Log I O Space Accesses Checking this will log I O Space accesses made to the device These are the accesses made with the x86 IO read write instructions Disable Fastpath I O when Logging This item checked by default disables the Fastpath I O mechanism when I O Space Accesses logging is enabled If this is unchecked accesses may not appear in the log Log Memory Space Accesses Checking this will log Memory Space accesses made to the device These are the accesses corresponding to standard x86 move read and write instructions to memory Disable Fastpath Memory when Logging 140 Chapter 9 Logging AMD Confide
164. cation If equal set the zero flag ZF to 1 and copy the ECX EBX register to the memory location Otherwise copy the memory location to EDX EAX and clear the zero flag S CPUID A2 Executes the CPUID function whose number is in the EAX register Decimal adjust AL Decimal adjusts AL after subtraction DEC reg mem8 1 Decrement the contents of an 8 bit register or memory location by 1 DEC reg mem16 1 Decrement the contents of a 16 bit register or memory location by 1 DEC reg mem32 EE Decrement the contents of a 32 bit register or memory location by 1 DEC reg mem64 1 Decrement the contents of a 64 bit register or memory location by 1 DEC regl6 48 rw Decrement the contents of a 16 bit register by 1 DEC reg32 48 rd Decrement the contents of a 32 bit register by 1 DIV reg mem8 F6 6 Perform unsigned division of AX by the contents of an 8 bit register or memory location and store the quotient in AL and the remainder in AH q ISSIS DIV reg mem16 F7 6 Perform unsigned division of DX AX by the contents of a 16 bit register or memory location and store the quotient in AX and the remainder in DX s Appendix A 199 AMD Confidential User Manual September 1 E 2008
165. ce Jump is an XTR Instruction 106 Chapter 7 Device Configuration AMD Confidential User Manual September 1 oe 2008 7 22 1 Using XTR No special setup for XTR Record is required XTR can be recorded by using the appropriate automation commands as described in Section A 7 28 XTR on page 253 The XTR XML file can easily exceed five Gbytes in size Please make sure you have enough physical storage before you start XTR Record 7 22 1 1 Recoding XTR Trace To record XTR please enter the following commands in the simulator s console window 1 simnow gt xtrsvc xtrfile lt filename xml gt 1 simnow gt xtrsvc xtrenable 1 1 simnow gt go or hit Run on the shell 7 22 1 2 Stop XTR Record To stop XTR record please enter the following commands in the simulator s console window 1 simnow gt stop Stop the simulation 1 simnow gt xtrsvc xtrenable 0 7 22 1 3 XTR Playback For XTR Playback XTR Northbridge XTRNB replaces all the devices including any other Northbridge in the system Hence for UP XTR Playback only AweSim and XTRNB are required Please refer to Section 7 22 1 3 XTR Playback on page 107 on how to connect AweSim and the XTRNB device It is recommended to also include the Debugger device for debugging or logging needs To playback XTR please enter the following commands in the simulator s console window new adddevice Debugger adddevice Awesim Processor cpu type K8 cpu setname
166. ce Name gt Lists all connections that a device has Connect lt Device Name1 gt connect point1 Device Name2 connect pont Connects Device Namel and Device Name2 using connect point and connect point2 AvailablePorts lt Device Name gt Lists available ports of device Device Name Disconnect lt Device Name gt Disconnects all connections of device Device Name DeleteDevice lt Device Name gt Deletes device Device Name from simulated system and removes it from device window KnownDevices Lists all devices that are known by the simulator These devices are stored in devices MoveDevice lt Device Name gt lt x gt lt y gt Moves the specified device Device Name to x y coordinates in device window This command only work when GUI mode is active New Creates a new BSD file Returns the location postion x y of the device lt Device Name gt in the device window x and y are pixel coordinates inside the device Location window For example Location USB JumpDrive returns USB JumpDrive 152 382 where 752 is the x coordinate and 382 is the wv coordinate DumpRegistry Displays all information stored in SimNow s registry SetMPQuantum lt time nanoseconds gt Sets the time in nanoseconds for a CPU before switching to next CPU in a MP system Modifying the MP Quantum might have a huge impact on the simulate
167. ce Short Description The JumpDrive device allows easy USB USB JumpDrive import and export of data between a gt host system and a simulation environment The network adapter device models an Haj Desktop Network Adapter Intel Pro 1000 MT Desktop Network Adapter Table 3 1 Cheetah_1p bsd Devices 3 2 4 Device Window Quick Reference Table 3 2 lists common tasks that may be done in the Device Window and describes how to complete them Task Where to Find the Properties Enter the AweSim properties page Processor tab and select a CPU type For more information please refer to Change CPU Type Section 7 1 AweSim Processor Device Figure 7 1 on page 52 Change Memor operna Ge ee to Section 14 2 Changing DRAM Size on Go to the Simulation Display Window File Set IDE Primary Secondary Master Slave Image as shown in Figure 7 22 on page 89 Change a hard drive or DVD Or CD ROM image Go to the Southbridge Properties page gt HDD Primary Secondary Channel If using a DVD CD ROM image check the DVD ROM checkbox as shown in Figure 7 22 on page 89 Go to the Main Window File Menu Set Floppy Image Or Go to the SIO properties page Super IO tab see Figure 7 13 on page 75 Go to the System BIOS Properties page Memory Change a BIOS image Configuration tab see Figure 7 14 on page 78 Change the Init File entry Table 3 2 Device Win
168. children For example shell GetFastPath can return Enabled Disabled or Mixed means some children are Enabled and some are Disabled 1 simnow gt shell GetLogIO 4 core Node 0 gt AweSim Processor 0 PCT Disabled eet Disabled Deels Enabled MEM Disabled MEMfpdis Enabled GETMEMPTR Disabled 1 simnow gt shell GetLogIO 4 core Node 0 gt AweSim Processor 1 PET Disabled TOR Disabled J gCeel sz Disabled MEM Disabled Se T MEMfpdis Disabled GETMEMPTR Disabled In this example all other child devices of 4 core Node 0 are Disabled for all log options 1 simnow gt shell GetLogIO 4 core Node 0 ISL Disabled Os Disabled IOfpdis Mixed MEM Disabled MEMfpdis Mixed GETMEMPTR Disabled 1 simnow gt shell GetLogIO gt Machine 1 BETS Disabled TOS Disabled LOfpodis Mixed MEM Disabled MEMfpdis Mixed GETMEMPTR Disabled 3 3 5 Device Group Examples Device groups can be a powerful building block for SimNow users These next examples should help give further understanding about device groups and demonstrate some practical uses 20 Chapter 3 Graphical User Interface AMD Confidential User Manual September 1 jae 2008 3 3 5 1 Example 1GB DDR2 memory When you instantiate a Dimm Bank known device into a created device you get its default state of 8 empty dimm s with no confi
169. cifically tested for this release e Successfully completed a 64 bit SpecJBB run on a simulated 4 processor machine The simulator has also successfully completed the entire SPECint2000 and SPECfp2000 suite e Successfully completed an in memory run of TPC C on a simulated multi processor system as well as parts of TPC C on a simulated RAID device e Successfully completed Sysmark 2004 s Office Productivity section and parts of Internet Content Creation Appendix A 185 AMD Confidential User Manual September 1 E 2008 A 4 CPUID This section is an overview of the CPUID feature implementation in the AweSim CPU processor model A 4 1 CPUID Standard Feature Support Standard Function 0x01 Table 15 6 shows the standard feature bits returned by the AweSim CPU processor model and which features are fully S or only partially amp implemented and supported A indicates that the returned feature bit is zero and this feature is not implemented and not supported th th T 8 Generation Feature CATA Generation Generation Rev F Base Pre Rev F Floating Point Unit f Virtual Mode Extensions A Debugging Extensions Page Size Extension Time Stamp Counter AMD Model Specific Registers Physical Address Extensions Machine Check Exception CMPXCHG8B Instruction APIC SYSENTER and SYSEXIT Memory Type Range Registers Page Global Extension Machine Check Architecture Conditional Move Instruction Pag
170. contents of all Northbridge registers It also saves the contents of any tables and the states of all internal devices the memory controller HyperTransport table contents etc When the BSD file is read in all tables are filled with past data and all states are restored to their saved states Configuration Options Figure 7 17 and Figure 7 18 show configuration options for the Northbridge 82 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 Daun 8th Generation Integrated Northbridge 3 Proper Connections 1 0 Logging Logging Configuration C Log PCI Configuration Cycles C Log HyperTransport Message Routing Figure 7 17 Northbridge Logging Capabilities Properties Dialog If Log PCI Configuration Cycles is selected the device will produce log messages whenever PCI configuration registers are accessed If Log HyperTransport Message Routing is selected the device will log HyperTransport messages D AMD 8th Generation Integrated Northbridge 3 Proper Connections 1 0 Logging Logging Configuration DDA w DRAM Controller Link 0 Enable 16 C Link 1 Enable C Link 2 Enable Opteron Only 16 Link2 Figure 7 18 Northbridge HT Link Configuration Properties Dialog If the DDR DRAM Controller is selected the device will support DDR DRAM In order to use DDR2 DRAM select the DDR2 DRAM Controller Chapter 7 Device Configu
171. ct a sign extended 32 bit value from a destination register or location reg mem16 imm8 83 5 ib Subtract a sign extended immediate 8 bit value from a 16 bit register or memory location reg mem32 imm8 83 5 ib Subtract a sign extended immediate 8 bit value from a 32 bit register or memory location reg mem64 imm8 83 5 ib Subtract a sign extended immediate 8 bit value from a 64 bit register or memory location reg mem8 reg8 28 Jr Subtract the contents of an 68 bit register from an 8 bit destination register or memory location reg mem16 reg16 29 Jr Subtract the contents of a 16 bit register from a 16 bit destination register or memory location reg mem32 reg32 29 ee Subtract the contents of a 32 bit register from a 32 bit destination register or memory location SUB reg mem64 reg64 29 L Subtract the contents of a 64 bit register from a 64 bit destination register or memory location SUB reg8 reg mem8 2A Jr Subtract the contents of an 68 bit register or memory operand from an 8 bit destination register SUB regl6 reg mem16 Subtract the contents of a 16 bit register or memory operand from a 16 bit destination register SUB reg32 reg mem32 Subtract the contents of a 32 bit register or memory operand from a 32 bit destination register SUB reg64 reg mem64
172. ction did I O Table 7 8 Internal Execution Control Flags 7 22 4 Limitations e Any line in XTR XML file cannot be greater than 255 characters e Comment start tag lt should start on a new line and end tag gt should be last characters on a line The XML attributes are case sensitive but the values are not XTR cannot be used to playback BIOS bring ups Currently XTR does not support Pacifica platform playback environments Currently XTR traces recorded off SimNow cannot be played back in other XTR e Although not needed XTR traces recorded by SimNow might contain data written by the CPU e g IOW 7 22 5 Example XTR XML File lt xml version 1 0 encoding utf 8 gt lt AmdEventtTrace version 1 0 gt lt Init Device DIMM Type MEMI Size 536870912 gt lt Init Device MEM Type MEMI File xtri bin gt lt Init Device CPUO Type CPU Item ICount Data 227 gt lt Init Device CPUO Type CPU Item RIP Data 0000000082D6A8E4 gt lt Init Device CPUO Type CPU Item RAX Data 0000000000628E01 gt lt Init Device CPUO Type CPU Item RBX Data O00O0000000BOBE41C gt lt Init Device CPUO Type CPU Item RCX Data 000000000B080E20 gt lt Init Device CPUO Type CPU Item RDX Data 0000000000000080 gt lt Init Device CPUO Type CPU Item RSI Data 0000000000C8FA38 gt lt Init Device CPUO Type CPU Item RDI Data 000000000B09A6B8 gt
173. cueia 123 7 24 4 2 Client Server simulated netbwork A 124 7 24 4 3 Isolated Client Server simulated network Same process 124 1 24 53 Visibility Diagram siscecectavisaccisezesksadeaszasaipecnecasvasaees aa i a eia 125 7 25 Plug and Play Monitor Device eeteerien geigend ee eeneg rgn en 126 7 26 ATI SB400 SB600 SB700 Southbridge Devices eeeeeeeeceeeeteeeeeteeeeeeees 128 7 27 ATI RS480 RS780 RD790 RD890 Northbridge Devices eeceeeeeeeeeees 130 T28 AMD Tstanb l RE 131 729 AMD Sao Paulo Device ic cajascatitiievcaias ENEE ai 132 7 30 AMD Magny Cours ee eene 133 o PELConfis ration E 135 8 1 Scanning PCL Buses vesjscctsverceavadaydacaseupeaa a a a E E ee 136 8 2 Modifying the PCI Configuration content 136 QD Eelere 137 9 1 RIEA ee dE 137 hr L pnr Geet Eed eg gehte 139 9 3 VO Logging EE 140 10 CPU Eeer ee SR 143 TOL Elementer a R E E ae 143 10 1 1 Setting a Breakpoint icsicisesccavasyectassvacaisdevacsashaynasalesgaccessasaeeasoecedeaswerecs 143 10 1 2 Single Stepping the Smulaton eee ceeneeceseeeceeeeecseeeeenteeeesaes 144 10 1 3 SUE Te 144 10 1 4 Skipping Ereegnes eg 145 10 1 5 Viewing a Memory REG Otis iuge regogeleu e Seege deeg 145 10 1 6 Reading PCI Configuration Regieterg 146 10 1 7 Reading CPU MSR Contents 022 0 cae ieee is ee 146 101 8 SCENE ee 147 102 Debugger Command Reference ij cisccscccisss seccssagsastvserdcntasaceeeacesocacesteceveaccdans 147 11 Debug EE 151 ih Ker
174. cute page protection SEM AMD extensions to MMX MMX FXSAVE FXRSTOR Fast FXSAVE FXRSTOR 1 GB Paging feature RDTSCP Long Mode AMD Extensions to 3DNow 3DNow Instructions Virtualization Technology LN Ee e LN NN Ee e LN Ee e KKK KAKAO SOUS Table 15 7 CPUID Extended Feature implementation Only read and write to debug registers is supported side effects are not implemented Controlled by FUSE state Appendix A 187 AMD Confidential User Manual September 12 2008 A 5 Known Issues A 5 1 FSAVE FRSTOR and FSTENV FLDENV When the simulator is executing FSAVE FRSTOR and FSTENV FLDENYV in real mode it is using the 16 bit protected mode memory format A 5 2 Triple Faulting If the processor encounters an exception while trying to invoke the double fault DF exception handler a triple fault exception occurs This can rarely occur but is possible For example if the invocation of a double fault exception causes the stack to overflow then this would cause a triple fault When this happens the CPU will triple fault and cause a shutdown cycle to occur This special cycle should be interpreted by the motherboard hardware which then pulls RESET which ultimately resets the CPU and the computer However the simulator does not simulate triple faults In case a triple fault occurs the simulator stops the simulation The simu
175. cw Jump if less SF lt gt OF A JL rel32o0ff OF 8C cd Jump if less SF lt gt OF A 5 Jump if not greater or equal SF lt gt JNGE rel8off 7C cb Ee e x Jump if not greater or equal SF lt gt JNGE rell off OF 8C cw OE e Jump if not greater or equal SF lt gt JNGE rel32off OF 8C cd Ee e JNL rel8off 7D cb Jump if not less SF OF A JNL rell6off OF 8D cw Jump if not less SF OF f JNL rel32off OF 8D cd Jump if not less SF OF Ff JGE rel8off 7D cb Jump if greater or equal SF OF Af JGE rell6 off OF 8D cw Jump if greater or equal SF OF a JGE rel32off OF 8D cd Jump if greater or equal SF OF e pies Jump if less or equal ZF 1 or SF JLE rel8off 7E cb EC e Seo e Jump if less or equal ZF 1 or SF JLE rell6off OF 8R cw EE e Sach i Jump if less or equal ZF 1 or SF JLE rel32off OF 8R cd OE ef ING rel80ff TE cb Jump if not greater ZF 1 or SF lt gt w S OF P SE Jump if not greater ZF 1 or SF lt gt ING rell6off OF 8E cw Se g e J Jump if not greater ZF 1 or SF lt gt JING rel320ff OF 8E cd a g e Jump if not less or equal ZF 0 or JNLE rel8off TE cb ant 2 ee e 3 Ge Jump if not less or equal ZF 0 or JNLE rell6off OF 8F cw er OF e 7 E Jump if not less or equal ZF 0 or JNLE rel32off OF 8F cd oF OF e JG rel8off TE cb Jump if greater ZF 0 or SF OF ef JG rell6 off OF 8F cw Jump if greater ZF 0 or SF OF ef JG rel320ff OF 8F cd Jump if greater ZF 0 or SF
176. d Exchange the contents of a 32 bit XCHG reg32 reg mem32 87 r register or memory operand with the e contents of a 32 bit register Exchange the contents of a 64 bit XCHG reg mem 64 reg64 87 Ar register with the contents of a 64 e bit register or memory operand Exchange the contents of a 64 bit XCHG reg64 reg mem64 87 r register or memory operand with the ef contents of a 64 bit register Set AL to the contents of DS rBX XLAT mem8 D7 ere AN e Appendix A 219 AMD Confidential User Manual September 1 E 2008 Instruction S etc Mnemonic Opcode Description e Set AL to the contents of DS rBX NN Si unsigned AL 4 XOR the contents of AL with an XOR AL imm8 34 ib immediate 8 bit operand and store the e result in AL XOR the contents of AX with an XOR AX imm16 35 iw immediate 16 bit operand and store A the result in AX XOR the contents of EAX with an XOR EAX imm32 35 Zei immediate 32 bit operand and store ef the result in EAX XOR the contents of RAX with a sign XOR RAX imm32 35 id extended immediate 32 bit operand and ef store the result in AX XOR the contents of an 8 bit destination register or memory XOR reg mem8 imm8 80 6 ib operand with an 8 bit immediate value ei and store the result in the destination XOR the contents of a 16 bit destination register or memory XOR reg mem16 imm16 81 6 iw operand with a 16 bi
177. d changes are stored to the image file see also Section 5 2 1 Assigning Disk Image on page 38 3 4 6 Registry Window The Registry Window can be viewed by selecting View Show Registry The registry contains information about various simulator configuration items They are not intended to be altered by the user but some can provide useful information For example the Instructions per Microsecond and System Bus Frequency both show the frequency values the simulator uses for its simulated processors 28 Chapter 3 Graphical User Interface AMD Confidential User Manual September 12 2008 x SimNow Registry Dialog Registry Item Name Value Instructions per Microsecond 800 System Bus Frequency 200 CPU Clock Mul 0 CPU Model Name Athlon64 Turbo Pomp D Turbo Maumc 0 Guard Memory Required TRUE CPU Manages Cycles TRUE Disk Block Cache Size 64K Disk Block Cache Depth 5 Disk Block Cache Bits 12 Figure 3 23 Registry Window 3 4 7 Help Problems and Bug Reports The simulator has HTML on line help and documentation with Help menu entries or buttons on the dialogs In the device view every device has a context menu right click with Help documentation links and What s this floater text In addition to any other support channel you may have we encourage feedback on any problems encountered Please send an email to simnow support amd com Chapter 3 Graphical User Interface 29
178. d 1 2 3 AMD 8111 W83627HEF PCI Cheetah_2p_emerald 2 1 3 AMD 8111 W83627HF PCI Cheetah_2p_jh_emerald 2 2 3 AMD 8111 W83627HF PCI Vp_bd_phasel 1 1 3 AMD 8111 W83627HF PCI Vp_bd_phase2 1 4 3 AMD 8111 W83627HF PCI Sahara_Family10h 1 4 1 SB400 ITE8712SIO PCI Shiner_family10h 1 4 1 SB700 ITE8712SIO PCI Dune 1 1 1 SB400 ITE8712SIO PCI Table 15 1 Computer Platform Files BSD A 2 2 Device Files BSL Please see Section 7 Device Configuration on page 49 for device listings and descriptions This is the recommended default uniprocessor platform 182 Appendix A AMD Confidential User Manual September 1 g 2008 A 2 3 Product Files ID A product file configures the CPU and Northbridge to represent and behave as an actual AMD product A product file will set the CPUID Family Model and Stepping the BrandID the MANID and fuses Note The public release version of the simulator doesn t contain any product files Product File CPU Type CPU Cores PIN Rev Vi AMID irtualization Athlon64 754_SH C0_ 800MH2 id AMD Athlon64 1 754 CU Ki Athlon64 754_SH CG_ 800MHz id AMD Athlon64 1 754 CG Ki Athlon64 754_SH D0_ 800MHz id AMD Athlon64 1 754 DO Ki Athlon64 754_SH EO_ 800MHz id AMD Athlon64 1 754 EO Ki Athlon64 939_JH E0O_ 800MHz x2 id AMD Athlon64 2 939 EU x Athlon64 939_SH CG_ 800MHz id
179. d MP system GetMPQuantum Returns the current MP Quantum value see also SetMPQuantum GDB d udpltcp lt port gt Sets up the simulators gdb interface The default protocol is tcp and the default port is 2222 If you don t define any parameters the default protocol and port will be used You can override tcp with udp The following example shows how to override the default protocol and port parameters shell gdb udp 2233 The host parameter can t be changed it is always set to localhost For more information please refer to Section 11 2 GDB Interface on page 152 Appendix A 231 AMD Confidential User Manual September 12 2008 Automation Command Description Swap X86Sim Processor AweSim Processor Switches CPU model from X86Sim to AweSim or the other way around HasModule lt module gt Returns true if module is present otherwise it returns false GetDisplayIndex Returns the 0 based index of which VGA device is currently being displayed in the GUI Only useful if more than one VGA device is active within a BSD file SetDisplayIndex lt n gt Sets the 0 based index of which VGA devices output is to be displayed in the GUI Only useful if more than one VGA device is active within a BSD file Wait Provides a WAIT UNTIL STOPPED feature NGo Provides a non blocking GO command DisplayScreenShot lt index gt lt
180. d by the memory device is masked by a bit mask with the same number of bits as the size of the memory device e g a 256 Kbyte ROM uses an 18 bit mask or it is masked by 0x003FFFF This enables the ROM to be remapped dynamically into different memory address ranges in conjunction with the aforementioned chip select GetAddrMask Returns true if memory address masking is enabled otherwise it returns false InitValEnable lt Ol1 gt Enables 1 or disables 0 the initialized unwritten memory option If enabled the memory is initialized using a specified byte see below JnitVal otherwise the memory is not initialized InitVal lt hex value gt Sets byte initializer for memory that needs to be initialized 244 Appendix A User Manual AMD Confidential September 12 2008 Automation Command Description InitValStatus Displays information if the initializer is used and if the memory initialization is activated DisableCache lt 011 gt Sets memory region to cacheable 0 or non cacheable 1 GetCacheDisabled Returns true if non cacheable otherwise it returns false GetConfig Displays Memory configuration information FlashMode lt 011 gt Enables 1 or disables 0 this device to be used as a flash ROM FlashUpdateFile lt 0 1 gt Enables 1 or disbales 0 writes to the flash ROM to update the ROM image ncHTMode lt 01 1 gt Enables
181. decrement rSI and rDI CMPSB A6 Compare the byte at DS rSI with the byte at ES rDI and then increment or decrement rSI and rDI CMPSW A7 Compare the word at DS rSI with the word at ES rDI and then increment or decrement rSI and CDI CMPSD A7 Compare the doubleword at DS rSI with the doubleword at ES rDI and then increment or decrement rSI and rDI CMPSQ A7 Compare the quadword at DS rSI with the quadword at ES rDI and then increment or decrement rSI and rDI CMPXCHG reg mem8 reg8 OF BO fE Compare AL register with an 8 bit register or memory Location If equal copy the second operand to the first operand Otherwise copy the first operand to AL KS ISISISI SI SIS CMPXCHG reg mem16 reg16 OF B1 E Compare AX register with a 16 bit register or memory location If equal copy the second operand to the first operand Otherwise copy the first operand to AX CMPXCHG reg mem32 reg32 OF B1 Jr Compare EAX register with a 32 bit register or memory location If equal copy the second operand to the first operand Otherwise copy the first operand to EAX CMPXCHG reg mem64 reg64 OF Bl Jr Compare RAX register with a 64 bit register or memory location If equal copy the second operand to the first operand Otherwise copy the first operand to RAX CMPXCHG8B C7 1 m64 Compare EDX EAX register to 64 bit memory lo
182. device should respond The memory device can also be configured as a LPC flash device It currently models 2Mb SST49LF020A 4Mb SST49LFO40A 8Mb SST49LFO80A and 16Mb SST49LF160C flash memory devices Note that we support two command sequences used generally by flash memory SST and ATMEL User should configure the flash memory to the appropriate command sequence to get desired results The SST49LF160C device uses the ATMEL command sequence while SST49LFO20A SST49LFO40A SST49LFO80A use the SST command sequence Interfaces The memory device has a general purpose interface that you can connect to any other type of port No selection is necessary when connecting this memory device to another device Initialization and Reset State The default state of the device is a RAM memory device that is at a base address of 0x00000000 and a size of 4 Gigabytes The memory has no default content When an initialization file is specified the memory device s contents contain the data from that binary file After a reset the memory device reverts back to the initialization file contents Contents of a BSD The contents of memory as well as all configuration information are stored in the BSD Configuration Options The first field of the Memory Configuration tab shown in Figure 7 14 is the base address of the device in a hexadecimal value The second field is the total size of the memory device given in decimal value for the number of 32 Kbyte
183. ditszape GIF 1 ASID 00000000 HcR3 O0000000000000000 Disassembly VNHSAVEPA O000000000000000 Guest VNCBPA 00000000e8eR00000 Oe T Instruction Fooo EA60E000F0 jmp 000 e060 Opcode Fooo BEEL mov os Fooo 666BC6 Wey ECX ax Fooo B040 al ah cs r elip Fooo E680 EIERE Fooo B080 al 80h H E Soe ec eg Memory Dump Fooo FC Foon ooooo0000 P Memory Dump oo0000010 P in ASCII ooo00020 P oo000030 P 00000040 P Memory Dump 00000050 P Address 00000060 P 00000070 P Information and Message C R U lt Bus gt lt Device in Hex gt lt Function gt lt Register gt Data Output Command Line cp Figure 10 1 CPU Debugger Window 10 1 1 Setting a Breakpoint 1 Stop the simulation as described in Section 3 1 Tool Bar Buttons on pags 7 2 Open the Debugger Window View Show Debugger or click on gt The simulation will pause and the Debugger Window will appear 3 The bottom pane in the CPU Debugger Window is the debugger command line Enter a BX BM or BI on the debugger command line to setup and enable a breakpoint The BX BM and BI commands specify breakpoints on execution data access or I O access respectively Each of these commands requires an Chapter 10 CPU Debugger 143 AMD Confidential User Manual September 12 2008 address parameter that specifies a linear address associated with the breakpoint An optional parameter can be used to specify the pass count
184. doubleword at SE 8 ES rDI and then increment or Ce decrement CDI Compare the contents of the RAX SCASQ AF register with the quadword at ES rDI ei and then increment or decrement CDI SETO reg mem8 OF 90 Set byte if overflow OF 1 f SETNO reg mem8 OF 91 Set byte if not overflow OF 0 A SETB reg mem8 OF 92 Set byte if below CF 1 A SETC reg mem8 OF 92 Set byte if carry CF 1 A SETNAE reg mem8 OF 92 SE byte if not above or equal CF w 214 Appendix A AMD Confidential th User Manual September 12 2008 Instruction SE Mnemonic Opcode Description PP SETNB reg mem8 OF 93 Set byte if not below CF 0 e SETNC reg mem8 OF 93 Set byte if not carry CF 0 A SETAE reg mem8 OF 93 Set byte if above or equal CF 0 e SETZ reg mem8 OF 94 Set byte if zero ZF 1 Af SETE reg mem8 OF 94 Set byte if equal ZF 1 Af SETNZ reg mem8 OF 95 Set byte if not zero ZF 0 ei SETNE reg mem8 OF 95 Set byte if not equal ZF 0 e SC Set byte if below or equal CF 1 or SETBE reg mem8 OF 96 ZF 1 e SETNA reg mem8 OF 96 e byte if not above CF 1 or ZF A om E Set byte if not below or equal CF SETNBE reg mem8 OF 97 0 and ZF 0 ef SETA reg mem8 OF 97 Ga byte if above CF 0 and ZF w SETS reg mem8 amp OF 98 Set byte if sign SF 1
185. dow A device s connection appears in the Connections tab of the Device Properties window for each device as shown in Figure 3 4 When you add a connection the simulator shell sends a reset message to all of the devices in the workspace The global reset is equivalent to power cycling the simulated computer system 3 2 2 2 Configure Device Most devices provide configuration options Selecting Configure Device from the workspace popup menu produces a dialog window containing options for the specified device Selecting the Connections tab in the Device Properties window will display a list of all connections between the specified device and any other devices in the workspace 3 2 2 3 Disconnect Device Please note that this feature is not supported by the public release version of the simulator Selecting Disconnect Device from the workspace popup menu removes all connections to the specified device 12 Chapter 3 Graphical User Interface AMD Confidential User Manual September 12 2008 3 2 2 4 Delete Device Please note that this feature is not supported by the public release version of the simulator Selecting Delete Device from the workspace popup menu removes all connections to the specified device and removes the device from the workspace 3 2 3 Example Computer Description In this section we describe the major components of the computer simulation contained in the cheetah_Ip bsd file
186. dow Quick Reference Change a floppy drive image 3 3 Device Groups A platform bsd consists of devices and each device is an instance of either a device library bsl or so or a device group bsg A device group is an aggregation of devices into a single composite device that has some customized aspects includes its name icon ports initial and default state Device groups are a particular class of devices They have the same properties and characteristics as traditional devices but also allow the user to extend and tailor specific Chapter 3 Graphical User Interface 15 AMD Confidential User Manual September 12 2008 device s to meet a particular hardware implementation or configuration Device groups provide a method that allows the user to group or collect one or more devices libraries or groups into one composite device To the user the composite device will look and feel no different than a normal device library and for the most part the two should be indistinguishable A device group can consist of one or more child devices with some optional initialization state associated with each child device and those devices can optionally be connected to each other It may be helpful to think of a device group as a BSD within a BSD However a device group also has its own identity as a device and it can support external connection ports that allow it be connected to other devices in the same ma
187. e Show Device Window button a to display the current system configuration The Show Device Window button is disabled when the simulation is currently running To stop the simulation click on the Stop Simulation button 1 To open the simulator s integrated debugger click on the Show Debugger button A The Show Debugger button is disabled when the simulation is currently running To stop the simulation click on the Stop Simulation button CS 8 Chapter 3 Graphical User Interface AMD Confidential User Manual September 12 2008 Click on the Best Fit To Window button 71 to reduce or enlarge the size of the simulated display area so that the entire simulated display area will fit into the simulators main window If you hold down the CTRL key when clicking on the best Dr button it locks into a state where the simulated display area is resized whenever the simulated graphics display resolution changes To clear this locked condition click on the best fit button again 3 2 Device Window The Devices Window shown in Figure 3 2 is opened by selecting View Show Devices or clicking on the al button In this window you can create a simulated computer and modify its properties BIOS images memory characteristics and attached components This section describes the main components of the Device Window and shows how to build up and configure a simulated computer It expl
188. e 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Data Length 16 Value 00000100000001000000010000000100 gt lt Init gt lt Trace started on instruction 227 gt lt Event Device CPUO Type IOR ICount 326 Address a03e Size 2 gt lt Data Length 2 Value 0100 gt lt Event gt lt Event Device CPUO Type IOW ICount 345 Address a03c Size 2 gt lt Data Length 2 Value 0000 gt lt Event gt lt Event Device CPUO Type IOW ICount 364 Address a03e Size 2 gt lt Data Length 2 Value 1100 gt lt Event gt lt Event Device CPUO Type IOR ICount 588 Address a037 Size 1 gt Data Length 1 Value 0c gt lt Event gt lt INSTR Device CPUO Type FJMP ICount 6778 JMP 1 RIP f86b0619 gt lt INSTR Device CPUO Type FJMP ICount 6797 JMP 1 RIP f86b0619 gt Event Device CPUO Type IOW ICount 6817 Address a038 Size 2 gt lt Data Length 2 Value 40af gt lt Event gt lt INSTR Device CPUO Type FJMP ICount 7081 JMP 1 RIP f86b0317 gt lt INSTR Device CPUO Type FIMP ICount 7099 JMP 1 RIP f86b0317 gt lt Event Device CPUO Type IOR ICount 7110 Address a037 Size 1 gt lt Data Length 1 Value 0d gt lt Event gt Event De
189. e e contents of a 16 bit memory or MUL reg mem16 F7 5 register operand and put the signed A result in DX AX Multiply the contents of EAX by the contents of a 32 bit memory or MUL reg mem32 F7 5 register operand and put the signed A result in EDX EAX Multiply the contents of RAX by the contents of a 64 bit memory or MUL reg mem64 ET 5 register operand and put the signed Ce result in RDX RAX Multiply the contents of a 16 bit destination register by the contents MUL regl6 reg mem16 OF AF r of a 16 bit register or memory Af operand and put the signed result the 16 bit destination register Multiply the contents of a 32 bit destination register by the contents IMUL reg32 reg mem32 OF AF r of a 32 bit register or memory e operand and put the signed result the 32 bit destination register Multiply the contents of a 64 bit destination register by the contents IMUL reg64 reg mem64 OF AF r of a 64 bit register or memory ei operand and put the signed result the 64 bit destination register Multiply the contents of a 16 bit register or memory operand by a sign IMUL reg16 reg mem16 imm8 amp 6B r ib extended immediate byte and put the Af signed result in the 16 bit destination register Multiply the contents of a 32 bit register or memory operand by a sign IMUL reg32 reg mem32 imm8 6B r ib extended immediate byte and put the e signed result in the 32 bit destination register 200 Appendix A AMD Confid
190. e user can further qualify an input address using the G Guest and H Host specifiers For example Command Description Dd c001c0de HL ce oo host linear mene starting at Dd c001c0de GL E SE Se memory Se at Eesbech Dd c001c0de GP eg Ges SE physical memory starting at Table 10 3 Debugger Pacifica Memory Dump Command Examples If the user omits the G or the H specifier the debugger will access memory from the perspective of the attatched CPU s current state 10 1 6 Reading PCI Configuration Registers 1 Stop the simulation as described in Section 3 1 Tool Bar Buttons on page 7 2 Open the Debugger Window View Show Debugger or click on gt The simulation will pause and the Debugger Window will appear 3 Use the debugger s S command to view the PCI configuration register contents for a particular PCI function The command takes three hex parameters bus device function If the specified bus device and function exist in the simulated system the debugger will display all 256 bytes of configuration data 10 1 7 Reading CPU MSR Contents 1 Stop the simulation as described in Section 3 1 Tool Bar Buttons on pags 7 2 Open the Debugger Window View Show Debugger or click on gt The simulation will pause and the Debugger Window will appear 3 Use the debugger s R command to view the contents of an MSR This can be accomplished by typing R Maddress on the debug
191. e 4 3 is presented that allows you to select how large the blank image file should be WW New Image Size KEN Options Entire Drive Stop after partition 1 Stop after partition 2 Stop after partition 3 Stop after partition 4 Custom Bot Sectors 9388608 Image Size MB 4094 Figure 4 3 New Image Size Before you start creating a new blank disk image make sure that the image will be large enough to install Windows or Linux on it You can enter the image size in MB or in number of sectors We recommend an image size of 4 GB Increase the value of Image Size MB to 4096 and then click on the Ok button to create the image file A progress bar will inform you of the progress being made see Figure 4 4 WW Blank Image C en_windows_xp_professional_x64 hdd AAAA AAA oz Cancel Figure 4 4 Create Blank Image Once the image is created successfully DiskTool will display a message box as shown in Figure 4 5 Click on the Ok button Chapter 4 Disk Images 33 AMD Confidential User Manual September 12 2008 WW Blank Image i Operation Successful Figure 4 5 DiskTool Operation Successful To exit DiskTool click on the Exit button on the right side of the DiskTool dialog window see Figure 4 1 34 Chapter 4 Disk Images AMD Confidential User Manual September 12 2008 5 Running the Simulator You can start AMD SimNow by launching SimNow exe in your install direct
192. e Attribute Table Page Size Extensions PSE 36 CFLUSH Instruction MMX Instructions FXSAVE FXRSTOR SSE SSE2 Hyper Threading SSE3 PNI Monitor MWAIT RXR E nn OS E nn nn Eu GN nn nn nn Eu Only read and write to debug registers is supported side affects are not implemented 186 Appendix A User Manual AMD Confidential September 12 2008 Table 15 6 CPUID Standard Feature implementation A 4 2 CPUID AMD Feature Support Extended Function 0x80000001 Table 15 7 shows the extended feature bits returned by the AweSim CPU processor model and which features are fully S or only partially amp implemented and supported A indicates that the returned feature bit is zero and this feature is not implemented and not supported Feature 7 Generation gi Generation Base gi Generation Pre Rev F g Generation Rev F Floating Point Unit Virtual Mode Extensions Debugging Extensions Page Size Extension Time Stamp Counter AMD Model Specific Registers Page Address Extensions Machine Check Exception CMPXCHG8B Instruction APIC SYSCALL and SYSRET Memory Type Range Registers Page Global Extension Machine Check Architecture Conditional Move Instruction Page Attribute Table Page Size Extensions PSE 36 No exe
193. e DIMM Device Group When the user instantiates this theoretical known device Dimm DDR2 IGBx2 as a created device we get a created device Dimm DDR2 1GBx2 0 with a child device Dimm Bank 0 that is already configured as DDR2 2 dimm 1GB each Our resulting main device GUI would look like this 174 Chapter 15 Frequently Asked Questions FAQ AMD Confidential User Manual September 1 2 2008 d gt Machine 1 Drag Icons to insert new devices Shift drag to add connections Show Deprecated Devices e Dimm Bank em E Dimm DDR2 1GBx2 Dimm DDR2 1GBx2 0 p fw DN Figure 3 12 Created DIMM Device Group The device GUI for the children of Dimm DDR2 1GBx2 0 would look like this a gt Machine 1 gt Dimm DDR 1GBx2 0 Drag Icons to insert new devices Shiftt drag to add connections Show Deprecated Devices d AMD 8th Generation Integrated Northbridge Dimm Bank 0 Ree Figure 3 13 Children of DIMM Device Group If we looked at the options and configuration of the device library gt Machine 1 gt Dimm DDR2 1GBx2 0 gt Dimm Bank 0 either from the GUI or from the console we would see that it is already configured as DDR2 with 2 dimm slots 1GB each This example demonstrates a broad concept An existing device that has a more generic and abstract definition such as a non configured Dimm Bank can be wrapped in a device group to give it an identity as a part
194. e SCE TD eeben i boca ee DEE Eege 185 A 2 4 Image Files HDD FDD ROM SPD BIN 185 A 2 4 1 Hard Disk Image Piles eege de 185 A242 Memory SPDs Pies sts eege eege 186 A 3 Supported Guest Operating Systems 0 0 0 eeceeeescecsecceceeeeeeeeeeeeeteeeceteeeenaeees 187 AA e BER EE 188 AA CPUID Standard Feature Support Standard Function 001 188 A 4 2 CPUID AMD Feature Support Extended Function 0x80000001 189 E Ge 190 A 5 1 FSAVE FRSTOR and FSTENV FLDENV AAA 190 e e kene Faulting onena 8 acl oe cae ets oad Sea ty 2 Bose R es tie Sites ait ee 190 A 5 3 Performance Monitoring Counter Extensions ceeeeeeeeeseeeeseeeeeeeees 190 A 5 4 Microcode Patching s ii 20c scisetisigesisaas seated soseccenswasaatasocnesassnectaetedeseaauebace 190 A 5 5 Instruction CONELCNCY EE 190 A6 Instruction Referentes eegener Se ne ee ae 192 A 6 1 Notation en nnn a a a A E ira oes agade eee E 192 AGI Atert HE eer EES 192 E E Opeode SyMtax EE E 194 A 6 2 General Purpose Instructions es Ad EES 195 A 6 3 GENEE UNS MUCHOS sass ee eee here ae hee Ble 223 A 6 3 1 INT Interrupt to Vector oii scsisssvccjesecsssssce es desdeaet suescecvndecessecsdacadastans 225 A 6 3 2 IRET Return from Interupt kee 225 A 6 4 Virtualization Instruction Reierence 226 vi Contents AMD Confidential User Manual September 12 2008 A 6 5 64 Bit Media Instruction Retference 226 A 6 6 SD Now Jnstruction EEN 226 A 6 7 Extension to the 3D
195. e a 32 bit register or memory EE D1 0 operand left 1 bit 4 Rotate a 32 bit register or memory ROL reg mem32 CL D3 0 operand left the number of bits ef specified in the CL register Rotate a 32 bit register or memory operand left the number of bits ROL reg mem32 imm8 C1 0 ib specified by an 8 bit immediate C value Rotate a 64 bit register or memory EE D1 0 operand left 1 bit e Rotate a 64 bit register or memory ROL reg mem64 CL D3 0 operand left the number of bits Af specified in the CL register Rotate a 64 bit register or memory operand left the number of bits ROL reg mem64 imm8 C1 0 ib specified by an 8 bit immediate Ce value e Rotate an 8 bit register or memory ROR reg imm8 1 DO 0 operand right 1 bit C Rotate an 8 bit register or memory ROR reg mem8 CL D2 0 operand right the number of bits ei specified in the CL register Rotate an 8 bit register or memory i operand right the number of bits ROR reg mem8 imm8 CD 0 ib specified by an 8 bit immediate Ce value e Rotate a 16 bit register or memory ROR reg imm16 1 Bh NM operand left 1 bit ef Rotate a 16 bit register or memory ROR reg mem16 CL D3 0 operand right the number of bits e specified in the CL register Rotate a 16 bit register or memory operand right the number of bits ROR reg memi6 imm8 C1 0 ib specified by an 8 bit immediate sf value Appendix A 211 AMD Confidential
196. e default PCI configuration registers and place default values in the Chip and FIFO configuration for the Emerald Graphics device Contents of a BSD The data saved in the BSD depends on the mode the graphics controller was in when the BSD was saved If the graphics controller was in VGA mode the BSD file contains the contents of all VGA registers a copy of the 256 Kbyte VGA frame buffer and all configuration information If the graphics controller was in a high resolution mode non VGA in Windows the frame buffer Emerald Graphics registers and PCI configuration registers are saved in the BSD When the BSD file is reloaded all registers and the frame buffer are restored and a display image is captured and displayed in the display window Configuration Options VGA Sub Device Configuration Chapter 7 Device Configuration 61 AMD Confidential User Manual September 12 2008 D Emerald Graphics 9 Properties Connections 1 0 Logging YGA SubDevice Framebuffer and Ac BIOS File Images emerald_v0 3 10m LJ VGA Enabled Figure 7 7 Graphics Device VGA Sub Device Properties Dialog In Figure 7 7 the BIOS File option enables you to load different VGA BIOS ROMs into the device The VGA ROM is assumed to be a maximum of 32 Kbytes and is assigned to ISA bus address 0x000C0000 OxOOOC7FFF which is the industry standard location This file must be a standard binary file with the correct header and checksum informa
197. e doubleword the port specified in DX increment or decrement rSI POP reg mem16 0 Pop the top of the stack into a 16 bit register or memory location POP reg mem32 0 Pop the top of the stack into a 32 bit register or memory location POP reg mem64 0 Pop the top of the stack into a 64 bit register or memory location POP regl6 58 rw Pop the top of the stack into a 16 bit register POP reg32 58 rd Pop the top of the stack into a 32 bit register aS SSB Si Si See SS Se SS SS SS St Se Se Se Sk Si Se Sn Se Ge POP reg64 58 rq Pop the top of the stack into a 64 bit register 208 Appendix A AMD Confidential th User Manual September 12 2008 Instruction Se Mnemonic Opcode Description PP Pop the top of the stack into the DS POP DS aa register Ce Pop the top of the stack into the ES POP ES E register C Pop the top of the stack into the SS POR Ee at register we POP FS OF A1 Pop the top of the stack into the FS A register Pop the top of the stack into the GS POP GS OF AQ SE e Pop the DI SI BP SP BX DX CX ner a and AX registers 4 Pop the EDI ESI EBP ESP EBX EDX ees a ECX and EAX registers sw Pop a word from the stack into the
198. e during simulation For example adding the Winbond WB83627HE SIO device see Section 7 5 on page 65 to the workspace adds the floppy byte counts numeric window to the Main Window screen When you add a device to the workspace the shell sends a reset message to all of the devices in the workspace The global reset is equivalent to power cycling the simulated computer system 3 2 2 Workspace Popup Menu Changing the system configuration of the simulated system can make the simulation nonfunctional Right clicking on any icon in the workspace produces a popup menu as shown in Figure 3 3 10 Chapter 3 Graphical User Interface AMD Confidential User Manual September 1 g 2008 Configure Device Add Connection Please note that these Disconnect Device features are not supported by the public release Delete Device version of the simulator What s This Help Figure 3 3 Workspace Popup Menu 3 2 2 1 Add Connection Please note that this feature is not supported by the public release version of the simulator You can connect a device to another device by holding Shift left click and drag from one device to the other You will draw a line from the first device to the second Release the mouse button to create the connection You can also right click one device select Add Connection and then click on the device to connect to Then click Finish The connection enables simulator level message exchanges between the connec
199. e in SimNow has traditionally been a multi step process First the user would add the AMD Sth Generation Northbridge Device and then add one AweSim Processor device for each processing core in the node These devices then need to be connected together along the respective CPU Bus and Interrupt IOAPIC connection ports Once the devices are connected a user would then need to load a product ID file so that the simulated devices would represent a real and planned piece of hardware In summary building a Quad core node in SimNow could take as many as 14 individual steps and these steps would need to be repeated each time a processor node is to be added A device group can both simplify adding a quad core node and present the user with a hierarchical view So we will give some examples with quad core processor nodes A device group is not required to specify archive data for its child devices When such a known device group is instantiated as a created device it simply lets its children use their own default and initial configuration state We can create an abstract or generic 4 core Node device group that does not represent a particular hardware implementation just like a non configured Dimm Bank does not represent a particular hardware implementation until it is configured 22 Chapter 3 Graphical User Interface AMD Confidential User Manual September 12 2008 AweSim Process AweSim Processor 0 AMD 8th Gene
200. e processor nodes A device group is not required to specify archive data for its child devices When such a known device group is instantiated as a created device it simply lets its children use their own default and initial configuration state We can create an abstract or generic 4 core Node device group that does not represent a particular hardware implementation just like a non configured Dimm Bank does not represent a particular hardware implementation until it is configured A device group can optionally specify initial and default archive data device state for each of its child devices A device group with five children could specify archive data for 0 1 2 3 4 or all 5 children We could have an AMD 4 core CPU xxxx that specifies archive data for all five of its children configured with the theoretical product ID file amd xxxx id 176 Chapter 15 Frequently Asked Questions FAQ AMD Confidential User Manual September 12 2008 This is not the only way we could create a theoretical AMD 4 core CPU xxxx A cleaner idea would be to reuse the non configured abstract and generic 4 core Node This device group would externally be functionally the same as our previous AMD 4 core CPU xxxx example although it has the additional layer where it cleanly reuses 4 core Node We could also reuse 4 core Node for other device groups that represent a particular hardware im
201. e workspace represent device models the lines connecting the icons represent message routing You can set up and alter the simulated computer system by using the workspace popup menu shown in Figure 3 3 To open the workspace popup menu right click on any icon in the workspace area The Device List located on the left side of the Device Window describes all devices available in the simulator along with their configuration options For further information please refer to Section 7 Device Configuration on page 49 The Show Deprecated Devices checkbox is not checked by default This checkbox gives the user the opportunity to show or hide deprecated devices It is not recommended to use deprecated devices in simulation To show deprecated devices this checkbox must be checked The Show Deprecated Devices checkbox does not disable the ability to connect or create deprecated devices Also the automation interface of deprecated devices and loading BSDs which contain deprecated devices are both unaffected 3 2 1 Add a New Device You can add devices to the workspace by dragging a new device from the Device List on the left side of the workspace window to an appropriate location within the workspace on the right side Please note that this feature is not supported by the public release version of the simulator Some devices produce additional windows or dialogs when you add them to the workspace These windows provide an interface to the devic
202. ecified in ES rDI and si then increment or decrement rD nput a doubleword from the port specified by DX put it into the a oe memory location specified in ES rDI sf and then increment or decrement CDI INT imm8 CD ib Calls interrupt service routine w specified by interrupt vector imm Appendix A 201 AMD Confidential User Manual September 12 2008 Instruction Sumi Mnemonic Opcode Description mro cE oo JO rel8off 80 cb Jump if overflow OF 1 A JO rell6off OF 80 cw Jump if overflow OF 1 A JO rel32off OF 80 cd Jump if overflow OF 1 ei JNO rel8off 71 cb Jump if not overflow OF 0 ei JNO rell6off OF 81 cw Jump if not overflow OF 0 Af JNO rel32off OF 81 cd Jump if not overflow OF 0 A JB rel8off 72 cb Jump if below CF 1 ei JB rell6off OF 82 cw Jump if below CF 1 ei JB rel32o0ff OF 82 cd Jump if below CF 1 Af JC rel8off 72 cb Jump if carry CF 1 A JC rell6off OF 82 cw Jump if carry CF 1 ei JC rel32o0ff OF 82 cd Jump if carry CF 1 A JNAE rel8off 72 ef Jump if not above or equal CF 1 Af JNAE rell6off OF 82 cw Jump if not above or equal CF 1 Af JNAE rel32o0ff OF 82 cd Jump if not above or equal CF 1 ef JNB rel8off 73 cb Jump if not below CF 0 ei JNB rell6off OF 83 cw Jump if not be
203. eeeeeeeeeseecneeceseeeeeeeeaeeenaeens 58 Figure 7 9 DIMM Module Properties Dialog 59 Figure 7 10 Graphics Device VGA Sub Device Properties Dialog 0 0 0 cee ceeeeeeeeeee 62 Figure 7 11 Graphics Device Frame Buffer SubDevice Properties 0 0 0 0 ceeeeeeeeeeees 63 Figures ix AMD Confidential User Manual September 12 2008 Figure 7 12 Matrox G400 Block Diagram s 2 20 ccewneinl einai AEN 65 Figure 7 13 Matrox G400 Information Property Dialog 00 eee eeeececeeeceeeeeeeeeteeeesseees 67 Figure 7 14 Matrox G400 Configuration Properties 0 0 00 cece eeeeeeseeceeceseeeeeeeeaeeeaeens 68 Figure 7 15 Enable Full Hardware Acceleration on WindowsXP guest e cc eeeeeeees 13 Figure 7 16 Super IO Properties Dialog Winbond W83627HF A 75 Figure 7 17 Memory Configuration Properties Dialog eeeseseseeeeeereesersrrerrereesresreerresee 78 Figure 7 18 PCA9548 SMB Configuration Properties Dialog eeeeeeeeeeeeteeeeeteees 80 Figure 7 19 PCA9556 SMB Configuration Properties Dialog eeeeeeeeeeeeeseeeeeeees 81 Figure 7 20 Northbridge Logging Capabilities Properties Dialog eee ee eeeeeeeees 83 Figure 7 21 Northbridge HT Link Configuration Properties Dnalog eee eeeeeeeeeee 83 Figure 7 22 Northbridge DDR2 Training Properties Dialog oo eee eeeeeeeeeeneeeneeees 84 Figure 7 23 USB Properties Dialog AMD 8111 Soutbbdee A 87 Figure 7 24 CMOS Properties Dialog AMD 8111 Southbridge oe eee eeeeeeees 88 Figure 7 2
204. efault all slots are disabled One cannot disable a slot that has a device connected to it Differences from Real Hardware The PCI Bus device differs from other devices in that it is a generic model We do not simulate PCI down to a clock accurate level so devices do not arbitrate for bus ownership or insert wait states for example Chapter 7 Device Configuration 93 AMD Confidential User Manual September 12 2008 7 13 AMD 8131 PCI X Controller The AMD 8131 PCI X Controller is a HyperTransport tunnel that provides two PCI X buses and two IOAPICs These PCI X buses may or may not be configured as hot plug capable depending on the platform Interfaces The AMD 8131 has two types of interfaces HyperTransport and PCI buses It has two HyperTransport links HTO and HT1 that can connected to other non coherent HyperTransport link capable devices The PCI bus interfaces in the AMD 8131 must be connected to a PCI bus device which provides the Slot interfaces with which to connect devices for simulation Initialization and Reset State When first initialized the AMD 8131 tunnel is in its default state This is described in detail in the AMD 8131 datasheets Each bridge defaults with hot plug functionality disabled When reset the AMD 8131 takes on all default register values Contents of a BSD The entire configuration of the AMD 8131 device including all state and registers for its sub devices is saved in the BSD
205. eg mem8 imm8 80 3 ib from an 8 bit register or memory e location with borrow Subtract an immediate 16 bit value SBB reg mem16 imm16 80 3 iw from a 16 bit register or memory e location with borrow Subtract an immediate 32 bit value SBB reg mem32 imm32 81 3 id from a 32 bit register or memory e location with borrow Appendix A 213 AMD Confidential User Manual September 1 E 2008 Instruction Mnemonic Opcode Description eno Subtract a sign extended immediate SBB reg mem64 imm32 81 3 id 32 bit value from a 64 bit register e or memory location with borrow Subtract a sign extended 8 bit F immediate value from a t6 bit SBB veg memi6 imma 83 3 ib register or memory location with A borrow Subtract a sign extended 8 bit i immediate value from a 32 bit SBB reg mem32 imm8 83 3 ib register or memory location with sf borrow Subtract a sign extended 8 bit i immediate value from a 64 bit Ge 83 3 ib register or memory location with C borrow Subtract the contents of an 8 bit SBB reg mem8 reg8 8 Ar register from an 8 bit register or e memory location with borrow Subtract the contents of a 16 bit SBB reg mem16 reg16 9 Ar register from a 16 bit register or Af memory location with borrow Subtract the contents of a 32 bit SBB reg mem32 reg32 9 Ar register from a 32 bit r
206. egister 212 Appendix A AMD Confidential th User Manual September 12 2008 Instruction Supported Mnemonic Opcode Description PP Shift a 16 bit register or memory e location left the number of bits SHL reg mem16 imm8 SR S specified by an 8 bit immediate L i value o Shift a 32 bit register or memory SHL reg mem32 1 Dia location left 1 bit A Shift a 32 bit register or memory SHL reg mem32 CL D3 4 location left the number of bits e specified in the CL register Shift a 32 bit register or memory y location left the number of bits SHL reg mem32 E CLA 2p specified by an 8 bit immediate wf value S Shift a 64 bit register or memory Shh reg mem64 1 nies location left 1 bit si Shift a 64 bit register or memory SHL reg mem64 CL D3 4 location left the number of bits ei specified in the CL register Shift a 64 bit register or memory i location left the number of bits SHL reg mem64 imm CL 4 ib specified by an 8 bit immediate wf value Shift a signed 8 bit register or SAR reg mem8 1 DO 7 memory operand right 1 bit 4 Shift a signed 8 bit register or SAR reg mem8 CL D2 7 memory operand right the number of ei bits specified in the CL register Shift a signed 8 bit register or e memory location right the number of SAR Ee SST bits specified by an 8 bit immediate sf value Shift a signed 16 b
207. egister or ei memory location with borrow Subtract the contents of a 64 bit SBB reg mem64 reg64 9 Ar register from a 64 bit register or e memory location with borrow Subtract the contents of an 8 bit register or memory location from the SBB reg8 reg mem8 SZ Serer of an B bit register with e borrow Subtract the contents of a 16 bit register or memory location from the SBB reg16 reg memi6 Bae Ee of a 16 bit register with wf borrow Subtract the contents of a 32 bit register or memory location from the SBB reg32 reg mem32 Ge See of a 32 bit register with C borrow Subtract the contents of a 64 bit register or memory location from the a B r contents of a 64 bit register with A borrow Compare the contents of the AL SCAS mem8 AE register with the byte at ES rDI and e then increment or decrement rDI Compare the contents of the AX SCAS mem16 AF register with the word at ES rDI and ei then increment or decrement rDI Compare the contents of the EAX register with the doubleword at SCAS mem32 AF SE y and then increment or Ce decrement CDI Compare the contents of the RAX SCAS mem64 AF register with the quadword at ES rDI e and then increment or decrement CDI Compare the contents of the AL SCASB BE register with the byte at ES rDI and e then increment or decrement rDI Compare the contents of the AX SCASW AF register with the word at ES rDI and e then increment or decrement rDI Compare the contents of the EAX G register with the
208. el euro geleed E R 151 U EAE E DI TAC oe aoe casa EE Sa i cea tele Maa aa SR th a E a 152 Contents v AMD Confidential User Manual September 12 2008 LL2 1 9 Simple Approach 2 3 sscsieiesdecaseced dee Dua EENS EEN 152 11 2 2 Alternate Approach geed leg Leger 153 11 2 3 Using Another Port on the Same Machine ssseeeseeeseeereererserererreesee 153 11 2 4 Using Two Separate Machines ssssesssesssssessseesseesseseserssseeesseesseesseessee 153 11 3 Linux Host Serial Port Communiceaton eee ceeceeeeeeenceeneceeeeeseeeeaeeenaeen 153 12 tee bra 8 col E 155 13 Disk Tool EE 157 13 1 Command Line ee 157 13 2 E BIR EE 158 14 BIOS Developer s Quick Start EH 163 14 1 Leading acBiOs lage os ci Bode ese a BA ey ee Behe BAe 163 14 2 Changing DRAM S1Z6 eege veredeieus jess Seege i uae leaden 163 14 3 Chaneing SPD Data EE 164 TAA leanne CMOS EE 165 145 Logging PCI Configuration Cycles 22 4 2 ditccdees eee eae 165 14 6 Logging CPU Cy Gles associat ccsvabincetarecesoneapebevahdacead e n is 166 14 7 Creating a Floppy Disk Image ccssscessscsssccesessceesseseessncessasesessccsenaceeens 167 15 Frequently Asked Questions FAQ sssssessssessssssessessrssressessrerressersrsseeseeseeseresee 169 An Append EE 183 Al Format of Floppy and Hard Drive Images 183 A2 Bilbot Mat rial nsistiet Dee ENEE 184 A 2 1 Computer Platform Files CBR ees degen 184 A 2 2 Device Piles E KEE 184 A 2 3 Product Bal
209. ential User Manual September 1 a 2008 Instruction s d Mnemonic Opcode Description upporte Multiply the contents of a 64 bit register or memory operand by a sign IMUL reg64 reg mem64 imm8 6B r ib extended immediate byte and put the D signed result in the 64 bit destination register Multiply the contents of a 16 bit register or memory operand by a sign IMUL regl6 reg mem16 imm16 69 r iw extended immediate word and put the e signed result in the 16 bit destination register Multiply the contents of a 32 bit register or memory operand by a sign IMUL reg32 reg mem32 imm32 69 r id extended immediate double and put the Af signed result in the 32 bit destination register Multiply the contents of a 64 bit register or memory operand by a sign MUL reg64 reg mem64 imm32 69 r id extended immediate double and put the e signed result in the 64 bit destination register nput a byte from the port at the N AL imm8 E4 ib address specified by imm8 and put it e into the AL register nput a word from the port at the N AX imm8 amp E5 ib address specified by imm8 and put it ei into the AX register nput a doubleword from the port at N EAX imm8 E5 ib the address specified by imm8 and put Ff it into the EAX register nput a byte from the port at the N AL DX EC address specified by the DX register Af and put it into the A
210. er S Store the segment selector from the task Pee ee OF 00 register to a 16 bit memory location C SWAPGS OF 01 F8 Exchange GS base with KernelGSBase MSR Af SYSCALL OF 05 Call operating system Af SYSENTER OF 34 Call operating system ef SYSEXIT OF 35 Return from operating system Af SYSRET OF 07 Return from operating system ef UD2 OF 08 Raise an invalid opcode exception Af S Set the zero flag ZF to 1 if the segment VERR Rep EE OP 00 4 selected can be read w Set the zero flag ZF to 1 if the segment a ae ee selected can be written ov Write modified cache lines to main memory WBINVD OF 09 invalidate internal caches and trigger ef external cache flushes WRMSR OF 30 Write EDX EAX to the MSR specified by ECX Af Table 15 9 System Instruction Reference A 6 3 1 INT Interrupt to Vector Opcode Instruction Description CD INT imm8 Interrupt to Vector CE INT 3 Interrupt to Debug Vector e Interrupt to task gate is not implemented An attempt to execute an interrupt to task gate results in a FeatureNotIlmplemented exception and the simulation will be stopped e When delivering an exception in an attempt to deliver a hardware interrupt the simulation will not push the resume flag RF onto the stack e Always clears VM NT TF and RF bits in rFLAGS A 6 3 2 IRET Return from Interrupt Opcode Instruction Description IRET IRETD IRETQ Return from interrupt
211. er and all configuration information If the graphics controller was in Matrox Power Graphics Mode non VGA in Windows the linear frame buffer Power Graphics registers and PCI configuration registers are saved in the BSD When the BSD file is reloaded all registers and the frame buffer are restored and a display image is captured and displayed in the display window Configuration Options Figure 7 10 shows the Information tab The following information describes the active configuration of the Matrox G400 graphics device The Graphics Hardware Model can be set to one of the following models e Matrox Millennium G400 PCI e Matrox Millennium G400 AGP Currently there is only support for the Matrox G400 chip with SingleHead feature support available The Graphics BIOS version is the version of the BIOS that is assigned and used by the graphics device If you flash the BIOS the version number will change For more information about flashing the graphics device BIOS see Figure 7 11 The Graphics Memory section shows information about the current memory configuration of the graphics device Currently supported memory configurations are e 32 16 MB SGRAM with 300 MHz RAMDAC e 32 16 MB SDRAM with 300 MHz RAMDAC 66 Chapter 7 Device Configuration User Manual AMD Confidential September 12 2008 D Matrox R MGA G400 Graphics Adapter 9 Properties Connections 1 0 Logging Information Configuration Graphics Hard
212. er with the Joad_symbols command see Section 10 2 Debugger Command Reference on page 147 Appendix A 181 AMD Confidential User Manual September 1 2 2008 A 2 Bill of Material A 2 1 Computer Platform Files BSD This section gives a brief description of the computer platform description BSD files devices and disk and ROM image files that come with AMD SimNow Platform Simulator Note The public release version of the simulator comes only with the following computer platform description files the Cheetah_Ip_emerald bsd and Cheetah_Ip_jh_emerald bsd Public release version 4 4 2 and above contain one additional computer platform description file the vp_bd_phase_1 bsd see Table 15 1 File name SE E E Southbridge SIO See Solo 1 1 1 AMD 8111 W83627HF AGP Fuge 8 1 4 AMD 8111 W83627HF PCI Melody_Ip 1 1 1 AMD 8111 W83627HF PCI Melody_1p_jh 1 2 4 AMD 8111 W83627HF PCI Melody_2p 2 1 4 AMD 8111 W83627HF PCI Melody_2p_jh 2 2 4 AMD 8111 W83627HF PCI Quartet 4 1 4 AMD 8111 W83627HF PCI Serenade_1p ami 1 1 3 AMD 8111 W83627HF PCI Serenade ami 2 2 3 AMD 8111 W83627HF PCI Family10h_1p 1 4 3 AMD 8111 W83627HF PCI Family10h_2p 2 4 3 AMD 8111 W83627HF PCI Warthog2_Family10h 4 4 2 AMD 8111 W83627HF PCI Cat2_Family11h 2 1 1 SB600 ae eae PCI Warthog2 4 1 1 AMD 8111 W83627HF PCI Cheetah_1p_emerald 1 1 3 AMD 8111 W83627HF PCI Cheetah_1p_jh_emeral
213. er in memory or as file depending on the use of addjournal command RAID device supports multi level journaling i e for a created volume the user can add multiple journals however one cannot add a journal after an in memory journal Conceptually the disk image is equivalent to the image and fixed journal pair Journals grow in size as the volumes associated with them are accessed writes of data blocks which haven t been written before File based journals are preferred over in memory Journaling if a large number of writes are going to be made to the simulated volume The journal architecture is index based consisting of super blocks index blocks and data blocks This provides a hierarchical indexing mechanism in which data blocks are accessed by their LBA logical block address Several performance mechanisms are implemented in the RAID device including Disk Block Cache and Last Sector Hit which can be viewed at any time using the raid status v command AMD tested the RAID device both on SUSE Linux 64 and a 32 bit version of Windows 2003 Enterprise Server using stock drivers to drive this model This model emulates devices at the volume level so that the files used to represent the data correspond to logical volumes not disks This model associates one logical volume with one image file The model does not represent the timing of any real system because data becomes available almost immediately 100 Ch
214. es detailed information about PCI Configuration I O and Memory Space accesses 9 1 Message Log The simulator shell provides an interface that loaded modules devices and extensions may use to report status and events The messages may be displayed in a window written to a file or both The information log may be enabled and disabled on a module specific basis The informational log is controlled via the Message Log Window dialog box To view this dialog select the View Message Log entry from the Main Window shell menu A sample of this dialog is shown in Figure 9 1 Chapter 9 Logging 137 AMD Confidential User Manual September 12 2008 lt 1 SimNow Message Log Devices AMD 8th Generation Integrated Northbridge 0 AMD 8111 1 0 Hub 0 Log to File simnow log AMD 8151 AGP Tunnel 0 AT24C Device 0 AweSim Processor 0 ac Debugger 0 Dimm Bank 0 Log to Window 100 Buffer Size H lines Fast DMA 0 Fast DMA 1 Dimmdevice Bank 0 Simulated Size 10000000 Fast DMA 2 Dimmdevice Bank 2 Simulated Size 10000000 Fast DMA 3 Connected to pipe SimNow Com1l Fast DMA 4 Connected to pipeSimNow Com2 Fast DMA 5 Fast DMA 6 Fast DMA 7 IDE Controller 0 IDE Controller 1 IDE Drive 0 IDE Drive 1 IDE Drive 2 IDE Drive 3 10 Logger AMD 8th Generation Integrated Northbridge 0 10 Logger AMD 8111 1 0 Hub 0 10 Logger AMD 8151 AGP Tunnel 0 10 Logger AT 24C Device 0 10 Logger AweSim Processor 0 10 Logger
215. eseeesee 27 Figure 3 19 Primary Secondary and Floppy DisplayS eeesceseeeeeeceeeteceeeteeeeeseees 28 Figure 3 20 Registry Window suceeded atari Aneta 29 Figure 4 1 DiskTool Dialogue Window 2 2 44 4164 aie eee ena 32 Figure 4 2 Disk Pool Shell Window sesi 02 2 okt alesse Se ee a ade Be 32 Figure 4 3 New Image SIZE sunniaia viniani delat EAEE E E a 33 Figure 4 4 Create Blank EE 33 Figure 4 5 Disk Tool Operation Successful eet deed 34 Figure 5 1 Main Window No BSD Loaded AA 35 Figure 5 2 Main Window BSD Loaded eseeseeeeeseseseeressesessressessrerressessresresseeseeseeesee 37 Figure 5 3 Device Window tiki ceteee eile acest eid nin iii a aia 38 Figure 5 4 Installing WindowsXP eesesseeeseseeeeeserssrserssressesersstesseseresrensessresressreseeseeesee 40 Figure 6 1 Solo bsd Configuration esessseeeseseesseseessrseresresseserssressesnresressessresresseeseeseresee 45 Figure 6 2 Connections Tab of Device Properties Wimdouw 46 Figure 6 3 PCI Bus Configuration dialog window s essesesessssesseesreerersersresrresresreseresee 48 Figure 7 4 AweSim Processor Type Properties A 52 Figure 7 5 AweSim Processor Logging Properties Dialog sessssssssssessesssessseeesssressee 53 Figure 7 6 AMD Opteron Processor Virtual Bank Select Line Configuration 56 Figure 7 7 AMD Athlon 64 Processor Bank Select Line Configuration 56 Figure 7 8 DIMM Bank Options Properties Dalog eee
216. ess to bridge access to the real network This device provides a list of automation commands that can be used to configure the adapter model see Section A 7 Automation Commands on page 230 To model network workloads the following are typically required 1 One or more BSDs with a NIC device included in each BSD 2 A mediator process running remotely or locally The mediator is a background daemon task whose purpose is to bridge the NIC model to the real network or other SimNow BSDs The level of network visibility for each simulator session depends on the format of the MAC address that is used for the simulated NIC model Figure 7 32 shows depicts four simulator sessions communicating via a mediator HostName thehost Simulator 4 Mediator External Network Host theclient1 Host theclient2 Simulator Simulator 1 Simulator 2 Figure 7 32 Communication via Mediator 120 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 Alternatively a multi machine approach can be used in which multiple BSD s are loaded in the same process space This architecture allows the simulator sessions to pass packets back and forth without the need for a mediator Running without a mediator isolates the simulator sessions from the real network For more information on running multiple simulator instances in the same process see Section 5 3 Multi Machine Support on page 41 F
217. essage A 7 6 Floppy 1 simnow gt floppy usage Automation Command Description SetFloppy ABOUT lt filename gt Assigns a floppy image file filename to drive A or B GetFloppy lt A B OI1 gt Returns the assigned floppy image file of drive A or H EjectFloppy lt A B 011 gt The command will set the Media Ejected flag of drive A or B A 7 7 Debug 1 simnow gt debug usage Automation Command Description Enable is enabled Enables the Debugger and opens a debug dialog window if GUI Appendix A 235 AMD Confidential User Manual September 1 pig 2008 Disables the Debugger and closes debug dialog window if GUI Disable is enabled Attach lt Processor Num gt Attaches debugger to specified processor Executes the debug command specified in command see EE Section 10 2 Debugger Command Reference on page 147 MemDump Dumps 128 bytes of memory DisDump Dumps disassembly RegDump Dumps all CPU registers MsgDump Dumps debug messages WhichProc Returns the processor number which the debugger is currently attached to EnableStatus Returns enabled if debugger is enabled disabled if debugger is disabled GetConfig Displays the current configuration A 7 8 AMD 8151 AGP Bridge 1 simnow gt amd815l usage Automation Command Description Sets the internal Chip revision num
218. est img This example shows how to load the saved JumpDrive image C test img from the host s hard disk into the JumpDrive 1 simnow gt jumpdrive loadimage c test img 250 Appendix A AMD Confidential User Manual September 12 2008 A 7 27 E1000 The NIC device provides the following automation commands that can be used to configure the device 1 simnow gt e1000 usage Automation Command Description log enableldisable cmoidtr Enables or disables message logging for PCI Config ch MMIO m I O o Unmasked Interrupts i MDI d Frame Transfers t or Frame Receptions r logStatus Displays the current log status setMediatorHost domain hostname port Sets the mediator connect string The domain string and the port number are optional The default domain string is null The default port is 8196 The hostname is the host in which the mediator is running getMediatorHost Outputs the current mediator connect string setMACAddress XX XX XX XX KN XX Sets the MAC Address to be used by the adapter getMACAddress Retrieves the MAC Address being used by the adapter linkConnect autoldown Restarts link negotiation auto for the adapter or forces a link disconnect down tune intthrtlIrxdelayltxdelay value Sets certain synthetic delay and throttle values which gives the user the opportunity to change the default settings to get optimal results
219. evice Viewer window and on the console using shell KnownDevices Created Device An instantiation of a known device All devices in a BSD are created devices Created devices appear in the right hand pane of the Device Viewer window and on the console using shell CreatedDevices Chapter 15 Frequently Asked Questions FAQ 169 AMD Confidential User Manual September 12 2008 Device grouping tree node relationships Because of device grouping created devices in a BSD are nodes in a tree with parents and children siblings and end root tree node relationships Device connection relationships Because of device connections a sibling device can be connected to another sibling device at a connection port of each device Machine Device Group Just a device group but it is special since it is the root node of a machine tree it has no parent it can t be deleted it has no ports and it has no sibling devices each machine in a BSD has a single machine created device group Archive Data or Device State A known device group has archive data for its child devices which specifies the default and initial state for when a known device group is instantiated as a created device A known device library also has default and initial state for when it is instantiated as a created device When a BSD is saved each device s current state archive data which may be different than the original known device s archive data is saved to the
220. evice groups For example a device group exposes ports and connections so shell AvailablePorts and shell Connect etc work with a device regardless of whether it s a group or a library 15 1 4 1 Device Tree You can optionally reference a device in the parent and child grouping device tree using the syntax separator gt between device parent and child and gt Machine 1 as the root device Here are some examples using a machine and platform that just has two 4 core Node devices 1 simnow gt shell createddevices WAWcone Node 0 MA eme Necks rik 1 simnow gt shell CreatedDevices gt Machine 1 4 core Node 0 4 core Node 1 1 simnow gt shell createddevices gt Machine 1 gt 4 core Node 0 Cpu 0 AweSim Processor 0 Couga 1 AweSim Processor 1 Cous 2 AweSim Processor 2 Cours AweSim Processor 3 sledgenb 0 AMD 8th Generation Integrated Northbridge 4 1 simnow gt shell createddevices gt Machine 1 gt 4 core Node 1 Cpu 4 AweSim Processor 0 ours AweSim Processor 1 Cpu 6 AweSim Processor 2 Couey AweSim Processor 3 sledgenb 1 AMD 8th Generation Integrated Northbridge 4 172 Chapter 15 Frequently Asked Questions FAQ AMD Confidential User Manual September 12 2008 1 simnow gt shell modules MEWS Wwe 8 0 shell 0 Cpu 0 sledgeldt 0 sledgenb 1 sledgenb 0 Cos iL Cow 32 Cpu 3 sledgeldt 1 Cpu 4 Cpu 5 Com Cou
221. evices are completely represented by the lines between devices Debugger 1 AweSim Processor Emerald Graphics Dimm Ban AMD 8th Generation 8151 AGP Integrated Tunnel 2 Northbridge 3 Winbond W83627HF AMD 8171 1 0 Hub PCI Bus 6 SIO 7 Memory Device 8 Figure 6 1 Solo bsd Configuration The thickness of the connection between devices represents the number of existing connections 6 1 BSD Files A BSD file contains the configuration of a computer system how models are connected together and their settings sometimes called a virtual motherboard description and a checkpoint of the state of all devices in the simulator BSD files are stored in the simulator s home directory For a list of BSD files provided with the simulator see Appendix A 2 1 on page 184 6 2 Device Placement To place a device into a simulated computer system Chapter 6 Create a Simulated Computer 45 AMD Confidential User Manual September 12 2008 1 Open a new simulator instance by launching SimNow exe in your install directory Select File New BSD or click on the button to create a new BSD file Select View Show Devices or click on the l button to show the blank Device Window For each item added click and drag the icon from the device list on the left side into the workspace area on the right side of the window Add the Debugger device This device needs no connections drawn Add the AweSim Pr
222. g General Basic Display Parameters Standard Timings Color ZE gt Monitor Model ViewSonic Professional Series P815 21 CRT v Vendor Product ID EDID Structure Version EDID Extensions Vendor ID Product ID Wee E Revision 3 Serial Number 39438 Mio Week Mfg Year 16354 Version 1 Number of extensions 0 EDID Checksum 8 bit Checksum CB i Figure 7 35 Plug and Play Monitor Device Configuration Chapter 7 Device Configuration 127 AMD Confidential User Manual September 12 2008 7 26 ATI SB400 SB600 SB700 Southbridge Devices The ATI Southbridge devices provide the basic I O Southbridge functionality of the system Features include 4 or 6 SATA ports a PlIO mode IDE controller supporting 1 or 2 channels fully functinoal USB 1 1 Controller supporting legacy emulation an LPC ISA bridge an SMB 2 0 compliant controller an IOAPIC controller HPET timer and legacy AT devices 8259 PIC 8254 PIT CMOS and DMA controller The legacy AT devices have the standard behavior and IO addresses unless otherwise noted Interface The Southbridge devices have several connection points Possible connection points include a PCI bus an SMB bus an LPC bus and an upstream PCI E link The PCI bus acts as a host bus and should connect to a PCI Bus Device The SMB connects to devices such as the DIMM an SMB hub device or another SMB compatible endpoint The LPC bus p
223. g of DIMM SPD data 58 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 D Dimm Bank 45 Properties Connections 10 Logging Options Dimm 0 Dimm 1 Properties Memory Type SDRAM DDA Total Size 256 Number of Banks 1 Device Data Width 8 SPD ROM Contents Address 0 Number of SPD ROM bytes used 1 Total number of SPD ROM bytes 2 Memory Type 3 Number of row addresses 4 Number of column addresses 5 Number of physical banks on DIMM 6 Module data width low 7 Module data width high 8 Module volatge interface level lt DDR PDL Response POL O high 0 255 255 low 0 255 D Figure 7 6 DIMM Module Properties Dialog The two DIMM module configuration dialogs shown in Figure 7 6 DIMMO0 DIMM 1 provide module specific setup options for each simulated DIMM The two DIMM module configuration dialogs share the same format Note The public release of the simulator does not support any of the options shown in Figure 7 6 To change the simulated memory size please use the Memory Configurator see Section 14 2 Changing DRAM Size on page 163 Chapter 7 Device Configuration 59 AMD Confidential User Manual September 12 2008 The upper part of the dialog lists some summary information This information which is derived from the SPD data gives a quick indication of the type of device being simulated The center section of the
224. g spd 128MB registered DDR memory simnow_DDR_256M_Reg spd 256MB registered DDR memory simnow_DDR_512M_Reg spd 512MB registered DDR memory simnow_DDR_1G_Reg spd 1024MB registered DDR memory simnow_DDR_2G_Reg spd 2048MB registered DDR memory simnow_DDR_4G_Reg spd 4096MB registered DDR memory simnow_DDR2_128M spd 128MB DDR2 memory simnow_DDR2_256M spd 256MB DDR2 memory simnow_DDR2_512M spd 512MB DDR2 memory simnow_DDR2_1G spd 1024MB DDR2 memory simnow_DDR2_2G spd 2048MB DDR2 memory simnow_DDR2_4G spd 4096MB DDR2 memory simnow_DDR2_8G spd 8192MB DDR2 memory simnow_DDR2_16G spd 16384MB DDR2 memory simnow_DDR2_128M_Reg spd 128MB registered DDR2 memory simnow_DDR2_256M_Reg spd 256MB registered DDR2 memory simnow_DDR2_512M_Reg spd 512MB registered DDR2 memory simnow_DDR2_1G_Reg spd 1024MB registered DDR2 memory simnow_DDR2_2G_Reg spd 2048MB registered DDR2 memory simnow_DDR2_4G Reg pd 4096MB registered DDR2 memory simnow_DDR2_8G_Reg spd 8192MB registered DDR2 memory simnow_DDR2_16G_Reg spd 16384MB registered DDR2 memory IBM_512_Reg spd 512MB registered DDR memory Smart_DDR_128_2_133 spd 128MB DDR memory KK KKKS LILIK 96 KSS GGG 96 96 96 96 96 96 96 9 96 9 96 9 96 96 96 96 Table 15 4 Memory SPD Files 184 Appendix A AMD Confidentia
225. g8 84 Jr AND the contents of an 8 bit register with the contents of an 8 bit register or memory operand and set rFLAGS to reflect the result VK KKK 218 Appendix A AMD Confidential User Manual September 1 a 2008 Instruction s ted Mnemonic Opcode Description ba AND the contents of a 16 bit register with the contents of a 16 bit TEST reg mem16 reg16 85 r register or memory operand and set rFLAGS to reflect the result AND the contents of a 32 bit register with the contents of a 32 bit TEST reg mem32 reg32 85 r register or memory operand and set e rFLAGS to reflect the result AND the contents of a 64 bit register with the contents of a 64 bit TEST reg mem64 reg64 85 r register or memory operand and set rFLAGS to reflect the result Exchange the contents of an 8 bit register with the contents of 8 bit XADD reg mem8 reg8 OF CO r destination register or memory e operand and load their sum into the destination Exchange the contents of a 16 bit register with the contents of 16 bit XADD reg mem16 reg16 OF Cl r destination register or memory D operand and load their sum into the destination Exchange the contents of a 32 bit register with the contents of 32 bit XADD reg mem32 reg32 OF Cl r destination register or memory Af operand and load their sum into the destination Exchange
226. ge 31 How do I create Disk images What is DiskTool See Section 4 Disk Images on page 31 How do I attach to a Hard Disk DVD CD ROM Disk or Floppy Disk image All three kinds of images including blank Hard Disk images of the desired size can be created on both Windows 64 Beta and Linux 64 Hosts with our DiskTool program provided in the simulator release package 178 Chapter 15 Frequently Asked Questions FAQ AMD Confidential User Manual September 12 2008 The usage is relatively self explanatory from its GUI and it can also be run from the command line Check out the command line options via DiskTool h So this file allows you to save a running simulation to a file At any later time you can open this file in SimNow to restore the simulation to the same point where you left off How do I access the integrated Debugger See Section 10 CPU Debugger on page 143 How do I copy files into the simulator See Section 5 2 1 Assigning Disk Image on page 38 How do I copy files out of the simulator See Section 5 2 1 Assigning Disk Image on page 38 Where can I find the POST codes Diagnostic port values of the simulation See Section 3 4 1 SimStats and Diagnostic Ports on page 24 How do I edit device configurations in SimNow See Section 3 2 Device Window on page 9 How do I change a BIOS in a BSD See Section 7 7 Memory Device Configuration Options on p
227. ge to be monitored by hardware and activates MONITOR EAX ECX EDX OF 01 C8 the monitor The address range should be of a write back memory caching type Move 64 bits representing the lower double precision data element from XMM2 Mem to XMM1 register and duplicate Move 128 bits representing packed single precision data elements from XMM2 Mem to XMM1 register and duplicate high Move 128 bits representing packed single precision data elements from XMM2 Mem to XMM1 register and duplicate low A hint that allows the processor to stop instruction execution and enter MWAIT EAX ECX OF 01 C9 an implementation dependent Si optimized state until occurrence of a class events LDDQU xmm m128 F2 OF FO r S Iesse S l O e e lt MOVDDUP xmm1 xmm2 m64 F2 OF 12 r MOVSHDUP xmm1 xmm2 m128 F3 OF 16 r MOVSLDUP xmm1 xmm2 m128 F3 OF 12 r Table 15 12 Prescott New Instruction Reference A 6 8 1 MONITOR Setup Monitor Address Opcode Instruction Description OF 01 C8 MONITOR Setup Monitor Address The simulator does not recognize this instruction Therefore the simulator generates an invalid opcode exception See Section A 6 8 1 MONITOR Setup Monitor Address on page 206 See Section A 6 8 2 MWAIT Monitor Wait on page 207 226 Appendix A AMD Confidential User Manual September 1 oe 2008 A 6 8 2 M
228. ger command line In this case address is the 32 bit address in hex of the MSR All leading zeros must be typed in the address Examples of MSR reads are shown in Table 10 4 Command Description R M00000250 Displays the contents of the MSR with an address of 0x0250 Displays the contents of the MSR with an address of 1001 SE OxCOO1001A 146 Chapter 10 CPU Debugger AMD Confidential User Manual September 12 2008 Table 10 4 MSR Read Examples 4 MSR registers can be modified by adding a Value suffix on the above command syntax Value will be assigned to the MSR register only if the value does not modify any reserved bits in the MSR If an attempt is made to modify any reserved bits the MSR write is ignored An example MSR write is shown in Table 10 5 5 This command may not allow access to all MSRs that are supported by the CPU model To view a list of all registers supported by the R command enter R on the debugger command line Command Description Assigns a value of R MC001001A 0000000004000000 0x0000000004000000 to the MSR with an address of 0xC001001A Table 10 5 MSR Write Example 10 1 8 Find Pattern in Memory The find pattern command q1 and qa can be used to search for a specific pattern in memory The pattern that is searched for can either be an ASCH string or a binary pattern If the search is for an ASCII string the noncase option see Table 10 7 Debugger Commands and Definitions on
229. gger s DB DW DD or DQ command to display the contents of a memory region in the debugger The second letter of the command specifies the display format for the dump The DB command displays byte format DW displays word format DD displays dword format and DQ displays qword format Each of these commands requires a second parameter that specifies the beginning address in hex of the memory dump A linear address can be specified by adding a L suffix to the address Similarly a physical address can be specified by adding a P suffix to the address Examples of the memory dump commands are shown in Table 10 2 After the first memory range is displayed you can repeatedly hit Enter to advance the display to the next sequential memory block Command Description Dump memory in byte format starting at physical address 0x00000010 Dump memory in word format starting at linear address OxABCD1234 Dump memory in quad word format starting at linear address 0xC001CODE DB 010 p DW abcd1234 L DQ cO0OO0lcOde L Chapter 10 CPU Debugger 145 AMD Confidential User Manual September EA 2008 Table 10 2 Debugger Memory Dump Command Examples When using Pacifica Virtualization Technology in simulation the user can tell the debugger to access memory for either the guest or the host If multiple guests are running under a hypervisor the debugger will acess memory for the last guest that has run Th
230. gister Rotate the 9 bits consisting of the carry flag and an 8 bit register or RCR reg mem8 imm8 amp CD 3 ib memory location right the number of bits specified by an 8 bit immediate value Rotate the 17 bits consisting of the RCR reg mem16 1 DI 3 carry flag and a 16 bit register or memory location right 1 bit Rotate the 17 bits consisting of the carry flag and a 16 bit register or RCR EE D3 3 memory location right the number of v bits specified in the CL register Rotate the 17 bits consisting of the carry flag and a 16 bit register or RCR reg mem16 imm8 Cl 3 ib memory location right the number of bits specified by an 8 bit immediate value Rotate the 33 bits consisting of the RCR reg mem32 1 DI 3 carry flag and a 32 bit register or memory location right 1 bit Rotate the 33 bits consisting of the carry flag and a 32 bit register or RCR reg mem32 CL D3 3 memory location right the number of C bits specified in the CL register Rotate the 33 bits consisting of the carry flag and a 32 bit register or RCR reg mem32 imm8 Cl 3 ib memory location right the number of Af bits specified by an 8 bit immediate value 210 Appendix A AMD Confidential th User Manual September 12 2008 Instruction s ted Mnemonic Opcode Description e RCL reg mem d 1 Rotate the 65 bits consisting of t
231. gister and store the result in the destination XOR the contents of a 64 bit destination register or memory XOR reg mem64 reg64 31 fr operand with the contents of a 64 bit e register and store the result in the destination XOR the contents of an 8 bit destination register with the XOR reg8 reg mem8 32 r contents of an 8 bit register or Af memory operand and store the result in the destination 220 Appendix A AMD Confidential User Manual September 1 a 2008 Instruction Supported Mnemonic Opcode Description PROTE XOR the contents of a 16 bit destination register with the XOR reg16 reg mem16 33 r contents of a 16 bit register D memory operand and store the result in the destination XOR the contents of a 32 bit destination register with the XOR reg32 reg mem32 33 r contents of a 32 bit register Ff memory operand and store the result in the destination XOR the contents of a 64 bit destination register with the XOR reg64 reg mem64 33 Ap contents of a 64 bit register Af in the destination memory operand and store the result Table 15 8 General Purpose Instruction Reference A 6 3 System Instructions This chapter describes the function mnemonic syntax and opcodes that the simulator simulates The system instructions are used to establish the operating mode access processor resources handle program and system errors and manage memory Many of these instructions
232. gister or memory location left the number of bits SHL reg mem16 imm8 CI y4 ib specified by an 8 bit immediate C value o Shift a 32 bit register or memory SHL reg mem32 1 D1 4 location left 1 bit 4 Shift a 32 bit register or memory SHL reg mem32 CL D3 4 location left the number of bits A specified in the CL register Shift a 32 bit register or memory F i location left the number of bits SHL reg mem32 imm8 C1 4 ib specified by an 8 bit immediate Ce value S Shift a 64 bit register or memory SHL reg mem64 1 Dl 4 location left 1 bit d Shift a 64 bit register or memory SHL reg mem64 CL D3 4 location left the number of bits D specified in the CL register Appendix A 215 AMD Confidential User Manual September 1 E 2008 Instruction s ted Mnemonic Opcode Description ba Shift a 64 bit register or memory y S location left the number of bits SHL reg mem64 imm8 CI 4 ib specified by an 8 bit immediate sf value Shift bits of a 16 bit destination register or memory operand to the left the number of bits specified in SHLD reg mem16 reg16 imm8 OF A4 r ib an 8 bit immediate ene while e shifting in bits from the second operand Shift bits of a 16 bit destination register or memory operand to the SHLD reg mem16 reg16 CL OF A5 Ze left the number of bits specified in Af the CL register while shifting in bits from the second
233. guration You can then configure the Dimm Bank such as by opening the device s GUI configuration properties to specify general options such as max number of dimm s and to configure each dimm such as by importing an SPD You could configure it for example to emulate a dimm bank with 2 DDR2 dimm s 1GB each Device groups offer us a potentially simpler alternative for the user to instantiate a preconfigured device group For example we could have a device group Dimm DDR2 1GBx2 which has inside it only one child and default archive data state for that child The figure below shows that the theoretical known device Dimm DDR2 1GBx2 has inside it a single child device Dimm Bank 0 that is configured with two dimm s type DDR2 1GB each E Dimm DDR 2 1GBx2 Le fg e emm e Configured as DDR2 2 dimm 1GB each Dimm Bank 0 Se E reene ee e ice Serene Figure 3 11 Example DIMM Device Group When the user instantiates this theoretical known device Dimm DDR2 IGBx2 as a created device we get a created device Dimm DDR2 1GBx2 0 with a child device Dimm Bank 0 that is already configured as DDR2 2 dimm 1GB each Our resulting main device GUI would look like this gt Machine 1 Drag Icons to insert new devices Shift drag to add connections Show Deprecated Devices ee Dimm Bank G E Dimm DDR2 1GBx2 Dimm DDR2 1GBx2 0 r e Lt Figure 3 12 Created
234. he D1 3 carry flag and a 64 bit register or e RCR memory location right 1 bit Rotate the 65 bits consisting of the carry flag and a 64 bit register or RCR reg mem64 CL D3 3 memory location right the number of sf bits specified in the CL register Rotate the 65 bits consisting of the carry flag and a 64 bit register or RCR reg mem64 imm8 CL 3 ib memory location right the number of e bits specified by an 8 bit immediate value RET es Near return to the calling procedure ei Near return to the calling procedure RET imml6 C2 iw and then pop of the specified number D of bytes from the stack RETF CB Far return to the calling procedure A Far return to the calling procedure RETF imm16 CA iw and then pop of the specified number ef of bytes from the stack Rotate an 8 bit register or memory ROL reg imm8 1 DO 0 operand left 1 bit Ce Rotate an 8 bit register or memory ROL reg mem8 CL D2 0 operand left the number of bits Ff specified in the CL register Rotate an 8 bit register or memory e operand left the number of bits ROL reg mem8 imm8 CO 0 ib specified by an 8 bit immediate Ce value Rotate a 16 bit register or memory ROL reg imm16 1 D1 0 operand left 1 bit e Rotate a 16 bit register or memory ROL reg mem16 CL D3 0 operand left the number of bits ef specified in the CL register Rotate a 16 bit register or memory i operand left the number of bits ROL reg memi6 imm8 C1 0 ib specified by an 8 bit immediate sf value Rotat
235. he NIC model to retry a mediator connection or search for any simulator peers running in the same process 7 24 2 The Mediator Daemon The mediator provides several services for the simulator session e Access to real network resources DHCP servers etc Note that the mediator will need to be run with supervisor privileges in order to snoop network traffic on its host e Bridge communication to other simulator sessions e Group individual sessions into domains so that identical BSD s with identical MAC IP pairs can be run simultaneously in separate domains e Provides an optional gateway to block broadcast traffic and to perform Network Address Translation NAT on identical BSD s in different domains The mediator can route traffic to and from the real network This operation requires low level kernel actions so the mediator must be run by a supervisor with sufficient OS privileges Users may want to have one machine on the subnet dedicated to running the mediator in this mode Client machines that connect to the mediator will not require supervisor privileges The mediator is capable of grouping certain simulator sessions into domains Domains isolate groups of simulator sessions from each other This can be useful when the user wants to run replicated groups of BSD s simultaneously The user need to ensure that each group of BSD s are using unique domains in the mediator by passing an appropriate connect string to the mediat
236. he file specified by fullpath The file format is an unformatted binary image with an extension of spd 246 Appendix A User Manual AMD Confidential September 12 2008 Automation Command Description ExportSPD lt DimmNo gt lt fullpath gt ExportSPD provides the option of saving SPD ROM data from DimmNo to the file specified by fullpath The file format is an unformatted binary image with an extension of spd ResetPDL sets all 16 PDL response ranges to their ResetPDLs lt DimmN f SE E maximum range 0 255 PDLRespRange lt DimmNo gt Sets the PDL Response Rage of memory module lt PDLNo gt lt High gt lt Low gt DimmNo and PDL PDLNo to High and Low GetPDLRespRange lt DimmNo gt lt PDLNo gt Returns the PDL response range of memory module DimmNo and PDL PDLNo GetPDLData lt DimmNo gt Lists the PDL data of memory module DimmNo Displays DIMM configuration details like GetConfig PdlRespRange MBBaseAddr OutOfRangeResp and PdlErrorSim Returns the maximum number of DIMMs that can be GetMaxDimms simulated SetMaxDimms lt num gt Sets the maximum number of DIMMs that can be simulated GetDimmDescription lt DimmNo gt Returns a short description of the memory module DimmNo It displays memory type total size number of banks and device data width in bits
237. he queued events are flushed Simulated DIMM memory is flushed and unallocated Contents of a BSD XTR Record contains xtrsvc which is described below in addition to modules in the simulation For XTR Playback the BSD is composed of following modules shell 0 The shell under which a simulation is executed xtrsvc 0 XTR service which facilitates execution of XTR Playback Debug 0 The SimNow Debugger Cpu 0 AweSim CPU Module There might be more CPUs for XTR MP xtrnb 0 XTR Northbridge In persisted BSD XTRNB which is only used during XTR Playback saves and restores events that have been queued but not triggered yet DIMM image and internal states of the XTRNB Complete XTR Playback setup also includes AweSim and optionally the AMD Debugger Please refer to the documentation of AweSim and AMD Debugger for their respective contents in the BSD file XTR Record does not store any contents in the persistent BSD file Log Messages Messages are logged only by XTRNB which is only used during XTR Playback Some of the following may only be logged when xtrnb debug is set to enable Some of the Log messages are 108 Chapter 7 Device Configuration AMD Confidential User Manual September 1 oe 2008 XTRNB Attempting to allocate large buffer of size 1074503680 Logged during XTR initialization phase just before XTR tries to allocate memory to simulate DIMM XTRNB Sending APIC initialization data to CPUO Logged during XTR i
238. hnology is compatible with existing software and should run correctly without modification The thirteen new instructions are summarized in the following section For detailed information on each instruction refer to a complete Instruction Set Reference Appendix A 225 AMD Confidential h User Manual September 12 2008 Instruction Supported Mnemonic Opcode Description PP Add Subtract packed double precision ADDSUBPD xmm1 xmm2 m128 66 OF DO r floating point number from XMM2 Mem ef to XMM1 Add Subtract packed single precision ADDSUBPS xmm1 xmm2 m128 F2 OF DO r floating point number from XMM2 Mem to XMM1 T Store ST as a signed integer Perle ee E truncate in ml6int and pop ST Store ST as a signed integer ISLIP mizing ae truncate in m32int and pop ST FISTTP m64int DD 1 Store ST as a signed integer truncate in ml6int and pop ST Add horizontally packed double HADDPD xmm1 xmm2 m128 66 OF 7C r precision floating point numbers from XMM2 Mem to XMM1 Add horizontally packed single HADDPS xmm1 xmm2 m128 F2 OF 7C r precision floating point numbers from XMM2 Mem to XMM1 Subtract horizontally packed double HSUBPD xmm1 xmm2 m128 66 OF 7D r precision floating point numbers from XMM2 Mem to XMM1 Subtract horizontally packed single HSUBPS xmm1 xmm2 m128 F2 OF 7D r precision floating point numbers from XMM2 Mem to XMM1 Load 128 bits from Memory to XMM register Sets up a linear address ran
239. ice 50 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 7 1 AweSim Processor Device The AweSim processor device provides a simulation of an AMD microprocessor Interfaces Three interfaces are used in the AweSim device CPU Bus 0 This interface is used to issue memory and I O read and write requests as well as cache control and input output signal messages This interface is generally connected to the Northbridge device Interrupt Bus This interface is used to communicate interrupt request and acknowledge messages This interface is connected to whichever device is used to generate and control interrupts typically the Southbridge device System Messages Interface This interface is used by the processor device to output ASCII and binary log information Initialization and Reset State The processor device s state at initialization is equivalent to an industry standard x86 processor at initialization The L1 cache and APIC interfaces are disabled the debugger is off and the L1 cache is configured as two 2 way 512 line and 64 byte caches When the processor device receives a reset the device resets its internal state in a manner consistent with a standard x86 processor No configuration information is modified Contents of a BSD The BSD file contains the current state of all internal processor registers state variables etc It also contains all configuration information Any memory
240. ice For SimNow developers device groups can be a technique for developing SimNow devices in a layered manner promoting optimal code reuse Before device groups were available Super devices were written as device libraries It is cleaner to implement SuperlO device models with device groups Typically SuperlO devices consist of multiple functional blocks such as a UART LPT PS2 controller Floppy controller etc Device groups provide a way to develop each functional block as discrete devices that can later be grouped to represent a particular SuperIO controller 3 3 6 Creating a Device Group In this release of SimNow the ability to create a device group is not yet exposed 3 4 Main Window The AMD SimNow Main Window shown in Figure 3 1 is the main application window It contains a Menu Bar with a set of pull down menus and a Tool Bar both of which control many aspects of the simulation environment The console window shown in Figure 3 14 provides a textual interface for status information and command line style control see Section A 7 Automation Commands on page 230 lt F SimNow 4 0 0 NDA simnow exe Using image path Images Using library path devices d simnow gt Opening C SimNow cheetah_ip bsd creating device 6 AMD 8th Generation Integrated Northbridge creating device Dimm Bank creating device AMD 8111 I 0 Hub creating device Memory Device creating dev
241. ice Winbond W83627HF SIO creating device SMB Hub Device creating device PCI Bus creating device Debugger creating device AweSim Processor creating device AMD 8132 PCI X Controller creating device PCI Bus creating device PCI Bus creating device Emerald Graphics allocate map memory creating device 13 PCA9548 Device creating device 14 AT24C Device creating device 15 USB JumpDrive creating device 16 Intel R gt Pro 1666 MT Desktop Network Adapter BSD Load completed Figure 3 14 Console Window 3 4 1 SimStats and Diagnostic Ports The SimStats and Diagnostic Ports numeric displays appear in the Main Window when a Southbridge device is added to the workspace The SimStats display shows host and simulation elapsed time and a simulation MIPS counter that is updated as the simulation runs The simulator effectively has a built in POST card output ports 80h to 87h and eh 24 Chapter 3 Graphical User Interface AMD Confidential User Manual September 1 2 2008 to e3h You can see these codes on the right upper part of the Main Window in the Diagnostic Ports section Host Seconds shows These three lines of the number of user four bytes each show and system seconds the values written to the of host CPU time the diagnostic programmed simulator has uses Simulator Stats VE UO ports Mostly these since it started ports are written by the 354 00 Host
242. ice CPUO Type SREG Item M0000026E Data 1010101010101010 gt lt Init Device CPUO Type SREG Item M0000026F Data 1010101010101010 gt lt Init Device CPUO Type SREG Item M000002FF Data 0000000000000C00 gt lt Init Device CPUO Type SREG Item M00000400 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000405 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000408 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M0000040C Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000410 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M000001D9 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M000001DB Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M000001DC Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M000001DD Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M000001DE Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000277 Data 0007010600070106 gt lt Init Device CPUO Type SREG Item M00000174 Data 0000000000000008 gt lt Init Device CPUO Type SREG Item M00000175 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000176 Data 000000008052D480 gt lt Init Device CPUO Type CPU Item MXCSR Data 0000000000001F80 gt lt Init Device CPUO
243. ice List sti henee eo e dee 10 SEO otha ani EE ee ie st 186 DEVICES Windows Eeer ee te 9 SPD ieee oa he S 186 DHCP E 122 Diagnostic Porte 24 A VI E E A nena 55 AW sanaat a a a eek sees 74 Disable USB Pofbesnnseiis iieii A 86 ACPI aara a 8 Disk Journalin gisis 39 88 Address Translation Cache 25 DiskT o lerni ne s a ege 157 AGP E 61 65 Double Fault 44 2 2 chiens deene RS 190 AMD 3DNow Technology SERIE EPR REELS rae 226 DVD CD ROM AANEREN 31 AMD 8th Generation Integrated Northbridge 82 E AMD 8111 Device eeeeceseeeeeseereeeeenereees 86 AMD 8132 PCI X Controller 14 95 BOC oie GS k E Rese ee ee 60 AMD 8151 Device roires eiaei 98 BOT eg ian ston eis eek eG eed el ee 108 AT24C Device ae n 14 103 Error EE 139 LKA KEE 104 B F Base Address AA 163 Band Rate ere dee SEN 76 Panis 5 sccsscessehetusstethsescged E EESTE 74 BIOS ROM ninos Ee 163 BA Qs AAE EET 177 BSD files ai nse MARR Ske 36 45 Flash ROM ws cvsscsssseseeessfestcahssestes cots setetsnecosntaets 79 SE DI DADA AS 190 C Floppy DiSk EE 40 RE enata rae 45 Frame Buffer ENEE 62 CHp Selectae EE 78 PRS TOR AS 190 Clearing CMS out scien bebe siete 165 FSA SEAE hhh ete tate a etiresoeet 190 EMOS es Steed chert etc ea eee eee 87 165 FS TEN V 233i oi ee ei 190 Code Generator sissies eirs 244 G Code Pages tecicise cases eniiestesctetieieesiedtien 190 COM La ett codices E E 74 EE 122 COM2 nied aie aes 74 GDB AEN TE E EEEE 152 Commit nis mak r k aie 39
244. icular hardware implementation such as an already configured Dimm DDR2 1GBx2 More generally any device can be wrapped by a device group to give an alternate default configuration for the device s state archive data 15 1 5 2 Example Quad Core Node Next we will consider examples relevant to the ability of a device group to have multiple child devices default archive data for each child device and connections between the child devices These next examples are based on a quad core processor node Building a processor node in SimNow has traditionally been a multi step process First the user would add the AMD Sth Generation Northbridge Device and then add one AweSim Processor device for each processing core in the node These devices then need to be connected together along the respective CPU Bus and Interrupt IOAPIC Chapter 15 Frequently Asked Questions FAQ 175 AMD Confidential User Manual September 12 2008 connection ports Once the devices are connected a user would then need to load a product ID file so that the simulated devices would represent a real and planned piece of hardware In summary building a Quad core node in SimNow could take as many as 14 individual steps and these steps would need to be repeated each time a processor node is to be added A device group can both simplify adding a quad core node and present the user with a hierarchical view So we will give some examples with quad cor
245. igure 7 33 illustrates multi machine communication of simulator sessions without a mediator Simulator Process BSD 2 Machine 2 04 00 00 00 0 04 10 0 0 2 BSD 1 Machine 1 BSD 3 Machine 3 02 02 02 02 02 02 06 00 00 00 00 06 10 0 0 1 10 0 0 3 Figure 7 33 Multi Machine Communication without a Mediator 7 24 1 Simulated Link Negotiation A link will appear connected in the guest system when one of the following occurs e A mediator connection has been established e There is at least one other NIC BSD running in the same process and are aware of each other When a new mediator connection string has been specified a one shot link negotiation will take place within the simulator Depending on whether a connection was made with the mediator the link will appear to be connected or disconnected on the guest If the mediator was killed and has since been restarted then the user will need to perform a linkConnect auto to restart link negotiation Similarly in a multi machine setup the first simulator session will also need to perform a linkConnect auto to ensure that the initial guest sees that other simulator peers have been connected When neither of the above conditions is met the link appears disconnected in the guest It may be necessary to re start link negotiation via linkConnect auto This will cause Chapter 7 Device Configuration 121 AMD Confidential User Manual September 12 2008 t
246. il in the AMD 8132 datasheet Each bridge defaults with hot plug functionality disabled When reset AMD 8132 takes on all default register values Contents of a BSD The entire configuration of the AMD 8132 chipset including all state and registers for its sub devices is saved in the BSD Configuration Options The Hot Plug tab options for AMD 8132 are to enable or disable hot plug for each of its PCI X bridges as shown in Figure 7 27 You cannot enable or disable hot plug after a simulation has already begun D AMD 8132 PCI X Controller 11 Properties Connections 120 Logging HotPlug HT Link Configuration C Hot Plug Bridge A Enable C Hot Plug Bridge B Enable Figure 7 27 AMD 8132 Device Hot Plug Configuration Figure 7 28 shows the HT Link Configuration options Chapter 7 Device Configuration 95 AMD Confidential User Manual September 12 2008 D AMD 8132 PCI X Controller 11 Properties Connections 1 0 Logging Hot Plug HT Link Configuration L Upstream HyperTransport Link HyperTransport Bus 0 HyperTransport Bus 1 Figure 7 28 AMD 8132 Properties Dialog The Upstream HyperTransport Link selection shown in Figure 7 28 specifies the HyperTransport Bus that will be used as a upstream link Differences from Real Hardware Clock sensitive functionality like setting bus speed is not supported Neither are system errors nor power management 96 Chapter 7 Device
247. ile which has improvements or bug fixes To check for new Matrox BIOS ROM releases go to http Awww matrox com mga support drivers bios The Matrox G400 ROM has a maximum size of 32 Kbytes and is assigned to ISA bus address 0x000C0000 OxOOOC7FFF which is the industry standard location The Configuration tab lets you choose from six different Matrox G400 graphics adapters For instance if you prefer to use a Matrox Millennium G400 SingleHead 16 Mbytes of SDRAM with a 300 MHz RAMDAC instead of the default adapter then select this adapter from the Millennium G400 Adapters list To apply the new configuration click on the Ok button Note if you make any changes in the Configuration tab you must restart or reset your simulation before the new configuration will take effect Difference from Real Hardware The Matrox G400 graphics device is a faithful simulation of the software visible portion of a Matrox G400 adapter it is not a model of the specific Matrox G400 hardware Because of this the graphics device is not equivalent in certain areas Any issues related 68 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 to timing such as the vertical retrace time will be different Any software that depends on exact timing behavior may not function correctly The following features are only partially implemented Any software that depends on these features may not function correctly
248. imulated network This configuration uses fixed MAC addresses to allow this domain to be replicated in the mediator space without colliding with one another To allow real network access we will also run the mediator with a gateway at IP address 192 168 0 1 Example MAC FA CD 21 00 00 01 IP Address Static IP address 192 168 0 2 Visibility Accesses the real network via the mediator s gateway External network hosts can not directly communicate with this client Mediator String mydomain hostname Table 7 11 Client Server Simulator Server Example MAC FA CD 22 00 00 02 IP Address Static IP address 192 168 0 3 Visibility Accesses the real network via the mediator s gateway External network hosts can not directly communicate with this client Mediator String mydomain hostname Table 7 12 Client Server Simulator Client 1 The BSD s that contain the server and client can be run simultaneously on the same network without any collisions They will require the user to input different domains in the mediator connection string see also Section 5 1 Command Line Arguments on page 35 m option 7 24 4 3 Isolated Client Server simulated network Same process This type of setup isolates the simulator sessions from the real network only allowing visibility to other simulator sessions in the same process A mediator is not required for this type of setup Example MAC
249. ine Some keystrokes such as ALT combinations must be entered using the Special Keyboard Menu The simulator superimposes a small square over the screen at the position of the host mouse You can also allow the simulator to take complete control of the mouse and keyboard by selecting Special Keyboard Grab Mouse and Keyboard To return from this mode press and hold Ctrl then Alt and then release them in reverse order 5 2 4 Simulation Reset To reset the entire simulator stop the simulation with the Stop button then press the Reset button 1 which is to the right of the Stop button At this point hard drive images may be changed as described in 5 2 1 Assigning Disk Image on page 38 5 3 Multi Machine Support The multiple machine concept allows the simulator to create multiple simulation machines within the same process space and to load and execute these machines independently The default shell provided with the simulator includes three new commands that allow the user access to the multiple machine functionality The newmachine command creates a new emtpy simulation machine The created new machine is in no way related to the current machine Tou can load BSDs edit device configurations etc in the new machine and they are completely independent of any other machine currently loaded The leading number before the prompt identifies which machine is currently the active machine All subsequen
250. ing the simnow_out named pipe Conversely external applications should send serial data to the simulation using the simnow_in pipe Note that it is not possible for two simualtor sessions to communicate with each other on the same host using named pipes This is an issue that will be fixed in a future version of the simulator When the simaultor serial port has been configuired to use the host serial port the simualtor will open dev ttyS0 or dev ttyS1 depending on wether it is COM1 or COM2 Note that the user will need to be running the simulator with root privelages to avoid an access denied error when the simualtor attempts to open the device The simulator can communicate with external applications such as a kernel debugger in this mode 154 Chapter 11 Debug Interface AMD Confidential User Manual September 1 ge 2008 12 Command API The CMDAPI cmdapi dll gives Windows users a way to script the simulator using any scripting language that can interface with the Microsoft Component Object Model COM It gives you the opportunity to create scripts that instantiate a simulator object You can use this instantiated object to execute any of the SimNow automation commands see Section A 7 Automation Commands on page 230 CMDAPI is installed and registered whenever a SimNow release package has been installed successfully After instantiating a SimNow Command object you can use the following methods to execute aut
251. ingle PCI slot It is planned that these new behaviors will be used in other devices when required Initialization and Reset State The default state of the device has all slots disabled This is because each platform configures its PCI Buses in specific ways that make it impossible to provide a generic default Since the PCI Bus device does not include any state that is altered during the course of a simulation after a reset the PCI Bus device remains unchanged Contents of a BSD The configuration of the PCI bus including which slots are enabled the device ID for each slot and the base IRQ routing pin for each slot and the connection points are saved in the BSD Configuration Options Figure 7 25 shows the PCI Bus configuration options 92 Chapter 7 Device Configuration User Manual AMD Confidential September 12 2008 B Pci Bus 6 Properties Connections 10 Logging PCI Bus Configuration PCI Slot 1 PCI Slot 2 PCI Slot 3 PCI Slot 4 PCI Slot 5 PCI Slot 6 Device ID 0 31 Base IRQ Pin 4 PCIIRQ A v 5 PCIIRQ B ze 6 PCIIRG C 7 PCIIRG D 0 Enable Slot Hew Kg ao Figure 7 25 PCI Bus Properties Dialog The first field is the Device ID of the slot This value may range from zero to 31 The second field is the Base IRQ Pin for the slot You can choose from pin A B C or D The third field is an Enable Slot By d
252. ion Table 7 7 Execution Control Flags Table 7 8 shows other internal execution control flags Some flags may be AweSim specific Execution Control Flag Value Description ECF_SMCRESTART 0x00001000 SMC detected in current translation restart required ECF_GENEXCEPTION 0x00002000 SVM virtual interrupt pending ECF_VINTR 0x00004000 INIT pin 112 Chapter 7 Device Configuration AMD Confidential User Manual September 1 Ka 2008 Execution Control Flag Value Description ECF_UNUSED 0x00008000 Unused ECF_HALT 0x00010000 We are ina HALT ECF_SHUTDOWN 0x00020000 We are ina SHUTDOWN ECF_FPUHANG 0x00040000 FPU freeze ECF_APICHOLD 0x00080000 APIC freeze ECF_IGNOREINTR 0x00100000 Ignore INTR for one instruction ECF_TRAP 0x00200000 EFlags TF bit ECF_EXECBP 0x00400000 User execution breakpoints exist ECF_LATCHEDSMI 0x00800000 A latched SMI was seen ECF_STACKEDSMI 0x01000000 A latched SMI from within an SMI ECF_LATCHEDNMI 0x02000000 A latched NMI was seen ECF_SMIEDGE 0x04000000 An SMI edge has been detected ECF_NMIEDGE 0x08000000 An NMI edge has been detected ECF_APICMSGPENDING 0x10000000 An APIC message is waiting to be handled ECF_APICACTPENDING 0x20000000 Any other APIC activity is pending ECF_DR7CODEBREAKS 0x40000000 DR7 has code breakpoints enabled ECF_LASTWASIO 0x80000000 Set if previous instru
253. ion number information for the attached processor device q lt a 1 gt noncase lt StartAddress gt l p lt L Length EndAddress gt lt Pattern gt Search physical default or linear Memory for pattern and display all or only first occurrence s Table 10 7 Debugger Commands and Definitions In general address and count values can be specified as constants hex for addresses ports and values decimal for counts and lengths or as register names For addresses the CS DS ES FS GS and SS prefixes are also allowed Address values may be suffixed by L to specify a linear address the default or P to specify a physical address Addresses may also be specified by their symbol name Precede the symbol name with a character to distinguish it from a hex constant 150 Chapter 10 CPU Debugger AMD Confidential User Manual September 12 2008 11 Debug Interface The simualtor supports Linux and Windows based debugging It is recommended to use the GDB interface to debug on Linux based hosts The kernel debugger interface can be used to debug on Windows based hosts 11 1 Kernel Debugger This only applies to the Windows version of the simulator and not to the Linux version The simulator can interact with the kernel debugger through e EXDI interface see Section 7 20 EXDI Server Device on page 104 e Serial port connection The serial ports can be configured so that
254. ion to an XMM register Sb Sh Sh SS SS SS SS Si SO Si SOS SS SE SE SU SS Sk Sl Se Se SS OS Appendix A 205 User Manual AMD Confidential September 12 2008 Instruction Mnemonic Opcode Description Supported MOVD xmm reg mem64 66 OF 6E r Move 64 bit value from a general purpose register or 64 bit memory location to an XMM register wi MOVD reg mem32 xmm 66 TE Jr Move 32 bit value from an XMM register to a 32 bit general purpose register or memory location MOVD reg mem64 xmm 66 TE Jr Move 64 bit value from an XMM register to a 64 bit general purpose register or memory location MOVD mmx reg mem32 Jr Move 32 bit value from a general purpose register or 32 bit memory location to an MMX register MOVD mmx reg mem64 Jr Move 64 bit value from a general purpose register or 64 bit memory location to an MMX register MOVD reg mem32 mmx Jr Move 32 bit value from an MMX register to a 32 bit general purpose register or memory location MOVD reg mem64 mmx Jr Move 64 bit value from an MMX register to a 64 bit general purpose register or memory location MOVMSKPD reg32 xmm 66 50 r Move sign bits 127 and 63 in an XMM register t0 a 32 bit general purpose register MOVMSKPS reg32 xmm OF 50 Jr Move sign bits 127 95 63 31 in an XMM register to a 32 bit general
255. is was supposed to allow support for both the 5304 default and 5312 cards the 5312 support is not well tested Image lt Vol gt lt Image file gt Creates a volume for the give disk image For e g raid image 0 i cOd0 img GetImage lt Vol gt Displays the disk image for the given volume Appendix A 245 User Manual AMD Confidential September 12 2008 Automation Command Description Journal lt Vol gt 011 Enables 1 or disables journaling for specified volume AddJournal lt Vol gt lt Journal file gt Creates a journal for the given volume number For file based journal raid addjournal O i c0dOjl jrn for in memory journal raid addjournal 0 ResizeJournal lt Vol gt lt Old Journal gt lt New Journal gt Resizes the journal for the given volume to the new journal parameters Commit lt Vol gt Commit copies back the modified data blocks from the journal to the disk image and clears the journals Clear lt Vol gt Clears the volume discards any changes made to the volume Flatten lt Vol gt Deletes the journal added last for that particular volume Status lt Vol gt v r Displays the status for the RAID device or a particular volume v option displays details regarding the statistics of performance meters implemented in the RAID device while r option resets the performance counters SetDBC
256. it register or SAR reg mem16 1 DI 77 memory operand right 1 bit 4 Shift a signed 16 bit register or SAR reg mem16 CL D3 7 memory operand right the number of Af bits specified in the CL register Shift a signed 16 bit register or memory location right the number of SAR EE GI EE bits specified by an 8 bit immediate sf value Shift a signed 32 bit register or SAR reg mem32 1 DI 7 memory location right 1 bit 4 Shift a signed 32 bit register or SAR reg mem32 CL D3 7 memory operand right the number of ei bits specified in the CL register Shift a signed 32 bit register or g memory operand right the number of SAR reg mem32 imm8 Ste bits specified by an 8 bit immediate sf value Shift a signed 64 bit register or SAR reg mem64 1 E memory operand left 1 bit sw Shift a signed 64 bit register or SAR reg mem64 CL D3 7 memory operand right the number of e bits specified in the CL register Shift a signed 64 bit register or memory operand right the number of SAR reg mem64 imm8 Cl 7 ib bits specified by an 8 bit immediate Ce value 4 Subtract an immediate 8 bit value SBB AL imme mtd from the AL register with borrow w Subtract an immediate 16 bit value pee eee a from the AX register with borrow sw Subtract an immediate 32 bit value SBB EAX imm32 sagas from the EAX register with borrow 4 e Subtract an immediate 32 bit value SBB RAXA MM2 Dad from the RAX register with borrow 4 Subtract an immediate 68 bit value SBB r
257. k PHYSICALDRIVE2 E Create Blank Disk Image Drive Information Floppy Disk A Erase Host Disk No disk present Figure 13 2 DiskTool GUI Window You may select any physical drive in your system including floppy drives Selecting a drive updates the Drive Information list box as shown in Figure 13 3 Note DiskTool does not support Serial ATA SATA drives WW SimNow DiskTool Physical Drives A H PHYSICALDRIYE1 DI Copy Disk Image To Host Disk PHYSICALDRIVE2 E Create Disk Image From Host Disk Create Blank Disk Image Drive Information Physical Drive 0 WDC WD1200BB 00DAA1 Erase Host Disk 48Bit LBA LBA Sectors 234375000 Total Capacity 111 8 GB Figure 13 3 DiskTool Drive Information 160 Chapter 13 DiskTool AMD Confidential User Manual September 12 2008 When a drive is selected you have the option to get an image from the drive put an image onto the drive or erase the contents of the drive If you erase the contents of the drive a dialog will ask for confirmation that you actually wish to permanently destroy the contents of that hard disk In case DiskTool displays an Operation failed message box DiskTool was unable to lock or unlock the drive This can happen if for example any files or explorer windows are open on any of the partitions on the selected drive For example if the drive that DiskTool is trying to access has partitions for C and D and an exp
258. l User Manual September 1 ge 2008 In order to use unbuffered DDR DDR2 memory we recommend using the simnow_DDRx_yyyy_ spd SPD files To use buffered DDR DDR2 memory use the simnow_DDRx_yyyy_reg spd SPD files for DDR2 x 2 and yyyy size in Mbytes A 3 Supported Guest Operating Systems Table 15 5 lists the guest OS compatibility matrix Operating System Known Issues Windows 2000 UP No known issues Windows XP 32 Bit UP No known issues Windows XP 32 Bit MP No known issues Windows XP 64 Bit UP No known issues Windows Server 2003 32 Bit UP No known issues Windows Server 2003 64 Bit UP No known issues Windows Server 2003 64 Bit MP No known issues Windows Vista 32 Bit 64 Bit UP MP No known issues Windows Server 2008 No known issues MS DOS No known issues Linux 32 bit 64 bit RedHat SuSE UP MP Kernel versions 2 4 and 2 6 are all known to work Hangs during PCMCIA probe when the VESA SUSE LiveCD 9 1 BIOS Extension is enabled and the active VESA Mode is not 1024x768 SUSE LiveCD 9 2 No known issues SUSE LiveCD 9 3 No support for initial graphical setup screen Setup screen will appear in text mode SUSE 10 1 No known issues Red Hat Enterprise Linux 4 No known issues Solaris x86 No known issues Solaris 10 for AMD64 No known issues Table 15 5 Supported Guest Operating Systems The simulator has recently but not spe
259. l Contains the Emerald BIOS changes and analyzer header files fi tools Contains utilities used to prepare images and register components for the simulation 1 Under Windows each model is a Windows DLL Under Linux each model is a Linux library Each model has a bel extension 2 4 Setting up Linux for the Simulator Make a file etc sysctl conf or add to the existing one This is here to make sure we get enough mmap able virtual address space in 4K pages It defaults to 65536 which is generally OO eme vm max mep count 1048576 This line doesn t need to be here for newer Linux kernels but some early AMD64 Linux kernels would log SEGVs even if a process had a handler for them which is what SimNow does debug exception trace 0 Example 2 1 Setting up Linux for the Simulator Then run sysctl p or make sure the boot sequence does this if you don t want to run it at each reboot Newer Linux distributions may set a per process memory limit by default SimNow allocates a large amount of memory that is never touched This untouched memory will not be backed by DRAM or swap but Linux counts it against SimNows process memory limit when it comes to resource limits 4 Chapter 2 Installation AMD Confidential User Manual September 12 2008 You can unset the per process memory limits by running the following commands as root ulimit m unlimited Lamas Sw met cee 2 5 Configuration File The simu
260. l network but cannot be seen by other simulator sessions outside of its domain This class of MAC address allows a user to simultaneously run identical BSD s using unique domains This class of MAC addresses will not receive broadcast traffic such as ARP s Allocations of fixed MAC addresses need to be coordinated such that they are not replicated in the same mediator domain 7 24 4 Example Configurations MAC address assignment was designed to satisfy many usability needs Table 7 10 shows a list of possible usage models for the simulator and MAC Address assignments 7 24 4 1 Absolute NIC This configuration mimics plugging in a physical computer into whatever network your mediator is running on The user must select a MAC Address that is not duplicated anywhere else on the mediator s subnet All broadcast and targeted network traffic will be routed to a simulator session using this classification of MAC Address This provides maximum visibility for the simulator session Example MAC FA CD 00 00 00 01 IP Address Any Can be a static IP address assigned by your sys admin or a Chapter 7 Device Configuration 123 AMD Confidential User Manual September 1 2 2008 DHCP acquired address Visibility Can be seen by external network and all simulator sessions running anywhere on the network Mediator String Hostname Table 7 10 MAC Address Assignments 7 24 4 2 Client Server s
261. lation cannot be restarted until a reset is asserted but the simulation state can be inspected with the simulator s debugger A 5 3 Performance Monitoring Counter Extensions Setting CR4 PCE bit 8 to 1 allows software running at any privilege level to use the RDPMC instruction Software uses the RDPMC instruction to read the four performance monitoring MSRs PerfCTR 3 0 Clearing PCE to 0 allows only the most privileged software CPL 0 to use the RDPMC instruction The simulator does support the RDPMC instruction but there is no logic behind the simulated performance counter MSRs A 5 4 Microcode Patching Microcode patches do not affect the simulated machine behavior This may have unintended consequences A 5 5 Instruction Coherency Instruction coherency does not work when code pages have multiple virtual mappings Here is an example that would not work right There is an x86 physical page that has code on it This page is mapped by two different virtual addresses A and B There is a store to virtual page A We execute code from page B We store again to A modifying some of the x86 code that we executed in step 4 We execute the code from step 4 again ON a Se 188 Appendix A AMD Confidential User Manual September 12 2008 The code we execute in step 6 will probably be the old code because our page based coherency mechanism depends on the software TLB to write protect pages which have x86 code that has been
262. lations Translations Percent of tcache containing Valid Translations Figure 3 16 CPU Translation Graph 3 4 2 2 Real MIPS Graph The Real MIPS Graph updates once a second If this value exceeds what can be displayed on this graph the graph line turns red It shows the instantaneous MIPS i e how many millions of instructions per host CPU second at which the simulator is running A value of zero will appear as a one pixel high horizontal line Full scale represents 100 MIPS Chapter 3 Graphical User Interface 25 AMD Confidential User Manual September 1 E 2008 Real MIPS Graph Million of Exceeds 100 Instructions per MIPS Host CPU second Figure 3 17 CPU Real MIPS Graph 3 4 2 3 Invalidation Rate Graph The Jnvalidation Rate Graph updates once a second If this value exceeds what can be displayed on this graph the graph line turns red A rate of zero will appear as a horizontal line one pixel high Full vertical scale represents one invalidatated translation per thousand simulated instructions The lower darker color represents plain invalidations The upper lighter color represents range invalidations This upper lighter color is a minimum of one pixel high i e a value of zero range invalidations still results in a one pixel high line of the lighter color Plain invalidations Invalidation Rate Graph Range Invalidations Exceeds what can be displayed Figure 3 18 CPU Invalidation Graph
263. lator s configuration file is a text file that may be edited and that is stored in different locations depending on which host OS you are using If you are using Windows as host operating system the configuration file is located in C Documents and Settings All Users Application Data simnowrc If you are using Linux as host operating system the configuration file is located in SHOME qt simnowrc Here is an example of the contents of this file with an explanation General UserKeys CLL ESC Sends a EE Een chs uer ee om tD OL Sil 9D ALT F4 Sends an ALT F4 to the application 38 3e be b8 UserBottons BUTTON0 MyIconPath MyIcon png cpu name The configuration file is divided into sections with each section title enclosed in square brackets This particular example includes three sections named General UserKeys and UserBottons All user key definitions are stored in the UserKeys section Each user key definition is defined by a single line This example defines two user keys The string to the left of the equal sign is the string that will be placed in the menu To the right of the equal sign are two strings separated by a comma The first string is the text that is displayed when the user clicks on the What s This help button and the second string is the list of scan codes that are sent when this menu item is selected The two examples shown are merely duplicates of the normal CTL
264. lector and 32 bit offset reg Operand of unspecified size in a GPR register reg8 Byte 8 bit operand in a GPR register reg16 Word 16 bit operand in a GPR register reg 16 32 Word 16 bit or doubleword 32 bit operand in a GPR register reg32 Doubleword 32 bit operand in a GPR register reg64 Quadword 64 bit operand in a GPR register reg mem8 Byte 8 bit operand in a GPR register or memory reg mem16 Word 16 bit operand in a GPR register or memory reg mem32 Doubleword 32 bit operand in a GPR register or memory Appendix A 191 AMD Confidential User Manual September 12 2008 reg mem64 Quadword 64 bit operand in a GPR register or memory relSoff Relative address in the current code segment in 8 bit offset range rell6off Relative address in the current code segment in 16 bit offset range rel32off Relative address in the current code segment in 32 bit offset range segReg or sReg Word 16 bit operand in a segment register ST 0 x87 stack register 0 ST i x87 stack register i where i is between 0 and 7 xmm Double quadword 128 bit operand in an XMM register xmml Double quadword 128 bit operand in an XMM register specified as the left most first operand in the instruction syntax e xmm2 Double quadword 128 bit operand in an XMM register specified as the right most second operand in the instruction syntax e xmm mem64
265. led Returns enabled if file logging is enabled otherwise it returns disabled SetLogFileEnabled lt 011 gt Enables or disabled file logging 0 disables file logging 1 enables file logging LogDevice lt Device Name gt lt 0 1 gt Enabled 1 or disables 0 device logging for lt device gt LoggingEnabled lt Device Name gt Returns the logging status of device lt Device Name gt This automation command returns enabled or disabled ErrorLogFile Returns the current Error Log file name Default is simnow errlog SetErrorLogFile lt filename gt Sets the Error Log file name ErrorLogFileEnabled Returns enabled if error file logging is enabled otherwise it returns disabled SetErrorLogFileEnabled lt 011 gt Enables or disabled error file logging 0 disables error file logging 1 enables error file logging 230 Appendix A AMD Confidential User Manual September 12 2008 Automation Command Description Memdump lt FileName gt Set the memory dump file name Reset Resets the simulation see also Section 3 1 Tool Bar Buttons on page 7 CreatedDevices Lists all created devices AddDevice lt Device Name gt lt x gt lt y gt Creates a device and adds the device to the device window at position x y x and y are pixel coordinates inside the device window Connections lt Devi
266. lorer window is open on any path within D then DiskTool won t be able to lock or unlock that drive and DiskTool will display an Operation failed message box If you put an image onto the drive a dialog will again ask for confirmation that you actually wish to permanently destroy the contents of that hard disk Then a dialog prompts for the location of the image file that should be placed on that hard disk A progress bar Figure 13 4 will inform you of the progress being made If you get an image from a drive a dialog window will prompt for the path of file that will store the disk image A progress bar will inform you of the progress being made WW Blank Image C en_windows_xp_professional_x64 hdd AAAA AAAA oz Cancel Figure 13 4 DiskTool Progress Window Chapter 13 DiskTool 161 AMD Confidential User Manual September 1 2 2008 This page is intentionally blank 162 Chapter 13 DiskTool AMD Confidential User Manual September 12 2008 14 BIOS Developer s Quick Start Guide This section provides you with instructions on how to perform common tasks within the simulation environment The tasks described in this section are likely to be of particular interest to BIOS developers However developers of other types of software will benefit as well especially from tasks like logging CPU cycles and using the debugger 14 1 Loading a BIOS Image 1 Move the BIOS ROM image into your Images di
267. low CF 0 e JNB rel32off OF 83 cd Jump if not below CF 0 A JNC rel8off 73 cb Jump if not carry CF 0 ef JNC rell6off OF 83 cw Jump if not carry CF 0 A JNC rel32off OF 83 cd Jump if not carry CF 0 A JAE rel8off 73 cb Jump if above or equal CF 0 A JAE rell6off OF 83 cw Jump if above or equal CF 0 Af JAE rel32off OF 83 cd Jump if above or equal CF 0 ei JZ rel8off 74 cb Jump if zero ZF 1 Af JZ rell6off OF 84 cw Jump if zero ZF 1 e JZ rel32off OF 84 cd Jump if zero ZF 1 ei JE rel8off 74 cb Jump if equal ZF 1 ei JE rell6off OF 84 cw Jump if equal ZF 1 e JE rel32off OF 84 cd Jump if equal ZF 1 A JNZ rel8off 75 cb Jump if not zero ZF 0 ei JNZ rell6off OF 85 cw Jump if not zero ZF 0 A JNZ rel32off OF 85 cd Jump if not zero ZF 0 A JNE rel8off 75 cb Jump if not equal ZF 0 e JNE rell6off OF 85 cw Jump if not equal ZF 0 ei JNE rel32off OF 85 cd Jump if not equal ZF 0 ei JBE rel8off 16 cb Torp ds below or equal CF or ZF w JBE rell6off OF 86 cw eg below or equal CF or ZF w JBE rel320ff OF 86 cd a below or equal CF or ZF A JNA rel8off 76 cb Jump if not above CF 1 or ZF 1 ef JNA rell6off OF 86 cw Jump if not above CF 1 or ZF 1 Af JNA rel32off OF 86 cd Jump if not above CF 1 or ZF 1 A JNBE rel80ff 77 cb Jump EE below or equal CF 0 or A JNBE rell6off OF 87 cw GE SE below or equal CF 0 or w JNBE rel320ff OF 87 cd ae Ti below or equal CF
268. lso be de asserted manually by using the debugger Chapter 7 Device Configuration 97 AMD Confidential User Manual September 12 2008 7 16 AMD 8151 AGP Bridge Device The AMD 8151 AGP Bridge Device tunnel is a HyperTransport tunnel that provides an AGP bridge In general AMD 8151 would be connected in a_non coherent HyperTransport chain between the host bridge and the Southbridge Interface The AMD 8151 has three types of interfaces HyperTransport AGP and INT IOAPIC buses The AMD 8151 has two HyperTransport links HTO and HT1 that can connect to other non coherent HyperTransport link capable devices HTO should be connected to the upstream link the one closest to the host bridge and HyperTransport should be connected to the downstream link The AGP interface should be connected to an AGP graphics device The INT_IOAPIC bus should be connected to the Southbridge it routes interrupt signals from the AGP bus to the Southbridge Initialization and Reset State When first initialized or reset the AMD 8151 registers are set to their default state This is described in detail in the AMD 8151 datasheet Contents of a BSD The current state of all PCI configuration registers and any internal state variables are saved in the BSD Configuration Options The AMD 8151 device allows you to set its Revision number as shown in Figure 7 29 E AMD 8151 AGP Tunnel 2 Properties Connections 1 0 Logging 8151 Rev 8151 Rev
269. mages lt spdfile gt Please be advised that memory configurations that are too large will slow down the simulation significantly and may also confuse some BIOS s Note The public release of the simulator supports only up to four GB of simulated memory Chapter 14 BIOS Developer e Quick Start Guide 163 AMD Confidential User Manual September 12 2008 WW Memory Configurator Choose an available memory configuration from list below then press the Get Memory Config button to perform the change This is only for generic memory size configuration in powers of 2 For specific or non symmetric DIMM configurations please go to the DIMM device s configuration pagels and load or clear individual SPD ROM files as necessary CAUTION It is easy to set memory configurations that would be far too large to simulate conveniently The memory size set here is allocated by SimNow directly in Host memory If you lack sufficient memory in your host then SimNow may hang S12 Megabytes Iv Set Memory Config Figure 14 1 Memory Configurator Note The public release of the simulator supports no specific or non symmetric DIMM configurations To change the simulated memory size please use the Memory Configurator If you want specific or non symmetric DIMM configurations please follow these steps 1 Use View Show Devices to show the Devices Window 2 Right click on the DIMM memory device icon in the Device Wi
270. match the size of the physical banks on each DIMM If the memory interface is 128 bits then the memory arrays are sized to the sum of the physical bank pairs that make up the virtual banks For example Virtual bank is the combination of physical bank on DIMMO and physical bank on DIMM1 If physical bank on each DIMM is 32MB in size then the array allocated for virtual bankO is sized at 64MB Each virtual bank is handled like it is one large bank rather than two combined smaller banks The model does not distinguish between addresses that hit in the upper physical bank and addresses that hit in the lower physical bank Memory read and write messages sent to the DIMM Device use the same structure for both 128 bit and 64 bit interfaces Each message includes a bank select field an address field and a data size field The bank select field implements the CS7 0 lines while the address field specifies the beginning offset within the bank virtual bank and the data size field specifies the size of the datum Interfaces The DIMM device is implemented as a single interface device However the device accepts two distinct classes of messages RAM read write messages and SMBUS reads of SPD data In most system configurations the DIMM device is connected to a Northbridge device s DIMM interface as well as a Southbridge device s SMBUS interface Initialization Reset State On creation of the DIMM device all RAM arrays are set to all ones and SPD
271. mber of v bits specified in the CL register Rotate the 17 bits consisting of the carry flag and a 16 bit register or RCL reg mem16 imm8 amp GI 2 ib memory location left the number of bits specified by an 8 bit immediate value Rotate the 33 bits consisting of the RCL reg mem32 1 D1 2 carry flag and a 32 bit register or memory location left 1 bit Rotate the 33 bits consisting of the carry flag and a 32 bit register or RCL reg mem32 CL D3 2 memory location left the number of C bits specified in the CL register Rotate the 33 bits consisting of the carry flag and a 32 bit register or RCL reg mem32 imm8 CL 2 ib memory location left the number of bits specified by an 8 bit immediate value Rotate the 65 bits consisting of the RCL reg mem64 1 D1 2 carry flag and a 64 bit register or memory location left 1 bit Rotate the 65 bits consisting of the carry flag and a 64 bit register or RCL reg memo4 C1 D3 2 memory location left the number of Ce bits specified in the CL register Rotate the 65 bits consisting of the carry flag and a 64 bit register or RCL reg mem64 imm8 Cl 2 ib memory location left the number of bits specified by an 8 bit immediate value Rotate the 9 bits consisting of the RCR reg mem8 1 DO 3 carry flag and an 8 bit register or memory location right 1 bit Rotate the 9 bits consisting of the carry flag and an 8 bit register or RCR reg mem8 CL D2 3 memory location right the number of C bits specified in the CL re
272. memory SAL reg mem16 CL D3 4 location left the number of bits e specified in the CL register Shift a 16 bit register or memory F location left the number of bits SAL reg mem1 6 imm8 C1 4 ib specified by an 8 bit immediate sf value Shift a 32 bit register or memory SAL reg mem32 1 SS location left 1 bit 4 Shift a 32 bit register or memory SAL reg mem32 CL D3 4 location left the number of bits Af specified in the CL register Shift a 32 bit register or memory e location left the number of bits SAL reg mem32 imm CL y4 22 specified by an 8 bit immediate wf value Shift a 64 bit register or memory SAL reg mem64 1 E lecation left 1 bit 4 Shift a 64 bit register or memory SAL reg mem64 CL D3 4 location left the number of bits e specified in the CL register Shift a 64 bit register or memory e location left the number of bits SAL reg mem64 imm8 C1 720 specified by an 8 bit immediate L i value 4 Shift an 8 bit register or memory SHL reg mem8 1 DO 4 location left 1 bit 4 Shift an 8 bit register or memory SHL reg mem8 CL D2 4 location left the number of bits Af specified in the CL register Shift an 8 bit register or memory 3 location left the number of bits SHL reg mem8 imm8 EP 4 ib specified by an 8 bit immediate C value S Shift a 16 bit register or memory SHL reg mem16 1 DI oe Logation left 1 bit sw Shift a 16 bit register or memory SHL reg mem16 CL D3 4 location left the number of bits Ff specified in the CL r
273. ment of the lt HostPathName gt does not contain wildcards and points to a directory then is assumed The image path name lt ImagePathName gt must be the name of a directory If it does not exist it will be created ExportDir lt ImagePathName gt lt HostPathName gt Exports a directory from the jump drive to the host system The image path name lt ImagePathName gt can contain wildcards in the last element If the last element of the lt ImagePathName gt does not contain wildcards and points to a directory then is assumed The host path name lt HostPathName gt must be the name of a directory If it does not exist it will be created Dir lt ImagePathName gt Shows the contents of the directory path given by lt magePathName gt Free Shows the amount of free space on the JumpDrive device Size lt Size in MB gt This command is identical to the Initialize command only it does not create a FAT32 partition on the drive It simply sets the physical size of the device Any formatting or initialization will still need to be done presumably by the simulated operating system To initialize the JumpDrive and copy data to it 1 simnow gt jumpdrive initialize 64 This creates a 64 Mbyte FAT32 partition on the JumpDrive The following example copies the file C test bin to the JumpDrive and places it in the tmp directory If the tmp directory does not exits on the
274. mreg2 m64 OF OF 9A Packed floating point subtraction e o ra aa Packed floating point reverse PFSUBR mmreg1 mmreg2 m64 OF OF AA SE E ei o GE Packed 32 bit integer to floating PI2FD mmregl1 mmreg2 m64 OF OF OD EE e Multiply signed packed 16 bit values PMULHRW mmreg1 mmreg2 m64 OF OF B7 with rounding and store the high 16 ef pits Prefetch processor cache line into PREFETCH PREFETCHW OF OD Ll data cache Dcache ef Table 15 10 3DNow Instruction Reference A 6 7 Extension to the 3DNow Instruction Set This section describes the five new DSP instructions added to the 3DNow Instruction set Instruction Supported Mnemonic Opcode Description PP Packed floating point to integer Gees OF OF 1C word conversion with sign extend 4 Packed floating point negative PFNACC mmreg1 mmreg2 m64 OF OF 8A ee DEN e Packed floating point mixed Ee DE OF 8E positive negative accumulate 4 Packed 16 bit integer to floating PI2FW mmregl1 mmreg2 m64 OF OF 0C polak Ee e PSWAPD mmregl mmreg2 m64 OF OF BB Packed swap double word Af Table 15 11 Extension to 3DNow Instruction Reference A 6 8 Prescott New Instructions Prescott New Instruction technology for the x64 architecture is a set of 13 new instructions that accelerate performance of Streaming SIMD Extension technology Streaming SIMD Extension 2 technology and x87 FP math capabilities The new tec
275. ms Recommended Enable write combining Figure 7 12 Enable Full Hardware Acceleration on WindowsXP guest Enabling Hardware Cursor Support Please follow the following steps to enable native hardware cursor support on Windows platforms 1 Install latest Matrox G400 drivers 2 Reboot computer 3 Right click on My Computer and select Properties 4 Click on Advanced Performance and then on Settings 5 Uncheck Show shadows under mouse pointer checkbox 6 Click on Apply Chapter 7 Device Configuration 73 AMD Confidential User Manual September 12 2008 7 6 Super lO Devices Winbond W83627HF SIO ITE 8712 SIO Device models of the Super IO device contain the keyboard PS 2 mouse floppy COM1 COM2 LPT1 IR fan GPIO MIDI and joystick devices as well as PCI support and control information The COM and COM2 devices create named pipes SimNow Com1 and SimNow Com2 and send all serial communication through these Interfaces The Super IO device model has a single interface connection and is connected to the LPC connection of the Southbridge device Initialization and Reset State The following conditions represent the keyboard and or mouse during initialization and reset state A20 and reset released Mouse scaling set to 1 Mouse resolution set to 4 Stream mode off Mouse sample rate set to 100 All sticky keys released Keyboard output port set
276. n the host To do this mount a hard drive image on the host after placing the data on it in the guest On a Linux host you can use the loopback device 5 2 2 Run The Simulation Once the disk images are assigned the simulation may be started by clicking on the Play button on the Main Window s Tool Bar 1 AMD SimNow Main Window File View Special Keyboard Help d H H Js Wda aA deg Oo o e Numeric Display s EI Simulator Stats IDE Primary Display IDE Secondary Display Diagnostic Ports C Floppy Display 58 30 Host Seconds 8 704 masterread 919 552 masterread 00 02 03 FF 83 80 1 496 read 16 11 Sim Seconds 512 master written O master written 00 00 00 00 87 84 501 written 19 9 Avg MIPS D slave read D slave read 00 00 00 Dei e D slave written D slave written 0 26 MIPS PIO PIO mode PIO PIO mode Figure 5 4 Installing WindowsXP 40 Chapter 5 Running the Simulator AMD Confidential User Manual September 1 g 2008 5 2 3 Interaction with the Simulated Machine The simulator will boot and the simulated output screen appears in the bottom right portion of the Main Window which is the Simulation Display Area When the focus is on this portion of the window most keystrokes and mouse operations are passed through to the simulated machine When moving the mouse cursor outside of the Simulation Display area the Main Window returns the mouse cursor and keyboard control to the host mach
277. nd 1 simnow gt shell gdb lt ENTER gt e Add the following to your gdbinit file define simnow set architecture i1386 x86 64 target remote 2222 end e Start gdb gdb gt simnow lt ENTER gt 11 2 3 Using Another Port on the Same Machine The simualtor defaults to using port 2222 but can be directed to use another port e Start the simulator e Run the following automation command 1 simnow gt shell gdb 2233 lt ENTER gt e Start gdb gdb gt set architecture 1386 x86 64 lt ENTER gt gdb gt target remote 2233 lt ENTER gt 11 2 4 Using Two Separate Machines e Start the simualtor on simnow host e Run the following automation command 1 simnow gt shell gdb lt ENTER gt e Start gdb on gdb host gdb gt set architecture 1386 x86 64 lt ENTER gt gdb gt target remote simnow host 2222 lt ENTER gt 11 3Linux Host Serial Port Communication When running the simulator on a Linux host the serial port is able to communicate with external host applications via either a named pipe or the host serial port If the user has configuired named pipe communication the simualtor will set up an input pipe and an Chapter 11 Debug Interface 153 AMD Confidential User Manual September 12 2008 output pipe at simnow comX simnow_ in and simnow comX simnow_ out External applications should read data from the simulation us
278. ndow and select the Configure Device option on the Workspace Popup Menu Figure 3 3 on page 11 3 Select the tab for the DIMM slot that you wish to alter 4 Click the Import SPD button and browse for an appropriate SPD file The SPD files should be stored in the Images directory The SPD filename should give an indication of the size of the DIMM that it represents 5 A DIMM can be eliminated from the system by changing the contents of SPD byte 0 Number of SPD Bytes Used to zero 6 Click OK to close the configuration property sheet and accept the changes 14 3 Changing SPD Data Any byte of SPD data can be altered in order to model DIMM configurations that do not currently exist The process for modifying a SPD data byte is as follows 1 Ds Use View Show Devices to show the Devices Window Right click on the DIMM Memory device icon in the Device Window and select the Configure Device option on the Workspace Popup Menu Figure 3 3 on page 11 164 Chapter 14 BIOS Developer s Quick Start Guide AMD Confidential User Manual September 1 g 2008 3 Select the tab for the DIMM slot that you wish to alter 4 Select an SPD byte description from the large list box The corresponding data byte will be shown as two hex digits in the small edit box to the right of the list box 5 Type a new hex value in the edit box 6 Optionally the altered SPD data can be saved to a file by clicking the Export SPD
279. ndows the Physical Drives list box will show you the physical drives and in parenthesis the logical drive letters that are associated with the partitions on that drive Selecting any of these physical devices causes DiskTool to display information about that device in the lower Drive Information list box DiskTool also displays information about all identified devices in a shell window The DiskTool shell window is shown in Figure 13 1 158 Chapter 13 DiskTool AMD Confidential User Manual September 1 KG 2008 c C simnow disktool exe Disk Device found at SCSI Port H Bus H Target A LUN Opening WDC WD1i26GBB GBDAAL as PHYSICALDRIVEG Cylinders Media Type Completed Device has been successfully identified Disk Device found at SCSI Port H Bus A Target 1 LUN Opening WDC WD1i26GBB GBDAAL as PHYSICALDRIVE1 Cylinders Bytes 512 Media Type 12 Completed Device has been successfully identified Disk Device found at SCSI Port 1 Bus Target 1 LUN Opening IC35L 2Q AVER 7 as PHYSICALDRIVE2 Cylinders Heads Sectors Bytes Media Type Completed Device has been successfully identified Figure 13 1 DiskTool Shell Window DiskTool will only copy drives not partitions although it does have the ability to stop copying at the end of a given partition So for example you can copy the contents of a drive starting at the beginning of the drive and ending at the end of the 2nd partition
280. nemonic Opcode Description CALL reg mem32 FF 2 Ee the target specified A CALL reg mem64 FF 2 EE the target specified w Far call direct with the target CALL FAR pntrl16 16 9A cd specified by a far pointer contained ei in Che instruction Far call direct with the target CALL FAR pntrl16 32 9A cp specified by a far pointer contained e in Che instruction Cae Te ent Gers FF 3 SE ER SC ee C Ee ER 3 Ge EE Ss Ee 4 CBW 98 Sign extend AL into AX ef CWDE 98 Sign extend AX into EAX ei CDQE 98 Sign extend EAX into RAX Af CWD 99 Sign extend AX into DX AX e CDQ 99 Sign extend EAX into EDX EAX ef CQO 99 Sign extend RAX into RDX RAX ef CLC F8 Clear the carry flag CF to zero ei CLD FC Clear the direction flag DF to A zero CFLUSH mem8 OF AE 7 Flush cache line containing mem8 A CMC F5 Complement the carry flag CF Af CMOVO regl6 reg mem16 OF 40 r Move if overflow OF 1 ef CMOVO reg32 reg mem32 OF 40 r Move if overflow OF 1 ei CMOVO reg64 reg mem64 OF 40 r Move if overflow OF 1 A CMOVNO reg16 reg mem16 OF 41 r Move if not overflow OF 0 Af CMOVNO reg32 reg mem32 OF 41 r Move if not overflow OF 0 Af CMOVNO reg64 reg mem64 OF 41 r Move if not overflow OF 0 ei CMOVB regil reg mem16 OF 42 r Move if below CF 1 A CMOVB reg32 reg mem32 OF 42 r Move if below CF 1 Ff CMOVB reg64 reg mem64 OF 42 r Move if below CF 1 Af CMOVC regl16 reg mem16 OF 42 r Move if carry CF 1 Af CMOVC reg32
281. nitialization phase just before APIC memory is initialized XTRNB Write to TSC ignored Please use M00000010 for writes to TSC Logged during XTR initialization phase XTRNB CPUO rejected Initialization SREG XXXXXXXXXX with zeros Logged during XTR initialization phase and displayed if the initialization data is invalid for the SREG This may or may not be an error in the initialization data XTRNB CPUO rejected Initialization of SREG XXXXXXXXX with specific value Logged during XTR initialization phase XTRNB Skipping write to Code patch MSR C0010020 Logged during XTR initialization phase XTRNB Processing GETMEMPTR request for XXXXXXXXXXX Denied Logged during XTR execution phase where XXXXXX is the physical address of page requested The request may be denied if it is requested for a MMIO region DEVMC_READMEM 800000007F1CAD00 296 55 8B EC 51 56 8B 75 0C DEVMC_WRITEMEM 400000007F294FD4 523 A9 17 53 80 Logged during XTR execution phase 800000007FICADOO is the address 296 is the instruction count The data following the is the data that returned and received to and from the CPU This message is logged for a READ WRITE MEMORY request but no record is present in XTR XML file for this read The data is hence served and written from and to backing store whose contents were originally initialized from the XTR binary file XTRNB Ir A03E w event time 326 Consume time 597 CPU ICount 99 01 00 XTRNB Iw AO3E w even
282. nner as a traditional device library 3 3 1 Terms If any of the language and wording used in these Device Groups sections is unclear it may help to refer to this list of terms Device A device library or device group also a known device or created device Device Library Contains binary implementation of device functionality has no child devices associated with a z bel Windows or xz bel Linux file Device Group Grouping of one or more devices libraries and groups into a single device gets its functionality through aggregation of its children and from its group specific properties aspects associated with a bsg file Known Device A device that the shell knows about i e the shell has all the necessary information to create an instance of this device Known devices appear in the left hand pane of the Device Viewer window and on the console using shell KnownDevices Created Device An instantiation of a known device All devices in a BSD are created devices Created devices appear in the right hand pane of the Device Viewer window and on the console using shell CreatedDevices Device grouping tree node relationships Because of device grouping created devices in a BSD are nodes in a tree with parents and children siblings and end root tree node relationships Device connection relationships Because of device connections a sibling device can be connected to another sibling device at a connection
283. nter and opcode of the last non control instruction completed e mem94 108env 94 byte or 108 byte x87 environment and register stack e mem512env 512 byte environment for 128 bit media 64 bit media and x87 instructions e mmx Quadword 64 bit operand in an MMX register e mmxl Quadword 64 bit operand in an MMX register specified as the left most first operand in the instruction syntax e mmx2 Quadword 64 bit operand in an MMX register specified as the right most second operand in the instruction syntax e mmx mem32 Doubleword 32 bit operand in an MMX register or memory e mmx mem64 Quadword 64 bit operand in an MMX register or memory e mmxI nem64 Quadword 64 bit operand in an MMX register or memory specified as the left most first operand in the instruction syntax e mmx2 mem64 Quadword 64 bit operand in an MMX register or memory specified as the right most second operand in the instruction syntax e moffset Memory offset of unspecified size e moffsetS Operand in memory located at the specified byte 8 bit offset from the instruction pointer e moffset16 Operand in memory located at the specified word 16 bit offset from the instruction pointer e moffset32 Operand in memory located at the specified doubleword 32 bit offset from the instruction pointer pntr16 16 Far pointer with 16 bit selector and 16 bit offset pntr16 32 Far pointer with 16 bit se
284. nterface that directs the switch which output port to forward messages to Initialization and Reset State The PCA9548 has the input value specified in its configuration dialog window Contents of a BSD The PCA9548 saves its SMB base address and input pin value Configuration Options D PCA9548 Device 10 Properties Connections 1 0 Logging SMB Config SMB Base Address Oxe0 Figure 7 15 PCA9548 SMB Configuration Properties Dialog The PCA9548 allows you to set its SMB base address 80 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 7 9 PCA9556 SMB Device The PCA9556 is a registered System Management Bus SMB interface When queried from its SMB base address it returns the value of its input pins Interfaces The PCA9556 has one output port Initialization and Reset State The PCA9556 has the input value specified in its configuration dialog window Contents of a BSD The PCA9556 saves its SMB base address and input pin value Configuration Options D PCA9556 Device 11 Properties Connections 1 0 Logging SMB Config SMB Base Address 0x30 Figure 7 16 PCA9556 SMB Configuration Properties Dialog The PCA9556 allows you to set its SMB base address and input pin values Chapter 7 Device Configuration 81 AMD Confidential User Manual September 12 2008 7 10 AMD 8th Generation Integrated Northbridge Device The AMD 8th Generation Integrated N
285. ntial th User Manual September 12 2008 Instruction EE Mnemonic Opcode Description PP GE Average of unsigned packed 8 bit PAVGUSB mmregl1 mmreg2 m64 OF OF BF values e e GE Converts packed floating point PF2ID EE mmreg2 mo4 HE HE 1D operand or packed 32 bit integer w PFACC mmregl1 mmreg2 m64 OF OF AE Floating point accumulate ef PFADD mmregl mmreg2 m64 OF OF 9E Packed floating point addition e PFCMPEQ mmregl mmreg2 m64 OF OF BO Ee E EE e G t Dacked floating point comparison PFCMPPGE mmregl mmreg2 m64 OF OF 90 greater than or egual t e oat Packed floating point comparison PFCMPGT mmreg1 mmreg2 m64 OF OF AO greater than D PFMAX mmregl mmreg2 m64 OF OF A4 Packed floating point maximum Af PFMIN mmregl mmreg2 m64 OF OF 94 Packed floating point minimum Ff ee Packed floating point PFMUL mmregl mmreg2 m64 OF OF B4 multiplication ei PFRCP mmregl mmreg2 m64 OF OF 96 Packed floating point approximation Af acap Packed floating point reciprocal PFRCPIT1 mmregl mmreg2 m64 OF OF A6 first iteration Stee Af Gau Dacked floating point reciprocal PFRCPIT2 mmregl mmreg2 m64 OF OF B6 seeend iteration step e ee Packed floating point reciprocal PFRSQIT1 mmregi mmreg2 m64 OF OF A7 square root first iteration step A Co GE Packed floating point reciprocal PFRSORT mmregi mmreg2 m64 OF OF 97 square root approximation 4 PFSUB mmreg1 m
286. ntial User Manual September 12 2008 This item checked by default disables the Fastpath Memory mechanism when Memory Space Accesses logging is enabled If this is unchecked accesses may not appear in the log WARNING Un checking this item may lead to significantly compromised performance of SimNow if large numbers of accesses are being made to the device in question For example logging all accesses to the DIMM device would make SimNow extremely slow Log Fastpath Memory Requests when Logging This item when combined with un checking Disable Fastpath Memory when Logging will log both memory space accesses and Fastpath Memory requests themselves What is then logged are slow path Memory Space Accesses and Fastpath Memory handle requests Actual calls to Fastpath Memory i e usage of Fastpath Memory handles are not logged Chapter 9 Logging 141 AMD Confidential User Manual September 1 pig 2008 This page is intentionally blank 142 Chapter 9 Logging AMD Confidential User Manual September 12 2008 10 CPU Debugger 10 1 Using the CPU Debugger The CPU Debugger provides a list of commands and their descriptions when the command is typed in the bottom line of the debug window shown in Figure 10 1 Debugger Attached to CP 0 Eax 00000000 EBX 00000000 ECx 00000000 EDX 00000F44 CPU Registers ESI 00000000 EDI 00000000 ESP 00000000 EBP 00000000 CS F000 DS 0000 ES 0000 FS 0000 GS 0000 SS 0000 EFLAGS o
287. o Section 3 1 Tool Stop Bar Buttons on page 7 The Stop command does not return until the simulation has in fact stopped or the stop has failed Close Closes a BSD file that was previously opened Open lt FileName gt Opens a BSD file Modules Lists all loaded modules Shell running returns No if simulation is Running currently not running otherwise it returns Yes Save lt Filename gt Saves the current system configuration to a file Default is simnow bsd RunTimeDuration lt time gt Runs the simualtion for the given number of microseconds and then stops the simulation GetRunTimeDuration Returns the run time duration in nanoseconds ModifyRegistry lt key gt lt value gt ModifyKey modifies and updates the given registry key with the given value LogConsoleEnabled Shell LogConsoleEnabled returns disabled if console logging is disabled otherwise it returns enabled SetLogConsoleEnabled lt 011 gt Enables or disables logging Shell SetLogConsoleEnabled I enables logging and Shell SetLogConsoleEnabled O disables logging Returns the Log Window status The status is EEN enabled or disabled SetLogWndEnabled lt 0lis Sets the Log Window status to enabled or disabled LosFile Returns the current Log file name Default is simnow log SetLogFile lt filename gt Sets the Log file name LogFileEnab
288. o have modern 3D hardware acceleration including Microsoft DirectX 9 10 support The simulator is available in two versions Public Release and Full Release Table 1 1 shows the detailed feature matrix Feature Public Release Full Release DIMM configuration Limited f No 4 Gb limitation of simulated memory Ki f Available devices Limited e Available platform definition files BSDs Limited Af Devices can be added and removed from platform definition files Ki f Connecting and disconnecting devices Ki f Ships with a variety of different CPU cores Product Files Ki w Full product support Limited f Analyzer support f f Support of simulated multi processor systems up to 16 CPUs si ef Table 1 1 Feature Overview Public Release versus Full Release To get more information about how to obtain the full release version of the simulator please send an email to simnow amd com Support of up to two cores 2 Chapter 1 Overview AMD Confidential User Manual September 1 KG 2008 2 Installation 2 1 System Requirements The AMD SimNow simulator runs on both Linux 64 for AMD systems and Windows for 64 bit AMD systems The requirements for each system are as follows Linux 64 for AMD64 Windows XP 64Bit Edition for AMD64 Any of the following 64 Bit Windows XP x64 Edition or Linux distributions for AMD64 Windows Server 2003 x64 Edition for AMD6
289. ocessor and the AMD 8th Generation Integrated Northbridge When you add the AweSim Processor CPU Simulation Stats are added to the Main Window Connect the AweSim Processor and the AMD 8th Generation Integrated Northbridge by shift click dragging from one to the other When the Connections tab of Device Properties Window appears shown in Figure 6 2 choose the CPU Bus 0 for both devices and click on Ok The connection appears as a line between the two devices on the Device Window Then create an additional connection between the two devices using the Interrupt IOAPIC Bus on each device The Device Window shows only one line for the two connections between these devices You can view the connections for each device by right clicking on the device and looking at the Connections tab in the Device Properties Window D AMD 8th Generation Integrated Northbridge 3 Proper Connections 1 0 Logging Logging Configuration Local Connection Point Remote Device Remote Connection Point CPU Bus 0 AweSim Processor 0 CPU Bus 0 CPU Bus 1 CPU Bus 2 CPU Bus 3 HyperTransport Bus 0 AMD 8151 AGP Tunnel 2 HyperTransport Bus 0 HyperTransport Bus 1 HyperTransport Bus 2 H lyperT ransport Bus 3 Interrupt IOAPIC Bus Interrupt IOAPIC Bus AweSim Processor 0 Interrupt IOAPIC Bus Memory Bus Dimm Bank 5 Generic Bus Figure 6 2 Connections Tab of Device Properties Window Add the DIMM Device Connect it to the AMD 8th
290. och An epoch in SimNow terms is the period of execution between the flushing of the translation cache It is only the period from the start of the current epoch to the issuance of the dumpprofile command that the profile will cover A 7 17 2 CPU Code Generator Commands Table 15 13 describes all available Code Generator commands and their arguments command args Description Help None Displays an overview of all available commands Displays the current state of the param None i configurable code generator parameters Displays the current value of lt parameter gt param parameter e g cpu codegen param FastFloat Sets the current value of lt parameter gt to param parameter value lt value gt For example cpu codegen param FastFloat 0 disables FastFloat Changes the current value of one boolean parameter to true For example 1 Bool P SE SE cpu Codegen enable FastFloat enables FastFloat Changes the current value of one boolean e parameter to false For example d bl Bool P z f i TIRS SE Ce cpu codegen disable FastFloat disables FastFloat ZEN Changes several parameters to the optimize accuracy i conservative setting eh Changes several parameters to the default optimize speed aggressive setting Table 15 13 CodeGen Command Overview A 7 18 Emerald Graphics 1 simnow gt emerald usage Automation Command Description FrameBufSize sets the si
291. ode Real MIPS Graph Invalidation Rate Graph Exception Rate Graph PIO Rate Graph MMIO Rate Graph Simulator status CPU Graph Simulation Display Area Area Figure 5 2 Main Window BSD Loaded You can view the configuration of the simulated machine by clicking on a A window appears with a graphical representation of the simulated machine as shown in Figure 5 3 Chapter 5 Running the Simulator 37 AMD Confidential User Manual September 12 2008 D SimNow Device Window Drag Icons to insert new devices Shifttdrag io add connections C Show Deprecated Devices 8 EE AMD 8111 1 0 Hub Debugger 8 AweSimfP Processor 0 EE AMD 8132 PCI X Controller Dimm Bank 2 AMD 8th fieneration Debugger WP AT2AC Device e P WE Processor de oe ao ss Dimm Bank 81322 Controfer 9 Ba Intel R Pro 1000 MT Desktop Network Adapter PCI Bus 11 SMB SMB Hub Devicest Emerald Graphics USB Winbond W83627HF SD ub D gt USB JumpDrive S10 5 PCI Bus 7 Intel R Pro 1000 MT Desktop Network Se Memory Device a Adapter 16 wm PCA9548 Device Emerald Graphics eo PCI Bus 12 S ano 8th Generation Integrated Northbridge W lt n wi gmp im PCA9548 Device H3 AT24C Device 14 ard En Winbond W8362 HF SIO Figure 5 3 Device Window 5 2 Installing an Operating System This section describes the steps that are necessary to install Windows or Linux using the simulator Before you can
292. of the instructions operate in parallel on sets of packed elements called vectors although some operate on scalars The instructions define both integer and floating point operations and include the legacy MMX instructions and the AMD extensions to the MMX instruction set Instruction s ka Mnemonic Opcode Description SEOTI Converts packed double precision floating point values in an XMM CVTPD2PI mmx xmm2 m128 66 OF 2D r register or 128 bit memory location to e packed doubleword integers values in the destination MMX register Converts two packed doubleword integer values in a MMX register or 64 bit CVTPI2PD xmm mmx m64 66 OF 2A r memory location to two packed double Af precision floating point values in the destination XMM register Converts packed doubleword integer values in a MMX register or 64 bit CVTPI2PS mmx xmm2 m128 OF 2A r memory location to single precision Af floating point values in the destination XMM register A 6 6 3DNow Instruction Set This chapter describes the 3DNow Instruction Set that the simulator supports and simulates 3DNow Technology is a group of new instructions that opens the traditional processing bottlenecks for floating point intensive and multimedia applications Instruction Siipported Mnemonic Opcode Description PP Fast Enter Exit of the MMX or ee OF OE floating point state C 224 Appendix A AMD Confide
293. oller USB devices which are connected to disabled USB ports won t be identified and detected by an operating system For instance in Figure 7 20 the USB Port 0 is disabled and USB Port 1 and 2 are enabled 86 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 D AMD 8111 1 0 Hub 4 Properties Primary HDD Channel Secondary HDD Channel CMOS USB 0 USB1 4 USB Port Configuration Pot Number Enabled USB Device Port D None Port 1 None Port 2 None Figure 7 20 USB Properties Dialog AMD 8111 Southbridge The CMOS dialogue window shown in Figure 7 21 gives the user the ability to change the contents of CMOS When first created the CMOS contains all zeroes to force a CMOS checksum error resulting in the default settings being loaded by BIOS The alternative to this is loading a binary file containing the CMOS desired data The user can create this file by entering changes and using the save feature to create the binary file Chapter 7 Device Configuration 87 AMD Confidential User Manual September 12 2008 D AMD 8111 1 0 Hub 4 Properties Primary HDD Channel Secondary HDD Channel CMOS USB 0 Current Values Value 10x18 0x00 0x14 0x00 0x12 0x00 0x01 0x02 0x05 0x05 0x26 Nun Cal Ces Cea E Figure 7 21 CMOS Properties Dialog AMD 8111 Southbridge The Primary HDD Channel and Secondary HDD Channel tabs shown in Figure 7 22
294. omains External Network mediator s g 192 168 0 1 G 163 1B1 0 14 163 181 0 14 192 168 0 1 Domain 2 Clients using Fixed MACs Domain 3 Same as from Domain 1 BSD 3 fa cd 00 00 00 01 myhost 8196 Figure 7 34 Visibility Diagram Chapter 7 Device Configuration 125 AMD Confidential User Manual September 12 2008 7 25 Plug and Play Monitor Device The Plug and Play Monitor device PnP Monitor conforms to the VESA Plug and Play Monitor specification and therefore supports the DDC2B standard DDC Display Data Channel is the Plug and Play standard for monitors DDC monitors are designed to meet the VESA Video Electronic Standards Association standard that defines the DDC implementation If the video card also supports the DDC standard it gets from the PnP monitor device all the information about its features and makes consequently an automatic configuration for the best refresh values depending on the selected resolution The Plug and Play monitor device supports the DDC1 and DDC2B standards DDC1 is primitive and a point to point interface The monitor is always put at transmit only mode DDC1 The monitor will continuously transmit data until the monitor will be turned off or switched to the bi directional mode DDC2 In DDC2 mode the DC protocol is being used for data transfers Interface The Plug and Play Monitor device model has a VGA and DVI interface connection Connections can be onl
295. omation commands and retrieve status Exec The Exec method executes the automation command that arg contains bool Exec argl arg2 Parameters argl A string that contains the SimNow automation command to execute For example debug 0 execcmd t arg2 An input string buffer in which SimNow is to place the response from the command in arg Return Value Returns true if command completed successfully otherwise it returns false GetLastError The GetLastError method returns the last error code If Exec returns false you can call GetLastError to retrieve the error code void GetLastError argl1 Parameters argl An input string buffer in which SimNow will place the last error that was recorded from the automation interface The Perl code in Example 12 1 shows how to instantiate a SimNow Command object and how to interact with the SimNow CMDAPI interface perl w Chapter 12 Command API 155 AMD Confidential User Manual September 12 2008 WSS Walia 2 OLB D WSS JL EE 8 WelieiLeualic p mias s SONS seu 3p Semo Win32 OLE gt new SimNow Command or die Cannot open SimNow Command n MyResponse Variant VT_BSTR VT_BYREF mi do prime eigene p SCimeliiae lt gt chomp CmdLine aie SCS naa if S cmd gt Exec CmdLine MyResponse H print SMyResponse n else Scmd gt GetLastError MyResponse prin
296. ome number of available PCI E slots to connect with endpoint devices Interface These Northbridge devices provide an upstream HyperTransport interface for communication with the Host The Downstream link is a 2x or 4x PCI E link used for communication with a SouthBridge device Several PCI E slot interfaces are also available The number of slots varies by part and platform specifications Contents of a BSD The current state of all PCI configuration registers and any internal state variables are saved in the BSD Configuration Options No configuration options currently Log Messages No logging is provided other than the global options provided by each device See Section 9 3 I O Logging on page 140 for more information Difference from Real Hardware The ATI RS480 and ATI RS780 device models do not simulate their integrated graphics processors The RS780 model does not simulate the integrated HD Audio device 130 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 7 28 AMD Istanbul Device The AMD Istnabul device is a 6 core processor node suitable for an L1 socket It emulates a planned product that derives from a revision of the AMD Family10h product line The device iteself is composed of 6 individual AweSim Processor Devices that are connected to a single AMD 8th Generation Integrated Northbridge Device For more information on Group Devices see Section 3 3 Device
297. or or supplying it on the command line using the m option see Section 5 1 Command Line Arguments on page 35 The mediator can provide one or more gateways to isolate broadcast traffic from your simulation environment A gateway will perform NAT in order to ensure that BSD s in different domains get their packets routed appropriately The simulator sessions using the mediator s gateway can continue to access network resources but are essentially hidden from the real network Table 7 9 shows command line switches that the mediator accepts Switch Description p portNum Dictates what port number the mediator will be listening on for incoming traffic It specifies the base port address used by the mediator and port usage is based off of this number The mediator s listening thread uses portNum 4 l Lists possible host adapters that the mediator can use to snoop real network traffic S Tells the mediator to snoop real network traffic Requires supervisor privileges d DeviceNum Tells the mediator which host adapter to use when snooping real 122 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 network traffic This device number will need to be one listed using the I command v v v Turns on verbose output The verbosity level gets noisier with the number of v on the command line m XX XX Denotes the two high bytes used to
298. ordered list of the commands supported by the shell please use the ausage command as shown here 1 simnow gt shell ausage To get an overview of all automation commands which are not attached to any specific device enter 1 simnow gt help Automation Command Description exec lt file gt Execute automation commands in file List shell automation commands same as usage E Se Shell usage Create a new SimNow machine and make that newmachine machine the current machine for subsequent commands Switches the current machine to the machine identified by n the given number switchmachine lt n gt listmachines Lists the SimNow machines that currently exist exit Quits the current SimNow machine quit Exits the current SimNow machine 5 Displays all automation commands which are P not attached to any specific device help The same as A 7 1 Shell To list all registered shell commands enter 1 simnow gt shell usage Automation Command Description ECHO lt Value gt Displays value to the standard output device by default the screen Exit Closes all open GUI components and exits the simulator Appendix A 229 AMD Confidential User Manual September 12 2008 Automation Command Description Quit See Exit Starts the simulation see also Section 3 1 Tool Go 7 Bar Buttons on page 7 Stops the simulation see als
299. orthbridge device supports the AMD 8th generation family of processors AMD Athlon 64 and AMD Opteron processors Although the physical processor chip has a Northbridge built in for simulation purposes the Northbridge is considered as a separate unit Features include HyperTransport technology for coherent and non coherent connections and a memory controller The integrated debugging functions of the g generation processors are not included Interface The Northbridge device has several connection points It has multiple HyperTransport bus ports that connects to the other AMD 8th Generation Integrated Northbridge devices or to HyperTransport link capable devices e g AMD 8131 PCI X device These ports are mutually exclusive and should be connected to only one other device The Northbridge also has a memory bus to the DIMM devices The CPU bus gives connection points for the CPU The final port is a system message bus port for connection with a Log device A 940 pin g generation processor part AMD Opteron has three HyperTransport ports a 754 pin Ce generation processor part AMD Athlon 64 has one HyperTransport port Initialization and Reset State When first initialized the Northbridge device is in the default state This is described in detail in the 8 generation processor PCI register specification When reset the Northbridge device takes on all default register values Contents of a BSD The BSD file contains the
300. ory For convenience you can create a desktop shortcut to launch the simulator When you run the simulator you will see the simulator s Main Window as shown in Figure 5 1 It will also open a console window shown in Figure 3 14 that is used for text interaction X 1 AMD SimNow Main Window File View Special Keyboard Help jJ amp de Figure 5 1 Main Window No BSD Loaded 5 1 Command Line Arguments This section describes the command line arguments supported by the simulator Table 5 1 shows the command line arguments Argument Description lt path gt Directory to load devices from If used it must be first f lt file gt Open the bsd file lt file gt e lt file gt Execute commands in lt file gt on startup i lt path gt Image search path for loading image files m lt path gt Mediator connection string for network adapters to use Chapter 5 Running the Simulator 35 AMD Confidential User Manual September 12 2008 Argument Description n novga Disable VGA Window c nogui Disable GUI console mode d Disable mouse and keyboard inputs to simulator r register Register the simulator with the O S as an automation server h help Print this help message Table 5 1 Command Line Arguments For instance to open the cheetah_Ilp bsd when starting the simulator you can enter the following C SimNow simnow f cheet
301. ory or register operand Loads a 32 bit general purpose register with LSL reg32 reg mem16 OF 03 r the segment limit or a selector specified in e a 16 bit memory or register operand Loads a 64 bit general purpose register with LSL reg64 reg mem16 OF 03 r the segment limit or a selector specified in e a 16 bit memory or register operand Load the 16 bit segment selector into the LTR reg mem16 OF 00 3 task register and load the TSS descriptor ei from the GDT MOV CRn reg32 OF 22 r he the contents of a 32 bit register to w o Move the contents of a 64 bit register to MOV CRn reg64 OF 22 Ze oan ei MOV reg32 CRn OF 20 r Move the contents of CRn to a 32 bit w register L Move the contents of CRn to a 64 bit MOV reg64 CRn OF 20 r register ei MOV DRn reg32 OF 21 r Se the contents of a 32 bit register to w MOV DRn reg64 OF 21 r li the contents of a 64 bit register to A MOV reg32 DRn OF 23 r Move the contents of DRn to a 32 bit A register 2 Move the contents of DRn to a 64 bit MOV reg64 DRn H sen e RDMSR OF 32 Copy MSR specified by ECX into EDX EAX ei GG Copy the performance monitor counter RDEMG GER specified by ECX into EDX EAX we RDTSC OF 3 Copy the time stamp counter into EDX EAX Af RSM OF AA Resume operation of an interrupted program A SGDT mem16 32 OF 01 0 Store global descriptor table register to w memory SGDT mem16 64 OF 01 0 Store global descriptor table register to f memory Ae 3 7 Store interrupt descripto
302. ove if sign SF 1 Af CMOVNS regl6 reg mem16 OF 49 r Move if not sign SF 0 Af CMOVNS reg32 reg mem32 OF 49 r Move if not sign SF 0 ei CMOVNS reg64 reg mem64 OF 49 r Move if not sign SF 0 ei CMOVP regl6 reg mem16 OF 4A r Move if parity PF 1 Af CMOVP reg32 reg mem32 OF 4A r Move if parity PF 1 Af CMOVP reg64 reg mem64 OF 4A r Move if parity PF 1 ei CMOVPE regl6 reg mem16 OF 4A r Move if parity even PF 1 Af CMOVPE reg32 reg mem32 OF 4A r Move if parity even PF 1 Af CMOVPE reg64 reg mem64 OF 4A r Move if parity even PF 1 Af CMOVNP regl6 reg mem16 OF 4B r Move if not parity PF 0 ei CMOVNP reg32 reg mem32 OF 4B r Move if not parity PF 0 ei CMOVNP reg64 reg mem64 OF 4B r Move if not parity PF 0 Af CMOVPO regl6 reg mem16 OF 4B r Move if parity odd PF 0 Af CMOVPO reg32 reg mem32 OF 4B r Move if parity odd PF 0 Af CMOVPO reg64 reg mem64 OF 4B r Move if parity odd PF 0 ei CMOVL reg1l6 reg mem16 OF 4C r Move if less SF lt gt OF Af CMOVL reg32 reg mem32 OF AC r Move if less SF lt gt OF Af CMOVL reg64 reg mem64 OF 4C r Move if less SF lt gt OF ei CMOVNGE reg16 reg mem16 OF AC r Se if not greater or equal SF lt gt d CMOVNGE reg32 reg mem32 OF 4C r one if not greater or equal SF lt gt Vv CMOVNGE reg64 reg mem64 OF 4C r on if not greater or equal SF lt gt Wi CMOVNL regl6 reg mem16 OF 4D r Move if not less SF OF ei CMOVNL
303. ox G400 graphics device model Guest Operating System Device Driver Version Known Issues MS DOS N A No known issues Windows 2000 5 93 009 No known issues Windows XP 32 bit 64 bit 5 93 009 1 11 00 114SE No known issues Windows Server 2003 32 bit 64 bit 5 93 009 1 11 00 114SE No known issues Windows Vista Beta 2 Build 5308 32 bit 64 bit N A VESA only No known issues Linux 32 bit 64 bit RedHat SuSE SuSE Xen Standard MGA Driver No known issues Solaris 10 for AMD64 XF86 MGA Solaris No known issues Table 7 6 Supported Guest Operating Systems Improve Graphics Performance When you run Windows in simulation and you open a menu list box tool tips or other screen element the object may open slowly To disable this option use the following steps 1 Click Start point to Settings and then click Control Panel Double click Display 3 Click Effects clear the Use the following transition effects for menus and tool tips check box click ok and then close Control Panel Or 1 Right click on My Computer and select Properties 2 Click on Advanced Performance and then on Settings 3 Select the Adjust For Best Performance option 4 Click on Apply Also make sure you have installed the Matrox G400 graphics device drivers You can download the latest Matrox Millennium G400 graphic device drivers for Windows and Linux at http www matrox com mga support drivers latest home cfm
304. pS Se Se Se Se Sb Sb Sb Sb Sb Sb SB Sb RI SISS SSIS SKISS Appendix A 207 User Manual AMD Confidential September 12 2008 Instruction Mnemonic Opcode Description Supported reg mem32 imm8 83 1 ib R the contents of a 32 bit register r memory operand and a sign extended mmediate 8 bit value wi reg mem64 imm8 83 1 ib R the contents of a 64 bit register r memory operand and a sign extended mmediate 8 bit value reg mem8 reg8 08 Jr R the contents of an 8 bit register memory operand with the contents f an 8 bit register R reg mem16 reg16 09 de R the contents of a 16 bit register r memory operand with the contents f a 16 bit register reg mem32 reg32 09 Jr R the contents of a 32 bit register r memory operand with the contents f a 32 bit register reg mem64 reg64 09 jx the contents of a 64 bit register memory operand with the contents 64 bit register reg8 reg mem8 OA t the contents ef an 8 bit gister or memory operand H a the contents of an 8 bit register h 1 regl6 reg mem16 OB Jr e R the contents of a 16 bit register the contents of a 16 bit gister or memory operand H ct eg reg32 reg mem32 OB ZS e R the contents of a 32 bit register the contents of a 22 bit gister or memory operand HE Gt Er OR reg 64 reg mem64 OB Ze
305. plementation of a 4 core node such as the theoretical AMD 4 core CPU vu configured with the theoretical product ID file amd yyyy id Or a DeerHound RevB QuadCore Socket LI configured with the product ID file Family10hDR L1_B0 id 15 1 5 3 Example SuperlO device For SimNow developers device groups can be a technique for developing SimNow devices in a layered manner promoting optimal code reuse Before device groups were available Super devices were written as device libraries It is cleaner to implement SuperlO device models with device groups Typically SuperlO devices consist of multiple functional blocks such as a UART LPT PS2 controller Floppy controller etc Device groups provide a way to develop each functional block as discrete devices that can later be grouped to represent a particular SuperIO controller 15 1 6 Creating a Device Group In this release of SimNow the ability to create a device group is not yet exposed Main Window on page 15 Please note that this mode has interaction issues with the Exceed X server on Windows if you re running a Linux hosted version of the simulator and displaying it over a network to a Windows PC desktop Why does the on line help not work on Linux Quit any local Mozilla browsers before clicking on the on line help menu items or buttons in the simulator What is SimNow software See Section 1 Overview on page 1 Is SimNow faster than my old Vax
306. plements the bits in an 8 bit register or memory operand NOT reg mem16 F7 2 Complements the bits in a 16 bit register or memory operand NOT reg mem32 F7 ZS Complements the bits in a 32 bit register or memory operand NOT reg mem64 F7 2 Complements the bits in a 64 bit register or memory operand OR AL imm8 DC ib R the contents of mmediate 8 bit value AL with an OR AX imm16 DD iw R the contents of AX with an mmediate 16 bit value OR EAX imm32 OD id R the contents of EAX with an mmediate 32 bit value OR RAX imm64 OD id R the contents of RAX with an mmediate 64 bit value OR reg mem8 imm8 80 KA ct he contents of an ct value 8 bit register r memory operand and an immediate 8 OR reg mem16 imm16 81 the contents of memory operand it value a 16 bit register and an immediate OR reg mem32 imm32 81 1 alo he contents of emory operand it value 3 a 32 bit register and an immediate OR reg mem64 imm32 81 I alo he contents of K WINK Da Dit 3 mmediate 32 bit value a 64 bit register emory operand and a sign extended OR reg mem16 imm8 83 Out OOIA0o OJH O OJO O Ole Ole GOIA OJH O R the contents of a 16 bit register or memory operand and a sign extended immediate 8 bit value
307. port of each device Machine Device Group Just a device group but it is special since it is the root node of a machine tree it has no parent it can t be deleted it has no ports and it has no sibling devices each machine in a BSD has a single machine created device group 16 Chapter 3 Graphical User Interface AMD Confidential User Manual September 12 2008 Archive Data or Device State A known device group has archive data for its child devices which specifies the default and initial state for when a known device group is instantiated as a created device A known device library also has default and initial state for when it is instantiated as a created device When a BSD is saved each device s current state archive data which may be different than the original known device s archive data is saved to the bsd file 3 3 2 Concept Diagrams A device group is a device with its own identity name description icon help file etc But it is also like a BSD in fact every BSD has a single created device group called the Machine device Tthe default user s view into SimNow is from the context of looking inside the Machine device This encapsulation of devices inside device group s results in a hierarchy tree with a Machine device group as the root node In this way a device group tree is like a folder directory tree folder is to device group as file is to device library as demonstrated in Figure 3 6 EH DE
308. ppy Images 28 3 4 6 Registry MER aere 28 3 4 7 Help Problems and Bug Reports sicacccessseiescavedccedisscbes ders coasedeanncssanedocsaeaes 29 4 lt KIVA Saige Bis n EE 31 4 1 Creating A Blank Hard Drive Image sas csscacsd so ccavadsscede tiasadeds eege ee eee eeneg 31 5 Running the Simulators fasted cistd ha eiweasi naa e Eeer 35 5 1 Command Line Arguments xo geed edd 35 5 1 1 Open a Simulation Definition Pie 36 5 2 Installing an Operating eet eege ee ee eon Bees 38 5 2 1 Assigning Disk Images iac t 5icdissiceds sees jsaesisendands Wisdaanasvebaatvendseatasseeantedapeaaees 38 522 R n We Sim AMON REESEN 40 e Interaction with the Simulated Machine 41 5 2 4 GENEE EEN 4 5 3 Ee EE Ne dE 41 D Createa Simulated Computer sinisini nei siisii iieii 45 6 1 EE 45 G2 Device Placements EE 45 6 3 Solo bsd Device Configuration NENNEN EEN tecyeansecsactusaceateaseavaaees 47 6 4 Saye and IR EE 48 De Device Copfige rati N s dsi ee Ee 49 7 1 Awe sim Processor DEVICE eaae E SEOSTE 51 De Debugger DEVICE nerenin E ie E E 54 1 3 DIMM Devici EEN 55 TA Em t ld ER EE 61 deo Matroz MG AAGA00 POU AGP Ee eege 65 7 6 Super IO Devices Winbond W83627HE SIO ITE 8712 SIO ee 74 7 1 Betreier 77 78 gt PCA9548 SMB Device Eeer ee 80 FI SPEBROSSG Aere 81 7 10 AMD 8th Generation Integrated Northbridge Device n se 82 7 11 AMD 8111 Southbridge Devices IO Hubs eee eeceeceeseeeteeeeteeeteeeees 86 EE AGUS RTE 92 SIS AMD 8131
309. r Compare the contents of a 32 bit CMP reg mem32 reg32 39 Jr register or memory operand with the Af contents of a 32 bit register Compare the contents of a 64 bit CMP reg mem64 reg64 39 r register or memory operand with the ef contents of a 64 bit register Compare the contents of an 8 bit CMP reg8 reg mem8 3A Jr register with the contents of an 8 Af bit register or memory operand Compare the contents of a 16 bit CMP regl6 reg mem16 3B r register with the contents of a 16 Af bit register or memory operand Compare the contents of a 32 bit CMP reg32 reg mem32 3B r register with the contents of a 32 e bit register or memory operand Compare the contents of a 64 bit CMP reg64 reg mem64 3B r register with the contents of a 64 e bit register or memory operand Compare the byte at DS rSI with the CMPS mem8 amp mem8 amp A6 byte at ES rDI and then increment or ef decrement rSI and CDI 198 Appendix A User Manual AMD Confidential September 12 2008 Instruction Mnemonic Opcode Description Supported CMPS mem16 mem16 Al Compare the word at DS rSI with the word at ES rDI and then increment or decrement rSI and CDI v CMPS mem32 mem32 Al Compare the doubleword at DS rSI with the doubleword at ES rDI and then increment or decrement rSI and rDI CMPS mem64 mem64 Al Compare the quadword at DS rSI with the quadword at ES rDI and then increment or
310. r Monitor Up to 2056 x 1536 at 32b ee S Not Supported AM Programmable F Ultra pipelined Second CRTC CODEC Port Unit Floating Point Setup Engine MAFC Port Primary CRTC CSC Advanced 3D Texturing and Video Scalin Rendering Engine 16 or 32 Mbytes SGRAM or SDRAM Local Frame Buffer Memory Figure 7 9 Matrox G400 Block Diagram Chapter 7 Device Configuration 65 AMD Confidential User Manual September 12 2008 Interfaces The Matrox G400 graphics device has both a PCI bus and an AGP bus connection only one of which can be used at any time to connect to PCI bus or AGP bus ports in other devices Initialization and Reset State Upon initial creation this device initializes the internal registers to Matrox G400 standard reset state and creates a display window that acts as the VGA display The Configuration options are initialized to enable both the VGA and Matrox Power Graphics Mode The frame buffer size is initialized to 32 Mbytes and the Bios File memory area is initialized to all ones A reset will re load the default PCI configuration registers and place default values in the Chip and FIFO configuration for the Matrox G400 graphics device Contents of a BSD The data saved in the BSD depends on the mode the graphics controller was in when the BSD was saved If the graphics controller was in VGA mode the BSD file contains the contents of all VGA registers a copy of the 256 Kbyte VGA frame buff
311. r SHR reg mem32 1 DI AN operand right 1 bie S sw Shift a 32 bit register or memory SHR reg mem32 CL D3 5 operand right the number of bits ef specified in the CL register Shift a 32 bit register or memory S operand right the number of bits SHR reg mem32 imm8 C1 5 ib specified by an 8 bit immediate Ce value p Shift a 64 bit register or memory SHR reg mem64 1 e operand left 1 bit e Shift a 64 bit register or memory SHR reg mem64 CL D3 5 operand right the number of bits e specified in the CL register Shift a 64 bit register or memory F operand right the number of bits SHR reg mem64 imm8 Cl 5 ib specified by an 8 bit immediate Ce value 216 Appendix A User Manual AMD Confidential September 12 2008 Instruction Mnemonic Opcode Description Supported SHRD reg mem16 reg16 imm8 OF AC r ib Shift bits of a 16 bit destination register or memory operand to the right the number of bits specified in an 8 bit immediate value while shifting in bits from the second operand wf SHRD reg mem16 reg16 CL OF AD r Shift bits of a 16 bit destination register or memory operand to the right the number of bits specified in the CL register while shifting in bits from the second operand SHRD reg mem32 reg32 imm8 OF Ac r ib Shift bits of a 32 bit destination register or memory operand to the right the number of bits specified in an 8 bi
312. r Manual September 12 2008 D SMB Hub Device 11 Properties Connections 120 Logging SMBHub Configuration GPIO 0 enables segment NO SEGMENT GPIO 1 enables segment NO SEGMENT GPIO 2 enables segment NO SEGMENT GPIO 3 enables segment NO SEGMENT GPIO 4 enables segment NO SEGMENT GPIO 5 enables segment NO SEGMENT GPIO 6 enables segment NO SEGMENT GPIO 7 enables segment NO SEGMENT Figure 7 30 SMB Hub Properties Dialog Differences from Real Hardware This device model is the combination of two physical devices connected in a specific way The model attempts to match the functionality of the physical devices from a programmer s perspective The SMBus protocol is not modeled Also the SMBus address of the PCA9556 is programmable based on pin strapping whereas this model has a fixed SMBus base address 102 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 7 19AT24C Device The AT24C device is a Serial EEPROM device It can be configured to store 16 32 or 64Kb of EEPROM The device has an SMB bus interface for access to its internal registers It is typically used to store platform specific configuration data Interface The AT24C device has a SMB interface For example this device can be connected to a PCA9548 or PCA9556 device see Section 7 8 PCA9548 SMB Device on page 80 or Section 7 9 PCA9556 SMB Device
313. r table register to SIDT mem16 32 OE Olt Jee e SIDT mem16 64 OF 01 A1 Store interrupt descriptor table register to w memory Store the segment selector from the local SLDT reg16 OF 00 0 descriptor table register to a 16 bit D register Store the segment selector from the local SLDT reg32 OF 00 0 descriptor table register to a 32 bit A register Store the segment selector from the local SLDT reg64 OF 00 0 descriptor table register to a 64 bit A register Store the segment selector from the local SLDT mem16 OF 00 0 descriptor table register to a 16 bit memory e location SMSW reg16 OF 01 4 Store the low 16 bits of CRO to a 16 bit w register SMSW reg32 OF 01 4 Store the low 32 bits of CRO to a 32 bit vd register 222 Appendix A AMD Confidential th User Manual September 12 2008 Instruction Ee Mnemonic Opcode Description PP e Store the entire 64 bits of CRO to a 64 bit SMSW reg64 Of 04 74 gt eene e SMSW mem16 OF 01 4 Store the low 16 bits of CRO to memory Af STI FB Set interrupt flag IF to 1 Af Store the segment selector from the task STR regl6 OF 00 register to a L6 bit general purpose e register Store the segment selector from the task STR reg32 OF 00 register to a 32 bit general purpose ef register Store the segment selector from the task STR reg64 OF 00 register to a 64 bit general purpose ef regist
314. ration Integrated Northbridge 4 A device group can optionally specify initial and default archive data device state for each of its child devices A device group with five children could specify archive data for 0 1 2 3 4 or all 5 children We could have an AMD 4 core CPU xxxx that specifies archive data for all five of its children configured with the theoretical product ID file amd xxxx id E 4 core CPU xxx Configured with product ID file amd xxxx id This is not the only way we could create a theoretical AMD 4 core CPU xxxx A cleaner idea would be to reuse the non configured abstract and generic 4 core Node ag 4 core CPU xxxx ag bee eee estes ee Configured with product Aven e f0 ID file amd xxxx id This device group would externally be functionally the same as our previous AMD 4 core CPU xxxx example although it has the additional layer where it cleanly reuses 4 core Node We could also reuse 4 core Node for other device groups that represent a particular hardware implementation of a 4 core node such as the theoretical AMD 4 core CPU vu configured with the theoretical product ID file amd yyyy id Or a Chapter 3 Graphical User Interface 23 AMD Confidential User Manual September 12 2008 DeerHound RevB QuadCore Socket LI configured with the product ID file Familyl10hDR L1_BO0 id 3 3 5 3 Example SuperlO dev
315. ration 83 AMD Confidential User Manual September 12 2008 Each HyperTransport link can be enabled separately Each link can be 8 or 16 bits wide Only the 940 pin AMD Opteron processor can have three links a 754 pin AMD Athlon 64 has one HyperTransport port E AMD 8th Generation Integrated Northbridge 1 Properties Ee Connections 120 Logging Logging Configuration DDR2 Traning Name i Max Name i Max Name MaxAsyncLat Oxf WriteDataTiming HiByte OxZzt ReadDQSTiming HiByte DQSReceiverEnable Oxff WriteDataTiming HiByte OxZt ReadDQSTiming HiByte DQSReceiverEnable 0xf WriteDataTiming HiByte Oxzt ReadDQSTiming HiByte DQSReceiverEnable loxtt writeDateTiming HiByte _ loxze ReadDQSTiming HiByte DQSReceiverEnable T OxfE WriteDataTiming HiByte Oxzt ReadDQSTiming HiByte DQSReceiverEnable Datt Wrirebarafining HiByte OxZt ReadDQSTiming HiByte DQSReceiverEnable 0xf WriteDataTiming HiByte Dat ReadDQSTiming HiByte DQSReceiverEnable Datt WriteDataTiming HiByte Ox2f ReadDQSTiming HiByte DQSReceiverEnable loxt WriteDataTiming LoByte Oxf ReadDQSTiming LoByte WriteDataTiming LoByte OxZft ReadDQSTiming LoByte WriteDataTiming LoByte 0x2 f ReadDQSTiming LoByte WriteDataTiming LoByte loxze ReadDQSTiming LoByte WriteDataTiming LoByte Ox2t ReadDQSTiming LoByte WriteDataTiming LoByte Ox2f ReadDQSTiming LoByte WriteDataTiming LoByte Ox2f ReadDQSTiming LoByte WriteDataTiming LoByte Ox2f Re
316. rectory 2 Use View Show Devices to show the Devices Window shown in Figure 3 2 on page 9 3 Right click on the system BIOS memory device icon in the Device Window and select the Configure Device option on the Workspace Popup Menu Figure 3 3 on page 11 4 Choose the Memory Configuration tab Enter the appropriate base address and size for your BIOS ROM 6 Browse for your BIOS ROM image file The browser will only show files that have a ROM or BIN filename extension 7 Select the read only option unless the BIOS code will modify its image within the device 8 For most BIOS ROM select the system BIOS ROM memory address masking and memory is non cacheable options 9 Click OK to close the configuration dialog and accept the changes 14 2 Changing DRAM Size There are two ways to configure the simulated memory size For generic memory size configuration in powers of two you can use the Memory Configurator see Figure 14 1 and for specific or non symmetric DIMM configurations please follow the steps on page 164 n To open the Memory Configurator dialog click on the main menu item View and then choose Show Memory Configurator View Show Memory Configurator The Memory Configurator populates each DIMM device with two DIMMs of all identical size and type It accounts for DDR and DDR2 and registered or unregistered memory types as required The SPD files are loaded using the default path for SPD files I
317. reg32 reg mem32 OF 4D r Move if not less SF OF A CMOVNL reg64 reg mem64 OF 4D r Move if not less SF OF Af CMOVGE regl6 reg mem16 OF 4D r Move if greater or equal SF OF Af CMOVGE reg32 reg mem32 OF 4D r Move if greater or equal SF OF ef CMOVGE reg64 reg mem64 OF 4D r Move if greater or equal SF OF ei CMOVLE reg16 reg mem16 OF 4E r ee less or equal ZF 1 or SF e CMOVLE reg32 reg mem32 OF 4E r Sg less or equal ZF 1 or SF A Appendix A 197 AMD Confidential h User Manual September 12 2008 Instruction Se Mnemonic Opcode Description PP gt Move if less or equal ZF 1 or SF CMOVLE reg64 reg mem64 OF 4E r lt gt OF e CMOVNG reg16 reg mem16 OF 4E r Re mae not greater ZF 1 or CMOVNG reg32 reg mem32 OF 4E r ae agi not greater ZF 1 or w CMOVNG reg64 reg mem64 OF 4E r ola i not greater ZF 1 or A CMOVNLE regl6 reg mem16 OF 4F r SE SE less or equal ZF 0 or A CMOVNLE reg32 reg mem32 OF AE r oe aa less or equal ZF 0 or w CMOVNLE reg64 reg mem64 OF 4F r ae Se less or equal ZF 0 or d CMOVG reg16 reg mem16 OF 4F r Move if greater ZF 0 or SF OF ef CMOVG reg32 reg mem32 OF AE r Move if greater ZF 0 or SF OF ef CMOVG reg64 reg mem64 OF 4F r Move if greater ZF 0 or SF OF Af Compare an 8 bit immedi
318. registers The AGP interface is currently somewhat minimal and is not capable of generating AGP cycles nor AGP specific modes at this time The Emerald graphics device is comprised of a standard VGA and the Emerald Graphics sub device The graphics display engine automatically switches between the Emerald Graphics sub device and the VGA as necessary to display the selected video modes with only one being able to display at a time The VGA sub device provides an industry standard VGA interface used by BIOS and DOS The Emerald Graphics device provides an AGP and PCI graphics device interface controllable either by VESA BIOS extensions or a video driver In addition to the VGA standard modes Emerald Graphics supports a wide range of graphics modes from 320x200 at 16 bit color up to 2048x1536 at 32 bit color with either the VESA BIOS extensions or a video driver Interfaces The Emerald graphics device has both a PCI slot and an AGP bus connection only one of which can be used at any time to connect to PCI slots or AGP bus ports in other devices Initialization and Reset State Upon initial creation this device initializes the internal registers to VGA standard reset state and creates a display window that acts as the VGA display The Configuration options are initialized to enable both the VGA and Emerald Graphics The frame buffer size 1s initialized to 16 Mbytes and the Bios File memory area is initialized to all ones A reset will re load th
319. result in the 32 bit destination register In 64 bit mode this opcode 0x63 is used for the MOVSXD instruction See Section A 6 3 1 INT Interrupt to Vector on page 203 See Section A 6 3 2 IRET Return from Interrupt on page 203 Appendix A 221 AMD Confidential User Manual September 1 ER 2008 Instruction Mnemonic Opcode Description Supported Reads the GDT LDT descriptor referenced by the 16 bit source operand masks the LAR reg64 reg meml6 OF 02 r cttriputes with OOFFFFO0h and saves the sf result in the 64 bit destination register e Loads mem16 32 into the global descriptor LGDT mem16 32 OR OLE tapla registos e LGDT mem16 64 OF 01 2 Loads mem16 64 into the global descriptor w table register wm 8 e Loads mem16 32 into the interrupt descriptor LIDT mem16 32 OF 01 3 table register e e Loads meml16 64 into the interrupt descriptor LIDT mem16 64 e table register e Load the 16 bit segment selector into the LLDT reg mem16 OF 00 2 local descriptor table register and load the Af LDT descriptor from the GDT Loads the lower 4 bits of the source into BEE OF 01 6 the lower 4 bits of CRO L Loads a 16 bit general purpose register with LSL regl6 reg mem16 OF 03 r the segment limit or a selector specified in Af a 16 bit mem
320. rning off journaling is recommended during the installation process for an operating system DVD ROM support is provided through an option in the BSD platform checkpoint file To install a DVD ROM at any hard disk device location Secondary Master Primary Slave etc turn on the DVD ROM checkbox By default the Secondary Master in all distributed BSDs has DVD ROM checked and is a DVD ROM device Copying files into the simulator corresponds to putting data into some media on the Host which will be inserted into the simulation The choices for doing this are Create an ISO image with the data inside it then get it into your guest OS Use the File Set IDE Secondary Master Image item in the Main Window Menu to insert it into the DVD ROM simulation which is by default on the secondary master position in all BSDs Finally mount it in your guest OS Chapter 5 Running the Simulator 39 AMD Confidential User Manual September 1 2 2008 e Use a raw floppy disk image in a manner similar to the above It s a lot smaller and a bit more hassle so we don t recommend it e Mount a hard disk image on the host On a Linux host you can use the loopback device e Use the JumpDrive USB device to copy files into the simulator and out of the simulator see Section A 7 26 JumpDrive on page 250 Copying files out of the simulator corresponds to putting some data into some media in the guest which will then be extracted o
321. rovides connectivity to devices such as Super IO chips and BIOS ROMs The PCI E port is used for connectivity upstream to a compatible Northbridge Device See Section 7 27 ATI RS480 RS780 RD790 RD890 Northbridge Devices on page 130 for more information Initialization and Reset State When first initialized the Southbridge devices are in the default state This is described in detail in the respective datasheets The legacy CMOS sub device initializes to all zeroes When reset a Southbridge device takes on all default register values as above The exception to this is that the CMOS contents remain the same Contents of a BSD The BSD file contains the contents of all registers It also saves the contents of any buffers and states of all internal devices HDD controllers PIT PIC etc When the BSD file is read in all buffers are filled with past data and all states are restored to their saved states Configuration Options These Southbridge devices share many configuration properties with the AMD 8111 Southbridge For more information please refer to Section 7 11 AMD 8 1 Southbridge Devices IO Hubs on page 86 Addittionaly these SouthBridge devices contain a SATA configuration page to attatch images to the individual SATA ports 128 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 DA tegen e Logging Options PCIIRQ Mapping Primary HDD Channel SATA Drives
322. s enabled if IO Logging is enabled otherwise it returns disabled MemLog 011 Enables 1 or disables 0 IO logging Returns enabled if Memory Logging is enabled EE otherwise it returns disabled SC SmiSciLog 0I1 Enables 1 or disables 0 IO logging Returns enabled if SMI SCI Logging is enabled otherwise it returns disabled HtIntStatus IoLogStatus SmiSciLogStatus Appendix A 239 User Manual AMD Confidential September 12 2008 GetConfig Displays the current AMD 8111 configuration A 7 15 1 simnow gt ehc usage Automation Command EHC Description log enable disable mp Enables or disables Memory m and PCI Configuration p logging A 7 16 1 simnow gt journal usage Automation Command Journal Description GetParam Returns Super Block Size Index Block Size Index Levels Disk Block Size and Maximum Disk Size SetParam lt Super Block Size gt lt Index Block Size gt lt Index Levels gt lt Disk Block Size gt Sets journal parameters A 7 17 1 simnow gt cpu usage Automation Command CPU Description LoadAnalyzer lt analyzer_file gt lt args gt Loads the analyzer analyzer_file arguments args with specified ShowAnalyzers Shows all loaded analyzers EnableAnalyzer lt num gt lt OI1 gt Enables 1 or
323. s 7 Notice the shell modules list is flat but the devices are in a tree structure that allows us to have both a gt Machine 1 gt 4 core Node 0 gt AweSim Processor 0 and a gt Machine 1 gt 4 core Node 1 gt AweSim Processor 0 Also notice that our default view ignores the tree and just shows us two devices 4 core Node 0 and 4 core Node 1 15 1 4 2 Enabled vs Disabled vs Mixed D Shell device commands like shell Location or shell AddDevice have generic meanings regardless of whether the device is a group or library But some are defined from an aggregation of the children For example shell GetFastPath can return Enabled Disabled or Mixed means some children are Enabled and some are Disabled 1 simnow gt shell GetLogIO 4 core Node 0 gt AweSim Processor 0 BOE Disabled TOR Disabled D gceelztsz Enabled MEM Disabled 2 Je T MEMfpdis Enabled GETMEMPTR Disabled 1 simnow gt shell GetLogIO 4 core Node 0 gt AweSim Processor 1 POME Disabled TOS Disabled TOCPONSE Disabled MEM Disabled a ES MEMfpdis Disabled GETMEMPTR Disabled SS In this example all other child devices of 4 core Node 0 are Disabled for all log options 1 simnow gt shell GetLogIO 4 core Node 0 ICIS Disabled TOR Disabled Chapter 15 Frequently Asked Questions FAQ 173 AMD Confidential U
324. se each bank select is routed to only one physical DIMM bank i e the banks are not ganged AMD Athlon64 Figure 7 4 AMD Athlon 64 Processor Bank Select Line Configuration Configuration of the DIMM Device allows the user to specify SPD data for each simulated DIMM The number of DIMMs supported in the DIMM Device model is dependent on the type of CPU used in the system If the CPU type is an AMD Opteron processor then the DIMM Device will assume a 128 bit memory interface and therefore allow configuration of up to eight individual DIMMs If the CPU type is something other than AMD Opteron then the DIMM device assumes a 64 bit memory interface and accepts configuration for only four DIMMs It isn t until the simulation is started that the DIMM Device can determine what type of CPU is present For this reason the DIMM Device will initially display configuration tabs for 8 DIMMs even when used with a CPU that is not based on the AMD Opteron processor After the simulation is started the DIMM device will remove and ignore any configuration of DIMMs 4 7 if a processor other than the AMD Opteron is detected 56 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 Once the simulation is started the DIMM Device allocates memory arrays to hold the DRAM data One array is allocated for each bank or virtual bank In the case of 64 bit memory interfaces memory arrays are allocated to
325. ser Manual September 12 2008 IOfpdis Mixed MEM Disabled MEMfpdis Mixed GETMEMPTR Disabled 1 simnow gt shell GetLogIO gt Machine 1 IS Disabled Os Disabled TOTPONSE Mixed MEM Disabled MEMfpdis Mixed GETMEMPTR Disabled 15 1 5 Device Group Examples Device groups can be a powerful building block for SimNow users These next examples should help give further understanding about device groups and demonstrate some practical uses 15 1 5 1 Example 1GB DDR2 memory When you instantiate a Dimm Bank known device into a created device you get its default state of 8 empty dimm s with no configuration You can then configure the Dimm Bank such as by opening the device s GUI configuration properties to specify general options such as max number of dimm s and to configure each dimm such as by importing an SPD You could configure it for example to emulate a dimm bank with 2 DDR2 dimm s 1GB each Device groups offer us a potentially simpler alternative for the user to instantiate a preconfigured device group For example we could have a device group Dimm DDR2 1GBx2 which has inside it only one child and default archive data state for that child The figure below shows that the theoretical known device Dimm DDR2 IGBx2 has inside it a single child device Dimm Bank 0 that is configured with two dimm s type DDR2 1GB each Figure 3 11 Exampl
326. sical DIMMs provide 8 bytes of data per access On the module the 8 bytes of data are stored across several memory devices The data width of the memory devices on the DIMM SPD byte 13 determines how many PDLs are used DIMMs that use 8 bit or 16 bit memory devices use one PDL per byte of width eight total PDLs DIMMs that use 4 bit devices use one PDL per nibble 16 total PDLs The memory controller in the AMD Opteron processor includes two DDR channels that are ganged into a single effective 128 bit interface Each access to memory hits a pair of 64 bit DIMMs where one DIMM supplies the lower 64 bits while the other DIMM supplies the upper 64 bits Each DIMM must have the same arrangement in size and number of banks For each valid access to DRAM the memory controller will assert one of eight bank select lines CS7 0 Each bank select line selects one virtual bank A virtual bank is the combination of one bank on the lower DIMM and the corresponding bank on the upper DIMM Row and column addresses select the data offset within the virtual bank Chapter 7 Device Configuration 55 AMD Confidential User Manual September 12 2008 DIMMI DIMM3 CSI 50 CS1 CSO CS1 CSO CS1 CSO CS1 Cl DIMMO DIMM2 DIMM4 DIMI Figure 7 3 AMD Opteron Processor Virtual Bank Select Line Configuration Memory controllers in AMD Athlon 64 provide eight bank select lines However in this ca
327. start installing an operating system make sure you have a blank hard drive image available To create a blank hard drive image with DiskTool please follow the steps in Section 4 1 Creating A Blank Hard Drive Image on page 31 5 2 1 Assigning Disk lmages Assign a blank hard drive image by selecting File Set IDE Primary Master Image Open the directory that contains your hard drive images and choose a blank hard drive image that you created earlier see Section 4 1 Creating A Blank Hard Drive Image on page 31 or use one of the hard disk images which come with the simulator see Section A 2 4 1 Hard Disk Image Files on page 185 and un check the Journal check box see below The IDE controller has two important features then click on Ok Assign the first OS installation ISO image to the IDE Secondary Master Channel of the hard disk controller by selecting File Set IDE Secondary Master Image If you don t have access to any ISO images you have two options 38 Chapter 5 Running the Simulator AMD Confidential User Manual September 12 2008 You can download Linux ISO images from fedora redhat com If you are a MSDN Subscription member you can also download Windows ISO images from Microsoft s MSDN Subscription Webpage You can assign a physical host DVD CD ROM drive to the simulators IDE Secondary Master Channel and use your hosts physical DVD CD ROM drive to install from a CD or DVD media Sec
328. t or 0 if not specified Sets the pass count to count or 0 if not specified c rlw lt Bus gt lt Dev gt lt Func gt lt Off gt data Performs a PCI configuration r ead or w rite d b w d q address range gt 1 p Displays the contents of p hysical default or linear memory as b ytes w ords dJouble words or q uad words or in the previous format if not specified e b w d q lt address gt lt data gt lip Allows the modification of p hysical default or l inear memory in b ytes w ords d ouble words or q uad words or in the previous format if not specified Data values are entered immediately after the address separated by spaces E blwldilq address range gt lt value gt l p Fills the given p hysical default or linear memory range with the indicated value g address Begins or will resume CPU execution setting a temporary execution breakpoint on the given address h on off clear lt value gt Controls history trace collection ON enables trace collection and clears the current trace buffer OFF disables trace collection and CLEAR clears the current trace buffer Specifying no arguments or a value disassembles the most recent lt value gt instructions executed ifb lwld lt port gt Input a b yte wJord or dJouble word from the indicated port o b w d lt port gt lt data gt Output a b yte wJord
329. t 325496 Name INTR Level A gt Defines an INTR PIN event Level A for Asserted or D for Deasserted Name could be INTR RESET A20M NMI PAUSE SMI and lt Unknown gt lt Event Device TO_DO_IN_NB Type APIC ICount 325496 Name EXTINT DestinationMode F DeliveryMode 07 Level F TriggerMode F Vector 00 Destination 00 gt Defines an APIC Event Name could be EOI INIT STARTUP SMI NMI INTR REMOTE READ EXTINT LPARB and Unknown Device can be the name of the device that issues the interrupt Current XTR implementation ignores the name of the device lt Event Device CPU0 Type INT ACK ICount 325496 Vector 00000000000000d1 gt Defines an INTACK cycle event lt Event Device XTR Type EOT ICount 400001 gt Defines an End of Trace EOT event lt Event Device CPU0 Type RDMSR ICount 1404861740 Address 00000010 Data 0000000053BC7D2C gt Defines a RDMSR event lt Event Device CPU0 Type MEMR ICount 3133971257 Address 00000000000A88B2 Size 1 gt lt Data Length 1 Value FF gt lt Event gt Chapter 7 Device Configuration 111 AMD Confidential User Manual September 1 pig 2008 lt Event Device CPU0 Type MEMW ICount 3133971259 Address 00000000000A88B2 Size 1 gt lt Data Length 1 Value 01 gt lt Event gt Defines a Memory Read or Memory Write event MEMR and MEMW are recorded for MMIO ranges 7 22 2 2 XTR Binary File Con
330. t Cannot Exec SMyResponse n while CmdLine print moer he Example 12 1 Perl Sample CMDAPI Source Code 156 Chapter 12 Command API AMD Confidential User Manual September 12 2008 13 DiskTool Use the DiskTool utility to create hard disk images DiskTool copies byte for byte the contents of a secondary hard disk into an hdd file This hdd file can be loaded as a disk image in the simulator DiskTool runs in two modes GUI mode and command line mode Double clicking on the DiskTool icon or running DiskTool from the command line with no command line options starts DiskTool in GUI mode If you run DiskTool from the command line and include any command line parameters DiskTool runs in command line mode To get a list of the command line options run DiskTool help 13 1 Command Line Mode The functions recognized by the DiskTool command line include Option G Copy a physical device to the given image file Syntax GI G lt DeviceName gt lt ImageName gt ImageSize ImageSize of sectors of data to copy from the device to the image file 0 All sectors this is the default value 1 All data to the end of physical partition 1 2 All data to the end of physical partition 2 3 All data to the end of physical partition 3 4 All data to the end of physical partition 4 lt Any Other Valid Number gt The number of sectors specified Example disktool g dev hd0 image hdd 102400
331. t Device CPUO Type SREG Item M0000020E Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000201 Data O000000FF80000800 gt lt Init Device CPUO Type SREG Item M00000203 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000205 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000207 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000209 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M0000020B Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M0000020D Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M0000020F Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000250 Data 1E1E1E1E1E1E1E1E gt lt Init Device CPUO Type SREG Item M00000258 Data 1E1E1E1E1E1E1E1E gt lt Init Device CPUO Type SREG Item M00000259 Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M00000268 Data 1515151515151515 gt lt Init Device CPUO Type SREG Item M00000269 Data 1010101010101010 gt lt Init Device CPUO Type SREG Item M0000026A Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M0000026B Data 0000000000000000 gt lt Init Device CPUO Type SREG Item M0000026C Data 0404040404040404 gt lt Init Device CPUO Type SREG Item M0000026D Data 0404040404040404 gt lt Init Dev
332. t automation commands typed into the console window are directed to the current machine Table 5 2 describes the arguments provided by the newmachine command Argument Description nogui Disable Graphical User Interface GUI gui Enable Graphical User Interface GUI C Enable console mode novga Disable VGA Window vga Enable VGA Window n Disable VGA Window d Disable mouse and keyboard inputs to Chapter 5 Running the Simulator 41 AMD Confidential User Manual September 1 2 2008 Argument Description simulator d Enable mouse and keyboard inputs to simulator i lt path gt Image search path for loading image files m lt path gt Mediator connection string for network adapters to use lt path gt Directory to load devices from If used it must be first Table 5 2 Newmachine Command Arguments Usage aewiescarnel Leem e e I novga a voal d d i lt path gt m lt path gt 1 lt path gt The following command creates a new simulation machine 1 simnow gt newmachine 2 simnow gt The switchmachine n command switches the console window to the machine identified by n All subsequent automation commands typed into the console window are directed to the given machine n 2 simnow gt switchmachine 1 1 simnow gt The listmachines command lists all machines that currently e
333. t data is being transported through a named pipe with the given name The n will be either 1 GetCommPort for the first serial port or 2 for the second serial port e COMn 57600 This indicates that data is being transported through the given serial port on the host machine using a baud rate of 57600 e none This indicates that data written to the simulated serial port is discarded and no data is ever received This only applies to the Windows version of the simulator and not to the Linux version Appendix A 237 User Manual AMD Confidential September 12 2008 Automation Command Description SetCommPort lt none pipe COMn BAUD gt Sets the mode of communication you want to use with the simulated serial port e pipe Tells the simulator to use a named pipe as the method of transport for serial data to from the simulated machine The pipe name will be of the form pipe SimNow COMn where n will be 1 for serial port 1 and 2 for serial port 2 The name is not user configurable e COMn Tells the simulator to use one of the host serial ports identified by n as the transport for data to and from the simulated machine n can be any value between 1 and 255 and must be an actual COM port that is present on the host system Regardless of the configuration of the simulated COM port the host COM ports baud rate is configured depending on the BAUD parameter with 8 bit data no parity
334. t immediate value while shifting in bits from the second operand SHRD reg me326 reg32 CL OF AD r Shift bits of a 32 bit destination register or memory operand to the right the number of bits specified in the CL register while shifting in bits from the second operand SHRD reg mem64 reg64 imm8 OF AC r ib Shift bits of a 64 bit destination register or memory operand to the right the number of bits specified in an 8 bit immediate value while shifting in bits from the second operand 4 SHRD reg mem16 reg16 CL OF AD r Shift bits of a 64 bit destination register or memory operand to the right the number of bits specified in the CL register while shifting in bits from the second operand STC F9 Set the carry flag CF to 1 STD FD Set the direction flag DF to 1 STOS reg8 Store the contents of the AL register to ES rDI and then increment or decrement rDI STOS regl6 AB Store the contents of the AX register to ES rDI and then increment or decrement CDI STOS reg32 AB Store the contents of the EAX register to ES rDI and then increment or decrement rDI STOS reg64 AB Store the contents of the RAX register to ES rDI and then increment or decrement rDI STOSB Store the contents of the AL register to ES rDI and then increment or decrement CDI STOSW AB Store the contents of the AX regis
335. t immediate value Ff and store the result in the destination XOR the contents of a 32 bit destination register or memory XOR reg mem32 imm32 81 6 id operand with a 32 bit immediate value e and store the result in the destination XOR the contents of a 64 bit destination register or memory XOR reg mem64 imm32 81 6 id operand with a sign extended 32 bit A immediate value and store the result in the destination XOR the contents of a 16 bit destination register or memory XOR reg mem16 imm8 83 6 ib operand with a sign extended 8 bit e immediate value and store the result in the destination XOR the contents of a 32 bit destination register or memory XOR reg mem32 imm8 83 6 ib operand with a sign extended 8 bit e immediate value and store the result in the destination XOR the contents of a 64 bit destination register or memory XOR reg mem64 imm8 83 6 ib operand with a sign extended 8 bit Af immediate value and store the result in the destination XOR the contents or an 8 bit destination register or memory XOR reg mem8 reg8 30 r operand with the contents of an 8 bit ei register and store the result in the destination XOR the contents of a 16 bit destination register or memory XOR reg mem16 reg16 St Ze operand with the contents of a 16 bit e register and store the result in the destination XOR the contents of a 32 pit destination register or memory XOR reg mem32 reg32 31 yr operand with the contents of a 32 bit e re
336. t time 345 Consume time 616 CPU ICount 118 00 00 XTRNB la D1 w event time 326462 Consume time 326462 CPU ICount 326235 Logged during XTR execution phase when IOR IOW message is received by XTRNB AO3E is the address of IOR IOW and the data after the is the data that is returned and received to and from the CPU Ia is for Interrupt Acknowledgement and D1 is the vector XTRNB Time Resync Adjusting time by 271 Logged during execution when there is a timing discrepancy detected between an event in XTR XML and that received from the CPU XTRNB adjusts to this discrepancy In ideal environment this should not occur XTRNB Queuing event CPUO DMAW for time 8403 Logged during execution when a DMAW event is queued so that it could be triggered at a later point 8403 is the time when this event should be triggered Chapter 7 Device Configuration 109 AMD Confidential User Manual September 1 2 2008 XTRNB Setting event trigger delay for CPUO DMAW to 1205 Logged during execution DMAW event is setup to be triggered at a later point 1205 is the difference between NOW and event time XTRNB Processing queued event CPUO DMAW ICount 8403 ShelllCount 8403 Logged during execution Trigger for event setup earlier is invoked CPUO and DMAW could have different values depending on which CPU it is MP XTR only and which event is processed Interfaces XTRNB has eight CPU interfaces and an IO Interrupt APIC in
337. ta 00000003 1 Register 60 ByteCount 04 Data 00000000 1 Register 64 ByteCount 04 Data 00000004 PCI CONFIG WRITE Bus 0 Device Function 1 Register 68 ByteCount 04 Data 00000000 i 1 1 l 1 Fast DMA 1 PCI CONFIG WRITE Bus 0 Device Function Fast DMA 2 PCI CONFIG WRITE Bus 0 Device gt Function Fast DMA 3 PCI CONFIG WRITE Bus 0 Device Function Fast DMA 4 PCI CONFIG WRITE Bus 0 Device 18 Function Fast DMA 5 Fast DMA 6 Gei PCI CONFIG WRITE Bus 0 Device 18 Function ontroller 0 PCI CONFIG WRITE Bus 0 Device Function Keess PCI CONFIG WRITE Bus 0 Device 18 Function 1 Register 78 ByteCount 04 Data 00000000 IDE Drive 1 PCI CONFIG WRITE Bus 0 Device 18 Function Register 7C ByteCount 04 Data 00000007 IDE Drive 2 PCI CONFIG READ Bus 0 Device 18 Function 0 Register 00 ByteCount 04 Data 00000022 IDE Drive 3 PCI CONFIG READ Bus 0 Device 18 Function 0 Register 60 ByteCount 04 Data 00000000 10 Logger AMD 8th Generation Integrated Northbridge 0 PCI CONFIG WRITE Bus 0 Device 18 Function 3 Register 48 ByteCount 04 Data 00000000 10 Logger AMD 8111 1 0 Hub 0 PCI CONFIG WRITE Bus 0 Device 18 Function 3 Register 4C ByteCount 04 Data 00000000 10 Logger AMD 8151 AGP Tunnel 0 PCI CONFIG READ Bus 0 Device 19 Function 0 Register 00 ByteCount 04 Data OOOOOOFF 10 Logger AweSim Processor 0 PCI CONFIG READ Bus 0 Device 1A Function 0 Register 00 ByteCount 04 Data OOOOOOFF 10 Logger Dimm Bank 0
338. te 32 bit value and e store the result in RAX AND reg mem8 imm8 80 4 ib mae the contents of reg mem8 with ef AND reg mem16 imm16 81 4 iw Se contents of reg mem16 with e AND reg mem32 imm32 81 4 id Ae contents of reg mem32 with w AND the contents of reg mem64 with a AND reg mem64 imm32 81 4 id SE EE e AND the contents of reg mem16 with a AND reg mem16 tam 83 4 ib sign extended 8 bit value A AND the contents of reg mem32 with a AND reg mem32 imm8 Si 4 2b sign extended 8 bit value e i AND the contents of reg mem64 with a AND reg mem64 imm8 83 4 ib sign extended 8 bit value C AND the contents of an 8 bit register AND reg mem8 reg8 20 r or memory location with the contents e of an 8 bit register AND the contents of a 16 bit register AND reg mem16 reg16 2 Ze or memory location with the contents ef of a 16 bit register AND the contents of a 32 bit register AND reg mem32 reg32 21 r or memory location with the contents e of a 32 bit register AND the contents of a 16 bit register AND reg mem64 reg64 21 r or memory location with the contents e of a 16 bit register AND the contents of an 8 bit register AND reg8 reg mem8 22 with the contents of an 8 bit memory Af location or register AND the contents of a 16 bit register AND regl6 reg mem16 230 28 with the contents of a 16 bit memory e location or register AND the contents of a 32 bit register AND reg32 reg mem32 23 fz with the contents of a 32 bit memory e
339. te PIO s Exceeded PIO Rate Graph what can be ER Read PIO s Figure 3 20 CPU PIO Rate Graph 3 4 2 6 MMIO Rate Graph The MMIO Rate Graph updates once a second If the memory mapped I O MMIO rate exceeds what can be displayed on this graph the graph line turns red A rate of zero will appear as a horizontal line one pixel high Full vertical scale represents one MMIO per ten simulated instructions Darker color on the bottom of the graph represents the read MMIO s the lighter color represents the write MMIO s MMIO Rate Graph Read Exceeded MMIO s what can be displayed Write MMIO s Figure 3 21 CPU MMIO Rate Graph 3 4 3 Simulated Video The simulated video area of the Main Window depicts the VGA output screen that appears when a VGA device is added to the workspace When the mouse focus is over the video area the simulator captures host keyboard input enabling you to type most keyboard entries on your real keyboard This is a convenience and may not accurately position the mouse or grab all keys correctly For more accurate mouse and keyboard capture see Grab the mouse and keyboard in Section 5 2 3 Interaction with the Simulated Machine on page 41 You can also allow the simulator to take complete control of the mouse and keyboard by selecting Special Keyboard Grab Mouse and keyboard To return from this mode press and hold Ctrl then Alt and then release them in reverse order 3 4 4 H
340. ted devices All connections enable bidirectional message transfers Some devices contain more than one interface to which a connection can be made A multi interface device routes messages out different interfaces based on the type of message being sent When you make a connection with a multi interface device an interface list dialog appears which enables you to select the appropriate interface You must choose an interface on either device even if one or both of the devices has only one interface type Generally you shouldn t connect different types of interfaces For example interface Type A of Device 1 should only be connected to interface Type A of Device 2 Chapter 3 Graphical User Interface 11 AMD Confidential User Manual September 12 2008 D AMD 8111 1 0 Hub 4 Properties Connections 1 0 Logging Logging Device Options Primary HDD Chann gt Local Connection Point Remote Device Remote Connection Point HyperTransport Bus 0 AMD 8151 AGP Tunnel 2 HyperTransport Bus 1 Interrupt 7 IOAPIC Bus AMD 8151 AGP Tunnel 2 Interrupt IOAPIC Bus LPC Bus LPC Bus Memory Device 8 Generic Bus LPC Bus Winbond W83627HF SIO 7 Generic Bus PCI Bus 0 PCI Bus 6 PCI Bus 0 System Management Bus 0 System Management Bus 0 Dimm Bank 5 Generic Bus System Management Bus 1 USB Port 0 USB Port 1 USB Port 2 USB Port 3 USB Port 4 USB Port 5 Figure 3 4 Add Connection Dialog of Device Properties Win
341. ted list of the available commands and their syntax lt blank line gt Repeat of previous command lt automation command gt Execute an automation command P lt Path gt lt Path gt Sets the file search path L lt Symbol File gt Load Address Loads the named symbol file optionally offsetting each address by the given load offset When the load is completed the module name attached to this group of symbols is displayed Supported symbol file extentsions are TXT x SYMTEXT and Linux symbol map file MAP Displays a list of the symbol modules currently loaded U lt Module Name gt Unloads the named symbol module that had previously been loaded with the 1 command 2 lt Symbol gt Displays all symbols that contain the given string lt Address gt Displays the symbol that most closes matches the given address be list Clears one or all breakpoints bd list Disables one or all breakpoints be list Enables one or all breakpoints bf lt vector gt lt Pass count gt Creates and enables a breakpoint for the indicated CPU exception Sets the pass count to count or 0 if not specified bh lt vector gt lt Pass count gt Creates and enables a breakpoint for the indicated hardware interrupt Sets the pass count to count or 0 if not specified bi lt address gt r w lt Pass count gt
342. tem s CD ROM drive or download the simulator program and its data files from http developer amd com simnow aspx Browse to the root directory of the CD or to the path where the downloaded simulator is stored and Chapter 2 Installation 3 AMD Confidential User Manual September 1 EN 2008 begin the installation as follows To install under Windows double click on the self extracting executable To install under Linux extract the zipped tar file as shown below tar xA Simnow Linux64 lt version gt tar gz 2 3 Directory Structure and Executable After the opening screen and license agreement are displayed you will be prompted to choose an installation directory When you select this the install program will copy the executable files and device models to the selected directory and setup the registry entries necessary to run the simulator The install program will create the following subdirectories under the install directory ICH SimNow Contains the simulator s executable DiskTool libraries and BSD files CO analyzers Contains CPU analyzers D devices Contains the simulator s device models doc Contains the latest versions of the simulator documentation D help Contains the simulator s help files icons Contains icons used by the simulator s GUI components images Contains image files D productfile Contains processor id files reg Contains register script files used to register simulator components D deve
343. tents XTR Binary file contains the memory image of the system just before the XTR Record started The binary file contains multiple records where each record contains has the following structure Physical Address Of the Page 8 bytes Count of Bytes in this Page 4 Bytes Data Of the Page Count of Bytes earlier Currently XTR only supports page size of 4096 bytes Both the DIMM and MMIO may be present in the XTR Binary file The last record in the binary file must have a count of zero to indicate end of memory image 7 22 3 ModeFlags ModeFlags defines some of the states of the CPU that are important for execution The upper 32 bits store the Execution Control flags e g HLT and lt ignore interrupts for 1 instruction when we change stack segment gt The lower 32 bits is redundant from other initialization values in the XTR initialization but is there to maintain code consistency Table 7 7 shows the Execution Control Flags upper 32 bit Execution Control Flag Value Description BIUI_LOCK 0x00000001 Bus is locked BIUI_RESET 0x00000002 Processor RESET pin BIULL INIT 0x00000004 INIT pin BIUILINTR 0x00000008 Interrupt BIUINMI 0x00000010 NMI BIUI_SMI 0x00000020 SMI BIUILIGNNE 0x00000040 Floating point IGNNE BIUI_A20M 0x00000080 A20Mask BIUI_PAUSE 0x00000100 PAUSE BIUI_HOLD 0x00000200 HOLD BIUI_LUNUSED 0x00000400 Unused BIUI_STOP 0x00000800 Pseudo pin that stops simulat
344. ter ID s available Three requester ID s legacy LPC legacy PCI internal IDE controller There are no SimNow PCI models that implement MSI This means the only APIC style interrupts the IOMMU can intercept are from a single requester ID the AMD 8111 device s internal IOAPIC Chapter 7 Device Configuration 91 AMD Confidential User Manual September 12 2008 7 12PCI BUS Device The PCI Bus device enables you to add PCI devices to the system You can configure the PCI Bus device to provide any number of PCI slots for one to six connections You configure each PCI slot on the PCI Bus by setting its device number and base IRQ routing pin Interfaces The PCI Bus device has two types of interfaces a bus interface and one or more slot interfaces The bus interface connects to a device that provides a PCI bus such as a Northbridge Each PCI slot interface is capable of connecting to a PCI device such as a PCI video controller The PCI bus behaves somewhat differently than other AMD SimNow devices First the connection points are not all centered in the middle of the icon instead each connection point has a discrete location around the perimeter of the icon to provide a visual indication that each PCI device is connected to a different PCI slot Second the connection points are exclusive that is only one device can connect to each connection point on the PCI bus because in a real system one cannot install two PCI cards into a s
345. ter to ES rDI and then increment or decrement CDI STOSD AB Store the contents of the EAX register to ES DI and then increment or decrement rDI STOSQ AB Store the contents of the RAX register to ES rDI and then increment or decrement rDI SUB AL imm8 2C ib Subtract an immediate 68 bit value from the AL register and store the result in AL SUB AX imm16 2D iw Subtract an immediate 16 bit value from the AX register and store the result in AX SUB EAX imm32 2D id Subtract an immediate 32 bit value from the EAX register and store the result in EAX SUB RAX imm32 2D id Subtract a sign extended immediate 32 bit value from the RAX register and store the result in RAX SUB reg mem8 imm8 80 5 ib Subtract an immediate 8 bit value from an 8 bit destination register or memory location Sa Se Sa Se SS Se SS Se Se SSS S Appendix A 217 User Manual AMD Confidential September 12 2008 Instruction Mnemonic Opcode Description Supported SUB reg mem16 imm16 81 5 iw Subtract an immediate 16 bit value from a 16 bit destination register or memory location v reg mem32 imm32 81 5 id Subtract an immediate 32 bit value from a 32 bit destination register or memory location SUB reg mem64 imm32 81 5 id immediate 64 bit memory Subtra
346. terface to connect to the AweSim s CPU Bus and IO Interrupt APIC interface respectively For XTR UP only one CPU interface may be used 7 22 2 XTR Structure 7 22 2 1 XML Structure XTR is a text file that contains XML elements for initialization elements events and instructions The XML schema or DTD is not formally defined XTR XML contains an Initialization section followed by events and instruction sections Last event in the XML must be an EOT event indicating the end of trace Some XTR elements are explained below Please refer to Section 7 22 5 Example XTR XML File on page 113 or the exact and complete structure of the XTR XML All values in the XML are in hexadecimal except for Count and Length values which are always in decimal Exceptions will be stated as necessary lt Init Device DIMM Type MEMI Size 536870912 gt Memory initialization MEMI information from and for the DIMM device The value for Size attribute the size of DIMM in bytes in decimal base 10 Note that this does not require that XTR playback to have a DIMM device lt Init Device MEM Type MEMI File c simnow xtr DivergenceAt324303 test_snapshot_3dmarkwof_0 bin gt Memory initialization file File path may be relative to the current path lt Init Device CPU0 Type CPU Item ICount Data 227 gt Initial instruction count in decimal Different CPUs can have different initial Counts lt Init Device CCPU0 Type CPU Item
347. the Device Window from the Main Window Menu View Show Devices Double click on the Northbridge device This will bring up the device Properties Window Click on Logging Capabilities that will display the logging options Select Log PCI Configuration Cycle to and then click OK to accept the configuration 2 Select View Log Window from the Main Window Menu This will bring up a Message Log dialog box similar to the one shown in Figure 14 3 Chapter 14 BIOS Developer s Quick Start Guide 165 AMD Confidential User Manual September 12 2008 3 Log messages will only be captured from devices that have a check beside their name If the Northbridge device does not have a check then check it by clicking its check box 4 Select whether to send log messages to the window and or to a file If logging to a file enter a filename for the log file 5 Execute the simulation and the requested information will be logged lt 1 SimNow Message Log Devices AMD 8th Generation Integrated Northbridge 0 AMD 8111 1 0 Hub 0 AMD 8151 AGP Tunnel 0 AweSim Processor 0 Debugger 0 Dimm Bank 0 Emerald Graphics 0 V Log to Window 100 Buffer Size D lines Fast DMA 0 Log to File simnow log Log to Console owe ewes mirau vuo or in en r wee ay yee varz ey ee viz vuvu vuvvvooec 1 Register 58 ByteCount 04 Data 00000000 1 Register 5C ByteCount 04 Da
348. the right to discontinue or make changes to its products at any time without notice Trademarks AMD the AMD Arrow logo AMD Athlon AMD Opteron and combinations thereof SimNow 3DNow AMD 8111 AMD 8131 AMD 8132 and AMD 8151 are trademarks of Advanced Micro Devices Inc HyperTransport is a trademark of the HyperTransport Technology Consortium Microsoft and Windows are registered trademarks of Microsoft Corporation PCI X is a registered trademark of PCI SIG Sysmark is a registered trademark of Business Applications Performance Corp MMX is a trademark of Intel Corporation Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies AMD Confidential AMD Confidential User Manual September 12 2008 Contents MEA a ix WALES ee eege xi e e EE 1 2 nette soszacsatist ses coped cee lege edb are oes Seabee Ee ie ean 3 2 1 System Regtir em ntS coinne ea a E e sus R 3 232 Installation ET eeh dee 3 2 3 Directory Structure and Executable 4 4 4 5 es Ake ee aa 4 2 4 Setting up Linux for the Simulator lt 2 ss1ccecst ics svete etai a ake eenadasieeaeeees 4 2 5 Config ration Fleisce seniiti ea i E ER A t 5 2 6 Nplate A COME EE 6 3 Graphical Kleeder ee 7 3 1 Tool Bar Buttons ecean ania a a E E E A Sea 7 3 2 Device EE 9 3 2 1 Adda New EE 10 3 22 Workspace Popup Mens scsi cacencesaacegtssaacaasicacs STE ENS 10 3 2 2 1 Add OMMOCHON EE 11
349. tion 4 Disk Images on page 31 describes how to assign a physical DVD CD ROM drive When the OS installation prompts you eject the current ISO image using File Clear IDE Secondary Master and insert the next ISO image using File Set IDE Secondary Master In case you are using a physical DVD CD ROM drive for the OS installation eject the media and insert the next media The disk images are now assigned to the device that is connected to the IDE Primary Master and IDE Secondary Master connector of the hard disk controller as shown in Figure 7 22 on page 89 The IDE controller has two important features All disk devices Primary Master etc by default have the disk journaling feature turned on which allows simulations to write to the disk image during normal operation and not affect the contents of the real disk image This is useful for being able to kill a simulation in the middle for multiple copies of the simulator running at the same time etc Journal contents are saved in BSD checkpoint files but lost if you don t save a checkpoint before exiting To change journal settings or commit journal contents to the hard disk image go to the Device View Window then the AMD 8111 Southbridge then the configuration for the hard disk in question on either the Primary or Secondary IDE controller Here you can either commit the contents of the journal to the hard disk image or turn off journaling for the hard disk image in question Tu
350. tion already incorporated The VGA enabled checkbox enables or disables the VGA registers If it is not checked the VGA registers are not updated and the display window will not display from the VGA frame buffer Frame Buffer Sub Device Configuration In Figure 7 8 the Frame Buffer Size Mbytes sets the size of the frame buffer in megabytes The value placed in this option is only read at reset The frame buffer size can not be dynamically modified The Accelerator Enabled checkbox enables or disables the graphics accelerator The accelerator is enabled by default The VESA BIOS Extensions Enabled checkbox enables or disables the VESA BIOS support The VESA BIOS Extensions are enabled by default 62 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 D Emerald Graphics 9 Properties ons 120 Logging YGA SubDevice Framebuffer and Accelerator lt IMPORTANT WARNING Changes in these parameters are generally only looked at during PCI config at BIOS initialization Frame Buffer Size MBytes Accelerator Enabled VESA BIOS Extensions Enabled Figure 7 8 Graphics Device Frame Buffer SubDevice Properties Difference from Real Hardware The Emerald Graphics device currently does not simulate any specific graphics hardware it simulates something functionally like a modern graphics adapter with only 2D acceleration implemented at this time Drivers are Windows only at the moment
351. to OxDF The floppy is initialized with no drive image present Reset clears the controller to an idle state If an image is loaded reset does not unload the image COMI and COM2 are initialized with 9600 Baud no parity 8 bit words 1 stop bit and interrupts off The parallel port initializes with the data and control ports set to zero Reset clears these ports to their initial values The following devices have no functionality behind them at this time with the exception of their configuration registers These registers are initialized and reset to the values specified in the Super I O specification IR GPIO MIDI Joystick Fan Contents of a BSD e Keyboard and Mouse 74 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 Floppy COM1 and COM2 LPT1 IR GPIO MIDI Joystick Fan All devices store their current state in the BSD files as well as any data that may be buffered at the time of the save Register content is also saved for all devices Configuration Options The Super I Os have the capability of setting device breakpoints on an event basis In this case the event is the sequence of writes to access the Super I O s device configuration registers Selecting the PNP Lock Unlock Registers option in Figure 7 13 activates the breakpoint anytime the lock and unlock sequence is hit The other option is to set breakpoints to trigger whenever any of the device configuration registers
352. tors version Symbol Device Public Release Full Release AMD Debugger A ef AweSim Processor e e DIMM Bank ef ef AMD 8 Generation Integrated Northbridge e e AMD 8111 Southbridge e ef AMD 8131 PCI X Controller X C AMD 8132 PCI X Controller ef ef AMD 8151 AGP Bridge Device Ei ef D AMD Graphics Device A ef Ka Emerald Graphics Device e ef i Matrox G400 G450 Graphics Device A E ro pu v v Pcex Test Device X v a Winbond W83627HF SIO A ef Ee Memory Device ei ei ot SMB Hub Device A ei e PCA9548 Device Ce sf we PCA9556 Device x d af AT24C Device Ce w CSS USB JumpDrive ef e Haj Desktop Network Adapter ef ef EXDI Server A ef Compaq SmartArray 5304 A ef Chapter 7 Device Configuration 49 AMD Confidential User Manual September 1 E 2008 Symbol Device Public Release Full Release ESE USB Keyboard x A VSE USB Mouse SS ei XTR Device SN Vv 44 ITE8712SI0 x A ATI SB400 SB600 SB700 A ef ATI RS480 RD790 RS780 RD890 A ef Ei AMD Tstanbul AMD Sao Paulo AMD sg w Magny Cours Table 7 1 Supported Devices To open a Device Property dialog window open the Device View window View Show Devices or click on the l button Then Open the workspace popup menu right click on a device in the workspace area and select Configure Dev
353. translated However this mechanism protects physical pages through the virtual mapping mechanism and this mechanism only knows about one virtual address mapping not all possible mappings of any code page Appendix A 189 AMD Confidential User Manual September 1 E 2008 A 6 Instruction Reference This section specifies the hexadecimal and or binary encodings for the opcodes that SimNow does ef does not or does partially amp simulate when simulating an AMD 8 Generation CPU Rev F A 6 1 Notation A 6 1 1 Mnemonic Syntax Each instruction has a syntax that includes the mnemonic and any operands that the instruction can take Figure A 1 shows an example of a syntax in which the instruction takes two operands In most instruction that take two operands the first left most operand is both a source operand the first source operand and the destination operand The second right most operand serves only as a source not a destination ADDPD xmml xmm2 mem128 Mnemonic First Operand and Destination Operand Second Source Operand Figure A 1 Syntax for Typical Two Operand Instruction The following notation is used to denote the size and type of source and destination operands e cReg Control Register e deg Debug register e imm Byte 8 Bit immediate e imm16 Word 16 Bit immediate e imm16 32 Word 16 bit or doubleword 32 bit immediate e imm32 Doubleword 32 bit immediate
354. ucture of both binary file and XML file is discussed below XTR can be used both in uni processor XTR UP and multi processor XTR MP configurations However currently only XTR UP is supported while XTR MP is under development There are two modes of XTR XTR Record and XTR Playback The simulator supports both modes and one mode does not necessitate the other The simulator could be used to record XTR traces only or playback XTR traces generated from other sources as far as the XTR specification is followed correctly see Section 7 22 4 Limitations on page 113 An XTR XML file contains Initialization Data Events and Instructions XTR Initialization data stores the state of CPU just before XTR recording is initiated This data is used to initialize the CPU and memory parameters during Playback the memory itself is initialized from the contents of the binary file Any register that does not have corresponding initialization data in XTR XML file will be initialized with zero XTR events fall into two categories e Dormant Events which record an event occurrence but do not trigger an event during playback e Active events that are recorded in XTR file and are actively triggered during playback IOR IOW MEMR MEMW RDMSR are examples of dormant events and INTR APIC DMAW EOT are examples of Active events XTR Instructions are commands that are injected in the XTR trace to give special instructions during XTR playback FJMP For
355. ugger Window is the debugger command line When the Debugger Window has attention enter T on the debugger command line The debugger Trace command will execute causing the CPU device to execute one instruction and then return attention to the debugger 4 The debugger will repeat the last entered command if you just type Enter on the command line So you can repeatedly step instructions by entering T once then repeatedly hitting the Enter key 5 The simulation can be returned to continuous execution by entering G This executes the debugger s Go command 10 1 3 Stepping Over an Instruction 1 Stop the simulation as described in Section 3 1 Tool Bar Buttons on page 7 2 Open the Debugger Window View Show Debugger or click on gt The simulation will pause and the Debugger Window will appear 3 When the Debugger Window has attention enter P on the debugger command line The debugger Pretty Trace command will execute causing the CPU device to execute up to the next instruction in linear order 1 e step over calls interrupts repeated instructions and loops This is distinguished from the T command 144 Chapter 10 CPU Debugger AMD Confidential User Manual September 1 ae 2008 which will step into calls interrupts etc executing the next instruction regardless of its type The debugger will repeat the last entered command if you just type Enter in the command edit window So you can repeatedly e
356. up 2 group devices 1 library device 15 1 3 Working with Device Groups From the main SimNow window View Show Devices opens a device viewer GUI window for the machine device group We can also open a device viewer GUI window that views any device group s children Right click the device icon and select Modify Group Show Devices from the popup menu If Modify Group Show Devices is not present then the device the user has clicked on is not a group Configure Device Ctrl E O Modify Group Show Devices Ctrl M Add Connection Delete Device s Del Disconnect Device s Group Devices Ctrl G What s This Help Figure 3 9 Modify Group Chapter 15 Frequently Asked Questions FAQ 171 AMD Confidential User Manual September 12 2008 Click on Modify Group Show Devices This will open a separate show device viewer window AweSim Process Processor 4 AweSim Processor 0 AMD Dh Generation AweSim Processor 5 Integrated Northbridge 6 Figure 3 10 Device Group If any modifications are done to the device group then they will be saved with the BSD Note that it is possible to modify a device group to a point where its children look nothing like the original device 15 1 4 Shell Automation Commands for Device Groups The shell automation commands that are used for a device also work for a device group For example shell KnownDevices lists all known devices both device libraries and d
357. ure mechansim SetSyncQuantum lt time nanoseconds gt Applies the MP Quantum lt time gt across all machines see also SetMPQuantum GetSyncQuantum Returns the MP Quantum value in nanoseconds set via SetSyncQuantum see also GetMPQuantum A 7 2 IDE 1 simnow gt ide usage Automation Command Description Image masterlslavelOl1 lt filename gt Creates a volume for the given disk image For e g ide image 0 i cOd0 img GetImage masterlslavelOl1 Displays the disk image for the given volume Journal masterlslavelOl1 offlonlOI1 Turns journaling on or off for specified drive For instance idejournal master on turns on journaling for master drive Appendix A 233 AMD Confidential User Manual September 12 2008 Automation Command Description JournalStatus masterlslavel0I1 Returns enabled or disabled if journaling is enabled or disabled for specified drive JournalSize masterlslavelOI1 Returns the journal size for specified dirve JournalSave masterlslavelOl1 lt filename gt Saves the contents of the primary or slave disk journal to a file JournalLoad masterlslavelOl1 lt filename gt Loads the contents of the primary of slave disk journal from a file JournalCommit masterlslavelO 1 Commits the contents of the disk journal on the master or slave drive to the disk image that drive represents
358. ure 7 1 AweSim Processor Type Properties Figure 7 2 shows the Logging tab for the AweSim processor device Here you can specify the following configuration options Check the Log Disassembly check box to log the disassembly of the instructions executed by the processor model Check the Log Register State Changes check box to log all the processor model register state changes Check the Log I O Read Writes check box to log all real I O not memory I O generated by the processor model Check the Log Linear Memory Accesses check box to log all memory accesses based on linear memory This logs all data memory accesses generated by the processor model This does not log code fetch memory accesses nor physical memory accesses for example page table access and dirty bit updates Check the Log Exceptions check box to log all exceptions generated by the processor model 52 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 D AweSim Processor 0 Properties Connections 1 0 Logging Logging Processor Type Options Log Disassembly C Log Register State Changes C Log LO Read writes C Log Linear Memory Accesses C Log Exceptions Figure 7 2 AweSim Processor Logging Properties Dialog Log Messages This device produces log messages to the Message Log Window as specified by the options in the Message Log Windows see Section 9 Logging on page 137
359. us 2 0 1 3 AMD 8111 ACPI 1 5 AMD 8111 ACS Audio 0 1 6 AMD 8111 MC97 Modem 0 1 H Simple Communications Controller 0 24 0 K8 Athlon64 Opteron HyperTransport Technology Configuration 0 24 1 K8 Athlon64 Opteron Address Map 0 24 2 K8 thlon64 0pteron DRAM Controller J oO OF O02 O38 D DD O06 OF mm O OB OC OD CE OF 00 22 10 54 74 00 00 10 O02 12 00 00 06 OO OO OO OO 10 08 00 00 OO OO OO OO OO OO OO OO OO OO OO OO OO 20 00 00 00 O00 OO OO OO OO OO OO OO OO OO OO OO OO 30 00 00 00 O00 A0 0O OO OO OO OO OO OO OO OO OO O00 40 00 00 00 00 O00 00 OO OO OO OO OO OO OO OO OO OO 50 00 00 00 O00 O00 O00 O00 00 OO OO OO OO OO OO OO OO 60 00 00 00 O00 O00 O00 00 OO OO OO OO OO OO OO OO OO 70 00 oO OO OO OO OO OO OO OO OO OO OO OO OO OO OO 80 00 00 00 00 O00 00 OO OO OO OO OO OO OO OO OO OO 90 00 00 00 00 00 00 O00 00 00 00 00 O00 00 OO OO O0 AO 02 CO 35 00 77 OB OO 1F OO OO OO OO OO OO OO OO BO 00 00 00 OO OO OF O1 00 OO OO OO OO OO OO OO OO Co 08 oO 60 O00 20 00 11 00 20 00 OO OO 22 O00 35 00 DO O02 O00 35 00 00 00 00 00 00 00 00 OO OO OO OO OO EQ 08 08 00 OO 08 08 OO OO OF OF OO OO OO OO OO OO FO 00 00 00 00 O00 OO OO OO OO OO OO OO OO OO OO OO Apply Register Modifications DWORD PCI Access Figure 8 1 PCI Configuration Viewer Chapter 8 PCI Configuration Viewer 135 List of all PCI devices PCI configuration space AMD Confidential User Manual September 12 2008 8 1 Scanning PCI
360. vice CPUO Type IOR ICount 7121 Address a037 Size 1 gt Chapter 7 Device Configuration 117 AMD Confidential User Manual September 12 2008 lt Data Length 1 Value 0d gt lt Event gt lt Event Device CPU0 Type IOR ICount 7137 Address a03e Size 2 gt lt Data Length 2 Value 0000 gt lt Event gt lt Event Device CPUO Type IOW ICount 7198 Address a03c Size 2 gt lt Data Length 2 Value 5fc0 gt lt Event gt lt Event Device CPUO Type DMAW ICount 8403 Address 000000000c254340 Length 64 gt lt Data Length 64 Value 6d00005f5e5bc3909ac04600b7c04600d4c04600eec0460008c1460022c146003cc14600 2fc2460067c2460085c24600a3c24600909090909090909090909090 gt lt Event gt lt Event Device CPUO Type DMAW ICount 18228 Address 000000000e67dc00 Length 64 gt lt Data Length 64 Value 00005f5e5d5b64890d0000000081c414040000c218008bff293b47003b3b47003b3b4700 4d3b47004d3b47004d3b4700568bf18b460c85c0c706f4eb5b007406 gt lt Event gt lt Event Device CPUO Type DMAW ICount 23921 Address 000000000c254340 Length 64 gt lt Data Length 64 Value 6d00005f5e5bc3909ac04600b7c04600d4c04600eec0460008c1460022c146003cc14600 2fc2460067c2460085c24600a3c24600909090909090909090909090 gt lt Event gt lt Event Device CPUO Type PIN ICount 326462 Name INTR Level A gt lt Event Device TO_DO_IN_NB Type APIC Count 326462 Name EXTINT DestinationMode
361. ware Model Matrox Millennium G400 AGP Graphics chip Matrox G400 DualHead support No Serial Number PBIO8418 Graphics BIOS v 2 1 Build 35 Graphics Memory Memory type SGRAM Amount of memory 32 MB Maximum RAMDAC speed 300 MHz Figure 7 10 Matrox G400 Information Property Dialog The Configuration tab displays details about the active configuration of the Matrox G400 graphics device If you want to change the active configuration click on the Configuration Tab see Figure 7 11 Chapter 7 Device Configuration 67 AMD Confidential User Manual September 12 2008 D Matrox R MGA G400 Graphics Adapter 9 Properties Connections 1 0 Logging Information Configuration Settings BIOS ROM File Images g400_897 21 bin Millennium G400 Adapters Millennium G400 Max DualHead 32 MB SGRAM 360 MHz RAMDAC Millennium G400 SingleHead 32 MB SGRAM 300 MHz RAMDAC Millennium G400 SingleHead 32 MB SDRAM 300 MHz RAMDAC Millennium G400 DualHead 16 MB SGRAM 300 MHz RAMDAC Millennium G400 SingleHead 16 MB SGRAM 300 MHz RAMDAC Millennium G400 SingleHead 16 MB SDRAM 300 MHz RAMDAC Note Restart or reset your simulation for the settings to take effect Figure 7 11 Matrox G400 Configuration Properties The BIOS ROM File input field gives you the ability to load different Matrox G400 BIOS ROMs into the device This is in particular useful if Matrox releases a new BIOS ROM f
362. word read of 0x11223344 from PCI configuration register 0x40 of device 7 function 1 on bus 0 would produce the following log messages PCI CONFIG READ Bus 0 Device 7 Function 1 Register 40 Data 44 PCI CONFIG READ Bus 0 Device 7 Function 1 Register 41 Data 33 PCI CONFIG READ Bus 0 Device 7 Function 1 Register 42 Data 22 PCI CONFIG READ Bus 0 Device 7 Function 1 Register 43 Data 11 Differences from Real Hardware The Northbridge device differs from the real hardware in that the simulator does not support the debug hardware registers The device also does not support memory interleaving by node though this will change in the near future The device will differ in those things that are of a timing related nature such as setting of bus speeds Full probe transactions are not modeled Registers that deal with items outside of the testing of transfer protocols at the register level are not functional buffer count registers etc They are present and read write able but do not effect the simulation Chapter 7 Device Configuration 85 AMD Confidential User Manual September 12 2008 7 11 AMD 8111 Southbridge Devices IO Hubs The Southbridge devices provide the basic I O Southbridge functionality of the system Features include a PIO mode IDE controller register set for the USB controller s an LPC ISA bridge a system management bus controller IOAPIC bus bridge if applicable and legacy AT devices PIC PIT CMOS
363. xecute the pretty trace command by entering P once then repeatedly hitting the Enter key The simulation can be returned to continuous execution by entering G This executes the debugger s Go command 10 1 4 Skipping an Instruction 1 2 3 Stop the simulation as described in Section 3 1 Tool Bar Buttons on page 7 Setup a breakpoint to break at the instruction that you want to step over see Section 10 1 1 Setting a Breakpoint on page 143 Execute to the breakpoint Determine the EIP of the next instruction after the one to be skipped This can easily be determined by viewing the disassembly listing in the debugger The top line in the disassembly listing is the instruction pointed to by the current EIP the instruction that you wish to skip Use the debugger s R command to change the value in the EIP register This can be done by typing R EIP new_value on the debugger command line In this case new_value is the linear address of the instruction that follows the one that you want to skip Enter G on the debugger command line This will execute the debugger s Go command CPU execution will resume 10 1 5 Viewing a Memory Region l 2 3 Stop the simulation as described in Section 3 1 Tool Bar Buttons on page 7 Open the Debugger Window View Show Debugger or click on gt The simulation will pause and the Debugger Window will appear When the Debugger Window has attention use the debu
364. xist Specifies current Machine ID d Mouse and Keyboard 2 Simnow gt listmachines inputs are enabled 23 SCH zygac acl d Mouse and keyboard iL gp Swejel ape inputs are disabled 2 simnow gt VGA Window is enabled GUI is enabled console mode See also Section 5 1 Command Line Arguments on page 35 for further information regarding available command line arguments To exit a created simulated machine enter exit as shown in the following example 1 simnow gt exit 42 Chapter 5 Running the Simulator AMD Confidential User Manual September 12 2008 2 simnow gt This example exits the simulated machine Chapter 5 Running the Simulator 43 AMD Confidential User Manual September 1 2 2008 This page is intentionally blank 44 Chapter 5 Running the Simulator AMD Confidential User Manual September 1 jae 2008 6 Create a Simulated Computer This section describes how to create a simulated computer from scratch We will build a computer identical to the solo bs computer Please note that this only works if you are not using the public release version of the simulator The public release version of the simulator does not support the necessary features which are required to create a simulated computer from scratch Figure 6 1 shows the layout of the existing solo bsd Device Window The device position is not important because the connections between d
365. y made to the VGA or DVI interface It can be connected to the VGA or DVI connection of a video card device Contents of a BSD The current state of all internal registers and any internal state variables are saved in the BSD Initialization and Reset State When first initialized or reset the Plug and Play Monitors DDC registers are set to their default state After initialization the monitor device will operate in DDC1 mode The device will remain in the DDC1 mode until there is a valid HIGH to LOW transition on the SCL pin when it will switch to DDC2B mode Differences from Real Hardware The model attempts to match the functionality of the physical devices from a programmer s perspective Upon power up a real Plug and Play monitor will output valid data only after it has been initialized During initialization data will not be available until after the first nine clock cycles are sent to the device This Plug and Play monitor device model does not simulate this behaviour It will always output valid data The Page Write Acknowedge Polling and the Write Protection feature are currently not supported Configuration Options The Plug and Play Monitor device gives you the opportunity to choose from different Plug and Play Monitor device models as shown in Figure 7 35 126 Chapter 7 Device Configuration AMD Confidential User Manual September 12 2008 D Plug and Play Monitor 10 Properties Connections 1 0 Loggin
366. yte ib two bytes iw or four bytes id Word and doubleword values start wit the low order byte e rb rw rd rq Specifies a register value that is added to the hexadecimal byte on the left forming a one byte opcode The result is an instruction that operates on the register specified by the register code Valid register code values are shown in AMD x86 64 Architecture Programmer e Manual Volume 3 e m64 Specifies a quadword 64 bit operand in memory 192 Appendix A AMD Confidential User Manual September 1 ge 2008 e i Specifies an x87 floating point stack operand ST i The value is used only with x87 floating point instructions It is added to the hexadecimal byte on the left forming a one byte opcode Valid values range from 0 to 7 A 6 2 General Purpose Instructions This chapter describes the function mnemonic syntax and opcodes that the simulator simulates General purpose instructions are used in basic software execution Most of these instructions load store or operate on data location in the general purpose registers GPRs in memory or in both The remaining instructions are used to alter the sequential flow of the program by branching to other locations within the program or to entirely different programs i Instruction Suprarted Mnemonic Opcode
367. ze of the frame buffer in Megabytes The size must be a power of 2 The value placed in this option is only read at reset The frame buffer size can not be dynamically modified FrameBufGetSize Returns the size of the frame buffer in Megabytes Enables 1 or disables 0 the Accelerator used by the FrameBufSize lt size gt ae Video driver GetAccel Returns true if Accelerator is enabled otherwise it returns false VBE OI Enables 1 or disables 0 VESA BIOS Extensions 242 Appendix A User Manual AMD Confidential September 12 2008 Automation Command Description Get VBE Returns true if VESA BIOS Extensions is enabled otherwise it returns false A 7 19 Matrox MGA G400 Graphics 1 simnow gt mgag400 usage Automation Command Description SetTexmap 0 1 Enables 1 or disables 0 the texture units By default the texture units are disabled SetCardType CARDID Sets the MGA G400 type to CARDID Valid values for CARDID are 6648 888 6616 and 824 GetCardType Returns the current CARDID value A 7 20 PCI Bus 1 simnow gt pcibus usage Automation Command Description DeviceID lt SlotID gt lt DeviceID gt Sets the DeviceID to DeviceID on slot SlotID GetDeviceID lt SlotID gt Returns the DeviceID of specified slot SlotID BaseIRQ lt SlotID gt alblcld Sets the Base IRQ of slot SlotID to A B C or

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