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Crucial Micron M500DC 120 GB

1. Word Bit s Setting Default Value Description 222 Transport major revision number 0000h or FFFFh Device does not report version 15 12 0001b Transport type 0 Parallel 1 Serial 2 15 Reserved Parallel type 0 serial type 1 11 7 000000b Reserved 6 1b 1 SATA rev 3 1 is supported 5 1b Reserved SATA rev 3 0 4 1b Reserved SATA rev 2 6 3 1b Reserved SATA rev 2 5 2 1b Reserved SATA II Extensions 1 1b Reserved SATA 1 0a 0 1b ATA8 APT ATA8 AST 223 M F 0000h Transport minor revision number 224 F 0000h 0000h 0000h Reserved for CE ATA 0000h 0000h 0000h 0000h 0000h 0000h 0000h 234 O F 0001h Minimum number of 512 byte units per DOWNLOAD MICRO CODE command for mode 3 235 OOFFh Maximum number of 512 byte units per DOWNLOAD MICRO CODE command for mode 3 236 0000h 0000h 0000h Reserved 0000h 0000h 0000h 0000h 243 0000h Bit 14 1 supports FDE security features 244 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 0000h 255 M F Integrity word 15 8 Varies Checksum 7 0 A5h Signature Note 1 F The content of the word is fixed and does not change V The content of the word is variable and may change depending on the state of the device or the commands executed by the device X The content of the word may be fixed or variable R The content of the word is reserved and will be zero M Support of the word is mandato
2. Note 1 All dimensions are in millimeters per SFF 8201 REV 2 7 Figure 5 Thermocouple Placement Guidelines for Temperature Measurement Center thermocouple here 36 3mm Non label side of SSD le r b z Pi 3mm l 5 1 a i i a i I 2 3mm o I 2 I a Pe renee Q 9 3mm 3mm i pe 33 54mm 73 62mm E 26 88mm a PDF 09005aef854b6757 28 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved Il icron M500DC 2 5 Inch NAND Flash SSD References References e Serial ATA High speed serialized AT attachment Serial ATA working group available at www sata io org e SATA 3 1 GOLD e ATA 8 Rev 4 e SFF 8201 Rev 2 7 PDF 09005aef854b6757 29 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved IA icron M500DC 2 5 Inch NAND Flash SSD Revision History Revision History Rev G 02 15 e Updated Feature and Reference with SFF 8201 Rev 2 7 e Updated Package Dimensions Rev F 10 14 e Updated and added Reliability parameters in Feature e Updated Table 8 Uncorrectable Bit Error Rate in Reliability Rev E 8 14 e Updated device ID values e Updated Idle Avera
3. MS500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved Macron Table 5 Identify Device Continued See Note 1 for setting definitions M500DC 2 5 Inch NAND Flash SSD Device ID Word Bit s Setting Default Value Description 79 Serial ATA features are enabled 15 7 V 000000000b Reserved 6 V 1b 1 Software settings preservation is enabled 5 V Ob 1 Asynchronous notification is enabled 4 V Ob 1 In order data delivery is enabled 3 V Ob 1 Device initiating interface power management is enabled 2 V Ob 1 DMA setup auto activate optimization is enabled 1 V Ob 1 Non zero buffer offsets in DMA setup FIS is enabled 0 V Ob Reserved set to 0 80 Major revision number 15 10 F 000000b Reserved 9 F 1b 1 ATA8 ACS2 is supported 8 F 1b 1 ATA8 ACS is supported 7 F 1b 1 ATA ATAPI 7 is supported 6 F 1b 1 ATA ATAPI 6 is supported 5 F 1b 1 ATA ATAPI 5 is supported 4 F 1b 1 ATA ATAPI 4 is supported 3 F 1b Obsolete 2 S 0b Obsolete 1 S 0b Obsolete 0 F 0b Reserved 81 F 0028h Minor revision number PDF 09005aef854b6757 M500DC_2_5_disti pdf Rev G 02 15 EN 1 1 Micron Technology Inc reserves the right to change products or specifications without notice 2013 Micron Technology Inc All rights reserved IA icron M500DC 2 5 Inch NAND Flash SSD Device ID Table 5 Identify D
4. DMA are supported 11 F Ob 1 READ BUFFER DMA is supported 10 F Ob 1 WRITE BUFFER DMA is supported 9 F 1b 1 SET MAX PASSWORD DMA and SET MAX UNLOCK DMA are supported 8 F Ob 1 DOWNLOAD MICROCODE DMA is supported 7 F Ob Reserved for IEEE 1667 6 F Ob 1 Optional ATA device 28 bit commands are supported 5 F 1b 1 Read zero after trim is supported 4 F Ob 1 Device encrypts all user data per ATA8 ACS2 3 F Ob 1 Extended number of user addressable sectors is supported words 230 233 2 0 F 000b Reserved 70 F 0000h Reserved 71 F 0000h 0000h 0000h Reserved for the IDENTIFY PACKET DEVICE command 0000h 75 Queue depth 15 5 F 00000000000b Reserved 4 0 F 11111b Maximum queue depth 1 PDF 09005aef854b6757 9 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved IA icron M500DC 2 5 Inch NAND Flash SSD Device ID Table 5 Identify Device Continued See Note 1 for setting definitions Word Bit s Setting Default Value Description 76 Serial ATA capabilities 15 F 1b 1 Supports READ LOG DMA EXT as equivalent to READ LOG EXT 14 F Ob 1 Supports Device automatic partial to slumber transitions 13 F Ob 1 Supports host automatic partial to slumber transitions 12 F 1b Native
5. command queuing priority information is supported 11 F Ob Unload while NCQ commands are outstanding is supported 10 F 1b Physical event counters are supported 9 F Ob 1 Receipt of host initiated interface power management re quests is supported 8 F 1b Native command queuing is supported 7 4 F 0000b Reserved for future Serial ATA signaling speed grades 3 F 1b 1 Serial ATA Gen 3 speed 6 0 Gb s is supported 2 F 1b 1 Serial ATA Gen 2 speed 3 0 Gb s is supported 1 F 1b 1 Serial ATA Gen 1 speed 1 5 Gb s is supported 0 F Ob Reserved set to 0 77 Serial ATA additional capabilities 15 7 F 000000000b Reserved for future Serial ATA definition 6 F 1b 1 Supports RECEIVE FPDMA QUEUED and SEND FPDMA QUEUED commands 5 F Ob NCQ QUEUE MANAGEMENT command is supported 4 F Ob NCQ streaming is supported 3 1 V 011b Coded value indicating current negotiated Serial ATA signal speed 0 F Ob Shall be cleared to zero 78 Serial ATA features are supported 15 7 F 000000000b Reserved 6 F 1b 1 Supports software settings preservation 5 F Ob Reserved 4 F Ob 1 In order data delivery is supported 3 F Ob 1 Dev initiate interface power management is supported 2 F 1b 1 DMA setup auto activate optimization is supported 1 F Ob 1 Non zero buffer offsets in DMA setup FIS are supported 0 F Ob Reserved set to 0 PDF 09005aef854b6757 1 0 Micron Technology Inc reserves the right to change products or specifications without notice
6. selected 8 V Ob 1 Multiword DMA mode 0 is selected 0 Multiword DMA mode 0 is not selected 7 3 F 0000b Reserved 2 F 1b 1 Multiword DMA mode 2 and below are supported 1 F 1b 1 Multiword DMA mode 1 and below are supported 0 F 1b 1 Multiword DMA mode 0 is supported 64 15 8 F 00h Reserved 7 0 F 03h PIO modes is supported 65 F 0078h Minimum Multiword DMA transfer cycle time per word Cycle time in nanoseconds 66 F 0078h Manufacturer s recommended Multiword DMA transfer cycle time Cycle time in nanoseconds 67 F 0078h Minimum PIO transfer cycle time without flow control Cycle time in nanoseconds 68 F 0078h Minimum PIO transfer cycle time with IORDY flow control Cycle time in nanoseconds PDF 09005aef854b6757 M500DC_2_5_disti pdf Rev G 02 15 EN 8 Micron Technology Inc reserves the right to change products or specifications without notice 2013 Micron Technology Inc All rights reserved IA icron M500DC 2 5 Inch NAND Flash SSD Device ID Table 5 Identify Device Continued See Note 1 for setting definitions Word Bit s Setting Default Value Description 69 F Additional supported 15 F Ob 1 CFast specification is supported 14 F 1b 1 Deterministic read after trim is supported 13 F Ob 1 Long physical sector alignment error reporting control is supported 12 F Ob 1 DEVICE CONFIGURATION IDENTIFY DMA and DEVICE CON FIGURATION SET
7. up after pow er up 5 F Ob 1 Power up in standby feature set is supported 4 F Ob Obsolete 3 F 1b 1 Advanced power management feature set is supported 2 F Ob 1 CFA feature set is supported 1 F Ob 1 READ WRITE DMA QUEUED is supported 0 F 1b 1 DOWNLOAD MICROCODE command is supported PDF 09005aef854b6757 1 2 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved IA icron M500DC 2 5 Inch NAND Flash SSD Device ID Table 5 Identify Device Continued See Note 1 for setting definitions Word Bit s Setting Default Value Description 84 Command set feature supported extension 15 F Ob Shall be cleared to zero 14 F 1b Shall be set to one 13 F 1b 1 Idle immediate with unload feature is supported 12 F Ob Reserved for technical report INCITS TR 37 2004 TLC 11 F Ob Reserved for technical report INCITS TR 37 2004 TLC 10 9 F 00b Obsolete 8 F 1b 1 64 bit word wide name is supported 7 F Ob 1 WRITE DMA QUEUED FUA EXT command is supported 6 F 1b 1 WRITE DMA FUA EXT and WRITE MULTIPLE FUA EXT com mands are supported 5 F 1b 1 General purpose logging feature set is supported 4 F Ob 1 Streaming feature set is supported 3 F Ob 1 Media card pass through command feature s
8. 0000000000b _ Logical sector offset within the first physical sector where the first logical sector is placed 210 O V 0000h 0000h Write read verify sector count mode 3 only 212 O F 0000h 0001h Verify sector count mode 2 only 214 O NV cache capabilities 15 12 F 0000b NV cache feature set version 11 8 F 0000b NV cache power mode feature set version 7 5 F 000b Reserved 4 V Ob 1 NV cache feature set is enabled 3 2 F 00b Reserved V Ob 1 NV cache power mode feature set is enabled 0 F Ob 1 NV cache power mode feature set is supported 215 O V 0000h NV cache size in logical blocks LSW 216 O V 0000h NV cache size in logical blocks MSW 217 M F 0001h Nominal media rotation rate ATA8 ACS 1699 D revision 6 NV cache read transfer speed in MB s ATA8 ACS 1699 D revi sion 3f 218 O V 0000h NV cache write transfer speed in MB s 219 NV cache options 15 8 F 00h Reserved 7 0 F 00h Device estimated time to spin up in seconds 220 15 8 F 00h Reserved 7 0 V 00h Write read verify feature set current mode 221 0000h Reserved PDF 09005aef854b6757 M500DC_2_5_disti pdf Rev G 02 15 EN 20 Micron Technology Inc reserves the right to change products or specifications without notice 2013 Micron Technology Inc All rights reserved Macron Table 5 Identify Device Continued See Note 1 for setting definitions M500DC 2 5 Inch NAND Flash SSD Device ID
9. 0GB 937 703 088 37E436B0 937 703 087 37E436AF 480 103 981 056 800GB 1 562 824 368 5D26CEBO 1 562 824 367 5D26CEAF 800 166 076 416 Physical Configuration Table 2 2 5 Inch Dimensions Value Specification Nom Max Unit Height 7 0 mm Width 69 85 mm Length 100 20 mm PDF 09005aef854b6757 4 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved Ia icron M500DC 2 5 Inch NAND Flash SSD Interface Connectors Interface Connectors The SATA signal segment interface cable has four conductors and three ground connec tions As shown in Package Dimensions the cable includes a 7 pin signal segment and a 15 pin power segment arranged in a single row with a 1 27mm 0 050in pitch Table 3 SATA Signal Segment Pin Assignments Signal Name Type Description S1 GND Ground S2 A Differential signal pair A and A S3 A S4 GND Ground S5 B Differential signal pair B and B S6 B S7 GND Ground Table 4 2 5 Inch SATA Power Segment Pin Assignments Pin Signal Name Description P1 V33 No connect P2 V33 No connect P3 V33 No connect P4 GND Ground P5 GND Ground P6 GND Ground P7 V5 5V power precharge P8 V5 5V power P9 V5 5V power P10 GND Ground P11 DAS Device activity signal P12 GND Ground P13 V12 No con
10. 5 4h 1 8 169 DATA SET MANAGEMENT command is supported 15 1 F 000000000000000b Reserved 0 F 1b 1 The trim bit in the DATA SET MANAGEMENT command is supported 170 F 0000h 0000h 0000h Additional product identifier 0000h 174 F 0000h 0000h Reserved 176 O V Varies Current media serial number 60 ASCII characters PDF 09005aef854b6757 M500DC_2_5_disti pdf Rev G 02 15 EN 1 9 Micron Technology Inc reserves the right to change products or specifications without notice 2013 Micron Technology Inc All rights reserved Macron Table 5 Identify Device Continued See Note 1 for setting definitions M500DC 2 5 Inch NAND Flash SSD Device ID Word Bit s Setting Default Value Description 206 SCT command transport 15 12 X 0000b Vendor specific 11 6 F 000000b Reserved 5 F 1b SCT command transport data tables are supported 4 F 1b SCT command transport features control is supported 3 F Ob SCT command transport error recovery control is supported 2 F 1b SCT command transport write same is supported 1 F Ob SCT command transport long sector access is supported 0 F 1b SCT command transport is supported 207 F 0000h 0000h Reserved for CE ATA 209 O Alignment of logical blocks within a larger physical block 15 F Ob Shall be cleared to zero 14 F 1b Shall be set to one 13 0 F 0000
11. ART error logging is supported PDF 09005aef854b6757 1 4 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved Macron Table 5 Identify Device Continued See Note 1 for setting definitions M500DC 2 5 Inch NAND Flash SSD Device ID Word Bit s Setting Default Value Description 88 Ob Ultra DMA modes 15 Ob Reserved 14 Ob 1 Ultra DMA mode 6 is selected 0 Ultra DMA mode 6 is not selected 13 Ob 1 Ultra DMA mode 5 is selected 0 Ultra DMA mode 5 is not selected 12 Ob 1 Ultra DMA mode 4 is selected 0 Ultra DMA mode 4 is not selected 11 Ob 1 Ultra DMA mode 3 is selected 0 Ultra DMA mode 3 is not selected 10 Ob 1 Ultra DMA mode 2 is selected 0 Ultra DMA mode 2 is not selected 9 Ob 1 Ultra DMA mode 1 is selected 0 Ultra DMA mode 1 is not selected 8 Ob 1 Ultra DMA mode 0 is selected 0 Ultra DMA mode 0 is not selected 7 Ob Reserved 6 1b 1 Ultra DMA mode 6 and below are supported 5 1b 1 Ultra DMA mode 5 and below are supported 4 1b 1 Ultra DMA mode 4 and below are supported 3 1b 1 Ultra DMA mode 3 and below are supported 2 1b 1 Ultra DMA mode 2 and below are supported 1 1b 1 Ultra DMA mode 1 and below are supported 0 1b 1 Ultra DMA mode 0 is su
12. DF 09005aef854b6757 M500DC_2_5_disti pdf Rev G 02 15 EN 6 Micron Technology Inc reserves the right to change products or specifications without notice 2013 Micron Technology Inc All rights reserved Macron Table 5 Identify Device Continued See Note 1 for setting definitions M500DC 2 5 Inch NAND Flash SSD Device ID Word Bit s Setting Default Value Description 48 Trusted Computing feature set options 15 F Ob Shall be cleared to zero 14 F 1b Shall be set to one 13 1 F 0000000000000b Reserved for the Trusted Computing Group 0 F Ob 1 Trusted Computing feature set is supported 49 Capabilities 15 14 F 00b Reserved for the IDENTIFY PACKET DEVICE command 13 F 1b 1 Standby timer values as specified in this standard are sup ported 0 Standby timer values shall be managed by the device 12 F Ob Reserved for the IDENTIFY PACKET DEVICE command 11 F 1b 1 IORDY is supported 0 IORDY may be supported 10 F 1b 1 IORDY may be disabled 9 1b 1 LBA is supported 8 F 1b 1 DMA is supported 7 0 F 00000000b Retired 50 Capabilities 15 F Ob Shall be cleared to zero 14 F 1b Shall be set to one 13 2 F 000000000000b Reserved 1 X Ob Obsolete 0 F 1b Shall be set to one to indicate a vendor specific standby timer value minimum 51 X 0000h 0000h Obsolete 53 15 3 F 0000000000000b_ Reserved 2 F 1b 1 The fields re
13. F3h SECURITY ERASE UNIT F4h PDF 09005aef854b6757 M500DC_2_5_disti pdf Rev G 02 15 EN 22 Micron Technology Inc reserves the right to change products or specifications without notice 2013 Micron Technology Inc All rights reserved IA icron M500DC 2 5 Inch NAND Flash SSD Commands Table 6 Supported ATA Command Set Continued See ATA 8 standard for command details Command Name Command Code hex SECURITY FREEZE LOCK F5h SECURITY SET PASSWORD Fih SECURITY UNLOCK F2h SEEK 70h SET FEATURES EFh SET MAX ADDRESS F9h SET MAX ADDRESS EXT 37h SET MULTIPLE MODE C6h SLEEP E6h or 99h SMART DISABLE OPERATIONS BOh D9h SMART ENABLE OPERATIONS BOh D8h SMART ENABLE DISABLE AUTOSAVE BOh D2h SMART EXECUTE OFF LINE IMMEDIATE BOh D4h SMART READ DATA BOh DOh SMART READ LOG BOh D5h SMART RETURN STATUS BOh DAh SMART WRITE LOG BOh D6h STANDBY E2h or 96h STANDBY IMMEDIATE EOh or 94h WRITE BUFFER E8h WRITE DMA with retry CAh WRITE DMA without retry CBh WRITE DMA EXT 35h WRITE DMA FUA EXT 3Dh WRITE FPDMA QUEUED 61h WRITE LOG EXT 3Fh WRITE LOG DMA EXT 57h WRITE MULTIPLE CSh WRITE MULTIPLE EXT 39h WRITE MULTIPLE FUA EXT CEh WRITE SECTOR S with retry 30h WRITE SECTOR S EXT 34h WRITE UNCORRECTABLE EXT 45h PDF 09005aef854b6757 23 Micron Technology Inc reserves the right to change products or speci
14. Ia icron M500DC 2 5 Inch NAND Flash SSD Features M500DC 2 5 Inch SATA NAND Flash SSD MTFDDAK120MBB 1AE1ZABYY MTFDDAK240MBB 1AE1ZABYY MTFDDAK480MBB 1AE1ZABYY MTFDDAK800MBB 1AE1ZABYY Features e 800GB performance steady state 2 Sequential 128KB read 425 MB s Sequential 128KB write 375 MB s Random 4KB read 65 000 IOPS Micron 20nm MLC NAND Flash RoHS compliant package e SATA 6 Gb s interface Random 4KB write 24 000 IOPS e ATA modes supported READ latency 0 50ms PIO mode 3 4 WRITE latency 1 5ms Multiword DMA mode 0 1 2 e Reliability Ultra DMA mode 0 1 2 3 4 5 Mean time to failure MTTF 2 million device e Enterprise sector size support hours 512 byte Static and dynamic wear leveling e Hot plug capable Uncorrectable bit error rate UBER lt 1 sector e Native command queuing support with 32 com per 10 bits read mand slot support End to end data protection e ATA 8 ACS2 command set compliant Enhanced power loss data protection with data e ATA security feature command set and password protection capacitor monitoring login support e Endurance Total bytes written TBW e Security erase command set fast and secure erase 120GB 0 5PB 240GB 1 0PB 480GB 1 9PB e Self monitoring analysis and reporting technology 800GB 1 9PB SMART command set e Capacity unformatted 120GB 240GB 480GB e 120GB performance steady state 2 800GB Sequential 128
15. Identify Device Continued See Note 1 for setting definitions M500DC 2 5 Inch NAND Flash SSD Device ID Word Bit s Setting Default Value Description 119 Commands and feature sets are supported continued from words 84 82 15 F Ob Shall be cleared to zero 14 F 1b Shall be set to one 13 8 F 00000000b Reserved 7 F Ob 1 Extended power conditions feature set is supported 6 F Ob 1 Extended status reporting feature set is supported 5 F Ob 1 Free fall control feature set is supported 4 F 1b 1 DOWNLOAD MICROCODE command with mode 3 suppor ted 3 F 1b 1 READ LOG DMA EXT and WRITE LOG DMA EXT commands supported 2 F 1b 1 Write uncorrectable EXT command is supported 1 F 1b 1 Write read verify feature set is supported 0 F Ob Reserved for DDT 120 Commands and feature sets are supported or enabled contin ued from words 87 85 15 Ob Shall be cleared to zero 14 1b Shall be set to one 13 6 00000000b Reserved 5 Ob 1 Free fall control feature set is enabled 4 1b 1 The DOWNLOAD MICROCODE command with mode 3 is supported 3 1b 1 The READ LOG DMA EXT and WRITE LOG DMA EXT com mands are supported 2 1b 1 The WRITE UNCORRECTABLE EXT command is supported Ob 1 The write read verify feature set is enabled 0 Ob 1 The disable data transfer after error detection feature set is enabled 0 The disable data transfer after erro
16. KB read 425 MB s e Mechanical 7 0mm height Sequential 128KB write 200 MB s SATA connector 5V 10 Random 4KB read 63 000 IOPS 2 5 inch drive 100 2mm x 69 85mm x 7 0mm Random 4KB write 23 000 IOPS Conforms to SFF standards READ latency 0 50ms WRITE latency 1 5ms Field upgradeable firmware Power consumption lt 6 0W TYP lt 6 3W TYP for e 240GB performance steady state 800GB Sequential 128KB read 425 MB s e Operating temperature Sequential 128KB write 330 MB s Commercial 0 C to 70 C 5 Random 4KB read 63 000 IOPS Random 4KB write 33 000 IOPS Notes 1 Typical I O performance numbers as meas READ latency 0 50ms ured using lometer with a queue depth of WRITE latency 1 5ms 32 and write cache disabled e 480GB performance steady state 2 2 4KB transfers used for READ WRITE latency Sequential 128KB read 425 MB s values Sequential 128KB write 375 MB s 3 The product achieves a MTTF based on pop Random 4KB read 63 000 IOPS ulation statistics not relevant to individual Random 4KB write 35 000 IOPS units READ latency 0 50ms 4 1GB 1 billion bytes formatted capacity is WRITE latency 1 5ms less 5 Drive case temperature Warranty Contact your Micron sales representative for further information regarding the product including product warranties PDF 09005aef854b6757 1 Micron Technology Inc reserves the right to change p
17. LUSH CACHE EXT command is supported 12 F 1b 1 FLUSH CACHE command is supported 11 F 1b 1 Device configuration overlay is supported 10 F 1b 1 48 bit address feature set is supported 9 V Ob 1 Automatic acoustic management feature set is enabled 8 F Ob 1 SET MAX security enabled by SET MAX SET PASSWORD 7 F Ob Reserved for address offset reserved area boot INCITS TR27 2001 6 F Ob 1 SET FEATURES subcommand required to spin up after pow er up 5 V Ob 1 Power up in standby feature set is enabled 4 V Ob Obsolete 3 V 1b 1 Advanced power management feature set is enabled 2 F Ob 1 CFA feature set is supported 1 F Ob 1 READ WRITE DMA QUEUED command is supported 0 F 1b 1 DOWNLOAD MICROCODE command is supported 87 Command set feature is enabled supported 15 F 0b Shall be cleared to zero 14 F 1b Shall be set to one 13 F 1b 1 IDLE IMMEDIATE with UNLOAD FEATURE is supported 12 V Ob Reserved for technical report INCITS tr 37 2004 TLC 11 V Ob Reserved for technical report INCITS TR 37 2004 TLC 10 9 F 00b Obsolete 8 F 1b 1 64 bit word wide name is supported 7 F Ob 1 WRITE DMA QUEUED FUA EXT command is supported 6 F 1b 1 WRITE DMA FUA EXT and WRITE MULTIPLE FUA EXT com mands are supported 5 F 1b 1 General purpose logging feature set is supported 4 V Ob Obsolete 3 V Ob 1 Media card pass through command feature set is supported 2 V Ob 1 Media serial number is valid 1 F 1b 1 SMART self test is supported 0 F 1b 1 SM
18. all clear these bits to zero Device 0 shall set these bits in accordance with the ATA8 ACS2 specification See specification for details Ob Reserved Ob 0 Device 0 does not respond when device 1 is selected 1 Device 0 responds when device 1 is selected Ob 0 Device 0 did not detect the assertion of DASP 1 Device 0 detected the assertion of DASP Ob 0 Device 0 did not detect the assertion of PDIAG 1 Device 0 detected the assertion of PDIAG Ob 0 Device 0 failed diagnostics 1 Device 0 passed diagnostics 00b These bits indicate how device 0 determined the device num ber 00 Reserved 01 A jumper was used 10 The CSEL signal was used 11 Some other method was used or the method is unknown Ob Shall be set to one 94 15 8 00h Vendor s recommended acoustic management value 7 0 00h Current automatic acoustic management value 95 O V 0000h Stream minimum request size PDF 09005aef854b6757 M500DC_2_5_disti pdf Rev G 02 15 EN 1 6 Micron Technology Inc reserves the right to change products or specifications without notice 2013 Micron Technology Inc All rights reserved Macron Table 5 Identify Device Continued See Note 1 for setting definitions M500DC 2 5 Inch NAND Flash SSD Device ID Word Bit s Settin
19. es 1 Data taken at 25 C using a 6 Gb s SATA interface 2 Sequential power measured during lometer with 128KB transfer RMS average over a 500ms window Table 12 Maximum Ratings Parameter Condition Symbol Min Max Unit Voltage input V5 4 5 5 5 V Operating temperature Te 0 70 SC Non operating temperature 40 85 ge Rate of temperature change 20 C hour Relative humidity non condensing 5 95 Table 13 Shock and Vibration Parameter Condition Specification Operating shock 1500G 0 5ms Operating vibration 10 500Hz at 3 1G PDF 09005aef854b6757 26 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved Ia icron M500DC 2 5 Inch NAND Flash SSD Compliance Compliance Micron SSDs comply with the following e RoHS CE Europe EN55022 2006 A1 2007 and EN55024 1998 A1 2001 A2 2003 FCC CFR Title 47 Part 15 Class A UL cUL approval to UL 60950 1 2nd Edition IEC 60950 1 2005 2nd Edition Am 1 2009 EN 60950 1 2006 A11 2009 A1 2010 A12 2011 BSMI Taiwan approval to CNS 13438 C TICK Australia New Zealand approval to AS NZS CISPR22 KCC RRL Korea approval to KCC REM MU2 P400m25 W E E E Compliance with EU WEEE directive 2002 96 EC Additional obligations may apply to customers who place these products
20. et is supported 2 F Ob 1 Media serial number is supported 1 F 1b 1 SMART self test is supported 0 F 1b 1 SMART error logging is supported 85 Command set feature is enabled 15 X Ob Obsolete 14 F 1b 1 NOP command is supported 13 F 1b 1 READ BUFFER command is supported 12 F 1b 1 WRITE BUFFER command is supported 11 X Ob Obsolete 10 V 1b 1 Host protected area feature set is enabled 9 F Ob 1 DEVICE RESET command is supported 8 V Ob 1 SERVICE interrupt is enabled 7 V Ob 1 Release interrupt is enabled 6 V 1b 1 Look ahead is enabled 5 V 1b 1 Write cache is enabled 4 F Ob Shall be cleared to zero to indicate that the packet feature set is not supported 3 F 1b Power management feature set is enabled 2 F Ob Obsolete 1 V Ob 1 Security mode feature set is enabled 0 V 1b 1 SMART feature set is enabled PDF 09005aef854b6757 1 3 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved IA icron M500DC 2 5 Inch NAND Flash SSD Device ID Table 5 Identify Device Continued See Note 1 for setting definitions Word Bit s Setting Default Value Description 86 Command set feature is enabled 15 1b 1 Words 120 119 are valid 14 F 0b 1 Reserved 13 F 1b 1 F
21. evice Continued See Note 1 for setting definitions Word Bit s Setting Default Value Description 82 Command set is supported 15 X Ob Obsolete 14 F 1b 1 NOP command is supported 13 F 1b 1 READ BUFFER command is supported 12 F 1b 1 WRITE BUFFER command is supported 11 X Ob Obsolete 10 F 1b 1 Host protected area feature set is supported 9 F Ob 1 DEVICE RESET command is supported 8 F Ob 1 Service interrupt is supported 7 F Ob 1 Release interrupt is supported 6 F 1b 1 Read look ahead is supported 5 F 1b 1 Write cache is supported 4 F Ob Shall be cleared to zero to indicate that the packet feature set is not supported 3 F 1b 1 Mandatory power management feature set is supported 2 F 0b Obsolete 1 F 1b 1 Security feature set is supported 0 F 1b 1 SMART feature set is supported 83 Command set is supported 15 F 0b Shall be cleared to zero 14 F 1b Shall be set to one 13 F 1b 1 FLUSH CACHE EXT command is supported 12 F 1b 1 Mandatory FLUSH CACHE command is supported 11 F 1b 1 Device configuration overlay feature set is supported 10 F 1b 1 48 bit address feature set is supported 9 F Ob 1 Automatic acoustic management feature set is supported 8 F 1b 1 SET MAX security extension is supported 7 F Ob See Address Offset Reserved Area Boot INCITS TR27 2001 6 F Ob 1 SET FEATURES subcommand required to spin
22. fications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved Macron Performance M500DC 2 5 Inch NAND Flash SSD Performance Measured performance can vary for a number of reasons The major factors affecting drive performance are the density of the drive and the interface of the host Additional ly overall system performance can affect the measured drive performance When com paring drives it is recommended that all system variables are the same and only the drive being tested varies Performance numbers will vary depending on the host system configuration Table 7 Drive Performance Notes Reliability Density 120GB 240GB 480GB 800GB Unit Sequential read 128KB 425 425 425 425 MB s transfer Sequential write 128KB 200 330 375 375 MB s transfer Random read 4KB transfer 63 000 63 000 63 000 65 000 IOPS Random write 4KB transfer 23 000 33 000 35 000 24 000 IOPS READ latency TYP 0 50 0 50 0 50 0 50 ms WRITE latency TYP 1 5 1 5 1 5 1 5 ms 1 Typical I O performance numbers as measured using lometer with a queue depth of 32 and write cache disabled 2 lometer measurements are performed in the steady state region AKB transfers used for READ WRITE latency values 4 System variations may affect measured results od Micron s SSDs incorporate advanced technology for defect and error management They use various combinat
23. ficiency of the drive Total bytes written measured with 55 C case tem perature within the total bytes written values listed in this document The table below shows the drive lifetime for each SSD density based on predefined usage conditions Table 10 Drive Lifetime Density Drive Lifetime Total Bytes Written 120GB 0 5PB 240GB 1 0PB 480GB 1 9PB 800GB 1 9PB Note 1 Total bytes written were calculated assuming drive is 100 full user capacity and a workload of 100 random aligned 4KB writes PDF 09005aef854b6757 25 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved IA icron M500DC 2 5 Inch NAND Flash SSD Electrical Characteristics Electrical Characteristics Stresses greater than those listed may cause permanent damage to the device This is a stress rating only and functional operation of the device at these or any other condi tions above those indicated in the operational sections of this specification is not im plied Exposure to absolute maximum rating conditions for extended periods may affect reliability Table 11 SATA Power Consumption Sequential Write Max Sequential Read Max Density Idle Average 128KB transfer 128KB transfer 120GB 1 2W 4W lt 4W 240GB 1 2W 5W lt 5W 480GB 1 2W 6W lt 6W 800GB 1 2W 6 3W lt 6 3W Not
24. g Default Value Description 96 O V 0000h Streaming transfer time DMA 97 O V 0000h Streaming access latency DMA and PIO 98 O F 0000h 0000h Streaming performance granularity 98 99 100 V Varies by capacity Maximum user LBA for 48 bit address feature set 104 O V 0000h Streaming transfer time PIO 105 F 0008h Maximum number of 512 byte blocks of LBA range entries per DATA SET MANAGEMENT command 106 Physical sector size logical sector size 15 F Ob Shall be cleared to zero 14 F 1b Shall be set to one 13 F 1b 1 Device has multiple logical sectors per physical sector 12 F Ob 1 Device logical sector longer than 256 Words 11 4 F 00000000b Reserved 3 0 F 0011b 8 logical sectors per physical sector 107 O F 0000h Inter seek delay for ISO 7779 acoustic testing in microseconds 108 15 12 F 0101b NAA 3 0 11 0 000000001010b IEEE OUI 23 12 109 15 4 F 000001110101b IEEE OUI 11 0 3 0 Varies Unique ID 35 32 110 M F Varies 5 0 unique ID 31 16 111 M F Varies Unique ID 15 0 112 O F 0000h 0000h 0000h Reserved for 128 bit world wide name extension to 128 bits 0000h 116 O V 0000h Reserved for INCITS TR 37 2004 117 O F 0000h 0000h Words per logical sector PDF 09005aef854b6757 M500DC_2_5_disti pdf Rev G 02 15 EN 1 7 Micron Technology Inc reserves the right to change products or specifications without notice 2013 Micron Technology Inc All rights reserved Macron Table 5
25. ge values in Table 11 SATA Power Consumption Rev D 4 14 e Status changed to Production e Updated Table 5 Identify Device e Updated note 2 in Table 11 SATA Power Consumption e Revised operating vibration specification Rev C 3 14 e Updated part numbers e Revised performance specifications e Updated device ID values Rev B 11 13 e Revised performance specifications Rev A 8 13 e Initial release 8000 S Federal Way P O Box 6 Boise ID 83707 0006 Tel 208 368 4000 www micron com products support Sales inquiries 800 932 4992 Micron and the Micron logo are trademarks of Micron Technology Inc All other trademarks are the property of their respective owners This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein Although considered final these specifications are subject to change as further product development and data characterization some times occur PDF 09005aef854b6757 30 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved
26. in the markets where WEEE is en forced TUV Germany approval to IEC60950 EN60950 e Vecr IC Canada This Class B digital apparatus complies with Canadian ICES 003 Cet appareil num rique de la classe B est conforme a la norme NMB 003 du Cana da FCC Rules This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC Rules These limits are designed to provide rea sonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio fre quency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense PDF 09005aef854b6757 27 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved IA icron M500DC 2 5 Inch NAND Flash SSD Package Dimensions Package Dimensions Figure 4 2 5 Inch Package 7mm m 480 7 00 taiso Co p gt ol _ 2x M3 Eao l 14 00 3 50 ad a both sides 69 85 0 25 a 90 60 100 45 MAX W ____ __ 90 60
27. ions of hardware based error correction algorithms and firmware based static and dynamic wear leveling algorithms Over the life of the SSD uncorrectable errors may occur An uncorrectable error is de fined as data that is reported as successfully programmed to the SSD but when it is read out of the SSD the data differs from what was programmed Table 8 Uncorrectable Bit Error Rate Uncorrectable Bit Error Rate Operation lt 1 sector per 1016 bits READ PDF 09005aef854b6757 M500DC_2_5_disti pdf Rev G 02 15 EN 24 Micron Technology Inc reserves the right to change products or specifications without notice 2013 Micron Technology Inc All rights reserved Ia icron M500DC 2 5 Inch NAND Flash SSD Reliability Mean Time to Failure Mean time to failure MTTF for the SSD can be predicted based on the component reli ability data using the methods referenced in the Telcordia SR 332 reliability prediction procedures for electronic equipment Table 9 MTTF Density MTTF Operating Hours 120GB 2 million 240GB 2 million 480GB 2 million 800GB 2 million Note 1 The product achieves a MTTF of 2 million hours based on population statistics not rele vant to individual units Endurance Endurance for the SSD can be predicted based on the usage conditions applied to the device the internal NAND component cycles the write amplification factor and the wear leveling ef
28. nect P14 V12 No connect P15 V12 No connect PDF 09005aef854b6757 5 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved Macron Figure 3 SSD Interface Connections M500DC 2 5 Inch NAND Flash SSD Device ID Power Signal segment segment Device ID Table 5 Identify Device See Note 1 for setting definitions Word Bit s Setting Default Value Description 0 General configuration bit significant information 15 F Ob 0 ATA device 14 8 X 0000100 Retired 7 F Ob 1 Removable media device 6 F 1b Obsolete 5 3 X 000b Retired 2 V Ob Response incomplete 1 X Ob Retired 0 F Ob Reserved 1 3FFFh Obsolete 2 F C837h Specific configuration 3 F 0010h Obsolete 4 F 0000h 0000h Retired 6 F 003Fh Obsolete 7 O V 0000h 0000h Reserved for assignment by the CompactFlash Association 9 X 0000h Retired 10 M F Varies Serial number 20 ASCII characters 20 X 0000h 0000h 0000h Retired obsolete 23 M F Varies Firmware revision 8 ASCII characters 27 M F Varies Model number 40 ASCII characters 47 15 8 F 80h 80h 7 0 F 10h 00h Reserved 01h FFh Maximum number of logical sectors that shall be transferred per DRQ data block on READ WRITE MULTIPLE com mands P
29. olid state drive SSD uses a single chip controller with a SATA inter face on the system side and n channels of Micron NAND Flash internally Packaged in an HDD replacement enclosure the SSD integrates easily in existing storage infrastruc tures The M500 DC is designed to support and manage the needs of enterprise platforms that utilize high IOPs traffic previously supported solely by SLC solutions it provides the performance endurance and data integrity required by these growing environments Figure 2 Functional Block Diagram SSD controller DRAM buffer H PDF 09005aef854b6757 3 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved IA icron M500DC 2 5 Inch NAND Flash SSD Logical Block Address Configuration Logical Block Address Configuration The drive is set to report the number of logical block addresses LBA that will ensure sufficient storage space for the specified density Standard LBA settings based on the IDEMA standard LBA1 02 are shown below Table 1 Standard LBA Settings 512 Byte Sector Size User Available Total LBA Max LBA Bytes Drive Size Decimal Hexadecimal Decimal Hexadecimal Unformatted 120GB 234 441 648 DF94BBO 234 441 647 DF94BAF 120 034 123 776 240GB 468 862 128 1BF244B0 468 862 127 1BF244AF 240 057 409 536 48
30. ported in word 88 are valid 0 The fields reported in word 88 are not valid 1 F 1b 1 The fields reported in words 70 64 are valid 0 the fields reported in words 70 64 are not valid 0 X 1b Obsolete 54 X 3FFFh 0010h Obsolete 003Fh FC10h OOFBh PDF 09005aef854b6757 M500DC_2_5_disti pdf Rev G 02 15 EN 7 Micron Technology Inc reserves the right to change products or specifications without notice 2013 Micron Technology Inc All rights reserved Macron Table 5 Identify Device Continued See Note 1 for setting definitions M500DC 2 5 Inch NAND Flash SSD Device ID Word Bit s Setting Default Value Description 59 15 F 1b 1 The BLOCK ERASE EXT command is supported 14 F 1b 1 The OVERWRITE EXT command is supported 13 F 1b 1 The CRYPTO SCRAMBLE EXT command is supported 12 F 1b 1 The sanitize feature set is supported 11 9 F 000b Reserved 8 V 1b 1 Multiple sector settings are valid 7 0 V 00010000b xxh Current setting for number of logical sectors that shall be transferred per DRQ data block on READ WRITE MULTIPLE com mands 60 M F Varies by capacity Total number of user addressable logical sectors 62 X 0000h Obsolete 63 15 11 F 00000b Reserved 10 V Ob 1 Multiword DMA mode 2 is selected 0 Multiword DMA mode 2 is not selected 9 V 0b 1 Multiword DMA mode 1 is selected 0 Multiword DMA mode 1 is not
31. pported 89 O F 0001h Time required for security erase unit completion 90 O F 0001h Time required for enhanced security erase completion 91 O V OOFEh Current advanced power management value 92 O V FFFEh Master password revision code PDF 09005aef854b6757 M500DC_2_5_disti pdf Rev G 02 15 EN 1 5 Micron Technology Inc reserves the right to change products or specifications without notice 2013 Micron Technology Inc All rights reserved Macron Table 5 Identify Device Continued See Note 1 for setting definitions M500DC 2 5 Inch NAND Flash SSD Device ID Word Bit s Setting Default Value Description 93 Shall be 0000h for SATA devices 15 Ob Shall be cleared to zero 14 Ob Shall be set to one 13 Ob 1 Device detected CBLID above Vj 0 device detected CBLID below Vj Device 1 hardware reset result Device 0 shall clear these bits to zero Device 1 shall set these bits in accordance with the ATA8 ACS2 specification See specification for details 12 Ob Reserved 11 Ob 0 Device 1 did not assert PDIAG 1 Device 1 asserted PDIAG 10 9 00b These bits indicate how device 1 determined the device num ber 00 Reserved 01 A jumper was used 10 The CSEL signal was used 11 Some other method was used or the method is unknown Ob Shall be set to one Device 0 hardware reset result Device 1 sh
32. r detection feature set is disabled 121 F 0000h 0000h 0000h Reserved for expanded supported and enabled settings 0000h 0000h 0000h 127 O 0000h Obsolete PDF 09005aef854b6757 M500DC_2_5_disti pdf Rev G 02 15 EN 1 8 Micron Technology Inc reserves the right to change products or specifications without notice 2013 Micron Technology Inc All rights reserved Macron Table 5 Identify Device Continued See Note 1 for setting definitions M500DC 2 5 Inch NAND Flash SSD Device ID Word Bit s Setting Default Value Description 128 Security status 15 9 F 0000000b Reserved 8 V Ob Security level 0 High 1 Maximum 7 6 F 00b Reserved 5 F 1b 1 Enhanced security erase is supported 4 V Ob 1 Security count is expired 3 V Ob 1 Security is frozen 2 V Ob 1 Security is locked 1 V Ob 1 Security is enabled 0 F 1b 1 Security is supported 129 X Vendor specific data Vendor specific 160 CFA power mode 1 15 F Ob Word 160 is supported 14 F Ob Reserved 13 F Ob CFA power mode 1 is required for one or more commands im plemented by the device 12 V Ob CFA power mode 1 is disabled 11 0 F 000000000000b Maximum current in ma 161 Xx 0000h 0000h 0000h Reserved for assignment by the CompactFlash Association 0000h 0000h 0000h 0000h 168 15 4 F 000h Reserved 3 0 F Varies Device nominal form factor 3h 2
33. roducts or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved E Products and specifications discussed herein are subject to change by Micron without notice Macron Part Numbering Information Micron s M500DC SSD is available in different configurations and densities Visit micron com for a list of valid part numbers Figure 1 Part Number Chart M500DC 2 5 Inch NAND Flash SSD Features MT FD D AK 120 M BB 1 AE 1 Z AB YY ES Micron Technology Production Status Blank Production Product Family ES Engineering sample FD Flash drive Customer Designator Drive Interface Yrestandard D SATA 6 0 Gb 2 Hardware Features Drive Form Factor AB Standard AK 2 5 inch 7mm Extended Firmware Features r Z None Drive Density 120 120GB Sector Size 240 240GB 1 512b 480 480GB yte 800 800GB NAND Flash Component NAND Flash Type AE 128Gb MLC x8 3 3V 20nm M MLC a BOM Revision Product Family For example BB M500DC 1 1st generation 2 2nd generation PDF 09005aef854b6757 2 Micron Technology Inc reserves the right to change products or specifications without notice M500DC_2_5_disti pdf Rev G 02 15 EN 2013 Micron Technology Inc All rights reserved In icron M500DC 2 5 Inch NAND Flash SSD General Description General Description Micron s M500DC s
34. ry O Support of the word is optional PDF 09005aef854b6757 M500DC_2_5_disti pdf Rev G 02 15 EN Micron Technology Inc reserves the right to change products or specifications without notice 2013 Micron Technology Inc All rights reserved 21 Macron Commands Table 6 Supported ATA Command Set See ATA 8 standard for command details M500DC 2 5 Inch NAND Flash SSD Commands Command Name Command Code hex CHECK POWER MODE 98h or E5h DATA SET MANAGEMENT 06h DEVICE CONFIGURATION RESTORE B1h COh DEVICE CONFIGURATION FREEZE LOCK B1h Cth DEVICE CONFIGURATION IDENTIFY B1h C2h DEVICE CONFIGURATION SET B1h C3h DOWNLOAD MICROCODE 92h EXECUTE DEVICE DIAGNOSTIC 90h FLUSH CACHE E7h FLUSH CACHE EXT EAh IDENTIFY DEVICE ECh IDLE E3h or 97h IDLE IMMEDIATE E1h or 95h INITIALIZE DEVICE PARAMETERS 91h NOP 00h READ BUFFER E4h READ DMA with retry C8h READ DMA without retry C9h READ DMA EXT 25h READ FPDMA QUEUED 60h READ LOG EXT 2Fh READ LOG DMA EXT 47h READ MULTIPLE C4h READ MULTIPLE EXT 29h READ NATIVE MAX ADDRESS F8h READ NATIVE MAX ADDRESS EXT 27h READ SECTOR S EXT 24h READ SECTOR S with retry 20h READ SECTOR S without retry 21h READ VERIFY SECTOR EXT 42h READ VERIFY SECTOR S with retry 40h REQUEST SENSE DATA EXT OBh SANITIZE DEVICE B4h SECURITY DISABLE PASSWORD F6h SECURITY ERASE PREPARE

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