Finisar FTLX1871M3BCL network transceiver module
Contents
1. a ES 8 ME 10 BE 10 11 l 13 14 15 m VeeT TX Fault TX Disable VeeT nm iw gt VccT Towards 3 Bezel 6 Towards ASIC VccR MOD ABS VeeR ZB n o ps O RX_LOS m F D kA VeeR n Q M VeeR Figure 1 Diagram of Host Board Connector Block Pin Numbers and Names Finisar Corporation January 2013 Rev B Page 2 FTLX1871M3BCL Multi rate SFP Product Specification Finisar II Absolute Maximum Ratings Exceeding the limits below may damage the transceiver module permanently Notes 1 Non condensing III Electrical Characteristics Top 5 to 70 C Supply Voltage Vcc Transmitter Tx Input differential impedance Ry 80 100 120 Q Differential data input swing Vinpp 120 850 mV 1 Transmit Disable Voltage Vp V amp 08 Ve V Transmit Enable Voltage Vw 0 08 V j Receiver Rx Outputdifferentialimpedane Roa 80 100 120 OQ Differential data output swing Vowpp 100 850 mV 1 Output rise time and fall time TA Tp 28 Ip 2 LOS asserted Visa Vee 8 Ve V 3 LOS de asserted Vosp 0 08 V 3 Power Consumption Notes 1 Internally AC coupled Data pins connect directly to the CDR 2 20 80 Measured with Module Compliance Test Board and OMA test pattern Use2. at 8 5Gb s Tx CDR is in bypass mode Borrow 1 or High Rx CDR locks from 9 95 to 11 3 Gb s 1 or High 0 or Low Tx amp Rx CDR s in bypass mode 1 or High 1 or High Both CDR s lock from 9 95 to 11 3 Gb s Alternative configurations can be factory set upon request Please contact Finisar for additional information XI SFF 8431 Power up Sequence If either CDR is enabled the typical power consumption of the FTLX1871M3BCL may exceed the limit of 1 5W specified for the Power Level II transceivers in 1 for which a power up sequence is recommended However the FTLX1871M3BCL is factory set to power up directly to its operating conditions in Power Level Mode II Upon request it can be factory set to follow the power up sequence specified for transceivers exceeding IW as per 1 In power level I the FTLX1871M3BCL does not carry traffic but the 2 wire serial communication is active Please refer to 1 and Finisar Application Note AN 2076 for additional details Finisar Corporation January 2013 Rev B Page 7 FTLX1871M3BCL Multi rate SFP Product Specification XII Mechanical Specifications Finisar Finisar FTLX1871M3BCL SFP transceivers are compatible with the SFF 8432 specification for improved pluggable form factor and shown here for reference purposes only Bail color is white ITEM DIM mm TOL mm 9 00 9 60 11 90 13 85 13 65 2 80 1 00 4 00 2 00 56 50 1 60 2 29 1 80 37 10 9 15 1 00 8 55 4
3. free per Directive 2002 95 EC and Finisar Application Note AN 2038 PRODUCT SELECTION FTLX1871M3BCL Finisar Corporation January 2013 Rev B Page 1 FTLX1871M3BCL Multi rate SFP Product Specification Finisar I Pin Descriptions 4 7 RD Receiver Inverted DATA out AC Coupled Vgg Receiver Ground 0 VEER Receiver Ground 6 17 l 18 TD Transmitter Non Inverted DATA in AC Coupled 19 TD Transmitter Inverted DATA in AC Coupled Notes 1 Circuit ground is internally isolated from chassis ground T is an open collector drain output which should be pulled up with a 4 7k 10k Ohms resistor on the host board if intended for use Pull up voltage should be between 2 0V to Vcc 0 3V A high output indicates a transmitter fault caused by either the TX bias current or the TX output power exceeding the preset alarm thresholds A low output indicates normal operation In the low state the output is pulled to 0 8V 3 Laser output disabled on Tpjs gt 2 0V or open enabled on Tpys 0 8V 4 Internally pulled down per SFF 8431 Rev 4 1 See Sec X of this datasheet for the logic table to use for the internal CDRs locking modes 5 LOS is open collector output Should be pulled up with 4 7k 10kQ on host board to a voltage between 2 0V and 3 6V Logic 0 indicates normal operation logic indicates loss of signal 6 Internally connected Pim 4
4. of four 1 s and four 0 s sequence in the PRBS 9 is an acceptable alternative SFF 8431 Rev 4 1 3 LOS is an open collector output Should be pulled up with 4 7kQ 10kQ on the host board Normal operation is logic 0 loss of signal is logic 1 4 See Section 2 8 3 of SFF 8431 Rev 4 1 5 Typical power consumption values refer to 3 3V 70 C case temperature and beginning of life Finisar Corporation January 2013 Rev B Page 3 FTLX1871M3BCL Multi rate SFP Product Specification Finisar IV Optical Characteristics Top 5 to 70 C Vcc 3 14 to 3 46 Volts Transmitter Tx 4 dBm pia Wang P ER B9 om Side Mode Suppression Ratio SMSR 30 hate et IS E Average Launch power when TxisOFF Por 30 dBm Txipap 03 Ul 1 litter Generation 4MHz 80MHz peak to peak Tx 01 Ur 1 RelaiveIntensity Noise RN 128 dB Hz Receiver Rx Optical Center Wavelength Ac 1260 1600 nm Receiver Reflectance Ra 27 dB BitRate Gb s BER J J J T Y 85 995 107 lt 10 Rex 24 dBm 23 Sensitivity 11 L lt HO Rss 238 dBm 2 lt 10f Ress 27 dBm 2 113 10 Ress 27 B 2 Overload Average Power Pw 7 dBm LOS De Assert LOS 28 dBm LOS Asset o
5. 7 50 2 55 43 00 14 70 0 55 N xz omouzzrzmxcromnmmoouo t0 3 05 05 0 15 10 15 0 2 0 2 REF E LOCATIO SIDE LABEL LOCATION MAX LABEL SIZE 6 4 x 41 0 y _ _ sy il BOTTOM LABEL LOCATION MAX LABEL SIZE 10 5 x 28 1 9 O f TIE TU UL Figure 2 Mechanical Dimensions O Finisar Corporation January 2013 Rev B CASE TEMPERATURE N TOP LABEL LOCATION MAX LABEL SIZE 10 5 x 35 5 Page 8 Finisar FTLX1871M3BCL Multi rate SFP Product Specification XIII Host Board SFP Connector Recommendations X 10 00 3 PLACES O AS Detail X eo eit A BSc Ses E BS ASA ME III Bg YY Al AS inn 2 0 11 PLACESA 81 05 0 1 CROSS HATCHED AREA DENOTES COMPONENT AND TRACE KEEP DUT CEXCEPT CHASSIS GROUND p a d E 3 V LZ E a ES b B ui 2 0A Lad 1 1 PLACES 3 i ee ae eae A 19 HOLES TRACES ALLOWED 26 8 Datum and Basic Dimension Established by Customer Rads and Vias are Chassis Ground 11 Places AX Through Holes are Unplated Figure 3 PCB Layout and Bezel Recommendations as per 9 Page 9 Rev B Finisar Corporation January 2013 FTLX1871M3BCL Multi rate SFP Product Specification Finisar 5 KZ ZA Z PLZZ API UPTV r f pm AN S s i rw d i 0 8 v Ceca 0 00 20 PLACES 240 05 o OBLJA
6. Finisar Product Specification 10Gb s 80km Single Mode Multi Rate SFP Transceiver FTLX1871M3BCL PRODUCT FEATURES e Hot pluggable SFP footprint e Supports 8 5 and 9 95 to 11 3 Gb s e 80km link length e 1600ps nm chromatic dispersion tolerance e 5 70 C case temperature range e Internal transmitter receiver CDR e 1 5W 1 7W power consumption APPLICATIONS options e Cooled 1550nm EML laser e SONET OC 192 SDH STM 64 and OTN G 959 1 PILI 2D2 e 10G Ethernet ZR and 10G Fibre Channel e OTN G 709 OTUIe 2 2e FEC bit rates e 8 5Gb s Fibre Channel e Limiting electrical interface receiver e Duplex LC connector e Built in digital diagnostic functions e RoHS 6 compliant lead free Finisar s FTLX1871M3BCL transceivers are Enhanced Small Form Factor Pluggable SFP transceivers designed for use in 10 Gigabit multi rate links up to 80km of G 652 single mode fiber They are compliant with SFF 8431 SFF 8432 and G 959 1 P1L1 2D2 and support SONET OC 192 SDH STM 64 10G Ethernet ZR and 10G Fibre Channel Finisar s FTLX1871M3BCL transceivers use internal clock and data recovery CDR IC s for the transmitter and the receiver This guarantees compliance with the SONET SDH jitter requirements and it can be used to set the electrical interface to be XFI compliant Digital diagnostics functions are available via a 2 wire serial interface as specified in SFF 8472 Finisar s FTLX1871M3BCL transceivers are RoHS compliant and lead
7. LOSA 37 30 dBm LOSHysteresis LO Su 05 dB BitRate Gb s BER J T Y Path Penalty amp 5995 107 PP 2 dB 4a 10307 107 PP 3 dB 4a aja R 3 dB 4b ngja PP 3 dB 4c a SONET SDH Tx jitter generation limits are guaranteed with the Tx CDR enabled and locked A Measured with worst ER 9 dB PRBS 2 1 3 For 10GEthernet application 24dBm is equivalent to an OMA of 22 09dBm for an ER 9 dB 4 Max chromatic dispersion tolerance over 80km of G 652 single mode fiber a 1l600ps nm b l450ps nm c 1300ps nm V General Specifications Bire BR 85 11318 as Max Supported Link Length Lux 839 km 2 Notes 1 Tested with a 2 1 PRBS pattern at the BER defined in Table IV 2 Over G 652 single mode fiber Timing Parameters Time to initialize xau 19 s Finisar Corporation January 2013 Rev B Page 4 FTLX1871M3BCL Multi rate SFP Product Specification Finisar VI Environmental Specifications Finisar FTLX1871M3BCL transceivers have an operating temperature range from 5 C to 70 C case temperature Parameter Symbol Mim Typ Max Units Ref Case Operating Tempere T 5 L Storage Temperawre Te 9 9 VII Regulatory Compliance Finisar transceivers are Class 1 Laser P
8. O BO TYP 1 55 0 05 9 10 1L A 2 HOLES 110 3 1 54 3 I0 4x U d un B iti REF a i V ES m NE COS SECTION Y F Lo gag 15 2840 1 BEZEL OPENING W FC SOARD 500 BELT NOTES i MINIMUM PITCH FLLUSTRATED ENGLISH DIMENSION ARE FOR REFERENCE ONLY 2 NOT RECOMMENDED FOR PCI EXPANSION CARD APPLICATIONS Figure 4 Finisar Corporation January 2013 Rev B Page 10 FTLX1871M3BCL Multi rate SFP Product Specification XIV Host Module Interface Diagram Finisar Transceiver oystem Host Finisar WEET WOC_HOST o 47k 10k 2L The 10k EEPROM 1 VEET Cantraller 2 Oo O E O T T WEE er 7 boo E 10 Control and 30k 30k LEER Diagnostics VEE WEE Hecelver 11 WEER 1 Ds dr 13 14 WEER D 1uF Z2yF D 1uF n 4 7 uH 15 4B MSA Suggested Filter Network 4 7 uH Transmitter 17 O 1pF 22pF D 1pF WEET 18 EA a 1 20 WEET S Figure 5 Finisar Corporation January 2013 Rev B TAF ault TXDis DA CA MOD ABS 5 m ua un a Las Red 3r D YCCR WECT S al a i j Page 11 FTLX1871M3BCL Multi rate SFP Product Specification Finisar XV References l Ze e Specifications for Enhanced 8 5 and 10 Gigabit Small Form Factor Pluggable Module SFP SFF Document Number SFF 8431 Revision 4 1 Improved Pluggable Form factor SFF Document Number SFF 8432 Revision 4 2 April 18 2007 Digital Diagnostics Monitoring Interface for Optica
9. isar Corporation January 2013 Rev B Page 6 FTLX1871M3BCL Multi rate SFP Product Specification Finisar IX Digital Diagnostic Specifications FTLX1871M3BCL transceivers can be used in host systems that require either internally or externally calibrated digital diagnostics Accuracy S S Transceiver supply voltage ADD vonage V 28 40 3 Transmitter bias current ADDpiss mA 0 127 10 2 Transmitter output power ADD ye power dBm 1 5 2dB Receiver average optical input power ADDaxpover dBm 28 5 2dB Notes 1 Internally measured 2 The accuracy of the Tx bias current is 10 of the actual current from the laser driver to the laser X Internal CDR s Locking Modes The FTLX1871M3BCL is equipped with internal CDR units on the receiver and the transmitter sides Both CDR s are factory set to lock between 9 95 and 11 3 Gb s and they will disregard the status of the rate select R S pins and bits However upon request the FTLX1871M3BCL can be customized to enable the R S functionality and let the host control whether the CDR s lock at 8 5Gb s between 9 95 and 11 3 Gb s or by pass either one The different locking modes follow the logic OR of the R S pins and soft bits An example is shown in the following logic table Logic OR of Logic OR of CDR s locking Mode pin 7 and bit 110 3 pin 9 and bit 118 3 0 or Low 0 or Low Both CDR s lock
10. l Transceivers SFF Document Number SFF 8472 Revision 10 1 March 1 2007 Directive 2002 95 EC of the European Council Parliament and of the Council on the restriction of the use of certain hazardous substances in electrical and electronic equipment January 27 2003 Application Note AN 2038 Finisar Implementation of RoHS Compliant Transceivers Finisar Corporation January 21 2005 Small Form factor Pluggable SFP Transceiver Multi Source Agreement MSA Application Note AN 2030 Digital Diagnostic Monitoring Interface for SFP Optical Transceivers XVI For More Information Finisar Corporation 1389 Moffett Park Drive Sunnyvale CA 94089 1133 Tel 1 408 548 1000 Fax 1 408 541 6138 sales finisar com Www finisar com Finisar Corporation January 2013 Rev B Page 12
11. ostic monitoring interface makes use of the 8 bit address 1010001X A2h so the originally defined serial ID memory map remains unchanged The interface is identical to and is thus fully backward compatible with both the GBIC Specification and the SFP Multi Source Agreement The complete interface is described in Finisar Application Note AN 2030 Digital Diagnostics Monitoring Interface for SFP Optical Transceivers The operating and diagnostics information is monitored and reported by a Digital Diagnostics Transceiver Controller DDTC inside the transceiver which is accessed through a 2 wire serial interface When the serial protocol 1s activated the serial clock signal SCL Mod Def 1 1s generated by the host The positive edge clocks data into the SFP transceiver into those segments of the E PROM that are not write protected The negative edge clocks data from the SFP transceiver The serial data signal SDA Mod Def 2 1s bi directional for serial data transfer The host uses SDA in conjunction with SCL to mark the start and end of serial protocol activation The memories are organized as a series of 8 bit data words that can be addressed individually or sequentially For more information please see the SFP MSA documentation and Finisar Application Note AN 2030 Please note that evaluation board FDB 1027 is available with Finisar ModDEMO software that allows simple to use communication over the 2 wire serial interface Fin
12. roducts and comply with US FDA regulations These products are certified by T V and CSA to meet the Class 1 eye safety requirements of EN EC 60825 and the electrical safety requirements of EN IEC 60950 Copies of certificates are available at Finisar Corporation upon request Finisar Corporation January 2013 Rev B Page 5 FTLX1871M3BCL Multi rate SFP Product Specification Finisar VIII Digital Diagnostic Functions Finisar FTLX1871 M3BCL SFP transceivers support the 2 wire serial communication protocol as defined in the SFP MSA It is very closely related to the E PROM defined in the GBIC standard with the same electrical specifications The standard SFP serial ID provides access to identification information that describes the transceiver s capabilities standard interfaces manufacturer and other information Additionally Finisar SFP transceivers provide a enhanced digital diagnostic monitoring interface which allows real time access to device operating parameters such as transceiver temperature laser bias current transmitted optical power received optical power and transceiver supply voltage It also defines a sophisticated system of alarm and warning flags which alerts end users when particular operating parameters are outside of a factory set normal range The SFP MSA defines a 256 byte memory map in E PROM that is accessible over a 2 wire serial interface at the 8 bit address 1010000X AOh The digital diagn
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