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        Kingston Technology ValueRAM KVR1333D3D4R9S/16G memory module
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1. ata Strobe    e Internal self  calibration   Internal self calibration through ZQ  pin  RZQ   240 ohm   1      e On Die Termination using ODT pin  e On DIMM thermal sensor  Grade B     e Average Refresh Period 7 8us at lower than TCASE 85  C   3 9us at 85  C  lt  TCASE  lt  95  C    e Asynchronous Reset  e PCB  Height 1 180     30 00mm   double sided component    Continued  gt  gt     kingston com Document No  VALUERAM1023 001 A00 09 08 11 Page 1       continued ValueRAM    MODULE DIMENSIONS         Units   millimeters                                                                                   Co KS CO cO CO CO Sei Es OR  SS N    Se D        alpen  30 00 f   29 60x4   24 60 x2     21 80x2 ta   15 80x2     R 0 65 MAX    TYPICAL  11 00x2      8 00x2 J    3 80  150    N     0 000  1 50     0 10     gt      CHAMFER 0 50 X 45 DEG   oe 4 PLACES  DOC Ca LO LO  SNT    A  eo   PE     LO 2  kingston com    Document No  VALUERAM1023 001 A00 Page 2    
2. kingston      Cann ORL    G Y    Memory Module Specifications Value P       KVR1333D3D4R9S 16G    16GB 2Rx4 2G x 72 Bit PC3 10600  CL9 Registered w Parity 240 Pin DIMM    DESCRIPTION SPECIFICATIONS   This document describes ValueRAM s 2G x 72 bit  16GB  CL IDD  9 cycles   DDR3 1333 CL9 SDRAM  Synchronous DRAM   registered w  Row Cycle Time  tRCmin  49 5ns  min     parity  2Rx4 ECC memory module  based on thirty six Barach io Acive Betresh 260ns  min     1G x 4 bit FBGA components  The SPD is programmed to Command Time  tRFCmin    JEDEC standard latency DDR3 1333 timing of 9 9 9  This 240  Row Active Time  tRASmin  36ns  min     pin DIMM uses gold contact fingers  The electrical and me  Power  Operating  TBD    chanical specifications are as follows  UL Rating 94  0  Operating Temperature 0   C to 85   C   FEATURES Storage Temperature  55   C to  100   C    e JEDEC standard 1 5V  1 425V  1 575V  Power Supply    Power will vary depending on tie SDRAM And  e VDDQ   1 5V  1 425V   1 575V  Register PLL used    e 667MHz fCK for 1333Mb sec pin   e 8 independent internal bank   e Programmable CAS Latency  9  8  7  6   e Programmable Additive Latency  0  CL   2  or CL   1 clock   e Programmable CAS Write Latency CWL    7  DDR3 1333    e 8 bit pre fetch    e Burst Length  8  Interleave without any limit  sequential with  starting address    000    only   4 with tCCD   4 which does not  allow seamless read or write  either on the fly using A12 or  MRS     e Bi directional Differential D
    
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