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Transcend CF150 CompactFlash

1. Ground IZ OZ3 2 Fs sw ue neoa s wo nro s co uo nzors Pa ws wo mzoz we wo mzoz we vo uz ozs s we wo nzom s ws wo nzom s wzozs pe oor ve meom e wr vo races e wr wo fzo T cn rj w 7 c o7 5 1 C99 dogs p qo poss o9 p o 9 J BU 9 j 9 anse WU 10 aw fi nz w Ao nz f AX nz m we 1 nz n j e a J nz n J e 1 nz 2 ar nz 32 AY nz m2 A nz 8 vcc Power 13 vcc Power 13 Powe EXE NEIN EEGEONUE sf foe fof a 1 NN wr EN MENT ee ear oe ae ea a oor roar on uo wzom z ww vo izoz CUN E DR Fa w o ss wsw on Cm em s See s cm o mes Fm cx o 9mm m 5 9 crane 27 Di vo nzo 27 Dti wo 1z 023 Lm ser uo Lm es ie freon a ont seen sw ue wzon ow ve nzon woes queden os oe ue nons wo p om ox emo pow m wr 9 e s 9 ena Transcend Information Inc 4 JOCS16 CD2 CD1 V81 Ground 2 m m om m EEN m 29 29 Re EES V1 0 TS4G 32GCF150 150X CompactFlash Card PC Card Mode PC Card I O Mode True IDE Modes Rn Sere fi e
2. V Lv wolw owq Jw onw V lt lt lt lt lt lt lt lt L lt lt lt lt lt Py fw fv Pv pv ey fo Py CL CLE E E 3 L lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt Transcend Information Inc 81 V1 0 TS4G 32GCF150 150X CompactFlash Card Ewa v v Sms 1 4 Translate Sector eus wes _ Write Long Sector peewee epee ep pth Wre manse wo cese v h i pepe Pe pet tp mancora v Lv LI 1 Lv Error and Status Register summarizes the valid status and error value for all the CF ATA Command set lt E g lt lt lt lt lt lt lt lt lt F lt lt lt lt lt lt 5 I lt lt lt lt lt lt lt lt E M lt B 7 i 15 C H S Table Capacity C H S 1GB 1942 16 63 2GB 3884 16 63 4GB 7769 16 63 8GB 15538 16 63 16GB 16383 15 63 32GB 16383 15 63 Transcend Information Inc 82 TS4G 32GCF150 150X CompactFlash Card SMART Command Set 9 SMART Command Set SMART Feature Register Values DOh Read Data D5h Read Log Read Attribute Threshold D6h Write Log
3. CompactFlash Storage Card Configurations ConfS Conf Confi Conf2 Conf Conf DiskCardMode po o o o o o Memory Mapped Mapped Any 16 byte system decoded boundary 1 0 VO Mapped 1F0h 1F7h3F6h 3F7h EDEN VO Mapped 170h 177h 376h 377h CF Card Mode Memory Mapped I O cycles are ignored X Any non zero value vendor defined Transcend Information Inc 38 V1 0 TS4G 32GCF150 150X CompactFlash Card m Card Configuration and Status Register Base 02h in Attribute Memory The Card Configuration and Status Register contains information about the Card s condition Operation D7 D6 D5 D4 D3 D2 D1 DO Read Changed Swot 109 xt mao Pwo m 0 wie o sem 1060 xe Ado Pwo o 9 Card Configuration and Status Register Changed indicates that one or both of the Pin Replacement register CReady or CWProt bits are set to one 1 When the Changed bit is set STSCHG Pin 46 is held low if the SigChg bit is a One 1 and the CompactFlash Storage Card or CF Card is configured for the I O interface SigChg this bit is set and reset by the host to enable and disable a state change signal from the Status Register the Changed bit controls pin 46 the Changed Status signal If no state change signal is desired this bit is set to zero 0 and pin 46 STSCHG signal is then held high while the CompactFlash Storage Card or CF Card is configured for
4. Security Unlock 2 28 Seek 7Xh ea ee pe EJEA Peele Transcend Information Inc 56 y mer Support e Y Y Y m Support Se HH NOT Support ee t eem co Support 1 1 Y lt lt lt lt lt lt lt Y Y Y Y Y Y Y Y V1 0 TS4G 32GCF150 29 Set Feature 30 Set Multiple Mode 31 Set Sleep Mode 32 33 Standby Immediate 34 Translate Sector 35 Wear Level 36 Write Buffer 37 Write DMA 38 Write Long Sector 39 Write Multiple 40 41 Write Sector s 42 Write Sector s w o Erase 43 Write Verify 1 This command is optional depending on the key Management scheme in use Write Multiple w o Erase a I 5 o o lt E6h or 99h E2 or 96h EO or 94h 5 ES Ej E m m m ET ER En EE m w 2 Use of this command is not recommended by CFA Definitions FR Features Register SC Sector Count register 00H to FFH 00H means 256 sectors SN Sector Number register CY Oylinder Low High register DH Head No 0 to 15 of Drive Head register LBA Logic Block Address Mode Support Not used for the command Y Used for the command l lt l l l lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt
5. Sec Num 3 Sec Cnt 2 Feature 1 m Read DMA 08 Bit gt Command 7 CIDIH 6 Cyl High 5 Cyl Low 4 Sec Num 3 Sec Cnt 2 Head LBA 27 24 Cylinder High LBA 23 16 Cylinder Low LBA 15 8 Sector Number LBA 7 0 Sector Count Feature 1 m Read Long Sector 22h or 23h Bit gt 5 4 3 2 1 0 Command 7 22h or 23h CID H 6 1 Drive Head LBA 27 24 Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Sec Num 3 Sector Number LBA 7 0 Sec Cnt 2 Feature 1 X Transcend Information Inc 72 V1 0 TS4G 32GCF150 150X CompactFlash Card m ReadMultiple C4h foe os fs Ps fe fs o SS KENNEN _ cmmie 1 tsa 1 Cyl High 5 Cylinder High LBA 23 16 Cylinder Low LBA 15 8 Sec Num 3 Sector Number LBA 7 0 m ReadSector s 20h or 21h 7 e j s a s 2 j t o oomo 1 um 3 we eum Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Sector Number LBA 7 0 Feature m Read Verify Sector s 40h or 41h w 7 e s 4 3 2 1 j 0 Command 7 40h or 41h cmm te 1 ove Head LBA 27 24 Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Sec Num 3 Sector Number LBA 7 0 _ See cnt 2 Sec
6. WAIT is not supported in this mode 2 The maximum load on WAIT is 1 LSTTL with 50 pF 40pF below 120nsec Cycle Time total load All times are in nanoseconds Din signifies data provided by the system to the CompactFlash Storage Card The WAIT signal may be ignored if the WE cycle to cycle time is greater than the Wait Width time The Max Wait Width time can be determined from the Card Information Structure The Wait Width time meets the PCMCIA PC Card specification of 12us but is intentionally less in this specification x tsu D W Divana p Transcend Information Inc 23 V1 0 TS4G 32GCF150 150X CompactFlash Card B l Olnput Read Timing Specification Cycle Time Mode IEEE Data Data Delay after ORD Data Delay after ORD IORD ORD Dente eoe po fet Pep IRI T IORD Width Time tIGLIGH 165 mans roaa wwe pow gt pw e 9 wes ee P gt emen enm mer Tn To wl ORO WOR SETH ISETSIL INPACK Delay Rising from IORD tdrINPACK IORD tdrINPACK IORD UGHIAH IOIS16 Delay Falling from Address tdflOIS16 ADR tAVISL co IOIS16 Delay Rising from Address tdrlOIS16 ADR tAVISH Wai Delay Faling tom IORD 1awTGORD Se orense oeo qwe De pel pe p Wai With Time ww sm 3 3 e tsuA IORD tsuREG IORD SC pm JJNPACK tdflNPACK IORD JOI
7. ef Te Te Te Te Te Ta Te Command 7 emo x om x sec Num resur 1 m Write DMA CAh sr jo Command 7 cmH 1 iea 1 Drw Head LBA 27 24 Cyl High 5 Cylinder High LBA 23 16 x x x x x Cyl Low 4 Cylinder Low LBA 15 8 Sector Number LBA 7 0 Sec Cnt 2 Sector Count X Transcend Information Inc 78 V1 0 TS4G 32GCF150 150X CompactFlash Card m Write Long Sector 32h or 33h e sj 3 2 Command 7 32h or 33h cioms 1 a 1 Drive Head LBA 27 24 Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Sector Number LBA 7 0 Sec Cnt 2 m Write Multiple Command C5h woj 7 e s j o commande cm SO 1 a 1 jme Head Omer O Cylinder High senmo sewwme man x m Write Multiple without Erase CDh m 7 e s Jj sa 2 J command yf eh ooo xi tA 1 j owe He semmm Secor seemm Sebrtam O mmm X Transcend Information Inc 79 V1 0 TS4G 32GCF150 150X CompactFlash Card m Write Sector s 30h or 31h v e s j s j 2 J 1 cmm a 1 De HeaidBA272 Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Sec Num 3 Sector Numbe
8. lt lt lt lt lt 150X CompactFlash Card Support upport upport upport upport lt upport upport upport Support lt Not Support 2 Y Support Support Support Support Support Transcend Information Inc 57 V1 0 TS4G 32GCF150 150X CompactFlash Card m Check Power Mode 98h or E5h If the CompactFlash Storage Card is in going to or recovering from the sleep mode the CompactFlash Storage Card sets BSY sets the Sector Count Register to 00 clears BSY and generates an interrupt If the CompactFlash Storage Card is in Idle mode the CompactFlash Storage Card sets BSY sets the Sector Count Register to FFh clears BSY and generates an interrupt Cyl High 5 XU Cemmo rmm X T m Execute Drive Diagnostic 90h When the diagnostic command is issued in a PCMCIA configuration mode this command runs only on the CompactFlash Storage Card that is addressed by the Drive Head register This is because PCMCIA card interface does not allows for direct inter drive communication such as the ATA PDIAG and DASP signals When the diagnostic command is issued in the True IDE Mode the Drive bit is ignored and the diagnostic command is executed by both the Master and the Slave with the Master responding with status for both devices Cw T1511 51T21 I5 X Cyl High 5 wumw X Diagnostic Codes are returned in the Error Register at the end of the c
9. oen cres 1 metet c we zm o mese omnem Ones Note The value 1 defined for D3 of the N 0 words indicates that no write protect switch controls writing the ATA registers The value 0 defined for D7 in the N 2 words indicates that there is not more than a single speed extension byte Transcend Information Inc 46 V1 0 TS4G 32GCF150 150X CompactFlash Card CF ATA Drive Register Set Definition and Protocol The CompactFlash Storage Card can be configured as a high performance I O device through a The standard PC AT disk I O address spaces 1FOh 1F7h 3F6h 3F7h primary or 170h 177h 376h 377h secondary with IRQ 14 or other available IRQ b Any system decoded 16 byte I O block using any available IRQ c Memory space The communication to or from the CompactFlash Storage Card is done using the Task File registers which provide all the necessary registers for control and status information related to the storage medium The PCMCIA interface connects peripherals to the host using four register mapping methods Table 39 is a detailed description of these methods 2 yo 1FOh 1F7h Primary I O Mapped 3F6h 3F 7h 3 I O 170h 177h Secondary I O Mapped 376h 377h Transcend Information Inc 47 V1 0 TS4G 32GCF150 150X CompactFlash Card l OPrimary and Secondary Address Configurations 1F 17 h 1F 17 h 1F 17 h 1F 17 h Table Primary and Secondary I O Decoding cree ss
10. 24 of the Odd Byte of the Word D15 DOO This signal is the same as the PC Card Memory Mode signal PC Card I O Mode ps In True IDE Mode all Task Fil t inb de on the low ord True IDE Mode n True ode all Task File operations occur in byte mode on the low order bus D 7 0 while all data transfers are 16 bit using D 15 0 GND 1 50 Ground PC Card Memory Mode GND PC Card I O Mode GND True IDE Mode This signal is the same for all modes This signal is the same for all modes Transcend Information Inc V1 0 TS4G 32GCF150 150X CompactFlash Card PC Card Memory Mode except Ultra DMA Protocol Active IORD PC Card I O Mode except Ultra DMA Protocol Active IORD True IDE Mode Except Ultra DMA Protocol Active HDMARDY All Modes Ultra DMA Protocol DMA Read HSTROBE All Modes Ultra DMA Protocol DMA Write Signal Name Dir Pin Description INPACK 43 This signal is not used in this mode PC Card Memory Mode except Ultra DMA Protocol Active The Input Acknowledge signal is asserted by the CompactFlash Storage Card INPACK when the card is selected and responding to an I O read cycle at the address that PC Card I O Mode except Ultra is on the address bus This signal is used by the host to control the enable of any DMA Protocol Active input data buffers between the CompactFlash Storage Card and the CPU Input Acknowledge Hosts that support a single
11. Bit 3 HS1 this bit is the negation of bit 1 in the Drive Head register Bit 2 HS0 this bit is the negation of bit 0 in the Drive Head register Bit 1 nDS1 this bit is 0 when drive 1 is active and selected Bit 0 nDSO this bit is 0 when the drive 0 is active and selected Transcend Information Inc 55 V1 0 TS4G 32GCF150 150X CompactFlash Card CF ATA Command Set CF ATA Command Set summarizes the CF ATA command set with the paragraphs that follow describing the individual commands and the task file for each a sow rae em fom Ie E E E7h 4 Flush Cache emma m E3h or 97h E1h or 95h 91h B9 Feature 0 127 B9 Feature Y Idle Immediate Initialize Drive Parameters Key Management Structure Read Key Management Read Keying Material Key Management Change Key Management Value B9 Feature 81 T1 eo e e 14 Read Buffer ITI A ead DMA Read Long Sector 22h or 23h d co a R ER E ead Multiple z O v Read Sector s 20h or 21h 9 Read Verify Sector s 40h or 41h 20 Recalibrate 1Xh N ali ol xlo oo N o N e 99 2 Request Sense 22 Security Disable Password F6h 23 Security Erase Prepare F3h a 24 Security Erase Unit 4 25 Security Freeze Lock F5h 26 Security Set Password F1h 27
12. IORD IOWR Read Data D15 D00 Write Data D15 D00 Transcend Information Inc 28 V1 0 TS4G 32GCF150 150X CompactFlash Card B True IDE Ultra DMA Mode Read Write Timing Specification Ultra DMA operations can take place in any of the three basic interface modes PC Card Memory mode PC Card I O mode and True IDE the original mode to support UDMA The usage of signals in each of the modes is shown in Table 24 Ultra DMA Signal Usage In Each Interface Mode Pin Non CARD MEM PCCARDIO MODE TRUE IDE MODE UDMA Signal Type UDMA MEM MODE UDMA UDMA UDMA MODE DMARQ Output 43 INPACK DMARQ DMARQ DMARQ DMACK Input 44 REG DMACK DMACK DMACK STOP Input 35 IOWR STOP 1 STOP 1 STOP 1 HDMARDY R 34 IORD HDMARDY R HDMARDY R e HDMARDY R b HSTROBE W 2HSTROBE W HSTROBE W 3 HSTROBE W 34 DDMARDY W Output DDMARDY W DDMARDY W DDMARDY W 1 3 DSTROBE R P DSTROBE R DSTROBE R DSTROBE R DATA D 15 00 D 15 00 D 15 00 D 15 00 ADDRESS A 10 00 A 10 00 10 00 A 02 00 5 CSEL Input 39 CSEL CSEL CSEL CSEL INTRQ Output 37 READY READY INTRQ INTRQ 7 CE1 CE1 CE1 CS0 Card Select Input 31 CE2 CE2 CE2 CS1 Notes 1 The UDMA interpretation of this signal is valid only during an Ultra DMA data burst 2 The UDMA interpretation of this signal is valid only during and Ultra DMA data burst during a DMA Rea
13. until the CompactFlash Storage Card has completed its power up or reset function No access of any type should be made to the CompactFlash Storage Card during this time Note however that when a card is powered up and used with RESET continuously disconnected or asserted the Reset function of the RESET pin is disabled Consequently the continuous assertion of RESET from the application of power shall not cause the READY signal to remain continuously in the busy state I O Operation After the CompactFlash Storage Card Card has been configured for I O operation this signal is used as Interrupt Request This line is strobed low to generate a pulse mode interrupt or held low for a level mode interrupt In True IDE Mode signal is the active high Interrupt Request to the host Transcend Information Inc V1 0 TS4G 32GCF150 150X CompactFlash Card Signal Name Dir Pin Description REG This signal is used during Memory Cycles to distinguish between Common PC Card Memory Mode Except l 44 Memory and Register Attribute Memory accesses High for Common Memory Ultra DMA Protocol Active Low for Attribute Memory Attribute Memory Select In PC Card Memory Mode when Ultra DMA Protocol is supported by the host and the host has enabled Ultra DMA protocol on the card the host shall keep the REG signal negated during the execution of any DMA Command by the device REG The signal shall also be active low durin
14. 150X CompactFlash Card gt Words 7 8 Number of Sectors per Card This field contains the number of sectors per CompactFlash Storage Card This double word value is also the first invalid address in LBA translation mode gt Words 10 19 Serial Number This field contains the serial number for this CompactFlash Storage Card and is right justified and padded with spaces 20h gt Word 22 ECC Count This field defines the number of ECC bytes used on each sector in the Read and Write Long commands This value shall be set to 0004h gt Words 23 26 Firmware Revision This field contains the revision of the firmware for this product gt Words 27 46 Model Number This field contains the model number for this product and is left justified and padded with spaces 20h gt Word 47 Read Write Multiple Sector Count Bits 15 8 shall be the recommended value of 80h or the permitted value of OOh Bits 7 0 of this word define the maximum number of sectors per block that the CompactFlash Storage Card supports for Read Write Multiple commands gt Word 49 Capabilities Bit 13 Standby Timer If bit 13 is set to 1 then the Standby timer is supported as defined by the IDLE command If bit 13 is set to 0 then the Standby timer operation is defined by the vendor Bit 11 IORDY Supported If bit 11 is set to 1 then this CompactFlash Storage Card supports IORDY operation If bit 11 is set to 0 then this CompactFlash Storage Card may support IORDY ope
15. 2 1 0 Command 7 97h or E3h oom x Cyl High 5 X Cyl Low 4 X Sec Num 3 X Sec Cnt 2 Timer Count 5 msec increments Feature 1 X m Idle Immediate 95h or E1h This command causes the CompactFlash Storage Card to set BSY enter the Idle mode clear BSY and generate an interrupt Ba 7 e s j s ja t j 9 Command 7 95h or E1h con x Cyl High 5 Cyl Low 4 Sec Num 3 Sec Cnt 2 x Kx KI KIX Feature 1 m Initialize Drive Parameters 91h This command enables the host to set the number of sectors per track and the number of heads per cylinder Only the Sector Count and the Card Drive Head registers are used by this command Command 7 C D H 6 Cyl High 5 Cyl Low 4 Sec Num 3 X Sec Cnt 2 Feature 1 X Number of Sectors Transcend Information Inc 71 V1 0 TS4G 32GCF150 150X CompactFlash Card m This command always fails with the CompactFlash Storage Card returning command aborted Bit gt 7 6 5 4 3 2 1 0 Command 7 C D H 6 X Cyl High 5 Cyl Low 4 Sec Num 3 Sec Cnt 2 Feature 1 m Read Buffer E4h The Read Buffer command enables the host to read the current contents of the CompactFlash Storage Card s sector buffer This command has the same protocol as the Read Sector s command Bit gt Command 7 C D H 6 Cyl High 5 Cyl Low 4
16. BBK ICRC UNC IDNF ABRT AMNF Bakacrc unc o mwe o ABRT o AMN This register is also accessed in PC Card Modes on data bits D15 D8 during a read operation to offset 0 with CE2 low and CE1 high Bit 7 BBK ICRO this bit is set when a Bad Block is detected This bit is also set when an interface CRC error is detected in True IDE Ultra DMA modes of operation Bit 6 UNC this bit is set when an Uncorrectable Error is encountered Bit 5 this bit is O Bit 4 IDNF the requested sector ID is in error or cannot be found Bit 3 this bit is O Bit 2 Abort This bit is set if the command has been aborted because of a CompactFlash Storage Card status condition Not Ready Write Fault etc or when an invalid command has been issued Bit 1 This bit is O Bit 0 AMNF This bit is set in case of a general error Transcend Information Inc 51 V1 0 TS4G 32GCF150 150X CompactFlash Card gt Feature Register Address 1F1h 171h Offset 1 ODh Write Only This register provides information regarding features of the CompactFlash Storage Card that the host can utilize This register is also accessed in PC Card modes on data bits D15 D8 during a write operation to Offset 0 with CE2 low and CE1 high gt Sector Count Register Address 1F2h 172h Offset 2 This register contains the numbers of sectors of data requested to be transferred on a read or write operation between the host and the CompactFlash Storage Ca
17. Care Even reve Don t Word Write 16 bits EPI Oese Oese vente vente Ultra DMA Write Ultra DMA Read pH H x H H Ode pH Tw Tx n H Od Dye Transcend Information Inc 44 V1 0 TS4G 32GCF150 150X CompactFlash Card True IDE Mode I O Transfer Function The CompactFlash Storage Card can be configured in a True IDE Mode of operation The CompactFlash Storage Card is configured in this mode only when the OE input signal is grounded by the host during the power off to power on cycle Optionally CompactFlash Storage Cards may support the following optional detection methods 1 The card is permitted to monitor the ATA SEL signal at any time s and switch to PCMCIA mode upon detecting a high level on the pin 2 The card is permitted to re arbitrate the interface mode determination following a transition of the RESET pin 3 The card is permitted to monitor the OE ATA SEL signal at any time s and switch to True IDE mode upon detection of a continuous low level on pin for an extended period of time Table True IDE Mode Function defines the function of the operations for the True IDE Mode piena Invalid Modes Undefined Undefined In Out In Out Undefined Undefined Out Out et dae Undefined Undefined Out Out Undefined oe In Standby Mode Task File Write Task File Read PIO Data Register Write SSeS aa
18. Mode Except Ultra CompactFlash Storage Card controller registers when the CompactFlash DMA Protocol Active Storage Card is configured to use the I O interface The clocking shall occur on the negative to positive edge of the signal trailing edge IOWR In True IDE Mode while Ultra DMA mode protocol is not active this signal has True IDE Mode Except Ultra the same function as in PC Card I O Mode When Ultra DMA mode protocol is DMA Protocol Active supported this signal must be negated before entering Ultra DMA mode protocol STOP In All Modes while Ultra DMA mode protocol is active the assertion of this signal All Modes Ultra DMA Protocol causes the termination of the Ultra DMA data burst Active OE l 9 This is an Output Enable strobe generated by the host interface It is used to read PC Card Memory Mode data from the CompactFlash Storage Card in Memory Mode and to read the CIS and configuration registers OE In PC Card I O Mode this signal is used to read the CIS and configuration PC Card I O Mode registers ATA SEL To enable True IDE Mode this input should be grounded by the host True IDE Mode READY O 37 In Memory Mode this signal is set high when the CompactFlash Storage Card is PC Card Memory Mode IREQ PC Card I O Mode INTRQ True IDE Mode ready to accept a new data transfer operation and is held low when the card is busy At power up and at Reset the READY signal is held low busy
19. Storage Cards that support security Value Time 0 Value not specified bra Value 2 minutes 255 2508 minutes gt Word 90 Time required for Enhanced security erase unit completion Word 90 specifies the time required for the Enhanced Security Erase Unit command to complete This command shall be supported on CompactFlash Storage Cards that support security Value Time 0 Value not specified 1 25 x l 4 Value 2 minutes 255 gt 508 minutes gt Word 91 Advanced power management level value Bits 7 0 of word 91 contain the current Advanced Power Management level setting gt Word 128 Security Status Bit 8 Security Level If set to 1 indicates that security mode is enabled and the security level is maximum If set to 0 and security mode is enabled indicates that the security level is high Bit 5 Enhanced security erase unit feature supported If set to 1 indicates that the Enhanced security erase unit feature set is supported Bit 4 Expire If set to 1 indicates that the security count has expired and Security Unlock and Security Erase Unit are command aborted until a power on reset or hard reset Bit 3 Freeze If set to 1 indicates that the security is Frozen Bit 2 Lock If set to 1 indicates that the security is locked Bit 1 Enable Disable If set to 1 indicates that the security is enabled If set to 0 indicates that the security is disabled Bit 0 Capability If set to 1 indicat
20. The CompactFlash Storage Card is also Reset when the Soft Reset bit in the Card Configuration Option Register is set RESET This signal is the same as the PC Card Memory Mode signal PC Card I O Mode RESET In the True IDE Mode this input pin is the active low hardware reset from the True IDE Mode host 13 38 5 V 3 3 V power PC Card Memory Mode VCC PC Card I O Mode VCC True IDE Mode This signal is the same for all modes This signal is the same for all modes Transcend Information Inc 10 V1 0 TS4G 32GCF150 150X CompactFlash Card Signal Name Dir Pin Description VS1 33 Voltage Sense Signals VS1 is grounded on the Card and sensed by the Host so VS2 40 that the CompactFlash Storage Card CIS can be read at 3 3 volts and VS2 is PC Card Memory Mode reserved by PCMCIA for a secondary voltage and is not connected on the Card VS1 This signal is the same for all modes VS2 PC Card I O Mode VS1 This signal is the same for all modes VS2 True IDE Mode WAIT The WAIT signal is driven low by the CompactFlash Storage Card to signal the PC Card Memory Mode Except 42 host to delay completion of a memory or I O cycle that is in progress Ultra DMA Protocol Active WAIT This signal is the same as the PC Card Memory Mode signal PC Card I O Mode Ultra DMA Protocol Active IORDY In True IDE Mode except in Ultra DMA mod
21. at 1 5 V 2 All signal transitions for a timing parameter shall be measured at the connector specified in the measurement location column For example in the case of tRFS both STROBE and DMARDY transitions are measured at the sender connector 3 The parameter tCYC shall be measured at the recipient s connector farthest from the sender 4 The parameter tLI shall be measured at the connector of the sender or recipient that is responding to an Transcend Information Inc 31 V1 0 TS4G 32GCF150 150X CompactFlash Card incoming transition from the recipient or sender respectively Both the incoming signal and the outgoing response shall be measured at the same connector 5 The parameter tAZ shall be measured at the connector of the sender or recipient that is driving the bus but must release the bus the allow for a bus turnaround Comment tecvcrvP Typical sustained average two cycle time tcvc Cycle time allowing for asymmetry and clock variations from STROBE edge to STROBE edge Two cycle time allowing for clock variations from rising edge to next rising edge or from falling edge to next falling edge of STROBE invalid CS i i CH i R ion 2 5 9 tDVH Data valid hold time at sender from STROBE edge until data may become invalid 3 CRC word setup time at device 2 t t CRC word hold time device 2 tcvs CRC word valid setup time at host from CRC valid until DMACK negation 3 CRC word vali
22. eras nuam Pe n ez Data out Register Write Register Write Register Read L Odd Byte Even Byte In In H L Odd Byte Even Byte In In See Note 2 Odd Byte Even Byte In In L H Even Byte Out DMA Data L H Odd ut Even Byte Register Read Out Ultra DMA Data Register Read Control Register Write Alt Status Read Drive Address h H C EN EN See Note 3 Odd Byte Even Byte Out Out H L Control In e Transcend Information Inc 45 V1 0 TS4G 32GCF150 150X CompactFlash Card Host Configuration Requirements for Master Slave or New Timing Modes The CF Advanced Timing modes include PCMCIA PC Card style I O modes that are faster than the original 250 ns cycle time These modes are not supported by the PCMCIA PC Card specification nor CF by cards based on revisions of the CF specification before Revision 3 0 Hosts shall ensure that all cards accessed through a common electrical interface are capable of operation at the desired faster than 250 ns I O mode before configuring the interface for that I O mode Advanced Timing modes are PCMCIA PC Card style I O modes that are 100 ns or faster PC Card Memory modes that are 100ns or faster True IDE PIO Modes 5 6 and Multiword DMA Modes 3 4 These modes are permitted to be used only when a single card is present and the host and card are connected directly without a cable exceeding 0 15m in length Consequently the host shall not configure a card into an Ad
23. hk www transcend com tw www transcendchina com Korea E mail sales transcend co kr USA www transcend co kr Los Angeles THE NETHERLANDS E mail sales transcendusa com E mail sales transcend nl Maryland www transcend nl E mail sales md transcendusa com United Kingdom www transcendusa com E mail sales transcend uk com www transcend uk com Transcend Information Inc 85 V1 0 TS4G 32GCF150 150X CompactFlash Card A Transcend CompactFlash 16GB Industrial 25 c Transcend Information Inc 86 V1 0
24. load 10 while meeting all AC timing requirements 50 pF at a DC current of 400 u A low state and 1100 p A high state 6 BVD2 was not defined in the JEIDA 3 0 release Systems fully supporting JEIDA release 3 SRAM cards shall pull up pin 45 BVD2 to avoid sensing their batteries as Low 7 Address Signals each card shall present a load of no more than 100pF 10 at a DC current of 450p A low state and 150 A high state The host shall be able to drive at least the following load 10 while meeting all AC timing requirements the number of sockets wired in parallel multiplied by 100pF with DC current 450p A low state and 150p A high state per socket 8 Data Signals the host and each card shall present a load no larger than 50pF 10 at 8 DC current of 450u A and 150y A high state The host and each card shall be able to drive at least the following load 10 while meeting all AC timing requirements 100pF with DC current 1 6mA low state and 300p A high state This permits the host to wire two sockets in parallel without derating the card access speeds 9 Reset Signal This signal is pulled up to prevent the input from floating when a CFA to PCMCIA adapter is used in a PCMCIA revision 1 host However to minimize DC current drain through the pull up resistor in normal operation the pull up should be turned off once the Reset signal has been actively driven low by the host Consequently the input is specified as an I2Z because the resistor is not n
25. parameter information is defined as the Multiword DMA data transfer supported field If this field is supported bit 1 of word 53 shall be set to one This field is bit significant Any number of bits may be set to one in this field by the CompactFlash Storage Card to indicate the Multiword DMA modes it is capable of supporting Of these bits bits 7 through 2 are reserved Bit 0 if set to one indicates that the CompactFlash Storage Card supports Multiword DMA mode O Bit 1 if set to one indicates that the CompactFlash Storage Card supports Multiword DMA modes 1 and O Bit 2 if set to one indicates that the CompactFlash Storage Card supports Multiword DMA modes 2 1 and 0 Support for Multiword DMA modes 3 and above are specific to CompactFlash are reported in word 163 Word 163 CF Advanced True IDE Timing Mode Capabilities and Settings gt Word 64 Advanced PIO transfer modes supported Bits 7 through 0 of word 64 of the Identify Device parameter information is defined as the advanced PIO data transfer supported field If this field is supported bit 1 of word 53 shall be set to one This field is bit significant Any number of bits may be set to one in this field by the CompactFlash Storage Card to indicate the advanced PIO modes it is capable of supporting Of these bits bits 7 through 2 are reserved Bit 0 if set to one indicates that the CompactFlash Storage Card supports PIO mode 3 Bit 1 if set to one indicates that the CompactFlash Stor
26. signal capacitance limits for Ultra DMA operation 150X CompactFlash Card The host interface signal capacitance at the host connector shall be a maximum of 25 pF for each signal as measured at 1 MHz The card interface signal capacitance at the card connector shall be a maximum of 20 pF for each signal as measured at 1 MHz Series termination required for Ultra DMA operation Series termination resistors are required at both the host and the card for operation in any of the Ultra DMA modes Table describes typical values for series termination at the host and the device Table Typical Series Termination for Ultra DMA Signal Host Termination Device Termination IORD HDMARDY HSTROBE 22 ohm 82 ohm IOWR STOP 22 ohm 82 ohm CSO CS1 33 ohm 82 ohm A00 A01 A02 33 ohm 82 ohm DMACK 22 ohm 82 ohm D15 through DOO 33 ohm 33 ohm DMARQ 82 ohm 22 ohm INTRQ 82 ohm 22 ohm IORDY DDMARDY DSTROBE 82 ohm 22 ohm RESET 33 ohm 82 ohm NOTE Only those signals requiring termination are listed in this table If a signal is not listed series termination is not required for operation in an Ultra DMA mode Shows signals also requiring a pull up or pull down resistor at the host The actual termination values should be selected to compensate for transceiver and trace impedance to match the characteristic cable impedance Transcend Information Inc 18 V1 0 TS4G 32GCF150 150X CompactF
27. state requested has been entered The CompactFlash Storage Card automatically powers down when it is idle and powers back up when it receives a command Int this bit represents the internal state of the interrupt request This value is available whether or not the I O interface has been configured This signal remains true until the condition that caused the interrupt request has been serviced If interrupts are disabled by the IEN bit in the Device Control Register this bit is a zero 0 Transcend Information Inc 39 V1 0 TS4G 32GCF150 150X CompactFlash Card m Pin Replacement Register Base 04h in Attribute Memory Operation D7 D6 D5 D4 D3 D2 D1 DO Read o o CReady cwrrot 1 1 RReady WProt_ wite o o CReady cwPot o o MReady MWProt Pin Replacement Register CReady this bit is set to one 1 when the bit RReady changes state This bit can also be written by the host CWProt this bit is set to one 1 when the RWprot changes state This bit may also be written by the host RReady this bit is used to determine the internal state of the READY signal This bit may be used to determine the state of the READY signal as this pin has been reallocated for use as Interrupt Request on an card When written this bit acts as a mask MReady for writing the corresponding bit CReady WProt this bit is always zero 0 since the CompactFlash Storage Card or CF Card does not have a Write Protect sw
28. the host to changes in the READY and Write PC Card Mode Protect states while the I O interface is configured Its use is controlled by the Status Changed Card Config and Status Register PDIAG In the True IDE Mode this input output is the Pass Diagnostic signal in the True IDE Mode Master Slave handshake protocol BVD2 45 This signal is asserted high as BVD2 is not supported PC Card Memory Mode SPKR This line is the Binary Audio output from the card If the Card does not support PC Card I O Mode the Binary Audio function this line should be held negated DASP In the True IDE Mode this input output is the Disk Active Slave Present signal in True IDE Mode the Master Slave handshake protocol CD1 CD2 O 26 25 These Card Detect pins are connected to ground on the CompactFlash Storage PC Card Memory Mode CD1 CD2 PC Card I O Mode CD1 CD2 True IDE Mode Card They are used by the host to determine that the CompactFlash Storage Card is fully inserted into its socket This signal is the same for all modes This signal is the same for all modes Transcend Information Inc V1 0 TS4G 32GCF150 150X CompactFlash Card Signal Name Dir Pin Description These input signals are used both to select the card and to indicate to the card CE1 CE2 I 7 32 whether a byte or a word operation is being performed CE2 always accesses PC Card Memory Mode the o
29. 0 pF 40pF below 120nsec Cycle Time total load All times are in nanoseconds Minimum time from IORDY high to IORD high is 0 nsec but minimum IORD width shall still be met o N eo N NIAJ aA gt N N gt N o A 1 10 is the minimum total cycle time t2 is the minimum command active time and t2i is the minimum command recovery time or command inactive time The actual cycle time equals the sum of the actual command active time and the actual command inactive time The three timing requirements of tO t2 and t2i shall be met The minimum total cycle time requirement is greater than the sum of t2 and t2i This means a host implementation can lengthen either or both t2 or t2i to ensure that tO is equal to or greater than the value reported in the device s identify device data A CompactFlash Storage Card implementation shall support any legal host implementation 2 This parameter specifies the time from the negation edge of IORD to the time that the data bus is no longer driven by the CompactFlash Storage Card tri state 3 The delay from the activation of IORD or IOWR until the state of IORDY is first sampled If IORDY is inactive then the host shall wait until IORDY is active before the PIO cycle can be completed If the CompactFlash Storage Card is not driving IORDY negated at tA after the activation of IORD or IOWR then t
30. 00h 2 Reserved 3 00XXh 2 Default number of heads 4 0000h 2 Obsolete 5 0000h 2 Obsolete 6 XXXXh 2 Default number of sectors per track 7 8 XXXXh 4 Number of sectors per card Word 7 MSW Word 8 LSW 9 XXXXh 2 Obsolete 10 19 aaaa 20 Serial number in ASCII Right Justified 20 0000h 2 Obsolete 21 0000h 2 Obsolete 22 0004h 2 Number of ECC bytes passed on Read Write Long Commands 23 26 aaaa 8 Firmware revision in ASCII Big Endian Byte Order in Word 27 46 aaaa 40 Model number in ASCII Left Justified Big Endian Byte Order in Word 47 XXXXh 2 Maximum number of sectors on Read Write Multiple command 48 0000h 2 Reserved 49 2 Capabilities 50 0000h 2 Reserved Transcend Information Inc 60 V1 0 TS4G 32GCF150 150X CompactFlash Card Petia e Bs Data Field Type Information 51 0X00h 2 PIO data transfer cycle timing mode 52 0000h 2 Obsolete 53 000Xh 2 Field Validity 54 XXXXh 2 Current numbers of cylinders 55 XXXXh 2 Current numbers of heads 56 XXXXh 2 Current sectors per track 57 58 XXXXh 4 Current capacity in sectors LBAs Word 57 LSW Word 58 MSW 59 01XXh 2 Multiple sector setting 60 61 XXXXh 4 Total number of sectors addressable in LBA Mode 62 0000h 2 Reserved 63 0XOXh 2 Multiword DMA transfer In PC Card modes this value shall be Oh 64 00XXh 2 Advanced PIO modes supported 65 XXXXh 2 iu DMA transfer cycle ti
31. 06 Number of max pair 407 410 Erase Count 407 408 High word 409 410 Low word 411 510 V F F V X Vendor specific 511 V Data structure checksum F the content of the byte is fixed and does not change V the content of the byte is variable and may change depending on the state of the device or the commands executed by the device X the content of the byte is vendor specific and may be fixed or variable R the content of the byte is reserved and shall be zero 4 Byte value MSB 2 1 LSB Ordering Information Transcend Information Inc 84 V1 0 TS4G 32GCF150 150X CompactFlash Card Transcend Product Capacity CompactFlash Card 150X 1G 32G 1GB up to 32GB The above technical information is based on industry standard data and has been tested to be reliable However Transcend makes no warranty either expressed or implied as to its accuracy and assumes no liability in connection with the use of this product Transcend reserves the right to make changes to the specifications at any time without prior notice JAPAN E mail sales transcend co jp p Transcend isi E mail sales transcendchina com www transcendchina com TAI WAN GERMANY No 70 XingZhong Rd NeiHu Dist Taipei Taiwan R O C E mail vertrieb transcend de TEL 886 2 2792 8000 www transcend de Fax 886 2 2793 2222 HONG KONG E mail sales transcend com tw E mail sales transcend com
32. 5 shall be met and tRD is not applicable If the CompactFlash Storage Card is driving IORDY negated at the time tA after the activation of IORD or IOWR then tRD shall be met and t5 is not applicable 4 t7 and t8 apply only to modes 0 1 and 2 For other modes this signal is not valid 5 IORDY is not supported in this mode Transcend Information Inc 26 V1 0 TS4G 32GCF150 150X CompactFlash Card ADDR valid A02 A01 A00 CSO CS1 t tz t ts IORD IOWR Write Data D15D00 4 1 C gt 4 See note 2 um t4 Read Data D15 D00 4 T XX 1 See note 2 IORDY See note 4 4 1 See note 4 4 1 ta IORDY See note 4 4 2 RDY IO TVVVVVVVVVYYVYVY See note 4 4 3 Notes 1 Device address consists of CS0 CS1 and A 02 00 2 Data consists of D 15 00 16 bit or D 07 00 8 bit 3 IOCS16 is shown for PIO modes 0 1 and 2 For other modes this signal is ignored 4 The negation of IORDY by the device is used to extend the PIO cycle The determination of whether the cycle is to be extended is made by the host after tA from the assertion of IORD or IOWR The assertion and negation of IORDY is described in the following three cases 4 1 Device never negates IORDY No wait is generated 4 2 Devi
33. A standards Support Global Wear Leveling Static Data Refresh Early Retirement and Erase Count Monitor functions to extend product life Transcend Information Inc V1 0 TS4G 32GCF150 150X CompactFlash Card Ts L EN n 50 99mm 05 039 in 002 3 30mm 10 130 in gt A 1 01mm n ray y Non in 603 040 in 003 2 44mm 07 096 in 003 Optional 5 518 Configuration 4 1 4 See note Elc Elis 2 amp 215mm 07 o g 2 085 in 003 8 c 2a p 5 EE Transcend 4 A 3 ARRE x n r WS N 3 0 76mm 07 030 in 003 1 65mm 130 in gt lt 41 66mm 13 1 640 in 005 gt A 0 63mm 07 42 80mm 10 025 in 003 4X R 0 5mm 1 4X R 020 in 004 1 685 in 2 004 Transcend Information Inc 2 V1 0 TS4G 32GCF150 150X CompactFlash Card Block Diagram 8 16 bit Flash Memory interface with NAND Fi RS ECC 8 bit Flash NAND Flash d ed Sene HR interfa Controller in ce RS EOC HA 10 0 CF READER CF interface HOE HWE IORDY IOCS16 DMARQ pou a eh ee TER FIRE 4j Transcend Information Inc 3 V1 0 TS4G 32GCF150 150X CompactFlash Card Pin Assignments and Pin T PC Card Memory Mode PC Card Mode True IDE Modes epe epore 1m e e e e pep BOB Name ype Name Type Type Num Name Type Type Ground Ground 1 GND
34. CE tEHQZ 100 Output Disable Time from OE tdis OE tGHQZ 100 Address Setup Time tsu A tAVGL 30 Output Enable Time from CE ten CE tELQNZ 5 Output Enable Time from OE ten OE tGLQNZ 5 Data Valid from Address Change tv A tAXQX 0 Note All times are in nanoseconds Dout signifies data provided by the CompactFlash Storage Card to the system The CE signal or both the OE signal and the WE signal shall be de asserted between consecutive cycle operations ten CE ta OE ten OE EL N A V tdis CE tdis OE Transcend Information Inc 20 V1 0 TS4G 32GCF150 150X CompactFlash Card W Configuration Register Attribute Memory Write Timing Specification The Card Configuration write access time is defined as 250 ns Detailed timing specifications are shown in Table below Table Configuration Register Attribute Memory Write Timing em fown wrasse wan wwe moe 9 seup tine suey fue 9 we Recover Tine emm wwe 9 tata Soup Tineiorwe subnet owe o ewume fox Note All times are in nanoseconds Din signifies data provided by the system to the CompactFlash Storage Card MES S c S qo gt tw WE tsu D WEH SX LiL po CCo 3 SSS KK 2227 Transcend Information Inc 21 V1 0 TS4G 32GCF150 150X CompactFlash Card Co
35. CIA modes of operation report only the 848Ah value as they are always intended as removable devices Bits 15 0 CF Standard Configuration Value Word 0 is 848Ah This is the recommended value of Word 0 Some operating systems require Bit 6 of Word 0 to be set to 1 Non removable device to use the card as the root storage device The Card must be the root storage device when a host completely replaces conventional disk storage with a CompactFlash Card in True IDE mode To support this requirement and provide capability for any future removable media Cards alternatehandling of Word 0 is permitted Bits 15 0 CF Preferred Alternate Configuration Values 044Ah This is the alternate value of Word 0 turns on ATA device and turns off Removable Media and Removable Device while preserving all Retired bits in the word 0040h This is the alternate value of Word 0 turns on ATA device and turns off Removable Media and Removable Device while zeroing all Retired bits in the word Bit 15 12 Configuration Flag If bits 15 12 are set to 8h then Word 0 shall be 848Ah If bits 15 12 are set to Oh then Bits 11 0 are set using the definitions below and the Card is required to support for the CFA command set and report that in bit 2 of Word 83 Bit 15 12 values other than 8h and Oh are prohibited Bits 11 8 Retired These bits have retired ATA bit definitions It is recommended that the value of these bits be either the preferred value of Oh or the value of 4
36. D2h Enable Disable Autosave D8h Enable SMART Operations D3h Save Attribute Values D9h Disable SMART Operations D4h Execute OFF LINE Immediate DAh Return Status 1 Ifreserved size below the Threshold the status can be read from Cylinder register by Return Status command DAh e SMART Data Structure Decription e Revision code Vendor specific 115 116 117 361 362 363 364 365 366 367 Power cycle count of the device Vendor specific Off line data collection status Self test execution status byte Total time in seconds to complete off line data collection activity Vendor specific Off line data collection capabilit n n p X I lt 368 369 SMART capabilit Error logging capability 370 7 1 Reserved 0 1 Device error logging supported 371 372 373 374 375 385 386 395 396 397 398 399 Vendor specific Short self test routine recommended polling time in minutes Extended self test routine recommended polling time in minutes Conveyance self test routine recommended polling time in minutes Reserved Firmware Version Date Code Number of initial invalid block 396 MSB 397 LSB Number of run time bad block 398 MSB 399 LSB n m mom im m x lt Transcend Information Inc 83 V1 0 TS4G 32GCF150 400 401 402 403 405 V 150X CompactFlash Card Number of spare block Erase count Low word SMI 4
37. I O lOis8 the host sets this bit to a one 1 if the CompactFlash Storage Card or CF Card is to be configured in an 8 bit Mode The CompactFlash Storage Card is always configured for both 8 and 16 bit I O so this bit is ignored Some CF cards can be configured for either 8 bit l O mode or 16 bit I O mode so CF cards may respond to this bit XE this bit is set and reset by the host to disable and enable Power Level 1 commands in CF cards If the value is 0 Power Level 1 commands are enabled if it is 1 Power Level 1 commands are disabled Default value at power on or after reset is 0 The host may read the value of this bit to determine whether Power Level 1 commands are currently enabled For CompactFlash cards that do not support Power Level 1 this bit has value 0 and is not writeable Audio this bit is set and reset by the host to enable and disable audio information on SPKR when the CF card is configured This bit should always be zero for CompactFlash Storage cards PwrDwn this bit indicates whether the host requests the CompactFlash Storage Card or CF Card to be in the power saving or active mode When the bit is one 1 the CompactFlash Storage Card or CF Card enters a power down mode When PwrDwn is zero 0 the host is requesting the CompactFlash Storage Card or CF Card to enter the active mode The PCMCIA READY value becomes false busy when this bit is changed READY shall not become true ready until the power
38. R2 50 KQ 9 Transcend Information Inc 15 V1 0 TS4G 32GCF150 150X CompactFlash Card Notes 1 Control Signals each card shall present a load to the socket no larger than 50 pF 1o at a DC current of 700 u A low state and 150 u A high state including pull resistor The socket shall be able to drive at least the following load 10 while meeting all AC timing requirements the number of sockets wired in parallel multiplied by 50 pF with DC current 700 A low state and 150 u A high state per socket 2 Resistor is optional 3 Status Signals the socket shall present a load to the card no larger than 50 pF 10 at a DC current of 400 u A low state and 100 u A high state including pull up resistor The card shall be able to drive at least the following load 10 while meeting all AC timing requirements 50 pF at a DC current of 400 u A low state and 100 u A high state 4 Status Signals the socket shall present a load to the card no larger than 50 pF 10 at a DC current of 400 u A low state and 100 u A high state including pull up resistor The card shall be able to drive at least the following load 10 while meeting all AC timing requirements 50 pF at a DC current of 400 u A low state and 100 u A high state 5 Status Signals the socket shall present a load to the card no larger than 50 pF 10 at a DC current of 400 u A low state and 100 u A high state including pull up resistor The card shall be able to drive at least the following
39. S16 E tdflOIS16 ADR WAIT tdW TIORD Dout Transcend Information Inc 24 V1 0 TS4G 32GCF150 150X CompactFlash Card m 1 O Output Write Timing Specification Cycle Time Mode 100ns ns BERE fat ps omwen wow wwe ves m 5 assess Soup owowR m L arsstodio we m a gt o Esame fece fem gt s s gt cea towngiowk fomen o a gt fw _ mem esses amine o 516 Delay Falling from Address tdflOIS16 ADR tAVISL MEIN EXIST m n lan Ware Fang tomow awron oww ls f O omRnonronnan eromen ww fo 9 pe L1 Dee ww wm ow poo om T tsuA IOWR tsuREG IOWR CE JOWR 01516 Transcend Information Inc 25 V1 0 TS4G 32GCF150 150X CompactFlash Card B True IDE PIO Mode Read Write Timing Specification Cycle time mi time kann EN fe ote Pe Te setup min Lomwowuw sm pus vo 70 EXE min Register 8 bit 290 290 290 80 70 iorno e owr swm s s e gt 6 wo wo s foroan 5 15 5 fm oe we e max IORD IOWR to address valid hold E Read Data Valid to IORDY active min if IORDY initially low after tA Notes All timings are in nanoseconds The maximum load on IOCS16 is 1 LSTTL with a 5
40. Symbol Min Max Unit Remark Supply Voltage Vec 3 135 3 465 V High level output voltage Von Vcc 0 8 V Low level output voltage VoL 0 8 V 2 4 V Non schmitt trigger High level input voltage Vin 2 05 V Schmitt trigger 0 6 V Non schmitt trigger Low level input voltage Vit 1 25 V Schmitt trigger Pull up resistance 52 7 141 KOhm Pull down resistance Rpp 47 5 172 KOhm 1 2 Include CE1 CE2 HREG HOE HIOE HWE HIOW pins Include CE1 CE2 HREG HOE HIOE HWE HIOW CSEL P35 PDIAG DASP pins Transcend Information Inc 12 V1 0 TS4G 32GCF150 150X CompactFlash Card B Input Power Maximum Average RMS Current Measurement Method 3 3V 5 75 mA 500 mA in Power Level 1 3 3V at 25 C 5 0V 10 100 mA 500 mA in Power Level 1 5 0V at 25 C B Input Leakage Current Type Parameter symbol Conditions MIN TYP MAX Units MZ mpuieaageCurent iL Vin Vec Vi Ond a f 1 m MU Puk pRessr RPU vec sov sox 50k onm wo PukDownRessir RPDi vec sov sox 50k Ohm Input Characteristics for UDMA mode gt 4 In UDMA modes greater than 4 the following characteristics apply Voltage output high and low values shall be met at the source connector to include the effect of series termination Table Input Characteristics UDMA Mode gt 4 Parameter Symbol MIN MAX Units DC supply vo
41. TS4G 32GCF150 150X CompactFlash Card Description The Transcend CF 150X is a High Speed Compact Flash Card with high quality Flash Memory assembled on a printed circuit board Placement A Transcend CompactFlash 16GB Industrial sc et Dimensions 36 40 0 150 1 43 0 005 B 42 80 0 100 1 69 0 004 3 30 0 100 0 13 0 004 D 0 63 0 070 0 02 0 003 Features e CompactFlash Specification Version 4 1 Complaint e RoHS compliant products Single Power Supply 3 3V 5 or 5Vt1096 Operating Temperature 25 C to 85 C e Storage Temperature 40 C to 85 C Operating Humidity Non condensation 0 to 95 e Storage Humidity Non condensation 0 to 95 Built in 24 bit ECC Error Correction Code functionality and global wear leveling algorithm ensures highly reliable of data transfer Y 24bit BCH ECC 4k 208 byte per page flash Operation Modes Y PC Card Memory Mode Y PC Card Mode Y True IDE Mode True IDE Mode supports Y A Ultra DMA Mode 0 to Ultra DMA Mode 5 UDMA5 must work under 3 3V MultiWord DMA Mode 0 to MultiWord DMA Mode 4 Y PIO Mode 0 to PIO Mode 6 e PC Card Mode supports up to Ultra DMA Mode 5 True IDE mode Fixed Disk Standard PC Card Mode Removable Disk Standard Durability of Connector 10 000 times MTBF 1 000 000 hours Support S M A R T Self defined e Support Security Command Compliant to CompactFlash PC Card Mode and AT
42. a m ao ione sown woe o wam o evnweoaa 12 ro o o 1 enornesster reas 1 2 Le fo 1 seem secorcom _ ro fo i 1 secon sew Fo f o omo ovinirtow ropa pst sms omms o sem fo 1 o Lorem o 1 1 1 owens Rs Note 1 Register 0 is accessed with CE1 low and CE2 low and AO Don t Care as a word register on the combined Odd Data Bus and Even Data Bus D15 D0 This register may also be accessed by a pair of byte accesses to the offset 0 with CE1 low and CE2 high Note that the address space of this word register overlaps the address space of the Error and Feature byte wide registers which lie at offset 1 When accessed twice as byte register with CE1 low the first byte to be accessed is the even byte of the word and the second byte accessed is the odd byte of the equivalent word access 2 A byte access to register 0 with CE1 high and CE2 low accesses the error read or feature write register Transcend Information Inc 48 V1 0 TS4G 32GCF150 B Contiguous I O Mapped Addressing 150X CompactFlash Card When the system decodes a contiguous block of I O registers to select the CompactFlash Storage Card the registers are accessed in the block of I O space decoded by the system as follows REG A3 o jo o o o o o oj
43. ageCard supports PIO mode 4 Support for PIO modes 5 and above are specific to CompactFlash are reported in word 163 gt Word 65 Minimum Multiword DMA transfer cycle time Word 65 of the parameter information of the Identify Device command is defined as the minimum Multiword DMA transfer cycle time This field defines in nanoseconds the minimum cycle time that if used by the host the CompactFlash Storage Card guarantees data integrity during the transfer If this field is supported bit 1 of word 53 shall be setto one The value in word 65 shall not be less than the minimum cycle time for the fastest DMA mode supported by the device This field shall be supported by all CompactFlash Storage Cards supporting DMA modes 1 and above If bit 1 of word 53 is set to one but this field is not supported the Card shall return a value of zero in this field Recommended Multiword DMA transfer cycle time Word 66 of the parameter information of the Identify Device command is defined as the recommended Multiword DMA transfer cycle time This field defines in nanoseconds the cycle time that if used by the host may optimize the data transfer from by reducing the probability that the CompactFlash Storage Card Transcend Information Inc 64 V1 0 TS4G 32GCF150 150X CompactFlash Card will need to negate the DMARQ signal during the transfer of a sector If this field is supported bit 1 of word 53 shall be setto one The value in word 66 shall not b
44. at any given time If an Ultra DMA mode is selected then no Multiword DMA mode shall be selected If a Multiword DMA mode is selected then no Ultra DMA mode shall be selected Support of this word is mandatory if Ultra DMA is supported Bits 15 14 Reserved Bit 13 1 Ultra DMA mode 5 is selected 0 Ultra DMA mode 5 is not selected Transcend Information Inc 66 V1 0 TS4G 32GCF150 150X CompactFlash Card Bit 12 1 Ultra DMA mode 4 is selected 0 Ultra DMA mode 4 is not selected Bit 11 1 Ultra DMA mode 3 is selected 0 Ultra DMA mode 3 is not selected Bit 10 1 Ultra DMA mode 2 is selected 0 Ultra DMA mode 2 is not selected Bit 9 1 Ultra DMA mode 1 is selected 0 Ultra DMA mode 1 is not selected Bit 8 1 Ultra DMA mode 0 is selected 0 Ultra DMA mode 0 is not selected Bits 7 6 Reserved Bit 5 1 Ultra DMA mode 5 and below are supported Bits 0 4 Shall be set to 1 Bit 4 1 Ultra DMA mode 4 and below are supported Bits 0 3 Shall be set to 1 Bit 3 1 Ultra DMA mode 3 and below are supported Bits 0 2 Shall be set to 1 Bit 2 1 Ultra DMA mode 2 and below are supported Bits 0 1 Shall be set to 1 Bit 1 1 Ultra DMA mode 1 and below are supported Bit 0 Shall be set to 1 Bit 0 1 Ultra DMA mode 0 is supported gt Word 89 Time required for Security erase unit completion Word 89 specifies the time required for the Security Erase Unit command to complete This command shall be supported on CompactFlash
45. ce starts to drive IORDY low before tA but causes IORDY to be asserted before tA No wait generated 4 3 Device drives IORDY low before tA wait generated The cycle completes after IORDY is reasserted For cycles where a wait is generated and IORD is asserted the device shall place read data on D15 D00 for tRD before causing IORDY to be asserted Transcend Information Inc 27 V1 0 TS4G 32GCF150 150X CompactFlash Card B TruelDE Multiword DMA Mode Read Write Timing Specification The timing diagram for True IDE DMA mode of operation in this section is drawn using the conventions in the ATA 4 specification Signals are shown with their asserted state as high regardless of whether the signal is actually negative or positive true Consequently the IORD the IOWR and the IOCS16 signals are shown in the diagram inverted from their electrical states on the bus Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 uw om ns ns E te IORD data access max data access IORD data access max 480 iocus IE To pewewassuee 5 Ls pem x 9 8 t amp DMACK to IORD IOWR setup min o8 oe 3j Leorome owes 78 5 ps 1 Ce pese 8 ew fm 138 L3 Lu on nega wn m ae w x x s Cs pestis 39 8 58 Ci meom e e 9 CS 1 0 valid to IORD IOWR B EA EXIIT L9 ss 20 25 25 25 25 CS0 CS1 DMARQ See Note 1 DMACK See Note 2
46. cipient to sender interlocks i e one agent either sender or recipient is waiting for the other agent to respond with a signal before proceeding tUI is an unlimited interlock that has no maximum time value tMLI is a limited time out that has a defined minimum tLI is a limited time out that has a defined maximum 2 80 conductor cabling shall be required in order to meet setup tDS tCS and hold tDH tCH times in modes greater than 2 3 Timing for tDVS tDVH tCVS and tCVH shall be met for lumped capacitive loads of 15 and 40 pF at the connector where the Data and STROBE signals have the same capacitive load value Due to reflections on the cable these timing measurements are not valid in a normally functioning system 4 For all modes the parameter tZIORDY may be greater than tENV due to the fact that the host has a pull up on IORDY giving it a known state when released 5 The parameters tDS and tDH for mode 5 are defined for a recipient at the end of the cable only in a configuration with a single device located at the end of the cable This could result in the minimum values for 5 and tDH for mode 5 at the middle connector being 3 0 and 3 9 ns respectively tosic tDHIC tDVHIC UDMA Mode 0 UDMA Mode 1 UDMA Mode 2 UDMA Mode 3 UDMA Mode4 UDMA Mode 5 we pue pw T De 15 Pas _ a Peo T Recipient IC data setup time from data valid until STROBE edge see note 2 Recipient IC data hold time from STROBE
47. connector to include the effect of series termination 4 A device shall have less than 64 u A of leakage current into a 6 2 KO pull down resistor while the INTRQ signal is in the released state W Signal Interface Electrical specifications shall be maintained to ensure data reliability Additional requirements are necessary for Advanced Timing Modes and Ultra DMA modes operations See next sections for additional information Transcend Information Inc 14 V1 0 TS4G 32GCF150 150X CompactFlash Card Item Signal Card Host p Pull up to Vcc 500 KOZ 50 and Control Signal REG shall be sufficient to keep inputs inactive IORD when the pins are not connected at the IOWR host OE d cs 1 2 WE Pull up to Vec 500 KO 2 R2 5 RESET Pul upto Vec 500 KO 2 50 READY Status Signal WAIT Pull up to Vee R 10 KO 2 WP In PCMCIA PC Card modes Pull up to Vcc 10KQ In True IDE mode if DMA operation is supported by the host Pull down to Gnd R 2 5 6KO INPACK PC Card True IDE hosts switch the pull up to pull down in True IDE mode if DMA operation is supported The PC Card mode Pull up may be left active during True IDE mode if True IDE DMA operation is not supported A 10 00 Address CSEL Data Bus D 15 00 Card Detect CD 2 1 Connected to GND in the card Voltage Sense Ho Pull up to 10 KO R lt 100 Battery Detect BVD 2 1 Pull up
48. ctFlash Card m Configuration Option Register Base 00h in Attribute Memory The Configuration Option Register is used to configure the cards interface address decoding and interrupt and to issue a soft reset to the CompactFlash Storage Card or CF Card Operation D7 D6 DS D4 D3 D2 D1 DO RW Configuration Option Register SRESET Soft Reset setting this bit to one 1 waiting the minimum reset width time and returning to zero 0 places the CompactFlash Storage Card or CF Card in the Reset state Setting this bit to one 1 is equivalent to assertion of the RESET signal except that the SRESET bit is not cleared Returning this bit to zero 0 leaves the CompactFlash Storage Card or CF Card in the same un configured Reset state as following power up and hardware reset This bit is set to zero 0 by power up and hardware reset For CompactFlash Storage Cards using the PCMCIA Soft Reset is considered a hard Reset by the ATA Commands Contrast with Soft Reset in the Device Control Register LeviREQ this bit is set to one 1 when Level Mode Interrupt is selected and zero 0 when Pulse Mode is selected Set to zero 0 by Reset Conf5 Conf0 Configuration Index set to zero 0 by reset It is used to select operation mode of the CompactFlash Storage Card or CF Card as shown below Note Conf5 and Conf4 are reserved for CompactFlash Storage cards and shall be written as zero 0 These bits are vendor defined for CF Cards
49. d command 3 The UDMA interpretation of this signal is valid only during an Ultra DMA data burst during a DMA Write command 4 The HSTROBE and DSTROBE signals are active on both the rising and the falling edge 5 Address lines 03 through 10 are not used in True IDE mode Several signal lines are redefined to provide different functions during an Ultra DMA data burst These lines assume their UDMA definitions when 1 an Ultra DMA mode is selected and 2 ahostissues a READ DMA or a WRITE DMA command requiring data transfer and 3 the device asserts DMARQ and 4 the hostasserts DMACK These signal lines revert back to the definitions used for non Ultra DMA transfers upon the negation of DMACK by the host at the termination of an Ultra DMA data burst With the Ultra DMA protocol the STROBE signal that latches data from D 15 00 is generated by the same agent either host or device that drives the data onto the bus Ownership of D 15 00 and this data strobe signal are given either to the device during an Ultra DMA data in burst or to the host for an Ultra DMA data out burst During an Ultra DMA data burst a sender shall always drive data onto the bus and after a sufficient time to allow for propagation delay cable settling and setup time the sender shall generate a STROBE edge to latch the data Both edges of STROBE are used for data transfers so that the frequency of STROBE is limited to the same frequency as the data Words in
50. d hold time at sender from DMACK negation until CRC may become invalid 3 tzrs Time from STROBE output released to driving until the first transition of critical timing tozFs Time from data output released to driving until the first transition of critical timing First STROBE time for device to first negate DSTROBE from STOP during a data in burst Limited interlock time Interlock time with minimum t t t t 1 rou oR rome ene ree Minimum delay time required for output drivers to assert or negate from released Envelope time from DMACK to STOP and HDMARDY during data in burst initiation and from DMACK to STOP during data out burst initiation FS LI UI Z ZAH ZAD t tENV tRFS Ready to final STROBE time no STROBE edges shall be sent this long after negation of DMARDY tRP Ready to pause time that recipient shall wait to pause after negating DMARDY tioRDYZ Maximum time before releasing IORDY tzioRDY Minimum time before driving IORDY 4 6 tACK Setup and hold times for DMACK before assertion or negation S Time from STROBE edge to negation of DMARQ or assertion of STOP when sender terminates a burst ts Transcend Information Inc 32 V1 0 TS4G 32GCF150 150X CompactFlash Card Notes 1 The parameters tUI tMLI Ultra DMA Data In Burst Device Termination Timing and Ultra DMA Data In Burst Host Termination Timing and tLl indicate sender to recipient or re
51. data transfers while utilizing IORDY flow control If this field is supported Bit 1 of word 53 shall be set to one Any CompactFlash Storage Card that supports PIO mode 3 or above shall support this field and the value in word 68 shall be the fastest defined PIO mode supported by the CompactFlash Storage Card If bit 1 of word 53 is set to one because a CompactFlash Storage Card supports a field in words 64 70 other than this field and the CompactFlash Storage Card does not support this field the CompactFlash Storage Card shall return a value of zero in this field gt Words 82 84 Features command sets supported Words 82 83 and 84 shall indicate features command sets supported The value 0000h or FFFFh was placed in each of these words by CompactFlash Storage Cards prior to ATA 3 and shall be interpreted by the host as meaning that features command sets supported are not indicated Bits 1 through 13 of word 83 and bits 0 through 13 of word 84 are reserved Bit 14 of word 83 and word 84 shall be set to one and bit 15 of word 83 and word 84 shall be cleared to zero to provide indication that the features command sets supported words are valid The values in these words should not be depended on by host implementers Bit 0 of word 82 shall be set to zero the SMART feature set is not supported If bit 1 of word 82 is set to one the Security Mode feature set is supported Bit 2 of word 82 shall be set to zero the Removable Media feature set is not s
52. dd byte of the word CE1 accesses the even byte or the Odd byte of the Card Enable word depending on AO and CE2 A multiplexing scheme based on CE2 allows 8 bit hosts to access all data on DO D7 See Table 27 Table 29 Table 31 Table 35 Table 36 and Table 37 CE1 CE2 This signal is the same as the PC Card Memory Mode signal PC Card I O Mode Card Enable CS0 CS1 In the True IDE Mode CS0 is the address range select for the task file True IDE Mode registers while CS1 is used to select the Alternate Status Register and the Device Control Register While DMACK is asserted CS0 and CS1 shall be held negated and the width of the transfers shall be 16 bits CSEL l 39 This signal is not used for this mode but should be connected by the host to PC PC Card Memory Mode Card A25 or grounded by the host CSEL This signal is not used for this mode but should be connected by the host to PC PC Card I O Mode Card A25 or grounded by the host CSEL This internally pulled up signal is used to configure this device as a Master or a True IDE Mode Slave when configured in the True IDE Mode When this pin is grounded this device is configured as a Master When the pin is open this device is configured as a Slave D15 D00 31 30 29 28 These lines carry the Data Commands and Status information between the host PC Card Memory Mode and the controller DOO is the LSB of the Even Byte of the Word D08 is the LSB 23 22
53. defined advanced timing modes using the True IDE interface Notice The use of True IDE PIO Modes 5 and above or of Multiword DMA Modes 3 and above impose significant restrictions on the implementation of the host Additional Requirements for CF Advanced Timing Modes There are four separate fields defined that describe support and selection of Advanced PIO timing modes and Advanced Multiword DMA timing modes The older modes are reported in words 63 and 64 Word 63 Multiword DMA transfer and 6 2 1 6 19 Word 64 Advanced PIO transfer modes supported Bits 2 0 Advanced True IDE PIO Mode Support Indicates the maximum True IDE PIO mode supported by the card Value Maximum PIO mode timing selected 0 Specified in word 64 1 PIO Mode 5 2 PIO Mode 6 3 7 Reserved Bits 5 3 Advanced True IDE Multiword DMA Mode Support Indicates the maximum True IDE Multiword DMA mode supported by the card Value Maximum Multiword DMA timing mode supported 0 Specified in word 63 1 Multiword DMA Mode 3 2 Multiword DMA Mode 4 3 7 Reserved Transcend Information Inc 68 V1 0 TS4G 32GCF150 150X CompactFlash Card Bits 8 6 Advanced True IDE PIO Mode Selected Indicates the current True IDE PIO mode selected on the card Value Current PIO timing mode selected 0 Specified in word 64 1 PIO Mode 5 2 PIO Mode 6 3 7 Reserved Bits 11 9 Advanced True IDE Multiword DMA Mode Select
54. e CompactFlash Storage Card If LBA 1 then the number of sectors to format is taken from the Sec Cnt register 02256 The use of this command is not recommended Bit Command 7 Command 7 Cyl High 5 Cylinder High m 23 16 Transcend Information Inc 59 V1 0 TS4G 32GCF150 150X CompactFlash Card m identify Device Ech Bit Lemmwm Ex ewe x x x foe x Cyl High 5 wnmm X wmm X The Identify Device command enables the host to receive parameter information from the CompactFlash Storage Card This command has the same protocol as the Read Sector s command The parameter words in the buffer have the arrangement and meanings defined in Table as below All reserved bits or words are zero Hosts should not depend on Obsolete words in Identify Device containing 0 Table 47 specifies each field in the data returned by the Identify Device Command In Table as below X indicates a numeric nibble value specific to the card and aaaa indicates an ASCII string specific to the particular drive Hun Data Field Type Information x 848Ah 2 General configuration signature for the CompactFlash 0 lash Storage Card 0XXX 2 General configuration Bit Significant with ATA 4 definitions 1 XXXXh 2 Default number of cylinders 2 00
55. e completion of the reset initialization sequence I O Operation When the CompactFlash Storage Card is configured for I O Operation Pin 24 is used for the I O Selected is 16 Bit Port IOIS16 function A Low signal indicates that a 16 bit or odd byte only operation can be performed at the addressed port In True IDE Mode this output signal is asserted low when this device is expecting a word data transfer cycle Transcend Information Inc 11 V1 0 TS4G 32GCF150 150X CompactFlash Card Electrical Specification The following tables indicate all D C Characteristics for the CompactFlash Storage Card Unless otherwise stated conditions are Vcc 5V 10 Vcc 3 3V 596 B Absolute Maximum Conditions Symbol conamons Input Power 0 3V min to 6 5V max Voltage on any pin except Vcc with respect to GND 0 5V min fo Vcc 0 5V max m DC Characteristics CompactFlash Interface I O at 5 0V Parameter Symbol Min Max Unit Remark Supply Voltage Vec 4 5 5 5 V High level output voltage Von Vcc 0 8 V Low level output voltage VoL 0 8 V i 4 0 V Non schmitt trigger High level input voltage Vin 2 92 V Schmitt trigger 0 8 V Non schmitt trigger Low level input voltage Vit 1 70 V Schmitt trigger Pull up resistance 50 73 KOhm Pull down resistance Rpp 50 97 KOhm CompactFlash Interface I O at 3 3V Parameter
56. e less than the value in word 65 This field shall be supported by all CompactFlash Storage Cards supporting DMA modes 1 and above If bit 1 of word 53 is set to one but this field is not supported the Card shall return a value of zero in this field gt Word 67 Minimum PIO transfer cycle time without flow control Word 67 of the parameter information of the Identify Device command is defined as the minimum PIO transfer without flow control cycle time This field defines in nanoseconds the minimum cycle time that if used by the host the CompactFlash Storage Card guarantees data integrity during the transfer without utilization of flow control If this field is supported Bit 1 of word 53 shall be set to one Any CompactFlash Storage Card that supports PIO mode 3 or above shall support this field and the value in word 67 shall not be less than the value reported in word 68 If bit 1 of word 53 is set to one because a CompactFlash Storage Card supports a field in words 64 70 other than this field and the CompactFlash Storage Card does not support this field the CompactFlash Storage Card shall return a value of zero in this field gt Word 68 Minimum PIO transfer cycle time with IORDY Word 68 of the parameter information of the Identify Device command is defined as the minimum PIO transfer with IORDY flow control cycle time This field defines in nanoseconds the minimum cycle time that the CompactFlash Storage Card supports while performing
57. ease interrupt is not enabled Bit 8 of word 85 shall be set to zero Service interrupt is not enabled Bit 9 of word 85 shall be set to zero the Device Reset command is not supported Bit 10 of word 85 shall be set to zero the Host Protected Area feature set is not supported Bit 11 of word 85 is obsolete Bit 12 of word 85 shall be set to one the CompactFlash Storage Card supports the Write Buffer command Bit 13 of word 85 shall be set to one the CompactFlash Storage Card supports the Read Buffer command Bit 14 of word 85 shall be set to one the CompactFlash Storage Card supports the NOP command Bit 15 of word 85 is obsolete Bit O of word 86 shall be set to zero the CompactFlash Storage Card does not support the Download Microcode command Bit 1 of word 86 shall be set to zero the CompactFlash Storage Card does not support the Read DMA Queued and Write DMA Queued commands If bit 2 of word 86 shall be set to one the CompactFlash Storage Card supports the CFA feature set If bit 3 of word 86 is set to one the Advanced Power Management feature set has been enabled via the Set Features command Bit 4 of word 86 shall be set to zero the CompactFlash Storage Card does not support the Removable Media Status feature set gt Word 88 Ultra DMA Modes Supported and Selected Word 88 identifies the Ultra DMA transfer modes supported by the device and indicates the mode that is currently selected Only one DMA mode shall be selected
58. ecessarily detectable in the input current leakage test 10 Host and card restrictions for CF Advanced Timing Modes and Ultra DMA modes Additional Requirements for CF Advanced Timing Modes and Ultra DMA Electrical Requirements for additional required limitations on the implementation of CF Advanced Timing modes and Ultra DMA modes respectively m Additional Requirements for CF Advanced Timing Modes The CF Advanced Timing modes include PC Card and Memory modes that are 100ns or faster PC Card Ultra DMA modes 3 or above and True IDE PIO Modes 5 6 Multiword DMA Modes 3 4 and True IDE Ultra DMA modes 3 or above When operating in CF Advanced timing modes the host shall conform to the following requirements 1 Only one CF device shall be attached to the CF Bus 2 The host shall not present a load of more than 40pF to the device for all signals including any cabling 3 The maximum cable length is 0 15 m 6 in The cable length is measured from the card connector to the host controller 0 46 m 18 in cables are not supported 4 The WAIT and IORDY signals shall be ignored by the host Transcend Information Inc 16 V1 0 TS4G 32GCF150 150X CompactFlash Card Devices supporting CF Advanced timing modes shall also support slower timing modes to ensure operability with systems that do not support CF Advanced timing modes Transcend Information Inc 17 V1 0 TS4G 32GCF150 Ultra DMA Electrical Requirements Hostand Card
59. ed Indicates the current True IDE Multiword DMA Mode Selected on the card Value Current Multiword DMA timing mode selected 0 Specified in word 63 1 Multiword DMA Mode 3 2 Multiword DMA Mode 4 3 7 Reserved Bits 15 12 are reserved gt Word 164 CF Advanced PCMCIA I O and Memory Timing Modes Capabilities and Settings This word describes the capabilities and current settings for CFA defined advanced timing modes using the Memory and PCMCIA I O interface Notice The use of PCMCIA I O or Memory modes that are 100ns or faster impose significant restrictions on the implementation of the host Additional Requirements for CF Advanced Timing Modes Bits 2 0 Maximum Advanced PCMCIA I O Mode Support Indicates the maximum I O timing mode supported by the card Value Maximum PCMCIA IO timing mode Supported 0 255ns Cycle PCMCIA Mode 1 120ns Cycle PCMCIA I O Mode 2 100ns Cycle PCMCIA I O Mode 3 80ns Cycle PCMCIA Mode 4 7 Reserved Bits 5 3 Maximum Memory timing mode supported Indicates the Maximum Memory timing mode supported by the card Value Maximum Memory timing mode Supported 0 250ns Cycle Memory Mode 1 120ns Cycle Memory Mode 2 100ns Cycle Memory Mode 3 80ns Cycle Memory Mode 4 7 Reserved Transcend Information Inc 69 V1 0 TS4G 32GCF150 150X CompactFlash Card Bits 8 6 Maximum PC Card I O UDMA timing mode supported Indicates the Max
60. edge until data may become invalid see note 2 Sender IC data valid setup time from data valid until STROBE edge see note 3 Sender IC data valid hold time from STROBE edge until data may become invalid see note 3 Notes 1 All timing measurement switching points low to high and high to low shall be taken at 1 5 V 2 The correct data value shall be captured by the recipient given input data with a slew rate of 0 4 Vins rising and falling and the input STROBE with a slew rate of 0 4 V ns rising and falling at tDSIC and tDHIC timing as measured through 1 5 V 2 The parameters tDVSIC and tDVHIC shall be met for lumped capacitive loads of 15 and 40 pF at the IC where all signals have the same capacitive load value Noise that may couple onto the output signals from external sources has not been included in these values Transcend Information Inc 33 V1 0 TS4G 32GCF150 150X CompactFlash Card Name Comment Min Max V ns V ns Rising Edge Slew Rate for any signal 5 19 Falling Edge Slew Rate for any signal o 1228 fa Note 1 The sender shall be tested while driving an 18 inch long 80 conductor cable with PVC insulation material The signal under test shall be cut at a test point so that it has not trace cable or recipient loading after the test point All other signals should remain connected through to the recipient The test point may be located at any point between the sender s series termination resistor and
61. es this output signal may be used as True IDE Mode Except Ultra IORDY DMA Protocol Active DDMARDY In all modes when Ultra DMA mode DMA Write is active this signal is asserted All Modes Ultra DMA Write by the device during a data burst to indicate that the device is ready to receive Protocol Active Ultra DMA data out bursts The device may negate DDMARDY to pause an Ultra DMA transfer DSTROBE In all modes when Ultra DMA mode DMA Read is active this signal is the data in All Modes Ultra DMA Read strobe generated by the device Both the rising and falling edge of DSTROBE Protocol Active cause data to be latched by the host The device may stop generating DSTROBE edges to pause an Ultra DMA data in burst WE 36 This is a signal driven by the host and used for strobing memory write data to the PC Card Memory Mode registers of the CompactFlash Storage Card when the card is configured in the memory interface mode It is also used for writing the configuration registers WE In PC Card Mode this signal is used for writing the configuration registers PC Card I O Mode WE In True IDE Mode this input signal is not used and should be connected to VCC True IDE Mode by the host WP 24 Memory Mode The CompactFlash Storage Card does not have a write protect PC Card Memory Mode Write Protect 516 PC Card Mode JOCS16 True IDE Mode Switch This signal is held low after th
62. es that CompactFlash Storage Card supports security mode feature set If set to 0 indicates that CompactFlash Storage Card does not support security mode feature set Transcend Information Inc 67 V1 0 TS4G 32GCF150 150X CompactFlash Card gt Word 160 Power Requirement Description This word is required for CompactFlash Storage Cards that support power mode 1 Bit 15 VLD If set to 1 indicates that this word contains a valid power requirement description If set to 0 indicates that this word does not contain a power requirement description Bit 14 RSV This bit is reserved and shall be 0 Bit 13 XP If set to 1 indicates that the CompactFlash Storage Card does not have Power Level 1 commands If set to 0 indicates that the CompactFlash Storage Card has Power Level 1 commands Bit 12 XE If set to 1 indicates that Power Level 1 commands are disabled If set to 0 indicates that Power Level 1 commands are enabled Bit 0 11 Maximum current This field contains the CompactFlash Storage Card s maximum current in mA gt Word 162 Key Management Schemes Supported Bit 0 CPRM support If set to 1 the device supports CPRM Scheme Content Protection for Recordable Media If set to 0 the device does not support CPRM Bits 1 15 are reserved for future additional Key Management schemes gt Word 163 CF Advanced True IDE Timing Mode Capabilities and Settings This word describes the capabilities and current settings for CFA
63. g I O Cycles when the I O address is on PC Card I O Mode Except Ultra the Bus DMA Protocol Active In PC Card I O Mode when Ultra DMA Protocol is supported by the host and the host has enabled Ultra DMA protocol on the card the host shall keep the REG signal asserted during the execution of any DMA Command by the device DMACK This is a DMA Acknowledge signal that is asserted by the host in response to PC Card Memory Mode when DMARQ to initiate DMA transfers Ultra DMA Protocol Active In True IDE Mode while DMA operations are not active the card shall ignore the DMACK DMACK signal including a floating condition PC Card I O Mode when Ultra DMA Protocol Active If DMA operation is not supported by a True IDE Mode only host this signal DMACK should be driven high or connected to VCC by the host True IDE Mode A host that does not support DMA mode and implements both PC Card and True IDE modes of operation need not alter the PC Card mode connections while in True IDE mode as long as this does not prevent proper operation all modes RESET 41 The CompactFlash Storage Card is Reset when the RESET pin is high with the PC Card Memory Mode following important exception The host may leave the RESET pin open or keep it continually high from the application of power without causing a continuous Reset of the card Under either of these conditions the card shall emerge from power up having completed an initial Reset
64. h that preserves the corresponding bits from the 848Ah CF signature value Bit 7 Removable Media Device If Bit 7 is set to 1 the Card contains media that can be removed during Card operation If Bit 7 is set to 0 the Card contains nonremovable media Bit 6 Not Removable Controller and or Device Alert This bit will be considered for obsolescence in a future revision of this standard If Bit 6 is set to 1 the Card is intended to be nonremovable during operation If Bit 6 is set to 0 the Card is intended to be removable during operation Bits 5 0 Retired Reserved Alert Bit 2 will be considered for definition in a future revision of this standard and shall be 0 at this time Bits 5 1 have retired ATA bit definitions Bit 2 shall be 0 Bit 0 is Reserved and shall be 0 It is recommended that the value of bits 5 0 be either the preferred value of 00 or the value of OAh that preserves the corresponding bits from the 848Ah CF signature value gt Word 1 Default Number of Cylinders This field contains the number of translated cylinders in the default translation mode This value will be the same as the number of cylinders gt Word 3 Default Number of Heads This field contains the number of translated heads in the default translation mode gt Word 6 Default Number of Sectors per Track This field contains the number of sectors per track in the default translation mode Transcend Information Inc 62 V1 0 TS4G 32GCF150
65. he current cylinders times heads times sectors Transcend Information Inc 63 V1 0 TS4G 32GCF150 150X CompactFlash Card Multiple Sector Setting Bits 15 9 are reserved and shall be set to O Bit 8 shall be set to 1 indicating that the Multiple Sector Setting is valid Bits 7 0 are the current setting for the number of sectors that shall be transferred per interrupt on Read Write Multiple commands gt Total Sectors Addressable in Mode This field contains the total number of user addressable sectors for the CompactFlash Storage Card in LBA mode only gt Multiword DMA transfer Bits 15 through 8 of word 63 of the Identify Device parameter information is defined as the Multiword DMA mode selected field If this field is supported bit 1 of word 53 shall be setto one This field is bit significant Only one of bits may be set to one in this field by the CompactFlash Storage Card to indicate the multiword DMA mode which is currently selected Of these bits bits 15 through 11 are reserved Bit 8 if set to one indicates that Multiword DMA mode 0 has been selected Bit 9 if set to one indicates that Multiword DMA mode 1 has been selected Bit 10 if set to one indicates that Multiword DMA mode 2 has been selected Selection of Multiword DMA modes 3 and above are specific to CompactFlash are reported in word 163 Word 163 CF Advanced True IDE Timing Mode Capabilities and Settings Bits 7 through 0 of word 63 of the Identify Device
66. imum PC Card UDMA timing mode supported by the card when bit 15 is set Maximum PC Card UDMA timing mode Supported PC Card I O UDMA mode 0 supported 6 jResmved Bits 11 9 Maximum PC Card Memory UDMA timing mode supported Indicates the Maximum PC Card Memory UDMA timing mode supported by the card when bit 15 is set 7 Reseved S Bits 14 12 PC Card Memory or I O UDMA timing mode selectedIndicates the PC Card Memory or I O UDMA timing mode selected by the card 2 PCCard OUDMA mode2selected 4 PC Card I O UDMA mode4selected 2 PC Card I O UDMA mode 3 selected 4 6 Bit 15 PC Card Memory and IO Modes Supported This bit when set indicates that the PC Card UDMA support values in bits 11 6 are valid When this bit is cleared PC Card Memory and IO Modes are not supported by the device Transcend Information Inc 70 V1 0 TS4G 32GCF150 m Idle 97h or E3h This command causes the CompactFlash Storage Card to set BSY enter the Idle mode clear BSY and generate an interrupt If the sector count is non zero it is interpreted as a timer count with each count being 5 milliseconds and the automatic power down mode is enabled If the sector count is zero the automatic power down mode is disabled Note that this time base 5 msec is different from the ATA specification 150X CompactFlash Card Bit gt 7 6 5 4 3
67. ing at the same addresses as the CompactFlash Storage Card Following are some possible solutions to this problem for the PCMCIA implementation 1 Locate the CompactFlash Storage Card at a non conflicting address i e Secondary address 377 or in an independently decoded Address Space when a Floppy Disk Controller is located at the Primary addresses 2 Donotinstall a Floppy and a CompactFlash Storage Card in the system at the same time 3 Implement a socket adapter that can be programmed to conditionally tri state D7 of I O address 3F7h 377h when a CompactFlash Storage Card is installed and conversely to tristate D6 DO of address 3F7h 377h when a floppy controller is installed 4 Donotuse the CompactFlash Storage Card s Drive Address register This may be accomplished by either a If possible program the host adapter to enable only I O addresses 1FOh 1F7h 3F6h or 170h 177h 176h to the CompactFlash Storage Card or b if provided use an additional Primary Secondary configuration in the CompactFlash Storage Card which does not respond to accesses to I O locations 3F7h and 377h With either of these implementations the host software shall not attempt to use information in the Drive Address Register Bit 6 this bit is 0 when a write operation is in progress otherwise it is 1 Bit 5 HS3 this bit is the negation of bit 3 in the Drive Head register Bit 4 HS2 this bit is the negation of bit 2 in the Drive Head register
68. ion This bit shall be set to zero 0 by the software when the register is written Obsolete Drive this bit is obsolete and should be written as 0 If the obsolete functionality is not supported it shall be read as written or shall be read as 0 If the obsolete functionality is supported the bit shall be read as written If supported this bit sets the drive number which the card matches with the DRV bit of the Drive Head register when configured in a twin card configuration It is recommended that the host always write 0 for the drive number in this register and in the DRV bit of the Drive Head register for PCMCIA modes of operation X the socket number is ignored by the CompactFlash Storage Card Transcend Information Inc 41 V1 0 TS4G 32GCF150 150X CompactFlash Card Transfer Function The I O transfer to or from the CompactFlash Storage can be either 8 or 16 bits When a 16 bit accessible port is addressed the signal IOIS16 is asserted by the CompactFlash Storage Otherwise the IOIS16 signal is de asserted When a 16 bit transfer is attempted and the IOIS16 signal is not asserted by the CompactFlash Storage the system shall generate a pair of 8 bit references to access the word s even byte and odd byte The CompactFlash Storage Card permits both 8 and 16 bit accesses to all of its I O addresses So IOIS16 is asserted for all addresses to which the CompactFlash Storage responds The CompactFlash Storage Card ma
69. itch When written this bit acts as a mask for writing the corresponding bit CWProt MReady this bit acts as a mask for writing the corresponding bit CReady MWProt this bit when written acts as a mask for writing the corresponding bit CWProt Pin Replacement Changed Bit Mask Bit Values Initial Value Written by Host Final Comments of C Status 6 ox o Unchanged o1 x 0 j 1 Ee Unchanged Ox o 1 o CeardbyHos ooox t 1 SebyHos Transcend Information Inc 40 V1 0 TS4G 32GCF150 150X CompactFlash Card m Socket and Copy Register Base 06h in Attribute Memory This register contains additional configuration information This register is always written by the system before writing the card s Configuration Index Register This register is not required for CF or CF Cards If present it is optional for a CF Card to allow setting bit D4 Drive number to 1 If two drives are supported it is intended for use only when two cards are co located at either the primary or secondary addresses in PCMCIA I O mode The availability and capabilities of this register are described in the Card Information Structure of the CF Card Hosts shall not depend on the availability of this functionality Operation Read Reserved Obsolete Drive Write Obsolete Drive Socket and Copy Register Reserved this bit is reserved for future standardizat
70. kward compatibility 81h 82h Disable Extended Power operations Alert It has been proposed to remove this feature from a future revision of the specification Please notify the CFA if you ve a requirement for this feature NOP Accepted for backward compatibility Accepted for backward compatibility Use of this Feature is not recommended Set the host current source capability Allows tradeoff between current drawn and read write speed Enable Read Look Ahead 4 bytes of data apply on Read Write Long commands Enable Power on Reset POR establishment of defaults at Soft Reset 97h BBh lul have 8A Disable Power Level 1 commands Features 01h and 81h are used to enable and clear 8 bit data transfer modes in True IDE Mode If the O1h feature command is issued all data transfers shall occur on the low order D 7 0 data bus and the IOIS16 signal shall not be asserted for data register accesses The host shall not enable this feature for DMA transfers Features 02h and 82h allow the host to enable or disable write cache in CompactFlash Storage Cards that implement write cache When the subcommand disable write cache is issued the CompactFlash Storage Card Transcend Information Inc 75 V1 0 TS4G 32GCF150 150X CompactFlash Card shall initiate the sequence to flush cache to non volatile memory before command completion Feature 03h allows the host to select the PIO or Multiword DMA transfer mode by specifyi
71. lash Card DMARQ Receiver Table Ultra DMA Termination with Pull up or Pull down Example gt Printed Circuit Board PCB Trace Requirements for Ultra DMA On any PCB for a host or device supporting Ultra DMA Y Thelongest D 15 00 trace shall be no more than 0 5 longer than either STROBE trace as measured from the IC pin to the connector Y The shortest D 15 00 trace shall be no more than 0 5 shorter than either STROBE trace as measured from the IC pin to the connector Ultra DMA Mode Cabling Requirement Y Operation in Ultra DMA mode requires a crosstalk suppressing cable The cable shall have a grounded line between each signal line V For True IDE mode operation using a cable with IDE ATA type 40 pin connectors it is recommended that the host sense the cable type using the method described in the ANSI INCITS 361 2002 AT Attachment 6 standard to prevent use of Ultra DMA with a 40 conductor cable Transcend Information Inc 19 V1 0 TS4G 32GCF150 150X CompactFlash Card E Attribute Memory Read Timing Specification Attribute Memory access time is defined as 300 ns Detailed timing specs are shown in Table below Speed Version 300 ns Item Symbol IEEE Symbol Min ns Max ns Read Cycle Time tc R tAVAV 300 Address Access Time ta A tAVQV 300 Card Enable Access Time ta CE tELQV 300 Output Enable Access Time ta OE tGLQV 150 Output Disable Time from CE tdis
72. lock Address mode Bit 0 HS0 when operating in the Cylinder Head Sector mode this is bit 0 of the head number It is Bit 24 in the Logical Block Address mode Status amp Alternate Status Registers Address 1F7h 177h amp 3F6h 376h Offsets 7 amp Eh These registers return the CompactFlash Storage Card status when read by the host Reading the Status register does clear a pending interrupt while reading the Auxiliary Status register does not The status bits are described as follows D7 D6 D5 D4 D3 D2 D1 DO Busy DWr psc ora CORR o ERR Bit 7 BUSY the busy bit is set when the CompactFlash Storage Card has access to the command buffer and registers and the host is locked out from accessing the command register and buffer No other bits in this register are valid when this bit is set to a 1 During the data transfer of DMA commands the Card shall not assert DMARQ unless either the BUSY bit the DRQ bit or both are set to one Bit 6 RDY RDY indicates whether the device is capable of performing CompactFlash Storage Card operations This bit is cleared at power up and remains cleared until the CompactFlash Storage Card is ready to accept a command Bit 5 DWF This bit if set indicates a write fault has occurred Bit 4 DSC This bit is set when the CompactFlash Storage Card is ready Bit 3 DRQ The Data Request is set when the CompactFlash Storage Card requires that information be transferred either
73. ltage to drivers 4 3 3 8 3 396 896 Volts Low to high input threshold V 1 5 2 0 Volts High to low input threshold V 1 0 1 5 Volts Difference between input thresholds V 320 Volts V current value V current value iii Average of thresholds V current value V current value 2 ta id VOUS B Output Drive Type Output Type Valid Conditions Totempole loh amp loi Tri State N P Channel loh amp lol om Peramea ony On ow Nchmeony E Transcend Information Inc 13 V1 0 TS4G 32GCF150 150X CompactFlash Card E Output Drive Characteristics for UDMA mode gt 4 In UDMA modes greater than 4 the characteristics specified in the following table apply Voltage output high and low values shall be met at the source connector to include the effect of series termination Table Output Drive Characteristics UDMA Mode gt 4 Parameter Symbol MIN MAX Units DC supply voltage to drivers Vops 3 3 8 3 3 8 Volts Voltage output high at 6 mA to 3 mA at VoH2 the output shall be 7 able to supply and sink current toVDD3 vae J Voor Nal Vase Volis Voltage output low at 6 mA Voi2 0 51 Volts Notes 1 lo pase shall be 12 mA minimum to meet legacy timing and signal integrity 2 lon value at 400 u A is insufficient in the case of DMARQ that is pulled low by a 5 6 resistor 3 Voltage output high and low values shall be met at the source
74. match the device reports an error in the error register If an error occurs during one or more Ultra DMA data bursts for any one command the device shall report the first error that occurred If the device detects that a CRC error has occurred before data transfer for the command is complete the device may complete the transfer and report the error or abort the command and report the error NOTE lf a data transfer is terminated before completion the assertion of INTRQ should be passed through to the host software driver regardless of whether all data requested by the command has been transferred Transcend Information Inc 30 V1 0 TS4G 32GCF150 150X CompactFlash Card Measure location see Note 2 Sender tcvc Note 3 Sender Sender sjo A ol N olo o jo j o A 6 w A o A co Device Device Host o N N w A o 0 o o e o o e N o o I o o o o o o zx nN N N N mico I z I 5 o2 o N N o D 9 1 e N N N T N T N eo N o a N o a o eo o N o Sender co Recipient o N o N eo N eo N o nN eo eo N o eo eo eo Notes 1 All timing measurement switching points low to high and high to low shall be taken
75. me per word In PC Card modes this value 66 XXXXh 2 AME DMA transfer cycle time In PC Card modes this 67 XXXXh 2 Minimum transfer cycle time without flow control 68 XXXXh 2 Minimum transfer cycle time with IORDY flow control 69 79 0000h 20 Reserved 80 81 0000h 4 Reserved CF cards do not return an ATA version 82 84 XXXXh 6 Features command sets supported 85 87 XXXXh 6 Features command sets enabled 88 XXXXh 2 Ultra DMA Mode Supported and Selected 89 XXXXh 2 Time required for Security erase unit completion 90 XXXXh 2 Time required for Enhanced security erase unit completion 91 XXXXh 2 Current Advanced power management value 92 127 0000h 72 Reserved 128 XXXXh 2 Security status 129 159 0000h 64 Vendor unique bytes 160 XXXXh 2 Power requirement description 161 0000h 2 Reserved for assignment by the CFA 162 0000h 2 Key management schemes supported 163 XXXXh 2 CF Advanced True IDE Timing Mode Capability and Setting 164 XXXXh 2 CF Advanced PC Card and Memory Timing Mode Capability 165 167 0000h 6 Reserved for assignment by the CFA 168 255 0000h 158 Reserved Transcend Information Inc 61 V1 0 TS4G 32GCF150 150X CompactFlash Card gt Word 0 General Configuration This field indicates the general characteristics of the device When Word 0 of the Identify drive information is 848Ah then the device is a CompactFlash Storage Card and complies with the CFA specification and CFA command set It is recommended that PCM
76. mmon Memory Read Timing Specification Cycle Time Mode 250ns 120ns o em wwe wm foo fw 9 mm em amens ow ome 8 uses uen ex to e LL umm me oe P 9 L9 19 messem s eme gt fe fe a worn woes T9 Do Notes 1 WAIT is not supported in this mode E The maximum load on WAIT is 1 LSTTL with 50 pF 40pF below 120nsec Cycle Time total load All times are in nanoseconds Dout signifies data provided by the CompactFlash Storage Card to the system The WAIT signal may be ignored if the OE cycle to cycle time is greater than the Wait Width time The Max Wait Width time can be determined from the Card Information Structure The Wait Width time meets the PCMCIA PC Card specification of 12 5 but is intentionally less in this specification ty th CE tdis OE q p Transcend Information Inc 22 V1 0 TS4G 32GCF150 150X CompactFlash Card Common Memory Write Timing Specification Cycle Time Mode IEEE Symbol Symbol Data Setup before WE tsu D WEH tDVWH Data Hold following WE th D tWMDX WE Pulse Width tw WE tWLWH Address Setup Time tsu A tAVWL CE Setup before WE tELWL Write Recovery Time tWMAX Address Hold Time tGH CE Hold following WE tGHEH Wait Delay Falling from WE tWLWTV WE High from Wait Release tWTHWH Wait Width Timez tw WT tWTLWTH Notes 1
77. ng BurstTermination Y Static Device Acknowledging Host Initiated Burst Termination ES ES Device Aligning STROBE to Asserted efo o o rs s before CRC Transfer YES ES Transcend Information Inc 36 V1 0 TS4G 32GCF150 150X CompactFlash Card Attribute Memory Function Attribute memory is a space where CompactFlash Storage Card identification and configuration information are stored and is limited to 8 bit wide accesses only at even addresses The card configuration registers are also located here For CompactFlash Storage Cards the base address of the Card configuration registers is 200h Table Attribute Memory Function mue omen e pae eo T o Standby Mode Standby Mode Highz Highz HighZ HighZ UDMA Operation see section 4 3 18 Ultra DMA Mode Even Read Write Timing Odd Byte Byte Specification Ber Access CIS ROM Even Write Access CIS 8 bits is Don t Even Invalid Care Byte Read Byte INN Even Configuration CompactFlash High Z Byte Storage 8 bits y Write Byte Access Configuration CompactFlash s cem Storage 8 bits Read Word Access CIS 16 Even Write Word Access CIS 16 ia PI E 3 bits Invalid E 3 Read Word ee Even Configuration CompactFlash Not Valid Byte Storage 16 bits Write Word Access Don t Even Configuration CompactFlash No L L2 L H X H L2 Care Byte Storage 16 bits Transcend Information Inc 37 V1 0 TS4G 32GCF150 150X Compa
78. ng a value in the Sector Count register The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value One PIO mode shall be selected at all times For Cards which support DMA one Multiword DMA mode shall be selected at all times The host may change the selected modes by the Set Features command m Set Multiple Mode C6h amo x jowe x j 1 u x Sec Cnt 2 Sector Count Feature Set Sleep Mode 99h or E6h a sIs13s1IslsIsIs wwmo x omww x EUM m Standby 96h or E2h sf Pe fetes fet te eme ee wmm Cyl Low 4 Sec Cnt 2 Transcend Information Inc 76 V1 0 TS4G 32GCF150 150X CompactFlash Card m Standby Immediate 94h or s ej sj 3 2 jo Command 7 94h or EOh x Cyl High 5 X x see num x x Feature 1 x m Translate Sector 87h 7 6 5 4 3 2 1 Command 7 87h Head LBA 27 24 Cyl High 5 Cylinder High LBA 23 16 Cylinder Low LBA 15 8 Sec Num 3 Sector Number LBA 7 0 Sec Cnt 2 Translate Sector Information ommo Transcend Information Inc 77 V1 0 TS4G 32GCF150 150X CompactFlash Card m Wear Level F5h wes lslslslslsIlsls x x x oe re e a Completion Status Feature O m Write Buffer E8h
79. o KMA 9 o o i ofal ofa o i Transcend Information Inc o ec Table Contiguous Decoding f Select Card Head Select Card Head Status Command Dup Even RD Data Dup Even WR Data Dup Odd RD Data Dup Odd WR Data F Notes E E Cylinder High E EN Alt Status Drive Address Reserved 49 TS4G 32GCF150 150X CompactFlash Card m Memory Mapped Addressing When the CompactFlash Storage Card registers are accessed via memory references the registers appear in the common memory space window 0 2K bytes as follows mes mo aona m pe m o oma oem we ues r fof x e e o e o Eeron oom s e e r e Co pep fofofo sm sm x Ce pep NN s 9 Cr fo 5 9 o 9 e be enr On ou tenis 2 Cr peo 1 o o 1 9 omoro oaa oe owna 2 o fof seres 1 Cope pepe e mem ever orf o fof ppp mm Rem C proc cae even woo 3 C prp Ix H1 s ossoom owe 3 m True IDE Mode Addressing When the CompactFlash Storage Card is configured in the True IDE Mode the I O decoding is as follows Les cso ao omack 4ono 0 Note i a o fe oc oma Ro Data omawroas wm a o fo fo 1 3 emmesser Featres om a o o r o 1 sercom Seco
80. ommand om femweeweEmr sewBMwEm om eceran O sh Controlling Microprocessor Error 6 Slave Error in True IDE Mode Transcend Information Inc 58 02h 03h 04h 05h 8Xh V1 0 TS4G 32GCF150 150X CompactFlash Card m Erase Sector s COh This command is used to pre erase and condition data sectors in advance of a Write without Erase or Write Multiple without Erase command There is no data transfer associated with this command but a Write Fault error status can occur Cyl High 5 Cylinder High m 23 16 m Flush Cache This command causes the card to complete writing data from its cache The card returns status with RDY 1 and DSC 1 after the data in the write cache buffer is written to the media If the Compact Flash Storage Card does not support the Flush Cache command the Compact Flash Storage Card shall return command aborted C Demwen E ewm x ww mwem x Cemmo x y rewem Xx m Format Track 50h This command writes the desired head and oylinder of the selected drive with a vendor unique data pattern typically FFh or 00h To remain host backward compatible the CompactFlash Storage Card expects a sector buffer of data from the host to follow the command with the same protocol as the Write Sector s command although the information in the buffer is not used by th
81. one the CompactFlash Storage Card supports the Advanced Power Management feature set Bit 4 of word 83 shall be set to zero the CompactFlash Storage Card does not support the Removable Media Status feature set gt Words 85 87 Features command sets enabled Words 85 86 and 87 shall indicate features command sets enabled The value 0000h or FFFFh was placed in each of these words by CompactFlash Storage Cards prior to ATA 4 and shall be interpreted by the host as meaning that features command sets enabled are not indicated Bits 1 through 15 of word 86 are reserved Bits 0 13 of word 87 are reserved Bit 14 of word 87 shall be set to one and bit 15 of word 87 shall be cleared to zero to provide indication that the features command sets enabled words are valid The values in these words should not be depended on by host implementers Bit 0 of word 85 shall be set to zero the SMART feature set is not enabled If bit 1 of word 85 is set to one the Security Mode feature set has been enabled via the Security Set Password command Bit 2 of word 85 shall be set to zero the Removable Media feature set is not supported Bit 3 of word 85 shall be set to one the Power Management feature set is supported Bit 4 of word 85 shall be set to zero the Packet Command feature set is not enabled If bit 5 of word 85 is set to one write cache is enabled If bit 6 of word 85 is set to one look ahead is enabled Bit 7 of word 85 shall be set to zero rel
82. one half inch or less of conductor exiting the connector If the test point is on a cable conductor rather than the PCB an adjacent ground conductor shall also be cut within one half inch of the connector The test load and test points should then be soldered directly to the exposed source side connectors The test loads consist of a 15 pF or a 40 pF 596 0 08 inch by 0 05 inch surface mount or smaller size capacitor from the test point to ground Slew rates shall be met for both capacitor values Measurements shall be taken at the test point using a 1 pF 2100 Kohm 1 Ghz or faster probe and a 500 MHz or faster oscilloscope The average rate shall be measured from 20 to 80 of the settled VOH level with data transitions at least 120 nsec apart The settled VOH level shall be measured as the average output high level under the defined testing conditions from 100 nsec after 80 of a rising edge until 2096 of the subsequent falling edge Transcend Information Inc 34 V1 0 TS4G 32GCF150 150X CompactFlash Card Card Configuration The CompactFlash Storage Cards is identified by appropriate information in the Card Information Structure CIS The following configuration registers are used to coordinate the I O spaces and the Interrupt level of cards that are located in the system In addition these registers provide a method for accessing status information about the CompactFlash Storage Card that may be used to arbitrate between multiple in
83. orage Card The host software should set this bit to O Bit 4 this bit is ignored by the CompactFlash Storage Card The host software should set this bit to O Bit 3 this bit is ignored by the CompactFlash Storage Card The host software should set this bit to O Bit 2 SW Rst this bit is set to 1 in order to force the CompactFlash Storage Card to perform an AT Disk controller Soft Reset operation This does not change the PCMCIA Card Configuration Registers as a hardware Reset does The Card remains in Reset until this bit is reset to 0 Bit 1 IEn the Interrupt Enable bit enables interrupts when the bit is 0 When the bit is 1 interrupts from the CompactFlash Storage Card are disabled This bit also controls the Int bit in the Configuration and Status Register This bit is set to 0 at power on and Reset Bit 0 this bit is ignored by the CompactFlash Storage Card Transcend Information Inc 54 V1 0 TS4G 32GCF150 150X CompactFlash Card gt Card Drive Address Register Address 3F7h 377h Offset Fh This register is provided for compatibility with the AT disk drive interface It is recommended that this register not be mapped into the host s I O space because of potential conflicts on Bit 7 D7 D6 D5 D4 D3 D2 D1 DO x we 53 ns2 HS nso nosi noso Bit 7 this bit is unknown Implementation Note Conflicts may occur on the host data bus when this bit is provided by a Floppy Disk Controller operat
84. r LBA 7 0 Sec Cnt 2 Sector Count m Write Sector s without Erase 38h wj 7 e 551 command yf 3 cmm e a 1 nv Head LBA 27 24 Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Sector Number LBA 7 0 Sec Cnt 2 Sector Count o X O m Write Verify 3Ch ws Pe fs ts fst t emme iu ow weusmzs Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 sec Num 3 Sector Number LBA 7 0 Sec Cnt 2 Sector Count X Transcend Information Inc 80 V1 0 TS4G 32GCF150 150X CompactFlash Card m Error Posting Command Check Power Mode Execute Drive Diagnostic lt Erase Sector s Flush Cache Format Track Identify Device Idle Immediate Initialize Drive Parameters Key Management Structure Read Key Management Read Keying Material Key Management Change Key Management Value Read Buffer Read DMA Read Multiple Read Long Sector Read Sector s Read Verify Sectors Recalibrate Request Sense Security Disable Password Security Erase Prepare Security Erase Unit Security Freeze Lock Security Set Password Security Unlock Seek Set Features Error Register Status Register V V V E vivivi vivi viviv iv V OR V V m v lt lt lt
85. r count sm La fre fo ttt 1 see om a o o 1 ometo ovindertow sm o a o 1 t omne ovindertigh sm Select Cardicad Selec Carmena eb sm sm Transcend Information Inc 50 V1 0 TS4G 32GCF150 150X CompactFlash Card CF ATA Registers The following section describes the hardware registers used by the host software to issue commands to the CompactFlash device These registers are often collectively referred to as the task file gt Data Register Address 1FOh 170h Offset 0 8 9 The Data Register is a 16 bit register and it is used to transfer data blocks between the CompactFlash Storaae Card data buffer and the Host This reaister overlaps the Error Reaister Memory and I O Modes o o x eas wem menoa a o o os oro a 3 3 oro fo 3x e m ovo Emurmweneer o 3x we mre o a x m em Data Register Data Bus True IDE Mode PIO Word Data Register 4 w D500 MN CNN GN E PIO Byte Data Register 1 Selected Using Set Features Command Notes 1 REG signal is mode dependent Signal shall be 0 for I O mode and 1 for Memory Mode Error Register Address 1F1h 17 1h Offset 1 ODh Read Only This register contains additional information about the source of an error when an error is indicated in bit 0 of the Status register D7 D D5 D4 D3 D2 D1 DO
86. ration Bit 10 IORDY may be disabled Bit 10 shall be set to 0 indicating that IORDY may not be disabled Bit 9 LBA supported Bit 9 shall be set to 1 indicating that this CompactFlash Storage Card supports LBA mode addressing CF devices shall support LBA addressing Bit 8 DMA Supported If bit 8 is set to 1 then Read DMA and Write DMA commands are supported Bit 8 shall be set to 0 Read Write DMA commands are not currently permitted on CF cards gt PIO Data Transfer Cycle Timing Mode The PIO transfer timing for each CompactFlash Storage Card falls into modes that have unique parametric timing specifications The value returned in Bits 15 8 shall be 00h for mode 0 01h for mode 1 or 02h for mode 2 Values 03h through FFh are reserved gt Translation Parameters Valid Bit 0 shall be set to 1 indicating that words 54 to 58 are valid and reflect the current number of cylinders heads and sectors If bit 1 of word 53 is set to 1 the values in words 64 through 70 are valid If this bit is cleared to 0 the values reported in words 64 70 are not valid Any CompactFlash Storage Card that supports PIO mode 3 or above shall set bit 1 of word 53 to one and support the fields contained in words 64 through 70 gt Current Number of Cylinders Heads Sectors Track These fields contains the current number of user addressable Cylinders Heads and Sectors Track in the current translation mode gt Current Capacity This field contains the product of t
87. rd If the value in this register is zero a count of 256 sectors is specified If the command was successful this register is zero at command completion If not successfully completed the register contains the number of sectors that need to be transferred in order to complete the request Sector Number LBA 7 0 Register Address 1F3h 173h Offset 3 This register contains the starting sector number or bits 7 0 of the Logical Block Address LBA for any CompactFlash Storage Card data access for the subsequent command gt 6 1 5 5 Cylinder Low LBA 15 8 Register Address 1F4h 174h Offset 4 This register contains the low order 8 bits of the starting cylinder address or bits 15 8 of the Logical Block Address gt Cylinder High LBA 23 16 Register Address 1F5h 175h Offset 5 This register contains the high order bits of the starting cylinder address or bits 23 16 of the Logical Block Address gt Drive Head LBA 27 24 Register Address 1F6h 176h Offset 6 The Drive Head register is used to select the drive and head It is also used to select LBA addressing instead of cylinder head sector addressing D7 D6 D5 D4 D3 D2 D1 DO Bit 7 this bit is specified as 1 for backward compatibility reasons It is intended that this bit will become obsolete in a future revision of the specification This bit is ignored by some controllers in some commands Bit 6 LBA is a flag to select either Cylinder Head Sector CHS or Logical Block Addre
88. socket per interface logic such as for Advanced Timing Modes and Ultra DMA operation may ignore the INPACK signal from the device and manage their input buffers based solely on Card Enable signals DMARQ This signal is a DMA Request that is used for DMA data transfers between host PC Card Memory Mode Ultra and device It shall be asserted by the device when it is ready to transfer data to DMA Protocol Active or from the host For Multiword DMA transfers the direction of data transfer is DMARQ controlled by IORD and IOWR This signal is used in a handshake manner with PC Card I O Mode Ultra DMA DMACK i e the device shall wait until the host asserts DMACK before Protocol Active negating DMARQ and re asserting DMARQ if there is more data to transfer DMARQ True IDE Mode In PCMCIA I O Mode the DMARQ shall be ignored by the host while the host is performing an I O Read cycle to the device The host shall not initiate an I O Read cycle while DMARQ is asserted by the device In True IDE Mode DMARQ shall not be driven when the device is not selected in the Drive Head register While a DMA operation is in progress CSO CE1 and CS1 CE2 shall be held negated and the width of the transfers shall be 16 bits If there is no hardware support for True IDE DMA mode in the host this output signal is not used and should not be connected at the host In this case the BIOS must report that DMA mode is not supported by the host so tha
89. ss Mode LBA When LBA 0 Cylinder Head Sector mode is selected When LBA 1 Logical Block Address is selected In Logical Block Mode the Logical Block Address is interpreted as follows LBA7 LBAO Sector Number Register D7 DO LBA15 LBA8 Cylinder Low Register D7 DO LBA23 LBA16 Cylinder High Register D7 DO LBA27 LBA24 Drive Head Register bits HS3 HSO Bit 5 this bit is specified as 1 for backward compatibility reasons It is intended that this bit will become obsolete in a future revisions of the specification This bit is ignored by some controllers in some commands Bit 4 DRV DRV is the drive number When DRV O drive card 0 is selected When DRV 1 drive card 1 is selected Setting this bit to 1 is obsolete in PCMCIA modes of operation If the obsolete functionality is support by a CF Storage Card the CompactFlash Storage Card is set to be Card 0 or 1 using the copy field Drive of the PCMCIA Socket amp Copy configuration register Transcend Information Inc 52 V1 0 TS4G 32GCF150 150X CompactFlash Card Bit 3 HS3 when operating in the Cylinder Head Sector mode this is bit 3 of the head number It is Bit 27 in the Logical Block Address mode Bit 2 HS2 when operating in the Cylinder Head Sector mode this is bit 2 of the head number It is Bit 26 in the Logical Block Address mode Bit 1 HS1 when operating in the Cylinder Head Sector mode this is bit 1 of the head number It is Bit 25 in the Logical B
90. t es fo Smet a Type Num Type Type Num Type Type HSTROBE HSTROBE ae HDMARDY HDMARDY cmm qt pee INTRQ C CSEL VS2 RESET IORDY DDMARDY DSTROBE ow 0 A I1U ON1 I1U ON1 17 OZ3 17 OZ3 M DSTROBE DSTROBE OE DOO OO DMARQ DMARQ rane aC ce STSCHG ce 46 GEZHECONEI 5 s vo oes e vo Gm 44 11Z IZ e Eje Ee Note Vd These signals are required only for 16 bit accesses and not required when installed in 8 bit systems Devices should allow for 3 state DMARQ 44 DMACK 45 DASP PDIAG Dos lt signals not to consume current The signal should be grounded by the host The signal should be tied to VCC by the host The mode is required for CompactFlash Storage Cards The CSEL signal is ignored by the card in PC Card modes However because it is not pulled upon the card in these modes it should not be left floating by the host in PC Card modes In these modes the pin should be connected by the host to PC Card A25 or grounded by the host 6 If DMA operations are not used the signal should be held high or tied to VCC by the host For proper operation in older hosts while DMA operations are not active the card shall ignore this signal including a floating condition Signal usage in True IDE Mode except when Ultra DMA mode protocol is acti
91. t device drivers will not attempt DMA mode operation A host that does not support DMA mode and implements both PC Card and True IDE modes of operation need not alter the PC Card mode connections while in True IDE mode as long as this does not prevent proper operation in any mode IORD 34 This signal is not used in this mode This is an I O Read strobe generated by the host This signal gates I O data onto the bus from the CompactFlash Storage Card when the card is configured to use the I O interface In True IDE Mode while Ultra DMA mode is not active this signal has the same function as in PC Card I O Mode In all modes when Ultra DMA mode DMA Read is active this signal is asserted by the host to indicate that the host is ready to receive Ultra DMA data in bursts The host may negate HDMARDY to pause an Ultra DMA transfer In all modes when Ultra DMA mode DMA Write is active this signal is the data out strobe generated by the host Both the rising and falling edge of HSTROBE cause data to be latched by the device The host may stop generating HSTROBE edges to pause an Ultra DMA data out burst Transcend Information Inc V1 0 TS4G 32GCF150 150X CompactFlash Card Signal Name Dir Pin Description IOWR 35 This signal is not used in this mode PC Card Memory Mode Except Ultra DMA Protocol Active The I O Write strobe pulse is used to clock I O data on the Card Data bus into the IOWR PC Card I O
92. terrupt sources on the same interrupt level or to replace status information that appears on dedicated pins in memory cards that have alternate use in I O cards m Multiple Function CompactFlash Storage Cards Table CompactFlash Storage Card Registers and Memory Space Decoding oc we ao wm aema ceuscrensrace pat XIx x x sesrawuowsvaster ESEBENZSEHESENESEJFAESERL 1 1 NN ENERNENENENES DC DC X X common memor Read 6810709 EREBEBESERESHE SEHE EE Erg Memory Read 16 Bi D150 Reistes write Card Information Structure Read Invalid Access CIS Write 1 Invalid Access Odd Attribute Read Invalid Access Odd Attribute Write Invalid Access Odd Attribute Read Invalid Access Odd Attribute Write Transcend Information Inc 35 V1 0 TS4G 32GCF150 150X CompactFlash Card Table PC Card Memory Mode UDMA Function DMARDY IORD R WAIT STROBE WAIT R IORD DMA A10 Operation cmp aoo P Device UDMA Transfer Request Host Acknowledge Preparation Host Acknowledge Preparation DMA Acknowledge Stopped Burst Initiation Active Burst Transfer RD Static Data In Burst Host Pause RD Static Data In Burst Device Pause WR Static Data Out Burst Device Pause WR Data Out Burst Host Pause Stat Device Initiating BurstTermination Static Host Acknowledement of Device Initiated Burst Termination Host Initiati
93. the IDENTIFY DEVICE data indicate support of the Ultra DMA feature and the Ultra DMA modes the device is capable of supporting The Set transfer mode subcommand in the SET FEATURES command shall be used by a host to Transcend Information Inc 29 V1 0 TS4G 32GCF150 150X CompactFlash Card select the Ultra DMA mode at which the system operates The Ultra DMA mode selected by a host shall be less than or equal to the fastest mode of which the device is capable Only one Ultra DMA mode shall be selected at any given time All timing requirements for a selected Ultra DMA mode shall be satisfied Devices supporting any Ultra DMA mode shall also support all slower Ultra DMA modes An Ultra DMA capable device shall retain the previously selected Ultra DMA mode after executing a software reset sequence or the sequence caused by receipt of a DEVICE RESET command if a SET FEATURES disable reverting to defaults command has been issued The device may revert to a Multiword DMA mode if a SET FEATURES enable reverting to default has been issued An Ultra DMA capable device shall clear any previously selected Ultra DMA mode and revert to the default non Ultra DMA modes after executing a power on or hardware reset Both the host and device perform a CRC function during an Ultra DMA data burst At the end of an Ultra DMA data burst the host sends its CRC data to the device The device compares its CRC data to the data sent from the host If the two values do not
94. to or from the host through the Data register During the data transfer of DMA commands the Card shall not assert DMARQ unless either the BUSY bit the DRQ bit or both are set to one Bit 2 CORR This bit is set when a Correctable data error has been encountered and the data has been corrected This condition does not terminate a multi sector read operation Bit 1 IDX This bit is always set to 0 Bit 0 ERR This bit is set when the previous command has ended in some type of error The bits in the Error register contain additional information describing the error It is recommended that media access commands such as Read Sectors and Write Sectors that end with an error condition should have the address of the first sector in error in the command block registers Transcend Information Inc 53 V1 0 TS4G 32GCF150 150X CompactFlash Card Device Control Register Address 3F6h 376h Offset Eh This register is used to control the CompactFlash Storage Card interrupt request and to issue an ATA soft reset to the card This register can be written even if the device is BUSY The bits are defined as follows D7 D6 D5 D4 D3 D2 D1 DO xo x xo x xo swe em 0 Bit 7 this bit is ignored by the CompactFlash Storage Card The host software should set this bit to O Bit 6 this bit is ignored by the CompactFlash Storage Card The host software should set this bit to O Bit 5 this bit is ignored by the CompactFlash St
95. tor Count Feature m Recalibrate 1Xh m l e eme wu 3 ww X Cyl High 5 Transcend Information Inc 73 V1 0 TS4G 32GCF150 150X CompactFlash Card m Request Sense 03h Lese ee Command 7 X 3 Cyl High 5 The extended error code is returned to the host in the Error Register er F m Seek 7Xh site 7 e s a j s 2 t Cyl High 5 Cylinder High LBA 23 16 Cyl Low 4 Cylinder Low LBA 15 8 Seen 00 0 0X O Feature 1 x Transcend Information Inc 74 V1 0 TS4G 32GCF150 150X CompactFlash Card m Set Features EFh z ie os fe is e ft fo CIDIH 6 Drive Cyl High 5 sewmp Xx semg Gm rewm rem Feature Supported Enable 8 bit data transfers Enable Write Cache Set transfer mode based on value in Sector Count register Enable Advanced Power Management Enable Extended Power operations Alert It has been proposed to remove this feature from a future revision of the specification Please notify the CFA if you equirement for this feature Oah _ Enable Power Level 1 commands O Z O O O 44n Product specific ECC bytes apply on Read Write Long commands 55h Disable Read Look Ahead O 66h Disable Power on Reset POR establishment of defaults at Soft Reset 69h NOP Accepted for bac
96. upported Bit 3 of word 82 shall be set to one the Power Management feature set is supported Bit 4 of word 82 shall be set to zero the Packet Command feature set is not supported If bit 5 of word 82 is set to one write cache is supported If bit 6 of word 82 is set to one look ahead is supported Bit 7 of word 82 shall be set to zero release interrupt is not supported Bit 8 of word 82 shall be set to zero Service interrupt is not supported Bit 9 of word 82 shall be set to zero the Device Reset command is not supported Bit 10 of word 82 shall be set to zero the Host Protected Area feature set is not supported Bit 11 of word 82 is obsolete Bit 12 of word 82 shall be set to one the CompactFlash Storage Card supports the Write Buffer command Bit 13 of word 82 shall be set to one the CompactFlash Storage Card supports the Read Buffer command Bit 14 of word 82 shall be set to one the CompactFlash Storage Card supports the NOP command Bit 15 of word 82 is obsolete Bit O of word 83 shall be set to zero the CompactFlash Storage Card does not support the Download Transcend Information Inc 65 V1 0 TS4G 32GCF150 150X CompactFlash Card Microcode command Bit 1 of word 83 shall be set to zero the CompactFlash Storage Card does not support the Read DMA Queued and Write DMA Queued commands Bit 2 of word 83 shall be set to one the CompactFlash Storage Card supports the CFA feature set If bit 3 of word 83 is set to
97. vanced Timing Mode if two cards are sharing I O lines as in Master Slave operation nor if it is constructed such that a cable exceeding 0 15 meters is required to connect the host to the card The load presented to the Host by cards supporting Ultra DMA is more controlled than that presented by other CompactFlash cards Therefore the use of a card that does not support Ultra DMA in a Master Slave arrangement with a Ultra DMA card can affect the critical timing of the Ultra DMA transfers The host shall not configure a card into Ultra DMA mode when a card not supporting Ultra DMA is also present on the same interface When the use of two cards on an interface is otherwise permitted the host may use any mode that is supported by both cards but to achieve maximum performance it should use its highest performance mode that is also supported by both cards Metaformat Overview The goal of the Metaformat is to describe the requirements and capabilities of the CompactFlash Storage Card as thoroughly as possible This includes describing the power requirements IO requirements memory requirements manufacturer information and details about the services provided Table Sample Device Info Tuple Information for Extended Speeds Speed Attribute Code Notes Memory Relative Offset Keak Beall ek Dh Function Specific Bl 1h 250 nsec E E oes em onrein spoon i m eenaa OFA wa um e m 00sec es EE Ce
98. ve Signal usage in True IDE Mode when Ultra DMA mode protocol DMA Write is active Signal usage in True IDE Mode when Ultra DMA mode protocol DMA Read is active 0 Signal usage in PC Card I O and Memory Mode when Ultra DMA mode protocol DMA Write is active 1 2 2 3 4 5 Signal usage in PC Card I O and Memory Mode when Ultra DMA mode protocol DMA Read is active 7 8 9 1 1 12 Signal usage in PC Card and Memory Mode when Ultra DMA protocol is active Transcend Information Inc 5 V1 0 TS4G 32GCF150 150X CompactFlash Card Signal Description Signal Name Dir Pin Description A10 A00 l 8 10 11 12 These address lines along with the REG signal are used to select the following PC Card Memory Mode 14 15 16 17 The I O port address registers within the CompactFlash Storage Card the 18 19 20 memory mapped port address registers within the CompactFlash Storage Card a byte in the card s information structure and its configuration control and status registers A10 A00 This signal is the same as the PC Card Memory Mode signal PC Card I O Mode A02 A00 I 18 19 20 In True IDE Mode only A 02 00 are used to select the one of eight registers True IDE Mode in the Task File the remaining address lines should be grounded by the host BVD1 46 This signal is asserted high as BVD1 is not supported PC Card Memory Mode STSCHG This signal is asserted low to alert
99. y request the host to extend the length of an input cycle until data is ready by asserting the WAIT signal at the start of the cycle Table PCMCIA Mode Function see we Standby Mode Standby Mode e E X High High Z mtem BEER E EE L Don t Care Odd Byte H oad Byte Even Byte ep em asa pepe de REESENL e e ee one Transcend Information Inc 42 V1 0 TS4G 32GCF150 150X CompactFlash Card Table PC Card I O Mode UDMA Function DMARDY STROBE DMARQ DMACK STOP IORD DMA A10 CE2 CE1 INpACK REG IOWR R WAIT R IORD CMD A00 Operation W W EN Assert DMARQ ves siate Burst maton taen Static Device Initiating BurstTermination Host Initiating BurstTermination Stati Device Acknowledging Host Initiated Burst Termination Device Aligning STROBE to Asserted Static CRC Data Transfer for UDMA Burst Static Y Y Y Static Y Host Acknowledement of Device Initiated Burst Termination YES YES YES YES YES WR WR ES ES ES ES ES Transcend Information Inc 43 V1 0 TS4G 32GCF150 150X CompactFlash Card Common Memory Transfer Function The Common Memory transfer to or from the CompactFlash Storage can be either 8 or 16 bits Table Common Memory Function Rincionose oma ea ce2 cei ao we wsw wm Don t L i t High Z Even Byte Don t Don t

Transcend CF150 CompactFlash

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