takeMS SO-DIMM, 512 MB
Contents
1. Ja the best reason for saving Technical Datasheet Technical details 512 MB SO DIMM module 64Mx8 IC organisation X64 module organisation 667 MHz PC2 5300 double sided 8 ICs CAS Latency 5 at max memclock For pin configuration please check www takems com support index php If you have any questions regarding our products you can contact us via email info takems com Order No TMS51S264C08x 665xx Web www takems com E Mail info takems com Tel 49 7667 9414 0 Fax 49 7667 9414 444 Flash Cords2. Technical Datasheet S 4 the best reason for saving takeMS TMS51S264C08x 665xx USB Flash Description These Memory devices are J EDEC standard unbuffered DIMM modules based on CMOS DDR2 SDRAM technology These devices consist of CMOS DDR2 SDRAMs in FBGA packages on a 200 pin glass epoxy substrate The memory array is designed with Double Data Rate DDR2 Synchronous DRAMs for unbuffered applications The pipelined multibanked architecture of DDR2 SDRAMs allows for concurrent operation thereby providing high effective bandwidth Decoupling capacitors are mounted on the PCB board in parallel for each DDR2 SDRAM which provides proper voltage supply impedance over the whole frequency range of operations in accordance with J EDEC Specifications These modules feature Serial Presence Detect SPD based on a Serial EEPROM device using the 2 pin 12C protocol Features 200 pin Unbuffered SO DIMM DDR2 SDRAM JEDEC standard 1 8V I O SSTL_18 compatible Auto Refresh CBR and Self Refresh Mode Off Chip Driver OCD Impedance Adjustment On Die Termination ODT supports termination values of 50 75 and 150 ohms Serial Presence Detect SPD with EEPROM Module layout is based on JEDEC standard routing guidelines Impedance controlled 6 layer PCB Technology JEDEC standard form factor DQS edge aligned with data for READs DQS center aligned with data for WRITEs Operating Temperature 0 C 75 C Memary Flash Cords
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