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Supermicro H8DM3-2

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1. 2 12 Fan Headers ERR TEN RT 2 12 Power LED Speaker Keylock 2 13 Oveirhsat MM NR 2 13 Gh assis UD MP PCR 2 13 Wake C t 2 13 RE 2 14 Power Supply Header 2er 2 14 LAM Ti Ethernet Ports cachet tere 2 14 Power Supply Fail Alarm Reset Header 2 14 Power Supply Fail Alarm Header 2 15 Compact Flash Power Header i i 2 15 eT A I 2 15 2 7 Jumper SONNY nte spesa Da 2 16 uice M 2 16 CMOS CUBA acs 2 16 PC to PCI X Enable Disable 2 17 FG to PCI E Enable Disable 2 17 Watch Dog Enable Disable 2 17 VGA Babble n 2 17 Slot Speed 2 18 Compact Flash Master Slave 2 18 3rd Power Supply Fail Signal Enable Disable 2 18 SAS RAID
2. Kb 201 J1B1 JPFC Mouse 5 J8P FAN1 E 5 CPU1 DIMM 1B USBO 1 JOH1 CPU1 DIMM CPU1 DIMM 2B CPU1 DIMM 2A JF1 CPU2 1 FAN2 VGA CPU1 CPU2 DIMM 2A CPU2 DIMM 2B JF2 LAN2 CPU2 DIMM 1A CPU2 DIMM 1B pai CPU SIMLP j ri E jong Slot 6 PCI E x8 SEPC BIOS JBT1 H Slot 5 PCI E x8 nVidia Speaker RPAN 55 Pro 8 el Slot 4 x4 ES 2 L JPG1 JAR SGPIO1 ATI ES1000 wor SGPIO2 e Slot 3 PCI X 133 MHz 5 54 7 I AMD LSI SAS Slot 2 PCI X 133 100 MHz 152 1068E m E 5 50 3 Slot 1 PCI X 133 100 MHz JL1 2 0 Battery A 1 UsB4 SATA1 SATAS JPS1 JWOL SATAO SATA2 SATA4 SATA5 COM2 __ wp FANA Notes 1 Jumpers not indicated are for test purposes only 2 The H8DMi 2 has the same layout as the H8DM3 2 but with no SAS components or ports or I button 3 The I Button optional is used to enable RAID 5 4 For SAS RAID SR and IT modes are supported but not IR 1 4 Chapter 1 Introduction H8DM3 2 H8DMi 2 Quick Reference Jumpers J3P JBT1 JCF1 Jl C1 2 Jl C3 4 JPG1 JPS1 JPXA1 JPXB1 JWD Connectors COM1 COM2 FAN 1 8 Floppy l Button IDE 1 J1B1 JAR JF1 JF2 JL1 JOH1 JPI C JPW1 JPW2 JPWF JWF1 JWOL JWOR LA
3. 1 9 ct 1 10 Power Configuration Settings tt 1 11 ES aii 1 12 caos cs ee 1 13 Chapter 2 Installation 2 1 2 2 2 3 2 4 2 5 2 6 Static Sensitive Devices 2 1 Processor and Heatsink Installation 2 2 Mounting the Serverboard into Chassis 2 5 installing uii isni TT 2 5 Port and Control Panel Connections 2 8 Connecting Cables RT 2 9 ALX Power GONMECION 2 9 Processor Power Connector 2 9 Auxiliary Power 2 9 Power EED coiere D ERI Dee D TREES 2 9 HDD LED 2 10 NICI i r 2 10 LED cc 2 10 Overheat Fani Fall LED eee 2 10 Power LED 2 10 Reser BURON lt 2 11 Power Button 2 11 Universal Serial Bus Ports USBOM 2 11 DUSB Hea3dels 2 11 ATX PS 2 Keyboard Mouse Ports 2 12 Table of Contents Serial POS deo osi
4. NOTE If you are a system integrator VAR or OEM a POST diagnostics is recommended For I O port 80h codes refer to App B Memory Errors 1 Make sure that the DIMM modules are properly and fully installed 2 You should be using registered ECC DDR 2 memory see next page Also it is recommended that you use the same memory type and speed for all DIMMs in the system See Section 2 4 for memory details and limitations 3 Check for bad DIMM modules or slots by swapping modules between slots and noting the results 4 Check the power supply voltage 115V 230V switch Losing the System s Setup Configuration 1 Make sure that you are using a high quality power supply A poor quality power supply may cause the system to lose the CMOS setup information Refer to Sec tion 1 6 for details on recommended power supplies 2 The battery on your serverboard may be old Check to verify that it still supplies If it does not replace it with new one 3 If the above steps do not fix the setup configuration problem contact your vendor for repairs 3 2 Technical Support Procedures Before contacting Technical Support please take the following steps Also note that as a serverboard manufacturer we do not sell directly to end users so it is best to first check with your distributor or reseller for troubleshooting services They should know of any possible problem s with the specific system configuration that
5. The onboard floppy controller if available is initialized Next beginning the base 512 KB memory test Eth Initializing the interrupt vector table next E2h E6h Enabling the floppy drive controller and Timer IRQs Enabling internal cache mem ory Initializing the DMA and Interrupt controllers next Edh Initializing the floppy drive Eeh Looking for a floppy diskette in drive A Reading the first sector of the diskette Efh A read error occurred while reading the floppy drive in drive A Next searching for AMIBOOT ROM file in the root directory Eih The AMIBOOT ROM file is not in the root directory F2h Next reading and analyzing the floppy diskette FAT to find the clusters occupied by the AMIBOOT ROM file F3h Next reading the AMIBOOT ROM file cluster by cluster F4h The AMIBOOT ROM file is not the correct size F5h Next disabling internal cache memory FBh Next detecting the type of flash ROM FCh Next erasing the flash ROM FDh Next programming the flash ROM FFh Flash ROM programming was successful Next restarting the system BIOS B 2 Appendix B BIOS POST Checkpoint Codes B 3 Uncompressed Initialization Codes The following runtime checkpoint codes are listed in order of execution These codes are uncompressed in F0000h shadow RAM Checkpoint Code Description 03h The NMI is disabled Next checking for a soft reset or a power on condition 05h
6. and 1B then the next two CPU1 slots etc This balances the load over both CPUs to optimize performance Maximum memory 64 GB of DDR2 667 or 32 GB of DDR2 533 400 registered ECC SDRAM If only one CPU is installed maximum supported memory is halved 16 GB Figure 2 2 Side and Top Views of DDR Installation Install Insert module vertically and press down until it snaps into place The release tabs should close if they do not you should close them yourself To Remove Use your thumbs to gently push each re lease tab outward to release the DIMM from the slot Notch Note Notch irr should align with its receptive point on the slot Note the notch in the slot and on the bottom of the DIMM These prevent the DIMM from being installed incorrectly Top View of DDR Slot Release Tab Il Ll Release Tab 2 6 Chapter 2 Installation Populating Memory Banks for 128 bit Operation CPU1 CPU1 CPU1 CPU1 CPU2 CPU2 CPU2 CPU2 DIMM1A DIMM1B DIMM2A DIMM2B DIMM1A DIMM1B DIMM2A DIMM2B X X x lt EN gt gt gt NEM gt Notes X indicates a populated DIMM slot If adding at least four DIMMs with two CPUs installed the configurations with DIMMs spread over both CPUs and not like the con figuration in row 5 will result in optimized performance Note that the first two DIMMs must be installed in the CPU1 memory slots Pop
7. FDHDIN Reserved 2 FDEDIN Index Motor Enable Drive Select B Drive Select A Motor Enable DIR STEP Write Data Write Gate Track 00 Write Protect Read Data G G G G G G G G G G G G G Side 1 Select Diskette 2 20 IDE Connector There are no jumpers to con figure the onboard IDE 1 con nector unless using it for a compact flash device See the table on the right for pin definitions Pin 2 21 IDE Drive Connectors Pin Definitions IDE 1 Definition Reset IDE Host Data 7 Host Data 6 Host Data 5 Host Data 4 Host Data 3 Host Data 2 Host Data 1 Host Data 0 Ground DRQ3 Write Read IOCHRDY DACK3 IRQ14 Chip Select 0 Activity Chapter 2 Installation 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 Definition Ground Host Data 8 Host Data 9 Host Data 10 Host Data 11 Host Data 12 Host Data 13 Host Data 14 Host Data 15 Key Ground Ground Ground BALE Ground 00516 Ground Addr2 Chip Select 1 Ground H8DM3 2 H8DMi 2 User s Manual SATA Drive Ports Pin Definitions SATAO SATA5 SATA Ports Pin Definition 1 Ground There are no jumpers to con p figure the SATA ports which are designated SATAO through cum SATA5 See the table on the ee RXN right for pin definitions 6 RXP 7 Ground SAS Ports H8DM3 2 EXEUNT Pin Defini
8. Pin Definition 1 Ground 2 Reset Signal Power Supply Fail Alarm Header Connect a cable from your power supply to JPWF to provide you with warning of a power supply failure The warning signal is passed through the PWR_LED pin to indicate a power failure See the table on the right for pin definitions Compact Flash Power Header A Compact Flash Card Power header is located at JWF1 For the Compact Flash Card to work properly you will first need to connect the device s power cable to JWF1 and correctly set the Compact Flash Jumper JCF1 SGPIO SGPIO1 and SGPIO2 Serial General Purpose Input Output provide a bus between the SATA controller and the SATA drive backplane to provide SATA enclosure management func tions Connect the appropriate cables from the backplane to the SGPIO1 and SGPIO2 header s to utilize SATA management functions on your system 2 15 Chapter 2 Installation Power Supply Fail Alarm Header Pin Definitions JPWF Pin Definition P S 1 Fail Signal P S 2 Fail Signal Reset from MB 2 3 P S 3 Fail Signal 4 Note This feature is only available when using redundant power supplies Compact Flash Power Header Pin Definitions JWF1 Pin Definition 1 5V 2 Ground 8 Signal SGPIO Header Pin Definitions SGPIO1 SGPIO2 Pin Definition Pin Definition 1 2 Ground 4 Data Load 6 Ground NC NC Note NC i
9. Re 2 18 2 8 Onboard n a 2 19 LAN1 LAN2 TEES 2 19 e e e 2 19 2 9 Floppy IDE SATA SAS Drive Connections 2 20 FIO OY hou dates 2 20 CONNECCION ete ee mC 2 21 SATA eC 2 22 SAS PIS d Rene IAE 2 22 210 Enabling SATA Ene 2 23 2 11 Installing Additional Drivers 2 25 Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures a a 3 1 Before Power On 3 1 uo nid 3 1 H8DM3 2 H8DMi 2 User s Manual VIGO E 3 1 Memo e 3 2 Losing the System s Setup Configuration 3 2 3 2 Technical Support Procedures Soie 3 2 3 3 Frequently Asked Questions dee rude 3 3 3 4 Returning Merchandise for Service 222 1 0 3 4 Chapter 4 BIOS ME ves eio T 4 1 4 2 4
10. Slot 6 PCI E x8 LPC v i O Serial Ports 2 Figure 1 3 nVidia MCP55 Pro AMD 8132 Chipset System Block Diagram Note This is a general block diagram and may not exactly represent the features on your serverboard See the previous pages for the actual specifications of your serverboard Chapter 1 Introduction 1 2 Chipset Overview The H8DM3 2 H8DMi 2 serverboard is based on the nVidia MCP55 Pro AMD 8132 chipset The nVidia MCP55 Pro functions as Media and Communications Proces sor MCP Controllers for the system memory are integrated directly into the AMD Opteron processors MCP55 Pro Media and Communications Processor The MCP55 Pro is a single chip high performance HyperTransport peripheral con troller It includes a 28 lane PCI Express interface an AMD Opteron 16 bit Hyper Transport interface link a six port Serial ATA interface a dual port Gb Ethernet interface a dual ATA133 bus master interface and a USB 2 0 interface This hub connects directly to CPU 1 and through that to CPU 2 8132 HyperTransport PCI X Tunnel This hub includes AMD specific technology that provides two PCI X bridges with each bridge supporting a 64 bit data bus as well as separate PCI X operational modes and independent transfer rates Each bridge supports up to five PCI mas ters that include clock request and grant signals The 8132 tunnel connects to the process
11. ATX PS 2 Keyboard and PS 2 Keyboard and PS 2 Mouse Ports efinitions Pin Definition The ATX PS 2 keyboard and the 1 Dat PS 2 mouse ports are located on the N IO backplane The mouse is the top 2 3 Ground green port See the table on the right for pin definitions 5 Clock e Nc Serial Port Pin Definitions Serial Ports COM1 COM2 Pin Definition Pin Definition The COM1 port is located under the parallel port COM2 is a header located beside the SATA5 port See the serverboard layout for locations and the table on the right for pin definitions DSR RXD RTS TXD CTS DTR RI Ground NC Note NC indicates no connection Fan Headers The H8DM3 2 H8DMi 2 has eight fan headers which are designated FAN1 FAN7 FAN8 through FAN8 FAN7 and FAN8 Pin Definition are for 4 pin Pulse Width Modulated 1 Ground Black PWM fans and are to be connected 2 12V Red to the CPU heatsink fans Their speed 3 Tachometer is controlled via Thermal Management 4 PWM Control with a BIOS setting FAN1 through FAN6 are 3 pin non PWM fans See the tables on the right for pin defini tions 3 pin Fan Header Pin Definitions FAN1 FAN6 Note The nFAN1 header connects to the heatsink fan on the nVidia MCP 55 Pin Definition 1 Ground Black Pro chip Do not disconnect this fan 412 Red or the chipset may overheat Se
12. This option allows the user to assign a PCI slot number to an Off board PCI ISA IDE card in order for it to function properly The options are Auto PCI Slot1 PCI Slot2 PCI 51013 PCI Slot4 PCI Slot5 and PCI 51016 IRQ3 IRQ4 IRQ5 IRQ7 IRQ9 IRQ10 IRQ11 IRQ14 IRQ15 This feature specifies the availability of an IRQ to be used by a PCI PnP device Select Reserved for the IRQ to be used by a Legacy ISA device The options are Available and Reserved DMA Channel 0 1 3 5 6 7 This feature specifies the availability of a DMA channel The options are Available and Reserved Reserved Memory Size This setting sets the size of the memory block to reserve for Legacy ISA devices The options are Disabled 16k 32k and 64k Onboard SAS Controller This setting is used to Enable or Disable the onboard SAS controller gt Super Configuration Serial Port Address This option specifies the base I O port address and Interrupt Request address of serial port 1 Select Disabled to prevent the serial port from accessing any system resources When this option is set to Disabled the serial port physically becomes unavailable Select 3F8 IRQ4 to allow the serial port to use 3F8 as its I O port address and IRQ 4 for the interrupt address The options are Disabled 3F8 IRQ4 3E8 IRQ4 and 2E8 IRQ3 Serial Port2 Address This option specifies the base I O port address and Interrupt Request address of serial port 2 Select Disabled to prevent
13. Memory size calculation has been done Writing patterns to test memory next The memory pattern has been written to extended memory Writing patterns to the base 640 KB memory next Patterns written in base memory Determining the amount of memory below 1 MB next The amount of memory below 1 MB has been found and verified The amount of memory above 1 MB has been found and verified Checking for a soft reset and clearing the memory below 1 MB for the soft reset next If this is a power on situation going to checkpoint 4Eh next B 4 Appendix B BIOS POST Checkpoint Codes Checkpoint 4Ch 4Dh 4Eh 4Fh 50h 51h 52h 53h 54h 57h 58h 59h 60h 62h 65h 66h 67h 7Fh 80h 81h 82h 83h 84h 85h Code Description The memory below 1 MB has been cleared via a soft reset Clearing the memory above 1 MB next The memory above 1 MB has been cleared via a soft reset Saving the memory size next Going to checkpoint 52h next The memory test started but not as the result of a soft reset Displaying the first 64 KB memory size next The memory size display has started The display is updated during the memory test Performing the sequential and random memory test next The memory below 1 MB has been tested and initialized Adjusting the displayed memory size for relocation and shadowing next The memory size display was adjusted for relocation and shadowing The memory above 1 MB has been teste
14. Open Auto Pins 1 2 PCI X 66 MHz Pins 2 3 PCI 66 MHz Compact Flash Master Slave Jumper Settings JCF1 Jumper Setting Definition Closed Master Open Slave Power Supply Fail Detect Jumper Settings J3P Jumper Setting Definition Open Disabled Closed Enabled SAS RAID Select Jumper Settings JPS1 Jumper Setting Definition Open IT RAID Closed SR RAID Note SR Software RAID IT Integrate Target mode IR mode is not supported Chapter 2 Installation Flashing IT Firmware 1 Download the appropriate IT firmware from the web site ftp ftp supermicro com driver SAS LSI Firmware IT 2 Unzip it to a bootable floppy or USB pen 3 With JPS1 on closed boot to the device with the unzipped firmware and type clear to erase the SR firmware 4 Remove AC power and open JPS1 5 Boot to the disk again and type H8DM32 6 When prompted for the SAS address type in the 16 digit SAS address labeled on the board 7 Power off the system before restarting 2 8 Onboard Indicators LAN1 LAN2 LEDs The Ethernet ports located beside Connection Speed Indicator the VGA port have two LEDs On LED Color Definition each Gb LAN port one LED indicates 9n 10100 MHz activity when blinking while the other Amber LED may be amber or off to indicate the speed of the connection See the table on the right for the func tions associated with the connection speed LED Onboa
15. was sold to you 1 Please review the Troubleshooting Procedures and Frequently Asked Questions FAQs sections in this chapter or see the FAQs on our web site before contacting Technical Support 2 BIOS upgrades can be downloaded from our web site Note Not all BIOS can be flashed depending on the modifications to the boot block code 3 2 Chapter 3 Troubleshooting 3 If you still cannot resolve the problem include the following information when contacting us for technical support model and PCB revision number BIOS release date version this be seen on the initial display when your system first boots up e System configuration An example of a Technical Support form is posted on our web site 4 Distributors For immediate assistance please have your account number ready when contacting our technical support department by e mail 3 3 Frequently Asked Questions Question What type of memory does my serverboard support Answer The H8DM3 2 H8DMi 2 supports up to 64 GB of DDR2 667 or 32 GB of DDR2 533 400 registered ECC SDRAM with two CPUS installed With only one CPU installed the maximum memory support is halved Memory can be installed in interleaved or non interleaved configurations See Section 2 4 for details on installing memory Question How do update my BIOS Answer It is recommended that you not upgrade your BIOS if you are not experi encing problems with
16. GB of DDR2 533 400 registered ECC SDRAM Note Memory capacities are halved for single CPU systems Refer to Section 2 4 before installing Chipset e nVidia MCP55 Pro e AMD 8132 Expansion Slots Two 2 PCI Express x8 slots One 1 PCI Express x4 slot One 1 PCI X 133 MHz slot Two 2 PCI X 133 100 MHz slots One 1 low profile SIMLP slot for IPMI card These slots share a bus and so can only support up to 100 MHz when cards are installed in both slots BIOS 8Mb AMIBIOS LPC Flash ROM APM 1 2 DMI 2 3 PCI 2 2 ACPI 2 0 SMBIOS 2 3 Plug and Play PnP PC Health Monitoring Onboard voltage monitors for two CPU cores 3 3V 5Vin 12Vin 5V stby and battery voltage e Fan status monitor with firmware software on off and speed control Watch Dog Environmental temperature monitoring via BIOS Power up mode control for recovery from AC power loss System resource alert via included utility program Pulse Width Modulated PWM fan connectors FAN7 and FAN8 only Auto switching voltage regulator for the CPU core 1 6 Chapter 1 Introduction ACPI Features Microsoft OnNow Slow blinking LED for suspend state indicator BIOS support for USB keyboard Main switch override mechanism e nternal external modem ring on Onboard I O On chip SATA controller supporting six 6 SATA ports RAID 0 1 0 1 5 and JBOD e LSI 1068 SAS controller H8DM3 2 only RAID 0 1 10 and JBO
17. Message Description 1 beep Refresh Circuits have been reset Ready to power up 5 short 1 long Memory error No memory detected in system 8 beeps Display memory read write error Video adapter missing or with faulty memory A 1 H8DM3 2 H8DMi 2 User s Manual Notes A 2 Appendix B BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power Self Test it writes checkpoint codes to I O port 0080h Ifthe computer cannot complete the boot process diagnostic equipment can be attached to the computer to read I O port 0080h B 1 Uncompressed Initialization Codes The uncompressed initialization checkpoint codes are listed in order of execution Checkpoint Code Description DOh The NMI is disabled Power on delay is starting Next the initialization code check sum will be verified Initializing the DMA controller performing the keyboard controller BAT test starting memory refresh and entering 4 GB flat mode next Starting memory sizing next Returning to real mode Executing any OEM patches and setting the Stack next Passing control to the uncompressed code in shadow RAM at E000 0000h The initialization code is copied to segment 0 and control will be transferred to segment 0 1 H8DM3 2 H8DMi 2 User s Manual B 2 Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution Checkpoint Code Description
18. PIO mode 2 It has a data transfer rate of 8 3 MBs Select 3 to allow AMI BIOS to use PIO mode 3 It has a data transfer rate of 11 1 MBs Select 4 to allow AMI BIOS to use PIO mode 4 It has a data transfer rate of 16 6 MBs This setting generally works with all hard disk drives manufactured after 1999 For other disk drives such as IDE CD ROM drives check the specifications of the drive DMA Mode Selects the DMA Mode Options are Auto SWDMAO SWDMA1 SWDMA2 MWDMAO MDWDMA1 MWDMA2 UDMAO UDMA1 UDMA2 UDMAS UDMA4 and UDMAS SWDMA Single Word MWDMA Multi Word DMA UDMA UltraDMA S M A R T Self Monitoring Analysis and Reporting Technology SMART can help predict impending drive failures Select Auto to allow BIOS to auto detect hard disk drive support Select Disabled to prevent AMI BIOS from using the S M A R T Select Enabled to allow AMI BIOS to use the S M A R T to support hard drive disk The options are Disabled Enabled and Auto 32 Bit Data Transfer Select Enabled to activate the function of 32 Bit data transfer Select Disabled to deactivate the function The options are Enabled and Disabled 4 8 Chapter 4 BIOS Hard Disk Write Protect Select Enabled to enable the function of Hard Disk Write Protect to prevent data from being written to HDD The options are Enabled or Disabled IDE Detect Time Out Sec This feature allows the user to set the time out value for detecting ATA ATA PI de
19. Super Micro Computer Inc you may not copy any part of this document Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 2008 by Super Micro Computer Inc All rights reserved Printed in the United States of America Preface Preface About This Manual This manual is written for system integrators PC technicians and knowledgeable PC users It provides information for the installation and use of the H8DM3 2 H8DMi 2 serverboard The H8DM3 2 H8DMi 2 is based on the nVidia MCP55 Pro AMD 8132 chipset and supports single or dual AMD Opteron 2000 Series Socket F type processors and up to 64 GB of DDR2 667 or 32 GB of DDR2 533 400 registered ECC SDRAM Please refer to the serverboard specifications pages on our web site for updates on supported processors http www supermicro com aplus This product is intended to be professionally installed Manual Organization Chapter 1 includes a checklist of what should be included in your serverboard box describes the features specifications and performance of the serverboard and provides detailed information about the chipset Chapter 2 begins with instructions on handling static sensitive devices Read this chapter when installing the processor s and memory modules and when installing the serverboard in a chassis Also r
20. The BIOS stack has been built Next disabling cache memory 06h Uncompressing the POST code next 07h Next initializing the CPU and the CPU data area 08h The CMOS checksum calculation is done next OAh The CMOS checksum calculation is done Initializing the CMOS status register for date and time next OBh The CMOS status register is initialized Next performing any required initialization before the keyboard BAT command is issued OCh The keyboard controller input buffer is free Next issuing the BAT command to the keyboard controller OEh The keyboard controller BAT command result has been verified Next performing any necessary initialization after the keyboard controller BAT command test OFh The initialization after the keyboard controller BAT command test is done The key board command byte is written next 10h The keyboard controller command byte is written Next issuing the Pin 23 and 24 blocking and unblocking command 11 Next checking if lt End or lt Ins gt keys were pressed during power on Initializing CMOS if the Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the lt End gt key was pressed Next disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2 The video display has been disabled Port B has been initialized Next initializing the chipset The 8254 timer test will begin next Next programming the flash ROM The memory refresh line is
21. and Disabled Serial 0 1 2 Primary Secondary Channel Highlight one of the items above and press Enter to access the submenu for that item If a drive is present information on that drive will be displayed here LBA Large Mode LBA Logical Block Addressing is a method of addressing data on a disk drive The options are Disabled and Auto 4 7 H8DM3 2 H8DMi 2 User s Manual Block Multi Sector Transfer Block mode boosis IDE drive performance by increasing the amount of data transferred Only 512 bytes of data can be transferred per interrupt if block mode is not used Block mode allows transfers of up to 64 KB per interrupt Select Disabled to allow the data to be transferred from and to the device one sec tor at a time Select Auto to allows the data transfer from and to the device occur multiple sectors at a time if the device supports it The options are Auto and Disabled PIO Mode PIO Programmable I O mode programs timing cycles between the IDE drive and the programmable IDE controller As the mode increases the cycle time decreases The options are Auto 0 1 2 3 and 4 Select Auto to allow AMI BIOS to auto detect the PIO mode Use this value if the IDE disk drive support cannot be determined Select 0 to allow AMI BIOS to use PIO mode 0 It has a data transfer rate of 3 3 MBs Select 1 to allow AMI BIOS to use PIO mode 1 It has a data transfer rate of 5 2 MBs Select 2 to allow AMI BIOS to use
22. completed The adap tor ROM check is next The adaptor ROM had control and has now returned control to BIOS POST Perform ing any required processing after the option ROM returned control Any initialization required after the option ROM test has completed Configuring the timer data area and printer base address next Set the timer and printer base addresses Setting the RS 232 base address next Returned after setting the RS 232 base address Performing any required initializa tion before the Coprocessor test next Required initialization before the Coprocessor test is over Initializing the Coproces sor next Coprocessor initialized Performing any required initialization after the Coproces sor test next Initialization after the Coprocessor testis complete Checking the extended keyboard keyboard ID and Num Lock key next Issuing the keyboard ID command next Displaying any soft errors next The soft error display has completed Setting the keyboard typematic rate next The keyboard typematic rate is set Programming the memory wait states next Memory wait state programming is over Clearing the screen and enabling parity and the NMI next NMI and parity enabled Performing any initialization required before passing control to the adaptor ROM at E000 next Initialization before passing control to the adaptor ROM at E000h completed Passing control to the adaptor ROM at E000h next B 6 Checkpoint A9h
23. memory module vertically into its slot paying attention to the notch along the bottom of the module to prevent inserting the module incorrectly see Figure 2 2 See support information below 2 Gently press down on the memory module until it snaps into place Note each processor has its own built in memory controller so the CPU2 DIMMs cannot be addressed if only a single CPU is installed 128 MB 256 MB 512 MB 1 GB 2 GB and 4 GB memory modules are supported It is highly recommended that you remove the power cord from the system before installing or changing any memory modules H8DM3 2 H8DMi 2 User s Manual Support The H8DM3 2 H8DMi 2 supports single or dual channel DDR2 667 533 400 reg istered ECC SDRAM Both interleaved and non interleaved memory are supported so you may populate any number of DIMM slots see note on previous page and charts on following page The CPU2 DIMM slots can only be accessed when two CPUs are installed however the CPU2 DIMM slots are not required to be populated when two CPUs are installed Populating two adjacent slots at a time with memory modules of the same size and type will result in interleaved 128 bit memory which is faster than non interleaved 64 bit memory See charts on following page Optimizing memory performance If two processors are installed it is better to stagger pairs of DIMMs across both sets of CPU DIMM slots e g first populate CPU1 slots 1A and 1B then CPU2 slots
24. of California County of Santa Clara shall be the exclusive venue for the resolution of any such disputes Supermicro s total liability for all claims will not exceed the price paid for the hardware product FCC Statement This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the manufacturer s instruction manual may cause harmful interference with radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case you will be required to correct the interference at your own expense California Best Management Practices Regulations for Perchlorate Materials This Perchlorate warning applies only to products containing CR Manganese Dioxide Lithium coin cells Perchlorate Material special handling may apply See www dtsc ca gov hazardouswaste perchlorate WARNING Handling of lead solder materials used in this product may expose you to lead a chemical known to the State of California to cause birth defects and other reproductive harm Manual Revision 1 1a Release Date October 9 2008 Unless you request and receive written permission from
25. the serial port from accessing any system 4 10 Chapter 4 BIOS resources When this option is set to Disabled the serial port physically becomes unavailable Select 2F8 IRQ3 to allow the serial port to use 2F8 as its I O port address and IRQ 3 for the interrupt address The options are Disabled 2F8 IRQ3 3E8 IRQ4 and 2E8 IRQ3 Serial Port 2 Mode Tells BIOS which mode to select for serial port 2 The options are Normal IrDA and ASKIR Parallel Port Address This option specifies the I O address used by the parallel port Select Disabled to prevent the parallel port from accessing any system resources When the value of this option is set to Disabled the printer port becomes unavailable Select 378 to allow the parallel port to use 378 as its I O port address The majority of parallel ports on computer systems use IRQ7 and Port 378H as the standard setting Select 278 to allow the parallel port to use 278 as its I O port address Select 3BC to allow the parallel port to use 3BC as its I O port address Parallel Port Mode Specify the parallel port mode The options are Normal Bi directional EPP and ECP Parallel Port IRQ Select the IRQ interrupt request for the parallel port The options are IRQ5 1807 4 11 H8DM3 2 H8DMi 2 User s Manual gt Chipset Configuration gt NorthBridge Configuration gt Memory Configuration Bank Interleaving Select Auto to automatically enable a bank interl
26. your system Updated BIOS files are located on our web site Please check our BIOS warning message and the information on how to update your BIOS on our web site Also check the current BIOS revision and make sure it is newer than your current BIOS before downloading Select your mainboard model on the web page and download the corresponding BIOS file to your computer Unzip the BIOS update file in which you will find the readme txt flash instructions the afudos exe BIOS flash utility and the BIOS image xxx rom files Copy these files to a bootable floppy disk insert the disk into drive A and reboot the system At the DOS prompt after rebooting enter the command flash without quotation marks then type in the BIOS file that you want to update with xxxx rom Question What s on the CD that came with my serverboard Answer The supplied compact disc has quite a few drivers and programs that will greatly enhance your system We recommend that you review the CD and install the applications you need Applications on the CD include chipset drivers for Windows and security and audio drivers 3 3 H8DM3 2 H8DMi 2 User s Manual Question Why can t turn off the power using the momentary power on off switch Answer The instant power off function is controlled in BIOS by the Power But ton Mode setting When the On Off feature is enabled the serverboard will have instant off capabilities as long as the BIOS has control of the sy
27. 0 00 and 5 30 P M as 17 30 00 4 3 Advanced Settings Menu gt Boot Features Quick Boot If Enabled this option will skip certain tests during POST to reduce the time needed for the system to boot up The options are Enabled and Disabled Quiet Boot If Disabled normal POST messages will be displayed on boot up If Enabled this display the OEM logo instead of POST messages Add On ROM Display Mode Set this option to display add on ROM read only memory messages The de fault setting is Force BIOS Select Force BIOS to allow the computer system to force a third party BIOS to display during system boot Select Keep Current to allow the computer system to display the BIOS information during system boot The options are Force BIOS and Keep Current 4 2 Chapter 4 BIOS Boot up Num Lock Set this value to allow the Number Lock setting to be modified during boot up The options are On and Off PS 2 Mouse Support Set this value to modify support for a PS 2 mouse The options are Auto En abled and Disabled Wait for F1 If Error Select Enable to activate the Wait for F1 if Error function The options are Enabled and Disabled Hit DEL Message Display Select Enabled to display message to hit the DEL key to enter Setup The op tions are Enabled and Disabled Interrupt 19 Capture Select Enabled to allow ROMs to trap Interrupt 19 The options are Enabled and Disabled OS Installation Change this
28. 2 4 3 Advanced Settings Menu 4 2 4 4 Boot Men e 4 17 4 5 Security Men mm 4 17 4 6 4 18 Appendices Appendix A BIOS Error Beep Codes Appendix B BIOS POST Checkpoint Codes vi Chapter 1 Introduction 1 1 Chapter 1 Introduction Overview Checklist Congratulations on purchasing your computer serverboard from an acknowledged leader in the industry Our boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance Please check that the following items have all been included with your serverboard If anything listed here is damaged or missing contact your retailer Included with retail box only One 1 H8DM3 2 H8DMi 2 serverboard One 1 IDE cable CBL 036L 02 One 1 floppy cable CBL 022L One 1 COM port cable CBL 010 Two 2 SAS cables H8DM3 2 only CBL 0097L 02 Four 4 SATA cables H8DM3 2 only CBL 044L Six 6 SATA cables H8DMi 2 only CBL 044L Two 2 heatsink retention modules with four 4 screws BKT 0012L One 1 I O shield for chassis CSE PT7L One 1 CD containing drivers and utilities H8DM3 2 H8DMi 2 User s Manual Contacting Supermicro Headquarters Address Super Micro Computer Inc 980 Rock Ave San Jose CA 95131 U S A Tel 1 408 503 8000 Fax 1 408 503 8008 Email marketing supermicro com General Information support supe
29. Aah Abh BOh Bih 00h Appendix B BIOS POST Checkpoint Codes Code Description Returned from adaptor ROM at E000h control Performing any initialization required after the E000 option ROM had control next Initialization after E000 option ROM control has completed Displaying the system configuration next Uncompressing the DMI data and executing DMI POST initialization next The system configuration is displayed Copying any code to specific areas Code copying to specific areas is done Passing control to INT 19h boot loader next B 7 H8DM3 2 H8DMi 2 User s Manual Notes B 8
30. D optional RAID 5 support with I Button installed One 1 UltraDMA ATA 133 100 IDE port One 1 floppy port interface up to 2 88 MB Two 2 Fast UART 16550 compatible serial ports On chip nVidia MCP55 Ethernet controller supports two Gigabit LAN ports e PS 2 mouse and PS 2 keyboard ports Six 6 USB Universal Serial Bus 2 0 ports headers Other e Wake on Ring JWOR e Wake on LAN JWOL Onboard 5V power LED Chassis intrusion detection CD Utilities BIOS flash upgrade utility Dimensions Extended ATX form factor 12 x 13 05 305 x 332 mm 1 7 H8DM3 2 H8DMi 2 User s Manual DDR2 667 533 400 128 bit data 16 bit ECC DIMM2A 16 x16 link 1 GHz DIMM2B DIMM1A DIMM1B AMD Socket F 128 bit data 16 bit DDR2 667 533400 lt gt CPU2 AMD Socket F 16 x 16 HT link 800 MHz 16x16 HT link 1 GHz DIMM2A DIMM 2B DIMM 1A DIMM 1B v PCI 32 Slot 1 PCI X 133 100 MHz Slot 2 PCI X 133 100 MHz Slot 3 PCI X 133 MHz 4 51000 H W Monitor Fan Conn gt SATA Ports 6 ATA133 Port 1 nVidia USB Ports 6 MCP55Pro GLAN Ports 2 Slot 4 PCI E x4 Slot 5 PCI E x8
31. N1 2 nFAN1 SASO0 3 SAS4 7 SATAO SATA5 SGPIO1 SGPIO2 SIMLP USBO 1 USB2 3 USB4 5 Indicators DP2 H8DM3 2 only Description Default Setting Power Supply Fail Detect Closed Enabled CMOS Clear See Section 2 7 Compact Flash Master Slave Closed Master to PCI X Enable Disable X Pins 2 3 Disabled to PCI E Enable Disable Pins 2 3 Disabled VGA Enable Disable Pins 1 2 Enabled SAS RAID Select Closed SR RAID PCI X Slot 1 amp 2 Freq Open Auto Watch Dog Pins 1 2 Reset Description 1 2 Serial Port Header System Fan Headers Floppy Disk Drive Connector RAID 5 Enable Button optional IDE Drive Connector 24 Pin ATX Power Connector Power Fail Alarm Reset Header Front Panel Connector Onboard Speaker Keylock Power LED Chassis Intrusion Header Overheat Warning Header Power Supply Header 8 Pin Processor Power Connector 4 pin Auxiliary Power Connector Power Supply Fail Alarm Header Compact Flash Card Power Connector Wake On LAN Header Wake On Ring Header Gigabit Ethernet RJ45 Ports Chipset Heatsink Fan Header SAS Ports Serial ATA Ports SGPIO Headers IPMI 2 0 Card Slot Universal Serial Bus USB Ports 0 1 USB Headers Description Onboard Power LED 1 5 H8DM3 2 H8DMi 2 User s Manual Serverboard Features CPU Single or dual AMD Opteron 2000 Series Socket type processors Memory Eight dual single channel DIMM slots supporting up to 64 GB of DDR2 667 or 32
32. SUPER H8DM3 2 H8DMi 2 USER S MANUAL Revision 1 1a The information in this User s Manual has been carefully reviewed and is believed to be accurate The vendor assumes no responsibility for any inaccuracies that may be contained in this document makes no commitment to update or to keep current the information in this manual or to notify any person or organization of the updates Please Note For the most up to date version of this manual please see our web site at www supermicro com Super Micro Computer Inc reserves the right to make changes to the product described in this manual at any time and without notice This product including software if any and documenta tion may not in whole or in part be copied photocopied reproduced translated or reduced to any medium or machine without prior written consent IN EVENT WILL SUPERMICRO BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN PARTICULAR SUPERMICRO SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HARDWARE SOFTWARE OR DATA Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California USA The State
33. Then Select OK to allow BIOS to automatically load the Optimal Defaults as the BIOS Settings The Optimal settings are designed for maximum system performance but may not work best for all computer applications Load Fail Safe Defaults To set this feature select Load Fail Safe Defaults from the Exit menu and press lt Enter gt The Fail Safe settings are designed for maximum system stability but not maximum performance 4 18 Appendix A BIOS Error Beep Codes Appendix A BIOS Error Beep Codes During the POST Power On Self Test routines which are performed each time the system is powered on errors may occur Non fatal errors are those which in most cases allow the system to continue the boot up process The error messages normally appear on the screen Fatal errors are those which will not allow the system to continue the boot up pro cedure a fatal error occurs you should consult with your system manufacturer for possible repairs These fatal errors are usually communicated through a series of audible beeps The numbers on the fatal error list on the following page correspond to the number of beeps for the corresponding error All errors listed with the exception of Beep Code 8 are fatal errors POST codes may be read on the debug LEDs located beside the LAN port on the serverboard backplane See the description of the Debug LEDs LED1 and LED2 in Chapter 5 1 AMIBIOS Error Beep Codes Beep Code Error
34. This connection supplies power to T e the chipset fans and memory 19 COM 20 _ Res NC 8 Note You must also connect the 8 ay 8 JPW1 4 JPW2 power Bo uen rer connectors to your power supply see umm mus 24 12 3 3 Processor Power Connector In addition to the primary ATX power connector above the 12v 8 pin processor power connector at JPW1 must also be connected to your power supply This connection supplies power to the CPUs See the table on the right for pin definitions Auxiliary Power Connector The 4 pin auxiliary power connector Pins Definition at JPW2 must also be connected to 1 amp 2 Ground your power supply This connection 4 12V supplies extra power that may be a S needed for high loads See the table on the right for pin definitions Power LED The Power LED connection is located on pins 15 and 16 of JF1 Refer to the table on the right for pin definitions 2 9 Pins 1 through 4 5 through 8 Required Co Connec Processor Power Pin Definitions JPW1 Auxiliary Power Pin Definitions JPW2 tor Definition Ground 412V nnection tor Required Connection 15 Pin Definitions Pin Definition 16 Control H8DM3 2 H8DMi 2 User s Manual HDD LED The HDD IDE Hard Disk Driv
35. able Disable Jumper Settings JPG1 Jumper Setting Definition Pins 1 2 Enabled Pins 2 3 Disabled H8DM3 2 H8DMi 2 User s Manual PCI X Slot Speed Jumper JPXA1 on the H8DM3 2 H8DMi 2 is used to change the speed of PCI X slots 1 amp 2 Jumper JPXB1 is used to change the speed of PCI X slot 3 See the tables on the right for jumper settings Note JPXA1 controls the speed for PCI X slots 1 and 2 JPXB1 controls the speed for PCI X slot 3 The default setting for both is Open Auto Compact Flash Master Slave The JCF1 jumper allows you to assign either master or slave status a compact flash card installed in IDE1 See the table on the right for jumper settings Power Supply Fail Detect Enable Disable The system can notify you in the event of a power supply failure This feature assumes that redundant power supply modules are installed in the chassis If you only have a single power supply installed you should disable this func tion with J3P to prevent false alarms See the table on the right for jumper settings SAS RAID Select JPS1 allows you to select between SR RAID which is the default and enables SAS RAID or IT RAID which treats SAS drives as non RAID drives and requires a firmware flash See the table on the right for jumper set tings and the following page for the IT firmware flash procedure 2 18 PCI X Slot Speed Jumper Settings JPX1A JPX1B Jumper Setting Definition
36. at BIOS has default text messages built in We retain the option to include omit or change any of these text messages Set tings printed in Bold are the default values A P indicates a submenu Highlighting such an item and pressing the lt Enter gt key will open the list of settings within that submenu The BIOS setup utility uses a key based navigation system called hot keys Most of these hot keys lt F1 gt lt F10 gt lt Enter gt lt ESC gt lt Arrow gt keys etc can be used at any time during the setup navigation process 4 1 H8DM3 2 H8DMi 2 User s Manual 4 2 Main Menu When you first enter AMI BIOS Setup Utility you will see the Main Menu screen You can always return to the Main Menu by selecting the Main tab on the top of the screen with the arrow keys The Main Menu screen provides you with a system overview which includes the version built date and ID of the AMIBIOS the type speed and number of the processors in the system and the amount of memory installed in the system System Time System Date You can edit this field to change the system time and date Highlight System Time or System Date using the Arrow keys Enter new values through the keyboard Press the lt Tab gt key or the Arrow keys to move between fields The date must be entered in DAY MM DD YYYY format The time is entered in HH MM SS format Please note that time is in a 24 hour format For example 5 30 A M appears as 05 3
37. d and initialized Saving the memory size information next The memory size information and the CPU registers are saved Entering real mode next Shutdown was successful The CPU is in real mode Disabling the Gate A20 line parity and the NMI next The A20 address line parity and the NMI are disabled Adjusting the memory size depending on relocation and shadowing next The memory size was adjusted for relocation and shadowing Clearing the Hit DEL message next The Hit DEL message is cleared The WAIT message is displayed Starting the DMA and interrupt controller test next The DMA page register test passed Performing the DMA Controller 1 base register test next The DMA controller 1 base register test passed Performing the DMA controller 2 base register test next The DMA controller 2 base register test passed Programming DMA controllers 1 and 2 next Completed programming DMA controllers 1 and 2 Initializing the 8259 interrupt controller next Completed 8259 interrupt controller initialization Extended NMI source enabling is in progress The keyboard test has started Clearing the output buffer and checking for stuck keys Issuing the keyboard reset command next A keyboard reset error or stuck key was found Issuing the keyboard controller interface test command next The keyboard controller interface test completed Writing the command byte and initializing
38. ducts a stable power source is necessary for proper and reliable operation It is even more important for processors that have high CPU clock rates The H8DM3 2 H8DMi 2 accommodates 12V ATX power supplies Although most power supplies generally meet the specifications required by the CPU some are inadequate A 2 amp current supply on a 5V Standby rail is strongly recom mended It is strongly recommended that you use a high quality power supply that meets 12V ATX power supply Specification 1 1 or above Additionally in areas where noisy power transmission is present you may choose to install a line filter to shield the computer from noise It is recommended that you also install a power surge protector to help avoid problems caused by power surges Warning To prevent the possibility of explosion do not use the wrong type of onboard CMOS battery or install it upside down Chapter 1 Introduction 1 6 Super I O The disk drive adapter functions of the Super I O chip include a floppy disk drive controller that is compatible with industry standard 82077 765 a data separator write pre compensation circuitry decode logic data rate selection a clock genera tor drive interface control logic and interrupt and DMA logic The wide range of functions integrated onto the Super I O greatly reduces the number of components required for interfacing with floppy disk drives The Super I O supports two 360 K 720 K 1 2 M 1 44 M or 2 88 M disk dr
39. e LED connection is located on pins 13 and 14 of JF1 Attach the IDE hard drive LED cable to display disk activity Refer to the table on the right for pin definitions NIC1 LED The NIC1 Network Interface Control ler LED connection is located on pins 11 and 12 of JF1 Attach the NIC1 LED cable to display network activity Refer to the table on the right for pin definitions NIC2 LED The NIC2 Network Interface Control ler LED connection is located on pins 9 and 10 of JF1 Attach the NIC2 LED cable to display network activity Refer to the table on the right for pin definitions Overheat Fan Fail LED Connect an LED to the OH connection on pins 7 and 8 of JF1 to provide ad vanced warning of chassis overheat ing Refer to the table on the right for pin definitions and status indicators Power Fail LED The Power Fail LED connection is located on pins 5 and 6 of JF1 Refer to the table on the right for pin defini tions This feature is only available for systems with redundant power supplies 2 10 HDD LED Pin Definitions JF1 Pin Definition Vcc HD Active Pin Definition 11 veo Pin Definition 9 Vcc OH Fan Fail LED Pin Definitions JF1 OH Fan Fail LED Status Pin Definition State Indication 7f Vcc Solid Overheat Control Blinking Fan fail Power Fail LED Pin Definitions JF1 Pin Definition 5 Vcc Control Reset Button The Reset Button connection is
40. e Access Allows you to Enable or Disable remote access If enabled the settings below will appear Serial Port Number Selects the serial port to use for console redirection Options are COM1 and 2 Serial Port Mode Selects the serial port settings to use Options are 115200 8 n 1 57600 8 n 1 38400 8 1 19200 8 1 and 09600 8 1 Flow Control Selects the flow control to be used for console redirection Options are None Hardware and Software 4 15 H8DM3 2 H8DMi 2 User s Manual Redirection After BIOS POST Options are Disable no redirection after BIOS POST Boot Loader redirection during POST and during boot loader and Always redirection always active Note that some OS s may not work with this set to Always Terminal Type Selects the type of the target terminal Options are ANSI VT100 and VT UTF8 VT UTF8 Combo Key Support Allows you to Enable or Disable VT UTF8 combination key support for ANSI VT100 terminals Sredir Memory Display Delay Use this setting to set the delay in seconds to display memory information Options are No Delay 1 sec 2 secs and 4 secs gt System Health Monitor CPU Overheat Alarm Use the and keys to set the CPU temperature threshold to between 65 and 90 C When this threshold is exceeded the overheat LED on the chas sis will light up and an alarm will sound The LED and alarm will turn off once the CPU temperature has dropped
41. e floppy controller on the motherboard which may be Enabled or Disabled with this setting Serial ATA Devices This setting is used to determine if SATA drives will be used and how many Op tions are Disabled Device 0 Device 0 1 and Device 0 1 2 nVidia RAID Function This setting is used to Enable or Disable the nVidia ROM Primary IDE Master Slave Highlight one of the items above and press lt Enter gt to access the submenu for that item Type Select the type of device connected to the system The options are Not Installed Auto CDROM and ARMD LBA Large Mode LBA Logical Block Addressing is a method of addressing data on a disk drive The options are Disabled and Auto Block Multi Sector Transfer Block mode boosis IDE drive performance by increasing the amount of data transferred Only 512 bytes of data can be transferred per interrupt if block mode is not used Block mode allows transfers of up to 64 KB per interrupt Select Disabled to allow the data to be transferred from and to the device one sec tor at a time Select Auto to allows the data transfer from and to the device occur multiple sectors at a time if the device supports it The options are Auto and Disabled 4 6 Chapter 4 BIOS PIO Mode PIO Programmable I O mode programs timing cycles between the IDE drive and the programmable IDE controller As the PIO mode increases the cycle time decreases The options are Auto 0 1 2 3 and 4 Se
42. e the 3 Tachometer table on the right for pin definitions Power LED Speaker Keylock On JF2 pins 2 4 and 6 are for the power LED pins 1 3 5 and 7 are for the speaker and pins 8 and 10 are for the keylock See the tables on the right for pin definitions Note The speaker connector pins are for use with an external speaker you wish to use the onboard speaker you should close pins 5 and 7 with a jumper Utilizing the keylock header allows you to inhibit any actions made on the keyboard effectively locking it Overheat LED Connect an LED to the JOH1 header to provide warning of chassis over heating See the table on the right for pin definitions Chassis Intrusion A Chassis Intrusion header is located at JL1 Attach the appropriate cable to inform you of a chassis intrusion Wake On LAN The Wake On LAN header is desig nated JWOL See the table on the right for pin definitions You must have a LAN card with a Wake On LAN connector and cable to use the Wake On LAN feature Note Wake On LAN from S3 S4 S5 are supported by LAN1 LAN2 sup ports Wake On LAN from 51 only 2 13 Chapter 2 Installation PWR LED Connector Pin Definitions JF2 Pin Definition 2 4 6 Vcc Control Control Speaker Connector Pin Definitions JF2 Pin Definition 1 3 5 7 Red wire 5V No connection Buzzer signal Speaker data Overheat LED Pin D
43. ead Spectrum Enables spread spectrum for the SATA Options are Enabled and Disabled Primary Graphics Adapter Options are PCI Express gt PCI and PCI gt PCI Express USB 1 1 Controller Enable or disable the USB 1 1 controller USB 2 0 Controller Enable or disable the USB 2 0 controller MACO LANO Settings are Auto and Disabled for MACO LANO MAC1 LAN1 Settings are Auto and Disabled for MAC1 LAN1 Legacy USB Support Select Enabled to enable the support for USB Legacy Disable Legacy support if there are no USB devices installed in the system Auto disabled Legacy support if no USB devices are connected The options are Disabled Enabled and Auto Chapter 4 BIOS USB 2 0 Controller Mode Select the controller mode for your USB ports Options are HiSpeed and FullSpeed HiSpeed 480 Mbps FullSpeed 12 Mbps BIOS EHCI Hand Off Enable or Disable a workaround for OS s without EHCI hand off support gt Event Log Configuration View Event Log Highlight this item and press lt Enter gt to view the contents of the event log Mark All Events as Read Highlight this item and press lt Enter gt to mark all events as read Clear Event Log Select Yes and press lt Enter gt to clear all event logs The options are Yes and No to verify gt PCI Express Configuration Active State Power Management Used to Enable or Disable the PCI Express LO and L1 link power states gt Remote Acess Configuration Remot
44. eature is available when the user enables the CPU overheat Fan Fail warning function in the BIOS This allows the user to define an overheat temperature When this temperature is exceeded or when a fan failure occurs then the Overheat Fan Fail warning LED is triggered Auto Switching Voltage Regulator for the CPU Core The 3 phase switching voltage regulator for the CPU core can support up to 80A and auto sense voltage IDs ranging from 0 8 V to 1 55V This will allow the regulator to run cooler and thus make the system more stable Chapter 1 Introduction 1 4 Power Configuration Settings This section describes the features of your serverboard that deal with power and power settings Microsoft OnNow The OnNow design initiative is a comprehensive system wide approach to system and device power control OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other requests Slow Blinking LED for Suspend State Indicator When the CPU goes into a suspend state the chassis power LED will start blinking to indicate that the CPU is in suspend mode When the user presses any key the CPU will wake up and the LED will automatically stop blinking and remain on BIOS Support for USB Keyboard If a USB keyboard is the only keyboard in the system it will function like a normal keyboard during system boot up Main Switch Override Mechanism When an ATX power supply is used the power button ca
45. eaving memory scheme when this function is supported by the processor The options are Auto and Disabled Channel Interleaving Selects the channel interleaving memory scheme when this function is supported by the processor The options are Disabled Address Bits 6 Address Bits 12 XOR of Address Bits 20 16 6 and XOR of Address Bits 20 16 9 Enable Clock to All Dimms Use this setting to enable unused clocks to all DIMMSs even if some DIMM slots are unpopulated Options are Enabled and Disabled Mem Clk Tristate C3 ALTVID Use this setting to Enable or Disable memory clock tristate during C3 and ALT VID Memory Hole Remapping When Enabled this feature enables hardware memory remapping around the memory hole Options are Enabled and Disabled CS Sparing This setting will reserve a spare memory rank in each node when enabled Options are Enable and Disable DCT Unganged Mode This setting enables unganged DRAM mode 64 bit Options are Auto ganged mode and Always unganged mode Power Down Enable This setting enables or disables DDR power down mode Options are Enabled and Disabled Chapter 4 BIOS Power Down Mode This sets the power down mode Options are Channel and Chip Select gt ECC Configuration DRAM ECC Enable DRAM ECC allows hardware to report and correct memory errors automati cally Options are Enabled and Disabled DRAM Scrub Redirect Allows system to correct DRAM ECC errors immediat
46. efer to this chapter to connect the floppy and hard disk drives the parallel and serial ports the mouse and keyboard and the twisted wires for the power and reset buttons and the system LEDs If you encounter any problems see Chapter 3 which describes troubleshooting procedures for the video the memory and the setup configuration stored in CMOS For quick reference a general FAQ Frequently Asked Questions section is pro vided Instructions are also included for contacting technical support In addition you can visit our web site for more detailed information Chapter 4 includes an introduction to BIOS and provides detailed information on running the CMOS Setup utility Appendix A provides BIOS Error Beep Code Messages Appendix B lists BIOS POST Checkpoint Codes H8DM3 2 H8DMi 2 User s Manual Table of Contents Chapter 1 Introduction 1 1 12 1 3 1 4 1 5 1 6 c M 1 1 usc erc 1 1 Contacting 2 iC censu RE Maps 1 2 HSDNIS SIHBDMIE MAJE 1 8 2 2 Serverboard Layout nares 1 4 H8DM3 2 H8DMi 2 Quick Reference 1 5 S rverboard Features ice toca 1 6 nVidia nVidia MCP55 Pro Chipset System Block Diagram 1 7 Chipset
47. efinitions JOH1 Pin Definition 1 3 3V OH Active Chassis Intrusion Pin Definitions JL1 Pin Definition 1 Battery voltage Intrusion signal Wake On LAN Pin Definitions JWOL Pin Definition 1 sv Standby 2 Ground Wake up H8DM3 2 H8DMi 2 User s Manual Wake On Ring The Wake On Ring header is desig nated JWOR This function allows your computer to receive and wake by an incoming call to the modem when in suspend state See the table on the right for pin definitions You must have a Wake On Ring card and cable to use this feature Power Supply Header The header is for 1 C which may be used to monitor the status of the power supply fans and system temperature See the table on the right for pin definitions LAN1 2 Ethernet Ports Two Gigabit Ethernet ports desig nated LAN1 and LAN2 are located beside the VGA port These Ethernet ports accept RJ45 type cables Power Supply Fail Alarm Reset Header Connect JAR to the alarm reset but ton on your chassis if available or to a microswitch to allow you to turn off the alarm that sounds when a power supply module fails See the table on the right for pin definitions Wake On Ring Pin Definitions JWOR Pin Definition 1 Ground Black Header Pin Definitions Pin Definition 1 Clock Data PWR Fail Gnd Alarm Reset Header Pin Definitions JAR
48. ely even with background scrubbing on Options are Enabled and Disabled 4 Bit ECC Mode Allows the user to enabled 4 bit ECC mode also known as ECC Chipkill Options are Enabled and Disabled DRAM BG Scrub Corrects memory errors so later reads are correct Options are Dis abled and various times in nanoseconds and microseconds L2 Cache BG Scrub Allows L2 cache RAM to be corrected when idle Options are Disabled and various times in nanoseconds and microseconds L3 Cache BG Scrub Allows L3 cache RAM to be corrected when idle Options are Disabled and various times in nanoseconds and microseconds DRAM Timing Configuration Memory Clock Mode This setting specifies the memory clock mode Options are Auto Limit and Manual DRAM Timing Mode This setting specifies the DRAM timing mode Options are Auto DCTO DCT1 and Both Power Down Control Allows DIMMs to enter power down mode by deasserting the clock enable signal when DIMMs are not in use Options are Auto and Disabled 4 13 H8DM3 2 H8DMi 2 User s Manual Alternate VID Specify the alternate VID while in low power states Options are Auto and vari ous voltages from 800V to 1 050V in increments of 025V gt SouthBridge Configuration CPU LDT Spread Spectrum Enables spread spectrum for the CPU LDT Options are Center Spread Down Spread or Disabled PCIE Spread Spectrum Allows you to Enable or Disable spread spectrum for PCI Express SATA Spr
49. is setting allows SMI wrapper support for PnP function 50h 54h The options are Enabled and Disabled 4 4 Chapter 4 BIOS gt CPU Configuration MThe submenu lists CPU information and the following settings GART Error Reporting This setting is used for testing only setting should be disabled Microcode Update This setting is used to Enable or Disable updating the microcode Secure Virtual Machine Mode This setting is used to Enable or Disable SVM Power Now This setting is used to Enable or Disable the AMD Power Now feature ACPI SRAT Table This setting is used to Enable or Disable the building of the ACPI SRAT table Thermal Throttling This setting is used to Enable or Disable Thermal Throttling CPU Page Translation Table This setting is used to Enable or Disable the CPU Page Translation Table gt Floppy IDE SATA Configuration Floppy A Move the cursor to these fields via up and down lt arrow gt keys to select the floppy type The options are Disabled 360 KB 5 1 4 1 2 MB 5 1 4 720 KB 37 1 44 MB 3 and 2 88 MB 377 Floppy B Move the cursor to these fields via up and down arrow keys to select the floppy type The options are Disabled 360 KB 5 1 4 1 2 MB 5 1 4 720 KB 3 1 44 MB 377 and 2 88 MB 37 4 5 H8DM3 2 H8DMi 2 User s Manual Onboard Floppy Controller Use this setting to Enable or Disable the onboard floppy controller Onboard IDE Controller There is a singl
50. ives and data transfer rates of 250 Kb s 500 Kb s or 1 Mb s It also provides two high speed 16550 compatible serial communication ports UARTs one of which supports serial infrared communication Each UART in cludes a 16 byte send receive FIFO a programmable baud rate generator complete modem control capability and a processor interrupt system Both UARTs provide legacy speed with baud rate of up to 115 2 Kbps as well as an advanced speed with baud rates of 250 K 500 K or 1 Mb s which support higher speed modems The Super I O supports one PC compatible printer port SPP Bi directional Printer Port BPP Enhanced Parallel Port EPP or Extended Capabilities Port ECP The Super I O provides functions that comply with ACPI Advanced Configuration and Power Interface which includes support of legacy and ACPI power manage ment through a SMI or SCI function pin It also features auto power management to reduce power consumption The IRQs DMAs and I O space resources of the Super I O can be flexibly adjusted to meet ISA PnP requirements which support ACPI and APM Advanced Power Management H8DM3 2 H8DMi 2 User s Manual Notes Chapter 2 Installation Chapter 2 Installation 2 1 Static Sensitive Devices Electrostatic Discharge ESD can damage electronic components To prevent dam age to your system board it is important to handle it very carefully The following measures are generally sufficient to protec
51. lect Auto to allow AMI BIOS to auto detect the PIO mode Use this value if the IDE disk drive support cannot be determined Select 0 to allow AMI BIOS to use PIO mode 0 It has a data transfer rate of 3 3 MBs Select 1 to allow AMI BIOS to use PIO mode 1 It has a data transfer rate of 5 2 MBs Select 2 to allow AMI BIOS to use PIO mode 2 It has a data transfer rate of 8 3 MBs Select 3 to allow AMI BIOS to use PIO mode 3 It has a data transfer rate of 11 1 MBs Select 4 to allow AMI BIOS to use PIO mode 4 It has a data transfer rate of 16 6 MBs This setting generally works with all hard disk drives manufactured after 1999 For other disk drives such as IDE CD ROM drives check the specifications of the drive DMA Mode Selects the DMA Mode Options are Auto SWDMAO SWDMA1 SWDMA2 MWDMAO MDWDMA1 MWDMA2 UDMAO UDMA1 UDMA2 UDMAS UDMA4 and UDMAS SWDMA Single Word MWDMA Multi Word DMA UDMA UltraDMA S M A R T Self Monitoring Analysis and Reporting Technology SMART can help predict impending drive failures Select Auto to allow BIOS to auto detect hard disk drive support Select Disabled to prevent AMI BIOS from using the S M A R T Select Enabled to allow AMI BIOS to use the S M A R T to support hard drive disk The options are Disabled Enabled and Auto 32 Bit Data Transfer Select Enabled to activate the function of 32 Bit data transfer Select Disabled to deactivate the function The options are Enabled
52. lo cated on pins 3 and 4 of JF1 Attach it to the hardware reset switch on the computer case Refer to the table on the right for pin definitions Power Button The Power Button connection is located on pins 1 and 2 of JF1 Mo mentarily contacting both pins will power on off the system This button can also be configured to function as a suspend button see the Power Button Mode setting in BIOS To turn off the power when set to suspend mode depress the button for at least 4 seconds Refer to the table on the right for pin definitions Universal Serial Bus Ports 05 0 1 Two Universal Serial Bus ports USB2 0 are located beside the LAN1 2 ports See the table on the right for pin definitions USB Headers Four additional USB2 0 headers USB2 3 and USB4 5 are included on the serverboard These may be con nected to provide front side access A USB cable not included is needed for the connection See the table on the right for pin definitions 2 11 Chapter 2 Installation Reset Button Pin Definitions JF1 Pin Definition 3 Reset 4 Ground Power Button Pin Definitions JF1 Pin Definition 1 ON 2 Ground Universal Serial Bus Ports Pin Definitions USBO 1 USBO USB1 Pins Definition Pin Definition 1 5V PO PO Ground USB2 USB3 4 Pin Definition Pin Definition 1 5V PO PO Ground Ground No connection H8DM3 2 H8DMi 2 User s Manual
53. n function as a system suspend button When the user depresses the power button the system will enter a SoftOff state The monitor will be suspended and the hard drive will spin down Depressing the power button again will cause the whole system to wake up Dur ing the SoftOff state the ATX power supply provides power to keep the required circuitry in the system alive In case the system malfunctions and you want to turn off the power just depress and hold the power button for 4 seconds The power will turn off and no power will be provided to the serverboard Wake On LAN JWOL Wake On LAN is defined as the ability of a management application to remotely power up a computer that is powered off Remote PC setup up dates and access tracking can occur after hours and on weekends so that daily LAN traffic is kept to a minimum and users are not interrupted The serverboard has a 3 pin header JWOL to connect to the 3 pin header on a Network Interface Card NIC that has WOL capability Wake On LAN must be enabled in BIOS Note that Wake On LAN can only be used with an ATX 2 01 or above compliant power supply jafi H8DM3 2 H8DMi 2 User s Manual Wake On Ring Header JWOR Wake up events can be triggered by a device such as the external modem ringing when the system is in the SoftOff state Note that external modem ring on can only be used with an ATX 2 01 or above compliant power supply 1 5 Power Supply As with all computer pro
54. n handling and installing the proces fore adding removing or changing any hardware components Installing the CPU Backplates Two CPU backplates BKT 0011L have been preinstalled to the serverboard to prevent the CPU area of the serverboard from bending and to provide a base for attaching the heatsink retention modules Installing the Processor install to the CPU 1 socket first 1 Begin by removing the cover plate that protects the CPU Lift the lever on CPU socket 1 until it points straight up With the lever raised lift open the silver CPU retention plate Triangles 2 Use your thumb and your index finger to hold the CPU Locate and align pin 1 of the CPU socket with pin 1 of the CPU Both are marked with a triangle 2 2 3 Align pin 1 of the CPU with pin 1 of the socket Once aligned carefully place the CPU into the socket Do not drop the CPU on the socket move the CPU horizontally or vertically or rub the CPU against the socket or against any pins of the socket which may damage the CPU and or the socket 4 With the CPU inserted into the socket inspect the four corners of the CPU to make sure that it is properly in stalled and flush with the socket Then gently lower the silver CPU retention plate into place 5 Carefully press the CPU socket lever down until it locks into its reten tion tab For a dual processor system repeat these steps to install another CPU into the CPU 2 socket Note if usi
55. n type in the password Change User Password Select this option and press Enter to access the sub menu and then type in the password Boot Sector Virus Protection This option is near the bottom of the Security Setup screen Select Disabled to deactivate the Boot Sector Virus Protection Select Enabled to enable boot sector protection When Enabled AMI BIOS displays a warning when any program or virus issues a Disk Format command or attempts to write to the boot sector of the hard disk drive The options are Enabled and Disabled 4 17 H8DM3 2 H8DMi 2 User s Manual 4 6 Exit Menu Select the Exit tab from AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen Save Changes and Exit When you have completed the system configuration changes select this option to leave BIOS Setup and reboot the computer so the new system configuration parameters can take effect Select Save Changes and Exit from the Exit menu and press lt Enter gt Discard Changes and Exit Select this option to quit BIOS Setup without making any permanent changes to the system configuration and reboot the computer Select Discard Changes and Exit from the Exit menu and press lt Enter gt Discard Changes Select this option and press lt Enter gt to discard all the changes and return to AMI BIOS Utility Program Load Optimal Defaults To set this feature select Load Optimal Defaults from the Exit menu and press lt Enter gt
56. ndicates no connection H8DM3 2 H8DMi 2 User s Manual 2 7 Jumper Settings Explanation of Jumpers To modify the operation of the serverboard jumpers can be usedto choose between optional settings Jumperscreate shorts betweentwo pins to change the function of the connector Pin 1 is identified with a square solder pad on the printed circuit board See the diagram at rightforan example of jumping pins 1 and 2 Refer to the serverboard layout page for jumper locations Pins Jumper Note Ontwo pinjumpers Closed means the jumperis on and Open means the jumper is off the pins CMOS Clear JBT1 is used to clear CMOS and will also clear any passwords Instead of pins this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS To clear CMOS 1 First power down the system and unplug the power cord s 2 With the power disconnected short the CMOS pads with a metal object such as a small screwdriver for at least four seconds 3 Remove the screwdriver or shorting device 4 Reconnect the power cord s and power on the system Notes Do not use PW ON connector to clear CMOS The onboard battery does not need to be removed when clearing CMOS however you must short JBT1 for at least four seconds JBT1 contact pads 2 16 to PCI X Enable Disable The JI C1 2 pair of jumpers allows you to connect the System Management Bus to the PCI X expansi
57. ng a single processor only the CPU1 DIMM slots are addressable for a maximum of 16 GB memory 2 3 Chapter 2 Installation H8DM3 2 H8DMi 2 User s Manual Installing the Heatsink Retention Modules Two heatsink retention modules BKT 0012L and four screws are included in the retail box Once installed these are used to help attach the heatsinks to the CPUs To install align the module with the standoffs of the preinstalled CPU backplate and with the four feet on the module contacting the serverboard Secure the retention module to the backplate with two of the screws provided See Figure 2 1 Repeat for the second CPU socket Note BKT 0012L is included for use with non proprietary heatsinks only When installing Supermicro heatsinks only BKT 0011L the CPU backplate is needed The BKT 0012L retention module was designed to provide compatibility with clip and cam type heatsinks from third parties Figure 2 1 CPU Heatsink Retention Module Installation Mounting screw Mounting screw 1 Heatsink retention module r CPU socket Serverboard Installing the Heatsink The use of active type heatsinks are recommended except for 1U systems Con nect the heatsink fans to the appropriate fan headers on the serverboard To install the heatsinks please follow the installation instructions included with your heatsink package not included 2 4 Chapter 2 Installation 2 3 Mounting the Serverboard int
58. o a Chassis All serverboards and motherboards have standard mounting holes to fit different types of chassis Make sure that the locations of all the mounting holes for both the serverboard and the chassis match Although a chassis may have both plastic and metal mounting fasteners metal ones are highly recommended because they ground the serverboard to the chassis Make sure that the metal standoffs click in or are screwed in tightly 1 Check the compatibility of the serverboard ports and the I O shield The H8DM3 2 H8DMi 2 serverboard requires a chassis that can support extended ATX boards of 12 x 13 05 in size Make sure that the I O ports on the serverboard align with their respective holes in the I O shield at the rear of the chassis 2 Mounting the serverboard onto the mainboard tray in the chassis Carefully mount the serverboard onto the mainboard tray by aligning the serverboard mounting holes with the raised metal standoffs in the tray Insert screws into all the mounting holes in the serverboard that line up with the standoffs Then use a screwdriver to secure the serverboard to the mainboard tray tighten until just snug if too tight you might strip the threads Metal screws provide an electrical contact to the serverboard ground to provide a continuous ground for the system 2 4 Installing Memory CAUTION Exercise extreme care when installing or removing memory modules to prevent any possible damage 1 Insert each
59. on slots The default setting is disabled Both con nectors must be set the same JI C1 is for data and JI C2 is for the clock See the table on right for jumper settings to PCI E Enable Disable The JI C3 4 pair of jumpers allows you to connect the System Management Bus to the PCI Express expansion Slots The default setting is disabled Both connectors must be set the same is for data and JI C4 is for the clock See the table on right for jump er settings Watch Dog JWD controls Watch Dog a system monitor that takes action when a soft ware application freezes the system Jumping pins 1 2 will cause WD to reset the system if an application is hung up Jumping pins 2 3 will generate a non maskable interrupt signal for the application that is hung up See the table on the right for jumper settings Watch Dog must also be enabled in BIOS VGA Enable Disable JPG1 allows you to enable or disable the VGA port The default position is on pins 1 and 2 to enable VGA See the table on the right for jumper settings 2 17 Chapter 2 Installation to PCI X Enable Disable Jumper Settings 2 1 2 Jumper Setting Definition Pins 1 2 Enabled Pins 2 3 Disabled to PCI E Enable Disable Jumper Settings JI C3 4 Jumper Setting Definition Pins 1 2 Enabled Pins 2 3 Disabled Jumper Settings JWD Jumper Setting Definition Pins 1 2 Reset Pins 2 3 NMI Open Disabled VGA En
60. on the icon representing your CD ROM drive Finally double click on the S Setup icon Figure 2 5 Driver Tool Installation Display Screen H8DM3 2 Server Board Drivers amp Tools WinXP driver for AMD 813x SUPERMICR nVidia MCP55 Chipset Driver Drivers amp Tools Microsoft Direct 9 0 nVidia 55 AMD 8132 PCI X Tunnel Chipset Graphics driver 151 MegaRAID Storage Manager Intel PRO Network Connections Drivers Supero Doctor Build driver diskettes and manuals Browse CD Auto Start Up Next Time Click the icons showing a hand writing on paper to view the readme files for each item Click the computer icons to the right of these items to install each item from top to the bottom one at a time After installing each item you should reboot the system before moving on to the next item on the list The bottom icon with a CD it allows you to view the entire contents of the CD 2 25 H8DM3 2 H8DMi 2 User s Manual Notes 2 26 Chapter 3 Troubleshooting Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures Use the following procedures to troubleshoot your system If you have followed all of the procedures below and still need assistance refer to the Technical Support Procedures and or Returning Merchandise for Service section s in this chapter Always disconnect the AC power cord before adding changing or installing any hard
61. onsumer use and does not cover damages in curred in shipping or from failure due to the alteration misuse abuse or improper maintenance of products During the warranty period contact your distributor first for any product problems 3 4 Chapter 4 BIOS Chapter 4 BIOS 4 1 Introduction This chapter describes the AMIBIOS Setup utility for the H8DM3 2 H8DMi 2 The AMI ROM BIOS is stored in a flash chip and can be easily upgraded using a floppy disk based program Note Due to periodic changes to the BIOS some settings may have been added or deleted and might not yet be recorded in this manual Please refer to the Manual Download area of our web site for any changes to BIOS that may not be reflected in this manual Starting the Setup Utility To enter the BIOS Setup Utility hit the lt Delete gt key while the system is booting up In most cases the lt Delete gt key is used to invoke the BIOS setup screen There are a few cases when other keys are used such as lt F1 gt lt F2 gt etc Each main BIOS menu option is described in this manual The Main BIOS screen has two main frames The left frame displays all the options that can be configured Grayed out options cannot be configured The right frame displays the key legend Above the key legend is an area reserved for a text mes sage When an option is selected in the left frame it is highlighted in white Often a text message will accompany it Note th
62. ors and through them to system memory It also interfaces directly with the Serial ATA and Ethernet controllers HyperTransport Technology HyperTransport technology is a high speed low latency point to point link that was designed to increase the communication speed by a factor of up to 48x between integrated circuits This is done partly by reducing the number of buses in the chipset to reduce bottlenecks and by enabling a more efficient use of memory in multi processor systems The end result is a significant increase in bandwidth within the chipset 1 9 H8DM3 2 H8DMi 2 User s Manual 1 3 Health Monitoring This section describes the PC health monitoring features of the H8BDM3 2 H8DMi 2 The serverboard has an onboard System Hardware Monitor chip that supports PC health monitoring Onboard Voltage Monitors for two CPU cores 3 3V 5Vin 12Vin 5V standby and battery The onboard voltage monitor will scan these voltages continuously Once a voltage becomes unstable it will give a warning or send an error message to the screen Users can adjust the voltage thresholds to define the sensitivity of the voltage moni tor Real time readings of these voltage levels are all displayed in BIOS Fan Status Monitor with Firmware Software Speed Control The PC health monitor can check the RPM status of the cooling fans The onboard fans are controlled by thermal management via BIOS CPU Overheat Fan Fail LED and Control This f
63. ous data from the drives you selected to be a part of the array You are then given the choice of making the RAID array bootable by pressing the the B key After you have finshed press the Ctrl and X keys simultaneously Installing the OS and Drivers With the Windows OS installation CD in the CD ROM drive restart the system When you see the prompt hit the key to enter Windows setup Eventually a blue screen will appear with a message that begins Windows could not determine the type of one or more storage devices When you see the screen hit the lt S gt key to Specify Additional Device then insert the driver diskette you just created into the floppy drive Highlight Manufuacturer Supplied Hardware Support Disk and hit the Enter key Highlight the first nVidia driver shown and press the Enter key to install it Soon a similar blue screen will appear again Again hit the S key then highlight the second item nForce Storage Controller and press the lt Enter gt key then lt Enter gt again to continue with the Windows setup 2 24 Chapter 2 Installation 2 11 Installing Additional Drivers The CD that came bundled with the system contains software drivers some of which must be installed such as the chipset driver After inserting this CD into your CD ROM drive the display shown in Figure 2 5 should appear If this display does not appear click on the My Computer icon and then
64. r functionality than PATA Installing the OS SATA Driver Before installing the OS operating system and SATA RAID driver you must decide if you wish to have the operating system installed as part of a bootable RAID array or installed to a separate non RAID hard drive If on a separate drive you may install the driver either during or after the OS installation If you wish to have the OS on a SATA RAID array you must follow the procedure below and install the driver during the OS installation Building a Driver Diskette You must first build a driver diskette from the Supermicro CD ROM that was included with the system You will have to create this disk on a computer that is already running and with the OS installed Insert the CD into your CD ROM drive and start the system A display as shown in Figure 2 5 will appear Click on the icon labeled Build Driver Diskettes and Manuals and follow the instructions to create a floppy disk with the driver on it Once it s been created remove the floppy and insert the installation CD for the Windows Operating System you wish to install into the CD ROM drive of the new system you are about to configure Enabling SATA RAID in the BIOS Before installing the Windows Operating System you must change some settings in BIOS Boot up the system and hit the Del key to enter the BIOS Setup Ullility After the Setup Utility loads 2 23 H8DM3 2 H8DMi 2 User s Manual 1 Use the arrow keys to mo
65. rd Power LED DP2 is an Onboard Power LED When this LED is lit it means power is pres ent on the serverboard In suspend mode this LED will blink on and off Be sure to turn off the system and unplug the power cord s before removing or installing components 2 19 H8DM3 2 H8DMi 2 User s Manual 2 9 Floppy IDE SATA and SAS Drive Connections Use the following information to connect the floppy and hard disk drive cables e The floppy disk drive cable has seven twisted wires e Ared mark on a wire typically designates the location of pin 1 e Asingle floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives The connector with twisted wires always connects to drive A and the connector that does not have twisted wires always connects to drive B e The 80 wire ATA133 IDE hard disk drive cable that came with your system has two connectors to support two drives This special cable should be used to take advantage of the speed this new technology offers The blue connector connects to the onboard IDE connector interface and the other connector s to your hard drive s Consult the documentation that came with your disk drive for details on actual jumper locations and settings for the hard disk drive Floppy Connector Floppy Drive Connector The floppy connector is located ee beside the IDE connector See the table on the right for pin definitions Definition i Definition 2
66. rmicro com Technical Support Web Site www supermicro com Europe Address Super Micro Computer Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 Email sales supermicro nl General Information support supermicro nl Technical Support rma supermicro nl Customer Support Asia Pacific Address Super Micro Computer Inc 4F No 232 1 Liancheng Rd Chung Ho 235 Taipei County Taiwan R O C Tel 886 2 8226 3990 Fax 886 2 8226 3991 Web Site www supermicro com tw Technical Support Email support supermicro com tw Tel 886 2 8228 1366 ext 132 or 139 1 2 Chapter 1 Introduction Figure 1 1 H8DM3 2 H8DMi 2 Image Mm 000000000000 Notes H8DM3 2 is pictured The H8DMi 2 has the same layout as the H8DM3 2 but with no SAS components or ports 1 3 H8DM3 2 H8DMi 2 User s Manual Figure 1 2 H83DM3 2 H8DMi 2 Serverboard Layout not drawn to scale
67. rming the display memory read write test next The EGA VGA controller was not found The display memory read write test is about to begin The display memory read write test passed Look for retrace checking next The display memory read write test or retrace checking failed Performing the alter nate display memory read write test next The alternate display memory read write test passed Looking for alternate display retrace checking next The display mode is set Displaying the power on message next Video display checking is over Setting the display mode next Initializing the bus input IPL general devices next if present See the last page of this chapter for additional information Displaying bus initialization error messages See the last page of this chapter for additional information The new cursor position has been read and saved Displaying the Hit DEL mes sage next The Hit DEL message is displayed The protected mode memory test is about to start Preparing the descriptor tables next The descriptor tables are prepared Entering protected mode for the memory test next Entered protected mode Enabling interrupts for diagnostics mode next Interrupts enabled if the diagnostics switch is on Initializing data to check memory wraparound at 0 0 next Data initialized Checking for memory wraparound at 0 0 and finding the total sys tem memory size next The memory wraparound test is done
68. setting if using a 64 bit Linux operating system The available op tions are Other and Linux ACPI Configuration ACPI Version Features Use this setting the determine which ACPI version to use Options are ACPI v1 0 ACPI v2 0 and ACPI v3 0 ACPI APIC Support Determines whether to include the ACPI APIC table pointer in the RSDT pointer list The available options are Enabled and Disabled AMI OEMB Table Determines whether to include the AMI APIC table pointer in the RSDT pointer list The available options are Enabled and Disabled 4 3 H8DM3 2 H8DMi 2 User s Manual Headless Mode Use this setting to Enable or Disable headless operation mode through ACPI MCP55 ACPI HPET Table Use this setting to either Enable or Disable the MCP55 ACPI HPET table Power Configuration Power Button Mode Allows the user to change the function of the power button Options are On Off and Suspend Restore on AC Power Loss This setting allows you to choose how the system will react when power returns after an unexpected loss of power The options are Power Off Power On and Last State Watch Dog Timer This setting is used to Enable or Disable the Watch Dog Timer function It must be used in conjunction with the Watch Dog jumper see Chapter 2 for details MPS Configuration MPS Revision This setting allows the user to select the MPS revision level The options are 1 1 and 1 4 Smbios Configuration Smbios Smi Support Th
69. stem When the Standby or Suspend feature is enabled or when the BIOS is not in control such as during memory count the first screen that appears when the system is turned on the momentary on off switch must be held for more than four seconds to shut down the system This feature is required to implement the ACPI features on the serverboard Question How do connect the ATA133 cable to my IDE device Answer The 80 wire 40 pin high density ATA133 IDE cable that came with your system is a special cable that must be used to take advantage of the speed the ATA133 technology offers Connect the blue connector to the onboard IDE header and the other connectors to your hard drives Consult the documenta tion that came with your disk drive for details on jumper locations and settings 3 4 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required be fore any warranty service will be rendered You can obtain service by calling your vendor for a Returned Merchandise Authorization RMA number When returning to the manufacturer the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand carried Shipping and handling charges will be applied for all orders that must be mailed when service is complete For faster service RMA authorizations may be requested online http www supermicro com support rma This warranty only covers normal c
70. t your equipment from ESD Precautions Use a grounded wrist strap designed to prevent static discharge Touch a grounded metal object before removing the board from the antistatic bag Handle the board by its edges only do not touch its components peripheral chips memory modules or gold contacts When handling chips or modules avoid touching their pins e Put the serverboard and peripherals back into their antistatic bags when not in use For grounding purposes make sure your computer chassis provides excellent conductivity between the power supply the case the mounting fasteners and the serverboard Useonly the correct type of CMOS onboard battery as specified by the manufac turer Do not install the CMOS onboard battery upside down which may result in a possible explosion Unpacking The serverboard is shipped in antistatic packaging to avoid static damage When unpacking the board make sure the person handling it is static protected Installation Procedures Follow the procedures as listed below to install the serverboard into a chassis 1 Install the processor s and the heatsink s 2 Install the serverboard in the chassis 3 Install the memory and add on cards 4 Finally connect the cables and install the drivers 2 H8DM3 2 H8DMi 2 User s Manual 2 2 Processor and Heatsink Installation sor Always connect the power cord last and always remove it be Exercise extreme caution whe
71. the circular buffer next The command byte was written and global data initialization has completed Check ing for a locked key next Locked key checking is over Checking for a memory size mismatch with CMOS RAM data next The memory size check 15 done Displaying a soft error and checking for a password or bypassing WINBIOS Setup next B 5 H8DM3 2 H8DMi 2 User s Manual Checkpoint 86h 87h Code Description The password was checked Performing any required programming before WIN BIOS Setup next The programming before WINBIOS Setup has completed Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next Returned from WINBIOS Setup and cleared the screen Performing any necessary programming after WINBIOS Setup next The programming after WINBIOS Setup has completed Displaying the power on screen message next Programming the WINBIOS Setup options next The WINBIOS Setup options are programmed Resetting the hard disk controller next The hard disk controller has been reset Configuring the floppy drive controller next The floppy drive controller has been configured Configuring the hard disk drive controller next Initializing the bus option ROMs from C800 next See the last page of this chapter for additional information Initializing before passing control to the adaptor ROM at C800 Initialization before the C800 adaptor ROM gains control has
72. tions SAS0 3 SASA4 7 There are two SAS port con i nectors located near IDE Definition Pin Definition and floppy connectors One is a for the SASO 3 ports and the 4 other is for SAS4 7 ports See 6 the table on the right for pin Ju s definitions bse o 12 Tx Note SAS is enabled in BIOS UN EECUM refer to Chapter 4 See 1515 d cus e SAS manual for details on creating and working with SAS RAID arrays 2 22 Chapter 2 Installation 2 10 Enabling SATA RAID Now that the hardware is set up you can install the operating system and the SATA RAID drivers if you wish to utilize SATA RAID The installation procedure differs depending on whether you wish to have the operating system installed on a RAID array or on a separate non RAID drive See the instructions below for details Notes See the LSI SAS manual included on the Supermicro CD for SAS RAID IR mode is not supported Serial ATA SATA Serial ATA SATA is a physical storage interface that employs a single cable with a minimum of four wires to create a point to point connection between devices This connection is a serial link that supports a SATA transfer rate from 150 MBps The serial cables used in SATA are thinner than the traditional cables used in Parallel ATA PATA and can extend up to one meter in length compared to only 40 cm for PATA cables Overall SATA provides bette
73. to 5 degrees below the threshold set The default setting is 72 C The submenu includes monitor displays for the following information CPU1 Temperature CPU2 Temperature for dual CPU systems System Tem perature VCore1 VCore2 for dual CPU systems 3 3V 5Vin 12Vin 5V stby and battery voltage gt System Fan Monitor Fan Speed Control Modes This feature allows the user to determine how the system will control the speed of the onboard fans Select Workstation if your system is used as a Workstation Select Server if your system is used as a Server Select Disable to disable the fan speed control function to allow the onboard fans to continuously run at full 12V The options are 1 Disabled Full Speed 2 Server Mode and 3 Workstation Mode 4 16 Chapter 4 BIOS FAN1 Speed through FAN8 Reading The speeds of the onboard fans in rpm are displayed here 4 4 Boot Menu This feature allows the user to configure the following items gt Boot Device Priority This feature allows the user to prioritize the boot sequence from the available devices Removable Drives This feature allows the user to specify the Boot sequence from available remov able drives 4 5 Security Menu AMI BIOS provides a Supervisor and a User password If you use both passwords the Supervisor password must be set first Change Supervisor Password Select this option and press Enter to access the sub menu and the
74. toggling Checking the 15 second on off time next Passing control to the video ROM to perform any required configuration before the video ROM test All necessary processing before passing control to the video ROM is done Look ing for the video ROM next and passing control to it The video ROM has returned control to BIOS POST Performing any required pro cessing after the video ROM had control Reading the 8042 input port and disabling the MEGAKEY Green PC feature next Making the BIOS code segment writable and performing any necessary configura tion before initializing the interrupt vectors The configuration required before interrupt vector initialization has completed terrupt vector initialization is about to begin B 3 H8DM3 2 H8DMi 2 User s Manual Checkpoint 25h 27h 28h 2Ah 2Eh 2Fh 30h 31h 32h 34h 37h 38h 39h 3Ah 3Bh 40h 42h 43h 44h 45h 46h 47h 48h 49h 4Bh Code Description Interrupt vector initialization is done Clearing the password if the POST DIAG Switch is on Any initialization before setting video mode will be done next Initialization before setting the video mode is complete Configuring the mono chrome mode and color mode settings next Bus initialization system static output devices will be done next if present See the last page for additional information Completed post video ROM test processing If the EGA VGA controller is not found perfo
75. ulating Memory Banks for 64 bit Operation CPU1 CPU1 CPU1 CPU1 CPU2 CPU2 CPU2 CPU2 DIMM1A DIMM1B DIMM2A DIMM2B DIMM1A DIMM1B DIMM2A DIMM2B 2 7 H8DM3 2 H8DMi 2 User s Manual 2 5 Port and Control Panel Connections The I O ports are color coded in conformance with the PC99 specification to make setting up your system easier See Figure 2 3 below for the colors and locations of the various I O ports Figure 2 3 I O Port Locations and Definitions Mouse Parallel Port Green Burgundy ze 0580 1 a aay LAN1 coocoo 2z 9 FE Keyboard Port VGA Port Purple Turquoise Blue Front Control Panel JF1 contains header pins for various front control panel connectors See Figure 2 4 for the pin definitions of the various connectors Refer to Section 2 6 for details Figure 2 4 JF1 Front Control Panel Header JF1 20 19 Ground Power 2 1 2 8 Chapter 2 Installation ATX Power 24 pin Connector Pin Definitions J1B1 2 6 Connecting Cables ATX Power Connector Pin Definition Pin Definition The primary ATX power supply con asav fi nector J1B1 meets the SSI Super SL set ATX 24 pin specification Refer to OM the table on the right for the pin defini 8 PSON 4 sv tions of the ATX 24 pin power 959 gt tor
76. ve to the Exit menu Scroll down with the arrow keys to the Load Optimal Defaults setting and press lt Enter gt Select OK to confirm then lt Enter gt to load the default settings 2 Use the arrow keys to move to Advanced gt Floppy IDE SATA Configuration gt Serial ATA Devices and then the nVidia RAID Setup settings Use these settings to enable the SATA and RAID functions Enable the SATA devices and channels you will be using 3 Hit the lt Esc gt key twice and scroll to the Exit menu Select Save Changes and Exit and hit lt enter gt then hit lt Enter gt again to verify 4 After exiting the BIOS Setup Utility the system will reboot When prompted during the startup press the lt F10 gt key when prompted to run the nVidia RAID Utility program Using the nVidia RAID Utility The nVidia RAID Utility program is where you can define the drives you want to include in the RAID array and the mode and type of RAID Two main windows are shown in the utility The Free Disks window on the left will list all available drives Use the arrow keys to select and move drives to the window on the right which lists all drives that are to become part of the RAID array Once you have finished selecting the drives and type of RAID you wish to use for your RAID array press the lt F7 gt key You will be prompted to verify your choice if you want to continue with your choices select Yes Note that selecting Yes will clear all previ
77. vices installed in the system The options are 0 sec 5 10 15 20 25 30 and 35 ATA PI 80Pin Cable Detection This setting allows AMI BIOS to auto detect the 80 Pin ATA PI cable The options are Host amp Device Host and Device gt Configuration Clear NVRAM Select Yes to clear NVRAM during boot up The options are Yes and No Plug amp Play OS Select Yes to allow the OS to configure Plug amp Play devices This is not required for system boot if your system has an OS that supports Plug amp Play Select No to allow AMIBIOS to configure all devices in the system PCI Latency Timer This option sets the latency of all PCI devices on the PCI bus Select a value to set the PCI latency in PCI clock cycles Options are 32 64 96 128 160 192 224 and 248 Allocate IRQ to PCI VGA Set this value to allow or restrict the system from giving the VGA adapter card an interrupt address The options are Yes and No Palette Snooping Select Enabled to inform the PCI devices that an ISA graphics device is installed in the system in order for the graphics card to function properly The options are Enabled and Disabled 4 9 H8DM3 2 H8DMi 2 User s Manual PCI IDE BusMaster Set this value to allow or prevent the use of PCI IDE busmastering Select Enabled to allow AMI BIOS to use PCI busmaster for reading and writing to IDE drives The options are Disabled and Enabled Offboard PCI ISA IDE Card
78. ware components Before Power On 1 Check that the onboard power LED DP2 is lit 2 Make sure that the main ATX power connector at J1B1 the 8 pin connector at JPW1 and the 4 pin connector at JPW2 are all connected to your power supply 3 Make sure that no short circuits exist between the serverboard and chassis 4 Disconnect all ribbon wire cables from the serverboard including those for the keyboard and mouse 5 Remove all add on cards 6 Install a CPU and heatsink making sure it is fully seated and connect the in ternal chassis speaker and the power LED to the serverboard Check all jumper settings as well 7 Use the correct type of onboard CMOS battery as recommended by the manufac turer To avoid possible explosion do not install the CMOS battery upside down No Power 1 Make sure that no short circuits exist between the serverboard and the chas sis 2 Verify that all jumpers are set to their default positions 3 Check that the 115V 230V switch on the power supply is properly set 4 Turn the power switch on and off to test the system 5 The battery on your serverboard may be old Check to verify that it still supplies If it does not replace it with a new one No Video 1 If the power is on but you have no video remove all the add on cards and cables 2 Use the speaker to determine if any beep codes exist Refer to Appendix A for details on beep codes 3 1 H8DM3 2 H8DMi 2 User s Manual

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