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Supermicro X7DWN+ motherboard

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1. VRM PROCESSOR 2 1 VRM 1666 1333 1067 1666 1333 1067 MT S MT S 23 3 j3 MCH Tm La 7 0 5 2 FBD CHNLQ 0 0 ZU APCLEXPx8N PORT F 4 a 5 6 LFBD CHNL1 X W PCI EXPx8N PORT Seaburg FBDCHNL2 5 5 E 1 2 a X X a a ee CHNL3 m in 2 a amp PCI E PORT i 84 9 e PORT PCI E x4 LN RJ45 g BORT PORT R ECLE xA GBLAN a ie 87 8 0 ZOAR Ruas O ao D AW PORTESI LATA 100 APCHEXP4 PORT IDE CONN y 2 9115 N 8 5 5 8 2 2 Aa 3 0 Gb S lt x x 3 0 Gb S 6 5 amp a a PCI X 133 2 33 2 F ke ES1000 A USB 2 0 g H DDR2 LPC SIO W83627 END TPM HF MS COM1 x KB COM2 Block Diagram of the 5400 Chipset Note This is a general block diagram Please see the previous Motherboard Features pages for details on the features of each motherboard 1 8 Chapter 1 Introduction 1 2 Chipset Overview Built upon the functionality and the capability of the 5400 chipset the X7DWN motherboard provides the performance and feature
2. Intel 5400 North Bridge DIMM 1A g DIMM 1B o CPUFAN2 DIMM 1C DIMM 1D UPER X7DWN Compact Flash IDE 1 5 Floppy 5 5 2 28 Chapter 2 Installation 2 7 Onboard Indicators GLAN LEDs There are two GLAN ports on the moth erboard Each Gigabit Ethernet LAN port has two LEDs The yellow LED indicates activity while the Link LED may be green amber or off to indicate the speed of the connection See the tables at right for more information Onboard Power LED An Onboard Power LED is located at LE1 on the motherboard When this LED is lit the system is on Be sure to turn off the system and unplug the power cord before removing or installing components See the tables at right for more information Activity LED Lin LED Rear View when facing the rear side of the chassis GLAN Activity Indicator Color Yellow LED Settings Status Definition Flashing Active LED Color Definition off No Connection or 10 Mbps Green 100 Mbps Amber 1 Gbps GLAN Link Indicator
3. a DIMM 1A g DIMM 18 DIMM 1C DIMM 1D SUPER X7DWN LAN I exorti CPUFANZ Compact Flash IDE 1 Floppy Front Panel USB Pin Definitions USB 2 3 4 USB2 4 USB3 Pin Definition Pin Definition 1 5V 1 5 2 2 3 PO 3 4 4 5 5 No connection Chassis Intrusion Pin Definitions JL1 Pin Definition 1 Intrusion Input Ground A Backpanel USB 0 1 B Front Panel USB 2 3 C Front Panel USB 4 D Chassis Intrusion SUPERO X7DWN User s Manual Fan Headers X7DWN has six chassis system fan Pin Definitions Fan1 8 headers Fan1 to Fan6 and two CPU Fans Pin Definition Fans 7 8 Note 4 pin fans headers are backward compatible with the traditional 3 pin fans See the table on the right for pin definitions The onboard fan speeds are controlled by Thermal Management via Hard ware Monitoring in the Advanced Setting in BIOS The Default setting is Disabled Ground 12V Tachometer PWR Modulation Keylock Keylock Pin Definitions The keyboard lock connection is designated JK1 Uti
4. Power LED The Power LED connection is located 3 Power LED on pins 15 and 16 of JF1 Refer to the Pin Definitions JF1 table on the right for pin definitions Pinf Definition 15 5V Ground A NMI B PWR LED 1 E a Groun nm 2 f di X J Power LED Vcc HDD LED Vcc NIC1 LED Vcc L gt NIC2 LED Vcc DIMM 1C E on OH Fan Fail LED Vcc LA E LAN B PWR Fail LED Vcc f Ground Reset gt Reset Button d Ground PWR gt Power Button 55 s Chapter 2 Installation HDD LED The HDD LED connection is located on pins 13 and 14 of JF1 Attach the hard drive LED cable here to display disk activity for any hard drive ac tivities on the system including SAS Serial ATA and IDE See the table on the right for pin definitions NIC1 NIC2 LED Indicators The NIC Network Interface Control ler LED connection for GLAN port1 is located on pins 11 and 12 of JF1 and the LED connection for GLAN Port2 is on Pins 9 and 10 Attach the NIC LED cables to display network activity Refer to the table on the right for pin definitions THEE DIMM 4D E CPUFANT Ite PUR AERIS DIMM J B SEN DIMM aS J BIVIN DIMM 3D DIMM 3C DIMM 3B DIMM
5. DIMM 1A DIMM 18 b DIMM 1C DIMM 1D _ SUPER X7DWN 5 South Bridge VGAGIRL USB 2 3 SMSO Floppy PWR SMB Pin Definitions Definition Clock Data PWR Fail Ground 3 3V A PWR SMB B VGA Chapter 2 Installation Compact Flash Card PWR Connector A Compact Flash Card Power Connector Setting Definition Connector is located at JWF1 For the Compact Flash Card or the Compact Flash Jumper JCF1 to work properly CompactFlash you will need to first connect the Power Off Compact Flash Card power cable to JWF1 Refer to the board layout below for the location On Compact Flash Power On Default T SGPIO Headers Two SGPIO Serial Link General Purpose Input Output headers are located at J29 and J30 on the motherboard These headers support serial link interfaces for the onboard SATA and SAS connectors See the table on the right for pin definitions T SGPIO Pin Definitions Pin Definition Pin Definition 1 NC 2 NC 3 Ground Data 5 Load Ground Refer to the board layout below for Note NC No Connections the location DH HH z2 A Compact Flash PW
6. 55 DIMM 1A Z DIMM 1B DIMM 1 DIMM 1D IDE 1 Compact Flash __SUPER X7DWN T mij 5 Floppy GA 5 5 S 5829 LL 22224 Power Supply Failure B Alarm Reset Chapter 2 Installation Overheat LED Fan Fail JOH1 The JOH1 header is used to connect an LED indicator to provide warnings of chassis overheating or fan failure This LED will blink when a fan failure occurs Refer to the table on right for pin definitions SMB A System Management Bus header is located at J18 Connect the ap propriate cable here to utilize SMB on your system DIMM 4D CPUFAN mST E E x DIMM 4C x 825 o o o o c sele 185 DIMM 48 DIMM 4A DIMM 3D Fall Delect DIMM 3C s mm DIMM 3B N DIMM DIMM 2D DIMM 2C DIMM 2B DIMM 2A DIMM 1A DIMM 18 DIMM 1 DIMM 1D SUPER X7DWN
7. ez 2 19 SUPERO X7DWN User s Manual Power Supply Failure Connect a cable from your power PWR Supply Failure Pin Definitions Pin Definition supply to the Power Supply Fail header PSF JP3 to provide warnings of power supply failure This warning signalis passed through the PWR_LED pin to indicate a power failure on the chassis See the table on the right for pin definitions 1 2 3 Alarm Reset If three power supplies are installed and Alarm Reset JAR is enabled PWR 1 Fail PWR 2 Fail PWR 3 Fail Signal Alarm Reset Note This feature is only available when using Supermicro redundant power supplies Alarm Reset Pin Definitions the system will notify you when any of the three power modules fails Connect JAR to a micro switch to Pin 1 Pin Setting Definition Ground Pin 2 5V enable you to turn off the alarm that is activated when a power module fails See the table on the right for pin definitions DIMM 4D i DIMM 4C DIMM 4B DIMM 4A DIMM 3D DIMM 3C DIMM 38 DIMM 3A DIMM 2D DIMM 2C DIMM 28 DIMM 2A FP Cli Panel Intel 5400 North Bridge
8. DIMM 2 DIMM 2B DIMM 2 Sex o 8599 c DIMM 1A DIMM 18 DIMM 1 DIMM 1D Compact Flash IDE 1 __SUPER X7DWN T m 5 Intel ESB 2 Floppy 5 5 COM2 POLES 5 L 2 27 SUPERO X7DWN User s Manual Compact Flash Master Slave Select Compact Flash Card Master Slave Select ACompactFlash Master Primary Slave Jumper Definition Secondary Selection Jumperis located Open Slave Secondary at JCF1 Close this jumper to enable Closed Master Primary Compact Flash Card For the Compact Flash Card or the CompactFlash Jumper JCF1 to work properly you will need to first connect the Compact Flash Card power cable to JWF1 Refer to the board layout below for the location A Compact Flash Master Slave Select Aw B Memory Select DIMM 4D d ze DIMM 4C DIMM 48 DIMM 4A DIMM 30 DIMM DIMM 3B DIMM DIMM 20 DIMM 2 DIMM 28 DIMM 2
9. DIMM 2D jj cput DIMM 2C DIMM 28 DIMM 2 CPU2 DIMM 1A DIMM 1B DIMM 1C 1D _SUPER X7DWN Intel ESB 2 South Bridge 2 11 HDD LED Pin Definitions JF1 Pin Definition 13 5V 14 HD Active GLAN1 2 LED Pin Definitions JF 1 Pin Definition 9 11 Vcc 10 12 Ground A HDD LED B NIC1 LED C NIC2 LED Groun NMI X X Power LED Vcc Q LED Vcc LED Vcc NIC2 LED Vcc OH Fan Fail LED Vcc PWR Fail LED Vcc Ground Reset Reset Button Ground PWR Power Button SUPERO X7DWN User s Manual Overheat Fan Fail LED OH Connect an LED Cable to the OH Fan Fail connection on pins 7 and 8 of JF1 to provide advanced warnings of chassis overheating or fan failure Refer to the table on the right for pin definitions Power Fail LED The Power Fail LED connection is located on pins 5 and 6 of JF1 Re fer to the table on the right for pin definitions DIMM 4D PUFA APN PUR m 5 EE DIMM 4C o DIMM 4B DIMM 4A DIMM
10. DIMM 1A DIMM 18 DIMM 1 4D CNOS Carbo _ N Compact Flash IDE 1 __ SUPER X7DWN TG 7 5 Floppy SIMSO MOL jns USB 2 3 2227 2 14 Chapter 2 Installation Universal Serial Bus USB There are five USB 2 0 Universal Serial Bus ports headers on the motherboard Back Panel USB Ports 0 and 1 are located at JUSB1 The other three are Front Panel USB headers USB Headers 2 and 3 are located at JUSB2 and USB Header 4 is located at JUSB3 to provide front panel access See the tables on the right for pin definitions Chassis Intrusion A Chassis Intrusion header is located at JL1 on the motherboard Attach an appropriate cable from the chassis to inform you of a chassis intrusion when the chassis is opened Back Panel USB 05 0 1 Pin Definitions 1 5V 2 PO 3 4 Ground 5 N A DIMM 40 CPUFANT LP PUR T000 0 200 go DIMM 4C Nr DIMM 4B DIMM 4 DIMM 3D EBIEI 2L DIMM 3C D SMBUS PS DIMM 3B E DIMM 3A DIMM 20 DIMM 2C DIMM 28 DIMM 2 Psi
11. COS Clana N Battery A VGAGTRL E Slot PCEX TOU filz 750602 SIMSO Buzzer IDE 1 Floppy Overheat LED Pin Definitions Pin Definition 1 5vDC OH Active OH Fan Fail LED State Message Solid Overheat Blinking Fan Fail SMB Header Pin Definitions Pin Definition 1 Data Ground Clock 2 3 4 No Connection A OH Fan Fail LED B SMB SUPERO X7DWN User s Manual Power SMB Connector Power SMB 12 Connector J17 monitors power supply fan and sys tem temperatures See the table on the right for pin definitions VGA Connector VGA connector is located at J15 the I O backplane Refer to the board layout below for the location Pe DIMM 4D CPUFANT PPAR 53 Peg zb DIMM 4C jJ 25 9 o gese i DIMM 4B J DIMM 4A DIMM 3D DIMM 3C DIMM 3B DIMM DIMM 20 DIMM 2 DIMM 2B DIMM 2 Intel 5400 North Bridge
12. To Install Insert module vertically and press down until it snaps into place Pay attention to the alignment notch at the bottom To Remove Use your thumbs io dently push Top View of DDR2 FBD Slot the release tabs Release Tab near both ends of J the module This should release it from the slot SUPERO X7DWN User s Manual 2 4 Control Panel Connectors IO Ports The I O ports are color coded in conformance with the PC 99 specification See Figure 2 3 below for the colors and locations of the various I O ports A Back Panel Connectors IO Ports Wr SUPERSXTDWNT l 4 0 900500 9 E Back Panel I O Port Locations and Definitions Back Panel Connectors 1 Keyboard Purple 2 PS 2 Mouse Green 3 Back Panel USB Port 0 4 Back Panel USB Port 1 5 COM Port 1 Turquoise 6 VGA Port Blue 7 Gigabit LAN 1 8 Gigabit LAN 2 See Section 2 5 for details 2 8 Chapter 2 Installation B Front Control Panel JF1 contains header pins for various buttons and indicators that are normally located on a control panel at the front of the chassis These connectors are de signed specifically for use with Supermicro server chassis
13. nennen 2 29 GLAN LEDS T P 2 29 Onboard Power EA EAEE 2 29 2 8 Floppy SIMSO Serial ATA and Hard Disk Drive Connections 2 30 Floppy s yy EE H 2 30 Seal MEM MILI E 2 31 SIMSO IPM Slot 2 31 SUPERO X7DWN User s Manual 2 32 Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures 3 1 Before Power k ya kas kiy a 3 1 aa nab n daah NA m 3 1 VI O scene RS 3 1 Losing the System s Setup Configuration 3 2 Memory 3 2 3 2 Technical Support Procedures 3 2 3 3 Frequently Asked Questions 3 3 3 4 Returning Merchandise for Service 3 4 Chapter 4 BIOS 4 1 MO anan ba nada band aka na w n 4 1 4 2 Running Setup ka ala DEYA ka ka ka na Ka Sea av a k A Yu aka aa 4 2 4 3 Main BIOS S6etUp rte ir nets 4 2 4 4 Advanced ANS ban und d n kan 4 6 4 5 Security SO D iieri ki saya Vi awana Meta ki N 4 25 4 6 BOOL SetuP daka kak 4 26 Arad EX Dr NEES 4 27 App
14. Watch Dog Jumper Settings JWD Jumper Setting Definition Pins 1 2 Reset default Pins 2 3 NMI Disabled A Clear CMOS B Watch Dog Enable SUPERO X7DWN User s Manual VGA Enable Disable JPG1 allows you to enable or disable the VGA Controller The default position is on pins 1 and 2 to use this feature See the table on the right for jumper settings Memory Voltage Select Jumper JP2 allows the user to select memory voltage for the motherboard See the table on the right for jumper settings DIMM 4D i DIMM 4C CPUFAN DIMM 4B DIMM 4A Wr o o c c o o o o m DIMM 3D DIMM 3C DIMM 3B DIMM DIMM 20 DIMM 2 DIMM 2B DIMM 2 DIMM 1A DIMM 18 DIMM 1 DIMM 1D __SUPER X7DWN Intel ESB 22 T Slow PCEX TOMH E E PWR Fall Detect CMOS Car _ VGAGTRL SIMSO CPUFAN gt ompact Flash IDE 1 Floppy
15. VGA Enable Disable Jumper Settings JPG1 Definition Jumper Setting Pins 1 2 Enabled Pins 2 3 Disabled Memory Voltage Select Jumper Settings Setting Definition 1 2 Auto default 2 3 1 5V Off 1 8V A VGA Enable B Memory Voltage Se lect Chapter 2 Installation 3rd PWR Supply PWR Fault Detection J3P 3rd PWR Supply PWR Fault Jumper Settings Jumper Setting Definition The system can notify you in the event of a power supply failure This feature is available when three power supply units are installed in the chassis with one act ing as a backup If you only have one or two power supply units installed you should disable this the default setting with J3P to prevent the false alarm Enabled Closed Disabled Default Open 12 Bus to PCI X PCI Exp Slots 12C to PCI S PCI Exp Jumper Settings Jumpers I2C1 and 12C2 located at J27 amp 2 J28 allow you to connect the System Management Bus I2C to PCI X PCI E slots The default setting is Open to disable the connection See the table on the right for jumper settings Jumper Setting Definition Closed Enabled Disabled Default Open DIMM 4D FE DIMM 4C i 8b DIMM 4B DIMM 4A DIMM 3D DIMM 3C DIMM 3B DIMM DIMM 20
16. 2 2 2 3 Installing DIMMS rnt kk in r kak 2 6 2 4 Control Panel Connectors and Ports 2 8 A Back Panel Connectors IO 2 8 Front Control Panel iere dar reden TR 2 9 C Front Control Panel Pin Definitions 2 10 DER RE 2 10 Power LED EU 2 10 pcc 2 11 Peur qua LED E 2 11 Overheat Fan Fail LED 2 12 Power Fall LED pte dU UE LITER ES 2 12 Reset Bon e PE 2 13 vi Power Button Ae 2 13 2 5 Connecting Cables is a erret one kaza ei ak e CR e rU k kay 2 14 ATX Power Connector 2 14 Processor Power Connector 12 KAKA KA KRA KA KAK 2 14 Universal Serial Bus 1 kk kk ek ke k kek 2 15 CHASSIS m 2 15 Fan Headers 2 16 ord co 2 16 ATX PS 2 Keyboard and Mouse 2 17 Serial POMS 2 17 Wake On Ring diee ch defe ee H b aha wa rana 2 18 Wake On LAN E 2 18 GLAN Ethernet Ports ail loda sinano dina nenn y teen a ak a a kaka wan a Bkan 2 19 Speaker Power LED Keylock H
17. Initialize system timer Initialize system I O Check force recovery boot Checksum BIOS ROM Go to BIOS Set Huge Segment Initialize Multi Processor Initialize OEM special code Initialize PIC and DMA Initialize Memory type Initialize Memory size Shadow Boot Block System memory test Initialize interrupt vectors Initialize Run Time Clock Initialize video Initialize System Management Manager Output one beep Clear Huge Segment Boot to Mini DOS Boot to Full DOS If the BIOS detects errors on 2C 2E or 30 base 512K RAM error it displays an additional word bitmap xxxx indicating the address line or bits that have failed For example 2C 0002 means address line 1 bit one set has failed 2E 1020 means data bits 12 and 5 bits 12 and 5 set have failed in the lower 16 bits The BIOS also sends the bitmap to the port 80 LED display It first displays the checkpoint code followed by a delay the high order byte another delay and then the loworder byte of the error It repeats this sequence continuously B 5 SUPER X7DWN User s Manual Notes Appendix Installing Other Software Programs and Drivers Appendix C Installing Other Software Programs and Drivers C 1 Installing Drivers other than the Adaptec Embedded Serial ATA RAID Controller Driver After you ve installed the Windows Operating System a screen as shown below will appear You are ready to install software programs and drivers that have no
18. B WOL Chapter 2 Installation GLAN 1 2 Giga bit Ethernet Ports Two G bit Ethernet ports are located at JLAN1 and JLAN2 on the I O backplane These ports accept RJ45 type cables GLAN1 GLAN2 Power LED Speaker On the JD1 header pins 1 3 are used for power LED indication and pins 4 7 are for the speaker See Pin Defintions the table on the right for speaker Pin Setting Definition pin definitions Note The speaker Pins 6 7 Internal Speaker connector pins 4 7 are for use with External Speaker an external speaker you wish to use the onboard speaker you should close pins 6 7 with a jumper GLAN1 EB B GLAN2 Km E aM cs PWR LED Speaker Lal 59805 Ps DIMM 3C 4 5 DIMM 38 DIMM DIMM 20 DIMM 2C DIMM 28 DIMM 2 FP Panel Tm Intel 5400 test DIMM 1 rane E DIMM 1B CPU ANZ 8 N 8 DIMM 1 DIMM 1D 9 2 GTRL a E fe HE Intel ESB 2 53 Floppy South Bridg SIMSO
19. It is recommended that you do not upgrade your BIOS if you are not experiencing any problems with your system Updated BIOS files are located on our web site at http www supermicro com support bios Please check our BIOS warning message and the information on how to update your BIOS on our web site Select your motherboard model and download the BIOS file to your computer Also check the current BIOS revision and make sure that it is newer than your BIOS before downloading You can choose from the zip file and the exe file If you choose the zip BIOS file please unzip the BIOS file onto a bootable device or a USB pen Run the batch file using the format flash bat filename rom from your bootable device or USB pen to flash the BIOS Then your system will automati cally reboot If you choose the exe file please run the exe file under Windows to 3 3 SUPER X7DWN User s Manual create the BIOS flash floppy disk Insert the floppy disk into the system you wish to flash the BIOS Then bootup the system to the floppy disk The BIOS utility will automatically flash the BIOS without any prompts Please note that this process may take a few minutes to complete Do not be concerned if the screen is paused for a few minutes Warning Do not shut down or reset the system while updating the BIOS to prevent possible system boot failure Question What s on the CD that came with my motherboard Answer The supplied compact disc has qu
20. Please go through the Troubleshooting Procedures and Frequently Asked Question FAQ sections in this chapter or see the FAQs on our web site 3 2 Chapter 3 Troubleshooting http www supermicro com support fags before contacting Technical Support 2 BIOS upgrades be downloaded from our web site at http www supermicro com support bios Note Not all BIOS can be flashed it depends on the modifications to the boot block code 3 If you still cannot resolve the problem include the following information when contacting Supermicro for technical support Motherboard model and PCB revision number BIOS release date version this can be seen on the initial display when your system first boots up System configuration An example of a Technical Support form is on our web site at http www supermicro com support contact cfm 4 Distributors For immediate assistance please have your account number ready when placing a call to our technical support department We can be reached by e mail at support supermicro com or by fax at 408 503 8000 option 2 3 3 Frequently Asked Questions Question What are the various types of memory that my motherboard can support Answer The X7DWN has 16 240 pin DIMM slots that support DDR2 FBD ECC 800 667 533 SDRAM modules It is strongly recommended that you do not mix memory modules of different speeds and sizes Question How do update my BIOS Answer
21. See Figure 2 4 for the descriptions of the various control panel buttons and LED indicators Refer to the following section for descriptions and pin definitions JF1 Header Pins 20 19 a EE Groun NMI me E 7 E E xX X ower LED Vcc 7 HDD LED Vcc 5 1 H NIC1 LED Vcc Tak cnm NIC2 LED Vcc j b Fail LED Vcc pg Ri T 5 12 PWR Fail LED e zd Ground BE Reset gt Reset Button Ground gg PWR gt Power Button 2 9 SUPERO X7DWN User s Manual C Front Control Panel Pin Definitions NMI Button The non maskable interrupt button header is located on pins 19 and 20 of JF1 Refer to the table on the right for pin definitions NMI Button Pin Definitions JF1 Pin Definition 19 Control Ground
22. X7DWN Lu Chapter 2 Installation Serial ATA Ports Six Serial ATA Ports I SATAO 1 SATA 5 are located at JS1 JS6 on the motherboard These ports provide serial link signal transmis sion which is faster than that of the traditional Parallel ATA See the table on the right for pin definitions SIMSO Slot The SIMSO Supermicro Intelligent Management Slot is located at J16 on the motherboard Refer to the layout below for the SIMSO Slot location DIMM4D GUBN PnP PPAR Pp PR 6 Bar E DIMM 3C DIMM 3B DIMM DIMM 2D CPU DIMM 2C DIMM 28 DIMM 2A Intel 5400 lorth Bridge BEE E d 2 DIMM DIMM 1B DIMM 1C DIMM 1D Serial ATA Pin Definitions Pin _ SUPER X7DWN Definition Ground TX_P TX_N Ground RX_N RX_P Ground 1 I SATA1 I SATA2 I SAT
23. reset the setting to the default setting SERR Signal Condition This setting specifies the ECC Error conditions that an SERR is to be asserted The options are None Single Bit Multiple Bit and Both Clock Spectrum Feature If Enabled the BIOS will monitor the level of Electromagnetic Interference caused by the components and will attempt to decrease the interference whenever needed The options are Enabled and Disabled gt Intel VT for Direct I O VT d Select Enable to enable the functionality of the Intel Virtualization Technology for Direct I O VT d support by reporting the I O device assignment to VMM through the Tables This feature offers fully protected I O resource sharing across the Intel platforms providing the user with greater reliability security and availability in networking and data sharing The settings are Enabled and Disabled Press the lt Enter gt key to enter the submenu The following items will appear VT d for Port 0 ESI VT d for Port 1 VT d for Port 3 VT d for Port 5 VT d for Port 7 VT d for Port 9 Select Enable to enable Intel VT d support for Port O ESI Port 3 Port 5 Port 7 Port 9 through using DRHD structures located in the ACPI Tables 4GB PCI Hole Granularity This feature allows you to select the granularity of PCI hole for PCI slots If MTRRs are not enough this option may be used to reduce MTRR occupation The options are 256 MB 512 MB 1GB and 2GB 4 11 SUP
24. 7 Super I O The disk drive adapter functions of the Super I O chip include a floppy disk drive controller that is compatible with industry standard 82077 765 a data separator write pre compensation circuitry decode logic data rate selection a clock genera tor drive interface control logic and interrupt and DMA logic The wide range of functions integrated onto the Super I O greatly reduces the number of components required for interfacing with floppy disk drives The Super I O supports 360 K 720 K 1 2 M 1 44 M or 2 88 M disk drives and data transfer rates of 250 Kb s 500 Kb s or 1 Mb s It also provides two high speed 16550 compatible serial com munication ports UARTs Each UART includes a 16 byte send receive FIFO a programmable baud rate generator complete modem control capability and a processor interrupt system Both UARTs provide legacy speed with baud rate of up to 115 2 Kbps as well as an advanced speed with baud rates of 250 K 500 K or 1 Mb s which support higher speed modems 1 12 Chapter 1 Introduction The Super I O supports one PC compatible printer port SPP Bidirectional Printer Port BPP Enhanced Parallel Port EPP or Extended Capabilities Port ECP The Super I O provides functions that comply with ACPI Advanced Configuration and Power Interface which includes support of legacy and ACPI power manage ment through an SMI or SCI function pin It also features auto power management to reduce power co
25. BIOS shadow 32h Test CPU bus clock frequency 33h Initialize Phoenix Dispatch Manager 36h Warm start shut down 38h Shadow system BIOS ROM 3Ah Auto size cache 3Ch Advanced configuration of chipset registers 3Dh Load alternate registers with CMOS values 41h Initialize extended memory for RomPilot optional 42h Initialize interrupt vectors 45h POST device initialization 46h 2 1 2 3 Check ROM copyright notice 48h Check video configuration against CMOS 49h Initialize PCI bus and devices 4Ah Initialize all video adapters in system 4Bh QuietBoot start optional 4Ch Shadow video BIOS ROM 4Eh Display BIOS copyright notice 4Fh Initialize MultiBoot 50h Display CPU type and speed 51h Initialize EISA board optional 52h Test keyboard 54h Set key click if enabled 55h Enable USB devices 58h 2 2 3 1 Test for unexpected interrupts 59h Initialize POST display service Display prompt Press lt 5 gt to enter SETUP 5Bh Disable CPU cache B 2 Appendix BIOS POST Codes POST Code Description 5Ch 60h 62h 64h 66h 67h 68h 69h 6Ah 6Bh 6Ch 70h 72h 76h 7Ch 7Dh 7Eh 80h 81h 82h 83h 84h 85h 86h 87h 88h 89h 8Ah 8Bh 8Ch 8Fh 90h 91h 92h 93h 95h 96h 97h 98h Test RAM between 512 and 640 kB Test extended memory Test extended memory address lines Jump to UserPatch1 Configure advanced cache registers Initialize Multi Processor APIC Enable external and CPU caches Setup System
26. CEK Passive Heatsink 1 Do not apply any thermal grease to the heatsink or the CPU die because the re quired amount has already been applied 2 Place the heatsink on top of the CPU so that the four mounting holes are aligned with those on the retention mechanism Screw 1 Screw 2 3 Screw in two diagonal screws ie the 1 and the 2 screws until just snug do not fully tighten the screws to avoid possible damage to the CPU 4 Finish the installation by fully tightening all four screws R Screw 2 ho To Un install the Heatsink Warning We do not recommend that the CPU or the heatsink be N removed However if you do need to uninstall the heatsink please follow the instructions below to uninstall the heatsink to prevent damage done to the CPU or the CPU socket 2 4 1 Unscrew and remove the heatsink screws from the motherboard in the sequence as show in the picture on the right 2 Hold the heatsink as shown in the picture on the right and gently wriggle the heatsink to loosen it from the CPU Do not use excessive force when wriggling the heatsink 3 Once the CPU is loosened remove the heatsink from the CPU socket 4 Clean the surface of the CPU and the heatsink to get rid of the old thermal grease Reapply the proper amount of t
27. DIMM 4 J g pe ENT cg DIMM 3D o ao PWR Fall Detect Bo Me SMBUS PS DIMM 3C O g DIMM 3B DIMM DIMM 2D ca DIMM 2C cn DIMM 2B DIMM 2 55 B DIMM 1A FANG 2 SPR DIMM 1B o CPUFAN2 DIMM 1 DIMM 1D Q Ji ej J31 JIDE1 CMOS ion Battery PA IDE 1 SUPER X7DWN 122 LIE JPL1 m n DIGG Slot0 PCI U_ Notes 1 Jumpers not indicated are for test purposes only 2 See Chapter 2 for detailed information on jumpers ports and JF1 front panel connections 3 m indicates the location of Pin 1 4 SEPC Supermicro Enhanced Power Connector is specially designed to support the Supermicro 2U Riser Card only 5 For the system to function properly make sure to unplug the power cables before removing or installing components 6 JIDE2 is for Compact Card Use only For Compact Card to work properly please enable JCF1 by putting a jumper on it and connect JWF1 to a power supply connector 1 4 Chapter 1 Introduction Quick Reference X7DWN Jumper Description Default Setting J3P 3r
28. Dog The options are Enabled and Dis abled OS Boot Watch Dog Set to Enabled to enable OS Boot Watch Dog The options are Enabled and Dis abled Timer for Loading OS Minutes This feature allows the user to set the time value in minutes for the previous item OS Boot Watch Dog by keying in a desired number in the blank The default setting is 10 minutes Please ignore this option when OS Boot Watch Dog is set to Disabled Time Out Option This feature allows the user to determine what action to take in an event of a system boot failure The options are No Action Reset Power Off and Power Cycles System Event Log System Event Log List Mode These options display the System Event SEL Log and System Event SEL Log in List Mode Items include SEL System Event Log Entry Number SEL Record ID SEL Record Type Time Stamp Generator ID SEL Message Revision Sensor Type Sensor Number SEL Event Type Event Description and SEL Event Data 8001 it Enter 4 22 Chapter 4 BIOS gt Realtime Sensor Data This feature display information from motherboard sensors such as temperatures fan speeds and voltages of various components The following items will also appear IP Address IP Subnet Mask Default Gateway MAC Address ByteO MAC Address Byte1 MAC Address Byte2 MAC Address Byte3 MAC Address Byte4 MAC Address Byte5 4 23 SUPER X7DWN User s Manual
29. Enter gt to save any changes you made You will remain in the Setup utility 4 27 SUPER X7DWN User s Manual Notes 4 28 Appendix A POST Error Beep Codes Appendix A POST Error Beep Codes This section lists POST Power On Self Test error beep codes for the Phoenix BIOS POST error beep codes are divided into two categories recoverable and terminal This section lists Beep Codes for recoverable POST errors Recoverable POST Error Beep Codes When a recoverable type of error occurs during POST BIOS will display a POST code that describes the problem BIOS may also issue one of the following beep codes 1 long and two short beeps video configuration error 1 repetitive long beep no memory detected 1 continuous beep with Front Panel Overheat LED on system overheat A 1 SUPER X7DWN User s Manual Notes Appendix BIOS POST Codes Appendix B BIOS POST Codes This section lists the POST Power On Self Test codes for the Phoenix BIOS POST codes are divided into two categories recoverable and terminal Recoverable POST Errors When a recoverable type of error occurs during POST the BIOS will display an POST code that describes the problem BIOS may also issue one of the following beep codes 1 long and two short beeps video configuration error 1 repetitive long beep no memory detected Terminal POST Errors If a terminal type of error occurs BIOS will shut down the system Be
30. LAN Configuration The following features allow the user to configure and monitor IPMI LAN settings VLAN Tagging Select Enabled to enable Virtual LAN s for IPMI connections and allow the user to configure VLAN settings The options are Enabled and Disabled VLAN ID If VLAN Tagging above is set to Enabled this item allows the user to change the VLAN ID If VLAN Tagging is disabled this item will be ignored by the firmware IP Address This item displays the IP address for the IPMI connection detected IP Subnet Mask This item displays the IP Subnet Mask for the IPMI connection detected Default Gateway This item displays the Default Gateway for the IPMI connection detected MAC Address This item displays the MAC Address for the IPMI connection detected 4 24 Chapter 4 BIOS 4 5 Security Choose Security from the Phoenix BIOS Setup Utility main menu with the arrow keys You should see the following display Security setting options are displayed by highlighting the setting using the arrow keys and pressing lt Enter gt All Security BIOS settings are described in this section Set Supervisor Password Supervisor Password Is This feature indicates if a supervisor password has been entered to the system Clear means such a password has not been used and Set means a supervisor password has been entered User Password Is This feature indicates if a user password has been entered to the system Clear
31. LED Settings Onboard PWR LED Indicator LE1 LED Settings LED Color Definition off System Off PWR cable not connected Green System On Green ACPI S1 State Flashing Quickly Green ACPI S3 STR State Flashing Slowly DIMM 4D CPU ANY ER sca E E DIMM 4C 0000000000 gt o EE DIMM 48 DIMM 4A E DIMM 3D 9 Pld PIR Fal Detect j Xwa DIMM 3B N DIMM DIMM 2D DIMM 2C DIMM 28 DIMM 2A VGA 4 y DIMM 1 g DIMM 1B DIMM 1C DIMM 1D SUPER X7DWN Un cm i r 5 2 South pus TE usb 25 FP Panel FANSE CPI 5 5 2 29 GLAN Port1 LEDs B GLAN Port2 LEDs C Onboard Power LED SUPERO X7DWN User s Manual 2 8 Floppy Drive SIMSO Serial ATA and Hard Disk Drive Connections Note the following when connecting the floppy and hard disk drive cables The floppy
32. The State of California County of Santa Clara shall be the exclusive venue for the resolution of any such disputes Super Micro s total liability for all claims will not exceed the price paid for the hardware product FCC Statement This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the manufacturer s instruction manual may cause harmful interference with radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case you will be required to correct the interference at your own expense California Best Management Practices Regulations for Perchlorate Materials This Perchlorate warning applies only to products containing CR Manganese Dioxide Lithium coin cells Perchlorate Material special handling may apply See www dtsc ca gov hazardouswaste perchlorate WARNING Handling of lead solder materials used in this product may expose you to lead a chemical known to the State of California to cause birth defects and other reproductive harm Manual Revision 1 0b Release Date Dec 12 2008 Unless you request and receive written perm
33. V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 Email sales supermicro nl General Information support supermicro nl Technical Support rma supermicro nl Customer Support Asia Pacific Address Super Micro Inc No 232 1 Liancheng Road Chung Ho 235 Taipei Hsien Taiwan R O C Tel 886 2 8226 3990 Fax 886 2 8226 3991 Web Site www supermicro com tw Technical Support Email support supermicro com tw Tel 886 2 8228 1366 ext 132 or 139 1 2 Chapter 1 Introduction SUPER X7DWN Image 1 ni E hig 2 227 A E MEL E 4 4 24 i E u Note The drawings and pictures shown in this manual were based on the latest PCB Revision available at the time of publishing of the manual The motherboard you ve received may or may not look exactly the same as the graphics shown in the manual 1 3 SUPER X7DWN User s Manual SUPER X7DWN Motherboard Layout not drawn to scale o8 jl DIMM 4D ol CPUFANI 24 Pin PWR 4 Pin PWR Pin PWR x o 20 NOOO Fans ios DIMM 4C FANT Lo o o 5 056 x JPW3 2 DIMM 4B 9 5 C a 3 8
34. and so on For optimal memory performance please install four modules at a time with the maximum of 16 modules See the Memory Instal lation Table Below 2 Insert each DIMM module vertically into its slot Pay attention to the notch along the bottom of the module to prevent inserting the DIMM module incorrectly 3 Gently press down on the DIMM module until it snaps into place in the slot Repeat for all modules see step 1 above Memory Support The X7DWN supports up to 128 GB fully buffered FBD ECC DDR 2 800 667 533 in 16 DIMMs Note 1 Due to OS limitations some operating systems may not show more than 4 GB of memory DIMM Module Population Configuration To optimize memory support follow the table below for memory installation Optimized DIMM Population Configurations Branch 0 Branch 1 Number of Bank 1 Bank 2 Bank 3 Bank4 DIMMs Channel 0 Channel 1 Channel 2 Channel 3 2 DIMMs 2 4 DIMMs 2A 4A 8 DIMMs 1B 2A 2B 4A 4B 12 DIMMs 1 1B 1C 2A 2B 2C 3C 4A 4C 16 DIMMs 1A 1B 1C 1D 2A 2B 2C 2D 3A 3B 3C 3D 4A 4B 4C 4D Notes i DIMM slot speci
35. health moni toring An onboard voltage monitor will scan the following voltages continuously Onboard Voltage Monitors for CPU Core Chipset Voltage Memory Voltage 1 8V 5V 3 3V 3 3V Standby 5V Standby 12V 12V and VBatt Once a voltage becomes unstable a warning is given or an error message is sent to the screen Users can adjust the voltage thresholds to define the sensitivity of the voltage monitor Fan Status Monitor with Firmware Control The PC health monitor can check the RPM status of the cooling fans The onboard CPU and chassis fans are controlled by Thermal Management via BIOS under Hardware Monitoring in the Advanced Setting Environmental Temperature Control The thermal control sensor monitors the CPU temperature in real time and will turn on the thermal control fan whenever the CPU temperature exceeds a user defined threshold The overheat circuitry runs independently from the CPU Once it detects that the CPU temperature is too high it will automatically turn on the thermal fan control to prevent any overheat damage to the CPU The onboard chassis thermal circuitry can monitor the overall system temperature and alert users when the chassis temperature is too high CPU Fan Auto Off in Sleep Mode The CPU fan becomes active when the power is turned on It continues to operate when the system enters the Standby mode When in the sleep mode the CPU will not run at full power thereby generating less heat Syst
36. information such as CPU temperature system voltages and fan status See the Figure below for a display of the Supero Doctor III interface Note 1 The default user name and password are ADMIN Note 2 In the Windows OS environment the Supero Doctor settings take pre cedence over the BIOS settings When first installed Supero Doctor adopts the temperature threshold settings previously set in BIOS Any subsequent changes to these thresholds must be made within Supero Doctor since the SD settings override the BIOS settings For the Windows OS to adopt the BIOS temperature threshold settings please change the SDIII settings to be the same as those set in BIOS Supero Doctor Interface Display Screen l Health Information 2 Appendix Installing Other Software Programs and Drivers Supero Doctor Interface Display Screen Ill Remote Control Graceful power control Supero Doctor a user to adiom the OS to reboot shut down within a specdied tim the defia is 30 seconds Before the reboots or sints down it s alowed to cancel the action Requirements Keep Supero SD3Serece Daemen mnang at all timas on thos system Promde TCP IP connectivity Power control zi Note SD Software Revision 1 0 can be downloaded from our Web site at ftp ftp supermicro com utility Supero Doctor You can also download SDIII User s Guide at http www supermicro com PRODUCT Manuals S
37. means such a password has not been used and Set means a user password has been entered Set Supervisor Password When the item Set Supervisor Password is highlighted hit the lt Enter gt key When prompted type the Supervisor s password in the dialogue box to set or to change supervisor s password which allows access to the BIOS Set User Password When the item Set User Password is highlighted hit the lt Enter gt key When prompted type the user s password in the dialogue box to set or to change the user s password which allows access to the system at boot up Password on Boot This setting allows you to determine if a password is required for a user to enter the system at bootup The options are Enabled password required and Disabled 4 25 SUPER X7DWN User s Manual 4 6 Boot Choose Boot from the Phoenix BIOS Setup Utility main menu with the arrow keys You should see the following display See details on how to change the order and specs of boot devices in the Item Specific Help window All Boot BIOS settings are described in this section Boot List Candidate List Boot Priority Order Excluded from Boot Orders The devices included in the boot list section above are bootable devices listed in the sequence of boot order as specified The boot functions for the devices included in the candidate list above are currently disabled Use a lt gt key ora lt gt key to move the device up or down Use
38. options are Enabled and Disabled OS Booting Set this feature to Enabled to allow the OS to boot up the system The options are Enabled and Disabled Power Loss Control This setting allows you to choose how the system will react when power returns after an unexpected loss of power The options are Stay Off Power On and Last State Watch Dog If enabled this option will automatically reset the system if the system is not active for more than a predefined time period The options are Enabled and Disabled Summary Screen This setting allows you to Enable or Disable the summary screen which displays the system configuration during bootup 4 7 SUPER X7DWN User s Manual Memory Cache Cache System BIOS Area This setting allows you to designate a reserve area in the system memory to be used as a System BIOS buffer to allow the BIOS to write cache its data into this reserved memory area Select Write Protect to enable the function and reserve this area for the Video BIOS ROM access only Select Uncached to disable this function and make this area available for other devices Cache Video BIOS Area This setting allows you to designate a reserve area in the system memory to be used as a Video BIOS buffer to allow the BIOS to write cache its data into this reserved memory area Select Write Protect to enable the function and reserve this area for the Video BIOS ROM access only Select Uncached to disable this function a
39. possible boot failure 4 1 SUPER X7DWN User s Manual 4 2 Running Setup Default settings are in bold text unless otherwise noted The BIOS setup options described in this section are selected by choosing the appropriate text from the main BIOS Setup screen All displayed text is described in this section although the screen display is often all you need to understand how to set the options as shown on the following page When you first power on the computer the Phoenix BIOS is immediately acti vated While the BIOS is in control the Setup program can be activated in one of two ways 1 By pressing Delete immediately after turning the system or 2 When the message shown below appears briefly at the bottom of the screen during the POST Power On Self Test press the lt Delete gt key to activate the main Setup menu Press the lt Delete gt key to enter Setup 4 3 Main BIOS Setup All main Setup options are described in this section The main BIOS Setup screen is displayed below Use the Up Down arrow keys to move among the different settings in each menu Use the Left Right arrow keys to change the options for each setting Press the lt Esc gt key to exit the CMOS Setup Menu The next section describes in detail how to navigate through the menus Items that use submenus are indicated with the icon With the item highlighted press the lt Enter gt key to access the submenu 4 2 Chapter 4 BIO
40. the lt f gt key or the lt r gt key to specify the type of an USB device either fixed or removable You can select one item from the boot list and hit the lt x gt key to remove it from the list of bootable devices to make its resource available for other bootable devices Subsequently you can select an item from the candidate list and hit the lt x gt key to remove it from the candidate list and put it in the boot list This item will then become a bootable device See details on how to change the priority of boot order of devices in the Item Specific Help window 4 26 Chapter 4 BIOS 4 7 Exit Choose Exit from the Phoenix BIOS Setup Utility main menu with the arrow keys You should see the following display All Exit BIOS settings are described in this section Exit Saving Changes je Enter Exit Saving Changes Highlight this item and hit lt Enter gt to save any changes you made and to exit the BIOS Setup utility Exit Discarding Changes Highlight this item and hit lt Enter gt to exit the BIOS Setup utility without saving any changes you may have made Load Setup Defaults Highlight this item and hit lt Enter gt to load the default settings for all items in the BIOS Setup These are the safest settings to use Discard Changes Highlight this item and hit lt Enter gt to discard cancel any changes you ve made You will remain in the Setup utility Save Changes Highlight this item and hit lt
41. 3 MHz 51010 PCI U x8 Slot1 PCI X 133 MHz Slot2 PCI X 133MHz Slot3 PCI Exp x8 Slot4 PCI Exp x4 Slot5 PCI Exp x8 and Slot6 PCI Exp x8 Access the submenu for each of the settings above to make changes to the following Option ROM Scan When enabled this setting will initialize the device expansion ROM The options are Enabled and Disabled Enable Master This setting allows you to enable the selected device as the PCI bus master The options are Enabled and Disabled Latency Timer This setting allows you to set the clock rate for Bus Master A high priority high throughout device may benefit from a greater clock rate The options are Default 0020h 0040h 0060h 0080h 00AO0h 00COh and OOEOh For Unix Novell and other Operating Systems please select the option other If a drive fails after the installation of a new software you might want to change this setting and try again A different OS requires a different Bus Master clock rate Large Disk Access Mode This setting determines how large hard drives are to be accessed The options are 4 10 Chapter 4 BIOS DOS or Other for Unix Novelle NetWare and other operating systems gt Advanced Chipset Control Access the submenu to make changes to the following settings Warning Take caution when changing the Advanced settings An Incor rect value a very high DRAM frequency or an incorrect DRAM timing may cause system to become unstable When this occurs
42. 3D DIMM 3C DIMM 3B DIMM DIMM 2D DIMM 2C DIMM 28 DIMM 2 DIMM 1A DIMM 1B DIMM 1C DIMM 1D _SUPER X7DWN Intel ESB 2 South Bridge ius ee 1 cput CPU2 puit CPUPANZ OH Fan Fail LED Pin Definitions JF1 Pin Definition Vcc OH Fan Fail Indicator Status State Definition Off Normal On Overheat Flash Fan Fail ing PWR Fail LED Pin Definitions JF1 Pin Definition 5 VCG A OH Fan Fail LED B PWR Supply Fail 20 19 Groun NMI X X Power LED Vcc HDD LED Vcc NIC1 LED Vcc NIC2 LED Vcc Vcc Vcc Reset Reset Button PWR gt Power Button Chapter 2 Installation Reset Button The Reset Button connection is located on pins 3 and 4 of JF1 Attach it to a hardware reset switch on the computer case Refer to the table on the right for pin definitions Power Button The Power Button connection is located on pins 1 and 2 of JF1 Momentarily contacting both pins will power on off the system This button can also be configured to
43. A3 SATA4 I SATA5 SIMSO O O 18118 J amp sail 8 O O O 8181818 sail 8 O lT O SUPERO X7DWN User s Manual IDE Connectors There are two IDE Connectors JIDE1 Blue JIDE2 White on the mother board The blue IDE connector JIDE1 is designated the Primary IDE Drive The white IDE connector JIDE2 is designated the Secondary IDE Drive specially reserved for Compact Flash Card use only See the note below See the table on the right for pin defi nitions Note JIDE2 the white slot is reserved for Compact Flash Card use only Do not use it for other devices If JIDE2 is populated with a Compact Flash Card JIDE1 the blue slot will be available for one device only For the Compact Flash Card to work properly you will need to connect a power cable to JWF1 first IDE Drive Connectors Pin Definitions Pin Definition Pin Definition 1 Reset IDE 2 Ground 3 Host Data 7 4 Host Data 8 5 Host Data 6 6 Host Data 9 T Host Data 5 8 Host Data 10 9 Host Data 4 10 Host Data 11 11 Host Data 3 12 Host Data 12 13 Host Data 2 14 Host Data 13 15 Host Data 1 16 Host Data 14 17 Host Data 0 18 Host Data 15 19 Ground 20 Key 21 DRQ3 22 Ground 23 Write 24 Ground 25 Read 26 Ground 27 IOCHRDY 28 BALE 29 DACK3 30 Ground 31 IRQ14 32 0 516 99 Addr1 34 Ground 35 36 Addr2 37
44. Additionally the ESB 2 chip also contains a PCI interface controller Azalia 97 digital controller integrated LAN controller an ASF control ler and an ESI for communication with the MCH The Intel ESB2 offers the data buffering and interface arbitration capabilities required for a high end system to constantly operate efficiently and maintain peak performance Compliant with the ACPI platform the ESB2 supports the Full On Stop Grant Suspend to RAM Suspend to Disk and Soft Off power management states Combined with the functionality offered by the onboard LAN controller the ESB2 also supports alert systems for remote management With the 5400 chipset built in the X7DWN offers a superb solution for intense computing and complex environments and is ideal for high end server sys tems 1 9 SUPER X7DWN User s Manual 1 3 Special Features Recovery from AC Power Loss BIOS provides a setting for you to determine how the system will respond when AC power is lost and then restored to the system You can choose for the system to remain powered off in which case you must hit the power switch to turn it back on or for it to automatically return to a power on state See the Advanced BIOS Setup section to change this setting The default setting is Last State 1 4 Health Monitoring This section describes the PC health monitoring features of the X7DWN All have an onboard System Hardware Monitor chip that supports PC
45. Chip Select 0 38 Chip Select 1 39 Activity 40 Ground A 1 DIMM 4D CPUFANI m zio DIMM 4C APN PIR 5 moos DIMM 4B DIMM 4A JAR DIMM 3D DIMM DIMM 3 DIMM DIMM 20 DIMM 2 DIMM 2B DIMM 2 DIMM 1 DIMM 1B DIMM 1C DIMM 1D __SUPER X7DWN J SMBUS_PS 6 er VIR Fal Detect USB 2 3 WOL 2 32 IDE 2 Compact Flash Chapter 3 Troubleshooting Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures Use the following procedures to troubleshoot your system If you have followed all of the procedures below and still need assistance refer to the Technical Support Procedures and or Returning Merchandise for Service section s in this chapter Note Always disconnect the power cord before adding changing or install ing any hardware components Before Power On 1 Make sure that there are no short circuits between the motherboard and chas sis 2 Disconnect all ribbon wire cables from the motherboard includin
46. DIII User Guide pdf For Linux we will still recommend that you use Supero Doctor Il C 3 SUPER X7DWN User s Manual Notes Disclaimer Continued The products sold by Supermicro are not intended for and will not be used in life support systems medical equipment nuclear facilities or systems aircraft aircraft devices aircraft emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic property damage Accordingly Supermicro disclaims any and all liability and should buyer use or sell such products for use in such ultra hazardous applications it does so entirely at its own risk Furthermore buyer agrees to fully indemnify defend and hold Supermicro harmless for and against any and all claims demands actions litigation and proceedings of any kind arising out of or related to such ultra hazardous use or sale
47. ER X7DWN User s Manual Memory Voltage Select Auto to allow the BIOS to automatically detect memory voltage based on the SPD table Select 1 5V to force the system to use 1 5V for lower power fully buffered DIMM modules Select 1 8V to use 1 8V power for onboard memory modules Note Using 1 8V might cause damage to the memory modules that only support 1 5V power The options are Auto 1 5V and 1 8V Memory Branch Mode This option determines how the two memory branches operate System address space can either be interleaved between the two branches or Sequential from one branch to another Mirror mode allows data correction by maintaining two copies of data in two branches Single Channel 0 allows a single DIMM population during system manufacturing The options are Interleave Sequential Mirroring and Single Channel Branch 0 Rank Sparing Branch 1 Rank Sparing Select Enable to enable the function of memory sparing for Memory Bus Branch 0 or Branch 1 The options are Enabled and Disabled Branch 0 Rank Interleaving Branch 1 Rank Interleaving Select enable to enable Interleaved Memory for Memory Bus Branch 0 Rank or Branch 1 Rank The options for Memory Interleaving are 1 1 2 1 and 4 1 Enhanced x8 Detection Select Enabled to enable Enhanced x8 DRAM UC Error Detection The options are Disabled and Enabled Demand Scrub Scrubbing is a process that allows the North Bridge to correct correctable memory errors found
48. JPL1 enables or disables the GLAN Port1 GLAN Port2 on the mother board See the table on the right for jumper settings The default setting is Enabled Connector T i E Jumper Cap 3 2 1 1 Setting Pin 1 2 short GLAN Enable Jumper Settings Pin Definition 1 2 Enabled default DIMM 4D PUAN b PUFANI Sr ee E DIMM 4C o 81904 221 Xd DIMM 4B DIMM 4A 1a DIMM 3D ies Fal Detect 21 SMBUS PS DIMM 3 Jj s DIMM 3B f DIMM DIMM 20 DIMM 2 DIMM 2B DIMM 2 NGA C DIMM 1 UPER X7DWN DIMM 18 Bo DIMM 1 DIMM 1D tel ESB 22 South Bridge coma EI arav 5 5 W EP Or Panel Floppy FANG Disabled A GLAN Ports1 2 Enable Chapter 2 Installation CMOS Clear JBT1 is used to clear CMOS Instead of pins this jumper consists of contact pads to prevent the accidental clearing of CMOS To clear CMOS use a metal ob
49. Management Mode SMM area Display external L2 cache size Load custom defaults optional Display shadow area message Display error messages Check for configuration errors Check for keyboard errors Set up hardware interrupt vectors Initialize Intelligent System Monitoring optional Initialize coprocessor if present Disable onboard Super I O ports and IRQs optional Late POST device initialization Detect and install external RS232 ports Configure non MCD IDE controllers Detect and install external parallel ports Initialize PC compatible PnP ISA devices Re initialize onboard ports Configure Motherboard Configurable Devices optional Initialize BIOS Data Area Enable Non Maskable Interrupts NMIs Initialize Extended BIOS Data Area Test and initialize PS 2 mouse Initialize floppy controller Determine number of ATA drives optional Initialize hard disk controllers Initialize local bus hard disk controllers Jump to UserPatch2 Build MPTABLE for multi processor boards Install CD ROM for boot Clear huge ES segment register Fix up Multi Processor table 1 2 Search for option ROMs and shadow if successful One long two short beeps on checksum failure B 3 SUPER X7DWN User s Manual POST Code Description 99h Check for SMART Drive optional 9Ch Set up Power Management 9Dh Initialize security engine optional 9Eh Enable hardware interrupts 9Fh Determine number of ATA and SCSI drives AOh Set time o
50. OM if a CDROM drive is installed Select ATAPI if a removable disk drive is installed Multi Sector Transfers This item allows the user to specify the number of sectors per block to be used in multi sector transfer The options are Disabled 4 Sectors 8 Sectors and 16 Sectors LBA Mode Control This item determines whether the Phoenix BIOS will access the IDE Channel 0 Master Device via the LBA mode The options are Enabled and Disabled 32 Bit l O This option allows the user to enable or disable the function of 32 bit data transfer The options are Enabled and Disabled Transfer Mode This option allowsthe userto setthe transfer mode Theoptions are Standard Fast PIO1 Fast PIO2 Fast PIO3 Fast 4 FPIO3 DMA1 and FPIO4 DMA2 Ultra DMA Mode This option allows the user to select Ultra Mode The options are Disabled Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 and Mode 5 Parallel ATA This setting allows the user to enable or disable the function of Parallel ATA The options are Disabled Channel 0 Channel 1 and Both Serial ATA This setting allows the user to enable or disable the function of Serial ATA The options are Disabled and Enabled 4 4 Chapter 4 BIOS SATA Controller Mode Option Select Compatible to allow the SATA and PATA drives to be automatically detected and be placed in the Legacy Mode by the BIOS Select Enhanced to allow the SATA and PATA drives to be to be automatically detected an
51. R i DIMM 4C o 5 ETE dm B SGPIO Header 1 SGPIO Header 2 BUS PS Buzzer DIMM 30 DIMM 3C DIMM 3B DIMM DIMM 20 DIMM 2 DIMM 2B DIMM 2 FP Ctrl Panel 2 Intel 5400 North Bridge DIMM 1A E DIMM 1B DIMM 1C DIMM 1D LAN jJ cm _ SUPER X7DWN JE Ex an lt intel ESB Z South Bridg 2 2 23 SUPERO X7DWN User s Manual 2 6 Jumper Settings Explanation of Jumpers To modify the operation of the motherboard jumpers can be used to choose between optional settings Jumpers create shorts between two pins to change the function of the connector Pin 1 is identified with a square solder pad onthe printed circuit board See the motherboard layout pages for jumper locations Note On two pin jumpers Closed means the jumper is on and Open means the jumper is off the pins GLAN Enable Disable
52. S Main BIOS Setup Menu Sustem Time Main Setup Features System Time To set the system date and time key in the correct information in the appropriate fields Then press the lt Enter gt key to save the data System Date Using the arrow keys highlight the month day and year fields and enter the correct data Press the lt Enter gt key to save the data BIOS Date This field displays the date when this version of BIOS was built Legacy Diskette A This setting allows the user to set the type of floppy disk drive installed as diskette A The options are Disabled 360Kb 5 25 in 1 2MB 5 25 in 720Kb 3 5 in 1 44 1 25MB 3 5 in and 2 88MB 3 5 in gt Channel 0 Master Slave SATA Port 0 SATA Port 1 SATA Port 2 and SATA Port 3 These settings allow the user to set the parameters of IDE Channel 0 Master Slave SATA Port 0 SATA Port 1 SATA Port 2 SATA Port 3 slots Hit lt Enter gt to activate the following sub menu screen for detailed options of these items Set the correct configurations accordingly The items included in the sub menu are 4 3 SUPER X7DWN User s Manual Type This option allows the user to select the type of IDE hard drive Select Auto to allow the BIOS to automatically configure the parameters of the HDD installed at the connection Enter a number between 1 to 39 to select a predetermined HDD type Select User to allow the user to enter the parameters of the HDD installed Select CDR
53. SUPER SUPER X7DWN USER S MANUAL Revision 1 0b The information in this User s Manual has been carefully reviewed and is believed to be accurate The vendor assumes no responsibility for any inaccuracies that may be contained in this document makes no commitment to update or to keep current the information in this manual or to notify any person or organization of the updates Please Note For the most up to date version of this manual please see our web site at www supermicro com Super Micro Computer Inc Supermicro reserves the right to make changes to the product described in this manual at any time and without notice This product including software if any and documentation may not in whole or in part be copied photocopied reproduced translated or reduced to any medium or machine without prior written consent IN NO EVENT WILL SUPERMICRO BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN PARTICULAR SUPERMICRO SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HARDWARE SOFTWARE OR DATA Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California USA
54. an FBD memory module When the CPU or I O issues a demand read command and the read data from memory turns out to be a correctable ECC it is corrected and sent to the original source Memory is updated as well Select Enabled to use Demand Scrubbing for ECC memory correction The options are Enabled and Disabled High Temperature DRAM Operation When set to Enabled the BIOS will refer to the SPD table to set the maximum DRAM temperature If disabled the BIOS will setthe maximum DRAM temperature based on a predefined value The options are Enabled and Disabled 4 12 Chapter 4 BIOS AMB Thermal Sensor Select Enabled to enable the thermal sensor embedded in the Advanced Memory Buffer on a fully buffered memory module for thermal monitoring The options are Disabled and Enabled Thermal Throttle Select Enabled to enable closed loop thermal throttling on a fully buffered FBD memory module In the closed loop thermal environment thermal throttling will be activated when the temperature of the FBD DIMM module exceeds a predefined threshold The options are Enabled and Disabled Global Activation Throttle Select Enabled to enable the function of open loop global thermal throttling on the fully buffered FBD memory modules and allow global thermal throttling to become active when the number of activate control exceeds a predefined number The options are Enabled and Disabled Force ITK Configuration Clocking Select Enabled t
55. anual a kk o kaya kya de rua ee ka akat iii 2 kay n kayan b naked una ka kulek kak ERU iii Conventions Used in the EEE iii Chapter 1 Introduction 1 1 RR 1 1 CGC 1 1 Contacting Supermicro 1 2 SUPERG 7 IMAGE 2 0404000 1 3 SUPER 7 Layout itecto 1 4 Quick Reference 1 5 Motherboard 1 6 Intel 5400 Chipset System Block Diagram 1 8 1 2 Chipset Overview hada ka aa aka aa kai k a kak daa 1 9 1 3 Special Features kK KA 1 10 1 4 PC Health Monitoring kana kan ka Kal s r a war xana 1 10 1 5 ACPI Features iriiritia PEE 1 11 1 6 Power Supply eka kaba di Ca aa daya ak A a 1 12 xwake N k erb y 1 12 Chapter 2 Installation 2 1 Static Sensitive Devices 4 k k k k kak 2 1 PFO CAUTIONS fT 2 1 DD Mcr 2 1 2 2 Processor and Heatsink Installation
56. connector JPW3 on the motherboard These power connec tors meet the SSI EPS 12V specifi cation The 4 pin 12V PWR supply is also required to provide adequate power to the system See the table on the right for pin definitions For ATX Power 24 pin Connector Pin Definitions Definition 3 3V 12V COM PS_ON COM COM COM Res NC 5V 5V Pin ND zs Definition 3 3V 3 3V COM 5V COM 5V COM PWR OK 5VSB 12V the 8 pin PWR JPW3 please refer to the item listed below 5 E cm 12V COM N 3 3V 12V 4 pin Power Con nector Processor Power Connector Pin Definitions Pins Definition In addition to the Primary ATX power connector above the 12V 8 CPU PWR connector at JPW3 must also be connected to your power supply See the table on the right for pin definitions 3 and 4 12V 12V 8 pin Power Con nector Pin Definitions Pins Definition 1 through 4 Ground 5 through 8 12V DIMM 4D ey zb DIMM 4C DIMM 4B DIMM 4A DIMM 3D DIMM 3C DIMM 3B DIMM DIMM 20 DIMM 2 DIMM 2B DIMM 2 A 24 pin ATX PWR B 8 pin Processor PWR C 4 pin PWR
57. d Mode Available when supported by the CPU Set to Enabled to enable Enhanced Halt State to lower CPU voltage frequency to prevent overheat The options are Enabled and Disabled Note please refer to Intel s web site for detailed information Execute Disable Bit Available when supported by the CPU and the OS Set to Enabled to enable Execute Disable Bit and allow the processor to classify areas in memory where an application code can execute and where it cannot and thus preventing a worm or a virus from inserting and creating a flood of codes to overwhelm the processor or damage the system during an attack Note this feature is available when your OS and your CPU support the function of Execute Disable Bit The options are Disabled and Enabled For more information please refer to Intel s and Microsoft s web sites Adjacent Cache Line Prefetch Available when supported by the CPU The CPU fetches the cache line for 64 bytes if this option is set to Disabled The CPU fetches both cache lines for 128 bytes as comprised if Enabled The options are Disabled and Enabled Hardware Prefetch Available if supported by the CPU Set to this option to Enabled to enable the hardware components that are used in conjunction with software programs to prefetch data in order to speed up data processing The options are Disabled and Enabled Set Maximum Ext CPUID 3 When set to Enabled the Maximum Extended CPUID will be set to 3 The option
58. d PWR Failure Detection Off Disabled JBT1 CMOS Clear See Chapter 2 JCF1 Compact Card Master Slave Select On Master JI2 C1 JI2C2 12 Bus to PCI X PCI E Slots Open Disabled JP2 Memory Voltage Select Pins 1 2 Auto JPG1 VGA Enable Pins 1 2 Enabled JPL1 GLAN1 2 Enable Pins 1 2 Enabled JWD Watch Dog Pins 1 2 Reset Connector Description COM1 COM2 COM1 COM2 Serial Port Connector JCOM1 JCOM2 FAN 1 8 Fans 1 8 Fans1 6 System Fans Fans7 8 CPU Fans Floppy Floppy Disk Drive Connector J22 IDE1 IDE2 IDE1 Hard Drive JIDE1 Compact Flash Card JIDE2 I SATA 0 5 Intel SATA 0 5 Connectors JS1 JS6 JAR Alarm Buzzer Reset JD1 PWR LED pins1 3 SpeakerHeader pins 4 7 JF1 Front Control Panel Connector JL1 Chassis Intrusion Header JOH1 Overheat LED JP3 Power Fault Power Supply Failure PSF JPW1 Primary 24 Pin ATX PWR Connector JPW2 JPW3 12V 4 pin PWR JWP2 12V 8 pin PWR JPW3 JWF1 Compact Card PWR Connector Used if JFC1 is on JWOL Wake on LAN Header JWOR Wake on Ring Header LAN1 LAN2 G bit Ethernet Ports 1 2 JLAN1 JLAN2 LE1 PWR LED Indicator SIMSO IPMI SIM Supermicro Intelligent MGMT Slot J16 SMB System Management Bus Header J18 SMB PS Power System Management I C Header J17 SP1 Internal Buzzer T SGPIO1 T SGPIO2 Serial Link General Purpose I O Headers J29 J30 Keylock Keylock Header JK1 USB 0 1 Back Panel USB 0 1 JPUSB1 USB 2 3 USB4 Front Panel USB 2 3 JPUSB2 USB 4 JPUSB3 VGA VGA Con
59. d be placed in the Native IDE Mode Note The Enhanced mode is supported by the Windows 2000 OS or a later version When the SATA Controller Mode is set to Enhanced the following items will display Serial ATA SATA RAID Enable Select Enable to enable Serial ATA RAID Functions For the Windows OS environment use the RAID driver if this feature is set to Enabled When this item is set to Enabled the item ICH RAID Code Base will be available for you to select either Intel or Adaptec Host RAID firmware to be activated If this item is set to Disabled the item SATA AHCI Enable will be available The options are Enabled and Disabled ICH RAID Code Base Select Intel to enable Intel s SATA RAID firmware Select Adaptec to use Adaptec s HostRAID firmware The options are Intel and Adaptec SATA AHCI Enable Select Enable to enable the function of Serial ATA Advanced Host Interface Take caution when using this function This feature is for advanced programmers only The options are Enabled and Disabled System Memory This display informs you how much system memory is recognized as being present in the system Extended Memory This display informs you how much extended memory is recognized as being present in the system 4 5 SUPER X7DWN User s Manual 4 4 Advanced Setup Choose Advanced from the Phoenix BIOS Setup Utility main menu with the arrow keys You should see the following display The items with a tria
60. disk drive cable has seven twisted wires e A red mark on a wire typically designates the location of pin 1 A single floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives The connector with twisted wires always connects to drive A and the connector that does not have twisted wires always Floppy Drive Connector Pin Definitions Pin Definition Pin Definition Floppy Connector 1 Ground 2 FDHDIN 3 Ground 4 Reserved The floppy connector is located at 5 Key 6 FDEDIN 422 on the motherboard See the 7 Ground 8 Index table on the right for pin definitions 9 Ground 10 Motor Enable 11 Ground 12 Drive Select B 13 Ground 14 Drive Select B 15 Ground 16 Motor Enable Ue Ground 18 DIR 19 Ground 20 STEP 21 Ground 22 Write Data 23 Ground 24 Write Gate 25 Ground 26 Track 00 27 Ground 28 Write Protect 29 Ground 30 Read Data 31 Ground 32 Side 1 Select 93 Ground 34 Diskette mo Pi A Floppy DIMM 3C DIMM 3B 4 N DIMM DIMM 2D DIMM 2C DIMM 28 DIMM ZA CPU Ej Intel 5400 27 North Bridge CPU2 DIMM 1A E DIMM 18 DIMM 1C DIMM 1D LAN cm SUPER
61. e user presses any key the CPU will wake up and the LED will automatically stop blinking and remain on Main Switch Override Mechanism When an ATX power supply is used the power button can function as a system suspend button to make the system enter a SoftOff state The monitor will be suspended and the hard drive will spin down Pressing the power button again will cause the whole system to wake up During the SoftOff state the ATX power supply provides power to keep the required circuitry in the system alive In case the system malfunctions and you want to turn off the power just press and hold the power button for 4 seconds This option can be set in the Power section of the BIOS Setup routine External Modem Ring On Wake up events can be triggered by a device such as the external modem ringing when the system is in the SoftOff state Note that external modem ring on can only be used with an ATX 2 01 or above compliant power supply Wake On LAN WOL Wake On LAN is defined as the ability of a management application to remotely power up a computer that is powered off Remote PC setup up dates and asset tracking can occur after hours and on weekends so that daily LAN traffic is kept to a minimum and users are not interrupted The motherboard has a 3 pin header WOL to connect to the 3 pin header on a Network Interface Card NIC that has 1 11 SUPER X7DWN User s Manual WOL capability In addition an onboard LAN contr
62. eader 2 19 Power Supply Failure kalak a nk bl n ba Ka d haa or bak 2 20 Alarm R SOL xi im ke xana bani va diya bka Wa ka da kan nid kan dad H W 2 20 Oyerheat LED F an esses 2 21 SMB CONN CON cscs kk k daka R 2 21 Power SMB sa dcsl kasa anean balk ana ae hln y hd nade n n 2 22 E 2 22 Compact Flash PWR 2 23 T SGPIO Headers rn y din aka ka Wa dE RE D be W W d kk 2 23 2 6 Jumper Settings e 2 24 Explanation of Jumpers 1 ka saia da ka anan daa 2 24 GLAN Enable Disable ss cis c eit enero ka WAW 2 24 Clear CMOS MEE M I 2 25 Watch DOG L 2 25 VGA s k din kk n kab Eh 2 26 Memory Voltage Select l lb b ki kana silk karl b k b xend a arka ala 2 26 3rd PWR Supply PWR Fault 2 27 2 Bus to PCI X PCI Exp Slots Enable Disable 2 27 Compact Flash Master Slave 2 28 2 7 Onboard Indicators
63. ecision Event Timer is used to replace the 8254 Programmable Interval Timer The options for this feature are Yes and No USB Function Select Enabled to enable the function of USB devices specified The settings are Enabled and Disabled Legacy USB Support This setting allows you to enable support for Legacy USB devices The settings are Enabled and Disabled gt Advanced Processor Options Access the submenu to make changes to the following settings CPU Speed This is a display that indicates the speed of the installed processor Frequency Ratio Available when supported by the CPU The feature allows the user to set the internal frequency multiplier for the CPU The options are Default x12 x13 x14 x15 x16 x17 and x18 Core Multi Processing Available when supported by the CPU Set to Enabled to use a processor s Second Core and beyond Please refer to Intel s web site for more information The options are Disabled and Enabled Machine Checking Available when supported by the CPU Set to Enabled to activate the function of Machine Checking and allow the CPU to detect and report hardware machine errors via a set of model specific registers MSRs The options are Enabled and Disabled Fast String Operations Available if supported by the CPU Set to Enabled to enable the fast string operations for special CPU instructions The options are Disabled and Enabled 4 14 Chapter 4 BIOS C1 C2 Enhance
64. em Resource Alert This feature is available when used with Supero Doctor in the Windows OS environment or used with Supero Doctor II in Linux Supero Doctor is used to notify the user of certain system events For example you can also configure 1 10 Chapter 1 Introduction Supero Doctor to provide you with warnings when the system temperature CPU temperatures voltages and fan speeds go beyond a pre defined range 1 5 ACPI Features ACPI stands for Advanced Configuration and Power Interface The ACPI specifi cation defines a flexible and abstract hardware interface that provides a standard way to integrate power management features throughout a PC system including its hardware operating system and application software This enables the system to automatically turn on and off peripherals such as CD ROMs network cards hard disk drives and printers In addition to enabling operating system directed power management ACPI provides a generic system event mechanism for Plug and Play and an operating system independent interface for configuration control ACPI leverages the Plug and Play BIOS data structures while providing a processor architecture indepen dent implementation that is compatible with both Windows 2000 and Windows 2003 Operating Systems Slow Blinking LED for Suspend State Indicator When the CPU goes into a suspend state the chassis power LED will start blinking to indicate that the CPU is in suspend mode When th
65. endices Appendix A BIOS POST Codes 1 Appendix B Installing the Windows 5 1 Appendix C Installing Other Software Programs and Drivers C 1 viii Chapter 1 Introduction Chapter 1 Introduction 1 1 Overview Checklist Congratulations on purchasing your computer motherboard from an acknowledged leader in the industry Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance Check that the following items have all been included with your motherboard If anything listed here is damaged or missing contact your retailer The following items are included in the retail box One 1 Supermicro Mainboard One 1 ribbon cable for IDE devices CBL 0036L 03 One 1 floppy ribbon cable CBL 0022L Six 6 Serial ATA cables CBL 0044L x6 One 1 backpanel shield CSE PTO7L One 1 Supermicro CD containing drivers and utilities One 1 User s BIOS Manual 1 1 SUPER X7DWN User s Manual Contacting Supermicro Headquarters Address Super Micro Computer Inc 980 Rock Ave San Jose CA 95131 U S A Tel 1 408 503 8000 Fax 1 408 503 8008 Email marketing supermicro com General Information support supermicro com Technical Support Web Site www supermicro com Europe Address Super Micro Computer B
66. f day A2h Check key lock A4h Initialize typematic rate A8h Erase lt ESC gt prompt AAh Scan for lt ESC gt key stroke ACh Enter SETUP AEh Clear Boot flag BOh Check for errors B1h Inform RomPilot about the end of POST optional B2h POST done prepare to boot operating system B4h 1 One short beep before boot B5h Terminate QuietBoot optional B6h Check password optional B7h Initialize ACPI BIOS and PPM Structures B9h Prepare Boot BAh Initialize SMBIOS BCh Clear parity checkers BDh Display MultiBoot menu BEh Clear screen optional BFh Check virus and backup reminders COh Try to boot with INT 19 C1h Initialize POST Error Manager PEM C2h Initialize error logging C3h Initialize error display function C4h Initialize system error flags C6h Console redirection init C7h Unhook INT 10h if console redirection enabled C8h Force check optional C9h Extended ROM checksum optional CDh Reclaim console redirection vector B 4 Appendix BIOS POST Codes POST Code Description D2h D4h D8h D9h DEh Unknown interrupt Check Intel Branding string Alert Standard Format initialization Late init for IPMI Log error if micro code not updated properly The following are for boot block in Flash ROM POST Code Description EOh Eth E2h E3h E4h E5h E6h E7h E8h E9h EAh EBh ECh EDh EEh EFh FOh F1h F2h F3h F4h F5h F6h F7h Initialize the chipset Initialize the bridge Initialize the CPU
67. fied DIMM slot to be populated DIMM slot not to be populated ii Both FBD 533 MHz 667MHz and 800MHz DIMMs are supported however you need to use the memory modules of the same speed and of the same type on a motherboard iii Interleaved memory is supported when pairs of DIMM modules are installed For optimal memory performance please install pairs of memory modules in both Branch 0 and Branch 1 iv For memory to work properly you need to follow the restrictions listed above 2 6 Chapter 2 Installation Note 2 Due to memory allocation to system devices memory remaining avail able for operational use will be reduced when 4 GB of RAM is used The reduc tion in memory availability is disproportional See the Memory Availability Table below Possible System Memory Allocation amp Availability System Device Physical Memory Remaining Available 4 GB Total System Memory Firmware Hub flash memory System 3 99GB BIOS Local APIC 3 99GB Area Reserved for the chipset 3 99GB Enumeration Area 1 3 76GB 3 51GB 4 Kbytes 3 99GB PCI Express 256 MB Enumeration Area 2 if needed 3 01GB Aligned on 256 MB boundary VGA Memory 2 85GB TSEG 2 84GB Memory available for the OS amp other 2 84GB applications Note Notch should align with the receptive point on the slot
68. fore doing so BIOS will write the error to port 80h attempt to initialize video and write the error in the top left corner of the screen The following is a list of codes that may be written to port 80h POST Code Description 01h IPMI Initialization 02h Verify Real Mode 03h Disable Non Maskable Interrupt NMI 04h Get CPU type 06h Initialize system hardware 07h Disable shadow and execute code from the ROM 08h Initialize chipset with initial POST values 09h Set IN POST flag OAh Initialize CPU registers OBh Enable CPU cache OCh Initialize caches to initial POST values OEh Initialize component OFh Initialize the local bus IDE 10h Initialize Power Management 11h Load alternate registers with initial POST values 12h Restore CPU control word during warm boot 13h Reset PCI Bus Mastering devices 14h Initialize keyboard controller 16h 1 2 2 3 BIOS ROM checksum 17h Initialize cache before memory Auto size B 1 SUPER X7DWN User s Manual POST Code Description 18h 8254 timer initialization 1Ah 8237 DMA controller initialization 1Ch Reset Programmable Interrupt Controller 20h 1 3 1 1 Test DRAM refresh 22h 1 3 1 3 Test 8742 Keyboard Controller 24h Set ES segment register to 4 GB 28h Auto size DRAM 29h Initialize POST Memory Manager 2Ah Clear 512 kB base RAM 2Ch 1 3 4 1 RAM failure on address line xxxx 2Eh 1 3 4 3 RAM failure on data bits xxxx of low byte of memory bus 2Fh Enable cache before system
69. function as a suspend button with a setting in the BIOS see Chapter 4 To turn off the power when set to suspend mode press the button for atleast 4 seconds Refer to the table on the right for pin definitions DIMM 4D DIMM 4C DIMM 4B s DIMM 4A E fan mA ime DIMM 3C DIMM 3B DIMM DIMM 2D CPU DIMM 2C DIMM 28 DIMM 2 Intel 5400 22 North Bridge Fe CPU2 DIMM TA DIMM 1B DIMM 1 DIMM 1D SUPER X7DWN Intel ESB 2 Floppy 5 Bridge Reset Button Pin Definitions JF1 Pin Definition Reset Power Button Pin Definitions JF1 Pin Definition Signal 3V Standby A Reset Button B PWR Button 20 19 Groun NMI X Power LED Vcc HDD LED Vcc NIC1 LED Vcc NIC2 LED Vcc OH Fan Fail LED Vcc PWR Fail LED Vcc Ground Reset e Ground PWR Power Button SUPERO X7DWN User s Manual 2 5 Connecting Cables ATX Power Connector There are a 24 pin main power sup ply connector JPW1 and an 8 pin CPU PWR
70. g those for the keyboard and mouse 3 Remove all add on cards 4 Install one CPU making sure it is fully seated and connect the chassis speaker and the power LED to the motherboard Check all jumper settings as well 5 Use the correct type of CMOS onboard battery as recommended by the Manu facturer Do not install the onboard battery upside down to avoid possible explosion No Power 1 Make sure that no short circuits between the motherboard and the chassis 2 Make sure that all jumpers are set to their default positions 3 Check that the 115V 230V switch on the power supply is properly set 4 Turn the power switch on and off to test the system 5 The battery on your motherboard may be old Check to verify that it still sup plies 3VDC If it does not replace it with a new one No Video 1 If the power is on but you have no video remove all the add on cards and cables 2 Use the speaker to determine if any beep codes exist Refer to the Appendix 3 1 SUPER X7DWN User s Manual for details on beep codes Losing the System s Setup Configuration 1 Make sure that you are using a high quality power supply A poor quality power supply may cause the system to lose the CMOS setup information Refer to Section 1 6 for details on recommended power supplies 2 The battery on your motherboard may be old Check to verify that it still sup plies 3VDC If it does not replace it with a new one 3 If the ab
71. hermal grease on the surface before you re install the CPU and the heatsink Chapter 2 Installation Screw 1 NO 1 SCREW NO 4 SCREW AD o ev 3 SCREW NO 2 SCREW Screw 2 Mounting the Motherboard in the Chassis All motherboards have standard mounting holes to fit different types of chassis Make sure that the locations of all the mounting holes for both motherboard and chassis match Make sure that the metal standoffs click in or are screwed in tightly Then use a screwdriver to secure the motherboard onto the motherboard tray Note some components are very close to the mounting holes Please take precautionary measures to avoid damaging these components when you install the motherboard to the chassis 2 5 SUPERO X7DWN User s Manual 2 3 Installing DIMMs Note Check the Supermicro web site for recommended memory modules CAUTION Exercise extreme care when installing or removing DIMM modules to prevent any possible damage Also note that the memory is interleaved to improve performance see step 1 DIMM Installation 1 Insert the desired number of DIMMs into the memory slots starting with DIMM 1A The memory scheme is interleaved so you must install a pair s of modules of the same type and same speed at a time beginning with Bank 1 Bank 2
72. ission from Super Micro Computer Inc you may not copy any part of this document Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 2008 by Super Micro Computer Inc All rights reserved Printed in the United States of America Preface This manual is written for system integrators PC technicians and knowledge able PC users It provides information for the installation and use of the SUPERG X7DWN motherboard About This Motherboard The SUPER X7DWN supports dual Intel Quad Core and Dual Core Xeon 5400 Series 5300LV Series 5200 Series 5100LV Series processors with a front side bus speed of up to 1 6 GHz With two 64 bit Quad Core and Dual Core processors built in the X7DWN offers substantial functionality enhancements to the motherboards based on the Intel Core Microarchitecture core while remaining compatible with the 32 software The features include Intel Virtualization Tech nology Enhanced Intel SpeedStep technology Advanced Transfer Cache and Streaming SIMD Extensions 4 1 SSEA 1 These features allow the motherboard to operate at much higher speeds with better power management in much safer thermal environments than the traditional motherboards The X7DWN is ideal for high performance quad processor or dual processor DP workstati
73. ite a few drivers and programs that will greatly enhance your system We recommend that you review the CD and install the applications you need Applications on the CD include chipset drivers for the Windows OS security and audio drivers 3 4 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered You can obtain service by calling your vendor for a Returned Merchandise Authorization RMA number When returning to the manufacturer the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand carried Ship ping and handling charges will be applied for all orders that must be mailed when service is complete This warranty only covers normal consumer use and does not cover damages in curred in shipping or from failure due to the alternation misuse abuse or improper maintenance of products During the warranty period contact your distributor first for any product prob lems 3 4 Chapter 4 BIOS Chapter 4 BIOS 4 1 Introduction This chapter describes the Phoenix BIOS Setup utility for the X7DWN The Phoenix ROM BIOS is stored in a flash chip and can be easily upgraded using a floppy disk based program Note Due to periodic changes to the BIOS some settings may have been added or deleted and might not yet be recorded in this manual Please refer to the Manual Do
74. ject such as a small screwdriver to touch both pads at the same time to short the connection Always remove the AC power cord from the system before clear ing CMOS Note For an ATX power supply you must completely shut down the system remove the AC power cord and then short JBT1 to clear CMOS Watch Dog Enable Disable Watch Dog JWD is a system monitor that can reboot the system when a software application hangs Close Pins 1 2 to reset the system if an application hangs Close Pins 2 3 to generate a non maskable interrupt signal for the application that hangs See the table on the right for jumper settings Watch Dog must also be enabled in the BIOS Pe DIMM 4D o CPUFANI E zb DIMM 4C BR o o lle o o o DIMM 4B DIMM 4A DIMM 3D 9 Floss Tun Fai Detect DIMM 3C J g 5 5 DIMM 38 N DIMM DIMM 2D DIMM 2C DIMM 2B DIMM 2A DIMM 1 DIMM 18 DIMM 1 DIMM 1D _ SUPER X7DWN
75. l LED Indicator and control Chassis intrusion detection System resource alert via Supero Doctor 1 6 Chapter 1 Introduction ACPI Features Slow blinking LED for suspend state indicator Main switch override mechanism e ACPI Power Management Keyboard Wakeup from Soft off Onboard e Intel ESB2 supports Six SATA2 ports with RAIDO RAID1 RAID10 RAID5 supported in the Windows OS Environment One SIMSO IPMI socket ntel 82575 Gigabit Ethernet controller supports two Giga bit LAN ports One EIDE Ultra DMA 100 bus master interface One floppy port interface Two COM ports 1 header 1 port PS 2 mouse and PS 2 keyboard ports Up to five USB 2 0 Universal Serial Bus 2 ports Headers e ES1000 32 MB Graphic Controller supports one VGA connector e Super 1 0 Winbond W83627HF w Hardware Monitor support W83793 HECETA Other External modem ring on Wake on LAN WOL Wake on Ring WOR Console redirection Onboard Fan Speed Control by Thermal Management via BIOS CD Diskette Utilities BIOS flash upgrade utility and device drivers Dimensions Ext ATX 13 05 L x 13 68 W 331 5 mm x 347 47 mm 1 7 SUPER X7DWN User s Manual 3
76. le redirection after the POST routine The options are On and Off 4 19 SUPEROX7DWN User s Manual gt Hardware Monitor Logic Highlight this and hit Enter to see the status for the following items CPU1 Temperature CPU2 Temperature System Temperature 1 8 Speeds If the feature of Auto Fan Control is enabled the BIOS will automatically display the status of the fans indicated in this item Fan Speed Control Modes This feature allows the user to decide how the system controls the speeds of the onboard fans The CPU temperature and the fan speed are correlative When the CPU on die temperature increases the fan speed will also increase and vice versa Select Workstation if your system is used as a Workstation Select Server if your system is used as a Server Select 3 pin if your chassis uses 3 pin fans Select 4 pin if your chassis uses 4 pin fans Select Disable to disable the fan speed control function and allow the onboard fans to constantly run at the full speed 12V The Options are 1 Running at the Full Speed 2 Optimized Server w 3 pin 3 Optimized Workstation w 3 pin 4 Optimized Server w 4 pin and 5 Optimized Workstation w 4 pin Voltage Monitoring The following items will be monitored and displayed VcoreA VcoreB 12 12 5Vsb 5VDD 3 3V P1V5 P_VTT Vbat Note In the Windows OS environment the Supero Doctor settings take pre cedence over the BIOS settings When first insta
77. lizing this header allows you to inhibit any actions made on the keyboard effectively locking it Pin Definition 1 Ground Keylock R N A Fan 1 UJ DIMM 4D TEN nog DIMM 4C 2 DIMM 4B Fan 3 Fan 4 Fan 5 DIMM 4A DIMM 3D 9 E DIR Fal Detect LE Sus Ps DIMM 3C E DIMM 3B 4 DIMM DIMM 20 me m pM en men 0 13 co Fan 7 CPU Fan 1 1 Fan 8 CPU Fan 2 1 Keylock Buzzer O DIMM 1A eo g DIMM 1B DIMM 1C DIMM 1D IDE 1 _ SUPER X7DWN er Chapter 2 Installation ATX PS 2 Keyboard and PS 2 Mouse Ports The ATX PS 2 keyboard and the PS 2 mouse are located at JKM1 See the table on the right for pin definitions The mouse port is above the key board port See the table on the right for pin definitions Serial Ports Pin COMI is a connector located on the 1 Backpanel 2 is a header located at JCOM2 See the table on 2 3
78. lled Supero Doctor adopts the temperature threshold settings previously set in the BIOS Any subsequent changes to these thresholds must be made within Supero Doctor since the SD settings override the BIOS settings For the Windows OS to adopt the BIOS temperature threshold settings please change the SDIII settings to be the same as those set in the BIOS 4 20 Chapter 4 BIOS gt IPMI The option is available only when IPMI card is installed in the system System Event Logging it Enter IPMI Specification Version This item displays the current IPMI Version Firmware Version This item displays the current Firmware Version System Event Logging Select Enabled to enable IPMI Event Logging When this function is set to Disabled the system will continue to log events received via system interface The options are Enabled and Disabled Clear System Event Logging Enabling this function to force the BIOS to clear the system event logs during the next cold boot The options are Enabled and Disabled Existing Event Log Number This item displays the number of the existing event log Event Log Control System Firmware Progress Enabling this function to log POST progress The options are Enabled and Disabled BIOS POST Errors Enabling this function to log POST errors The options are Enabled and Disabled 4 21 SUPER X7DWN User s Manual BIOS POST Watch Dog Set to Enabled to enable POST Watch
79. n The options are Enabled and Disabled IPMI 3rd LAN OPROM Configure Select Enabled to allow the system to boot from the IPMI 3rd LAN connection The options are Disabled and Enabled Onboard Storage OPROM Configure Select Enabled to allow the system to boot from the onboard storage device The options are Disabled and Enabled Option ROM Replacement Select Enabled to enable to use the feature of Option ROM Chip Replacement If the system hangs due to this feature reboot the system and change the setting The options are Enabled and Disabled ROM Scan Ordering This feature allows the user to decide which Option ROM to be activated first The options are Onboard first and Add On first 4 9 SUPER X7DWN User s Manual PCI Parity Error Forwarding Enable this item to forward the PCI errors occurring behind P2P bridges to the South Bridge so NMI can be asserted The options are Enabled and Disabled PCI Fast Delayed Transaction Enable this function to improve the DMA data transfer rate for a 32 bit multimedia card The options are Enable and Disabled Reset Configuration Data If set to Yes this setting clears the Extended System Configuration Data ESCD area The options are Yes and No Frequency for PCI X 1 PCI X 2 This option allows the user to change the bus frequency for the devices installed the slot indicated The options are Auto PCI 33 MHz PCI 66 MHz PCI X 66 MHz PCI X 100 MHz and PCI X 13
80. nd make this area available for other devices Cache Base 0 512K If enabled this feature will allow the data stored in the base memory area block 0 512K to be cached written into a buffer a storage area in the Static DROM SDROM or to be written into L1 L2 cache inside the CPU to speed up CPU operations Select Uncached to disable this function Select Write Through to allow data to be cached into the buffer and written into the system memory at the same time Select Write Protect to prevent data from being written into the base memory area of Block 0 512K Select Write Back to allow the CPU to write data back directly from the buffer without writing data to the System Memory for fast CPU data processing and operation The options are Uncached Write Through Write Protect and Write Back Cache Base 512K 640K If enabled this feature will allow the data stored in the memory area 512K 640K to be cached written into a buffer a storage area in the Static DROM SDROM or written into L1 L2 or L3 cache inside the CPU to speed up CPU operations Select Uncached to disable this function Select Write Through to allow data to be cached into the buffer and written into the system memory at the same time Select Write Protect to prevent data from being written into the base memory area of Block 512 640K Select Write Back to allow the CPU to write data back directly from the buffer without writing data to the system memory to speed up CPU s ope
81. nector J15 1 5 SUPER X7DWN User s Manual Motherboard Features CPU Dual Intel 64 bit LGA 771 Quad Core Dual Core Xeon 5400 Series 5300LV Series 5200 Series 5100LV Series processors at a front side bus speed of up to 1 6 GHz Memory e 16 240 pin DIMM sockets support up to 128 GB DDR2 FBD Fully Buffered 800 667 533 Memory See Section 2 3 in Chapter 2 for DIMM Slot Population Chipset Intel 5400 chipset including the 5400 Memory Control Hub and the Enterprise South Bridge 2 ESB2 Expansion Slots Two PCI E2 x8 slots Slot5 slot6 Gen 2 0 One PCI E x8 slot Slot3 One PCI E x4 slot Slot4 Two 64 bit PCI X 133 100MHz slots Slot1 Slot2 e One PCI U Universal slot 1910 Gen 2 0 SIMSO Slot J16 BIOS 8Mb Phoenix Flash ROM PCI 2 2 ACPI 1 0 Plug and Play PnP USB Keyboard support and SMBIOS 2 3 PC Health Monitoring Onboard voltage monitors for CPU cores chipset voltage Memory voltage 1 8V 3 3V 3 3V Standby 5V 5V Standby 12V 12 and Vbatt Fan status monitor with firmware control CPU chassis temperature monitors Platform Environment Control Interface PECI ready e CPU fan auto off in sleep mode CPU slow down on temperature overheat CPU thermal trip support for processor protection power LED Power up mode control for recovery from AC power loss Auto switching voltage regulator for CPU cores System overheat Fan Fai
82. ngle beside them have sub menus that can be accessed by highlighting the item and pressing lt Enter gt gt Boot Features Enter gt Boot Features Access the submenu to make changes to the following settings QuickBoot Mode If enabled this feature will speed up the POST Power On Self Test routine by skipping certain tests after the computer is turned on The settings are Enabled and Disabled If Disabled the POST routine will run at normal speed QuietBoot Mode This setting allows you to Enable or Disable the graphic logo screen during boot up POST Errors Select Enable to stop the POST routine and allow the system to display error messages when an error occurs during bootup The options are Enabled and Disabled ACPI Mode Use the setting to determine if you want to employ ACPI Advanced Configuration and Power Interface power management on your system The options are Yes and No 4 6 Chapter 4 BIOS Power Button Behavior If set to Instant Off the system will power off immediately as soon as the user hits the power button If set to 4 sec the system will power off when the user presses the power button for 4 seconds or longer The options are instant off and 4 sec override Resume On Modem Ring Select On to wake your system up when an incoming call is received by your modem The options are On and Off EFI OS Boot If enabled this feature provides support for OS booting The
83. nsumption SUPER X7DWN User s Manual Notes Chapter 2 Installation Chapter 2 Installation 2 1 Static Sensitive Devices Electrostatic Discharge ESD can damage electronic components To prevent damage to your system board it is important to handle it very carefully The fol lowing measures are generally sufficient to protect your equipment from ESD Precautions Use a grounded wrist strap designed to prevent static discharge Touch a grounded metal object before removing the board from the antistatic bag Handle the board by its edges only do not touch its components peripheral chips memory modules or gold contacts When handling chips or modules avoid touching their pins Putthe motherboard and peripherals back into their antistatic bags when not in use For grounding purposes make sure your computer chassis provides excellent conductivity between the power supply the case the mounting fasteners and the motherboard Use only the correct type of onboard CMOS battery as specified by the manufacturer Do not install the onboard battery upside down to avoid possible explosion Unpacking The motherboard is shipped in antistatic packaging to avoid static damage When unpacking the board make sure the person handling it is static protected 2 1 SUPERO X7DWN User s Manual 2 2 Processor and Heatsink Installation When handling the processor package avoid placing direct pre
84. o configure FBD clock settings to support ITK testing The options are Disabled and Enabled Reserved Branch for ITK Test This feature allows the user to specify the memory branch number to be reserved for ITK testing The default setting is Branch 1 Snoop Filter Select Enabled to eliminate snoop traffic to the graphics port to greatly improve system performance when running graphics intensive applications The options are Enabled and Disabled Crystal Beach Features Select Enabled to use the Intel I O AT Acceleration Technology to accelerate the performance of TOE devices Note A TOE device is a specialized dedicated processor that is installed on an add on card or a network card to handle some or all packet processing of this add on card For this motherboard the TOE device is built inside the ESB 2 South Bridge chip The options are Enabled and Disabled Route Port 80h Cycles to This feature allows the user to decide which bus to send debug information to The options are Disabled and LPC 4 18 SUPER X7DWN User s Manual High Precision Event Time Select Yes to activate the High Precision Event Timer HPET which is capable of producing periodic interrupts at a much higher frequency than a Real time Clock RTC can in synchronizing multimedia streams providing smooth playback and reducing the dependency on other timestamp calculation devices such as an x86 RDTSC Instruction embedded in a CPU The High Pr
85. oller can also support WOL without any connection to the WOL header The 3 pin WOL header is to be used with a LAN add on card only Note Wake On LAN requires an ATX 2 01 or above compliant power supply 1 6 Power Supply As with all computer products a stable power source is necessary for proper and reliable operation It is even more important for processors that have high CPU clock rates The X7DWN can accommodate 24 pin ATX power supplies Although most power supplies generally meet the specifications required by the CPU some are inadequate In addition the 12V 4 pin and the 12V 8 pin power connections are also required to ensure adequate power supply to the system Also your power supply must supply 1 5A for the Ethernet ports Note The 12V 8 pin CPU Power Connector JPW3 is also required to support Intel 64 bit CPUs Failure to provide this extra power will result in CPU PWR Failure See Section 2 5 for details on connecting the power supply It is strongly recommended that you use a high quality power supply that meets ATX power supply Specification 2 02 or above It must also be SSI compliant For more information please refer to the web site at http www ssiforum org Additionally in areas where noisy power transmission is present you may choose to install a line filter to shield the computer from noise It is recommended that you also install a power surge protector to help avoid problems caused by power surges 1
86. on and enter prise server environments Please refer to our web site http www supermicro com products for updates on supported processors This product is intended to be professionally installed Manual Organization Chapter 1 describes the features specifications and performance of the main board and provides detailed information about the chipset Chapter 2 provides hardware installation instructions Read this chapter when installing the processor memory modules and other hardware components into the system If you encounter any problems see Chapter 3 which describes troubleshooting procedures for the video the memory and the system setup stored in the CMOS Chapter 4 includes an introduction to BIOS and provides detailed information on running the CMOS Setup utility Appendix A provides BIOS POST Codes Appendix B and Appendix C list Windows OS and other software Installation Instructions Conventions Used in the Manual Special attention should be given to the following symbols for proper installation and to prevent damage done to the components or injury to yourself SUPERO X7DWN User s Manual Warning Important information given to ensure proper system installation or to prevent damage to the components Note Additional Information given to differentiate various models or to ensure cor rect system setup Notes SUPERO X7DWN User s Manual Table of Contents Preface About This M
87. ove steps do not fix the Setup Configuration problem contact your vendor for repairs NOTE If you are a system integrator VAR or OEM a POST diagnostics card is recommended For I O port 80h codes refer to App Memory Errors 1 Make sure that the DIMM modules are properly and fully installed 2 Check if different speeds of DIMMs have been installed and check if the BIOS setup is configured for the fastest speed of RAM used It is recommended to use the same RAM speed for all DIMMs in the system 3 Make sure you are using the correct type of DDR2 FBD Fully Buffered ECC 800 667 533 SDRAM recommended by the manufacturer 4 Check for bad DIMM modules or slots by swapping a single module between all memory slots and check the results 5 Make sure that all memory modules are fully seated in their slots As an inter leaved memory scheme is used you must install pair s modules at a time beginning with Bank 1 then Bank 2 and so on see Page 2 6 6 Check the position of the 115V 230V switch on the power supply 3 2 Technical Support Procedures Before contacting Technical Support please take the following steps Also please note that as a motherboard manufacturer Supermicro does not sell directly to end users so itis best to first check with your distributor or reseller for troubleshooting services They should know of any possible problem s with the specific system configuration that was sold to you 1
88. r computer to receive and be awakened by an incoming call to the modem when the system is in the suspend state See the table on the right for pin definitions You must have a Wake On Ring card and cable to use this feature Wake On LAN The Wake On LAN header is located at JWOL on the motherboard See the table on the right for pin defini tions You must also have a LAN card with a Wake On LAN connector and cable to use this feature Wake On Ring Pin Definitions JWOR ns i DIMM 4C DIMM 4D CPUFANI Big DIMM 4B DIMM 4A DIMM 3D LE Sus Ps DIMM 3C 8 DIMM 3B DIMM DIMM 2D DIMM 2 DIMM 28 DIMM 2 Da deed DIMM 1A DIMM 18 DIMM 1 4D __SUPER X7DWN CMOS Clear _ Batley o USB 2 3 lo 9 lo FP Cli Panel CPUFANZ Compact Flash IDE Floppy 2 18 Pin Definition Ground Wake up Wake On LAN Pin Definitions JWOL Pin Definition 1 5V Standby 2 Ground Wake up A WOR
89. r detailed information SMRR Support Available when supported by the CPU Select Enabled to use a new CPU security feature to prevent viruses accessing the System Management Module SMM When set to Enabled the SM Memory Region will become uncacheable effectively preventing viruses from modifying or corrupting critical system parameters The options are Enabled and Disabled Please refer to Intel s web site for detailed information Device Configuration Access the submenu to make changes to the following settings KBC Clock Input This setting allows you to select clock frequency for KBC The options are 6MHz 8MHz 12MHz and 16MHz Serial Port A This setting allows you to assign control of serial port A The options are Enabled user defined Disabled and Auto BIOS or OS controlled Base I O Address This setting allows you to select the base I O address for serial port A The options are 3F8 2F8 3E8 and 2E8 Interrupt This setting allows you to select the IRQ interrupt request for serial port A The options are IRQ3 and IRQ4 Serial Port B This setting allows you to assign control of serial port B The options are Enabled user defined Disabled Auto BIOS controlled and OS Controlled 4 16 Chapter 4 BIOS Mode This setting allows you to set the type of device that will be connected to serial port B The options are Normal and IR for an infrared device Base I O Address This set
90. ration The options are Uncached Write Through Write Protect and Write Back Cache Extended Memory If enabled this feature will allow the data stored in the extended memory area to 4 8 Chapter 4 BIOS be cached written into a buffer a storage area in the Static DROM SDROM or written into L1 L2 L3 cache inside the CPU to speed up CPU operations Select Uncached to disable this function Select Write Through to allow data to be cached into the buffer and written into the system memory at the same time Select Write Protect to prevent data from being written into the extended memory area above 1 MB Select Write Back to allow the CPU to write data back directly from the buffer without writing data to the System Memory for fast CPU data processing and operation The options are Uncached Write Through Write Protect and Write Back Discrete MTRR Allocation If enabled MTRRs Memory Type Range Registers are configured as distinct separate units and cannot be overlapped If enabled the user can achieve better graphic effects when using a Linux graphic driver that requires the write combining configuration with 4GB or more memory The options are Enabled and Disabled gt PCI Configuration Access the submenu to make changes to the following settings for PCI devices Onboard GLAN1 Onboard GLAN 2 Gigabit LAN OPROM Configure Select Enabled to allow the system to boot from the GLAN1 connection or the GLAN 2 connectio
91. s are Disabled and Enabled Direct Cache Access Available when supported by the CPU Set to Enable to route inbound network IO traffic directly into processor caches to reduce memory latency and improve network performance The options are Disabled and Enabled DCA Delay Clocks Available when supported by the CPU This feature allows the user to set the clock delay setting from snoop to prefetch for Direct Cache Access Select a setting from 8 bus cycles to 120 bus cycles in 8 cycle increment The default setting is 32 bus cycles Intel lt R gt Virtualization Technology Available when supported by the CPU Select Enabled to use the feature of Virtualization Technology to allow one platform to run multiple operating systems and applications in independent partitions creating 4 15 SUPER X7DWN User s Manual multiple virtual systems in one physical computer The options are Enabled and Disabled Note If there is any change to this setting you will need to power off and restart the system for the change to take effect Please refer to Intel s web site for detailed information Intel EIST Support Available when supported by the CPU Select Enabled to use the Enhanced Intel SpeedStep Technology and allows the system to automatically adjust processor voltage and core frequency in an effort to reduce power consumption and heat dissipation The options are Enabled and Disabled Please refer to Intel s web site fo
92. set required for quad pro cessor or dual processor based high end systems with configuration options optimized for complex storage platforms The 5400 chipset supports single or dual Intel Quad Core Dual Core Xeon 5400 Series 5300LV Series 5200 Series 5100LV Series processor with front side bus speeds of up to 1 6 GHz The chipset consists of the 5400 Memory Controller Hub MCH for the host bridge and the 631xESB 632xESB Controller Hub Enterprise South Bridge 2 ESB2 for the subsystem The Intel 5400 MCH North Bridge The 5400 MCH North Bridge provides two FSB processing interfaces four fully buffered FBD DIMM memory channels PCI Express bus interfaces configurable to form x8 or x16 ports an EB2 South Bridge Interface ESI and SMBus Interfaces for system management and DIMM Serial Presence Detect SPD The peak bandwidth for each FBD channel is 8 GB s for DDR2 800 667 FBD memory giving a total memory size of 128 MB for 4 FBD channels The PCI Express interfaces can be configured to form x8 or x16 ports that can operate up to Gen 2 speeds in x16 configuration for enhanced graphics applications The Intel 631xESB 632x ESB I O Controller Hub ESB2 South Bridge The 631xESB 632xESB Controller Hub Enterprise South Bridge 2 integrates an Ultra ATA 100 Controller six Serial ATA host controller ports one EHCI host controller six external USB 2 0 ports an LPC interface controller and a flash BIOS interface controller
93. splay to inform you of the event log capacity It is not a setting View DMI Event Log Highlight this item and press Enter to view the contents of the event log Event Logging This setting allows you to Enable or Disable event logging ECC Event Logging This setting allows you to Enable or Disable ECC event logging Mark DMI Events as Read Highlight this item and press Enter to mark the DMI events as read Clear Event Logs Select Yes and press Enter to clear all DMI event logs The options are Yes and No 4 18 Chapter 4 BIOS gt Console Redirection Access the submenu to make changes to the following settings COM Port Address This item allows you to specify which COM port to direct the remote console to Onboard COM A or Onboard COM B This setting can also be Disabled BAUD Rate This item allows you to set the BAUD rate for console redirection The options are 300 1200 2400 9600 19 2K 38 4K 57 6K and 115 2K Console Type This item allows you to set console redirection type The options VT100 VT100 8bit PC ANSI 7bit PC ANSI VT100 VT UTF8 and ASCII Flow Conirol This item allows you to select the flow control option for the console The options are None XON XOFF and CTS RTS Console Connection This item allows you to decide how console redirection is to be connected either Direct or Via Modem Continue CR after POST Select on to continue with conso
94. ssure on the label area of the fan Notes 1 Always connect the power cord last and always remove it before adding removing or changing any hardware components Make sure that you install the processor into the CPU socket before you install the CPU heatsink 2 Intel s boxed Xeon CPU package contains the CPU fan and heatsink assembly If you buy a CPU separately make sure that you use only Intel certified multi directional heatsink and fan 3 The Intel Xeon LGA 771 heatsink and fan comes with a push pin design and no tool is needed for installation 4 Make sure to install the motherboard into the chassis before you install the CPU heatsink and fan 5 When purchasing an LGA 771 CPU or when receiving a motherboard with an LGA 771 CPU pre installed make sure that the CPU plastic cap is in place and none of the CPU pins are bent otherwise contact the retailer immediately 6 Refer to the MB Features Section for more details on CPU support Installation of the LGA771 Processor 1 Press the socket clip to release the load plate which covers the CPU socket from its locking position 2 Gently lift the socket clip to open the load plate 3 Use your thumb and your index finger to hold the CPU at the North Center Edge and the South Center Edge of the CPU 4 Align CPU Pin1 the CPU corner marked with a triangle against the socket corner marked with a triangle cutout 5 Align the CPU key the semi circle cutout belo
95. t yet been installed To install these software programs and drivers click the icons to the right of these items x Intel Seaburg Chipset INF files S UPERMI Microsoft Direct 9 0 Drivers amp Tools ATI Graphics Driver Intel 5400 Chipset X7DWN Intel Matrix Storage Manager Adaptec Storage Manager Intel PRO Network Connections Drivers SUPERMICRO Supero Doctor III SUPERMICRO Computer Inc Build driver diskettes and manuals Browse CD Auto Start Up Next Time For more information please visit SUPERMICRO s web site Driver Tool Installation Display Screen Note Click the icons showing a hand writing on the paper to view the readme files for each item Click on a computer icon to the right of an item to install an item from top to the bottom one at atime After installing each item you must re boot the system before proceeding with the next item on the list The bottom icon with a CD on it allows you to view the entire contents of the CD C 1 SUPER X7DWN User s Manual C 2 Configuring Supero Doctor Ill The Supero Doctor program is Web base management tool that supports remote management capability It includes Remote and Local Management tools The local management is called the SD III Client The Supero Doctor III program included on the CDROM that came with your motherboard allows you to monitor the environment and operations of your system Supero Doctor displays crucial system
96. the right for pin definitions 4 5 PS 2 Keyboard and Mouse Port Pin Definitions Pin Definition Definition Pin Definition CDC RXD TXD DTR Ground DSR RTS CTS RI NC Pin 10 is available on COM2 only NC No Connection DIMM 4D CPUFAN ra SSO fae i DIMM 4C ur DIMM 4B DIMM 4 HN x Em DIMM 3D LI CSS BR PAR Fal Detect I SMBUS PS DIMM 3C DIMM 3B DIMM DIMM 20 DIMM 2 DIMM 2B DIMM 2 2 Intel 5400 DIMM 1 AM 2 DIMM 1B cPUFANZ 5 DIMM 1 53 DIMM 1D m uw i B per 2 me Hb E og lt intel ESB Z Floppy South Bridg lo 2 2 o Sio PCER TOOT SMH ez 2 17 A Keyboard Mouse B COM1 COM2 SUPERO X7DWN User s Manual Wake On Ring The Wake On Ring header is des ignated JWOR This function allows you
97. ting allows you to select the base I O address for serial port B The options are 3F8 2F8 3E8 and 2E8 Interrupt This setting allows you to select the IRQ interrupt request for serial port B The options are IRQ3 and IRQ4 Parallel Port This setting allows you to assign control of the parallel port The options are Enabled user defined Disabled and Auto BIOS or OS controlled Base I O Address Select the base I O address for the parallel port The options are 378 278 and 3BC Interrupt This setting allows you to select the IRQ interrupt request for the parallel port The options are IRQ5 IRQ7 Mode This feature allows you to specify the parallel port mode The options are Output only Bi Directional EPP and ECP DMA Channel This item allows you to specify the DMA channel for the parallel port The options DMA1 Floppy Disk Controller This setting allows you to assign control of the floppy disk controller The options are Enabled user defined Disabled and Auto BIOS and OS controlled Base I O Address This setting allows you to select the base I O address for the Floppy port The options are Primary and Secondary SUPER X7DWN User s Manual gt DMI Event Logging Access the submenu to make changes to the following settings Event Log Validity This is a display to inform you of the event log validity It is not a setting Event Log Capacity This is a di
98. w a gold dot against the socket key which is the notch on the same side of the triangle cutout on the socket 6 Once aligned carefully lower the CPU straight down into the socket Do not drop the CPU on the socket Do not move the CPU horizontally or vertically Do not rub the CPU against the surface or against any pins of the socket to avoid damaging the CPU or the socket 7 With the CPU inside the socket inspect the four corners of the CPU to make sure that the CPU is properly installed 8 Use your thumb to gently push the socket clip down to the clip lock 9 If the CPU is properly installed into the socket the plastic cap will be automatically released from the load plate when the clip is pushed in the clip lock Remove the plastic cap from the motherboard Z Warning Please save the plastic cap The motherboard must be shipped with the plastic cap properly installed to protect the CPU socket pins Shipment without the plastic cap prop erly installed will cause damage to the socket pins 2 3 Chapter 2 Installation North Center Edge South Center Edge gold dot Socket Key Socket Notch li CPU Key semi circle cutout below the circle Corner with a NEP triangle cutout CPU Pin1 Socket clip Plastic is released from the load plate installed SUPERO X7DWN User s Manual Installation of the Heatsink CEK Heatsink Installation
99. wnload area of the Supermicro web site lt http www supermicro com gt for any changes to the BIOS that may not be reflected in this manual System BIOS The BIOS is the Basic Input Output System used in all IBM PC XT AT and PS 2 compatible computers The Phoenix BIOS stores the system parameters types of disk drives video displays etc in the CMOS The CMOS memory requires very little electrical power When the computer is turned off a backup battery provides power to the CMOS Logic enabling it to retain system parameters When the computer is powered on the computer is configured with the values stored in the CMOS Logic by the system BIOS which gains control at boot up How To Change the Configuration Data The CMOS information that determines the system parameters may be changed by entering the BIOS Setup utility This Setup utility can be accessed by pressing the lt Delete gt key at the appropriate time during system boot Starting the Setup Utility Normally the only visible POST Power On Self Test routine is the memory test As the memory is being tested press the lt Delete gt key to enter the main menu of the BIOS Setup utility From the main menu you can access the other setup screens such as the Security and Power menus Beginning with Section 4 3 detailed descriptions are given for each parameter setting in the Setup utility warning Do not shut down or reset the system while updating BIOS to prevent

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