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Supermicro MBD-H8DCR-I-O motherboard

1. 2 10 Reset Button M 2 11 Power Button 2 11 JLAN1 2 Ethernet Ports a aset 2 11 Table of Contents Universal Serial Bus Ports 2 11 Extra USB Headers eese ees RANA 2 12 Serial eig 2 12 Fan Headers nouerit ee reae eq ei ec eben a dade ata 2 12 Chassis UA 2 12 Power LED Sp6eaker 2 13 PS 2 Keyboard Mouse Ports sss 2 13 Overheat LED serri sean 2 13 2 13 Esame 2 14 MEL Seg 2 14 SMBUS Header E 2 14 Alarm Reset Header correre nere e RISUS 2 14 Power Fail Connector 2 15 Compact Flash Power Connector 2 15 JSPEDTEHSader E 2 15 9 acsi gta 2 15 2 Jumper SQUINGS OSE 2 16 Explanation Of Jurmpers 2 5 etie 2 16 CMOS ETT 2 16 3rd Power Supply Fail Signal Enable Disable 2 17
2. to PCI Enable Disable Jumper Settings JI C1 2 Jumper Setting Definition Closed Enabled Open Disabled Compact Flash Master Slave Jumper Settings JCF1 Jumper Setting Definition Closed Master Open Enable Disable Jumper Settings JPG1 Jumper Setting Definition Pins 1 2 Enabled Pins 2 3 Disabled H8DCR 3 H8DCR i User s Manual Watch Dog Enable Disable JWD controls the Watch Dog function Watch Dog is a system monitor that can reboot the system when a software application hangs Jumping pins 1 2 will cause WD to reset the system if an application has frozen Close pins 2 3 to have Watch Dog generate an NMI non maskable interrupt See the table on the right for jumper settings Watch Dog must also be enabled in BIOS Onboard Speaker Enable Disable The JD1 header allows you to use either an external speaker or the in ternal onboard speaker To use the internal onboard speaker close pins 6 and 7 with a jumper To use an external speaker remove the jumper and connect the speaker wires to pins 4 5V and 7 control signal See the table on the right for settings and the table associated with the Power LED Keylock Speaker connection previ ous section for pin definitions SAS Controller Enable Disable JPS1 enables or disables the AIC 9140W Adaptec SAS controller See the table on the right for jumper set tings The default setting is ena
3. ATX Power 20 pin Connector ATX Power Connector Pin Definitions J1B4 Pin Definition Pin Definition The primary ATX power supply con 11 43 3V 1 43 3V nector J1B4 meets the SSI Super 12 42V 2 43 3V set ATX 20 pin specification Refer 13 COM 3 COM to the table on the right for the pin 14 ON 4 45V definitions of the ATX power connec 15 5 COM tor This connection supplies power to 16 6 m the chipset fans and memory 17 CM 7 pm Note You must also connect the 18 Res NC 8 PWR_OK 8 pin JPW2 and 4 pin J32 power 19 5V 9 5 stby connectors to your power supply see 20 5 10 12V below Processor Power Connector Processor Power Connector Pin Definitions JPW2 In addition to the primary ATX power connector above the 12v 8 pin processor power connector at JPW2 must also be connected to your power supply This connection supplies power to the CPUs See the table on the right for pin definitions Pins Definition 1 through 4 Ground 5 through 8 12V Required Connection Auxiliary Power Connector Auxiliary Power Connector Pin Definitions 32 The 4 pin auxiliary power connector at J32 must also be connected to your Definition Ground power supply This connection sup plies extra power that may be needed PIEN for high loads See the table on the Required Connection right for pin definitions NMI Button
4. Universal Serial Bus Ports Pin Definitions 0 0 1 USBO Pin Definition USB1 Pin Definition 1 5V 1 5V 2 PO 2 PO 9 3 4 4 Ground H8DCR 3 H8DCR i User s Manual Extra USB Headers Extra Universal Serial Bus Headers Pin Definitions JUSB2 Two additional USB2 0 head USB2 USB3 4 Pin Definition Pin Definition ers USB2 3 are included on the serverboard These may be con nected to provide front side access icd A USB cable not included is needed E for the connection See the table on Ground Ground the right for pin definitions No connection Serial Port Pin Definitions Serial Ports COM1 COM2 Definition Pin Definition The COM1 serial port is located be side the USB ports and the COM2 1 00 6 DSR header is located by the IDE 1 con d m nector Refer to Figure 2 3 for loca ks tions and the table on the right for pin gt i 5 Ground NC definitions Note Pin 10 is included on the header but not on the port NC indicates no connection Fan Headers Fan Header The H8DCR 3 H8DR i has five fan Pin Definitions headers which are designated FAN1 through FAN5 Fan speed is trolled via Thermal Management with a BIOS setting See the table on the f Stew Red right for pin definitions 3 Tachometer Pin Definition 1 Ground Black Chassis Intrusion Chassis Intru
5. 6166 15 22 2 ClO CPU2 N 1 5 aes a gt JL1 x JFA rans Fan4 FAN3 FAN2 5 Notes 1 Jumpers not indicated are for test purposes only 2 The H8DCR i has the same layout as the H83DCR 3 but with no SAS components connectors or jumpers 3 Dual processors are required for correct PCI X slot operation 1 4 Chapter 1 Introduction H8DCR 3 H8DCR i Quick Reference Jumpers J3P JBT1 JCF1 1 2 JPG1 JPL1 JPL2 JPS1 JPX1A JPX2A JD1 JWD Connectors COM1 COM2 FAN 1 5 JIDE 1 JIDE 2 J1B4 J22 J32 JAR JD1 JF1 JFDD1 JL 1 LAN1 2 JOH1 JPW2 JPWF JS4 JSLED1 JSM1 JSM2 JUSB2 JWF1 JWOL JWOR PS SMBUS SATAO 3 USBO 1 Onboard Indicators DP1 DS1 8 Description Default Setting 3rd Power Fail Detect En Dis Closed Enabled CMOS Clear See Section 2 7 Compact Flash Select to PCI Enable Disable VGA Enable Disable LAN1 2 Enable Disable SAS Controller En Disable PCI X Slot 7 6 Freq Select Internal Speaker En Disable Watch Dog Closed Master Closed Enabled Pins 1 2 Enabled Pins 1 2 Enabled Pins 1 2 Enabled Open Auto Pins 6 7 Enabled Pins 1 2 Reset Description Serial Ports System Fan Headers IDE Drive Connectors 20 Pin ATX Power Connector System Management Bus Header 4 pin Auxiliary Power Connector Power Supply Alarm Reset Header Onboard Speaker Keylock Power LED Fro
6. do PCI Enable Disabl 2 17 Compact Flash 2 17 VGA Enable Disable sssrin naredna D nee tds n dears 2 17 Watch Dog Enable Disable 2 18 Onboard Speaker Enable Disable 2 18 SAS Controller Enable Disable 2 18 PCI X Slot Frequency Select 2 19 PCI X Channel Max Speed 2 19 2 0 Onboard Indicators Dua 2 20 JEANTAJEAN2 EEDS 2 20 3 9V Power LED ee E SE tide IR e Gehe Ese Eee Ea RE ERE 2 20 SAS Activity BEDS secessit e t Cd 2 20 2 9 Floppy IDE SATA and SAS Drive Connections 2 21 Floppy de pe EX edu ede d RR Rx RE d cR 2 21 IDE EE E 2 22 SATA ROMS 2 23 SAS POMS 2 23 2 10 Enabling SATA RAID emere enne rennen 2 24 H8DCR 3 H8DCR i User s Manual Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures 3 1 3 1 3 1 3 1 Memory EOFS cT 3 2 Losing the System s Setup C
7. NMI Button Pin Definitions JF1 The non maskable interrupt button Pin Definition header is located on pins 19 and 20 19 Control of JF1 Refer to the table on the right 20 Ground for pin definitions 2 9 H8DCR 3 H8DCR i User s Manual Power LED The Power LED connection is located on pins 15 and 16 of JF1 Refer to the table on the right for pin definitions HDD LED The HDD IDE Hard Disk Drive LED connection is located on pins 13 and 14 of JF1 Attach the IDE hard drive LED cable to display disk activity Refer to the table on the right for pin definitions NIC1 LED The NIC1 Network Interface Control ler LED connection is located on pins 11 and 12 of JF1 Attach the NIC1 LED cable to display network activity Refer to the table on the right for pin definitions NIC2 LED The NIC2 Network Interface Control ler LED connection is located on pins 9 and 10 of JF1 Attach the NIC2 LED cable to display network activity Refer to the table on the right for pin definitions Overheat Fan Fail LED Connect an LED to the OH connection on pins 7 and 8 of JF1 to provide ad vanced warning of chassis overheat ing Refer to the table on the right for pin definitions and status indicators Power LED Pin Definitions JF1 OH Fan Fail LED Pin Definitions JF1 Pin Definition 7 Vcc Control 2 10 Pin Definition 15 Vcc 16 Control HDD LED Pin Definitions JF1
8. IOMMU Option Menu IOMMU Mode IOMMU is supported on Linux based systems to convert 32 bit addresses to 64 bit Options are AGP Present Disabled 32MB 64MB 128MB 256MB 512MB and 1GB Memory Timing Parameters Allows the user to select which CPU Node s timing parameters memory clock etc to display Options are CPU Node 0 and CPU 1 gt SouthBridge Configuration Audio CODEC Interface Use this setting to Enable or Disable the internal ACI MAC Interface This setting is used to Enable or Disable the internal 802 3 MAC interface CPU Spread Spectrum This setting is used to enable spread spectrum for the CPU Options are Dis abled and Center Spread SATA Spread Spectrum This setting is used to enable spread spectrum for the SATA Options are Dis abled and Down Spread 4 8 Chapter 4 BIOS PCI Express Spread Spectrum This setting is used to enable spread spectrum for the PCI Express Options are Disabled and Down Spread Primary Video This setting is used to switch the PCI bus scanning order while searching for the video card It allows the user to select the type of primary VGA in case of multiple video controllers Options are Slave PCI Express and Master PCI Express gt Device Configuration Onboard Floppy Controller Use this setting to Enable or Disable the onboard floppy controller Serial Port1 Address This option specifies the base I O port address and Interrupt Req
9. Opening this sebmenu displays various CPU information and the following two settings GART Error Reporting This setting is used for testing only MTRR Mapping This determines the method used for programming CPU MTRRs when 4 GB or more memory is present The options are Continuous which makes the PCI hole non cacheable and Discrete which places the PCI hole below the 4 GB boundary gt IDE Configuration Onboard PCI IDE Controller The following options are available to set the IDE controller status Disabled will dis able the controller Primary will enable the primary IDE controller only Secondary will enable the secondary IDE controller only Both will enable both the primary and the secondary IDE controllers 4 2 Chapter 4 BIOS Primary Secondary IDE Master Slave Highlight one of the items above and press lt Enter gt to access the submenu for that item The same settings apply to the Secondary through Sixth IDE sevices Type Select the type of device connected to the system The options are Not Installed Auto CDROM and ARMD LBA Large Mode LBA Logical Block Addressing is a method of addressing data on a disk drive In the LBA mode the maximum drive capacity is 137 GB For drive capacities of over 137 GB your system must be equipped with 48 bit LBA mode addressing If not contact your manufacturer or install an ATA 133 IDE controller card that supports 48 bit LBA mode The options are Disabled and Aut
10. in a possible explosion Unpacking The serverboard is shipped in antistatic packaging to avoid static damage When unpacking the board make sure the person handling it is static protected Installation Procedures Follow the procedures as listed below to install the serverboard into a chassis 1 Install the processor s and the heatsink s 2 Install the serverboard in the chassis 3 Install the memory and add on cards 4 Finally connect the cables and install the drivers 2 1 H8DCR 3 H8DCR i User s Manual 2 2 Mounting the Serverboard into a Chassis All serverboards and motherboards have standard mounting holes to fit different types of chassis Make sure that the locations of all the mounting holes for both the serverboard and the chassis match Although a chassis may have both plastic and metal mounting fasteners metal ones are highly recommended because they ground the serverboard to the chassis Make sure that the metal standoffs click in or are screwed in tightly 1 Check the compatibility of the serverboard ports and the I O shield The H8DCR 3 H8DCR i serverboard requires a chassis that can support extended ATX boards of 12 x 13 05 in size Make sure that the I O ports on the serverboard align with their respective holes in the I O shield at the rear of the chassis 2 Mounting the serverboard onto the mainboard tray in the chassis Carefully mount the serverboard onto the mainboard tray by aligning the ser
11. DIMM 1B DIMM 2B AMD Opteron AMD Opteron DIMM3B Processor CPU2 Processor CPU1 DIMM4B DDR400 339266 DIMM 1A DIMM 2A DIMM 3A DIMM4A 16 x 16 HT link 1 GHz 8x PCI Express Slot PCI X 133 Slot 6 PCI X 100 Slot 7 ZCR amp AMD 8132 8x Express Slot 5721 LAN1 nVidia 5721 LAN2 2200 SATA Ports 4 SAS Ports 8 AIC 9410W IDE ATA133 USB Ports 4 ATI Rage XL Figure 1 3 nVidia nForce Pro 2200 AMD 8132 Chipset System Block Diagram Note This is a general block diagram and may not exactly represent the features on your serverboard See the previous pages for the actual specifications of your serverboard Chapter 1 Introduction 1 2 Chipset Overview The H8DCR 3 H8DCR i serverboard is based the nVidia nForce Pro 2200 and the AMD 8132 chipset The nVidia nForce Pro 2200 functions as a Media and Communications Processor and the AMD 8132 as a PCI X Tunnel Controllers for the system memory are integrated directly into the AMD Opteron processors nForce Pro 2200 Media and Communications Processor This MCP is a single chip high performance HyperTransport peripheral controller The nForce
12. Floppy IDE SATA and SAS Drive Connections Use the following information to connect the floppy and hard disk drive cables e The floppy disk drive cable has seven twisted wires e Ared mark on a wire typically designates the location of pin 1 e Asingle floppy disk drive ribbon cable has 34 wires and two connectors to provide for two floppy disk drives The connector with twisted wires always connects to drive A and the connector that does not have twisted wires always connects to drive B e The 80 wire ATA133 IDE hard disk drive cable that came with your system has two connectors to support two drives This special cable should be used to take advantage of the speed this new technology offers The blue connector connects to the onboard IDE connector interface and the other connector s to your hard drive s Consult the documentation that came with your disk drive for details on actual jumper locations and settings for the hard disk drive Floppy Connector Floppy Drive Connector Pin Definitions JFDD1 The floppy connector is desig Pin Definition Pin Definition nated JFDD1 See the table at ue 1 Ground 2 FDHDIN right for pin definitions 5 mp 4 yr 5 Key 6 FDEDIN 7 Ground 8 Index 9 Ground 10 Motor Enable 11 Ground 12 Drive Select B 13 Ground 14 Drive Select B 15 Ground 16 Motor Enable 1177 18 DIR 19 Ground 20 STEP 21 Ground 22 Write Data 23 Ground 24 Write Gate 25 Ground 26 Track 00 27 Ground 28 Write Pro
13. H8DCR 3 H8DCR i User s Manual DMA Mode Selects the DMA Mode Options are Auto SWDMAO SWDMA1 SWDMA2 MWDMAO MDWDMA1 MWDMA2 UDMAO UDMA1 UDMA2 UDMA3 UDMA4 UDMAS SWDMA Single Word MWDMA Multi Word DMA UDMA UltraDMA S M A R T Self Monitoring Analysis and Reporting Technology SMART can help predict impending drive failures Select Auto to allow BIOS to auto detect hard disk drive support Select Disabled to prevent AMI BIOS from using the S M A R T Select Enabled to allow AMI BIOS to use the S M A R T to support hard drive disk The options are Disabled Enabled and Auto 32 Bit Data Transfer Select Enabled to activate the function of 32 Bit data transfer Select Disabled to deactivate the function The options are Enabled and Disabled Hard Disk Write Protect Select Enabled to enable the function of Hard Disk Write Protect to prevent data from being written to HDD The options are Enabled or Disabled IDE Detect Time Out Sec This feature allows the user to set the time out value for detecting ATA ATA PI devices installed in the system The options are 0 sec 5 10 15 20 25 30 and 35 ATA PI 80Pin Cable Detection This setting allows AMI BIOS to auto detect the 80 Pin ATA PI cable The options are Host Device and Host amp Device SATAO IDE Interface This setting is used to Enable or Disable the serial controller for SATAO SATA1 IDE Interface This setting is use
14. Mode Options are Auto and Manual Bank Interleaving Determines if memory will be interleaved Options are Auto and Disabled Burst Length Use this setting to set the memory burst length 64 bit Dq must use 4 beats Options are 8 beats 4 beats and 2 beats SoftWare Memory Hole When Enabled allows software memory remapping around the memory hole Options are Enabled and Disabled Node Interleaving Use this setting to Enable or Disable Node Interleaving gt Configuration DRAM ECC Enable DRAM ECC allows hardware to report and correct memory errors automati cally Options are Enabled and Disabled MCA DRAM ECC Logging When Enabled MCA DRAM ECC logging and reporting is enabled Options are Enabled and Disabled ECC Chip Kill Allows the user to enabled ECC Chip kill Options are Enabled and Disabled DRAM Scrub Redirect Allows system to correct DRAM ECC errors immediately even if back ground scrubbing is on Options are Enabled and Disabled 4 7 H8DCR 3 H8DCR i User s Manual DRAM BG Scrub Corrects memory errors so later reads are correct Options are Dis abled and various times in nanoseconds and microseconds L2 Cache BG Scrub Allows L2 cache RAM to be corrected when idle Options are Disabled and various times in nanoseconds and microseconds Data Cache BG Scrub Allows L1 cache RAM to be corrected when idle Options are Disabled and various times in nanoseconds and microseconds gt
15. Pin Definition 13 Vcc 14 HD Active NIC1 LED Pin Definitions JF1 Pin Definition 11 Vcc 12 NIC1 Active NIC2 LED Pin Definitions JF1 Pin Definition 9 Vcc 10 NIC2 Active State Solid Blinking OH Fan Fail LED Status Indication Overheat Fan fail Reset Button The Reset Button connection is lo cated on pins 3 and 4 of JF1 Attach it to the hardware reset switch on the computer case Refer to the table on the right for pin definitions Power Button The Power Button connection is located on pins 1 and 2 of JF1 Mo mentarily contacting both pins will power on off the system This button can also be configured to function as a suspend button see the Power Button Mode setting in BIOS To turn off the power when set to suspend mode depress the button for at least 4 seconds Refer to the table on the right for pin definitions LAN1 2 Ethernet Ports Two Gigabit Ethernet ports desig nated LAN1 and LAN2 are located beside the COM1 port These Ether net ports accept RJ45 type cables Universal Serial Bus Ports USB0 1 Two Universal Serial Bus ports USB2 0 are located beside the key board mouse ports See the table on the right for pin definitions 2 11 Chapter 2 Installation Reset Button Pin Definitions JF1 Pin Definition 3 Reset 4 Ground Power Button Pin Definitions JF1 Pin Definition 1 PW_ON 2 Ground
16. Pro 2200 includes a 20 lane PCI Express interface an AMD Opteron 16 bit Hyper Transport interface link a four port Serial ATA interface a dual ATA133 bus master interface and a USB 2 0 interface This hub connects directly to CPU 1 The two GLAN Ethernet controllers connect directly to the nForce Pro 2200 8132 HyperTransport PCI X Tunnel This hub includes AMD specific technology that provides two PCI X bridges with each bridge supporting a 64 bit data bus as well as separate PCI X operational modes and independent transfer rates Each bridge supports PCI masters that include clock request and grant signals This hub connects to the processors and through them to system memory It also interfaces directly with the Serial ATA controller HyperTransport Technology HyperTransport technology is a high speed low latency point to point link that was designed to increase the communication speed by a factor of up to 48x between integrated circuits This is done partly by reducing the number of buses in the chipset to reduce bottlenecks and by enabling a more efficient use of memory in multi processor systems The end result is a significant increase in bandwidth within the chipset 1 9 H8DCR 3 H8DCR i User s Manual 1 3 Health Monitoring This section describes the PC health monitoring features of the HBSDCR 3 H8DCR i The serverboard has an onboard System Hardware Monitor chip that supports PC health monitoring Onboard Volt
17. Quick Reference 1 5 Features iore te erdt 1 6 nVidia nForce Pro 2200 AMD 8132 Chipset System Block Diagram 1 8 1 2 Chipset OVOrVIOW RESSE 1 9 1 9 PC Health MonttOrlhg en eet ee naga c eoe 1 10 1 4 Power Configuration Settings 1 11 LESE nde iesus M 1 12 1 0 Super I O Wye eee 1 13 Chapter 2 Installation 2 1 Static Sensitive Devices 2 1 2 2 Mounting the Serverboard into a Chassis 2 2 2 3 Processor and Heatsink Installation 2 2 2 4 Installing nn n iene naan 2 5 2 5 I O Port and Control Panel Connections 2 8 2 6 Connecting Cables 2 9 ATX Power 2 9 Processor Power Connector 2 9 Auxiliary Power Connector HH 2 9 NIMITBUEIO 2 9 LED M M S n 2 10 a B b NN ipm 2 10 2 10 M RE 2 10 Overheat Fan Fall rnit
18. a soft reset Clearing the memory above 1 MB next 4Dh The memory above 1 MB has been cleared via a soft reset Saving the memory size next Going to checkpoint 52h next 4Eh The memory test started but not as the result of a soft reset Displaying the first 64 KB memory size next 4Fh The memory size display has started The display is updated during the memory test Performing the sequential and random memory test next memory size for relocation and shadowing next 50h The memory below 1 MB has been tested and initialized Adjusting the displayed 51h The memory size display was adjusted for relocation and shadowing 52h The memory above 1 MB has been tested and initialized Saving the memory size information next 53h The memory size information and the CPU registers are saved Entering real mode next 54h Shutdown was successful The CPU is in real mode Disabling the Gate A20 line parity and the NMI next 57h The A20 address line parity and the NMI are disabled Adjusting the memory size depending on relocation and shadowing next 58h The memory size was adjusted for relocation and shadowing Clearing the Hit lt DEL gt message next 59h The Hit lt DEL gt message is cleared The lt WAIT gt message is displayed Starting the DMA and interrupt controller test next 60h The DMA page register test passed Performing the DMA Controller 1 base register test next 62h The DMA controller 1 base register test
19. for the resolution of any such disputes The manufacturer s total liability for all claims will not exceed the price paid for the hardware product Manual Revision 1 0b Release Date January 30 2007 Unless you request and receive written permission from the Manufacturer you may not copy any part of this document Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 2007 All rights reserved Printed in the United States of America Preface Preface About This Manual This manual is written for system integrators PC technicians and knowledgeable PC users It provides information for the installation and use of the H8DCR 3 H8DCR i serverboard The H8DCR 3 H8DCR i is based on the nVidia nForce Pro 2200 and AMD 8132 chipset and supports dual AMD Opteron 200 series type processors in 940 pin microPGA ZIF sockets and up to 32 GB of DDR333 or DDR266 or up to 16 GB of DDR400 registered ECC SDRAM Please refer to the serverboard specifications pages on our web site for updates on supported processors http www supermicro com aplus This product is intended to be professionally installed Manual Organization Chapter 1 includes a checklist of what should be included in your serverboard box describes the features specifications and performance of the serverboard and p
20. passed Performing the DMA controller 2 base register test next 65h The DMA controller 2 base register test passed Programming DMA controllers 1 and 2 next 66h Completed programming DMA controllers 1 and 2 Initializing the 8259 interrupt controller next 67h Completed 8259 interrupt controller initialization 7Fh 80h The keyboard test has started Clearing the output buffer and checking for stuck keys Issuing the keyboard reset command next Extended NMI source enabling is in progress 81h A keyboard reset error or stuck key was found Issuing the keyboard controller interface test command next 82h The keyboard controller interface test completed Writing the command byte and initializing the circular buffer next 83h The command byte was written and global data initialization has completed Check ing for a locked key next 84h Locked key checking is over Checking for a memory size mismatch with CMOS RAM data next 85h The memory size check is done Displaying a soft error and checking for a password or bypassing WINBIOS Setup next B 5 H8DCR 3 H8DCR i User s Manual Checkpoint 86h 87h Code Description The password was checked Performing any required programming before WIN BIOS Setup next The programming before WINBIOS Setup has completed Uncompressing the WINBIOS Setup code and executing the AMIBIOS Setup or WINBIOS Setup utility next Returned from WINBIOS Setup and cleared the screen
21. the PCI latency in PCI clock cycles Options are 32 64 96 128 160 192 224 and 248 4 5 H8DCR 3 H8DCR i User s Manual Allocate IRQ to PCI VGA Set this value to allow or restrict the system from giving the VGA adapter card an interrupt address The options are Yes and No Palette Snooping Select Enabled to inform the PCI devices that an ISA graphics device is installed in the system in order for the graphics card to function properly The options are Enabled and Disabled PCI IDE BusMaster Set this value to allow or prevent the use of PCI IDE busmastering Select Enabled to allow AMI BIOS to use PCI busmaster for reading and writing to IDE drives The options are Disabled and Enabled Offboard PCI ISA IDE Card This option allows the user to assign a PCI slot number to an Off board PCI ISA IDE card in order for it to function properly The options are Auto PCI Slot1 PCI Slot2 PCI Slot3 PCI Slot4 PCI Slot5 and PCI Slot6 Load Onboard LAN Option ROM This setting is used to load the onboard LAN option ROM The options are LAN1 LAN2 and Disabled Advanced Chipset Control gt NorthBridge Configuration gt Memory Configuration Memclock Mode This setting determines how the memory clock is set Auto has the memory clock by code and Limit allows the user to set a standard value MCT Timing Mode Sets the timing mode for memory Options are Auto and Manual 4 6 Chapter 4 BIOS User Config
22. the PW ON connector to clear CMOS The onboard battery does not need to be removed when clearing CMOS however you must short JBT1 for at least four seconds JBT1 contact pads 2 16 3rd Power Supply Fail Signal Enable Disable The system can notify you in the event of a power supply failure This feature assumes that three redundant power supply units are installed in the chas sis If you only have one or two power supplies installed you should disable the function with the J3P header to pre vent false alarms See the table on the right for jumper settings to PCI Enable Disable The JI C1 2 pair of jumpers allows you to connect the System Management Bus to any one of the PCI expansion slots The default setting is closed on for both jumpers to enable the connec tion Both connectors must be set the same JI C1 is for data and JI C2 is for the clock See the table on right for jumper settings Compact Flash Master Slave The JCF1 jumper allows you to assign either master or slave status to an installed compact flash card See the table on the right for jumper settings Enable Disable JPG1 allows you to enable or disable the VGA port The default position is on pins 1 and 2 to enable VGA See the table on the right for jumper set tings 2 17 Chapter 2 Installation 3rd Power Supply Fail Signal Jumper Settings J3P Jumper Setting Definition Open Disabled Closed Enabled
23. with your system has two connectors to support two drives This special cable must be used to take advantage of the speed the ATA133 technology offers Connect the blue connector to the onboard IDE header and the other connector s to your hard drive s Consult the documentation that came with your disk drive for details on actual jumper locations and settings Question How do enable SAS Answer Insert the supplied CD and run the AFU exe application This will update the SAS option ROM Reboot the system During the POST routine you should see SAS HostRAID at the top of the screen When the system reboots enter the BIOS setup utility and change the following two settings to Enabled 3 4 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required be fore any warranty service will be rendered You can obtain service by calling your vendor for a Returned Merchandise Authorization RMA number When returning to the manufacturer the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand carried Shipping and handling charges will be applied for all orders that must be mailed when service is complete For faster service RMA authorizations may be requested online http www supermicro com support rma This warranty only covers normal consumer use and does not cover damages in curred in shipping or from failure due to the
24. 78 as its port address Select 3BC to allow the parallel port to use 3BC as its I O port address Parallel Port Mode This feature allows you to specify the parallel port mode The options are Normal Bi Directional ECP EPP and ECP amp EPP Parallel Port IRQ Select the IRQ interrupt request for the parallel port The options are IRQ5 and IRQ7 KBC Clock Rate This settings for the KBC Clock rate are 6 MHz 8 MHz 12 MHz and 16 MHz gt Hyper Transport Configuration CPUO CPU1 HT Link1 Speed The HT link will run at the speed specified in this setting if it is slower than or equal to the system clock and if the board is capable Options are Auto 200 MHz 400 MHz 600 MHz 800 MHz and 1 GHz CPUO CPU1 HT Link1 Width The HT link will run at the width specified in this setting Options are Auto 2 bit 4 bit 8 bit and 16 bit CPUO HT Link Speed The HT link will run at the speed specified in this setting if it is slower than or equal to the system clock and if the board is capable Options are Auto 200 MHz 400 MHz 600 MHz 800 MHz and 1 GHz CPUO HT Link Width The HT link will run at the width specified in this setting Options are Auto 2 bit 4 bit 8 bit and 16 bit 4 10 Chapter 4 BIOS gt AMD PowerNow Configuration This setting is used to Enable or Disable the AMD PowerNow feature gt DMI Event Logging View Event Log Highlight this item and press lt Enter gt to v
25. CPU Locate pin 1 on the CPU socket and pin 1 on the CPU Both are marked with a triangle 3 Align pin 1 of the CPU with pin 1 of the socket Once aligned carefully place the CPU into the socket Do not drop the CPU on the socket move the CPU horizontally or vertically or rub the CPU against the socket or against any pins of the socket which may damage the CPU and or the socket 4 With the CPU inserted into the socket inspect the four corners of the CPU to make sure that it is properly installed and flush with the socket 5 Gently press the CPU socket lever down until it locks in the plastic tab Repeat these steps to install another CPU into the CPU 2 socket Note using a single processor only is not recommended 2 3 H8DCR 3 H8DCR i User s Manual Installing the Heatsink Retention Modules Two heatsink retention modules BKT 0005 and four screws are included in the retail box Once installed these are used to help attach the heatsinks to the CPUs To install position the module so that the CPU backplate standoffs insert through the holes on the heatsink retention module and the four feet on the module contact the serverboard Secure the retention module to the backplate with two of the screws provided See Figure 2 1 Repeat for the second CPU socket Note BKT 0005 is included for use with non proprietary third party heatsinks only When installing Supermicro heatsinks only BKT 0004 CPU backplate is n
26. Chapter 4 BIOS 4 4 Boot Menu This feature allows the user to configure the following items gt Boot Settings Configuration Quick Boot If Enabled this option will skip certain tests during POST to reduce the time needed for the system to boot up The options are Enabled and Disabled Quiet Boot If Disabled normal POST messages will be displayed on boot up If Enabled this display the OEM logo instead of POST messages AddOn ROM Display Mode This setting controls the display of add on ROM read only memory messages Select Force BIOS to allow the computer system to force a third party BIOS to display during system boot Select Keep Current to allow the computer system to display the BIOS information during system boot Boot up Num Lock Set this to On to allow the Number Lock setting to be modified during boot up The options are On and Off PS 2 Mouse Support This setting is to specify PS 2 mouse support The options are Auto Enabled and Disabled Parity Check This setting is used to Enable or Disable the memory or parity error check Enable this setting for NMI support Wait for F1 If Error Enable to activate the Wait for F1 if Error function The options are Enabled and Disabled Hit DEL Message Display Enable to display the message telling the user to hit the DEL key to enter the setup utility The options are Enabled and Disabled 4 15 H8DCR 3 H8DCR i User s Manual Inte
27. DIMM1B DIMM2A DIMM2B DIMM1A DIMM1B DIMM2A DIMM2B X X EXE gt gt gt EXE gt 9 gt gt Notes X indicates a populated DIMM slot If adding at least four DIMMs the configura tions with DIMMs spread over both CPUs and not like the configuration in row 5 will result in optimized performance Note that the first two DIMMs must be installed in the CPU1 memory slots Populating Memory Banks for 64 bit Operation CPU1 CPU1 CPU1 CPU1 CPU2 CPU2 CPU2 CPU2 DIMM1A DIMM1B DIMM2A DIMM2B DIMM1A DIMM1B DIMM2A DIMM2B 2 7 H8DCR 3 H8DCR i User s Manual 2 5 Port and Control Panel Connections The I O ports are color coded in conformance with the PC99 specification to make setting up your system easier See Figure 2 3 below for the colors and locations of the various ports Figure 2 3 Port Locations and Definitions COM Port VGA Port Blue SAS Port Keyboard Port Mouse Port ibo ports Turquoise JLAN1 JLAN2 Purple Green m happy 2 AA 99999 cu Front Control Panel JF1 contains header pins for various front control panel connectors See Figure 2 4 for the pin definitions of the various connectors Refer to Section 2 6 for details Figure 2 4 JF1 Front Control Panel Header JF1 20 19 2 8 Chapter 2 Installation 2 6 Connecting Cables
28. H8DCR 3 H8DCR i USER S MANUAL Revision 1 0b The information this User s Manual has been carefully reviewed and is believed to be accurate The vendor assumes no responsibility for any inaccuracies that may be contained in this document makes no commitment to update or to keep current the information in this manual or to notify any person or organization of the updates Please Note For the most up to date version of this manual please see our web site We reserve the right to make changes to the product described in this manual at any time and without notice This product including software if any and documentation may not in whole or in part be copied photocopied reproduced translated or reduced to any medium or machine without prior written consent IN NO EVENT WILL THE MANUFACTURER BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN PARTICULAR THE VENDOR SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HARDWARE SOFTWARE OR DATA Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California USA The State of California County of Santa Clara shall be the exclusive venue
29. Performing any necessary programming after WINBIOS Setup next The programming after WINBIOS Setup has completed Displaying the power on screen message next Programming the WINBIOS Setup options next The WINBIOS Setup options are programmed Resetting the hard disk controller next The hard disk controller has been reset Configuring the floppy drive controller next The floppy drive controller has been configured Configuring the hard disk drive controller next Initializing the bus option ROMs from C800 next See the last page of this chapter for additional information Initializing before passing control to the adaptor ROM at C800 Initialization before the C800 adaptor ROM gains control has completed The adap tor ROM check is next The adaptor ROM had control and has now returned control to BIOS POST Perform ing any required processing after the option ROM returned control Any initialization required after the option ROM test has completed Configuring the timer data area and printer base address next Set the timer and printer base addresses Setting the RS 232 base address next Returned after setting the RS 232 base address Performing any required initializa tion before the Coprocessor test next Required initialization before the Coprocessor test is over Initializing the Coproces sor next Coprocessor initialized Performing any required initialization after the Coproces sor test next Initializ
30. R 3 H8DCR i User s Manual 2 8 Onboard Indicators LAN1 LAN2 LEDs The Ethernet ports located beside the VGA port have two LEDs On each Gb LAN port one LED blinks to indicate activity while the other LED may be green amber or off to indicate the speed of the connection See the table on the right for the func tions associated with the connection speed LED 3 3V Standby LED When illuminated the DP1 LED indi cates that 3 3V standby power from the power supply is being supplied to the serverboard DP1 should normally be illuminated when the system is con nected to AC power whether turned on or not DP1 will flash on and off when the system is in an S1 S3 Suspend to RAM or S4 Suspend to Disk state See the table on the right for DP1 LED states SAS Activity LEDs The SAS Activity LED indicators DS1 DS8 indicate the activity status of SAS ports 0 7 See the table on the right for pin definitions 2 20 LAN1 2 Left LED Connection Speed Indicator LED Color Definition Off 10 MHz Green 100 MHz Amber 1GHz 3 3V Standby LED DP1 State System Status On Standby power present on serverboard Off No power connected Flashing System in standby state SAS Activity LEDs DS1 DS8 DS Definition DS Definition DS1 SASO Act DS5 SAS4 Act DS2 SAS1 Act DS6 SAS5 Act DS3 SAS2 Act DS7 SAS6 Act DS4 SAS3 Act SAS7 Act Chapter 2 Installation 2 9
31. ace which includes support of legacy and ACPI power manage ment through a SMI or SCI function pin It also features auto power management to reduce power consumption The IRQs and I O space resources of the Super I O can be flexibly adjusted to meet ISA PnP requirements which support ACPI and APM Advanced Power Management H8DCR 3 H8DCR i User s Manual Notes Chapter 2 Installation Chapter 2 Installation 2 1 Static Sensitive Devices Electrostatic Discharge ESD can damage electronic components To prevent dam age to your system board it is important to handle it very carefully The following measures are generally sufficient to protect your equipment from ESD Precautions Use a grounded wrist strap designed to prevent static discharge Touch a grounded metal object before removing the board from the antistatic bag Handle the board by its edges only do not touch its components peripheral chips memory modules or gold contacts When handling chips or modules avoid touching their pins Putthe serverboard and peripherals back into their antistatic bags when not in use For grounding purposes make sure your computer chassis provides excellent conductivity between the power supply the case the mounting fasteners and the serverboard Useonly the correct type of CMOS onboard battery as specified by the manufac turer Do not install the CMOS onboard battery upside down which may result
32. age Monitors for two CPU cores Hyper Transport 1 2V two memory banks 2 5V chipset 1 5V The onboard voltage monitor will scan these voltages continuously Once a voltage becomes unstable it will give a warning or send an error message to the screen Users can adjust the voltage thresholds to define the sensitivity of the voltage moni tor Real time readings of these voltage levels are all displayed in BIOS Fan Status Monitor with Firmware Software Speed Control The PC health monitor can check the RPM status of the cooling fans The onboard fans are controlled by thermal management via BIOS CPU Overheat Fan Fail LED and Control This feature is available when the user enables the CPU overheat Fan Fail warning function in the BIOS This allows the user to define an overheat temperature When this temperature is exceeded or when a fan failure occurs then the Overheat Fan Fail warning LED is triggered Auto Switching Voltage Regulator for the CPU Core The 3 phase switching voltage regulator for the CPU core can support up to 80A and auto sense voltage IDs ranging from 0 875 V to 1 6V This will allow the regulator to run cooler and thus make the system more stable Chapter 1 Introduction 1 4 Power Configuration Settings This section describes the features of your serverboard that deal with power and power settings Microsoft OnNow The OnNow design initiative is a comprehensive system wide approach to system and dev
33. alteration misuse abuse or improper maintenance of products During the warranty period contact your distributor first for any product problems 3 4 Chapter 4 BIOS Chapter 4 BIOS 4 1 Introduction This chapter describes the AMIBIOS Setup utility for the H8DCR 3 H8DCR i The AMI ROM BIOS is stored in a flash chip and can be easily upgraded using a floppy disk based program Note Due to periodic changes to the BIOS some settings may have been added or deleted and might not yet be recorded in this manual Please refer to the Manual Download area of our web site for any changes to BIOS that may not be reflected in this manual Starting the Setup Utility To enter the BIOS Setup Utility hit the lt Delete gt key while the system is booting up In most cases the lt Delete gt key is used to invoke the BIOS setup screen There are a few cases when other keys are used such as lt F1 gt lt F2 gt etc Each main BIOS menu option is described in this manual The Main BIOS screen has two main frames The left frame displays all the options that can be configured Grayed out options cannot be configured The right frame displays the key legend Above the key legend is an area reserved for a text mes sage When an option is selected in the left frame it is highlighted in white Often a text message will accompany it Note that BIOS has default text messages built in We retain the option to include omit or change
34. any of these text messages Set tings printed in Bold are the default values M indicates a submenu Highlighting such an item and pressing the Enter key will open the list of settings within that submenu The BIOS setup utility uses a key based navigation system called hot keys Most of these hot keys lt F1 gt lt F10 gt lt Enter gt lt ESC gt lt Arrow gt keys etc can be used at any time during the setup navigation process 4 1 H8DCR 3 H8DCR i User s Manual 4 2 Menu When you first enter AMI BIOS Setup Utility you will see the Main Menu screen You can always return to the Main Menu by selecting the Main tab on the top of the screen with the arrow keys The Main Menu screen provides you with a system overview which includes the version built date and ID of the AMIBIOS the type speed and number of the processors in the system and the amount of memory installed in the system System Time System Date You can edit this field to change the system time and date Highlight System Time or System Date using the lt Arrow gt keys Enter new values through the keyboard Press the lt Tab gt key or the lt Arrow gt keys to move between fields The date must be entered in DAY MM DD YYYY format The time is entered in HH MM SS format Please note that time is in a 24 hour format For example 5 30 A M appears as 05 30 00 and 5 30 P M as 17 30 00 4 3 Advanced Settings Menu gt CPU Configuration
35. ation after the Coprocessor testis complete Checking the extended keyboard keyboard ID and Num Lock key next Issuing the keyboard ID command next Displaying any soft errors next The soft error display has completed Setting the keyboard typematic rate next The keyboard typematic rate is set Programming the memory wait states next Memory wait state programming is over Clearing the screen and enabling parity and the NMI next NMl and parity enabled Performing any initialization required before passing control to the adaptor ROM at E000 next Initialization before passing control to the adaptor ROM at E000h completed Passing control to the adaptor ROM at E000h next B 6 9 Abh BOh Bih 00h Appendix B BIOS POST Checkpoint Codes Code Description Returned from adaptor ROM at E000h control Performing any initialization required after the E000 option ROM had control next Initialization after E000 option ROM control has completed Displaying the system configuration next Uncompressing the DMI data and executing DMI POST initialization next Copying any code to specific areas The system configuration is displayed Code copying to specific areas is done Passing control to INT 19h boot loader next B 7 H8DCR 3 H8DCR i User s Manual Notes B 8
36. ble CBL 022 One 1 USB 2 0 port cable CBL 083 Two 2 CPU backplates BKT 0004 Two 2 heatsink retention modules with four 4 screws BKT 0005L One 1 CD containing drivers and utilities 1 1 H8DCR 3 H8DCR i User s Manual Contacting Supermicro Headquarters Address SuperMicro Computer Inc 980 Rock Ave San Jose CA 95131 U S A Tel 1 408 503 8000 Fax 1 408 503 8008 Email marketing supermicro com General Information support supermicro com Technical Support Web Site www supermicro com Europe Address SuperMicro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 Email sales supermicro nl General Information support supermicro nl Technical Support rma supermicro nl Customer Support Asia Pacific Address SuperMicro Taiwan 4F No 232 1 Liancheng Rd Chung Ho 235 Taipei County Taiwan Tel 886 2 8226 3990 Fax 886 2 8226 3991 Web Site www supermicro com tw Technical Support Email support supermicro com tw Tel 886 2 8228 1366 ext 132 or 139 1 2 Chapter 1 Introduction Figure 1 1 H3DCR 3 H8DCR i Image PUL A TT 2 3 1 mU d anos amp Zi Note H8DCR 3 is pictured The H8DCR i shares the same layou
37. bled 2 18 Watch Dog Jumper Settings JWD Jumper Setting Definition Pins 1 2 Reset Pins 2 3 NMI Note When enabled the user needs to write their own application software in or der to disable the Watch Dog timer Onboard Speaker Enable Disable Jumper Settings JD1 Pins Definition 7 Jump for onboard speaker 4and 7 Attach external speaker wires Note Pins 4 7 are used only for the on board speaker SAS Controller Enable Disable Jumper Settings JPS1 Jumper Setting Definition Pins 1 2 Enabled Pins 2 3 Disabled Chapter 2 Installation PCI X Slot Frequency Select PCI X Slot Speed Jumper Settings JPX1A JPX2A Jumpers JPX1A and JPX2A can be used to change the speed of PCI X Jumper Setting Definition slots 6 and 7 respectively See the Open Auto table on the right for jumper settings ii 1 2 2 3 PCI 66 MHz Note JPX1A controls the speed for PCI X slot 6 and JPX2A controls the speed for PCI X slot 7 The default setting for both is Auto LAN1 2 Enable Disable LAN Enable Disable Jumper Settings JPL1 JPL2 Change the setting of jumper JPL1 Jumper Setting and JPL2 to enable or disable the Pins 1 2 LAN1 and LAN2 ports respectively See the table on the right for jumper settings The default setting is en abled Definition Enabled Pins 2 3 Disabled 2 19 H8DC
38. ck 6 Overheat LED Pin Definitions JOH1 Pin Definition 1 3 3V 2 OH Active 12 Header Pin Definitions PS_SMBUS Definition Clock Data PWR Fail Gnd H8DCR 3 H8DCR i User s Manual Wake On LAN The Wake On LAN header is desig nated JWOL See the table on the right for pin definitions You must have a LAN card with a Wake On LAN connector and cable to use the Wake On LAN feature Note Wake On LAN from 3 S4 5 are supported by LAN1 LAN2 sup ports Wake On LAN from 1 only Wake On Ring The Wake On Ring header is desig nated JWOR This function allows your computer to receive and wake up by an incoming call to the modem when in suspend state See the table on the right for pin definitions You must have a Wake On Ring card and cable to use this feature SMBus Header The header at J22 is for the System Management Bus Connect the ap propriate cable here to utilize SMB on the system See the table on the right for pin definitions Alarm Reset Header Connect JAR to the alarm reset but ton on your chassis if available or to a microswitch to allow you to turn off the alarm that sounds when a power supply module fails See the table on the right for pin definitions 2 14 Wake On LAN Pin Definitions JWOL Pin Definition 1 5V Standby 2 Ground Wake up Wake On Ring Pin Definitions JWOR Pin Definition 1 Ground Black Wake up SMBus Head
39. d to Enable or Disable the serial controller for SATA1 First Boot Device From Use this setting to select the first boot device as being P ATA or S ATA 4 4 Chapter 4 BIOS gt Configuration nVidia RAID ROM RAID Option ROM This setting is used to Enable or Disable the nVidia ROM If enabled the set ting below will appear Master SATA as RAID This setting is used to set the third master as a RAID drive The options are Enabled or Disabled gt Floppy Configuration Floppy A Move the cursor to these fields via up and down lt arrow gt keys to select the floppy type The options are Disabled 360 KB 5 1 4 1 2 MB 5 1 4 720 KB 3 1 44 MB 3 and 2 88 MB Floppy B Move the cursor to these fields via up and down lt arrow gt keys to select the floppy type The options are Disabled 360 KB 5 1 4 1 2 MB 5 1 4 720 KB 3 1 44 3 and 2 88 MB Onboard Floppy Controller Use this setting to Enable or Disable the onboard floppy controller gt PCI PnP Menu Clear NVRAM Select Yes to clear NVRAM during boot up The options are Yes and No Plug amp Play OS Select Yes to allow the OS to configure Plug amp Play devices This is not required for system boot if your system has an OS that supports Plug amp Play Select No to allow AMIBIOS to configure all devices in the system PCI Latency Timer This option sets the latency of all PCI devices on the PCI bus Select a value to set
40. e with your system includes a RAID utility program that can be used in Windows This program is installed along with the nVidia nForce Stand alone Kit on the CD After the program is installed open it by going to Start gt Programs gt nVidia Cor poration Media Shield On the left side of the program s main window click Create Array under System Tasks This will launch a Wizard which will prompt you through the process of selecting the type of array you wish to build the stripe size and the drives to add to the array You will then be asked to verify clearing the system data On doing so the RAID array will be created 2 26 Chapter 3 Troubleshooting Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures Use the following procedures to troubleshoot your system If you have followed all of the procedures below and still need assistance refer to the Technical Support Procedures and or Returning Merchandise for Service section s in this chapter Always disconnect the AC power cord before adding changing or installing any hardware components Before Power On 1 Check that the 3 3V standby power LED is lit DP1 on the serverboard 2 Make sure that the main ATX power connector at J1B4 the 8 pin connector at JPW2 and the 4 pin connecor at J32 are all connected to your power supply 3 Make sure that no short circuits exist between the serverboard and chassis 4 Disconnect all ribbon wire cables f
41. ed memory are supported so you may populate any number of DIMM slots However populating two adjacent slots at a time with memory modules of the same size and type will result in interleaved 128 bit memory which is faster than non interleaved 64 bit memory See charts on page 2 7 Optimizing memory performance With two processors installed it is better to stagger pairs of DIMMs across both sets of CPU DIMM slots e g first populate CPU1 slots 1A and 1B then CPU2 slots 1A and 1B then the next two CPU1 slots etc This balances the load over both CPUs to optimize performance Maximum memory two CPUs 32 GB for DDR266 and 16 GB for DDR400 333 H8DCR 3 H8DCR i User s Manual Figure 2 2 Side and Top Views of DDR Installation To Install Insert module vertically and press down until it snaps into place The release tabs should close if they do not you should close them yourself To Remove Use your thumbs to gently push each re lease tab outward to release the DIMM from the slot Notch 4 Notch Note Notch should align with the receptive point on the slot Note the notch in the slot and on the bottom of the DIMM These prevent the DIMM from being installed incorrectly Top View of DDR Slot Release Tab Il Il Release Tab 2 6 Chapter 2 Installation Populating Memory Banks for 128 bit Operation CPU1 CPU1 CPU1 CPU1 CPU2 CPU2 CPU2 CPU2 DIMM1A
42. ed the system configuration changes select this option to leave BIOS Setup and reboot the computer so the new system configuration parameters can take effect Select Save Changes and Exit from the Exit menu and press lt Enter gt Discard Changes and Exit Select this option to quit BIOS Setup without making any permanent changes to the system configuration and reboot the computer Select Discard Changes and Exit from the Exit menu and press lt Enter gt Discard Changes Select this option and press lt Enter gt to discard all the changes and return to AMI BIOS Utility Program Load Optimal Defaults To set this feature select Load Optimal Defaults from the Exit menu and press lt Enter gt Then Select OK to allow BIOS to automatically load the Optimal Defaults as the BIOS Settings The Optimal settings are designed for maximum system performance but may not work best for all computer applications Load Failsafe Defaults To set this feature select Load Fail Safe Defaults from the Exit menu and press lt Enter gt The Fail Safe settings are designed for maximum system stability but not maximum performance H8DCR 3 H8DCR i User s Manual Notes 4 18 Appendix A BIOS Error Beep Codes Appendix A BIOS Error Beep Codes During the POST Power On Self Test routines which are performed each time the system is powered on errors may occur Non fatal errors are those which in most cases allow the system to cont
43. eeded The BKT 0005 retention module was designed to provide compatibility with clip and cam type heatsinks from third parties Figure 2 1 CPU Backplate Heatsink Retention Module Installation Mounting screw Mounting screw 1 Heatsink retention module CPU socket Serverboard t t Peel off release AD CPU backplate Installing the Heatsink We recommend the use of active type heatsinks except for 1U systems To install the heatsinks please follow the installation instructions included with your heatsink package not included 2 4 Chapter 2 Installation 2 4 Installing Memory CAUTION Exercise extreme care when installing or removing memory modules to prevent any possible damage 1 Insert each memory module vertically into its slot paying attention to the notch along the bottom of the module to prevent inserting the module incorrectly see Figure 2 2 See support information below 2 Gently press down on the memory module until it snaps into place Note each processor has its own built in memory controller 128 MB 256 MB 512 1 GB 2 GB and 4 memory modules are supported It is highly recommended that you remove the power cord from the system before installing or changing any memory modules With Opteron 246 C stepping CPUs and above Support The H8DCR 3 H8DCR i supports single or dual channel registered ECC DDR400 333 266 SDRAM Both interleaved and non interleav
44. er Pin Definitions J22 Pin Definition Data Ground Clock No Connection Alarm Reset Header Pin Definitions JAR Pin Definition 1 Ground Reset Signal Chapter 2 Installation Power Fail Connector Power Fail Connector Connect a cable from your power Pin Definitions JPWF supply to JPWF to provide you with Pin Definition warning of a power supply failure 1 P S 1 Fail Signal The warning signal is passed through 2 P S 2 Fail Signal the PWR_LED pin to indicate a power 3 P S 3 Fail Signal failure See the table on the right for 4 Reset from MB pin definitions Note This feature is only available when using redundant power supplies Compact Flash Power Connector Compact Flash Power Connector JWF1 is a power connector for a Definitions SIVE Compact Flash or DOC Disk On Chip Pin gt Definition device Connect the appropriate cable 1 vou here to provide power to such a device 2 Ground on your system See the table on the Signal right for pin definitions JSLED1 Header Pin Definitions JSLED1 Header m Definition Pin Definition JSLED1 is used to provide LED indica SAS HU 6 NC tion of SAS drive activity for internal SAS Active NC SAS ports 0 3 Refer to the table on SAS Port2 Active 8 NC the right for pin definitions SAS ports SAS Port3 Active 9 NC 4 7 are external ports and do not have SAS Port0 3 Signal board level su
45. execution Checkpoint Code Description DOh The NMI is disabled Power on delay is starting Next the initialization code check sum will be verified Dih Initializing the DMA controller performing the keyboard controller BAT test starting memory refresh and entering 4 GB flat mode next D3h Starting memory sizing next D4h Returning to real mode Executing any OEM patches and setting the Stack next D5h Passing control to the uncompressed code in shadow RAM at E000 0000h The initialization code is copied to segment 0 and control will be transferred to segment 0 H8DCR 3 H8DCR i User s Manual B 2 Bootblock Recovery Codes The bootblock recovery checkpoint codes are listed in order of execution Checkpoint Code Description EOh The onboard floppy controller if available is initialized Next beginning the base 512 KB memory test E1h Initializing the interrupt vector table next E2h Initializing the DMA and Interrupt controllers next E6h Enabling the floppy drive controller and Timer IRQs Enabling internal cache mem Edh Initializing the floppy drive Eeh Looking for a floppy diskette in drive A Reading the first sector of the diskette Efh read error occurred while reading the floppy drive in drive A FOh Next searching for the AMIBOOT ROM file in the root directory F1h The AMIBOOT ROM file is not in the root directory F2h Next reading and analyzing the floppy disket
46. for all DIMMs in the system See Section 2 4 for memory details and limitations 3 Check for bad DIMM modules or slots by swapping modules between slots and noting the results 4 Check the power supply voltage 115V 230V switch Losing the System s Setup Configuration 1 Make sure that you are using a high quality power supply A poor quality power supply may cause the system to lose the CMOS setup information Refer to Sec tion 1 6 for details on recommended power supplies 2 The battery on your serverboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one 3 If the above steps do not fix the setup configuration problem contact your vendor for repairs 3 2 Technical Support Procedures Before contacting Technical Support please take the following steps Also note that as a serverboard manufacturer we do not sell directly to end users so it is best to first check with your distributor or reseller for troubleshooting services They should know of any possible problem s with the specific system configuration that was sold to you 1 Please review the Troubleshooting Procedures and Frequently Asked Questions FAQs sections in this chapter or see the FAQs on our web site before contacting Technical Support 2 BIOS upgrades can be downloaded from our web site Note Not all BIOS can be flashed depending on the modifications to the boot block code Chapter 3 Troub
47. ice power control OnNow is a term for a PC that is always on but appears to be off and responds immediately to user or other requests Slow Blinking LED for Suspend State Indicator When the CPU goes into a suspend state the chassis power LED will start blinking to indicate that the CPU is in suspend mode When the user presses any key the CPU will wake up and the LED will automatically stop blinking and remain on BIOS Support for USB Keyboard If a USB keyboard is the only keyboard in the system it will function like a normal keyboard during system boot up Main Switch Override Mechanism When an ATX power supply is used the power button can function as a system suspend button When the user depresses the power button the system will enter a SoftOff state The monitor will be suspended and the hard drive will spin down Depressing the power button again will cause the whole system to wake up Dur ing the SoftOff state the ATX power supply provides power to keep the required circuitry in the system alive In case the system malfunctions and you want to turn off the power just depress and hold the power button for 4 seconds The power will turn off and no power will be provided to the serverboard Wake On LAN JWOL Wake On LAN is defined as the ability of a management application to remotely power up a computer that is powered off Remote PC setup up dates and access tracking can occur after hours and on weekends so that daily LAN
48. iew the contents of the event log Mark All Events as Read Highlight this item and press lt Enter gt then select Yes to mark all DMI events as read or cancel Clear Event Log Highlight this item and press lt Enter gt then select Yes to clear the DMI event log or cancel gt Console Redirection Remote Access Use this setting to Enable or Disable the remote access function When enabled the options below will appear Serial Port Number Selects the serial port to use for console redirection The options are COM1 and COM2 Serial Port Mode Selects the serial mode to use for console redirection The options are 115200 8 n 1 57600 8 1 38400 8 n 1 19200 8 1 and 09600 8 n 1 Flow Control This item allows you to choose from the available options to select the flow control for console redirection The options are None Hardware and Software Redirection After BIOS POST This setting determines the redirection after the BIOS POST routine takes placce Options are Disabled Boot Loader and Always 4 11 H8DCR 3 H8DCR i User s Manual Terminal Type This item allows you to select the terminal type for console redirection The options are ANSI VT100 and VT UTF8 VT UTF8 Combo Key Support This item allows you to Enable or Disable VT UTF8 combo key support Sredir Memory Display Delay This item allows you to set the redirect delay to No Delay Delay 1 sec Delay 2 sec or Dela
49. inue the boot up process The error messages normally appear on the screen Fatal errors are those which will not allow the system to continue the boot up pro cedure If a fatal error occurs you should consult with your system manufacturer for possible repairs These fatal errors are usually communicated through a series of audible beeps The numbers on the fatal error list on the following page correspond to the number of beeps for the corresponding error All errors listed with the exception of Beep Code 8 are fatal errors POST codes may be read on the debug LEDs located beside the LAN port on the serverboard backplane See the description of the Debug LEDs LED1 and LED2 in Chapter 5 1 AMIBIOS Error Beep Codes Beep Code Error Message Description 1 beep Refresh Circuits have been reset Ready to power up 5 short 1 long Memory error No memory detected in system 8 beeps Display memory read write error Video adapter missing or with faulty memory A 1 H8DCR 3 H8DCR i User s Manual Notes A 2 Appendix BIOS POST Checkpoint Codes Appendix B BIOS POST Checkpoint Codes When AMIBIOS performs the Power On Self Test it writes checkpoint codes to I O port 0080h Ifthe computer cannot complete the boot process diagnostic equipment can be attached to the computer to read port 0080h B 1 Uncompressed Initialization Codes The uncompressed initialization checkpoint codes are listed in order of
50. leshooting 3 If you still cannot resolve the problem include the following information when contacting us for technical support e X Serverboard model and PCB revision number e BIOS release date version this can be seen on the initial display when your system first boots up e System configuration An example of a Technical Support form is posted on our web site 4 Distributors For immediate assistance please have your account number ready when contacting our technical support department by e mail 3 3 Frequently Asked Questions Question What type of memory does my serverboard support Answer The H8DCR 3 H8DCR i supports up to 32 GB of registered ECC DDR333 266 or up to 16 GB of registered ECC DDR400 interleaved or non inter leaved SDRAM with two CPUs installed See Section 2 4 for details on installing memory Question How do update my BIOS Answer It is recommended that you not upgrade your BIOS if you are not experi encing problems with your system Updated BIOS files are located on our web site Please check our BIOS warning message and the information on how to update your BIOS on our web site Also check the current BIOS revision and make sure it is newer than your current BIOS before downloading Select your mainboard model on the web page and download the corresponding BIOS file to your computer Unzip the BIOS update file in which you will find the readme txt flash instructions the afudos exe BIOS fla
51. multaneously Installing the OS and Drivers With the Windows OS installation CD in the CD ROM drive restart the system When you see the prompt hit the F6 key to enter Windows setup Eventually a blue screen will appear with a message that begins Windows could not determine the type of one or more storage devices When you see the screen hit the S key to Specify Additional Device then insert the driver diskette you just created into the floppy drive Highlight Manufuacturer Supplied Hardware Support Disk and hit the Enter key Highlight the first nVidia RAID driver shown and press the Enter key to install it Soon a similar blue screen will appear again Again hit the S key then highlight the second item nForce Storage Controller and press the Enter key then Enter again to continue with the Windows setup 2 25 H8DCR 3 H8DCR i User s Manual Figure 2 5 Driver Installation Display Screen H8DCR 3 Server Board Drivers amp Tools WinXP IDAPIC driver for AMD 813x SUPERMICR gt nVidia nForce4 Standalone Kit Drivers amp Tools Microsoft DirectX 9 0 nVidia nForce Pro 2200 AMD 8132 PCI X Tunnel Chipset H8DCR 3 Series ATI Graphics driver Adaptec Storage Manager Broadcom Network Connections Drivers Supero Doctor III Build driver diskettes and manuals Cslbe bo po p p pe n Browse CD Auto Start Up Next Time Using the nVidia Media Shield The CD that cam
52. nt Panel Connector Floppy Disk Drive Connector Chassis Intrusion Header Gigabit Ethernet RJ45 Ports Overheat Warning Header 8 Pin Processor Power Connector Power Fail Connector Connector for SAS Backplane SAS Drive Activty LEDs SAS 4 7 SAS 0 3 Ports Additional USB Headers USB2 3 Compact Flash Power Connector Wake On LAN Header Wake On Ring Header Power Supply Header Serial ATA Ports Universal Serial Bus USB Ports 0 1 Description Power Standby LED SAS Activity LEDs 1 5 H8DCR 3 H8DCR i User s Manual Serverboard Features CPU e Dual AMD Opteron 200 series 64 bit processors in 940 pin microPGA ZIF sockets single CPU configurations are not recommended Memory Eight dual single channel DIMM slots supporting up to 32 GB of registered ECC DDR333 266 or up to 16 GB of registered ECC DDR400 SDRAM Note Memory capacities are halved for single CPU systems Refer to Section 2 4 before installing Chipset e nVidia nForce Pro 2200 e 8132 Expansion Slots Two 2 PCI Express x8 slots One 1 PCI X 133 MHz slot One 1 PCI X 100 MHz slot ZCR slot BIOS e 8 Mb AMIBIOS LPC Flash ROM APM 1 2 DMI 2 3 PCI 2 2 ACPI 1 0 ACPI 2 0 is BIOS supported SMBIOS 2 3 Plug and Play PnP PC Health Monitoring Onboard voltage monitors for two CPU cores HyperTransport 1 2V two memory banks 2 6V chipset 1 5V Fan status monitor with firmware software on off and speed contr
53. o Block Multi Sector Transfer Block mode boosts IDE drive performance by increasing the amount of data transferred Only 512 bytes of data can be transferred per interrupt if block mode is not used Block mode allows transfers of up to 64 KB per interrupt Select Disabled to allow the data to be transferred from and to the device one sec tor at a time Select Auto to allows the data transfer from and to the device occur multiple sectors at a time if the device supports it The options are Auto and Disabled PIO Mode PIO Programmable mode programs timing cycles between the IDE drive and the programmable IDE controller As the PIO mode increases the cycle time decreases The options are Auto 0 1 2 3 and 4 Select Auto to allow AMI BIOS to auto detect the PIO mode Use this value if the IDE disk drive support cannot be determined Select 0 to allow AMI BIOS to use PIO mode 0 It has a data transfer rate of 3 3 MBs Select 1 to allow AMI BIOS to use PIO mode 1 It has a data transfer rate of 5 2 MBs Select 2 to allow AMI BIOS to use PIO mode 2 It has a data transfer rate of 8 3 MBs Select 3 to allow AMI BIOS to use PIO mode 3 It has a data transfer rate of 11 1 MBs Select 4 to allow AMI BIOS to use PIO mode 4 It has a data transfer rate of 16 6 MBs This setting generally works with all hard disk drives manufactured after 1999 For other disk drives such as IDE CD ROM drives check the specifications of the drive 4 3
54. o Configuration nVidia RAID ROM and press lt Enter gt to access that submenu Highlight the setting RAID Option ROM and press enter change the setting to Enabled and hit Enter again A new setting should now be displayed Master SATA as RAID Enable this setting 3 In the Exit Menu in BIOS select Save Changes and Exit and hit Enter then hit Enter again to verify 4 After exiting the BIOS Setup Utility the system will reboot When prompted during the startup press the F10 key when prompted to run the nVidia RAID Utility program Using the nVidia RAID Utility The nVidia RAID Utility program is where you can define the drives you want to include in the RAID array and the mode and type of RAID Two main windows are shown in the utility The Free Disks window on the left will list all available drives Use the arrow keys to select and move drives to the window on the right which lists all drives that are to become part of the RAID array Once you have finished selecting the drives and type of RAID you wish to use for your RAID array press the F7 key You will be prompted to verify your choice if you want to continue with your choices select Yes Note that selecting Yes will clear all previous data from the drives you selected to be a part of the array You are then given the choice of making the RAID array bootable by pressing the the B key After you have finshed press the Ctrl and X keys si
55. ol Watch Dog Environmental temperature monitoring via BIOS Power up mode control for recovery from AC power loss System resource alert via included utility program e Auto switching voltage regulator for the CPU core A dual processor configuration is required for correct PCI X slot operation 1 6 Chapter 1 Introduction ACPI Features Microsoft OnNow Slow blinking LED for suspend state indicator BIOS support for USB keyboard Main switch override mechanism Internal external modem ring on Onboard I O On chip SATA controller supporting four 4 SATA ports RAID 0 1 0 1 and JBOD Adaptec AIC 9410W SAS controller RAID 0 1 and JBOD H8DCR 3 only Two 2 UltraDMA ATA 133 100 IDE ports One 1 floppy port interface up to 2 88 MB Two 2 Fast UART 16550 compatible serial ports Two 2 Broadcom BCM5721 controllers support two Gb LAN Ethernet ports PS 2 mouse and PS 2 keyboard ports Four 4 USB Universal Serial Bus 2 0 ports headers Other Wake on Ring JWOR1 Wake on LAN JWOL Onboard 3 3 standby power LED DP1 SAS activity LEDs H8DCR 3 only Chassis intrusion detection CD Utilities BIOS flash upgrade utility Dimensions Extended ATX form factor 12 x 13 05 305 x 332 mm RAID level 5 also supported with Media Shield see Section 2 10 1 7 H8DCR 3 H8DCR i User s Manual 128bit data 16 bit ECC 16 x 16 HT link 1 GHz 128 bit data 16 bit ECC 008400 333 266
56. onfiguration 3 2 3 2 Technical Support Procedures 3 2 3 3 Frequently Asked Questions 3 3 3 4 Returning Merchandise for Service 3 4 Chapter 4 BIOS 1 BEER 4 1 4 2 Maim 4 2 4 3 Advanced Settings 4 2 4 4 Boot tarnrn b aa aaia adieran ideaa 4 15 4 5 Security Men riranin Pa EORR eR EUIS aAa enida 4 16 4 4 17 Appendices Appendix A BIOS Error Beep Codes A 1 Appendix B BIOS POST Checkpoint Codes B 1 vi Chapter 1 Introduction 1 1 Chapter 1 Introduction Overview Checklist Congratulations on purchasing your computer serverboard from an acknowledged leader in the industry Our boards are designed with the utmost attention to detail to provide you with the highest standards in quality and performance Please check that the following items have all been included with your serverboard If anything listed here is damaged or missing contact your retailer Included with retail box only One 1 H8BDCR 3 H8DCR i serverboard One 1 IDE cable CBL 036L 02 One 1 floppy ca
57. ound 5 RXN 6 RXP T Ground SAS Ports Pin Definitions JSM1 JSM2 Definition Pin Definition 0 2 Rx0 Rx1 4 Rx1 Rx2 6 Rx2 Rx3 8 Rx3 Tx3 10 1 2 12 2 Tx1 14 Tx1 Tx0 16 Tx0 H8DCR 3 H8DCR i User s Manual 2 10 Enabling SATA RAID Now that the hardware is set up you must now install the operating system and the SATA RAID drivers if you wish to use RAID with your SATA drives The installation procedure differs depending on whether you wish to have the operating system installed on a RAID array or on a separate non RAID drive See the instructions below for details Serial ATA SATA Serial ATA SATA is a physical storage interface that employs a single cable with a minimum of four wires to create a point to point connection between devices This connection is a serial link that supports a SATA transfer rate from 150 MBps The serial cables used in SATA are thinner than the traditional cables used in Parallel ATA PATA and can extend up to one meter in length compared to only 40 cm for PATA cables Overall SATA provides better functionality than PATA Installing the OS SATA Driver Before installing the OS operating system and SATA RAID driver you must decide if you wish to have the operating system installed as part of a bootable RAID array or installed to a separate non RAID hard drive If on a separate drive you may install the driver either during or after the OS installa
58. possibility of explosion do not use the wrong type of onboard CMOS battery or install it upside down Chapter 1 Introduction 1 6 Super I O The disk drive adapter functions of the Super I O chip include a floppy disk drive controller that is compatible with industry standard 82077 765 a data separator write pre compensation circuitry decode logic data rate selection a clock genera tor drive interface control logic and interrupt and DMA logic The wide range of functions integrated onto the Super I O greatly reduces the number of components required for interfacing with floppy disk drives The Super I O supports two 360 K 720 K 1 2 M 1 44 M or 2 88 M disk drives and data transfer rates of 250 Kb s 500 Kb s or 1 Mb s It also provides two high speed 16550 compatible serial communication ports UARTs one of which supports serial infrared communication Each UART in cludes a 16 byte send receive FIFO a programmable baud rate generator complete modem control capability and a processor interrupt system Both UARTs provide legacy speed with baud rate of up to 115 2 Kbps as well as an advanced speed with baud rates of 250 K 500 K or 1 Mb s which support higher speed modems The Super I O supports one PC compatible printer port SPP Bi directional Printer Port BPP Enhanced Parallel Port EPP or Extended Capabilities Port ECP The Super I O provides functions that comply with ACPI Advanced Configuration and Power Interf
59. pport for activity LEDs Note NC indicates no connection for SAS Connector FC for SAS Connector Pin Definitions JS4 The JS4 connection is used to provide i monitoring for the SAS backplane See the table on the right for pin defi nitions Data Clock Ground 2 15 H8DCR 3 H8DCR i User s Manual 2 7 Jumper Settings Explanation of Jumpers To modify the operation of the 3 2 1 serverboard jumpers can be used to choose between optional settings Jumpers create shorts between two pins to change the function of the connector Pin 1 is identified with a square solder pad on the printed Jumper N circuit board See the diagram at right for an example of jumping pins 1 and 2 Refer to the serverboard layout page for jumper locations Note Ontwo pin jumpers Closed means the jumper is on and Open means the jumper is off the pins CMOS Clear JBT1 is used to clear CMOS and will also clear any passwords Instead of pins this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS To clear CMOS 1 First power down the system and unplug the power cord s 2 With the power disconnected short the CMOS pads with a metal object such as a small screwdriver for at least four seconds 3 Remove the screwdriver or shorting device 4 Reconnect the power cord s and power on the system Notes Do not use
60. pter for additional information Displaying bus initialization error messages See the last page of this chapter for additional information The new cursor position has been read and saved Displaying the Hit lt DEL gt mes sage next The Hit lt DEL gt message is displayed The protected mode memory test is about to start Preparing the descriptor tables next The descriptor tables are prepared Entering protected mode for the memory test next Entered protected mode Enabling interrupts for diagnostics mode next Interrupts enabled if the diagnostics switch is on Initializing data to check memory wraparound at 0 0 next Data initialized Checking for memory wraparound at 0 0 and finding the total sys tem memory size next The memory wraparound test is done Memory size calculation has been done Writing patterns to test memory next The memory pattern has been written to extended memory Writing patterns to the base 640 KB memory next Patterns written in base memory Determining the amount of memory below 1 MB next The amount of memory below 1 MB has been found and verified The amount of memory above 1 MB has been found and verified Checking for a soft reset and clearing the memory below 1 MB for the soft reset next If this is a power on situation going to checkpoint 4Eh next B 4 Appendix BIOS POST Checkpoint Codes Checkpoint Code Description 4Ch The memory below 1 MB has been cleared via
61. rom the serverboard including those for the keyboard and mouse 5 Remove all add on cards 6 Install a CPU and heatsink making sure it is fully seated and connect the in ternal chassis speaker and the power LED to the serverboard Check all jumper settings as well 7 Use the correct type of onboard CMOS battery as recommended by the manufac turer To avoid possible explosion do not install the CMOS battery upside down No Power 1 Make sure that no short circuits exist between the serverboard and the chas sis 2 Verify that all jumpers are set to their default positions 3 Check that the 115V 230V switch on the power supply is properly set 4 Turn the power switch on and off to test the system 5 The battery on your serverboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one No Video 1 If the power is on but you have no video remove all the add on cards and cables 2 Use the speaker to determine if any beep codes exist Refer to Appendix A for details on beep codes 3 1 H8DCR 3 H8DCR i User s Manual NOTE If you are a system integrator VAR or OEM a POST diagnostics card is recommended For I O port 80h codes refer to App Memory Errors 1 Make sure that the DIMM modules are properly and fully installed 2 You should be using registered ECC DDR memory see next page Also it is recommended that you use the same memory type and speed
62. rovides detailed information about the chipset Chapter 2 begins with instructions on handling static sensitive devices Read this chapter when installing the processor s and memory modules and when installing the serverboard in a chassis Also refer to this chapter to connect the floppy and hard disk drives the parallel and serial ports the mouse and keyboard and the twisted wires for the power and reset buttons and the system LEDs If you encounter any problems see Chapter 3 which describes troubleshooting procedures for the video the memory and the setup configuration stored in CMOS For quick reference a general FAQ Frequently Asked Questions section is pro vided Instructions are also included for contacting technical support In addition you can visit our web site for more detailed information Chapter 4 includes an introduction to BIOS and provides detailed information on running the CMOS Setup utility Appendix A provides BIOS Error Beep Code Messages Appendix B lists BIOS POST Checkpoint Codes H8DCR 3 H8DCR i User s Manual Table of Contents Preface About This Manual iii Manual cm iii Chapter 1 Introduction Tek TP aT 1 1 CHECKS oo 1 1 H8DCR 3 H8DCR i Image 1 3 H8DCR 3 H8DCR i Serverboard Layout 1 4 H8DCR 3 H8DCR i
63. rrupt 19 Capture Enable to allow ROMs to trap Interrupt 19 The options are Enabled and Dis abled gt Boot Device Priority This feature allows the user to prioritize the sequence for the boot device from all available devices gt Removeable Drives This feature allows the user to specify the boot sequence from the available remove able drives OS Installation Change this setting if using a Linux operating system The available options are Other and Linux 4 5 Security Menu AMI BIOS provides a Supervisor and a User password If you use both passwords the Supervisor password must be set first Change Supervisor Password Select this option and press lt Enter gt to access the sub menu and then type in the password Change User Password Select this option and press lt Enter gt to access the sub menu and then type in the password Boot Sector Virus Protection This option is near the bottom of the Security Setup screen Select Disabled to deactivate the Boot Sector Virus Protection Select Enabled to enable boot sector protection When Enabled AMI BIOS displays a warning when any program or virus issues a Disk Format command or attempts to write to the boot sector of the hard disk drive The options are Enabled and Disabled 4 16 Chapter 4 BIOS 4 6 Exit Menu Select the Exit tab from AMI BIOS Setup Utility screen to enter the Exit BIOS Setup screen Save Changes and Exit When you have complet
64. sh utility and the BIOS image files Copy these files to a bootable floppy disk insert the disk into drive A and reboot the system At the DOS prompt after rebooting enter the command flash without quotation marks then type in the BIOS file that you want to update with xxxx rom Question What s on the CD that came with my serverboard Answer The supplied compact disc has quite a few drivers and programs that will greatly enhance your system We recommend that you review the CD and install the applications you need Applications on the CD include chipset drivers for Windows and security and audio drivers 3 3 H8DCR 3 H8DCR i User s Manual Question Why can t I turn off the power using the momentary power on off switch Answer The instant power off function is controlled in BIOS by the Power But ton Mode setting When the On Off feature is enabled the serverboard will have instant off capabilities as long as the BIOS has control of the system When the Standby or Suspend feature is enabled or when the BIOS is not in control such as during memory count the first screen that appears when the system is turned on the momentary on off switch must be held for more than four seconds to shut down the system This feature is required to implement the ACPI features on the serverboard Question How do connect the ATA133 cable to my IDE device s Answer The 80 wire 40 pin high density ATA133 IDE cable that came
65. sion Pin Definitions JL1 A Chassis Intrusion header is located Pinf Definition at JL1 Attach the appropriate cable 1 Battery voltage to inform you of a chassis intrusion 2 Intrusion signal 2 12 Power LED Speaker On JD1 pins 1 2 and 3 are for the power LED and pins 4 through 7 are for the speaker See the tables on the right for pin definitions Note The speaker connector pins are for use with an external speaker If you wish to use the onboard speaker you should close pins 6 and 7 with a jumper ATX PS 2 Keyboard and PS 2 Mouse Ports The ATX PS 2 keyboard and the PS 2 mouse ports are located on the backplane The mouse is the green port See the table on the right for pin definitions Overheat LED Connect an LED to the JOH1 header to provide warning of chassis over heating See the table on the right for pin definitions PS SMBUS The PS SMBUS header is for which may be used to monitor the status of the power supply fans and system temperature See the table on the right for pin definitions 2 13 Chapter 2 Installation PWR LED Connector Pin Definitions JD1 Pin Definition 1 Vcc 2 Control 3 Control Speaker Connector Pin Definitions JD1 Pin Definition 4 Red wire 5V 5 No connection 6 Buzzer signal 7 Speaker data PS 2 Keyboard and Mouse Port Pin Definitions Pin Definition 1 Data 2 NC 3 Ground 4 VCC 5 Clo
66. t but with no SAS compo nents connectors or jumpers 1 3 H8DCR 3 H8DCR i User s Manual Figure 1 2 H3DCR 3 H8DCR i Serverboard Layout not drawn to scale Mouse KB 1 H SAS 4 7 VGA LAN2 LAN1 15 1 0000 0 5 8 PAN BIOS Control JWF1 ler CH LAN JPL1 Rage Control XL ler JPL2 AIC 9410W 54 x amp JPG1 2 55 XN 5 ino 25 gx Jar JPC2 ps JPS1 amp DP1 a ZJN Battery 22 5 8 Speaker 154 5 9 5 SAS O3 8132 o 91051 4 5 usm2 5 o JD1 nVidia nForce Pro 2200 JAR J3P JPWF JWOL 2 2 8 o x 4 o E aas E 2 85 lt 2 51515 5
67. te FAT to find the clusters occupied by the AMIBOOT ROM file F3h Next reading the AMIBOOT ROM file cluster by cluster F4h The AMIBOOT ROM file is not the correct size F5h Next disabling internal cache memory FBh Next detecting the type of flash ROM FCh Next erasing the flash ROM FDh Next programming the flash ROM FFh Flash ROM programming was successful Next restarting the system BIOS B 2 Appendix BIOS POST Checkpoint Codes B 3 Uncompressed Initialization Codes The following runtime checkpoint codes are listed in order of execution These codes are uncompressed in F0000h shadow RAM Checkpoint Code Description 03h 05h The NMI is disabled Next checking for a soft reset or a power on condition The BIOS stack has been built Next disabling cache memory 07h 08h Next initializing the CPU and the CPU data area 06h Uncompressing the POST code next The CMOS checksum calculation is done next The CMOS checksum calculation is done Initializing the CMOS status register for date and time next OBh The CMOS status register is initialized Next performing any required initialization before the keyboard BAT command is issued OCh The keyboard controller input buffer is free Next issuing the BAT command to the keyboard controller OEh The keyboard controller BAT command result has been verified Next performing any necessary initialization after the ke
68. tect 29 Ground 30 Read Data 31 Ground 32 Side 1 Select 33 Ground 34 Diskette 2 21 H8DCR 3 H8DCR i User s Manual IDE Connectors IDE Drive Connectors Pin Definitions JIDE 1 JIDE 2 There are no jumpers to config Pin Definition Pin Definition ure the onboard IDE 1 and 2 1 Reset IDE 2 Ground connectors See the table on 3 Host Data 7 4 Host Data 8 the right for pin definitions 5 Host Data 6 6 Host Data 9 7 Host Data 5 8 Host Data 10 9 Host Data 4 10 Host Data 11 11 Host Data 3 12 Host Data 12 13 Host Data 2 14 Host Data 13 15 Host Data 1 16 Host Data 14 Host Data 0 18 Host Data 15 19 Ground 20 Key 21 DRQ3 22 Ground 23 Write 24 Ground 25 Read 26 Ground 27 IOCHRDY 28 BALE 29 DACK3 30 Ground 31 IRQ14 32 10 16 33 Addr1 34 Ground 35 36 Addr2 37 Chip Select 0 38 Chip Select 1 39 Activity 40 Ground 2 22 SATA Ports There are no jumpers to con figure the SATA ports which are designated SATAO through See the table on the right for pin definitions SAS Ports There are two SAS ports one located on the backplane and the other on the serverboard near the floppy connector See the table on the right for pin definitions Note refer to the FAQ section in Chapter 3 for details on en abling SAS 2 23 Chapter 2 Installation SATA Ports Pin Definitions Pin Definition 1 Ground 2 3 TXN 4 Gr
69. terrupt vector initialization is about to begin B 3 H8DCR 3 H8DCR i User s Manual Checkpoint 25h 27h 28h 2Ah 2Eh 2Fh 30h 31h 32h 34h 37h 38h 39h 3Ah 3Bh 40h 42h 43h 44h 45h 46h 47h 48h 49h 4Bh Code Description Interrupt vector initialization is done Clearing the password if the POST DIAG switch is on Any initialization before setting video mode will be done next Initialization before setting the video mode is complete Configuring the mono chrome mode and color mode settings next Bus initialization system static output devices will be done next if present See the last page for additional information Completed post video ROM test processing If the EGA VGA controller is not found performing the display memory read write test next The EGA VGA controller was not found The display memory read write test is about to begin The display memory read write test passed Look for retrace checking next The display memory read write test or retrace checking failed Performing the alter nate display memory read write test next The alternate display memory read write test passed Looking for alternate display retrace checking next Video display checking is over Setting the display mode next The display mode is set Displaying the power on message next Initializing the bus input IPL general devices next if present See the last page of this cha
70. tings will appear PEF Action Global Control Use this setting to determine the type of PEF action Options are Alert Power Down Reset Sysytem Power Cycles OEM Action and Diagnostics Int Alert Startup Delay This setting allows you to Enable or Disable a delay for the alert startup If Enabled the following settings will appear Startup Delay This setting allows you to Enable or Disable a delay for the alert startup If Enabled the following settings will appear Event Message for PEF Action This setting allows you to Enable or Disable events messages for a PEF action CBMC Watch Dog Timer Action Use this to determine how the Watch Dog funtion will act Options are Disabled Reset System Power Down and Power Cycle 4 13 H8DCR 3 H8DCR i User s Manual gt USB Configuration This screen will display the module version and all USB enabled devices USB Controller Support Enable the controller for your USB ports Options are Disabled USB 1 1 only and USB 1 1 USB 2 0 Legacy USB Support Select Enabled to enable the support for USB Legacy Disable Legacy support if there are no USB devices installed in the system The options are Disabled Enabled and Auto USB 2 0 Controller Mode Select the controller mode for your USB ports Options are HiSpeed and FullSpeed HiSpeed 480 Mbps FullSpeed 12 Mbps BIOS EHCI Hand Off Enable or Disable a workaround for OS s without EHCI hand off support 4 14
71. tion If you wish to have the OS on a SATA RAID array you must follow the procedure below and install the driver during the OS installation Building a Driver Diskette You must first build a driver diskette from the Supermicro CD ROM that was included with the system You will have to create this disk on a computer that is already running and with the OS installed Insert the CD into your CD ROM drive and start the system A display as shown in Figure 2 5 will appear Click on the icon labeled Build Driver Diskettes and Manuals and follow the instructions to create a floppy disk with the driver on it Once it s been created remove the floppy and insert the installation CD for the Windows Operating System you wish to install into the CD ROM drive of the new system you are about to configure Enabling SATA RAID in the BIOS Before installing the Windows Operating System you must change some settings in BIOS Boot up the system and hit the Del key to enter the BIOS Setup Utlility After the Setup Utility loads 1 Use the arrow keys to move to the Exit menu Scroll down with the arrow keys to the Load Optimal Defaults setting and press lt Enter gt Select OK to confirm then lt Enter gt to load the default settings 2 24 Chapter 2 Installation 2 Use the arrow keys to move to the Advanced menu then scroll down to IDE Configuration and press the lt Enter gt key Once in the IDE Configuration submenu scroll down t
72. traffic is kept to a minimum and users are not interrupted The serverboard has a 3 pin header JWOL to connect to the 3 pin header on a Network Interface Card NIC that has WOL capability Wake On LAN must be enabled in BIOS Note that Wake On LAN can only be used with an ATX 2 01 or above compliant power supply 1 11 H8DCR 3 H8DCR i User s Manual Wake On Ring Header JWOR1 Wake up events can be triggered by a device such as the external modem ringing when the system is in the SoftOff state Note that external modem ring on can only be used with an ATX 2 01 or above compliant power supply 1 5 Power Supply As with all computer products a stable power source is necessary for proper and reliable operation It is even more important for processors that have high CPU clock rates of 1 GHz and faster The H8DCR 3 H8DCR i accommodates 12V ATX power supplies Although most power supplies generally meet the specifications required by the CPU some are inadequate A 2 amp current supply on a 5V Standby rail is strongly recom mended It is strongly recommended that you use a high quality power supply that meets 12V ATX power supply Specification 1 1 or above Additionally in areas where noisy power transmission is present you may choose to install a line filter to shield the computer from noise It is recommended that you also install a power surge protector to help avoid problems caused by power surges Warning To prevent the
73. uest address of serial port 1 Select Disabled to prevent the serial port from accessing any system resources When this option is set to Disabled the serial port physically becomes unavailable Select 3F8 IRQ4 to allow the serial port to use 3F8 as its I O port address and IRQ 4 for the interrupt address The options are Disabled 3F8 IRQ4 3E8 IRQ4 and 2E8 IRQ3 Serial Port2 Address This option specifies the base I O port address and Interrupt Request address of serial port 2 Select Disabled to prevent the serial port from accessing any system resources When this option is set to Disabled the serial port physically becomes unavailable Select 2F8 IRQ3 to allow the serial port to use 2F8 as its I O port address and IRQ 3 for the interrupt address The options are Disabled 2F8 IRQ3 3E8 IRQ4 and 2E8 IRQ3 Serial Port 2 Mode Tells BIOS which mode to select for serial port 2 The options are Normal IrDA and ASKIR 4 9 H8DCR 3 H8DCR i User s Manual Parallel Port Address This option specifies the I O address used by the parallel port Select Disabled to prevent the parallel port from accessing any system resources When the value of this option is set to Disabled the printer port becomes unavailable Select 378 to allow the parallel port to use 378 as its I O port address The majority of parallel ports on computer systems use and I O Port 378H as the standard setting Select 278 to allow the parallel port to use 2
74. verboard mounting holes with the raised metal standoffs in the tray Insert screws into all the mounting holes in the serverboard that line up with the standoffs Then use a screwdriver to secure the serverboard to the mainboard tray tighten until just snug if too tight you might strip the threads Metal screws provide an electrical contact to the serverboard ground to provide a continuous ground for the system 2 3 Processor and Heatsink Installation Exercise extreme caution when handling and installing the proces sor Always connect the power cord last and always remove it be fore adding removing or changing any hardware components Installing the CPU Backplates Two CPU backplates BKT 0004 are included in the retail box The backplates prevent the CPU area of the serverboard from bending and provide a base for at taching the heatsink retention modules To install begin by peeling off the release paper to expose the adhesive On the underside of the serverboard locate the two holes on either side of the CPU socket Attach the adhesive side of the backplate to the board by inserting the standoffs into the two holes and applying light pressure so that the backplate sticks to the underside of the board Repeat for the second CPU socket See Figure 2 1 2 2 Chapter 2 Installation Installing the Processors 1 Lift the lever on CPU socket 1 until it points straight up 2 Use your thumb and your index fin ger to hold the
75. y 4 sec gt System Health Monitor This opens a submenu that lists the temperature s of the CPU s system tem perature and the voltage levels for CPU1VCore CPU2VCore CPU1DIMMVolt CPU2DIMMVolt 1 2V for Hyper Transport 1 5V 2 5V 3 3V Vcc 3 3VSB 5 12Vin 12V Vcc and battery voltage There is one BIOS setting in this submenu System Fan Monitor This feature allows the user to determine how the system will control the speed of the onboard fans If the option is set to 3 pin server the fan speed is controlled based upon the CPU die temperature When the CPU die temperature is higher the fan speed will be higher as well Select Disable to disable the fan speed control function which allows the onboard fans to continuously run at full speed 12V The options are 1 Disable Full Speed and 2 Server mode FAN1 Speed through FAN5 Speed The speeds of the onboard fans in rpm are displayed here gt IPMI 1 5 Configuration gt View BMC Status Event Log Highlight this and press the Enter key to view the BMC Status Event Log Clear BMC Status Event Log Use this option to clear the BMC Status Event Log 4 12 Chapter 4 BIOS gt Set LAN Configuration gt IP Address Shows the IP address configuration gt MAC Address Shows the MAC address configuration gt Subnet Mask Shows the subnet mask configuration Set PEF Configuration Enable or Disable PEF support If Enabled the following PEF set
76. yboard controller BAT command test OFh The initialization after the keyboard controller BAT command test is done The key board command byte is written next 10h The keyboard controller command byte is written Next issuing the Pin 23 and 24 blocking and unblocking command 11h Next checking if lt End or lt Ins gt keys were pressed during power on Initializing CMOS RAM if the Initialize CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the lt End gt key was pressed Next disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2 The video display has been disabled Port B has been initialized Next initializing the chipset The 8254 timer test will begin next Next programming the flash ROM The memory refresh line is toggling Checking the 15 second on off time next Passing control to the video ROM to perform any required configuration before the video ROM test All necessary processing before passing control to the video ROM is done Look ing for the video ROM next and passing control to it The video ROM has returned control to BIOS POST Performing any required pro cessing after the video ROM had control Reading the 8042 input port and disabling the MEGAKEY Green PC feature next Making the BIOS code segment writable and performing any necessary configura tion before initializing the interrupt vectors The configuration required before interrupt vector initialization has completed In

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