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X7DBN 1.1a.indb

1. 6 Tan OA N an DIMM 48 Bank 2 1 through 4 Ground DIMM 4A Bank 4 5through8 12V DIMM 3B Bank 3 _ DIMM 3A Bank 3 Fan E DIMM 2B Bank 2 A 24 pin ATX PWR DIMM 2A Bank 2 8 pin Processor PWR DIMM 18 Bank 1 A DIMM 1A Bank 1 C 4 pin PWR GLANI 5 CPU Fan3 GLAN2 s 5 X7DBN North Bridge CPUFan2 Slot SIMLP _ Pci JBT1 5 Vek pres PCI Exp x8 SEPC Battery E ll C27 CTRL 28 ale JI 7 F 3 Blows Bridge PCI X 133 100 MHz on E Slot pci x 133 100 MHz Buzzer BIOS MHz a prs Tet SS m 2 SMB 2 4 EKT 2 14 Universal Serial Bus USB There are five USB 2 0 Universal Se rial Bus ports headers on the moth erboard Two of them are Back Panel USB ports USB 0 1 JUSB1 and the other three are Front Panel USB headers USB 2 3 JUSB2 USB 4 JUSB3 See the tables on the right for pin definitions
2. 2 16 e2 4 Pin m E EIE 1 an 24 Pin AX PWR pin Da DIMM 48 Bank 4 Fan 2 DIMM 4A 5 J gt C Fan 3 DIMM 3B Bank 3 cPU1 S DIMM 3A Bank 3 D Fan 4 3 Cis DIMM 2B Bank 2 Fan 5 DIMM 2A Bank 2 O DIMM 1B Bank 1 F Fan 6 DIMM 1A B Fan 7 CPU Fan 1 GLANI 5 em H Fan 8 CPU Fan 2 GLAN2 SUPER X7DBN North Bridge Keylock 51017 SIMLP amp Pci 5 8 Plo xe SEPC NI C27 al El 8 CTRL Ej z 9 2 POS x8 acri Jw South 1915 133 100 MHz ae LAN c Slot PCI X 133 100 MHz Buzzer BIOS le pci MHz ES 6109 r SATA3 SATAS pcom SIVE 2 5 er Chapter 2 Installation ATX PS 2 Keyboard and PS 2 Keyboard and PS 2 Mouse Ports Mouse Definitions The ATX PS 2 keyboard and the PS 2 Pin Definition mouse are located at JKM1 See the 1 Data table on the right for pin definitions 2 NC The mouse port is above the key 3 Ground board port See the table on the right 4 vcc 5 for pin defi
3. To Install Insert module vertically and press down until it snaps into place Pay attention to the alignment notch at the bottom To Remove Use your thumbs to gently push the release tabs near both ends of the module This should release it from the slot DDR2 FBD Slot Release Tab TL Il Release Ta 2 7 SUPER X7DBN User s Manual 2 4 Control Panel Connectors IO Ports The I O ports are color coded in conformance with the PC 99 specification See Figure 2 3 below for the colors and locations of the various ports A Back Panel Connectors IO Ports Lr CI SUPER K 7DBN B Cj eL DH EES sa Back Panel I O Port Locations and Definitions Back Panel Connectors Keyboard Purple PS 2 Mouse Green Back Panel USB Port 0 Back Panel USB Port 1 COM Port 1 Turquoise VGA Port Blue Parallel Port Printer Gigabit LAN 1 Gigabi
4. PCI X 133 100 MHz 33 MHz BIOS Buzzer 0 pcru xg WOR SATA3 SATA5 2 SATA SMB sBal satao SATA2 5 4 ETI 2 31 Compact Flash Card SUPER X7DBN User s Manual Notes 2 32 Chapter 3 Troubleshooting Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures Use the following procedures to troubleshoot your system If you have followed all of the procedures below and still need assistance refer to the Technical Support Procedures and or Returning Merchandise for Service section s in this chapter Note Always disconnect the power cord before adding changing or installing any hardware components Before Power On 1 Make sure no short circuits between the motherboard and chassis 2 Disconnect all ribbon wire cables from the motherboard including those for the keyboard and mouse 3 Remove all add on cards 4 Install one CPU making sure it is fully seated and connect the chassis speaker and the power LED to the motherboard Check all jumper settings as well No Power 1 Make sure no short circuits between the motherboard and the chassis 2 Verify that all jumpers are set to their default positions 3 Check that the 115V 230V switch on the power supply is properly set 4 Turn the p
5. cika sedaka y k 2 21 SMB Power Cor 6C0 a k aka b kak 2 22 a W n da kk n dab kk 2 22 Compact Flash Card PWR 2 23 SGPIO Headers m EE 2 23 2 6 Jumper 5 2 24 Explanation Of Jurmpers 5 5 2 24 GLAN Enable Disable 2 24 CMOS 2 25 Watch k esa 2 25 3rd PWR Supply PWR Fault 2 26 VGA Enable Disable 2 26 Compact Flash Master Slave Enable Disable 2 27 FC Bus to PCI X PCI E 2 27 2 7 Onboard day k k na Va 2 28 e GON W bw Ke de 2 28 Onboard Power LED rre roseo ctor unie dea nagd dea a k 2 28 2 8 Parallel Port Floppy Hard Disk Drive SIMLP IPMI Connections 2 29 Parallel Port Connector kt may nari p n n ri x eC akan bezi 2 29 Floppy eren ere 2 30 IPM m 2 30 SUPER X7DBN User s Manual 2 31 Chapter 3 Troubleshooting 3 1 Troubleshooting Procedures
6. Compact Flash IDE1 ETI 5 4 2 24 Chapter 2 Installation CMOS Clear JBT1 is used to clear CMOS Instead of pins this jumper consists of contact pads to prevent the accidental clearing of CMOS To clear CMOS use a metal object such as a small screwdriver to touch both pads at the same time to short the connection Always remove the AC power cord from the system before clearing CMOS Note For an ATX power supply you must completely shut down the system remove the AC power cord and then short JBT1 to clear CMOS Watch Dog Enable Disable Watch Dog is a system monitor that can reboot the system when a software application hangs Watch Dog Close pins 1 2 to reset the system if an applica Jumper Settings JWD tion hangs Close pins 2 3 to generate a non maskable interrupt signal for the application that Jumper Setting Definition Pins 1 2 Reset hangs See the table on the right for jumper set default tings Watch Dog must also be enabled in the Pins 2 3 NMI BIOS Open Disabled Note When enabled the user needs to write his her own application software in order to dis able the Watch Dog Timer E ad MBPS PSF foin PWE A Clear CMOS Ag B Watch Dog Enable m M 5 DIMM 48 Bank 4 DIMM 4A Bak 4 DIMM 3B Bank 3
7. pcU x8 8 c 5 5 Dus Uspalsatao 5 2 5 4 2 17 SUPER X7DBN User s Manual Wake On Ring The Wake On Ring header is desig nated JWOR1 This function allows your computer to wake up when it re ceives an incoming call to the modem while in the suspend state See the table on the right for pin definitions You must have a Wake On Ring card and cable to use this feature Wake On Ring Pin Definitions Pin Definition 1 Ground 2 Wake up Wake On LAN The Wake On LAN h r is locat e Wake O eader is located SST at JWOL1 on the motherboard See Pin Definitions the table on the right for pin defini Pinf Definition tions You must also have a LAN card 5V Standby with a Wake On LAN connector and 2 Ground cable to use this feature 3 Wake up A WOR Eu JR Ewr n DIMM 4B Bank 4 L1 DIMM 4A Bank 4 8 DIMM 3B Bank 3 CPU1 P DIMM 3A Bank 3 Fan2 DIMM 2B Bank 2 DIMM 2A Bank 2 1 DIMM 18 Bank 1 DIMM 1A Bank 1 G
8. 3 1 Before Power sveeeensiecetensvedeneence 3 1 3 1 No ULM 3 1 Losing the System s Setup Configuration 3 1 Memory J EE 3 2 3 2 Technical Support 3 2 3 3 Frequently Asked Questions 2 3 3 3 4 Returning Merchandise for 3 4 Chapter 4 BIOS a RR 4 1 4 2 Running 4 2 4 3 Main BIOS Setup sil sla kay n aa kanala kd kada kala dala a Eka a 4 2 4 4 Advanced Setup ERR EE Rua MEA 4 7 425 Securty SGP tu eere ore rk e nee 4 24 4 6 Boot 4 25 LT 2d cc 4 26 Appendices Appendix A BIOS POST Codes ener ener ener A 1 Appendix B Installing Software Programs and B 1 vi Chapter 1 Introduction Chapter 1 Introduction 1 1 Overview Checklist Congratulations on purchasing your computer motherboard from an acknowledged leader in the industry Supermicro boards are designed with the utmost attention to detail to provide you with the highest standards in quality
9. PROCESSOR 2 PROCESSOR 1 1057 1333 106771333 FE 828 fee 8 MT S me PA T EBD CHNLO PORT N ae 4 5 5000 EBD CHNL1 N 2 MCH 5 9 PCFEX8N PORT EBD CHNL2 0 n lt 6 7 a m N m a LL 5 FBD CHNL3 lr JIN PORT PORT 1 1 J11 42 3 0 D lt gt lt lt 9 ha i PORT PORT ATA 100 X4 PORT N IDE CONN 9 0 x Mexe Bus EBUS CONN o E 9 5 g PCIEXP X8 N PORT d Wet 6 9 ESB2 773 J11 3 0 Gb S lt g ollo ll 133 x NT o a J vea AN YSA 4PCIS3MMAN ri CONN NV ES 1000 USB 2 0 m N 3 lt x DDR amp KUMERAN LZ 50 RSL GB LAN W83627 RA N GILGAL RJ45 Me 2 PARALLEL a MS COM1 PORT KB Block Diagram of the 5000P Chipset Note This is a general block diagram Please see the previous Motherboard Features pages for details on the features of each motherboard 1 8 Chapter 1 Introduction 1 2 Chipset Overview Built upon the functionality and the capability of the 5000P Chipset the X7DBN motherboard provides the performance and feature set required for dual processor based servers with configuration options optimized for communications presenta tion storage computation or data
10. Pa PCI E pes A ve gt CTRL m A A 8 57 NE SGPIO1S GPIO2 Floppy Compact Flash JWD Er x4 a South Bridge PCI X 133 100 MHz cine CTRL O Slot PCI X 133 100 MHz Buzzer BIOS 33 MHz pcU 5 5 5 EH pcom 5 0584 5 5 2 5 4 2 27 SUPER X7DBN User s Manual 2 7 Onboard Indicators Rear View When viewing from the rear side of system GLAN LEDs Link Activity There are two GLAN ports on the moth LED LED erboard Each Gigabit Ethernet LAN port has two LEDs The Amber LED indicates GLAN Activity Indicator activity while the power LED may be Color Status Definition green amber or off to indicate the speed z Amber Flashing Active of the connection See the tables at right for more information GLAN Link Indicator LED Color Definition Off No Connection or 10 Mbps Green 100 Mbps Onboard Power LED There is Onboard Power LED located on the motherboard When this LED is lit the system is on Be sure to turn off the system and unplug the power cord before removing or installing components See
11. ABA reve pswalsatao SATA2 SATA4 vou 2 20 Overheat LED Fan Fail JOH1 The JOH1 header is used to connect an LED to provide warning of chassis overheating This LED will blink to in dicate a fan failure Refer to the table on right for pin definitions SMB A System Management Bus header is located at J18 Connect the appropri ate cable here to utilize SMB on your system Chapter 2 Installation Overheat LED Pin Definitions Pin Definitions Pin Definition 5vDC OH Active OH Fan Fail LED Message Overheat Blinking Fan Fail SMB Header Definition Data Ground Clock No Connection DIMM 4B Bank 4 274 ui 24 Pin PWR 5 DIMM 4A Bank 4 Parrallel GLAN2 SUPER X7DBN DIMM 3B Bank 3 DIMM 3A Bank 3 5 DIMM 2B Bank 2 DIMM 2A Bank 2 boi iL DIMM 1B Bank 1 PI WPI DIMM 1A Bank 1 Slot7 E JPG1 VER x8 SEPC F CTRL 28 xe O0 8 pCLExp x4 a gt M 5 rj m 5 North Bridge CPUFan2 SGPIO1SGPIO2 Floppy Compact Fla
12. 3A Banka 1 im 28 1 DIMM 2 Bank 2 DIMM 1B Bank 1 DIMM 1A Bank 1 1 Ctrl 5 I Parrallel boi JOH CPU2 5 gt GLAN2 SUPER X7DBN North Bridge RS E PG1 781 Tote SEPC VGA i x8 D27 CTRL 8 55 PIO1SGPIO2 IDE1 E28 7 x8 F p x4 Tots PCI X 133 100 MHz LAN 1 1 Jett Slot PCI X 133 100 MHz Buzzer in BIOS 33 MHz 5 5 ETI Ussa s TAo SATA2 SATA4 EKT 2 25 Compact Flash South Bridge pcru xg Ww SUPER X7DBN User s Manual 3rd PWR Supply PWR Fault Detect J3P The system can notify you in the event of a power supply failure This feature avail able when three power supply units are installed in the chassis with one acting as a backup If you only have one or two power supply units installed you should disable this the default setting with J3P to prevent false alarms VGA Enable Disable JPG1 allows you to enable or disable the VGA port The default position is on pins 3r
13. 7 PCI Exp x8 v JWD JCF1 JWE 1I e OU PCI Exp 4 a South Tots Bridge PCI X 133 100 MHz LAN JE CTRL JP E PCI X 133 100 MHz Buzzer Ter BIOS 33 MHz eos 5 5 m Ussa s TAo SATA2 SATA4 EKT 2 29 0 pcru xg WOR SUPER X7DBN User s Manual Floppy Connector Floppy Drive Connector Pin Definitions Floppy The floppy connector is located next Pin Definition Pin Definition to the compact flash card slot See the 1 Ground 2 FDHDIN table below for pin definitions 3 Ground 4 Reserved 5 Key 6 FDEDIN T Ground 8 Index 9 Ground 10 Motor Enable 11 Ground 12 Drive Select B 13 Ground 14 Drive Select B 15 Ground 16 Motor Enable di Ground 18 DIR 19 Ground 20 STEP 21 Ground 22 Write Data SIMLP IPMI Slot 23 Ground 24 Write Gate There is a SIM Low Profile 0 27 G d 28 Write Protect IPMI Slot on the motherboard 29 Ground 30 Read Data Refer to the layout below for 31 Ground 32 Side 1 Select the IPMI Slot location 33 Ground 34 Diskette Fang an 24 Pin ATX PWR PSF DIMM 48 Bank 4 B SIMLP IPMI DIMM 4A Bank 4 5 DIMM 3B Bank 3 ae DIMM 3A
14. DIMM 2A Bank 2 a DIMM 1B Bank 1 DIMM 1A B Bank 1 EL o CPU2 Fan3 Nal P 8 5 UPER X7DBN North Bridge CPUFan2 Slot7 SIMLP 5 J811 d VG SEPC E EIS ils ED CTRL mu 28 a esl BIG x8 x8 r3 wo Q po pCLExp South Bridge PCI X 133 100 MHz LAN CTRL JP t2 PCI X 133 100 MHz Buzzer BIOS Blot PCI 33 MHz peru 2 5 RII SMB pssa sarao 5 2 5 4 Wai 2 19 WOR SUPER X7DBN User s Manual Power Fault PWR Supply Failure PWR Supply Fail LED Pin Definitions Connect a cable from your power Definition supply to the Power Fail PSF header 5 to provide a warning of power supply Fal failure This warning signal is passed REN PWR 3 Fail through the PWR_LED pin to indicate of a power failure on the chassis See the table the right for pin Note This feature is only available when using definitions Supermicro redundant power supplies Alarm Reset If three power supplies are installed and Alarm Reset JAR is enabled the Alarm Reset system will notify you when any of the three power modules fails Connect JAR
15. Set Default Password Disabled Supervisor Default Password Disabled Fi tL SAE F9 Esc e gt Enter F18 Supervisor Password Is This item indicates if a supervisor password has been entered to the system Clear means such a password has not been used and Set means a supervisor password has been entered for the system User Password Is This item indicates if a user password has been entered to the system Clear means such a password has not been used and Set means a user password has been entered for the system Set Supervisor Password When the item Set Supervisor Password is highlighted press the lt Enter gt key When prompted enter the Supervisor s password in the dialogue box to set or to change supervisor s password which allows access to the BIOS Set User Password When the item Set User Password is highlighted press the lt Enter gt key When prompted enter the user s password in the dialogue box to set or to change the user s password which allows access to the system at boot up 4 24 Chapter 4 BIOS Password on Boot This setting allows you to decide if a password is required for a user to enter the system at boot up The options are Enabled password required and Disabled password not required 4 6 Boot Settings Choose Boot from the Phoenix BIOS Setup Utility main menu with the arrow keys You should see the following display See details on how to change the order and specs of boot
16. The Power Button connection is located Bawer Butoh on pins 1 and 2 of JF1 Momentarily con Pin Definitions JF1 tacting both pins will power on off the sys Pin Definition tem This button can also be configured to function as a suspend button with a setting in the BIOS see Chapter 4 To turn off the power when set to suspend mode press the button for at least 4 seconds Refer to the table on the right for pin definitions Signal 3V Standby A Reset Button B PWR Button m FandE an Sin T 24 PinATx pwr Em pin PWR Groun NMI Mouse Fan DIMM 48 Bank 4 cA Seon DIMM 4A Bank 4 xX xX DIMM 3B Bank 3 DIMM 3A Bank 3 Fan2 es DIMM 28 Bank 2 LED DIMM 2A Bank 2 q EE 18 Rank 1i fg HDD LED Vec VGA DIMM Bank 1 5 NIC1 LED ani GLAN2 SUPER X7DB North Bridge 2 LED 51017 SIMLP a E I 5 8 EIE NUN EGG OH Fan LED E s CTRL E28 i ls TOS pci 8 S H
17. e single floppy disk drive ribbon cable has two connectors to provide for two floppy disk drives The connector with twisted wires always connects to drive A and the connector that does not have twisted wires always connects to drive B Parallel Printer Port Connector Pin Definitions Pin Definition Pin Definition 1 Strobe 2 Auto Feed Parallel Printer Port 3 Data Bit 0 4 Error Connector 5 Data Bit 1 6 Init 7 Data Bit 2 8 SLCT IN The parallel printer port is located 5 TS DIENEN on the IO Back Panel See the table A 11 DataBit4 12 GND on the right for pin definitions 13 DataBit5 GND 15 DataBit6 16 GND 17 DataBit7 18 GND 19 20 21 BUSY 22 Write Data 23 PE 24 Write Gate 25 51 26 NC Mouse E A Parallel Port DIMM 48 Bank 4 DIMM 4A Bank 4 DIMM 3B Bank 3 DIMM 3A Bank 3 1 Ctd 5 I DIMM 2B Bank 2 DIMM 2 Bank 2 DIMM 1B Bank 1 DIMM 1A Bank 1 Parrallel Port boi Pal GLAN1 CPU2 5 gt GLAN2 lt Fan8 X7DBN North Bridge Slot a or i PGi JBT1 5 3 1016 a PCLExp x8 SEPC Battery a alls ll VGA allel z C7 s CTRL 128
18. DIMM 48 Bank 4 SGPIO1 C omma Gank 4j DIMM 3B Bank 3 C DIMM 1 bmm 38 Bank 2 DIMM 2 Bank 2 DIMM 18 Bank 1 DIMM 1A Bank 1 1 FP Ctrl SGPIO2 5 I Parrallel boi P CPU2 5 gt GLAN2 SUPERO X7DBN Nardi EPI jemi Tote GA i PCLExp x8 SEPC E27 CTRL 28 7 PCI Exp x8 F p x4 Tots Bridge PCI X 133 100 MHz LAN JE CTRL JP Compact Flash IDE1 PCI X 133 100 MHz Buzzer Todi BIOS 33 MHz 5 5 ETI Ussa sATAo SATA2 SATA4 00 0 pcru xg WOR 2 23 SUPER X7DBN User s Manual 2 6 Jumper Settings Explanation of Jumpers To modify the operation of the motherboard jumpers can be used to choose between optional settings Jumpers create shorts between two pins to change the function of the connector Pin 1 is identified with a square solder pad on the printed circuit board See the motherboard layout pages for jumper locations Note On two pin jumpers Closed means the jumper is on and Open means the jumper is off the pins GLAN Enable Disable JPL1 JP
19. OH Fan Fail LED Pin Definitions JF1 Pin Definition i Vcc OH Fan Fail Indicator Status State Definition Off Normal On Overheat Flash Fan Fail ing PWR Fail LED Pin Definitions JF 1 Pin Definition 5 Vcc Ground FandFans 4i F Fan PSF pwn a pin Groun NMI Mouse Fan DIMM 48 Bank 4 CA 3205 DIMM 4A Bank 4 x x Ea DIMM 3B Bank 3 DIMM Bank 3 Fan2 V cc 3 E Power LED 2 DIMM 2A Bank 2 da DIMM 18 Bank 1 fg HDD LED DIMM 1A Bank 1 5 NIC1 LED Vcc cruz ai m SUPERO X7DBN North Bridge ms NIC2 LED Vcc 51017 SIMLP g T i Fail LED Em CTRL 7528 7 TOS pci 8 ri zi PWR Fail LED Vec AEE South 8 PCIX 133 100 MHz Bridge Ground TAN emu 51012 PCI X 133 100 MHz Buzzer G round Bios loti PCI 33 MHz Fan peru x8 5 5 Scone e usualarani WO Reset gt Reset Button PWR 7 Power Button Chapter 2 Installation Reset Button The Reset Button connection is located Reset Button on pins 3 and 4 of JF1 Attach it to the Pin Definitions JF1 hardware reset switch on the computer Pin Definition case Refer to the table on the right for Reset pin definitions Power Button
20. Bank 1 E m Quo Vec 5 bi 4 Nica LED orth Bridge n SUPERO X7DBN North Bridg Q LED Vcc Slot 8 E 1 5 Tote vek E t OH Fan Fail LED Vec ES ale WS pC rExp X8 5 we E M PWR Fail LED Vcc PCFExp South Tot Bridge ca Loo Pee 193 100 Ground Reset Reset Button em gH Q 57012 PCIX 133 100 MHz Buzzer ma Ground PWR gt Power Button Tot pci MHz Fan IR peru x GATES r Sow _ SATAZISATA WOU SUPER X7DBN User s Manual Overheat Fan Fail LED OH Connect an LED to the OH Fan Fail connection on pins 7 and 8 of JF1 to provide advanced warning of chassis overheating or fan failure Refer to the table on the right for pin defini tions Power Fail LED The Power Fail LED connection is located on pins 5 and 6 of JF1 Re fer to the table on the right for pin definitions OH Fan Fail LED B PWR Supply Fail
21. Bank 3 Fan2 t DIMM 2B Bank 2 ES DIMM 2A Bank 2 DIMM 1B Bank 1 E poem 5 IPMI 1016 VGA Fe PCI Exp x8 SEPC E CTRL T mE x8 4 South A Bridge PCI X 133 100 MHz LAN CTRL DIMM 1A Bank 1 LET GLAN1 5 GLAN2 Lj SUPER X708N X7DBN North Bridge CPUFan2 D 8 D 5 E SGPIO1SGPIO2 Floppy Compact Flash WB JCF1 Slot PCI X 133 100 MHz Buzzer Todi BIOS 33 MHz Blot cru 5 5 ETI sme 5 5 WOU 2 30 WOR IDE Connectors There are two IDE Connectors JIDE1 Chapter 2 Installation IDE Drive Connectors Pin Definitions Pin Definition Pin Definition Blue JIDE2 White on the mother Reset IDE 2 board The blue IDE connector JIDE1 3 Host Data 7 4 Host Data 8 is designated as the Primary IDE Drive 5 HostData6 6 Data 9 The white IDE connector JIDE2 is des 7 Host Data 5 8 Host Data 10 ignated as the Secondary IDE Drive 9 Host Data 4 10 Host Data 11 reserved for Compact Flash Card use 11 Host Data 3 12 Host Data 12 only
22. Chassis Intrusion M 5 1 FP Ctrl M 201 S Py Fani CPUFan2 SGPIO1SGPIO2 Floppy IDE Compact Flash Jwril Buzzer Blot SATA3 ISATAS 2 amp 2 SATA2 ISATA4 SUPER X7DBN User s Manual Fan Headers The X7DBN has eight chassis system fan headers Fan1 to Fan8 and two CPU Fans Fans 7 8 Note all these fans are 4 pin fans However Pins 1 3 of the fan headers are backward compatible with the traditional 3 pin fans See the table on the right for pin defini tions The onboard fan speeds are controlled by Thermal Management via BIOS Hardware Monitor in the Advanced Setting Note Default Disabled When using Thermal Management setting please use all 3 pin fans or all 4 pin fans on the motherboard Keylock The keyboard lock connection is designated JK1 Utilizing this header allows you to inhibit any actions made on the keyboard effectively locking it E Fan Header Pin Definitions Fan1 8 Pin Definition Ground 12V Tachometer PWR Modulation Keylock Pin Definitions Pin Definition 1 Ground Keylock R N
23. E T snp PWR Fail LED FIO x4 Reed Ground Reset Reset Button PCIX 133 100 MHz emu Q 5702 pix 133 100 MHz Buzzer Ground PWR gt Power Button Bios loti pci MHz Fan To E J uszalaran SATAZ SATAN OU SUPER X7DBN User s Manual ATX Power 20 pin Connector 2 5 Connecting Cables Pin Definitions Pin Definition Pin Definition ATX Power Connector B 1 3 3V There are a 24 pin main power sup ply connector JPW1 and 8 m E n CPU PWR connector JPW3 on the em motherboard These power m m tors meet the SSI EPS 12V specifica tion The 4 pin 12V PWR supply is le com COM required to provide adequate power 20 Res NG 8 to the system See the table on the 202000 9 5VSB right for pin definitions For the 8 pin 22 5V 10 12 PWR JPW3 please refer to the item 23 EV 11 12V listed below 24 12 3 3V Required Connection Processor Power Connector 12V 4 pin Power Con In addition to the Primary ATX power nector Pin Definitions connector above the 12V 8 pin CPU Pins Definition PWR connector at JPW3 must also danda ERN be connected to your power supply 3and4 442V See the table on the right for pin en Required Connection definitions 12V 8 pin Power CPU Connector Pin Definitions A B
24. Ground NMI x Vcc Vcc Vcc Vcc Vcc Vcc Reset gt Reset Button PWR gt Power Button Chapter 2 Installation HDD LED The HDD LED connection is located on pins 13 and 14 of JF1 Attach the hard drive LED cable here to display disk activity for any hard drives on the system including SAS Serial ATA and IDE See the table on the right for pin definitions HDD LED Pin Definitions JF1 Pin Definition 13 5V HD Active NIC1 NIC2 LED Indicators The NIC Network Interface Control UFO ler LED connection for GLAN port1 is located on pins 11 and 12 of JF1 and Pin Definition vec the LED connection for GLAN Port2 0112 Ground is on Pins 9 and 10 Attach the NIC LED cables to display network activity Refer to the table on the right for pin definitions Te EandF ana oa pin atx PWR pin LUN Bien DIMM 4B Bank 4 CA NMI nan DIMM 4A Bank 4 Ez DIMM 38 Bank 3 X DIMM 3A Bank 3 Fan2 t DIMM 28 Bank 2 Power LED Vcc gt DIMM 2A Bank 2 84 DIMM 18
25. This section lists Beep Codes for recoverable POST errors Recoverable POST Error Beep Codes When a recoverable type of error occurs during POST BIOS will display a POST code that describes the problem BIOS may also issue one of the following beep codes 1 long and two short beeps video configuration error 1 repetitive long beep no memory detected 1 continuous beep with the front panel OH LED on system overheat A 1 SUPER X7DBN User s Manual Notes Appendix B Installing Other Software Programs and Drivers Appendix B Installing Other Software Programs and Drivers B 1 Installing Software and Drivers After you ve installed the Windows Operating System a screen as shown below will appear You are ready to install software programs and drivers that have not yet been installed To install these software programs and drivers click the icons to the right of these items Note To install the Windows OS please refer to the Windows OS Installation Guide posted at http www supermicro com support manuals SUPERMICRO X7DBN Motherboard Drivers amp Tools Win2000 Intel Blackford chipset INF files SUPERMICR Drivers amp Tools Microsoft DirectX 3 0 ATI Graphics driver Intel 5000P Chipset Intel Matrix Storage Manager Intel PRO Network Connections Drivers SUPERMICRO Supero Doctor Build driver diskettes and manuals Browse CD Auto Start Up
26. cedence over the BIOS settings When first installed Supero Doctor adopts the temperature threshold settings previously set in the BIOS Any subsequent changes to these thresholds must be made within Supero Doctor since the SD III settings override the BIOS settings For the Windows OS to adopt the BIOS temperature threshold settings please change the settings to be the same as those set in the BIOS Supero Doctor Ill Interface Display Health Information jAj HI THE Super Remote Manag System Info Health Info Health Information CPUl Chassis 2 Chassis B 2 Appendix B Installing Other Software Programs and Drivers Supero Doctor Ill Interface Display Remote Control Remote System Info Health Info Performance Remote Control Configuration Administration Sy sterns Managernent Report Help Remote Control Graceful power control Supero Doctor III allows a user to inform the OS to reboot or shut down within a specified time the default is 30 seconds Before the system reboots or shuts down it s allowed to cancel the action Requirements Keep Supero SD3Service Daemon running at all times on this system Provide TCP IP connectivity P trol ower contro a Note SD Software Revision 1 0 can be downloaded from our Web site at ftp ftp supermicro com utility Supero Doctor 111
27. make sure the person handling it is static protected 2 1 SUPER X7DBN User s Manual 2 2 Processor and Heatsink Fan Installation When handling the processor package avoid placing direct pressure on the label area of the fan Notes 1 Always connect the power cord last and always remove it before adding removing or changing any hardware components Make sure that you install the processor into the CPU socket before you install the CPU heatsink 2 Intel s boxed Xeon CPU package contains the CPU fan and heatsink assembly If you buy a CPU separately make sure that you use only Intel certified multi di rectional heatsink and fan 3 The Intel Xeon LGA 771 heatsink and fan comes with a push pin design and no tool is needed for installation 4 Make sure to install the motherboard into the chassis before you install the CPU heatsink and fan 5 When purchasing an LGA 771 CPU or when receiving a motherboard with an LGA 771 CPU pre installed make sure that the CPU plastic cap is in place and none of the CPU pins are bent otherwise contact the retailer immediately 6 Refer to the MB Features Section for more details on CPU support Installation of the LGA771 Processor Socket Clip Load Plate 1 Press the socket clip to release the load plate which covers the CPU socket from its locking position 2 Gently lift the socket clip to open the load plate Chapter 2 Installation North Center Edge
28. ACPI Advanced Configuration and Power Interface which includes support of legacy and ACPI power manage ment through an SMI or SCI function pin It also features auto power management to reduce power consumption SUPER X7DBN User s Manual Notes Chapter 2 Installation Chapter 2 Installation 2 1 Static Sensitive Devices Electro Static Discharge ESD can damage electronic components To prevent damage to your system board it is important to handle it very carefully The following measures are generally sufficient to protect your equipment from ESD Precautions Use a grounded wrist strap designed to prevent static discharge Touch a grounded metal object before removing the board from the antistatic bag Handle the board by its edges only do not touch its components peripheral chips memory modules or gold contacts When handling chips or modules avoid touching their pins e Put the motherboard and peripherals back into their antistatic bags when not in use For grounding purposes make sure your computer chassis provides excellent conductivity between the power supply the case the mounting fasteners and the motherboard Use only the correct type of onboard CMOS battery as specified by the manu facturer Do not install the onboard battery upside down to avoid possible explo sion Unpacking The motherboard is shipped in antistatic packaging to avoid static damage When unpacking the board
29. BIOS Version This feature displays the current BIOS version number BIOS Date The item displays the date that the BIOS was built Legacy Diskette A This setting allows the user to set the type of floppy disk drive installed as diskette A The options are Disabled 360Kb 5 25 in 1 2MB 5 25 in 720Kb 3 5 in 1 44 1 25MB 3 5 in and 2 88MB 3 5 in 4 3 SUPER X7DBN User s Manual IDE Channel 0 Master Slave IDE Channel 1 Master Slave SATA Port2 SATA Port3 These settings allow the user to set the parameters of slots specified Press lt Enter gt to activate the following submenu items Set the correct configurations accordingly jain Item Specific Help CHS Format Cylinders User you enter parameters of hard disk drive installed at this Cylinders connection Heads C 11 puro Penis hee ard disk drive installed here Sectors CD ROM a CD ROM drive is installed here Sectors ATAPI Removable removable disk drive is Maximum Capacity installed here Maximum Capacity LBA Format Total Sectors Maximum Capacity Multi Sector Transfers Disabled LBA Mode Control Disabled 32 Bit 1 0 Disabled Transfer Mode Standard Ultra DMA Mode Disabled Fi 9 Esc lt gt Enter F18 Type This option allows the user to select the type of IDE hard drive Select Auto to allow BIOS to automatically configure the hard drive s settings Enter a number from 1 to 39 to selec
30. Basic Input Output System used in all IBM PC XT AT and PS 2 compatible computers The Phoenix BIOS stores the system parameters types of disk drives video displays etc in the CMOS The CMOS memory requires very little electrical power When the computer is turned off a backup battery pro vides power to the CMOS logic enabling it to retain system parameters Each time when the computer is powered on the computer is configured with the values stored in the CMOS logic by the system BIOS which gains control at boot up How To Change the Configuration Data The CMOS information that determines the system parameters may be changed by entering the BIOS Setup utility This Setup utility can be accessed by pressing the Delete key at the appropriate time during system boot See below Starting the Setup Utility Normally the only visible POST Power On Self Test routine is the memory test As the memory is being tested press the Delete key to enter the main menu of the BIOS Setup utility From the main menu you can access the other setup screens such as the Security and Power menus Beginning with Section 4 3 detailed de scriptions are given for each parameter setting in the Setup utility Warning Do not shut down or reset the system while updating BIOS to prevent possible boot failure 4 1 SUPER X7DBN User s Manual 4 2 Running Setup Default settings are in bold text unless otherwise noted The BIOS se
31. Chassis Intrusion A Chassis Intrusion header is located at JL1 on the motherboard Attach the appropriate cable from the chassis to inform you of a chassis intrusion when the chassis is opened Parrallel Chapter 2 Installation Back Panel USB USB 0 1 Pin Definitions 1 5V PO PO Ground a amp N N A Front Panel USB Pin Definitions USB 2 4 Pin Definition USB 3 Pin Definition 1 2 PO 3 PO 4 Ground Ground 5 No connection Chassis Intrusion Pin Definitions JL1 Pin Definition 1 Intrusion Input Ground A Backpanel USB 0 1 KB Mouse Fandfrans PUR i 24 Pin ATX PWR Fan MBPS PSF CPUFan1 DIMM 4B Bank 4 SB0 1 A DIMM 4A Bank 4 DIMM 3B Bank 3 DIMM 3A Bank 3 DIMM 2B Bank 2 Port DIMM 2A Bank 2 DIMM 1B Bank 1 DIMM 1A Bank 1 GLAN2 VGA GLANT SUPER X7DBN 51017 SIMLP IPMI North Bridge Blote SEPC PCLExp x8 C127 c 28 POD x8 VGA CTRL PCI Exp x8 CPU2 ima x4 ot x4 Plots PCI X 133 100 MHz CR JPLI EJ CTRL JPL Slot PCI X 133 100 MHz Piet pci MHz BIOS C Front Panel USB 4 D
32. ESCD area The options are Yes and No 4 10 Chapter 4 BIOS Frequency for 2 3 for PCI X 1 On Riser Frequency for PCI X 2 3 On Riser This option allows the user to change the bus frequency for the devices installed in the slot indicated The options are Auto PCI 33 MHz PCI 66 MHz PCI X 66 MHz PCI X 100 MHz and PCI X 133 MHz SlotO PCI U x8 Slot 1 PCI 33 MHz Slot 2 PCI X 133MHz Slot 3 PCI X 133MHz Slot 4 PCI Exp x4 Slot 5 PCI Exp x8 and Slot 6 PCI Exp x8 Access the submenu for each of the settings above to make changes to the following Option ROM Scan When enabled this setting will initialize the device expansion ROM The options are Enabled and Disabled Enable Master This setting allows you to enable the selected device as the PCI bus master The options are Enabled and Disabled Latency Timer This setting allows you to set the clock rate for Bus Master A high priority high throughout device may benefit from a greater clock rate The options are Default 0020h 0040h 0060h 0080h 00 0 00COh and OOEOh For Unix Novelle and other Operating Systems please select the option other If a drive fails after the installation of a new software you might want to change this setting and try again A different OS requires a different Bus Master clock rate Large Disk Access Mode his feature is available for systems with a hard drive disk capacity larger tha
33. JF1 Refer to the table on the right for pin definitions A NMI B PWR LED pin PWR Tin Fera zm li SENAN PWR asp vers esr DIMM 4B Bank 4 DIMM 4A Bank 4 i Cire DIMM 3B Bank 3 DIMM 3A Bank 3 DIMM 28 Bank 2 DIMM 2A Bank 2 a qo DIMM 18 Bank 1 DIMM 1A Bank cR Bank 1 cpu2 ori GLAN2 m SUPER X7DBN North Bridge 51017 a 2 PGI JBT1 5 8 Tote 27 8 CTRL l EL TOS PCLExp cnp weit OU pCLExp x4 South Bridge PCI X 133 100 MHz g om JPL1 57012 PCIX 133 100 MHz Buzzer i Bios I pc MHz Fan peru x8 5 5 SE SME mabao 5 OU NMI Button Pin Definitions JF1 19 Control Ground Pin Definition Pin Definitions JF1 Power LED Pin Definition 15 5 Groun X LED HDD LED NIC1 LED NIC2 LED OH Fan Fail LED PWR Fail LED Ground
34. Next Time Driver Tool Installation Display Screen Note 1 Click the icons showing a hand writing on the paper to view the readme files for each item Click a computer icon to the right of an item to install an item from top to the bottom one at atime After installing each item you must re boot the system before proceeding with the next item on the list The bottom icon with a CD on it allows you to view the entire contents of the CD Note 2 When making a storage driver diskette by booting into a Driver CD please set the SATA Configuration to Compatible Mode and configure SATA as IDE in the BIOS Setup After making the driver diskette be sure to change the SATA settings back to your original settings B 1 SUPER X7DBN User s Manual B 2 Configuring Supero Doctor Ill The Supero Doctor program 1 Web base management tool that supports remote management capability It includes Remote and Local Management tools The local management is called the SD Client The Supero Doctor program included on the CDROM that came with your motherboard allows you to monitor the environment and operations of your system Supero Doctor Ill displays crucial system information such as CPU temperature system voltages and fan status See the Figure below for a display of the Supero Doctor III interface Note 1 The default user name and password are ADMIN Note 2 In the Windows OS environment the Supero Doctor settings take pre
35. PG1 jam 5 5 Tot VGK PCI Exp 8 serc ala C7 a 8 g 2 fr PCI Exp x8 E si JCF JWE TI e OU PCLExp x4 South Bridge PCI X 133 100 MHz LAN JPL cr je EJ Slot PCI X 133 100 MHz Buzzer Tor BIOS 33 MHz 2 22 Definition Clock Data PWR Fail Ground 3 3V A PWR SMB B VGA SATA1 05845 Chapter 2 Installation Compact Flash Card PWR Connector Compact Flash Card PWR Connector A Compact Flash Card Power Connector is located at JWF1 For the Compact Flash Card to work properly you will need to connect the Compact Off Flash Card power cable to JWF 1 first and then enable the Compact Flash Connector by closing JCF 1 Refer to the board layout below for the location Jumper Definition On Compact Flash Power On Compact Flash Power Off SGPIO Headers SGPIO There are two SGPIO Serial General Purpose Input Output headers J29 Pin Definition Pin Definition J30 located on the motherboard These 2 NC headers supportseriallinkinterfacesfor 3 Ground Data the onboard SATAand SAS connectors 5 Load Ground See the table on the right for pin definitions Refer to the board layout below for the location Note NC No Connections im uen KUZ ja A Compact Flash PWR
36. See the note below See the 13 Host Data 2 14 Host Data 13 table on the right for pin definitions 15 Host Data 1 16 Data 14 17 Host Data 0 18 Host Data 15 Note JIDE2 the white slot is re 19 Ground 20 Key served for Compact Flash Card only Do gt ane not use it for other devices If JIDE2 is m vente num populated with a Compact Flash Card PENES JIDE1 the blue slot will be available for um 2 BALE one device only For the Compact Flash 59 DACK3 30 em Card to work properly you will need to 3 IRQ14 32 1 0 516 connect power cable to JWF1 first 33 Addr 34 Ground 35 36 Addr2 37 Chip Select 0 38 Chip Select 1 39 Activity 40 Ground 24 Pin ATX PWR ZXZN A IDE 1 DIMM 48 Bank 4 DIMM 4A Bank 4 Parrallel GLAN2 North Bridge Slot7 SIMLP IPMI E PG1 JBT1 5 a ek pes PCI Exp x8 SEPC Battery 5 E27 a 8 CTRL 2728 a S E f B x8 F JWD JCF1 JWF1 9 4 a South 1013 PCI X 133 100 MHz LAN j JPL JPL Slot DIMM 3B Bank 3 DIMM 3A Bank 3 DIMM 2B Bank 2 DIMM 2 Bank 2 DIMM 1B Bank 1 DIMM 1A Bank 1 SUPER X7DBN 3
37. activates when the power is turned on It continues to operate when the system enters Standby mode When in sleep mode the CPU will not run at full power thereby generating less heat System Resource Alert This feature is available when used with Supero Doctor III in the Windows OS environment or used with Supero Doctor II in Linux Supero Doctor is used to notify the user of certain system events For example you can also configure Supero Doctor to provide you with warnings when the system temperature CPU temperatures voltages and fan speeds go beyond a pre defined range 1 10 Chapter 1 Introduction 1 5 ACPI Features ACPI stands for Advanced Configuration and Power Interface The ACPI specifica tion defines a flexible and abstract hardware interface that provides a standard way to integrate power management features throughout a PC system including its hardware operating system and application software This enables the system to automatically turn on and off peripherals such as CD ROMs network cards hard disk drives and printers This also includes consumer devices connected to the PC such as VCRs TVs telephones and stereos In addition to enabling operating system directed power management ACPI provides a generic system event mechanism for Plug and Play and an operating system independent interface for configuration control ACPI leverages the Plug and Play BIOS data structures while providing a processor architecture i
38. and receive written permission from Super Micro Computer Inc you may not copy any part of this document Information in this document is subject to change without notice Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders Copyright 2009 by Super Micro Computer Inc All rights reserved Printed in the United States of America Preface Preface Introduction This manual is written for system integrators PC technicians and knowledgeable PC users It provides information for the installation and use of the SUPERO X7DBN motherboard SUPER X7DBN supports dual Intel Xeon 64 bit Quad Core Dual Core processors at a front side bus speed of 1333 1066 667 MHz With dual Xeon 64 bit Quad Core Dual Core processors the 5000P Chipset and eight DDR2 FBD 667 533 memory modules built in the X7DBN enhances the performance of the motherboards based on the Core microarchitecture while remaining compatible with the 32 bit based software Key features supported in clude Virtualization Technology Execution Trace Cache Enhanced Intel SpeedStep technology Advanced Transfer Cache Streaming SIMD Extensions 3 SSE3 and Extended Memory 64 Technology EM64T These features allow the motherboard to operate at much higher speeds with better power management in safer environ ments than the traditional motherboards The X7DBN is ideal for high performance dual proce
39. cap properly installed will cause is properly lt damage to the socket pins installed 2 3 SUPER X7DBN User s Manual Installing the Heatsink CEK Heatsink Installation CEK Passive Heatsink 1 Do not apply any thermal grease to the heatsink or the CPU die the required amount has already been applied 2 Place the heatsink on top of the CPU so that the four mounting holes are aligned with those on the retention mechanism Screw 1 Screw 2 3 Screw in two diagonal screws ie the 1 and the 2 screws until just snug do not fully tighten the screws to avoid pos sible damage to the CPU Screw 1 4 Finish the installation by fully tightening all four screws ho Z Screw 2 To Un install the Heatsink Warning We do not recommend N that the CPU or the heatsink be re moved However if you do need to uninstall the heatsink please follow the instructions below to uninstall the heatsink to prevent damage done to the CPU or the CPU socket Chapter 2 Installation 1 Unscrew and remove the heatsink screws NOT SCREW 0 4 SCREW from the motherboard in the sequence as show in the picture on the right
40. the layout below for the LED location i oe GLAN LEDs m M 5 DIMM 48 Bank 4 DMM 4 Bank 4 DIMM 3B Bank 3 T im Bank 1 im 28 zi 1 DIMM 2A Bank 2 DIMM 1B Bank 1 DIMM 1A Bank 1 B GLAN Port2 LEDs C Onboard PWR LED 1 FP Ctrl M 5 I boi JOH CPU2 5 UPER 7 North Bridge ma pev PGi Tote Wek i PCLExp x8 SEPC Battery L27 CTRL 22728 fr PCI Exp x8 4 South Bridge PCI X 133 100 MHz LAN JPLT cr je EJ o Slot PCI X 133 100 MHz Buzzer wa BIOS 33 MHz 5 5 ETI sme Ussa s TAo SATA2 SATA4 gr 2 28 JBT1 SGPIO1SGPIO2 Floppy IDE1 Compact Flash Wa JCF1 JWF1 E Blot pci u xg WOR Chapter 2 Installation 2 8 Parallel Port Floppy Drive SIMLP IPMI and Hard Disk Drive Connections Note the following when connecting the floppy and hard disk drive cables The floppy disk drive cable has seven twisted wires Ared mark on a wire typically designates the location of pin 1
41. to a micro switch to enable you to turn off the alarm that is activated when a power module fails See the table on the right for pin definitions Pin Setting Definition Pin 1 Ground Pin 2 5V 3 Fsngkans 24 Pin ATX PWR Eini cPUFant VER DIMM 4B Bank 4 DIMM 4A Bank 4 pin PW A Power Fault E 5 Alarm Reset Ctrl DIMM 3B Bank 3 JF1 DIMM 3A Bank 3 m 5 2 DIMM 2B Bank 2 DIMM 2A Bank 2 Parrallel J D1 DIMM 1B Bank 1 P DIMM 1A Bank 1 GLAN1 JOH CPU2 5 n GLAN2 an8 SUPER X7DBN North Bridge Slot SIMLP a 9 m 2 r pc Exp SEPC Battery r ll VGA 0227 CTRL Ez ale F r x8 OTS pckExp x8 E r3 JwriL 1 014 pCLExp South Bridge PCI X 133 100 MHz LAN L o Slot pci x 133 100 MHz Buzzer BIOS le MHz ad BTot0
42. 00P Memory Control Hub and the Enterprise South Bridge 2 ESB2 Expansion Slots Three PCI Express slots two slots at x8 one slot x4 slots Two 64 bit PCI X slots two PCI X 133 100 MHz slots One 32 bit PCI slot one PCI 32 bit 33 MHz slot One PCI U slot BIOS 8 Mb Phoenix Flash ROM DMI 2 3 PCI 2 2 ACPI 1 0 2 0 Plug and Play PnP USB Keyboard support SMBIOS 2 3 PC Health Monitoring e Onboard voltage monitors for CPU cores chipset voltage 3 3V 5V 12V 12V 3 3V standby 5V standby and VBATT Fan status monitor with firmware control e CPU chassis temperature monitors Platform Environment Control Interface PECI ready fan auto off in sleep mode CPU slow down on temperature overheat CPU thermal trip support for processor protection power LED Power up mode control for recovery from AC power loss e Auto switching voltage regulator for CPU cores System overheat Fan Fail LED Indicator and control Chassis intrusion detection System resource alert via Supero Doctor 1 6 Chapter 1 Introduction ACPI Features Slow blinking LED for suspend state indicator Main switch override mechanism ACPI ACPM Power Management Keyboard Wakeup from Soft off Onboard Six SATA ports w support of RAID 0 1 10 and 5 One SIMLP IPMI socket Intel 82563 EB Ethernet controller supporting two Giga bit LAN ports Two EIDE Ultra DMA 100 bus master in
43. 3 Use your thumb and your index finger to hold the CPU at the north center edge and the south center edge of the CPU 4 Align CPU Pin1 the corner marked with a triangle against the socket cor ner marked with a triangle cutout South Center Edge 5 Align the CPU key that is the gold dot semi circle cutout below a gold dot against the socket key the notch on the same side of the triangle cutout on the socket Socket Key Socket Notch CPU Key semi circle cutout 6 Once aligned carefully lower the below the circle CPU straight down to the socket Do not drop the CPU on the socket or move the CPU horizontally or verti Corner with cally Do not rub the CPU against triangle cutout CPU Pin1 the surface or any pins of the socket to avoid damaging the CPU or the socket 7 With the CPU inside the socket inspect the four corners of the CPU to ensure that the CPU is properly installed 8 Use your thumb to gently push the socket clip down to the clip lock 9 If the CPU is properly installed into the socket the plastic cap will be automatically released from the load plate when the clip is pushed in the clip lock Remove the plastic cap from the motherboard AX Warning Please save the plastic Plastic cap cap The motherboard must be is released shipped with the plastic cap properly from the installed to protect the CPU socket load plate pins Shipment without the plastic if the CPU
44. 886 2 8228 1366 ext 132 or 139 Chapter 1 Introduction SUPER X7DBN Image eee E iai 00007099 Pee 20090 CRO E Note The drawings and pictures shown in this manual were based on the latest PCB Revision available at the time of publishing of the manual The motherboard you ve received may or may not look exactly the same as the graphics shown in the manual 1 3 SUPER X7DBN User s Manual SUPER X7DBN Motherboard Layout not drawn to scale d j 4 Pin 4 ATXPW s JPW HAR nm v 5 DIMM 4B Bank 4 DIMM 4A Bank 4 DIMM 3B Bank 3 JE1 cui DIMM 3A Bank 3 DIMM 2B Bank 2 DIMM 2A Bank 2 n v Ia Parrallel Port B3 1 A 5 Fan3 C DIMM 1B Bank DIMM 1A Bank 1 2 5 A SUPER X7DBN Slot SIMLP IPMI s 1 16 SEPC VGA PCI Exp x8 as S884 Battery 1 27 CTRL 128 BIo PCI Exp x 2 PO PCLExp x4 0 Blo J16 SGPIO1SGPIO2 CompactF lash NI a j PCI X 133 100 MHz Buzzer lot pci MHz J1 ot x8 J6 Notes 1 Jumpers not indicated are for test purposes only 2 See Chapter 2 for detailed information on jumpers I O ports and JF1 front panel connections 3 a indicates the location of Pin 1 4 PCI X slots can support up to 133 MHz when only
45. A 2 Hold the heatsink as shown the picture on the right and gently wriggle the heatsink to loosen it from the CPU Do not use excessive force when wriggling the heatsink NO 3 SCREW NO 2 SCREW 3 Once the CPU is loosened remove the heatsink from the CPU socket 4 Clean the surface of the CPU and the heatsink to get rid of the old thermal grease Reapply the proper amount of thermal grease on the surface before you re install the CPU and the heatsink Mounting the Motherboard in the Chassis All motherboards have standard mounting holes to fit different types of chas sis Make sure that the locations of all the mounting holes for both motherboard and chassis match Make sure that the metal standoffs click in or are screwed in tightly Then use a screwdriver to secure the motherboard onto the motherboard tray Note some components are very close to the mounting holes Please take precautionary measures to prevent damage done to these components when you install the motherboard to the chassis 2 5 SUPER X7DBN User s Manual 2 3 Installing DIMMs Note Check the Supermicro web site for recommended memory modules CAUTION Exercise extreme care when installing or removing DIMM modules to prevent any possible damage Also note that the memory is interleaved to improve performance see step 1 DIMM Installation 1 Insert the desired number of DIMMs into the memory slots starting with DIMM 1
46. A The memory scheme is interleaving so you must install two modules at a time beginning with DIMM then DIMM 2A and so on See the Memory Installation Table Below 2 Insert each DIMM module vertically into its slot Pay attention to the notch along the bottom of the module to prevent inserting the DIMM module incorrectly 3 Gently press down on the DIMM module until it snaps into place in the slot Repeat for all modules see step 1 above Memory Support The X7DBN supports up to 32 GB fully buffered FBD ECC DDR2 533 667 in 8 DIMMs Populating DIMM modules with pairs of memory modules of the same size and same type will result in Interleaved Memory which will increase memory performance Note 1 Due to OS limitations some operating systems may not show more than 4 GB of memory Optimized DIMM Population Configurations 0 Branch1 Number of Bank 1 Bank 2 Bank 3 Bank 4 DIMMs Channel 0 Channel 1 Channel 2 Channel 3 2 DIMMs 1 2A 4 DIMMs 1 1 2 4A 6 DIMMs 1A 1B 2A 2B 4 8 DIMMs 1A 1B 2A 2B 3A 3B 4A 4B Notes i DIMM slot specified DIMM slot to be populated DIMM slot not to be populated ii Both FBD 533 MHz and 667MHz DIMMs are supported however you need to use the memory modules of the same speed and of the same type ona motherboard iii Interleaved memory is s
47. C3 and C4 4 15 SUPER X7DBN User s Manual gt Device Configuration Access the submenu to make changes to the following settings KBC Clock Input This feature allows you to select clock frequency for the keyboard controller The options 6 2 8MHz 12 2 and 16 2 Serial Port A This feature allows you to decide how Serial Port A is managed in the system The options are Enabled user defined Disabled and Auto BIOS or OS controlled Base I O Address This feature allows you to select the base I O address for Serial Port A The options are 3F8 2F8 3E8 and 2E8 Interrupt This feature allows you to select the IRQ interrupt request for Serial Port A The options are IRQ3 and IRQ4 Serial Port B This feature allows you to decide how Serial Port B is managed in the system The options are Enabled user defined Disabled Auto BIOS controlled and OS Controlled Mode This feature allows you to set the type of device that will be connected to Serial Port B The options are Normal and IR for an infrared device Base I O Address This feature allows you to select the base I O address for Serial Port B The options are 3F8 2F8 3E8 and 2E8 Interrupt This feature allows you to select the IRQ interrupt request for Serial Port B The options are IRQ3 and IRQ4 Parallel Port This feature allows you to decide how Parallel Port is managed in the system The options are Enabled
48. L2 enable or disable the GLAN Port1 GLAN Port2 on the moth erboard See the table on the right for jumper settings The default setting is enabled mu Pin Definition 1 2 Enabled default Connector 2 4 Jumper Cap 3 2 1 Setting Pin 1 2 short GLAN Enable Disabled A GLAN Port1 Enable 4 Pin j 24 Pln PWR PSF CPUFan1 TARI DIMM 48 Bank 4 DIMM 4 4 Parrallel GLAN1 DIMM 1A Bank 1 CPU2 SUPER X7DBN North Bridge GLAN2 DIMM 3B Bank 3 DIMM 3A Bank 3 DIMM 2B Bank 2 bon PWR DIMM 2 Bank 2 DIMM 1B Bank 1 51017 SIMLP IPMI 4 Tots Bridge PGi 1016 ek i PCLExp x8 SEPC E27 CTRL 128 x8 SGPIO1SGPIO2 Wa JCF1 JWF1 3 100 MHz LAN CTRL South PC 33 100 MHz 33 MHz BIOS Buzzer Blot pcru xg SATA3 SATA5 SATA1 058 4 5 SATA2 B GLAN Port2 Enable m M 5 5 I boi dL P1 JOH 5 8 55
49. LANI 5 CPU2 sed GLAN2 SUPER X7DB N North Bridge CPUFan2 Slot7 IPMI 1811 3 VER SEPC 1 ale 1888 CTRL E 28 5 a ug South b PCI X 133 100 MHZ Bridge LAN Slot PCI X 133 100 MHz Buzzer lo MHz 22 Eu ee e 5 SATAQ 2 4 EK 2 18 Chapter 2 Installation GLAN 1 2 Giga bit Ethernet Ports Two G bit Ethernet ports desig nated JLAN1 and JLAN2 on the IO backplane This port accepts RJ45 type cables GLAN1 GLAN2 Power LED Speaker On the JD1 header pins 1 3 are for a power LED and pins 4 7 are for the speaker See the table on the right Pin Setting Definition for speaker pin definitions Note The speaker connector pins are for use with an external speaker If you wish to use the onboard speaker you should close pins 6 7 with a jumper Pins 6 7 Internal Speaker External Speaker B PWR LED Speaker Fandpand 24 Pin ATX PWR 5 pia PWR Fant DIMM 4B Bank 4 DIMM 4A Bank 4 5 DIMM 3B Bank 3 ac DIMM 3A Bank 3 Fan a m DIMM 2B Bank 2
50. Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered You can obtain service by calling your vendor for a Returned Merchandise Authorization RMA number You can also request a RMA authorization online http www supermicro com support rma When return ing to the manufacturer the RMA number should be prominently displayed on the outside of the shipping carton and mailed prepaid or hand carried Shipping and handling charges will be applied for all orders that must be mailed when service is complete This warranty only covers normal consumer use and does not cover damages in curred in shipping or from failure due to the alternation misuse abuse or improper maintenance of products During the warranty period contact your distributor first for any product problems 3 4 Chapter 4 BIOS Chapter 4 BIOS 4 1 Introduction This chapter describes the Phoenix BIOS Setup utility for the X7DBN The Phoe nix ROM BIOS is stored in a flash chip and can be easily upgraded using a floppy disk based program Note Due to periodic changes to the BIOS some settings may have been added or deleted and might not yet be recorded in this manual Please refer to the Manual Download area of the Supermicro web site lt http Awww supermicro com gt for any changes to the BIOS that may not be reflected in this manual System BIOS The BIOS is the
51. SCSI slot The options are PXE and iSCSI Default Primary Video Adapter Use this feature to select the default primary video adaptor for the system The options are Other and Onboard Video Emulated IRQ Solution All PCI E devices are required to support MSI Message Signaled Interrupt however some legacy operating systems do not support MSI When this feature is set to Enabled a PCI E device will generate a device specific address and interrupt vector number stored in the device s MSI and data registers which will be initialized by BIOS before a non MSl aware OS boots up in order to enhance system performance The options are Enabled and Disabled PCI Exp I O Performance Some add on cards perform faster with the coalesce feature which limits the payload size to 128 Bytes while others with a payload size of 256 Bytes which inhibits the coalesce feature Please refer to your add on card user guide for the desired setting The options are Payload 256 Bytes and Coalesce 128 Bytes PCI Parity Error Forwarding The feature allows SERR and PERR errors detected in PCI slots to be sent forwarded to the BIOS DMI Event Log for the user to review The options are Enabled and Disabled ROM Scan Ordering This feature allows the user to decide which Option ROM to be activated first The options are Onboard first and Add On first Reset Configuration Data If set to Yes this setting clears the Extended System Configuration Data
52. SUPERO SUPERO X7DBN USER S MANUAL Revision 1 1a The information in this User s Manual has been carefully reviewed and is believed to be accurate The vendor assumes no responsibility for any inaccuracies that may be contained in this document makes no commitment to update or to keep current the information in this manual or to notify any person or organization of the updates Please Note For the most up to date version of this manual please see our web site at www supermicro com Super Micro Computer Inc Supermicro reserves the right to make changes to the product described in this manual at any time and without notice This product including software if any and documentation may not in whole or in part be copied photocopied reproduced translated or reduced to any medium or machine without prior written consent IN NO EVENT WILL SUPER MICRO COMPUTER INC BE LIABLE FOR DIRECT INDIRECT SPECIAL INCIDENTAL SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN PARTICULAR SUPER MICRO COMPUTER SHALL NOT HAVE LIABILITY FOR ANY HARDWARE SOFTWARE OR DATA STORED OR USED WITH THE PRODUCT INCLUDING THE COSTS OF REPAIRING REPLACING INTEGRATING INSTALLING OR RECOVERING SUCH HARDWARE SOFTWARE OR DATA Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the St
53. You can also download 0111 User s Guide at http www supermicro com PRODUCT Manuals SDIII UserGuide pdf For Linux we will still recommend that you use Supero Doctor 11 SUPER X7DBN User s Manual Notes Disclaimer continued The products sold by Supermicro are not intended for and will not be used in life support systems medical equipment nuclear facilities or systems aircraft aircraft devices aircraft emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic property damage Accordingly Supermicro disclaims any and all liability and should buyer use or sell such products for use in such ultra hazardous applications it does so entirely at its own risk Furthermore buyer agrees to fully indemnify defend and hold Supermicro harmless for and against any and all claims demands actions litigation and proceedings of any kind arising out of or related to such ultra hazardous use or sale
54. a in two branches Single Channel 0 allows a single DIMM population The options are Interleaved Sequential Mirroring and Single Channel 0 Branch 0 Rank Sparing Branch 1 Rank Sparing Select Enable to enable memory sparing support for Branch 0 or Branch 1 options are Enabled and Disabled Branch 0 Rank Interleaving Branch 1 Rank Interleaving This feature allows the user to configure Interleaved Memory settings for Branch 0 Rank or Branch 1 Rank The options are 1 1 2 1 and 4 1 Enhanced x8 Detection Select Enabled to enable Enhanced x8 DRAM UC Error Detection The options are Disabled and Enabled High Bandwidth FSB Select Enabled to enable high bandwidth Front Side Bus FSB The options are Enabled and Disabled 4 12 Chapter 4 BIOS High Temperature DRAM Operation When set to Enabled the BIOS will refer to the SPD table to set the maximum DRAM temperature If disabled the BIOS will set the maximum DRAM temperature based on a predefined value The options are Enabled and Disabled AMB Thermal Sensor Select Enabled to enable the thermal sensor embedded in the Advanced Memory Buffer on a fully buffered memory module for thermal monitoring The options are Disabled and Enabled Thermal Throttle Select Enabled to enable the function of closed loop thermal throttling on the fully buffered FBD memory modules In the closed loop thermal environment thermal throttling will be activated when the temperatu
55. and performance Check that the following items have all been included with your motherboard If anything listed here is damaged or missing contact your retailer All the following items are included in the retail box One 1 Supermicro Mainboard One 1 ribbon cable for IDE devices CBL 0036L 02 One 1 Serial Port cable CBL 010L 01 One 1 USB cable CBL 0083L One 1 floppy ribbon cable CBL 0022L Six 6 SATA cables CBL 0044L One 1 I O backpanel shield CSE PTO7L One 1 Supermicro CD containing drivers and utilities One 1 User s BIOS Manual 1 1 SUPER X7DBN User s Manual Contacting Supermicro Headquarters Address Super Micro Computer Inc 980 Rock Ave San Jose CA 95131 U S A Tel 1 408 503 8000 Fax 1 408 503 8008 Email marketing supermicro com General Information support supermicro com Technical Support Web Site www supermicro com Europe Address Super Micro Computer B V Het Sterrenbeeld 28 5215 ML s Hertogenbosch The Netherlands Tel 31 0 73 6400390 Fax 31 0 73 6416525 Email sales supermicro nl General Information support supermicro nl Technical Support rma supermicro nl Customer Support Asia Pacific Address Super Micro Inc No 232 1 Liancheng Road Chung Ho 235 Taipei Hsien Taiwan R O C Tel 886 2 8226 3990 Fax 886 2 8226 3991 Web Site www supermicro com tw Technical Support Email support supermicro com tw Tel
56. ate See the Power Lost Control setting in the Advanced BIOS Setup section Default Last State 1 4 Health Monitoring This section describes the PC health monitoring features of the X7DBN All have an onboard System Hardware Monitor chip that supports PC health monitoring CPU cores chipset voltage 3 3V 5V 12V 12 3 3V standby 5V standby and VBATT An onboard voltage monitor will scan these voltages continuously Once a voltage becomes unstable a warning is given or an error message is sent to the screen Users can adjust the voltage thresholds to define the sensitivity of the voltage monitor Fan Status Monitor with Firmware Control The PC health monitor can check the RPM status of the cooling fans The onboard CPU and chassis fans are controlled by Thermal Management via BIOS under Hardware Monitoring in the Advanced Setting Environmental Temperature Control The thermal control sensor monitors the CPU temperature in real time and will turn on the thermal control fan whenever the CPU temperature exceeds a user defined threshold The overheat circuitry runs independently from the CPU Once it detects that the CPU temperature is too high it will automatically turn on the thermal fan control to prevent any overheat damage to the CPU The onboard chassis thermal circuitry can monitor the overall system temperature and alert users when the chas sis temperature is too high CPU Fan Auto Off in Sleep Mode The CPU fan
57. ate of California USA The State of California County of Santa Clara shall be the exclusive venue for the resolution of any such disputes Supermicro s total liability for all claims will not exceed the price paid for the hardware product FCC Statement This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the manufacturer s instruction manual may cause harmful interference with radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case you will be required to correct the interference at your own expense California Best Management Practices Regulations for Perchlorate Materials This Perchlorate warning applies only to products containing CR Manganese Dioxide Lithium coin cells Perchlorate Material special handling may apply See www dtsc ca gov hazardouswaste perchlorate WARNING Handling of lead solder materials used in this product may expose you to lead a chemical known to the State of California to cause birth defects and other reproductive harm Revision Number 1 1a Release Date Oct 14 2009 Unless you request
58. base applications The 5000P Chipset supports single or dual Xeon 64 bit Quad Core Dual Core processor s with front side bus speeds of up to 1 333 GHz The 5000P Chipset consists of the 5000P Memory Controller Hub MCH and the Enterprise South Bridge 2 ESB2 The 5000P MCH chip is designed for symmetric multiprocessing across two inde pendent front side bus interfaces Each front side bus uses a 64 bit wide 1333 MHz data bus that transfers data at 10 7 GB sec In addition the 5000P chipset offers a wide range of RAS features including memory interface ECC x4 x8 Single Device Data Correction CRC parity protection memory mirroring and memory sparing The Xeon Quad Core Dual Core Processor Features Designed to be used with conjunction of the 5000P chipset the Xeon Quad Core Dual Core Processor provides a feature set as follows The Xeon 5000P Chipset Core Dual Core Processors L1 Cache Size Instruction Cache 32KB 16KB Data Cache 32KB 24KB L2 Cache Size 4MB 2MB per core Data Bus Transfer Rate 8 5 GB s Package FC LGA6 FC LGA4 771 Lands 1 9 SUPER X7DBN User s Manual 1 3 Special Features Recovery from AC Power Loss BIOS provides a setting for you to determine how the system will respond when AC power is lost and then restored to the system You can choose for the system to remain powered off in which case you must hit the power switch to turn it back on or for it to automatically return to a power on st
59. d PWR Supply PWR Fault Jumper Settings Jumper Setting Definition Closed Enabled Open Disabled Default SCSI Enable Disable Jumper Settings JPA1 Both Jumpers Definition 1 and 2 to enable VGA See the table on BEN ES the right for jumper settings Pins 2 3 Disabled Ez 1 A 3rd PWR Fail wl zernan mn DO Ig B VGA Enabled DIMM 48 Bank 4 DIMM 4A Bank 4 Parrallel GLAN1 GLAN2 SUPERO X7DBN DIMM 3B Bank 3 DIMM 3A Bank 3 DIMM 2B Bank 2 DIMM 2 Bank 2 DIMM 1B Bank 1 DIMM 1A Bank 1 North Bridge VGA CTRL 4 Slot SIMLP 2 ot xg 727 Ej z Er PCI Exp x8 SEPC 1013 PCI X 133 100 MHz LA N RL PCI X 133 100 MHz 33 MHz Blot pcru xg WOR CPU2 1 FP Ctrl 5 I boi dL P1 JOH 5 Fang CPUFan2 IDE1 SGPIO1SGPIO2 Floppy Compact Flash South Bridge Wa JCF1 BIOS Buzzer SATA3 SATA5 2 SATA1 05845 SATA2 5 4 E 2 26 Chapt
60. d voltages of various components LAN Configuration The following features allow the user to configure and monitor IPMI LAN settings ULAN Tagying VLAN Tagging Select Enabled to enable Virtual LAN s for IPMI connections and allow the user to configure VLAN settings The options are Enabled and Disabled VLAN ID If VLAN Tagging above is set to Enabled this item allows the user to change the VLAN ID If VLAN Tagging is disabled this item will be ignored by the firmware IP Address Source This item allows the user to select the IP address source for the connection The options are DHCP and Static IP Address This item displays the IP address for the IPMI connection detected IP Subnet Mask This item displays the IP Subnet Mask for the IPMI connection detected Default Gateway This item displays the Default Gateway for the IPMI connection detected 4 22 Chapter 4 BIOS MAC Address This item displays the MAC Address for the IPMI connection detected Update LAN Settings Select Yes to allow BIOS update LAN setting The options are Yes and No 4 23 SUPER X7DBN User s Manual 4 5 Security Settings Choose Security from the Phoenix BIOS Setup Utility main menu with the arrow keys You should see the following display All Security BIOS settings are described in this section Main Advanced Security Boot Exit Item Specific Help User Password Is Set Supervisor Password Set User Password
61. data to be cached into the buffer and written into the system memory at the same time Select Write Protect to prevent data from being written into the extended memory area above 1 MB Select Write Back to allow the CPU to write data back directly from the buffer without writing data to the System Memory for fast CPU data processing and operation The options are Uncached Write Through Write Protect and Write Back Discrete MTRR Allocation If enabled MTRRs Memory Type Range Registers are configured as distinct separate units and cannot be overlapped If enabled the user can achieve better graphic effects when using a Linux graphic driver that requires the write combining configuration with 4GB or more memory The options are Enabled and Disabled gt PCI Configuration Access the submenu to make changes to the following settings for PCI devices Onboard GLAN1 Onboard GLAN 2 Gigabit LAN OPROM Configure Enabling this option provides the capability to boot from GLAN The options are Disabled and Enabled 4 9 SUPER X7DBN User s Manual 3rd LAN OPROM Configure Available if the 3rd LAN on an IPMI card is detected Select Enable to allow the user to boot from the 3rd LAN on an IPMI card The options are Enabled and Disabled AOC UTG Boot ROM Select Available if Supermicro s UTG Add On Card is installed Select PXE to boot from a device installed in a PCI E slot Select iSCSI to boot from a device installed in an i
62. devices in the Item Specific Help window All Boot BIOS settings are described in this section Main Advanced Security Item Specific Help Legacy Floppy Drives Boot List USB KEY Generic USB Flash Drive R F F Keys used to view or IDE CD configure devices IDE 0 Up and Down arrows TE 2 5 380013 5 50 select a device PED SoCo lt gt and lt gt moves PCI BEV the device up or down D E lt f gt and lt r gt specifies IDE the device fixed or IDE 4 removable Candidate IDE 5 lt x gt exclude or include List USB HDD the device to boot IS USB CDROM lt Shift 1 gt enables or USB ZIP disables a device USB 15120 lt 1 4 gt Loads default Other USB boot sequence F1 Y F9 Esc lt Enter F10 Boot Priority Order Excluded from Boot Orders The devices included in the boot list section above are bootable devices listed in the sequence of boot order as specified The boot functions for the devices included in the candidate list above are currently disabled Use a lt gt key or a lt gt key to move the device up or down Use the lt f gt key or the lt r gt key to specify the type of an USB device either fixed or removable You can select one item from the boot list and hit the lt x gt key to remove it from the list of bootable devices to make its resource available for other bootable devices Subsequently you can select an item from the can
63. didate list and hit the lt x gt key to remove it from the candidate list and put it in the boot list This item will then become a bootable device See details on how to change the priority of boot order of devices in the Item Specific Help window 4 25 SUPER X7DBN User s Manual 4 7 Exit Choose Exit from the Phoenix BIOS Setup Utility main menu with the arrow keys You should see the following display All Exit BIOS settings are described in this section Exit Saving Changes Exit Saving Changes Highlight this item and press lt Enter gt to save any changes you made and to exit the BIOS Setup utility Exit Discarding Changes Highlight this item and press lt Enter gt to exit the BIOS Setup utility without saving any changes you may have made Load Setup Defaults Highlight this item and press lt Enter gt to load the default settings for all items in the BIOS Setup These are the safest settings to use Discard Changes Highlight this item and press lt Enter gt to discard cancel any changes you made You will remain in the Setup utility Save Changes Highlight this item and press lt Enter gt to save any changes you made You will remain in the Setup utility 4 26 Appendix A POST Error Beep Codes Appendix A POST Error Beep Codes This section lists POST Power On Self Test error beep codes for the Phoenix BIOS POST error beep codes are divided into two categories recoverable and terminal
64. e using the format flash bat filename rom from your bootable device or USB pen to flash the BIOS Then your system will automatically reboot If you choose the exe file please run the exe file under Windows to create the BIOS flash floppy disk Insert the floppy disk into the system you wish to flash the BIOS Then bootup the system to the floppy disk The BIOS utility will automatically flash the BIOS without any prompts Please note that this process may take a few minutes to complete Do not be concerned if the screen is paused for a few minutes Warning Do not shut down or reset the system while updating BIOS to prevent possible system boot failure Question What s on the CD that came with my motherboard Answer The supplied compact disc has several drivers and programs that will greatly enhance your system We recommend that you review the CD and install the applications you need Applications on the CD include chipset drivers for the Windows OS security and audio drivers 3 3 X7DBN User s Manual Question How do handle the used battery Answer Please handle used batteries carefully Do not damage the battery in any way a damaged battery may release hazardous materials into the environment Do not discard a used battery in the garbage or a public landfill Please comply with the regulations set up by your local hazardous waste management agency to dispose of your used battery properly 3 4 Returning
65. em if the system is not active for more than 5 minutes The options are Enabled and Disabled Summary Screen This setting allows you to Enable or Disable the summary screen which displays the system configuration during bootup Memory Cache Cache System BIOS Area This setting allows you to designate a reserve area in the system memory to be used as a System BIOS buffer to allow the BIOS to write cache its data into this reserved memory area Select Write Protect to enable this function and this area will be reserved for BIOS ROM access only Select Uncached to disable this function and make this area available for other devices Cache Video BIOS Area This setting allows you to designate a reserve area in the system memory to be used as a Video BIOS buffer to allow the BIOS to write cache its data into this reserved memory area Select Write Protect to enable the function and this area will be reserved for Video BIOS ROM access only Select Uncached to disable this function and make this area available for other devices Cache Base 0 512K If enabled this feature will allow the data stored in the base memory area block 0 512K to be cached written into a buffer a storage area in the Static DROM SDROM or to be written into L1 L2 cache inside the CPU to speed up CPU operations 4 8 Chapter 4 BIOS Select Uncached to disable this function Select Write Through to allow data to be cached into the buffer and wr
66. ependency on other devices The HPET is used to replace the 8254 Programmable Interval Timer The options are Enabled and Disabled 4 13 SUPER X7DBN User s Manual USB Function Select Enabled to enable the function of USB devices specified The settings are Enabled and Disabled Legacy USB Support This setting allows you to enable support for Legacy USB devices The settings are Enabled and Disabled gt Advanced Processor Options Access the submenu to make changes to the following settings CPU Speed This is a display that indicates the speed of the installed processor Frequency Ratio Available when supported by the CPU The feature allows the user to set the internal frequency multiplier for the CPU The options are Default x12 x13 x14 x15 x16 x17 and x18 Note The settings can differ depending on the CPU speed Hyperthreading Available when supported by the CPU Set to Enabled to use the Hyperthreading Technology which will result in increased CPU performance The options are Disabled and Enabled Core Multi Processing Available when supported by the CPU Set to Enabled to use a processor s Second Core and beyond Please refer to Intel s web site for more information The options are Disabled and Enabled Machine Checking Available when supported by the CPU Set to Enabled to activate the function of Machine Checking and allow the CPU to detect and report hardware machine errors via a set
67. er 2 Installation Compact Flash Master Slave Select A Compact Flash Master Primary Slave Secondary Select Jumper is located at JCF1 Close this jumper to enable Compact Flash Card For the Compact Flash Card or the Compact Flash Jumper JCF1 to work properly you will need to connect the Compact Flash Card power cable to JWF1 first Refer to the board layout below for the location 2 Bus to PCI X PCI Exp Slots Compact Flash Card Master Slave Select Jumper Definition Open Slave Secondary Closed Master Primary Jumpers J27 J28 allow you to connect I2C to PCI S PCI Exp Jumper Settings the System Management Bus 12 to PCI X PCI E slots The default setting Jumper Setting Definition UE a Closed Enabled is Open to disable the connection Open Disabled Default See the table on the right for jumper settings EE UN s E LIN A Compact Flash Master an DH J Slave Select DIMM 4A Bank 4 8 DIMM 3B Bank 3 ei g B SMBus to slots a DIMM 3A Bank 3 Fan2 DIMM 2B Bank 2 J27 8 DIMM 2A Bank 2 1 C SMBus to PCI slots DIMM 18 Bank 1 a J28 DIMM 1A Bank 1 LET GLANI 5 2 GLAN2 SUPER X7DBN North Bridge CPUFam Slot SIMLP
68. firmware If this item is set to Disabled the item SATA AHCI Enable will be available The options are Enabled and Disabled ICH RAID Code Base Select Intel to enable Intel s SATARAID firmware Select Adaptec to use Adaptec s HostRAID firmware The options are Intel and Adaptec SATA AHCI Select Enable to enable the function of Serial ATAAdvanced Host Interface Take caution when using this function This feature is for advanced programmers only The options are Enabled and Disabled System Memory This display informs you how much memory is detected in the system Extended Memory This display informs you how much extended memory is detected in the system 4 6 Chapter 4 BIOS 4 4 Advanced Setup ChooseAdvanced from the Phoenix BIOS Setup Utility main menu with the arrow keys You should see the following display The items with a triangle beside them have sub menus that can be accessed by highlighting the item and pressing lt Enter gt Main Advanced Security Boot Exit Item Specific Help gt Memory Cache gt PCI Configuration gt Advanced Chipset Control gt Advanced Processor Options gt 1 0 Device Configuration gt DMI Event Logging gt Console Redirection gt Hardware Monitor gt IPMI Select Boot features ti a F9 Esc e gt Enter F18 gt Boot Features Access the submenu to make changes to the following settings QuickBoot Mode If enabled this feature wi
69. heck for bad DIMM modules or slots by swapping a single module between four slots and checking the results 5 Make sure all memory modules are fully seated in their slots As interleaved memory scheme is used you must install two modules at_a time beginning with Bank 1 then Bank 2 and so on see Section 2 3 6 Check the position of the 115V 230V switch on the power supply 3 2 Technical Support Procedures Before contacting Technical Support please take the following steps Also note that as a motherboard manufacturer Supermicro does not sell directly to end us ers so it is best to first check with your distributor or reseller for troubleshooting services They should know of any possible problem s with the specific system configuration that was sold to you 1 Please go through the Troubleshooting Procedures and Frequently Asked Ques tion FAQ sections in this chapter or see the FAQs on our web site http www supermicro com support faqs before contacting Technical Support 2 BIOS upgrades can be downloaded from our web site at http www supermicro com support bios Note Not all BIOS be flashed depending on the modifications to the boot block code 3 If you still cannot resolve the problem include the following information when contacting Super Micro for technical support Motherboard model PCB revision number BIOS release date version this can be seen on the initial display
70. iii Manual OrganizatlOn iii Conventions Used in the iii Chapter 1 Introduction LOU mp 1 1 edge ETT 1 1 Contacting 1 2 SUPER X7DBN MAJE cci teer naci pe 1 3 SUPER X7DBN 1 4 aea i em 1 5 Motherboard Features decertare inen rire 1 6 Intel 5000P Chipset System Block Diagram 1 8 1 2 Chipset OVOrVIOW A kun nan nan A kanan ka N 1 9 1 5 Special Features Cr v 1 10 Recovery from AC Power Loss 1 10 1 4 Health Monitoring b n ki A S hea e d a y A 1 10 EL Mu eT 1 11 1 6 Power 0 M 1 12 cec Aaa 1 13 Chapter 2 Installation 2 1 Static Sensitive Devices cece teeter eee 2 1 2 1 UNPACKING E EE 2 1 2 2 Processor and Heatsink Installation 2 2 2 9 jnstallirig DIMMS iet ee 2 6 2 4 Control Panel Connectors and lO Ports 2 8 A Back Panel Connectors IO 2 8 B Front Control Panel retener de R zana 2 9 C Front Control Pa
71. itten into the system memory at the same time Select Write Protect to prevent data from being written into the base memory area of Block 0 512K Select Write Back to allow the CPU to write data back directly from the buffer without writing data to the System Memory for fast CPU data processing and operation The options are Uncached Write Through Write Protect and Write Back Cache Base 512K 640K If enabled this feature will allow the data stored in the memory area 512K 640K to be cached written into a buffer a storage area in the Static DROM SDROM or written into L1 L2 L3 cache inside the CPU to speed up CPU operations Select Uncached to disable this function Select Write Through to allow data to be cached into the buffer and written into the system memory at the same time Select Write Protect to prevent data from being written into the base memory area of Block 512K 640K Select Write Back to allow the CPU to write data back directly from the buffer without writing data to the System Memory for fast CPU data processing and operation The options are Uncached Write Through Write Protect and Write Back Cache Extended Memory If enabled this feature will allow the data stored in the extended memory area to be cached written into a buffer a storage area in the Static DROM SDROM or written into L1 L2 L3 cache inside the CPU to speed up CPU operations Select Uncached to disable this function Select Write Through to allow
72. ized Server with 4 pin and 5 Optimized Workstation with 4 pin Voltage Monitoring The following items will be monitored and displayed Vcore A Vcore B 12V P1V5 3 3V 12V 5Vsb 5VDD P VTT Vbat Note In the Windows OS environment the Supero Doctor III settings take prece dence over the BIOS settings When first installed Supero Doctor IIl adopts the temperature threshold settings previously set in the BIOS Any subsequent changes to these thresholds must be made within Supero Doctor since the SD settings override the BIOS settings For the Windows OS to adopt the BIOS temperature threshold settings please change the SDIII settings to be the same as those set in the BIOS 4 19 SUPER X7DBN User s Manual The option is available only when an card is installed in the system System Event Logg ing IPMI Specification Version This item displays the current IPMI Version Firmware Version This item displays the current Firmware Version System Event Logging Select Enabled to enable Event Logging When this function is set to Disabled the system will continue to log events received via system interface The options are Enabled and Disabled Clear System Event Logging Select Enabled to force the BIOS to clear the system event logs during the next cold boot The options are Enabled and Disabled Existing Event Log Number This item displays the number of the existing event log Event Log Cont
73. k IO traffic directly into processor caches to reduce memory latency and improve network performance The options are Disabled and Enabled DCA Delay Clocks Available if supported by the CPU This feature allows the user to set the clock delay setting from snoop to prefetch for Direct Cache Access Select a setting from 8 bus cycles to 120 bus cycles in 8 cycle increment The default setting is 32 bus cycles Intel lt R gt Virtualization Technology Available if supported by the CPU Select Enabled to enable Virtualization Technology support to allow one platform to run multiple operating systems and applications in independent partitions creating multiple virtual systems in one physical computer The options are Enabled and Disabled Note If there is any change to this setting you will need to power off and restart the system for the change to take effect Please refer to Intel s web site for detailed information Intel EIST Support Available if supported by the CPU Select Enabled to use the Enhanced Intel SpeedStep Technology and allow the system to automatically adjust processor voltage and core frequency in an effort to reduce power consumption and heat dissipation The options are Enabled and Disabled Please refer to Intel s web site for detailed information C State package limit setting If set to Auto the AMI BIOS will automatically set the limit on the C State package register The options are C1 C2
74. lel J21 Parallel Printer Port PSF Power Supply Failure See Chapter 2 PWR LED LE1 PWR LED Indicator Note 6 on Page 1 4 PWR LED SPKR JD1 PWR LED pins1 3 SpeakerHeader pins 4 7 PWR SMB J17 Power System Management 2 Header SATAO SATA5 JS1 5 0 5 Connectors SGPIO 1 2 J29 J30 Serial General Purpose Input Output Headers SMB J18 System Management Bus Header Slot 0 J6 PCI U x8 Slot Slot 1 J1 PCI 33 MHz Slot Slot 2 Slot3 J13 J14 PCI X 133 100MHz Note 4 on Page 1 4 Slot 4 Slot 5 J9 J12 PCI Express x4 slot Slot 4 PCI Exp x8 Slot Slot 5 Slot 6 J5 SEPC J11 PCI Express x8 slot SMC Enhanced PWR Connector Slot 7 SIM Low Profile IPMI Slot USB 0 1 USB 2 3 USB4 Back Panel USB 0 1 Front Panel USB 2 3 FP USB4 VGA J15 VGA Connector WOL JWOL1 Wake on LAN Header WOR JWOR1 Wake on Ring Header Note JIDE2 is for Compact Card Use only For Compact Card to work properly please enable JCF1 by putting cap on it and connect JWF1 to a power supply 1 5 SUPER X7DBN User s Manual Motherboard Features CPU Dual Intel 64 bit Xeon LGA 771 Quad Core Dual Core processors at a front side bus speed of 1 333 GHz 1 066 GHz 667 MHz with a system clock speed of 333 267 MHz Memory Eight 240 pin DIMM sockets with support up to 32 GB DDR2 Fully Buffered FBD ECC 667 533 Memory See Section 2 3 in Chapter 2 for DIMM Slot Population Chipset Intel 5000P Chipset including the 50
75. ll speed up the POST Power On Self Test routine by skipping certain tests after the computer is turned on The settings are Enabled and Disabled If Disabled the POST routine will run at normal speed QuietBoot Mode This setting allows you to Enable or Disable the graphic logo screen during boot up POST Errors Select Enabled to temporarily halt system boot and display POST Power On Self Testing error messages when errors occur during bootup Select Disable to continue with system boot even when an error occurs The options are Enabled and Disabled ACPI Mode Use the setting to determine if you want to employ ACPI Advanced Configuration and Power Interface power management on your system The options are Yes and No 4 7 SUPER X7DBN User s Manual Power Button Behavior If set to Instant Off the system will power off immediately as soon as the user hits the power button If set to 4 sec the system will power off when the user presses the power button for 4 seconds or longer The options are instant off and 4 sec override Resume On Modem Ring Select On to wake your system up when an incoming call is received by your modem The options are On and Off Power Loss Control This setting allows you to choose how the system will react when power returns after an unexpected loss of power The options are Stay Off Power On and Last State Watch Dog If enabled this option will automatically reset the syst
76. n is present you may choose to install a line filter to shield the computer from noise It is recommended that you also install a power surge protector to help avoid prob lems caused by power surges 1 7 Super I O The disk drive adapter functions of the Super I O chip include a floppy disk drive controller that is compatible with industry standard 82077 765 a data separator write pre compensation circuitry decode logic data rate selection a clock generator drive interface control logic and interrupt and DMA logic The wide range of functions integrated onto the Super I O greatly reduces the number of components required for interfacing with floppy disk drives The Super I O supports 360 720 1 2 M 1 44 M or 2 88 M disk drives and data transfer rates of 250 Kb s 500 Kb s or 1 Mb s It also provides two high speed 16550 compatible serial communication ports UARTs Each UART includes a 16 byte send receive FIFO a programmable baud rate generator complete modem control capability and a processor interrupt system Both UARTs provide legacy speed with baud rate of up to 115 2 Kbps as well as an advanced speed with baud rates of 250 K 500 K or 1 Mb s which support higher speed modems The Super I O supports one PC compatible printer port SPP Bi directional Printer Port BPP Enhanced Parallel Port EPP or Extended Capabilities Port ECP 1 12 Chapter 1 Introduction The Super I O provides functions that comply with
77. n 137GB If your HDD capacity is larger than 137 GB select DOS for a system based on DOS otherwise select Other for system based on other operating systems The options are DOS or Other for Unix Novelle NetWare and other operating systems 4 11 SUPER X7DBN User s Manual gt Advanced Chipset Control Access the submenu to make changes to the following settings Warning Take Caution when changing the Advanced settings An incorrect setting a very high DRAM frequency or an incorrect DRAM timing may cause the system to become unstable When this occurs reset the setting to the default setting SERR Signal Condition This setting specifies the ECC Error conditions that an SERR is to be asserted The options are None Single Bit Multiple Bit and Both PCI E Link Width Workaround Select Enabled to reset the system which will allow the BIOS to detect the correct PCI E link width for PCI E 2 0 support The options are Enabled and Disabled 4GB PCI Hole Granularity This feature allows you to select the granularity of the PCI hole for PCI slots If MTRRs are not enough this option may be used to reduce MTRR occupation The options are 256 MB 512 MB 1GB and 2GB Memory Branch Mode This feature allows you to decide how memory branches operate System address space can either be interleaved between the two branches or Sequential from one branch to another Mirror mode enhances data security by maintaining two copies of dat
78. ndependent implementation that is compatible with both Windows 2000 and Windows Server 2003 Slow Blinking LED for Suspend State Indicator When the CPU goes into a suspend state the chassis power LED will start blinking to indicate that the CPU is in suspend mode When the user presses any key the CPU will wake up and the LED will automatically stop blinking and remain on Main Switch Override Mechanism When an ATX power supply is used the power button can function as a system suspend button to make the system enter a SoftOff state The monitor will be suspended and the hard drive will spin down Pressing the power button again will cause the whole system to wake up During the SoftOff state the ATX power supply provides power to keep the required circuitry in the system alive In case the system malfunctions and you want to turn off the power just press and hold the power button for 4 seconds This option can be set in the Power section of the BIOS Setup routine External Modem Ring On Wake up events can be triggered by a device such as the external modem ringing when the system is in the SoftOff state Note that external modem ring on can only be used with an ATX 2 01 or above compliant power supply Wake On LAN WOL Wake On LAN is defined as the ability of a management application to remotely power up a computer that is powered off Remote PC setup up dates and asset tracking can occur after hours and on weekends so that dail
79. nel Pin Definitions 2 10 NMI B GELOT aa W A 2 10 Power BED s at nial ana ke ab ye NEIN 2 10 M e 2 11 2 LEDS m 2 11 Overheat Fan Fall LED 1 5 terreno etiem een 2 12 Power Fail LE D 2 12 Table of Contents Reset Button e M 2 13 BUtOM em 2 13 2 5 Connecting Cables ku ked n a N ban aka W d n y 2 14 ATX Power Connector l le evt i i aa aere kh 2 14 Processor Power Connector kk keke kake kek KEKE KAKA KA KAK 2 14 Universal Serial BU 4 s 2 15 Chassis hiruSIOR oo rore 2 15 FAN Headers 2 16 2 16 ATX PS 2 Keyboard and Mouse 2 17 Serial POMS P 2 17 Wake On RING nakan a aa nian aned ya dad de W aa ea k 2 18 Wake On LAN S NEIN NE 2 18 GLAN Ethernet Ports teste Rer banan tana nin c 2 19 Speaker Power LED Header sse 2 19 Power Fault tette bay aa yaya MERE 2 20 Alarm RES Glos Rm 2 20 Overheat EED Fan Fail ka ku banka an dan AWK 2 21
80. nitions Clock NC Serial Port Pin Definitions Serial Ports Cn Pin Definition Pin Definition is a connector located on the 4 6 DSR Backpanel and 2 is a header 2 RD RTS nesl at SOMA nds the table on P mm the right for pin definitions 4 DTR Ri 5 Ground 10 NC Pin 10 is available on COM2 only NC No Connection 4 PSF pi A PWR 24 Pin ATX PWR panew Keyboard Mouse louse an E DIMM 4B Bank 4 Li B COM1 NM DIMM 4A Bank 4 C COM2 DIMM 3B Bank 3 CPU1 DIMM 3A Bank 3 DIMM 2B Bank 2 DIMM 2A Bank 2 DIMM 1B Bank 1 DIMM 1 Bank 1 Parrallel GLAN1 CPU2 GLAN2 TA lt ani SUPER X7DBN North Bridge CPUFan2 Slot SIMLP IPMI 9 PGi JBT1 5 8 a Vek Ple SEPC Battery Balle E27 gl 5 CTRL Erz g S BIOS rana x8 ot PCI Exp x8 fil axxo aa 0 pCLExp x4 South Blots Bridge PCI X 133 100 MHz LAN JP CTRL t2 PCI X 133 100 MHz Buzzer BIOS le pci MHz
81. of model specific registers MSRs The options are Disabled and Enabled C1 Enhanced Mode Available when supported by the CPU Set to Enabled to enable Enhanced Halt State to lower CPU voltage frequency to prevent overheat The options are Enabled and Disabled Execute Disable Bit Available if supported by the CPU Set to Enabled to enable Execute Disable Bit and allow the processor to classify areas in memory where an application code can execute and where it cannot and thus preventing a worm or a virus from inserting and creating a flood of codes to overwhelm the processor or damage the system during an attack Note this feature is available when your OS and your CPU support the function of Execute Disable Bit The options are Disabled and Enabled 4 14 Chapter 4 BIOS Adjacent Cache Line Prefetch Available when supported by the CPU The CPU fetches the cache line for 64 bytes if this option is set to Disabled The CPU fetches both cache lines for 128 bytes as comprised if Enabled The options are Disabled and Enabled Hardware Prefetch Available if supported by the CPU Set to this option to enabled to enable the hardware components that are used in conjunction with software programs to prefetch data in order to shorten execution cycles and maximize data processing efficiency The options are Disabled and Enabled Direct Cache Access Available if supported by the CPU Set to Enable to route inbound networ
82. one PCI X card is installed in either Slot 2 or Slot 3 However when both slots are populated both Slot 2 and Slot 3 can support up to 100MHz 5 SEPC Supermicro Enhanced Power Connector specially designed to support Supermicro 2U Riser Card only 6 When LE1 is on make sure to unplug the power cable before removing or in stalling components Chapter 1 Introduction Quick Reference X7DBN Jumper Description Default Setting J27 428 12 Bus to PCI X PCI E Slots Open Disabled J3P 3rd PWR Failure Detect Off Disabled JBT1 CMOS Clear See Chapter 2 JCF 1 Compact Card Master Slave Select Off Slave JPG1 VGA Enable Pins 1 2 Enabled JPL1 JPL2 GLAN1 GLAN2 Enable Pins 1 2 Enabled JWD Watch Dog Pins 1 2 Reset Connector Description ATX PWR JPW1 Primary 24 Pin ATX PWR Connector Aux PWR CPU PWR 12V 4 pin PWR JWP2 12V 8 PWR JPW3 Alarm Reset JAR Alarm Reset Off Normal Chassis Intrusion JL1 Chassis Intrusion Header COM1 COM2 COM1 JCOM1 COM2 JCOM2 Serial Port Connectors Compact PWR JWF1 Compact Card PWR Connector Used if JCF1 is on DIMM 1A DIMM 4B Memory FBD DDRII Slots FAN 1 8 Fans 1 8 Fans7 8 CPU Fans Fans1 6 Chassis Fans Floppy J22 Floppy Disk Drive Connector FP CTRL JF1 Front Control Panel Connector GLAN 1 2 JLAN1 2 G bit Ethernet Ports 1 2 IDE1 IDE2 Note IDE1 Hard Drive JIDE1 Compact Flash Card JIDE2 Keylock JK1 Keylock Header LED JOH1 Overheat LED Paral
83. onitoring Screen accordingly CPU Temperature Threshold This option allows the user to set a CPU temperature threshold that will activate the alarm system when the CPU temperature reaches this pre set temperature threshold The options are 70 C 75 C 80 C and 85 C See the note below Highlight this and hit lt Enter gt to see the status of each item below CPU1 Temperature CPU1 Second Core CPU2 Temperature CPU2 Second Core PECI Agent 1 Temperature PECI Agent 2 Temperature PECI Agent 3 Temperature PECI Agent 4 Temperature System Temperature 1 8 Speeds If the feature of Auto Fan Control is enabled the BIOS will automatically display the status of the fans indicated in this item Fan Speed Control Modes This feature allows the user to decide how the system controls the speeds of the onboard fans The CPU temperature and the fan speed are correlative When the CPU on die temperature increases the fan speed will also increase and vice versa If set to Server the fan speed will be set to optimize server performance If the option is set to Workstation the fan speed is set to optimize workstation perfor mance Select Quiet for the fans to operate as quiet as possible Select Disable to disable the fan speed control function to allow the onboard fans to constantly run at full speed 12V The Options are 1 Full Speed at 12V 2 Optimized Server with 3 pin 3 Optimized Workstation with 3 pin 4 Optim
84. ower switch on and off to test the system 5 The battery on your motherboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one No Video 1 If the power is on but you have no video remove all the add on cards and cables 2 Use the speaker to determine if any beep codes exist Refer to the Appendix for details on beep codes Losing the System s Setup Configuration 1 Ensure that you are using a high quality power supply A poor quality power supply may cause the system to lose the CMOS setup information Refer to Section 1 6 for details on recommended power supplies 2 The battery on your motherboard may be old Check to verify that it still supplies 3VDC If it does not replace it with a new one 3 If the above steps do not fix the Setup Configuration problem contact your vendor for repairs 3 1 SUPER X7DBN User s Manual NOTE If you are a system integrator VAR or OEM a POST diagnostics card is recommended For I O port 80h codes refer to App Memory Errors 1 Make sure the DIMM modules are properly and fully installed 2 Check if different soeeds of DIMMs have been installed and that the BIOS setup is configured for the fastest speed of RAM used It is recommended to use the same RAM speed for all DIMMs in the system 3 Make sure you are using the correct type of DDR2 Fully Buffered FBD ECC 533 667 SDRAM recommended by the manufacturer 4 C
85. ptions are Standard Fast PIO1 Fast PIO2 Fast PIO3 Fast 4 FPIO3 DMA1 FPIO4 DMA2 Ultra DMA Mode This option allows the user to select Ultra DMA Mode The options are Disabled Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 and Mode 5 Parallel ATA This setting allows the user to enable or disable Parallel ATA The Default setting is Channel 0 Serial ATA This setting allows the user to enable or disable Serial ATA The options are Disabled and Enabled 4 5 SUPER X7DBN User s Manual Native Mode Operation Select Serial ATA to enable SATA support for your HDDs Select Auto to enable Native Mode support for your HDDs The options are Serial ATA and Auto SATA Controller Mode Select Compatible to allow the SATA and PATA drives to be automatically detected and be placed in the Legacy Mode by the BIOS Select Enhanced to allow the SATA and PATA drives to be to be automatically detected and be placed in the Native IDE Mode Note The Enhanced mode is supported by the Windows 2000 OS or a later version The default setting is Enhanced When the SATA Controller Mode is set to Enhanced the following items will display Serial ATA SATA RAID Enable Select Enable to enable Serial ATA RAID support For the Windows OS environment use the RAID driver if this feature is set to Enabled When this item is set to Enabled the item ICH RAID Code Base will be available for you to select Intel or Adaptec Host RAID
86. re of the FBD DIMM device exceeds a predefined threshold The options are Enabled and Disabled Global Activation Throttle Select Enabled to enable the function of open loop global thermal throttling on the fully buffered FBD memory modules and allow global thermal throttling to become active when the number of activate control exceeds a predefined number The options are Enabled and Disabled Crystal Beach Features This feature cooperates with Intel I O AT Acceleration Technology to accelerate the performance of TOE devices Note A TOE device is a specialized dedicated processor that is installed on an add on card or a network card to handle some or all packet processing of this add on card For the X7DBN the TOE device is built inside the ESB 2 South Bridge chip The options are Enabled and Disabled Route Port 80h Cycles to This feature allows the user to decide which bus to send debug information to The options are Disabled and LPC Clock Spectrum Feature If Enabled the BIOS will monitor the level of Electromagnetic Interference caused by the components and will attempt to decrease the interference whenever needed The options are Enabled and Disabled High Performance Event Timer Select Enabled to activate the High Performance Event Timer HPET that produces periodic interrupts at a higher frequency than a Real time Clock RTC in synchroniz ing multimedia streams providing smooth playback and reducing the d
87. rol System Firmware Progress Select Enabled to log POST progress The options are Enabled and Disabled BIOS POST Errors Select Enabled to log POST errors The options are Enabled and Disabled BIOS POST Watch Dog Select Enabled to enable POST Watch Dog The options are Enabled and Disabled 4 20 Chapter 4 BIOS OS Boot Watch Dog Set to Enabled to enable OS Boot Watch Dog The options are Enabled and Disabled Timer for Loading OS Minutes This feature allows the user to set the time value in minutes for the previous item OS Boot Watch Dog by keying in a desired number in the blank The default setting is 10 minutes Please ignore this option when OS Boot Watch Dog is set to Disabled Time Out Option This feature allows the user to determine what action to take in an event of a system boot failure The options are No Action Reset Power Off and Power Cycles gt System Event Log System Event Log List Mode These options display the System Event SEL Log and System Event SEL Log in List Mode Items include SEL System Event Log Entry Number SEL Record ID SEL Record Type Time Stamp Generator ID SEL Message Revision Sensor Type Sensor Number SEL Event Type Event Description and SEL Event Data 04 27 2008 10 51 36 my Enter 4 21 SUPER X7DBN User s Manual gt Realtime Sensor Data This feature display information from motherboard sensors such as temperatures fan speeds an
88. sh PCI X 133 100 MHz TAN 1 CTRL Slot PCI X 133 100 MHz MHz cru 81 4 OH Fan Fail LED B SMB SUPER X7DBN User s Manual Power SMB PC Connector Power SMB I C Connector 717 monitors the status of PWR supply fan and system temperature See the table on the right for pin definitions VGA Connector connector J15 is located next to the COM1 port on the IO backplane Refer to the board layout below for the location PWR SMB Pin Definitions Pin 24 Pin ATX PWR pan furs pin CPUFan pag DIMM 4B Bank 4 DIMM 4A Bank 4 DIMM 3B Bank 3 Blot pcru xg WOR SATA3 SATAS5 2 5 4 M 5 1 FP Ctrl cPU1 DIMM 3A Bank 3 DIMM 2B Bank 2 DIMM 2A Bank 2 5 DIMM 1B Bank 1 e B DIMM 1A Bank 1 Fan3 i La SUPER X7DBN North Bridge Slot a E E
89. ssor DP enterprise server workstation environments This product is intended to be professionally installed Manual Organization Chapter 1 describes the features specifications and performance of the mainboard and provides detailed information about the chipset Chapter 2 provides hardware installation instructions Read this chapter when installing the processor memory modules and other hardware components into the system If you encounter any problems see Chapter 3 which describes troubleshooting procedures for the video the memory and the system setup stored in the CMOS Chapter 4 includes an introduction to BIOS and provides detailed information on running the CMOS Setup utility Appendix A provides BIOS POST Codes Appendix B lists Software Installation instructions Conventions Used in the Manual Special attention should be given to the following symbols for proper installation and to prevent damage done to the components or injury to yourself X Instructions to be strictly followed to prevent catastrophic system failure or to avoid bodily injury Warning Important information given to ensure proper system installation or to prevent damage to the components Note Additional Information given to differentiate various models or to ensure correct system setup SUPERO X7DBN User s Manual Table of Contents Preface ee cee
90. t LAN 2 Section 2 5 for details Chapter 2 Installation B Front Control Panel JF1 contains header pins for various buttons and indicators that are normally lo cated on a control panel at the front of the chassis These connectors are designed specifically for use with Supermicro server chassis See the drawings below for the descriptions of the various control panel buttons and LED indicators Refer to the following section for descriptions and pin definitions JF1 Header Pins Te ez NMI x x i Power LED Vcc SuPER K 7DBN 2 7 O e 8 HDD LED Vcc a E A NIC1 LED Vcc a 9 NIC2 LED n LH Eo a OH Fan Fail LED Vcc PWR Fail LED Vcc Ground Reset gt Reset Button Ground PWR gt Power Button 2 9 SUPER X7DBN User s Manual C Front Control Panel Pin Definitions NMI Button The non maskable interrupt button header is located on pins 19 and 20 of JF1 Refer to the table on the right for pin definitions Power LED The Power LED connection is located on pins 15 and 16 of
91. t a predetermined type of hard drive CDROM and ATAPI Removable Drive Select User to allow the user to specify the parameters of the HDD installed at this connection Select CDROM if a CDROM drive is installed Select ATAPI if a removable disk drive is installed CHS Format The following items will be displayed by the BIOS Type This item displays the type of IDE or SATA drive Cylinders This item indicates the number of Cylinders Headers This item indicates the number of headers Sectors This item displays the number of sectors 4 4 Chapter 4 BIOS Maximum Capacity This item displays the maximum storage capacity of the system LBA Format The feature displays BIOS items in the LBA format Total Sectors This item displays the number of total sectors available in the LBA Format Multi Sector Transfer This item allows the user to specify the number of sectors per block to be used in multi sector transfer The options are Disabled 4 Sectors 8 Sectors and 16 Sectors Maximum Capacity This item displays the maximum capacity in the LBA Format LBA Mode Control This item determines whether the Phoenix BIOS will access the IDE Channel devices via the LBA mode The options are Enabled and Disabled 32 Bit I O This option allows the user to enable or disable the function of 32 bit data transfer The options are Enabled and Disabled Transfer Mode This option allows the user to set the transfer mode The o
92. terfaces supporting one IDE the blue slot and one Compact Flash card the blue slot Two SGPIO Serial General Purpose Input Output headers One floppy port interface Two COM ports 1 header 1 port One EPP ECP Parallel Port PS 2 mouse and PS 2 keyboard ports Up to five USB 2 0 Universal Serial Bus 2 ports 3 Headers ES1000 with 16 MB Graphic Controller Super 1 0 Winbond W83627HG w Hardware Monitor support W83793 HECETA Other External modem ring on Wake on LAN WOL Wake on Ring WOR Console redirection Onboard Fan Speed Control by Thermal Management via BIOS CD Diskette Utilities BIOS flash upgrade utility and device drivers Dimensions 13 00 x 12 00 330 20 x 304 80 mm 1 7 SUPER X7DBN User s Manual
93. tup options described in this section are selected by choosing the appropriate text from the main BIOS Setup screen All displayed text is described in this section although the screen display is often all you need to understand how to set the options see the next page When you first power on the computer the Phoenix BIOS is immediately acti vated While the BIOS is in control the Setup program can be activated in one of two ways 1 pressing Delete immediately after turning the system on or 2 When the message shown below appears briefly at the bottom of the screen during the POST Power On Self Test press the Delete key to activate the main Setup menu Press the Delete key to enter Setup 4 3 Main BIOS Setup All main Setup options are described in this section The main BIOS Setup screen is displayed below Use the Up Down arrow keys to move among the different settings in each menu Use the Left Right arrow keys to change the options for each setting Press the Esc key to exit the CMOS Setup Menu The next section describes in detail how to navigate through the menus Items that use submenus are indicated with the icon With the item highlighted press the Enter key to access the submenu 4 2 Chapter 4 BIOS Main BIOS Setup Menu System Time Main Setup Features System Time This feature displays the system time System Date This feature displays the system date
94. upported when pairs of DIMM modules are installed To optimize memory performance please install pairs of DIMMs in both Branch 0 and Branch 1 iv For memory to work properly you need to follow the restrictions listed above Note 2 Due to memory allocation to system devices memory remaining available for operational use will be reduced when 4 GB of RAM is used The reduction in memory availability is disproportional Refer to the following Memory Availability Table for details 2 6 Chapter 2 Installation Possible System Memory Allocation amp Availability System Device Physical Memory Remaining Available 4 GB Total System Memory Firmware Hub flash memory System 3 99 BIOS Local APIC 3 99 Area Reserved for the chipset 999 I O APIC 4 Kbytes 3 99 PCI Enumeration Area 1 3 76 Express 256 MB 3 51 Enumeration Area 2 if needed 3 01 Aligned on 256 MB boundary VGA Memory 2 85 TSEG 2 84 Memory available to OS and other ap 2 84 plications Installing and Removing DIMMs 4 Notch SuPER K 7DBN I O lias Note Notch ov E f m should align H with the receptive point on the slot LI L1 m
95. user defined Disabled and Auto BIOS or OS controlled Base I O Address This feature allows you to select the base I O address for Parallel Port The options are 378 278 and 3BC 4 16 Chapter 4 BIOS Interrupt This feature allows you to select the IRQ interrupt request for the parallel The options are IRQ5 and IRQ7 Mode This feature allows you to specify the parallel port mode The options are Output only Bi Directional EPP and ECP DMA Channel This item allows you to specify the DMA channel for the parallel port The options are DMA1 and Floppy Disk Controller This feature allows you to decide how Floppy Disk Controller is managed in the system The options are Enabled user defined Disabled and Auto BIOS and OS controlled Base I O Address This feature allows you to select the base I O address for the floppy drive The options are Primary and Secondary gt DMI Event Logging Access the submenu to make changes to the following settings Event Log Validity This is a display to inform you of the event log validity It is not a setting Event Log Capacity This is a display to inform you of the event log capacity It is not a setting View DMI Event Log Highlight this item and press lt Enter gt to view the contents of the event log Event Logging This setting allows you to Enable or Disable event logging ECC Event Logging This setting allows you to Enable or Disable ECC e
96. vent logging Mark DMI Events as Read Highlight this item and press lt Enter gt to mark the DMI events as read Clear All DMI Event Logs Select Yes and press lt Enter gt to clear all DMI event logs The options are Yes and No SUPER X7DBN User s Manual gt Console Redirection Access the submenu to make changes to the following settings COM Port Address This item allows you to specify which COM port to direct the remote console to Onboard COM A or Onboard COM B This setting can also be Disabled BAUD Rate This item allows you to set the BAUD rate for Console Redirection The options are 300 1200 2400 9600 19 2K 38 4K 57 6K and 115 2K Console Type This item allows you to choose the console redirection type The options are VT100 VT100 8bit PC ANSI 7bit PC ANSI VT100 and VT UTF8 Flow Control This item allows you to set the flow control for the console redirection The options are None XON XOFF and CTS RTS Console Connection This item allows you to decide how the console redirection is to be connected either Direct or Via Modem Continue CR after POST This item allows you to decide if you want to continue with console redirection after POST routines The options are On and Off 4 18 Chapter 4 BIOS gt Hardware Monitor Logic Note The Phoenix BIOS will automatically detect the type of CPU s and hardware monitoring chip used on the motherboard and will display the Hardware M
97. when your system first boots up Chapter 3 Troubleshooting System configuration An example of a Technical Support form is on our web site at http www supermicro com support contact cfm 4 Distributors For immediate assistance please have your account number ready when placing a call to our technical support department We can be reached by e mail at support supermicro com or by fax at 408 503 8000 option 2 3 3 Frequently Asked Questions Question What are the various types of memory that my motherboard can support Answer The X7DBN has eight 240 pin DIMM slots that support DDR2 FDB ECC 533 667 SDRAM modules It is strongly recommended that you do not mix memory modules of different speeds and sizes See Chapter 2 for detailed Information Question How do update my BIOS Answer It is recommended that you do not upgrade your BIOS if you are experi encing no problems with your system Updated BIOS files are located on our web site at http www supermicro com support bios Please check our BIOS warning message and the information on how to update your BIOS on our web site Also check the current BIOS revision and make sure that it is newer than your BIOS before downloading Select your motherboard model and download the BIOS file to your computer You can choose from the zip file and the exe file If you choose the zip BIOS file please unzip the BIOS file onto a bootable device or a USB pen Run the batch fil
98. y LAN traffic is kept to a minimum and users are not interrupted The motherboard has a 3 pin header WOL to connect to the 3 pin header on a Network Interface Card NIC that has WOL capability In addition an onboard LAN controller can also support WOL 1 11 SUPER X7DBN User s Manual without any connection to the WOL header The 3 pin WOL header is to be used with a LAN add on card only Note Wake On LAN requires an ATX 2 01 or above compliant power supply 1 6 Power Supply As with all computer products a stable power source is necessary for proper and reliable operation It is even more important for processors that have high CPU clock rates The X7DBN can only accommodate 24 pin ATX power supplies Although most power supplies generally meet the specifications required by the CPU some are inadequate In addition the 12V 4 pin power supply is also required to ensure adequate power supply to the system Also your power supply must supply 1 5A for the Ethernet ports NOTE The 12V 8 pin Aux Power Connector is also required to support Intel 64 bit CPUs Failure to provide this extra power will result in CPU PWR Failure See Section 2 5 for details on connecting the power supply It is strongly recommended that you use a high quality power supply that meets ATX power supply Specification 2 02 or above It must also be SSI compliant info at http www ssiforum org Additionally in areas where noisy power transmissio

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