Agilent Technologies FS2343 Thermometer User Manual
Contents
1. General Purpose Probe Edit E5378A 34 ch Samtec single ended probe Probes rs232 5 DAU FB238_4 Full N NBLink 10 N NBLink1 8 NE y Properties NBLink1 5 NE NBLink1 3 NE NBLink1 4 NE BM Prove NBLink1 7 NE 2 NBLink1 13 N Control NBLink1 11 N 7 NBLink1 12 N Properties NBLink1 2 NE NELinki 9 NE NBLink1 1 NE in NBLink1 20 N NBLink1 16 N 3 NBLink1 18 N NBLinkt 29 N NBLink1 46 N NBLink1 23 N in 47 NBLink1 28 N NEURKTHZ N NBLink1 26 N 55 Store qual NBLInk1 22 N NELink1 19 N pesce NELInId 25 N 8 NBLIni O NE NEL 24 N r NBLINKITITIN NEL SIN E NBLInki 14 N Use Setup gt Bus 5ignal in the main menu to edit Bus 5ignal definitions TES Overview JE Listing E Wavetom For Help press Fl Stal SUIT 14 Configuration File Labels The configuration files provided with the probe software have a number of labels defined that are useful in providing rapid identification of sampling position DRAM and Channel Command activity in the state listing They can also be used as triggers for the logic analyzer These labels include Sampling labels There are 4 groups of Sampling labels which organize each bit sent for the probe to the logic analyzer by the location of its valid data windo2. s se 1l 43 eis mw m a se CC Do fem a o e Do es o o ene oe v emos mum IO CI o9 o CI E D16P Odd EC NRI DP16P Even Ground 8 Ground CC E il CIC a i me EI CT O O DO fowm o9 o em o js efe o DO fom o oem qmm s o sem Je T1 AAA w o 44 General Information This chapter provides additional reference information including the characteristics and signal connections for the FS2343 FBDIMM Interposer Probe The following operating characteristics are not specifications but are typical operating characteristics Probe Connection 240 pin gold finger card edge connection at target bottom end of probe and card edge socket at the top edge of the probe both conforming to JEDEC spec MO 224 Protocol supported The FS2343 is designed to probe a DDR2 Fully Buffered DIMM system Contact FuturePlus Systems for more detailed information Logic Analyzer required 169xx or PC running Agilent technologies 1680 90 900 software version 3 00 00 software using 16753 or better 1695x or better cards Logic Analyzer Adapter Cables required Logie Analyzer Termination Number Required 16760 16753 4 5 6 E5378A 6 16950 Service requirements If a failure is suspected in the FS2343 Probe contact the factory or your FuturePlus Systems authorized distributor The repair strategy for the probe is for the pr
3. If you have already used the FBDIMM Protocol Decoder license that was included with your package on a 1680 90 900 analyzer and would like to have the offline analysis feature on a PC you may buy additional licenses please contact FuturePlus Sales department In order to view decoded data offline after installing the 1680 90 900 operating system on a PC you must install the FuturePlus software Please follow the installation instructions for Setting up the 16900 analyzer Once the FuturePlus software has been installed and licensed follow these steps to import the data and view it From the desktop double click on the Agilent logic analyzer icon When the application comes up there will be a series of guestions answer the first guestion asking which startup option to use select Continue Offline On the analyzer type question select cancel When the application comes all the way up you should have a blank screen with a menu bar and tool bar at the top 30 For data from a 16900 analyzer open the ala file using the File Open menu selections and browse to the desired ala file fofiine Agilent Logic Analyzer E Bie Edt view Setup Tools Markers Run Stop No Active Window Window Heb fjosncjsrrjmtajea s rn jrr pana 16700 Fast Binary Data Import Wizard Welcome to the 16700 Fast Binary Data Import Wizard This wizard will guide you through the steps of importing 16700 Fast Binary format data into the
4. 20 SM SMBus Control Paddle card Settings The FS2343 probe is designed so that AMB LAI device control can be either from the 16900 logic analyzer and the Probe Control application software resident there or from another FS2343 probe slave mode This feature is controlled by means of a 6 position switch on the probe paddle card near the logic analyzer connections The factory configuration is for 16900 control of the probe The settings on the switch are dependent on the configuration file used The following picture shows the jumper and switch configurations on the paddle card 2 3 1 Config file SW ON all others off FB238 1 1and4 SW1 FB238 2 1 and 4 FB238 3 3 and 6 TAARAT FB238_4 1 and 4 Probe Settings There is a 4 position jumper location at U8 on the top side of the FS2343 Interposer probe There are jumpers that can be placed over each of the 4 set of pins They have the following function Jumper Function 5 E ii U i 8 1 5 Probe ID bit O Address 20 2 6 Probe ID bit 1 Address 21 3 7 Jumper removed AMB SMBus 1 4 connected to analyzer at powerup Factory config installed Jumper installed AMB SMBus connected to motherboard at power up 4 8 Unused 21 Event Bus Cabling The Event Bus bits Evbus 0 3 from other probes can be daisy chained across multiple probes in order to provide cross probe control of other probes There are 2 EV cable connectors on e
5. VA Ground 78 Ground Oe Odd D16P Odd Even DP16P Even Ground 82 Ground CC E il n id S RA CLKN CLKN DO ea o9 cm C o aaa aO DO fowm o9 o fon o o e O DO fom o emo DO fom s fem EIU E NE EI OI Do Do js IT po o 34 J11 Pods 1 Odd and 2 Even semel Name E Namero name Era Do se os e 9 Reisen Jos 7 e emo wen em o vw em l Do fumo se w co o o Do ee om e 9e Do i feom a 2 9e Do em s s fom Do eme a o 9 Doo eme os 9e Do eme v s 9e Do em ar e fom Do se s se 9 Do fem s o 9 Do em s a 9e jew s se 1l 35 hem owes o om E CT DO fem o e s DO eem o9 8 em enms oson o femos ET DO fem o9 f e Tm NNI D16P Odd EC NEL DP16P Even Ground 82 Ground CC E il CIC os CLKN CLKN me EI CT ae A DO fowm o9 o em o js efe o DO fom o oem qmm s o sem d ICI E T1 AAA JE 36 J15 Pod 1 Odd ee oe at Damm fowo 1 e emo Do fem o o em haus oen n emo emm o poem Deus owe 3 ee Do fowm 5 e em heus oem 2 9e Do fes o9 2 e eneu ow a em DO fem s a Duas ow a emos Do fowm
6. a o em pere pe e owe o e fe OO emm s a enem ow few Do fem o a Demum owe o em Do fem 9 e em Deme oes a emo DO fem s e enem om e femm e o9 o em emos wm emon Do fem 9 a enso ww s Be DO fem 5 a mesmo oen o ee je o e fumo o 37 mem ew w s eee o Dome s s em me oen 6 femm Does o o A e o o em E e co O I Ground 82 Ground a CIC id me o om E 34 DI em o9 o sm A e o DO em o fon DO em o e fo LL eo T1 Doo Do eoe fm po o 38 J12 Pods 1 Odd and 2 Even FS EA BEE O O AA e O em o em enem owe 3 e Pew moe OO few s o em OO o feom o oem em r e fom Do emm a 2 fom Do fowm s em O few a em Do fem a o om em o fom Do fowm o9 e em emm s e em OO fem oe o om Do fem 8 w fom DO fem 5 a recem Jomo o ewon mesm 39 pc ee Hmm omou o o EI men O fom e o sw acsee owes o amp feos mes Ooo fowm o n fon Le a e The o DO fom n un fon L a UR Ground 78 around Odd D16P Odd Even DP16P Even Ground 82 Ground ee myn Ju J n CL
7. Mito M2 Probes Modules Windows D p ag F82338 i General Purpose Probe Set FB238_4 Full N 5 Select the type of probe to add Y J Properties E5398A 17 ch Soft touch connectorless single ended probe Add Probe gt 1 Probes used to connect to your Device Under Test Eg Probe i Control x Reference Designator Probe Type Logic Analyzer Pod s Edit Probe y Properties 39 E5378A 34 ch Samtec single ended probe Slot C Pod 1 Slot C Pod 3 NO E5378A 34 ch Samtec single ended probe Slot D Pod 1 Slot D Pod 3 Delete Probe Ai E5378A 34 ch Samtec single ended probe Slot E Pod 1 Slot E Pod 3 J312 ES3784 34 ch Samtec single ended probe Slot B Pod 1 13 E5378A 34 ch Samtec single ended probe Slot F Pod 1 Slot F Pod 3 I Overview Listing 1 For Help press F1 fiv E Manual If the pod connections need to be changed it can be done using the Edit Probes feature which is shown below The Reference Designator field should be J9 through J15 from the paddle card The next step is to select on the right hand side of the screen the 2 pods Odd and Even to connect to the analyzer cards The drop box will show available pod connections Offline Agilent Logic Analyzer 1FS2338 Config FB238_3 ala Overview Eie Edit view Setup Tools Markers Run Stop Waveform Window Help 8 x A ae iy dy SL Donna mTA LQ sera ia ro aa Mil to MZ
8. To set the trigger for the analyzer go to the setup menu bar and select Advanced Trigger On the next window that pops up specify what you want the analyzer to trigger on After you set the trigger depress the run button green arrow at the top of the screen on the overview listing or waveform windows the analyzer should be waiting for a trigger to occur at this point Start a test on the target to generate traffic when the trigger condition is satisfied the analyzer will continue capturing data until the memory is full or the user has depressed the stop button When the analyzer has stopped the protocol decoder will automatically decode the data on the bus the decoded data will appear under the Northbound and Southbound labels on the listing screen 29 State Display Offline Agilent Logic Analyzer Temp FBDIMM_REAL_SB2 ala Listing 1 181 x Ele Edit view Setup Tools Markers RunjStop Listing Window Help lal x DG S Mae TS XE H Ts IEA ARANA A ES Milto M2 250 ns SOUTHBOUND NORTHBOUND 3 50000 us 0000 0708 C 3 55000 us Overview Listing For Hine FI Status E T offline Asta i 2 o amp a 217 BJEATemp KBlinbox Microsoft Ou BFs2338_10 doc Mi 2 Oiine AgilentL Cyl 4 44PM Offline Analysis Offline analysis allows a user to be able to analyze a trace offline at a PC so it frees up the analyzer for another person to use the analyzer to capture data
9. data of interest Please see the following pages for details for the different register settings within the AMB 22 FS2338 Fully Buffered DIMM Protocol Analysis Probe Offline Setup Southbound Commands Qual Flag Trigger Event Event Bus Probe Configuration Setup Always After Link Training O Before Link Training Only If Needed O Always Before Link Training Analysis Probe Mode 9 Normal Trace Link Init Status Before LOS And Lane Data After LOS O Raw Trace Lane Data Before LOS Restore All Settings To Default Find Probe The Set up screen provides control over basic probe use e The probe Configuration setup button allows the user to select when they want to set up the parameters within the AMB The choices are always after link training before link training only when needed or always before link training If all you are interested in is data after link training then leave always after link training selected e The probe can operate in a mode where lane data is only provided after LOs where the lane data is aligned to the clock or in raw mode Raw mode just passes data through to the logic analyzer the lane data may not be aligned to the clocks at this point e The Restore button resets ALL Probe settings to their factory configuration e Find Probe pings the probe AMB chip 23 SB Commands This allows Match or Mask control over any 3 Command patterns entered by the user
10. in either hex or binary format Furthermore each of 3 patterns can be searched for in either Command Slot A B or C or all three patterns in all 3 Command Slots The mask and match feature allows the user to set 3 different command patterns along with data to mask out The user can then specify 3 events which allows a user to specify a frame containing 3 command values to be passed to the logic analyzer When the frame occurs that satisfy the events specified the data will be passed to the analyzer FS2338 Fully Buffered DIMM Protocol Analysis Probe Offline Setup Southbound Commands Qual Flag Trigger Event Event Bus Command Pattern O Base Match 0000004000 Hex Mask 00031FC000 O Binary Command Pattern 1 Base Match 0000100000 Hex Mask 0000100000 O Binary Command Pattern 2 Base 9 Hex Mask 0DODIFCODO O Binary Match 0000014000 Pattern Match Event 0 Pattern 2 Found In Command Slot B Pattern O Found In Command Slot B Pattem 2 Found In Command Slot C Faltem Match E ven E Pattern 1 Found In Command Slot C Pattern O Found In Command Slot C Pattern Match Event 2 Pattern 2 Found In Any Command Slot Pattern 1 Found In Any Command Slot 24 Store Qualification This section controls the operation of the Qual Flag Qual Stop Delay and Qual Period Delay It allows the user to select from 32 different events for the definition of Q
11. used for communication and triggering between probes in an FBDIMM Channel FS2338 Fully Buffered DIMM Protocol Analysis Probe Offline Setup Southbound Commands Qual Flag Trigger Event Event Bus Event Type EventBus 0 FBD Link State Disable 1 EventBus 1 Pattem Match Event O EventBus 2 Event Bus EV O EventBus 3 SB link in band EV 0 SB link in band EVJO SB link in band EV 1 SB link in band EV 2 SB link in band EV 3 Minimum Number OF Clocks Allowed B SB link in band EV 4 SB link in band EV 5 SB link in band E VIG SB link in band EV 7 QUALFLAG SB NB Failover 25 SB CRC Error 26 Thermal Overload 27 Clock Training Violation 28 Unimplemented Register amp ccess 23 Other Implementation Specific Errors 30 27 State Analysis Operation For proper state analysis the user must choose the correct configuration file to load depending on what type of analysis is desired such as analyzing both Northbound and Southbound activity or just one direction The list of configuration files provided is on page 12 Load the appropriate configuration file and use the General Purpose probe feature for proper cable attachment to the probe for more information on the General Purpose probe feature please see the section titled Loading 169xx configuration files and General Purpose Probe feature When the configuration file loads the decoder will automatically loa
12. used in all CKE control commands commands such as DRAM CKE per DIMM and DRAM CKE per Rank commands A 1 value targets all DIMMs if the bit is 0 the command targets only one DIMM specified by the DS bits TID single Transaction identifier bit used in Write Config Register Channel Command SD Status delay 2 bit field used in Sync command Allows return status data to be delayed by up to 3 frames ELOs The ELOs bit indicates the channel should transition from the LO state to the LOs state for exactly 42 frames The LO state is the state when the channel is ready to accept Channel and DRAM commands The LOs state is an optional state used in systems that use power management ERC The ERC bit indicates that the channel should transition from LO state to recalibrate state for exactly 42 frames Used in Sync frame IER This bit indicates that commands and CRC errors be ignored by the AMB until after the next reset Used in Sync frame A10 2 Address bus for Read or Write configuration Channel Commands Default Trigger When a configuration file is loaded the default trigger will be set to trigger the analyzer when the Mode bit is O and Frame 1 When mode and frame are set at these values the AMB will be done with training sequences and the data that is on the channel is properly aligned and can be decoded properly by the decoder 16 Symbols Terms used in the FBDIMM protocol are defined under labels that are referre
13. Futu re PI u se Syste ms Ce Agilent Technologies 8 Innovating the HP Wa Corporation um 3 Premier Solution Partner FBDIMM INTERPOSER PROBE FS2343 Users Manual For use with Agilent Technologies Logic Analyzers Revision 1 2 FuturePlus is a trademark of FuturePlus Systems Corporation Copyright 2004 FuturePlus Systems Corporation How to reach UN i 4 Product Warranty sa ais iei RAN 5 Limitation of A ES 5 Exclusive Remedio 5 A NO 5 Software License Agre ment ss e i e a e UNSER EROS code da cio PRSE PER ER KMS E APER bai aci animadas 6 License Agreement 7 oie d oden PE Po n basen vu d amb dioda eee UY Eo IRE ETE UR RENS FORD DUON np c nise 6 Use of the software 4 eere ee mese ee eee eee eene sene mes mce sene mete e ss ss S esses sece see mese seta sees esmas ne tastes sna 6 Copies and AdaptationsS ics soci v n EH H t 6 Montre M HM 6 Sublicensing and Distribution eee ee te ce ce ee eee eee en ense case sette etna stans eee seco ss aero toas sten seen ae 6 AA oa eot SE 7 Probe Performance Limitation eese eee sene eese nete stent Loyn seen to seta sesso seta stesse ne soco sena mesas 7 Definitions E O 7 Logic Analyzer Modules ina 7 LogicsAnalyz r Machete se Ga 7 FS2343 Probe Descriptions iii iii ARAN cen YDAN OUD OO eg ka 8 Probe Technic
14. KN DO ema s um TT ar ri DO fowm o o fon o A e O DO fom o oem DO em s e em a cdr deser muet OA Do Do fe mw po o 40 J10 Pods 1 Odd and 2 Even ET Name ERA EI name ESO to tee uem pum Do jew s e fom so om 7 s soo fe Do eme e wo co Do fem e nm 9 Do oe o or Tr pa 2 9e Do ow a 5 co Do oe s o 9 Do oe s 9 Do eme os s 9e Do fem oa e co Do fumo s om Domo s om fem s a co Do fam os _ mw co mum ow s o emm wise 41 A ln Leda o muss om o emo ene Do mm 8 9 e eneu oe v femos mue em 9 o mem qe pr pero o ewm E n fem Uj UJ Ground 78 Ground Ground 82 Ground es mywn ew es DO fem s o cm aa aa DO fowm o9 o fon o A e O DO fom o oem DO em s e em a cdr deser muet OA Do Do fe mw po o 42 J13 Pods 1 Odd and 2 Even eos Name E Mimetogia name e A UM Doo po s e o Tom Do fem os e 9 om Deus owm 7 e emo urso Do fem o o Do fumo om w co gt Do eme om e co Do em a 2 9e Do emo s s fom PO eme a o 9m Do eme a s 9m Do eme s 9m Do em a e fom Do fem s s 9 Do em s 9 9 Do fam s a 9 jew
15. MB s logic analyzer Triggers 0 10 to be set to one of 32 different event conditions seen by the AMB It is important to note that not all LAITrig 0 10 signals are available to the logic analyzer This is dependent on the configuration file loaded and the pod connections made to the logic analyzer Each trigger bit has a corresponding label in the configuration file that can be used when specifying a trigger for the logic analyzer FS2338 Fully Buffered DIMM Protocol Analysis Probe Offline Setup Southbound Commands Qual Flag Trigger Event Event Bus LAITrigO Null Event LAITrigl FBD Link State Disable 1 LAITrig2 Pattern Match Event O LAITrig3 Event Bus EVIOJ LAITrig4 SB link in band EVIO LAITria5 Pattem Match Event O Ee QUALFLAG LAITrig SB NB Failover 25 LAITrig8 SB CRC Error 26 LAITrig3 Thermal Overload 27 LAITrigl0 FBD Link State Testing 4 SB link in band EW 0 APPLICATION SB link in band EV 1 SB link in band EV 2 LAITrig 6 1 SB link in band EV 3 See User s SB link in band EV 4 SB link in band EV 5 SB link in band EW 6 SB link in band EV 7 QUALFLAG SB NB Failover 25 SB CRC Error 26 Thermal Overload 27 Clock Training Violation Unimplemented Register 3 Other Implementation Specific Errors 30 26 Event Bus This feature controls the operation of the Event Bus signals EV 0 3 which can be
16. Southbound frame is captured to simplify triggering State Analysis of these frames is provided through the use of a Protocol Decoder The probe requires control through a SMBus provided by the logic analyzer This control is provided with the probe that runs on the 16900 workspace and is linked to the probe thru the SMBus ports in the logic analyzer cards when used with the 1690x series Agilent Logic Analyzer frames 16753 4 5 6 as well as 16950 cards are supported This LAI control Probe Add In allows the user complete control over the LAI mode functions of the AMB used in the FS2343 to control Set up Triggering Store Qualification and AMB Register parameters Probe Technical Feature Summary Quick and easy connection between a 240 pin FBDIMM connector and Agilent 1690x Logic Analyzers Complete and accurate state analysis of Primary South and Secondary Northbound FBDIMM traffic as seen by the AMB in LAl mode on the Interposer probe Integrated control of Advanced Memory Buffer Logic Analyzer Interface functions Ability to accept an FBDIMM and hence allow full backplane performance evaluation Probe Components The following components have been shipped with your FS2343 Probe FS2343 Interposer Probe with cable attached Paddle card for logic analyzer connection 1 10 EV cable 3 100 center pin jumpers and mechanical brackets for support of the probe in either 180 degree or 90 degree orientations External AC power supply for t
17. ach probe and both connectors are wired in parallel so that either can be used Additionally the probe has termination sensing circuitry so that the Evbus 0 3 signals are properly terminated on the probe if the cables are not used The cables are connected at either J9 or J10 on the board with their wires exiting the board from the top LED D1 will light if the cables are attached backwards Probe Control Application The FS2343 Interposer probe is controlled from a Probe Add in which has to be installed on the 16900 workspace as it communicates through the logic analyzer cards through an internal SM SMBus port which is connected to the probe by means of the adapter cable connection Loading the Probe Control Software Load the CD provided with the probe into the 16900 frame and locate the file FBD Probe Control exe Double click this file and it will install and be available in the Agilent Logic analyzer software under the Setup tab as the FBDIMM Probe Using the Probe Control Software Always use the Apply button before changing windows or using the OK button It is important to note that the probe control software sets up registers within the AMB It is still necessary to set up parameters in the configuration file for triggers storing filtering etc Setting up the AMB through the probe control software generates signals going to the logic analyzer the logic analyzer can then use these signals to qualify trigger or filter events or
18. al Feature Summary 4 ne nene ee esee ee ee vene seen enca seco nese seen aset coocesecese see ssocesesse 9 AA ros Ego rend np oe oi o enata oco ep ee nga eros drei ERR eds 9 Probe Set Up usc SARAS AS Y Y AAA DARE RED NOR OND Dias 10 Probe OVervie Wense M ES 10 IJ TOIEDCIBULIU d M roces 10 Ext rnal Power Supply em 11 Signal Assignments on Probe Pods 4 ce ce sete sene seen eee eee ce cesese eee se ee enes escoceceseceseseosesosesse 12 Logic Analyzer card requirements eee eee COCO RE LED ROLE stesse tE tE ve RE seno ssare seco se co DD DDN DDOD DDO 12 Configuration files xiii ndier dk e 12 Software REgulremeni vi nive kv 13 Setting up the 169xx Analyzer ss sciccssessosssesccsscccsssnessoosesssocsseeessonsesssoncssensssssasssencsoonsessoesssonsstenssess 13 es a id A E I I 13 Loading 169xx configuration files and General Purpose Probe feature 13 Configuration File Labels icut x SEC FE YE Y 15 Sampling labels ie V aNsncosnn 15 DRAM labels AAA 15 Channel Command labels oooonconoonnnonccnnonnconnnoncononancnconcnonoonconconnonn coo ncn a ess mecesesececeemeseceseceseseses 15 Defatilt Trig A seco EOE eris nas rentes nes dera M 16 A A OA 17 PPELOTON CES ne 19 SM SMBUS Controla ies 21 Paddle card Settings sicsscisscesscasssecceisssacsseeceescessvonss
19. d Southbound are set to None meaning they are both running at full potential To access the preferences select the Tools menu after a configuration file has been loaded successfully then select FBDIMM Protocol Decoder 1 Preferences Below is a picture of the screen when selecting preferences Another preference option is Raw Mode When selected the output on the Northbound and Southbound labels will be shown in a binary format instead of the regular decoded output All twelve transfers and all lanes will be shown in each state 19 lal xi ES File Edit view Setup Tools Markers Run Stop Listing Window Help 18 x D da gn EH New Inverse Assembly t Y y Y p amp T z EH Nevy Bus Analysis to M2 50 ns New Filter Colorize 3 New Packet Decoder 2 Overview Re order Delete etc Alt o OUTHBOUND NORTHBOUND d Find Ctrl F a 1 FBDIMM Protocol Decoder 1 Delete Disable Rename Os 0000 0 an ot A ter Data Frame O Command Slot B mand Slot C 50 00 ns 0000 O rmand Slot B S verview Listing 1 Below is a picture of the preference options 15 xl ES File Edit View Setup Tools Markers Run Stop Listing Window Help la xl Dc EA N gt d Es q y amp Sample Number Time SOUTHBOUND NORTHBOUND X Southbound Failover Mode None El Northbound Failover Mode None y Cancel Choose Failed NB Lane E E E ri E E E fa RawMode
20. d providing the software has been properly licensed For proper protocol decoder performance you must insure the preferences are set properly Once the configuration file is loaded go to Tools select FBDIMM Protocol Decoder 1 and select Preferences Set the failover modes for the Southbound and or Northbound if necessary The default settings are set to none When you choose a Northbound failover mode you must select which lane s has failed as well Once the configuration file has been loaded and all cables are attached to the probe the next step is to configure the probe Please refer to the section of the manual titled Using the Probe Control Application The probe control application allows the user to set different parameters of the probe to allow certain data to be passed through to the analyzer Setting Sample Positions In order to insure that the logic analyzer properly measures the output of the probe the sample positions for each label need to be set properly There are 4 Sample Data labels defined in each configuration file that group each North and Southbound data signal by its required sample position It is recommended that Eyefinder is run on the logic analyzer while the target system is generating consistent traffic on the North and Southbound lanes The sample positions in the config fields have been preset based on measurements in a test bed at 533MT s data rates They may need to be adjusted based on your target s
21. d to as symbols Symbols can be used in defining triggers or for use in default store qualifications Below is a list of labels with the symbols defined When using a label for which symbols are defined change the hex property to sym to display the symbol representation A B and C below refer to the command slot A B C respectively in the southbound frame DRAM commands A B C labels Symbol Symbol Value reserved 00 100x Enter Power down 00 1010 Exit Self Refresh 00 1011 Enter Self Refresh 00 1100 Auto Refresh 00 1101 Precharge Single 00 1110 Precharge All 00 1111 READ 01 Oxxx WRITE 01 1xxx ACTIVATE 1x xxxx Channel Commands A B C labels Symbol Symbol Value Channel NOP 0000 000x Sync 00000 001x Soft Channel Reset 0000 010x reserved 0000 011x Read Config Reg 0000 100x Write Config Reg 0000 101x DRAM CKE per Rank 0000 110x DRAM CKE per DIMM 0000 111x reserved2 0001 Oxxx reserved3 0001 10xx Debug Exposed 0001 110x Debug Relative 0001 1110 Debug In Band 0001 1111 Frame Type label Symbol Symbol Value command 00 Reserved 01 Command 4 Wdata 1x The DRAM commands A B C labels are made up of bits 20 19 18 12 11 10 respectively from each command slot Channel Commands A B C labels are made up of bits 20 13 respectively from each command slot Frame Type label consists of bits 25 24 respectively Th
22. e II EBlinbox mi GJenpcI K BR FS1104_2 BR FS1123_1 Gomcrosoft Eilon BA 4 17 Pm ESSE a SI After the decoder has loaded select Preferences from the overview screen and set the preferences to their correct value in order to decode the trace properly 32 Appendix FS2343 Paddle Signal to Logic Analyzer Connector and Channel Mapping The following table shows how the FS2343 Probe connects FBDIMM AMB signals to the logic analyzer pods and channels through the 100 pin Samtec connectors Note that the configuration files described earlier use various combinations of these Pod connections The nomenclature is NB SB for North or Southbound Lx for Lane number Bx for bit in during the rising edge of Anly clkp and xx is the bit for the Dual sampled second point which is on the falling edge of Anly clkp J9 Pods 1 Odd and 2 Even Nee RE ee TEA A A e O emm o l w Dans one 3 e emo woe Do fem o o em i oes o o om OO fom rn e ww e o9 2 ww i fem s s om Do fowm a o em Do feom a w om O i feom o fom o i fowm e dem 33 eisen Joss eee Menace DO fowm e Y DO fem e o fom Do fem s w om Do fm 5 om enen foeon o fem ear DO i feom a e fon Do fowm s e fon enms oson o emow exms O fowm o o fon Doo e n e L Do fom n n fon _ P
23. e picture below shows an example of symbols being used for a trigger 18 Offline Agilent Logic Analyzer Configs FB238_1 xml Overview lej x e File Edit View Setup Tools Markers Run Stop Overview Window Help l xl Jnseae nw Tw ae x llo amp 5s a v 77 e omjom Milto m2 Probes Advanced Trigger for My 16753 56 1 E lani x Trigger Functions Trigger Sequence Default Storage overridden by sequence level store actions amp General X 1 2 SEO Janything Purpose Prob 1 Y Properties Step 1 d Find pattern n times I Y BusiSignal y DRAW commands AIbts y activate occurs 1 amp time Then Trigger and Fill memory with Default Storage Simple Trigger Store Recall Clear La Cancel Help Z NI verview EB Listing 1 m Waveform 1 For Help press F1 Status I Offline start Mt e Ag r1 3 E AManualsiCurrent KS support Microsoft 052338 10 doc Mi 3t Offline Agilent L DES 9 04 am Example using symbol Activate in a trigger Preferences The Preferences option is used to set the protocol decoder for failover mode If the Southbound or Northbound is in failover mode the preferences must be set accordingly If the Northbound side is in failover the user must select which lane has failed in order for the decoder to decode the bus properly The default settings for both the Northbound an
24. gured as one module one Trigger bits Master Odd and Even dual sample state machine J11 Odd and Even J12 Even J13 Odd and Even 12 415 410 as 1 LEI L a 2 L L FBDIMM Paddle Board Connector layout Software Requirements For state analysis you must have version A 02 99 00 or later Agilent OS installed on the 1690x frame Version A 02 99 00 contains the capability for SMBus control of the probe through the 16753 4 5 6 or 16950 cards Setting up the 169xx Analyzer A CD containing the 16900 software is included in the FS2343 package The CD contains a setup file that will automatically install the configuration files and protocol decoder onto a PC containing the 16900 operating system or onto a 16900 analyzer itself To install the software simply double click the FBDIMM exe file on the CD containing the 16900 software After accepting the license agreement the software should install within a couple of minutes 169xx Licensing Once the software has been successfully installed you must license the software Please refer to the entitlement certificate for instructions on licensing the software The software can only be installed on one machine If you need to install the software on more than one machine you must contact the FuturePlus sales department to purchase additional licenses Loading 169xx configuration files and General Purpose Probe feature When the soft
25. he FS2343 Interposer probe CD containing Protocol Decode software for 1690x frame or offline analysis as well as the Probe Control software This Users Guide and other information on CD ROM Quick Start Sheet Software Entitlement Certificate for 1690x or offline analysis Probe Set up Probe overview The FS2343 Interposer probe uses an AMB device in LAI mode and provides the appropriate FBDIMM connections to an interposed FBDIMM device for it to operate within the memory bus The LAI mode performs 2 functions First it demultiplexes and decodes the NB and SB traffic into the frame based information that is presented to the logic analyzer Second it acts as a link in the NB and SB chain in the memory bus In this case it looks logically as an upstream or northside node to the interposed FBDIMM in its straddle connector Mechanical Brackets The FS2343 Interposer probe can be used in several orientations The first is a straight up from the backplane or 180 degree orientation which requires that the 2 straight brackets be assembled to the probe at its top and bottom with the associated nylon hardware Care must be taken whenever the flex portion of the probe is moved as FBDIMM signal integrity will degrade with repeated flexing Make sure that no portion of the probe is touching other surfaces in the target system and be sure that the cables from the probe to the Paddle card are free from kinks and any sharp
26. nce agreements and other customer assistance agreements are available for FuturePlus Systems products For assistance contact the factory Software License Agreement IMPORTANT Please read this license agreement carefully before opening the media envelope Rights in the software are offered only on the condition that the customer agrees to all terms and conditions of the license agreement Opening the media envelope indicates your acceptance of these terms and conditions If you do not agree to the licensing agreement you may return the unopened package for a full refund License Agreement In return for payment for this product FuturePlus Systems grants the Customer a SINGLE user LICENSE in the software subject to the following Use of the software Customer may use the software on any one Agilent 1690x mainframe logic analysis system e Customer may make copies or adaptations of the software e Customer may not reverse assemble or decompile the software Copies and Adaptations e Are allowed for archival purpose only e When copying for adaptation is an essential step in the use of the software with the logic analyzer and or logic analysis mainframe so long as the copies and adaptations are used in no other manner Customer has no right to copy software unless it acquires an appropriate license to reproduce it from FuturePlus Systems e Customer agrees that it does not have any title or ownership of the software other than the ph
27. nonnco eene nein nnen rennen eneve enne 45 Service requirements IS obe eati et 45 How to reach us For Technical Support FuturePlus Systems Corporation 36 Olde English Road Bedford NH 03110 TEL 603 471 2734 FAX 603 471 2738 On the web http www futureplus com For Sales and Marketing Support FuturePlus Systems Corporation TEL 719 278 3540 FAX 719 278 9586 On the web http www futureplus com FuturePlus Systems has technical sales representatives in several major countries For an up to date listing please see http www futureplus com contact html Agilent Technologies is also an authorized reseller of many FuturePlus products Contact any Agilent Technologies sales office for details Product Warranty Due to wide variety of possible customer target implementations the FS2343 FBDIMM Interposer probe has a 30 day acceptance period by the customer from the date of receipt If the customer does not contact FuturePlus Systems within 30 days of the receipt of the product it will be determined that the customer has accepted the product If the customer is not satisfied with the FS2343 FBDIMM Interposer probe they may return it within 30 days for a refund This FuturePlus Systems product has a warranty against defects in material and workmanship for a period of 1 year from the date of shipment During the warranty period FuturePlus Systems will at its option either replace or repair products proven to be defective F
28. oduct to be returned to the factory upon factory approval 45
29. ogic Analyzer Modules Module A set of logic analyzer cards that have been configured via cables connecting the cards to operate as a single logic analyzer whose total available channels is the sum of the channels on each card A trigger within a module can be specified using all of the channels of that module Each module may be further broken up into Machines A single module may not extend beyond a single 5 card 16900 frame Logic Analyzer Machine Machine A set of logic analyzer pods from a logic analyzer module grouped together to operate as a single state or timing analyzer FS2343 Probe Description The FS2343 FBDIMM Interposer Probe is based on the Logic Analyzer Interface LAI Mode of the Advanced Memory Buffer chip used on Fully Buffered DIMMs This mode allows decoding of the Primary Southbound from memory controller to FBDIMMs Commands and Data as well as Secondary Northbound Commands and Data from the interposed FBDIMM located in the card edge connector on the top of the FS2343 Interposer Probe FS2343 FBDIMM Interposer Probe Block Diagram Interposed standard FBDIMM AMB in DDR mode FBDIMM s Secondary SB and NB lt FBDIMM controller FBDIMM backplane The probe can provide a single Southbound frame of 120 bits 10 lanes of 12 bits each as well as a Northbound frame of 168 bits 14 lanes of 12 bits each to the logic analyzer On each line of the trace list a complete Northbound and
30. or hot surfaces that may damage the cables 10 The other orientation for the probe is with a 90 degree bend to either it s front AMB or back side There are right angle brackets provided to keep the probe in this position along with the associated nylon hardware It is our recommendation that the interposed FBDIMM be placed in the probe before the probe is bent over This provides additional stiffness at the FBDIMM straddle mount connector on the top of the probe The right angle brackets bend the probe in a high position which would allow a user to place a second FS2343 Interposer in the slot next to it bent at a lower angle that would allow the second probe to nest underneath the first probe bent and secured by the brackets in the high position Be very careful when nesting 2 Interposer probes Make sure there is good ventilation for all the AMB chips and that the cables are not kinked or resting on any sharp or hot objects External Power supply The FS2343 Interposer probe requires the use an external DC power supply This unit is provided as part of the product and is required for the probe to operate It is connected to the probe with a mini plug Do not use any other DC supply with the probe 11 Signal Assignments on Probe Pods There are signal connections for up to 6 different logic analyzer adapter cables E5378A This provides the user with some flexibility in terms of which signals they connect to based on the ty
31. or warranty service or repair this product must be returned to the factory For products returned to FuturePlus Systems for warranty service the Buyer shall prepay shipping charges to FuturePlus Systems and FuturePlus Systems shall pay shipping charges to return the product to the Buyer However the Buyer shall pay all shipping charges duties and taxes for products returned to FuturePlus Systems from another country FuturePlus Systems warrants that its software and hardware designated by FuturePlus Systems for use with an instrument will execute its programming instructions when properly installed on that instrument FuturePlus Systems does not warrant that the operation of the hardware or software will be uninterrupted or error free Limitation of warranty The foregoing warranty shall not apply to defects resulting from improper or inadequate maintenance by the Buyer Buyer supplied software or interfacing unauthorized modification or misuse or improper site preparation or maintenance NO OTHER WARRANTY IS EXPRESSED OR IMPLIED FUTUREPLUS SYSTEMS SPECIFICALLY DISCLAIMS THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE Exclusive Remedies THE REMEDIES PROVIDED HEREIN ARE BUYER S SOLE AND EXCLUSIVE REMEDIES FUTUREPLUS SYSTEMS SHALL NOT BE LIABLE FOR ANY DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES WHETHER BASED ON CONTRACT TORT OR ANY OTHER LEGAL THEORY Assistance Product maintena
32. pe of analysis that is needed e g SB or NB only all trigger events SB and NB traffic together etc The 16753 4 5 6 cards require the E5378A adapter cables 1 Adapter cable is required for 2 logic analyzer pods Logic Analyzer card requirements The FS2343 FBDIMM Probe requires up to five logic analyzer cards depending on what decode information is required by the user There are several different configuration files provided for the following applications Note all these configurations require the use of 16753 4 5 6 cards and Dual Sample Mode in the Logic Analyzer Configuration files Probe E en Probe ur o to the State o requirement en ur o and NB up to 533 Mb s FB238 5 J10 Master Odd and 8 cards Ma as one module for with 10 trigger bits E J13 des and Even speeds up to 533 Mb s J9 odd even J11 Odd and Even J12 Odd and Even SB Only and 8 Trigger bits FB238 4 J9 Even J10 Master Odd 3 cards configured as one module one and Even J12 Even J13 dual sample state machine Odd and Even NB Only and 9 Trigger bits FB238 3 J9 Odd and Even J11 4 cards configured as one module one Odd and Even J12 Odd dual sample state machine and Even J15 Master Odd Full NB and SB with 5 FB238 2 J9 Odd and Even J10 5 cards configured as one module one Trigger bits Master Odd and Even dual sample state machine J11 Odd and Even J12 Odd J13 Odd and Even 12 lane NB and SB with 10 FB238 1 J9 Odd and Even J10 5 cards confi
33. sonsscsdesssoacsevacesssesevencstonescasntsvencsevesesscessveessionseess 21 Probe Settings eres ee tno riore pereo oba Ya eHe bordo vene e eure RUE RSU ba ee YN NUN bene orbe a SEN URN EUER In bi ee eU QN Ug Une Vbi VER NUNT SEE 21 Event Bus Cabling e E 22 Pr be Control ADDICUION e 22 Loading the Probe Control Software seen enca se eee ee eee e eee ee ee ette vene seen enses etas ttes tense eaa 22 Using the Probe Control Software 4 cere vene se ee eee eee cece case setae setae etta sese cecesese ce seocesesoese 22 Sn M MH 23 SB CommandS CE 24 Store Qualitication pasanik E UNE E ER RE POE 25 Pro Ser Eyents sr cdi san hd aa 26 Event Bus D 27 State Analysis Operation sve 28 Setting Sample Positions c c e RELE E eere e eene RE CODE RE oro ease CODE co seno RORE rsss orcs ce ds co senso sato s sono es 28 State DIS Play HN E 30 PLUTO 30 LUIS FF 33 FS2343 Paddle Signal to Logic Analyzer Connector and Channel Mapping 33 General IRMA IO siria na PES FN AAA esi 45 Prob Connection i cdr ires e Sha esses I eU eR BRI RF 45 Protocolsupported siii in A 45 Logic Analyzer required uui id tede o 45 Logic Analyzer Adapter Cables required ooooconcnicnccnnononconcnononocononnonnonnon
34. system Is the system already set up correctly for the 16700 data you wish to import G Yes C No After clicking next you must browse for the fast binary data file you want to import Once you have located the file and clicked start import the data should appear in the listing After the data has been imported you must load the protocol decoder before you will see any decoding To load the decoder select Tools from the menu bar when the drop down menu appears select Inverse Assembler then choose the name of the decoder for your particular product The figure below is a general picture please choose the appropriate decoder for the trace you are working with 31 Offline Agilent Logic Analyzer Unnamed Configuration i lal xl ete Edit View Setup Tools Markers Run Stop Waveform Window Help n os a SE USB11 Inverse Assembler nm PI HEN New Bus Analysis gt PCI X Inverse Assembler Milto m2 36 ns S New Filter Colorize SODDR2 Protocol Decoder DDR SODIMM Inverse Assembler E Overview Re order Delete etc EC Inverse Assembler LISE20 Inverse Assembler DDRBasic Protocol Decoder DDR Inverse Assembler PCI Inverse Assembler E51117 F52332 DDR2 Protocol Decoder MegaCorp 999 Inverse Assembler HT Inverse Assembler PCI X 2 0 Inverse Assembler ki Overview Slot B DDR Waveform E Slot B DDR Listing Status JI Offlin
35. ual Start and Qual Stop These settings control the state of the Store_qual flag for non filtered frames The Store_qual flag in the configuration file can then be used for trigger events default storing etc The Store_qual flag is controlled by this screen the user may specify when to activate the Store_qual flag specify an event to assert the Store_qual flag and when to deassert the flag FS2338 Fully Buffered DIMM Protocol Analysis Probe Offline Setup Southbound Commands Qual Flag Trigger Event Event Bus Sync Frame Filtering Do Not Assert Qual Flag During Sync Frames O Assert Qual Flag During Sync Frames Start Stop Event Handling O Assert Qual Flag On Start Event De assert On Stop Event Qual Flag Ignores Start Stop Events Qual Stop Delay Clocks Valid values 0 63 Decimal Qual Period Delay Frames Valid values 0 63 Decimal Qual Start Event Null Event Qual Stop Event Null Event Null Event APPLICATION NOFBD Link State Disable 1 FBD Link State Calibrate 2 Include QualFl FBD Link State Training 3 FBD Link State Testing 4 FED Link State Polling 5 FED Link State Confia 6 FED Link State LO FBD Link State LOS or Recalibrate 8 Pattern Match E vent O Pattern Match E vent 1 Pattern Match E vent 2 Event Bus EV 2 Event Bus EV 3 25 Trigger Events This capability allows the Probe user to define each of the A
36. w and therefore the required sampling position This makes it more convenient to check the sampling set up on a bit by bit basis DRAM labels BA x Bank Address for Command Slot A B or C as defined in 3 bits x is used to describe the Command slot ADD x 16 bit label describing the DRAM address bus DS x 4 bits that direct the command to one of the eight possible DRAM DIMMs on the FBD channel This is how any of the three commands in a frame can be directed to any DIMM in the FBD channel These bits are used in some Channel Commands as well RS x Rank Select bit Channel Command labels SB CMDA CRC Southbound Command Slot A CRC 14 bit value FO SB CMDA CRC Failover Southbound Command Slot A CRC 10 bit value EV x Event Debug bits 8 bits used in the Channel Command Debug In band events PV_x 8 bit Parameter Value that is associated with a debug event This is used in the Channel Command Debug In band events DE x 8 bits each bit refers to the CKE on each DIMM DEO would be for DIMM 0 DE1 would be for DIMM1 etc RT x Relative timing 10 timing bits communicate relative time of transfer across boundaries Used in Channel Command Debug Relative timing PH x Phase bit 6 bit field communicates the encoded boundary transfer phase Used in Channel Command Debug Relative timing EX x 17 bit field that communicates debug information used with Channel Command Debug Exposed information BCST_x single bit field
37. ware has been licensed you should be ready to load a configuration file You can access the configuration files by clicking on the folder that was placed on the desktop When you click on the folder it should open up to display all the configuration files to choose from If you put your mouse cursor on the name of the file a description will appear telling you what the setup consists of once you choose the configuration file that is appropriate for your configuration the 16900 operating system should execute it The protocol decoder automatically loads when the configuration file is loaded If the decoder does not load you may load it by selecting Tools from the menu bar at the top of the screen and select the decoder from the list After loading the configuration file of choice the user should see both the Probe Control application icon and the FBDIMM configuration and decoder icon in the Probes column on the Overview page Clicking on the Properties button of the FBDIMM Config icon will display the General Purpose Probe Set as defined for this configuration This is what the FS2343 probe user should use to guide them in connecting adapter cables to analyzer card pods ile Edit View Setup Tools Markers Run Stop Waveform Window Help Offline Agilent Logic Analyzer 1FS2338 ConfiglFB238_3 ala Overview Gig x Ded ks e Ta Qal s iE m ey ivy ion
38. ysical media Ownership e Customer acknowledges and agrees that the software is copyrighted and protected under the copyright laws e Transfer of the right of ownership shall only be done with the consent of FuturePlus Systems Sublicensing and Distribution Customer may not sublicense the software or distribute copies of the software to the public in physical media or by electronic means or any other means without the prior written consent of FuturePlus Systems Introduction Thank you for purchasing the FuturePlus Systems FS2343 FBDIMM Interposer Logic Analyzer Probe We think you will find the FS2343 along with your Agilent Technologies Logic Analyzer a valuable tool for helping to characterize and debug your FBDIMM based systems This Users Guide will provide the information you need to install configure and use the FBDIMM Interposer Probe If you have any questions about this Guide or use of this probe please contact FuturePlus Systems Corporation Probe Performance Limitation The FS2343 Interposer probe is subject to the limitation inherent in probing the FBDIMM bus at 4 GHz and the extension of the high speed trace lengths of one FBDIMM slot by 65 mm The probe is also dependent on the logic analyzer interface decode function of the Advanced Memory Buffer chip used as an interface between the FBDIMM High speed signals and the logic analyzer lf you have any questions please contact FuturePlus Systems Definitions L
39. ystem The following image shows the 4 Sample Data labels after an Eyefinder has been run If there are clear eyes for each label the user can drag all the blue sample position bars to the far left to aggregate them and then drag the single bar back to the window where it was originally located If the sample positions are not set correctly then the data shown on the analyzer will not be correct 28 Agilent Logic Analyzer 1FS23381Testing alal Waveform 1 Analyzer Setup for My 16753 56 1 Wi Thresholds and Sample Positions Current Sample Position tsample 4 Suggested Sample Position Signal Activity Envelope f Current Threshold vThresh 4 Suggested Threshold Signal Activity Buses Signals to Run NBLink1 D w A Sample Position tSample 0 19 ns avg i NBLink2 tSample 1 76 ns avg SBLink Sample Group 1 i B EJ tSample 0 70 ns Sample Group 2 B al H L HM H i tSample 0 28 ns Sample Group 3 SE NE Mi SE NS ESE sample Group i NEC E ETR tSample 0 36 ns avg tSample 0 74 ns avg E E E KI Command Slot KI JADE PJ C WE Command SlotB tSample 0 69 ns avg KI Command Slot C tSample 1 88 ns avg KI Byte Enable tSample 1 39 ns r Auto Sample Position Setup For Help press F1 Local Command Prompt 2 Agilent Logic Analyze After the probe has been configured the trigger for the analyzer must be set
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