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NB6L295MNG / NB6L295MMNG Evaluation Board User`s Manual

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3. 4 2 Oscillator OSCS_3525 ECS Digikey XC1047CT ND hitp onsemi com 11 NB6L295MNGEVB NB6L295MMNGEVB ON Semiconductor and Q are registered trademarks of Semiconductor Components Industries LLC SCILLC SCILLC reserves the right to make changes without further notice to any products herein SCILLC makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does SCILLC assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation special consequential or incidental damages Typical parameters which may be provided in SCILLC data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts does not convey any license under its patent rights nor the rights of others SCILLC products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur Should Buyer purchase or use SCILLC products for any such unintended or unauthorized app
4. Vcc offsetting Vcc to 0 V yields 0 or Ground SMAGND NB6L295 LVPECL Outputs see Figures 5 and 6 LVPECL and outputs have standard open emitter outputs and must be externally DC loaded and AC terminated Taking advantage of the internal 50 Q to ground of the test equipment a split power supply technique will assure the equal output loading and termination of both outputs Connect the Qx and Qx outputs of the device to the oscilloscope with equally matched cables Both outputs must be equally loaded and terminated The outputs are now DC loaded and AC terminated with 50 Q to which is the Ground internal to the oscilloscope Since Vcc 2 V offsetting Vcc to 2 0 yields 0 V or Ground SMAGND The terminal connects to the isolated SMAGND connector ground plane and is not to be confused with the device ground pin DUTGND NOTE When single ended output is being used the unconnected output for the pair must be terminated to through a 50 resistor for best operation Unused output pairs may be left unconnected Since 0 V a standard 50 Q SMA termination plug can be used Step 3 Connect and Setup Inputs Set the signal generator amplitude to appropriate logic levels For Clock set the generator output for a square wave clock signal with a 50 duty cycle For Differential Mode Connect the differential outputs of the generator with equally mat
5. and outputs on an oscilloscope or frequency counter The power supply needs to be DC offset Assure that the instrument has internal 50 Q termination impedance to ground Ensure the oscilloscope is triggered properly hitp onsemi com NB6L295MNGEVB NB6L295MMNGEVB SMAGND 0 V VCC 2 0 DUTGND 0 5 V 1 3 V PLDVCC 2 0 V PRIMARY NB6L295MMNGEVB J14 PRIMARY C20 5 TE 699 re 4 so si v 5 oc T gt 5 05 23 gt 719 BTI LLC BOARD www btig Signal Generator Signal Generator INO Trigger DESIGNE ZEPHYR ia ON SEMI Digital Oscilloscope or Frequency Counter Figure 6 Offset Power Supply Connections for LVPECL Outputs NB6L295 http onsemi com 6 NB6L295MNGEVB NB6L295MMNGEVB SMAGND 0 V VCC 0 V DUTGND 2 5 V 3 3 V PLDVCC 0V PRIMAR PRIMAR 3 5 gt 5 oa ame 0 C29 i DUT GND SMA GND DUT VCC VCC TP23 1 21 20 25 RoHS Compliant SMA GND a YSN NI 05 23 719 BTI LLI BOARD www bti DSGNR 61 118 ON 839 Signal Generator Signal Generator INO DESIGNE ZEPHYR ON S
6. a STAC L tes lt 4 DUT GND SWA GND DUT PLD P20 271 RoHS Compliant On Board SDI Control for 11 Delay Register Push Button to Load Selected Dx Delay Bits External Control Inputs for SDI PLD for SDI Control 0 he JOVN 6 ON 8924 3015 Figure 3 NB6L295M Evaluation Board Layout Overview http onsemi com 3 NB6L295MNGEVB NB6L295MMNGEVB TEST AND MEASUREMENT SETUP AND PROCEDURE Basic Lab Equipment or Equivalent e Agilent Signal Generator 8133A for INx INx external Clock or Data source Tektronix TDS8000 Oscilloscope or Frequency Counter Agilent 6624A DC Power Supply Digital Voltmeter Matched high speed cables with SMA connectors Lab Setup A typical lab setup for taking time domain measurements in differential mode operation is shown in Figures 6 and 7 The following steps should be followed for proper equipment setup Step 1 Connect Power Supply The NB6L295M and NB6L295 have positive supply pins VCC VCCO and and negative supply pins DUT GND The SMAGND terminal is the isolated termination ground plane for the outputs only and is not to be confused with the device ground pin DUT GND Three power levels must be provided to the board VCC DUTGND and SMAGND Connect a power supplies to banana jack connectors for
7. 0 164 6218 Deltron DELTRON 571 0700 Yellow BANANA JACK J23 2 571 0500 164 7170 Deltron DELTRON 597 3111 407F Red LED LED1 LED2 LED3 LED4 LEDS5 LED_1206_AK Digikey 350 1565 1 ND Dialight LEDS LED7 LED LEDS LED7 LED8 LED9 eee LED11 1895 84 40 Hex Standoff 3 4 Se M2 M3 M5 1895K ND 382811 5 0 1 Shunt 4 6 7 9 11 13 15 A26229 ND AMP Tyco PMS 440 0025 4 40 Phillips Panhead 8 10 12 14 Digikey H342 ND Building Fasteners 1 4 e ERJ 3GEYJ154V 150k Digikey P150KGCT ND Panasonic sr 18 11 ERJ 3GEYJ301V R24 R26 R27 R28 R29 R30 603 Digikey P300GCT ND Panasonic R31 R32 R33 R34 R35 R32 R33 R34 R35 GT13MSCBE swspoT SWS_GT13MSCBE_ITT Digikey CKN2092CT ND 1 76PSBO9ST PianoDIP 9 SW_DIP_76PSB09 Digikey GH7145 ND Grayhill GRAYHILL 35 1002 Push Button Switch SW_EVQPLD_PAN Digi Key 5 416 1 76 5 025 SW PianoDIP 2 4 SW_DIP_76PSB02 Digikey GH7131 ND Grayhill GRAYHILL 5015 5015 KEYSTONE 5015 KEYSTONE Digikey 5015 Keystone 1 NB6L295 or DUT QFN 24 ON Semiconductor 61295 EPM7032AETC44 10 7032 44 80 1200 1200 120 000 44N 2 74 045 74ACT04 U3 U4 5014 Digi Key 74 045 Fairchild pe 2 5 NOPB LP3985 SOT23 5 Digi Key 9851 5 2 5 D 1 3525 040
8. EM B 3015 amp 4 Digital Oscilloscope or Frequency Counter Figure 7 Offset Power Supply Connections for CML Outputs NB6L295M http onsemi com 7 NB6L295MNGEVB NB6L295MMNGEVB Lna 1na ING 84 _ VWS 895 495 EC 217 deg sapjos dey Japjos 99S 595 ING ING 94 SH VWs 95 ano 1 E VWs er 1na WWwSs_ ez I fo ONI Japjos deg 1 295 Na VWS 1 LMS 00 1 dey 1 295 ca JINNA LOS Ber WS6Z19EN 1 nas ar 119 61 02 12 22 62 72 _ u 0 avons ina ONI ONI onsemi com http NB6L295MNGEVB NB6L295MMNGEVB Jequinn lt gt davis angana T 99 7 9 P 92 2 8 2 0 oza 219 vivas ZOIDDA
9. NB6L295MNGEVB NB6L295MMNGEVB NB6L295MNG NB6L295MMNG Evaluation Board User s Manual Introduction and Board Description The NB6L295M Evaluation Board was designed to provide a flexible and convenient platform to quickly evaluate characterize and verify the operation and performance of either the NB6L295MMNG CML or the NB6L295MNG LVPECL Dual Channel Programmable Delay This evaluation board manual contains Information on the NB6L295M Evaluation Board Appropriate Lab Setup Detailed Board Features Bill of Materials This manual should be used in conjunction with the device datasheet NB6L295M D or NB6L295 D which contains full technical details on the device specifications and operation The NB6L295M Evaluation Board was also designed to accommodate a custom 24 socket Therefore some external components were installed on the bottom side of the board Board Features On board programmable SDI circuitry minimizing cabling or external SDI accessed through SMA connectors Convenient and compact board layout 2 5 V or 3 3 single or split power supply operation banana jack connectors for VCC SMAGND and DUTGND Separate PLDVCC power supply for on board PLD CML or LVPECL differential output signals accessed via SMA connectors with provision for load termination resistors Semiconductor Components Industries LLC 2012 April 2012 Rev 3 ON Semiconductor hitp on
10. See datasheet DC Table AC Table as well as Figures 7 and 8 When using an external SDI source remove the three jumpers at J4 To use the SDI ports generate input SCLK SDATA and SLOAD signals via the appropriate SMA connectors with OFFSET LVCMOS LVTTL LEVELS i e 2 0 V HIGH and 1 3 LOW for a 3 3 LVPECL power supply The SCLK signal will sample the information presented on SDATA line Values are loaded and indexed into a 11 bit shift register The register shifts once per rising edge of the SCLK input The serial input SDATA bits must each meet setup and hold timing to the respective SCLK rising edge as specified in the AC Characteristics section of the datasheet document The LEAST Significant Bit LSB PSEL is indexed in first followed by MSEL and DO D1 D2 D3 D4 05 D6 and D7 through MOST Significant Bit MSB D8 indexed in last A Pulse on the SLOAD pin after the SHIFT register is fully indexed 11 clocks will load and latch the data values for the internal registers The SLOAD pulse Low to HIGH rising edge transition transfers the data from the SHIFT register to the LATCH register The SLOAD Pulse HIGH to LOW transition will lock the new data values into the LATCH register After the PLD programs the NB6L295 NB6L295M PLDVCC can be disconnected Input Output Enable When switch SW1 is in the UP position or is externally connected to a LOW through J15 SMA connector the outputs are ENABLED To monitor the
11. VCC PLDVCC DUTGND and SMAGND which are provided on the bottom of the board capacitors have been installed from VCC to SMAGND and from DUTGND to SMAGND at the banana jacks DUTGND PLDGND therefore when device power supply is 2 5 V or 3 3 V PLDVCC DUTVCC The exposed pad on the PCB for the QFN 24 package is connected to DUTGND Dual Power Supplies DUTGND SMAGND 3 3 V Figure 5 Split or Dual Power Supply Connections for NB6L295 LVPECL Outputs Dual Power Supplies DUTGND SMAGND 2 5 V Figure 4 Split or Dual Power Supply Connections for NB6L295M CML Outputs Table 1 NB6L295M CML OUTPUTS OFFSET POWER SUPPLY CONFIGURATIONS Power Supply Connector Color Device Pin Spilt Power Supply PLDVCC PLDVCC 0 V __ DUTGND DUTGND 2 5 V or 3 3 V Table 2 NB6L295 LVPECL OUTPUTS SPLIT POWER SUPPLY CONFIGURATIONS Power Supply Connector Device Pin Color Spilt Power Supply PLDVCC PLDVCC 2 0 V DUTGND DUTGND 0 5 V or 1 3 V http onsemi com 4 NB6L295MNGEVB NB6L295MMNGEVB Step 2 CML amp LVPECL Output Load Termination NB6L295M CML Outputs see Figures 4 and 7 The CML Qx and Qx outputs must be externally DC loaded and AC terminated A split or dual power supply technique can be used to take advantage of terminating the CML outputs into 50 to Ground of an oscilloscope or a frequency counter Since
12. ched cables to the differential inputs of the device INx and INx The differential inputs of the NB6L295 incorporate internal 50 Q termination resistors For Single Ended Mode Connect the single ended output of the generator to the INx input of the device Vi must be applied to the complementary input INx when operating in single ended mode Refer to the device datasheet for details on single ended operation The VTx and VTx termination pins each have a trace from package pin to a node where it can be connected to either VCC DUTGND or SMAGND depending on the user s need Step 4 Program the SDI The internal delay registers of the NB6L295 NB6L295M may be programmed by a the onboard PLD or b by using the three lines for an external Serial Data Interface SDD consisting of a SERIAL DATA SDATA input a SERIAL CLOCK SCLK input and a SERIAL LOAD SLOAD as follows a Onboard PLD When using the onboard PLD for the SDI source 1 Install the three jumpers located at J4 2 Insure PLDVCC power is applied 3 The 11 bit switches will program the NB6L295 s 11 bit shift register Set SW2 and SW4 switches to the desired values for the 11 bit word 4 Load the program values by depressing momentary switch SW3 or send a pulse signal 125 ns min through J1 Refer to the NB6L295 datasheet for details on the proper settings for these switches b External SDI An external SDI source can also program the NB6L295 NB6L295M
13. lication Buyer shall indemnify and hold SCILLC and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part SCILLC is an Equal Opportunity Affirmative Action Employer This literature is subject to all applicable copyright laws and is not for resale in any manner PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT American Technical Support 800 282 9855 Toll Free Semiconductor Website www onsemi com Literature Distribution Center for ON Semiconductor USA Canada P O Box 5163 Denver Colorado 80217 USA Europe Middle East and Africa Technical Support Order Literature http www onsemi com orderlit Phone 303 675 2175 or 800 344 3860 Toll Free USA Canada Phone 421 33 790 2910 2 l Fax 303 675 2176 or 800 344 3867 Toll Free USA Canada Japan Customer Focus Center For additional information please contact your local Email orderlit onsemi com Phone 81 3 5817 1050 Sales Representative EVBUM2082 D
14. semi com EVAL BOARD USER S MANUAL SMA connectors are provided for 1 all high speed differential input amp CML or LVPECL output signals and 2 for external SDI amp control signals access Board Layout The evaluation board is constructed in four layers The top layer is the primary trace layer and is made with polyimide material This layer provides a high bandwidth 50 Q controlled trace impedance environment for the equal length inputs and outputs The second layer is a copper ground plane Layer Stack L1 Signal High and Low Speed L2 SMA Ground 13 Device positive power supply and DUTGND Device negative power supply 14 Signal Low Speed What measurements can you expect to make With this evaluation board the following measurements could be performed in single ended or differential modes of operation Propagation and Programmed Delay Output Rise and Fall Time Frequency Performance Jitter Common Mode Range Publication Order Number EVBUM2082 D NB6L295MNGEVB NB6L295MMNGEVB 4614 18 ON 828 rps 5 NI rp YSN NI 30VN ib 1 gt Figure 2 NB6L295MMNGEVB Evaluation Board Photo hitp onsemi com 2 NB6L295MNGEVB NB6L295MMNGEVB DUTGND PLDGND gt lt 0 9 0 D U T G N D 2007 E

NB6L295MNG / NB6L295MMNG Evaluation Board User`s Manual

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