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NI PXI-6683 Series User Manual

1. National Instruments A 1 Appendix A Specifications PFI lt 0 2 gt Output Characteristics Frequency Lange eeeeeeceseceeceneeeteceneeeseeees DC to 50 MHz Output impedance 50 Q nominal Output coupling DC Output voltage levels Output high cee eeeseeeeceeceeceteeteeaeenes 1 2 V min 1 6 V typical for 50 load to ground 2 6 V min 3 3 V typical for 1 MQ load Output LOW ooo ccecceceeeeeceeceeceeeeeeaeenes 0 1 V max 0 V typical for 50 Q load to ground 0 1 V max 0 V typical for 1 MQ load Absolute maximum applied voltage 0 to 4 4 V Output to output skew asynchronous PXI STAR to PFI routes ccccccecescseseesceeee lt 400 ps typical Output to output skew other asynchronous routes 00 0 ceceeeeeeeeneeee lt 1 5 ns typical Output to output skew synchronous routes lt 2 ns typical Synchronized trigger clock to out time tgo eeceececceeceeceseeseeeceseceeceecaecnseeseeseate 10 ns max relative to CLKOUT when configured to route PXI_CLK10 Output current 0 eee ceteeeeeeteeeeecneeeereeneeees 48 mA max Square wave rise fall time 10 to 90 for 50 Q load lt 1 ns typical Input Characteristics Frequency Tange eeeeeeceseceecerseeteceeeeneceees DC to 50 MHz Input impedance 1 kQ nominal Input coupling oo ee ececeeseseeseeeeceececeeeeesenee DC Nominal voltage level oo ccccccceseseereeeeeeeeeeeee 0 to 3 3 V 5 V tolerant Absolute maxi
2. National Instruments A 3 Appendix A Specifications 2009 If the year is not supplied sent as 00 the OS system time is read and the year is derived from it To achieve proper synchronization of the NI PXI 6683 Series ensure that the IRIG B source used conforms to the requirements listed above Note that most IRIG B sources conform to these requirements PXI_STAR Trigger Characteristics NI PXI 6683 only Output to output skew PFI to PXI_STAR routes oo eeeeeeceeeeteeee lt 400 ps Output to output skew synchronous triggers lt 2 ns typical Asynchronous delays tpa PXI_STAR lt 0 12 gt to PFIK lt O 2 gt output oe cee eeeeeereeeeeeeeeeeeees 8 5 ns typical PXI STAR lt 0 12 gt to PXI _TRIG lt 0 7 gt output eee 10 to 18 ns typical PXI Trigger Characteristics Output to output skew oe eeeeeceeseeteteseeteeeeee lt 5 ns typical Asynchronous delay tpa PXI_TRIG lt 0 7 gt to PFI 2 gt OUt put a sis ccssccsevsssesssesnecosdesancaeee 13 to 23 ns typical Timestamping and Time Synchronized Clock Generation Time sychronized clock period and duty cycle resolution 10 ns Note Clock signals generated on PFI PXI_ STAR NI PXI 6683 only or PXI Trigger lines must have a period and duty cycle that is a multiple of 10 ns Minimum pulse width for timestamping 22 ns TCXO Characteristics TCG UCC Yi a ssisc cnhci tel ceovepteetiecereerssnceaeeteocuen Initial accuracy z Tempe
3. By default this signal is the output of the native 10 MHz oscillator in the chassis An NI PXI 6683 Series in the system timing slot can replace this signal with PXI_CLK10_IN Oscillator N A This is the output of the 10 MHz TCXO It is used by the FPGA for synchronization An NI PXI 6683 in the system timing slot can be routed to CLKOUT or PXI_CLK10_IN The TCXO is a very stable and accurate frequency source CLKIN In CLKIN is a signal connected to the SMB input Not in NI PXI 6683H pin of the same name An NI PXI 6683 in the system timing slot can route CLKIN to PXI CLK10_IN CLKOUT Out CLKOUT is the signal on the SMB output pin of the same name Either the oscillator TCXO or PXI_CLK10 may be routed to this output PXI_STAR lt 0 12 gt In Out The PXI star trigger bus connects the system Not in NI PXI 6683H timing slot to Slot lt 3 15 gt in a star configuration The electrical paths of each star line are closely matched to minimize intermodule skew An NI PXI 6683 in the system timing slot can route signals to Slots lt 3 15 gt using the star trigger bus National Instruments 3 7 Chapter 3 Hardware Overview Table 3 5 NI PXI 6683 Series I O Terminals Continued Signal Name Direction Description PFI lt 0 2 gt In Out The Programmable Function Interface pins on the NI PXI 6683 Series route timing and triggering signals between multiple PXI chassis A wide variety of input and output
4. USES OR MISUSES OR ERRORS ON THE PART OF THE USER OR APPLICATIONS DESIGNER ADVERSE FACTORS SUCH AS THESE ARE HEREAFTER COLLECTIVELY TERMED SYSTEM FAILURES ANY APPLICATION WHERE A SYSTEM FAILURE WOULD CREATE A RISK OF HARM TO PROPERTY OR PERSONS INCLUDING THE RISK OF BODILY INJURY AND DEATH SHOULD NOT BE RELIANT SOLELY UPON ONE FORM OF ELECTRONIC SYSTEM DUE TO THE RISK OF SYSTEM FAILURE TO AVOID DAMAGE INJURY OR DEATH THE USER OR APPLICATION DESIGNER MUST TAKE REASONABLY PRUDENT STEPS TO PROTECT AGAINST SYSTEM FAILURES INCLUDING BUT NOT LIMITED TO BACK UP OR SHUT DOWN MECHANISMS BECAUSE EACH END USER SYSTEM IS CUSTOMIZED AND DIFFERS FROM NATIONAL INSTRUMENTS TESTING PLATFORMS AND BECAUSE A USER OR APPLICATION DESIGNER MAY USE NATIONAL INSTRUMENTS PRODUCTS IN COMBINATION WITH OTHER PRODUCTS IN A MANNER NOT EVALUATED OR CONTEMPLATED BY NATIONAL INSTRUMENTS THE USER OR APPLICATION DESIGNER IS ULTIMATELY RESPONSIBLE FOR VERIFYING AND VALIDATING THE SUITABILITY OF NATIONAL INSTRUMENTS PRODUCTS WHENEVER NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION INCLUDING WITHOUT LIMITATION THE APPROPRIATE DESIGN PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION Contents About This Manual National Instruments Documentation cccccccssessessessesseeceescescesceseeeeeeeetsececeeceaeeaeease vii Related Documentation ssessssccsceaecseeecsctketteapabis ehh iE E NEEE Vil Chapter 1 Introduction
5. the measure of the stability of an instrument and its capability to give the same measurement over and over again for the same input signal the amount of time required for a signal to pass through a circuit a rugged open system for modular instrumentation based on CompactPCI with special mechanical electrical and software features The PXIbus standard was originally developed by National Instruments in 1997 and is now managed by the PXIbus Systems Alliance a special set of trigger lines in the PXI backplane for high accuracy device synchronization with minimal latencies on each PXI slot the clock signal that is used to synchronize the PXI Triggers or PXI_STAR triggers on an NI PXI 6683 the PXI timing bus that connects PXI devices directly by means of connectors on top of the devices for precise synchronization of functions seconds the actual time difference between two events that would ideally occur simultaneously Inter channel skew is an example of the time differences introduced by different characteristics of multiple channels Skew can occur between channels on one module or between channels on separate modules intermodule skew a computer or peripheral device controlled by another computer the place in the computer or chassis in which a card or module can be installed sub miniature type B a small coaxial signal connector that features a snap coupling for fast connection National Instruments G 5 Glos
6. 10 MHz Duty cycle distortion c cccceseseeseseeeeteeeeees lt 1 typical Output Impedance eececeseeseeseetecseeteeteeteees 50 Q nominal Output coupling AC PXI_CLK10 to CLKOUT delay 8 ns typical Load Square Wave Open Load 5 Vp p typical 50 Q Load 2 5 Vp p typical Square wave rise fall time TOE IOA srin lt 1 ns typical CLKIN Characteristics NI PXI 6683 only CLKIN input frequency ccecececeeseeeeeeeees 10 MHz 100 ppm sine or square wave Input impedance 0 0 ceceeseeseeseeseeseeseeeceeeeeeeeees 50 Q nominal Input COUp ING 0 eee eeeeeeeecneeeeeecneeeeneeees AC Voltage range oo eeeeeeeeeseeeeeecesceeceeceteeteeeeaeenes 400 mV to 5 Vp p Absolute maximum input voltage 0 6 Vp p CLKIN to PXI_CLK10_IN delay 0 11 ns typical Jitter added to CLKIN 1 3 pSims 10 Hz to 100 kHz typical Duty cycle distortion of CLKIN to PXI CLK 10 IN irane innir lt 1 typical Required input duty cycle oo eeeeeeeeeeees 45 to 55 1 When configured to route the on board oscillator TCXO or PXI_CLK10 otherwise CLKOUT will be disabled default 2 This is a requirement of the PXI specification 3 Stresses beyond those listed can cause permanent damage to the device Exposure to absolute maximum rated conditions for extended periods of time can affect device reliability Functional operation of the device outside the conditions indicated in the operational parts of the specification is not implied
7. PFI pin PFI lt 0 2 gt e Any PXI star trigger line PXI_STAR lt 0 12 gt NI PXI 6683 only Any PXI Trigger line PXI_TRIG lt 0 7 gt Synchronous Routing A synchronous routing operation is defined in terms of three signals a source a destination and a synchronization clock A digital signal comes in on the source and is propagated to the destination after the edge has been realigned with the synchronization clock Unlike asynchronous routing the output of a synchronous routing operation does not directly follow the input after a propagation delay Instead the output waits for the next rising edge of the clock before it follows the input Thus the output is said to be synchronous with this clock Synchronous routing can send triggers to several places in the same clock cycle or send the trigger to those same places after a deterministic skew of a known number of clock cycles If a signal arrives at two chassis within the same clock cycle each NI PXI 6683 Series module realigns the signal with the synchronization clock and distributes it to the modules in each chassis at the same time Synchronous routing can thus remove uncertainty about when triggers are received If the delays through the system are such that an asynchronous trigger might arrive near the edge of the receiver clock the receiver might see the signal in the first clock cycle or it might see it in the second clock cycle However by synchronizing the signal you
8. and then roll over to 0 e Minutes begin every hour at 0 increment to 59 and then roll over to 0 e Hours begin every day at 0 increment to 23 and then roll over to 0 e Days begin every year at 1 Days increment to 365 in non leap years or to 366 in leap years and then roll over to 1 Leap years must be supported Valid values for year are 01 to 99 inclusive Years are assumed to be in the XXI Century For instance year 09 represents 2009 If the year is not supplied sent as 00 the OS system time is read and the year is derived from it To achieve proper synchronization of the NI PXI 6683 Series ensure that the IRIG B source used conforms to the requirements listed above Note that most IRIG B sources conform to these requirements IEEE 1588 The NI PXI 6683 Series is capable of performing synchronization over Ethernet using IEEE 1588 It is possible to configure the NI PXI 6683 Series to synchronize to GPS or IRIG B and then function as an IEEE 1588 grandmaster It is also possible to configure the NI PXI 6683 Series to synchronize to IEEE 1588 in which case the standard defines how the master will be selected If the NI PXI 6683 Series is selected as IEEE 1588 master and it is not configured to synchronize to GPS or IRIG B it will use its internal free running timebase which will be updated to the host computer s system time during power up PPS The NI PXI 6683 Series is capable of using a PPS pulse per second
9. beneficial to the environment and to NI customers For additional environmental information refer to the Minimize Our Environmental Impact web page at ni com environment This page contains the environmental regulations and directives with which NI complies as well as other environmental information not included in this document National Instruments A 9 Appendix A Specifications Waste Electrical and Electronic Equipment WEEE BSA EU Customers At the end of the product life cycle all products must be sent to a WEEE recycling center For more information about WEEE recycling centers National Instruments WEEE initiatives and compliance with WEEE Directive 2002 96 EC on Waste and Electronic Equipment visit ni com environment weee BT Re mises SEDE HE ROHS OO RAA National Instruments 46 F E ETAR A mh hP RANER EE ROHS XF National Instruments FE ROHS AAEE E WK ni com environment rohs_china For information about China RoHS compliance go to ni com environment rohs_china A 10 ni com IRIG Protocol Overview IRIG Inter Range Instrumentation Group is a standard used to transmit precise timing information between instruments to achieve synchronization There are 6 different IRIG standards defined A B D E G and H The main difference between the standards is the rate with which the synchronization pulses and the information bits are sent The standards also differ slightly in the content of
10. module resources The two LEDs on the front panel provide information about module status The front panel description sections of Chapter 3 Hardware Overview describe the LEDs in greater detail 2 2 ni com Hardware Overview This chapter presents an overview of the hardware functions of the NI PXI 6683 Series shown in Figure 3 1 Figure 3 1 Isometric View of the NI PXI 6683 Series 1 NI PXI 6683 2 NI PXI 6683H National Instruments 3 1 Chapter 3 Hardware Overview Figure 3 2 provides a functional overview of the NI PXI 6683 Series Figure 3 2 Functional Overview of the NI PXI 6683 Not in NI PXI 6683H AC Coupled Clock Detector PXI_CLK10_IN TCXO ERS Stine eciiese SSisie sie Oscillator CLKOUT amp AC Coupling PXI_CLK10 PXI GPS RF IN GPS DAC 5 V DC OUT i Receiver PFIO Not in NI PXI 6683H EN IMGBAM lao be ee been eee eas z E i Receiver A PFIO Digital Synchronization 7 PXI TRIG lt O rs B Clock Generation and PFI 1 gt Routing Circuitry PFI 2 a Ethernet Ethernet lt _ gt lt _ __ gt Port Controller PCI Interface Note The NI PXI 6683H does not have PXI STAR trigger lines shown as PXI _STAR lt 0 12 gt in Figure 3 2 The NI PXI 6
11. package and inspect the module for loose components or any sign of damage Notify NI if the module appears damaged in any way Do not install a damaged module into the computer Store the NI PXI 6683 Series in the antistatic envelope when not in use Software Programming Choices The NI PXI 6683 Series uses NI Sync software as its driver When programming the NI PXI 6683 Series you can use NI application development environment ADE software such as LabVIEW or LabWindows CVI or you can use other ADEs such as Visual C C to interface with the NI Sync software LabVIEW features interactive graphics a state of the art interface and a powerful graphical programming language The LabVIEW Data Acquisition VI Library a series of virtual instruments for using LabVIEW with National Instruments DAQ hardware is included with LabVIEW LabWindows CVI is a complete ANSI C ADE that features an interactive user interface code generation tools and the LabWindows CVI Data Acquisition and Easy I O libraries Safety Information The following section contains important safety information that you must follow when installing and using the product Do not operate the product in a manner not specified in this document Misuse of the product can result in a hazard You can compromise the safety protection built into the product if the product is damaged in any way If the product is damaged return it to National Instruments for repair 1 2
12. period ttt TRIG B performance depends on IRIG B source stability and quality National Instruments A 7 Appendix A Specifications Environmental Operating Environment Ambient temperature range Relative humidity range Maximum altitude Pollution Degree Indoor use only Storage Environment Ambient temperature range Relative humidity range Shock and Vibration Operational Shock Random Vibration Operating Nonoperating Note Specifications are subject to Safety 0 to 55 C Tested in accordance with IEC 60068 2 1 and IEC 60068 2 2 10 to 90 noncondensing Tested in accordance with IEC 60068 2 56 2 000 m at 25 C ambient temperature 2 40 to 70 C Tested in accordance with IEC 60068 2 1 and ITEC 60068 2 2 5 to 95 noncondensing Tested in accordance with IEC 60068 2 56 30 g peak half sine 11 ms pulse Tested in accordance with IEC 60068 2 27 Test profile developed in accordance with MIL PRF 28800F 5 to 500 Hz 0 3 Sms 5 to 500 Hz 2 4 Sms Tested in accordance with IEC 60068 2 64 Nonoperating test profile exceeds the requirements of MIL PRF 28800F Class 3 change without notice This product is designed to meet the requirements of the following standards of safety for electrical equipment for measurement control IEC 61010 1 EN 61010 1 UL 61010 1 CSA 61010 1 and laboratory use Note For UL and other safety certifications refer to the prod
13. signal for synchronization Any PFI PXI_ Trigger or PXI Star line can be configured as the PPS input terminal When synchronizing based on a PPS the first pulse received will set the NI PXI 6683 Series internal timebase to either an arbitrary time supplied by the user or the host computer s system time 4 2 ni com NI PXI 6683 Series User Manual Each subsequent pulse received will be interpreted as a second s boundary the pulse occurring exactly 1 second after the previous pulse As each pulse is received the NI PXI 6683 Series will adjust its internal timebase to match the frequency of the PPS source For best results when using PPS Time Reference ensure that the device supplying the PPS signal is capable of providing a stable consistent 1Hz signal Error can be induced into the system if the reference signal contains significant jitter or if the reference frequency strays from 1 Hz Synchronization Best Practices The NI PXI 6683 Series can achieve sub microsecond synchronization The following section describes some guidelines for achieving the best possible performance from your NI PXI 6683 Series module While the NI PXI 6683 Series will function properly if you follow the specifications the following guidelines may increase the synchronization performance Operating Environment In order to achieve the best synchronization performance refer to the following guidelines to provide a thermally stable environment Also e
14. signals can be routed to or from the PFI lines PFI lt 0 gt also can function as an input for IRIG B DC or AM PXI_TRIG lt 0 7 gt In Out The PXI trigger bus consists of eight digital lines shared among all slots in the PXI chassis The NI PXI 6683 Series can route a wide variety of signals to and from these lines The remainder of this chapter describes how these signals are used acquired and generated by the NI PXI 6683 Series hardware and explains how you can use the signals between various locations to synchronize events in your system Clock and Event Generation The NI PXI 6683 Series can generate two types of clock signals The first type is generated with a precise 10 MHz oscillator and the second is generated with the synchronized timebase The following sections describe the two types of clock generation and explain the considerations for choosing either type In addition to time synchronized clock signals the NI PXI 6683 Series is also capable of generating arbitrary digital events to be used as triggers TCXO PXI_CLK10 and Clock Disciplining The NI PXI 6683 Series features a precision 10 MHz TCXO The frequency accuracy and stability of this clock is greater than the frequency accuracy and stability of the native 10 MHz PXI backplane clock PXI_CLK10 The main source of error in most frequency reference oscillators is temperature variation The TCXO contains circuitry to measure the temperature
15. specifications are stored in the onboard nonvolatile memory EEPROM The driver software uses these stored values Factory Calibration All NI PXI 6683 Series boards go through factory calibration During that process the TCXO frequency is adjusted so that it matches a reference 10 MHz atomic clock A calibration constant is then stored in on board non volatile memory along with other calibration metadata such as calibration date and temperature The calibration constant is used at start up when the board is configured for free running mode When the NI PXI 6683 Series board is configured to use GPS IEEE 1588 IRIG B or PPS as its time reference the TCXO frequency is adjusted according to the time reference and the calibration constant is no longer used If the board returns to free running mode because it was so configured or the time reference is no longer present then the last applied TCXO voltage is retained it does not revert to the calibration constant Note Ifthe board is configured to use IEEE 1588 as time reference and selected as 1588 Master through 1588 s Best Master Clock algorithm the board will be free running and use its calibration constant Additional Information Refer to ni com calibration for additional information on NI calibration services National Instruments 5 1 Specifications CLKOUT Characteristics Output frequency oo ecceececessseeeeeteteseseseeees
16. the beginning of the second position identifier is the second s boundary For pulse width modulated systems conventional digital binary signaling is used and mark is defined as the logic high state while space is defined as the logic low state B 2 ni com NI PXI 6683 Series User Manual For amplitude modulated systems the source must generate sinusoidal signaling modulating the amplitude such that it has a 10 3 mark space amplitude ratio the range of allowable mark to space ratios is 3 1 to 6 1 The source must phase align the generated sine wave such that the leading edges of bits are coincident with zero crossings of the sine wave Figure B 1 shows an example of transmission of a binary one a binary zero and two position identifiers with the second s boundary at the leading edge of the second position identifier The figure shows the information transmitted using an amplitude modulated signal and a pulse width modulated signal Figure B 1 IRIG B AM and DC Transmission Example a 3 ad 14 g 2 0 zl K o aL i 0 5m 10m 15m 20m 25m 30m 35m 40m Time 1 o Gi 2 OF I i 1 I 1 i 0 5m 10m 15m 20m 25m 30m 35m 40m Time Binary One Binary Zero Position Identifier Position Identifier Second s Boundary IRIG B is one of the most common IRIG standards used The following table describes how the information is transmitted when using IRIG B each second Table B 3 IRIG B Bit Assig
17. u micro 10 6 m milli 103 k kilo 103 M mega 106 Symbols percent plus or minus kg positive of or plus negative of or minus per j degree Q ohm A AC alternating current ADE application development environment asynchronous a property of an event that occurs at an arbitrary time without synchronization to a reference clock National Instruments G 1 Glossary B backplane bus CLKIN CLKOUT clock CompactPCI G 2 ni com an assembly typically a printed circuit board PCB with 96 pin connectors and signal paths that bus the connector pins PXI systems have two connectors called the J1 and J2 connectors the group of conductors that interconnect individual circuitry in a computer Typically a bus is the expansion vehicle to which I O or other devices are connected An example of a PC bus is the PCI bus Celsius CLKIN is a signal connected to the SMB input pin of the same name CLKIN also can serve as PXI_CLK10_IN CLKOUT is the signal on the SMB output pin of the same name PXI_CLK10 can be routed to CLKOUT hardware component that controls timing for reading from or writing to groups an adaptation of the Peripheral Component Interconnect PCI Specification 2 1 or later for industrial and or embedded applications requiring a more robust mechanical form factor than desktop PCL It uses industry standard mechanical components and high performance connector technologies to
18. when there is a hardware malfunction 1588 LED The 1588 LED indicates the status of the IEEE 1588 synchronization protocol Refer to Figure 3 3 for the 1588 LED location Table 3 2 summarizes what the 1588 LED indicates Table 3 2 1588 LED Color Description Color Status Off Not using 1588 Amber Initializing Blinking Amber 2 seconds Listening or Passive Green Uncalibrated or Slave Blinking Green 2 seconds Master or Premaster Red Faulty 1588 has been disabled or stopped 3 4 ni com NI PXI 6683 Series User Manual Ethernet Speed LED The Ethernet Speed LED indicates the NI PXI 6683 Series Ethernet link speed Refer to Figure 3 3 for the Ethernet Speed LED location Table 3 3 summarizes what the Ethernet Speed LED indicates Table 3 3 Ethernet Speed LED Description Color Status Off 10 Mbps Green 100 Mbps Amber 1000 Mbps 4 Note When there is no Ethernet link the Ethernet Speed LED is off Ethernet ACT LINK LED The Ethernet ACT LINK LED indicates the NI PXI 6683 Series Ethernet link condition Refer to Figure 3 3 for the Ethernet ACT LINK LED location Table 3 4 summarizes what the Ethernet ACT LINK LED indicates Table 3 4 Ethernet ACT LINK LED Color Description Color Status Off No Ethernet link Green Ethernet link established Blink Ethernet activity occurring Connectors This section describes th
19. 17 signal description table 3 8 specifications A 4 R related documentation vii RJ 45 Ethernet connector description 3 6 routing signals front panel triggers using as inputs 3 12 using as outputs 3 12 overview 3 9 possible sources and destinations table 3 11 PXI star triggers 3 15 PXI triggers 3 14 overview 3 13 types asynchronous 3 16 synchronous 3 17 NI PXI 6683 Series User Manual S safety specifications A 8 shock and vibration specifications A 8 signal source 3 10 possible sources table 3 11 software installing 2 1 NI resources C 1 programming choices overview 1 2 source possible sources table 3 11 signal 3 10 specifications CE compliance A 9 CLKIN characteristics A 1 CLKOUT characteristics A 1 electromagnetic compatibility A 9 environmental A 8 environmental management A 9 GPS characteristics A 5 online product certification A 9 PFI lt 0 2 gt input characteristics A 2 output characteristics A 2 physical A 5 power requirements A 6 PXI trigger characteristics A 4 PXI STAR trigger characteristics A 4 safety A 8 shock and vibration A 8 synchronization accuracy A 7 synchronized future time clock generation A 4 TCXO characteristics A 4 timestamping characteristics A 4 star triggers See PXI_ STAR lt 0 12 gt support technical C 1 National Instruments 1 3 Index synchronization accuracy A 7 best practices 4 3 GPS 4 4 IEEE 1588 4 4 net
20. 683H does not have the CLKIN circuitry or the ability to drive PXI_CLK10_IN 3 2 ni com NI PXI 6683 Series User Manual NI PXI 6683 Series Front Panel Figure 3 3 shows the connectors and LEDs on the front panel of the NI PXI 6683 Series Figure 3 3 NI PXI 6683 Front Panel o Yy NATIONAL DP INSTRUMENTS NI PXI 6683 Timing Module Ot GPS ANT CLK OUT CLK IN PFI O IRIG B IN PFI1 PFI 2 1 GPS LED 6 PFIO IRIG B Input Connector 2 1588 LED 7 PFI lt 1 2 gt Connectors 3 GPS Antenna Connector 8 Ethernet Speed LED 4 CLKOUT Connector 9 Ethernet ACT LINK LED 5 CLKIN Connector 10 RJ 45 Ethernet Connector Note The NI PXI 6683H does not have the CLKIN connector shown as item 5 in Figure 3 3 National Instruments 3 3 Chapter 3 Hardware Overview GPS LED The GPS LED indicates the status of the GPS hardware Refer to Figure 3 3 for the GPS LED location Table 3 1 summarizes what the GPS LED indicates Table 3 1 GPS LED Color Description Color Status Off Not using GPS Amber Attempting to start self survey Blinking Amber Self survey in progress Blinking Green Self survey complete normal operation Red Error The GPS LED is turned off if GPS is not set as the time reference Anerror is generated when the antenna is disconnected when there is an antenna malfunction or
21. B 5 Technical Support and Professional Services Log in to your National Instruments ni com User Profile to get personalized access to your services Visit the following sections of ni com for technical support and professional services e Support Technical support at ni com support includes the following resources Self Help Technical Resources For answers and solutions visit ni com support for software drivers and updates a searchable KnowledgeBase product manuals step by step troubleshooting wizards thousands of example programs tutorials application notes instrument drivers and so on Registered users also receive access to the NI Discussion Forums at ni com forums NI Applications Engineers make sure every question submitted online receives an answer Standard Service Program Membership This program entitles members to direct access to NI Applications Engineers via phone and email for one to one technical support as well as exclusive access to self paced online training modules at ni com self paced training All customers automatically receive a one year membership in the Standard Service Program SSP with the purchase of most software products and bundles including NI Developer Suite NI also offers flexible extended contract options that guarantee your SSP benefits are available without interruption for as long as you need them Visit ni com ssp for more information For information about othe
22. IEEE 1588 synchronization 4 2 best practices 4 4 network topology 4 4 l 2 ni com installation antenna 4 4 category 1 3 hardware 2 1 software 2 1 instrument drivers NI resources C 1 IRIG B synchronization 4 1 K KnowledgeBase C 1 L LED Link LED 3 5 light emitting diode See LED M maximum signal rating caution 3 6 N National Instruments support and services C 1 network topology 4 4 NI PXI 6683 Series configuration 2 2 connectors 3 5 functional overview 3 6 installation hardware 2 1 software 2 1 O operating environment 4 3 P PFI lt 0 2 gt connector description 3 6 connector signals table 3 8 signals asynchronous routing 3 17 specifications A 2 using front panel PFI terminals as inputs 3 12 using front panel PFI terminals as outputs 3 12 PFI synchronization clock 3 6 physical specifications A 5 power requirement specifications A 6 PPS synchronization 4 2 programming examples NI resources C 1 PXI backplane clock 3 8 PXI star trigger bus See PXI_STAR lt 0 12 gt PXI trigger bus See PXI_TRIG lt 0 7 gt PXI_CLK10 clock generation 3 8 PXI_CLK10_IN routing from the CLKIN connector 3 6 signal description table 3 7 PXI_CLK10_OUT signal description table 3 7 routing to the CLKOUT connector 3 5 PXI_STAR lt 0 12 gt asynchronous routing 3 17 signal description table 3 7 specifications A 4 PXI_TRIG lt 0 7 gt asynchronous routing 3
23. MAINS for measuring purposes National Instruments 1 3 Chapter 1 Introduction 1 4 measurements include signal levels special equipment limited energy parts of equipment circuits powered by regulated low voltage sources and electronics Installation Category II is for measurements performed on circuits directly connected to the electrical distribution system This category refers to local level electrical distribution such as that provided by a standard wall outlet for example 115 V for U S or 230 V for Europe Examples of Installation Category II are measurements performed on household appliances portable tools and similar products Installation Category III is for measurements performed in the building installation at the distribution level This category refers to measurements on hard wired equipment such as equipment in fixed installations distribution boards and circuit breakers Other examples are wiring including cables bus bars junction boxes switches socket outlets in the fixed installation and stationary motors with permanent connections to fixed installations Installation Category IV is for measurements performed at the primary electrical supply installation lt 1 000 V Examples include electricity meters and measurements on primary overcurrent protection devices and on ripple control units ni com Installing and Configuring This chapter describes how to install the NI P XI 6683 Series hardware a
24. National Instruments will at its option repair or replace software media that do not execute programming instructions if National Instruments receives notice of such defects during the warranty period National Instruments does not warrant that the operation of the software shall be uninterrupted or error free A Return Material Authorization RMA number must be obtained from the factory and clearly marked on the outside of the package before any equipment will be accepted for warranty work National Instruments will pay the shipping costs of returning to the owner parts which are covered by warranty National Instruments believes that the information in this document is accurate The document has been carefully reviewed for technical accuracy In the event that technical or typographical errors exist National Instruments reserves the right to make changes to subsequent editions of this document without prior notice to holders of this edition The reader should consult National Instruments if errors are suspected In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it EXCEPT AS SPECIFIED HEREIN NATIONAL INSTRUMENTS MAKES NO WARRANTIES EXPRESS OR IMPLIED AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE CUSTOMER S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUMENTS SHALL BE LIMI
25. O oscillator output impedance PCI G 4 ni com Inter Range Instrumentation Group a standard used to transmit precise timing information the rapid variation of a clock or sampling frequency from an ideal constant frequency a graphical programming language light emitting diode a semiconductor light source the requesting or controlling device in a master slave configuration a controlled centralized configuration environment that allows you to configure all of your National Instruments DAQ GPIB IMAQ IVI Motion VISA and VXI devices a device that generates a fixed frequency signal An oscillator most often generates signals by using oscillating crystals but also may use tuned networks lasers or atomic clock sources The most important specifications on oscillators are frequency accuracy frequency stability and phase noise the measured resistance and capacitance between the output terminals of a circuit Peripheral Component Interconnect a high performance expansion bus architecture originally developed by Intel to replace ISA and EISA It is achieving widespread acceptance as a standard for PCs and work stations it offers a theoretical maximum transfer rate of 132 Mbytes s PFI PPS precision propagation delay PXI PXI star PXI Trig PXI Star synchronization clock PXI Trigger skew slave slot SMB NI PXI 6683 Series User Manual Programmable Function Interface Pulse Per Second
26. PS Synchronization Best Practices The NI PXI 6683 Series device has one SMB female connector on its front panel for a GPS active antenna The connector provides a DC voltage to power the antenna and also serves as input for the GPS RF signal Antenna Installation Caution National Instruments recommends using a lightning arrester in line with the GPS antenna installation to protect the NI PXI 6683 Series device and the PXI system from possible damage and operators from injury in the event of lightning The embedded GPS receiver in the NI PXI 6683 Series device requires signals from several satellites to compute accurate timing and location The more satellites available to the receiver the more accurately it can determine time and location Therefore the antenna location should be such that it receives signals from the greatest number of satellites possible As the number of satellites visible to the antenna decreases the synchronization performance may also decrease Choose the antenna location so that the antenna has a clear view of the sky There is no strict definition for a clear view of the sky but a suitable guideline is that the GPS antenna should have a straight line of sight to the sky in all directions 360 down to an imaginary line making a 30 4 4 ni com NI PXI 6683 Series User Manual angle with the ground Locations far from trees and tall buildings that could block or reflect GPS satellite signals are best Maximum C
27. PXI NI PXI 6683 Series User Manual NI PXI 6683 and NI PXI 6683H Timing and Synchronization Modules for PXI July 2013 7 NATIONAL 373656A 01 y INSTRUMENTS Worldwide Technical Support and Product Information ni com Worldwide Offices Visit ni com niglobal to access the branch office Web sites which provide up to date contact information support phone numbers email addresses and current events National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 512 683 0100 For further support information refer to the Technical Support and Professional Services appendix To comment on National Instruments documentation refer to the National Instruments Web site at ni com info and enter the Info Code feedback 2013 National Instruments All rights reserved Important Information Warranty NI devices are warranted against defects in materials and workmanship for a period of one year from the invoice date as evidenced by receipts or other documentation National Instruments will at its option repair or replace equipment that proves to be defective during the warranty period This warranty includes parts and labor The media on which you receive National Instruments software are warranted not to fail to execute programming instructions due to defects in materials and workmanship for a period of 90 days from the invoice date as evidenced by receipts or other documentation
28. TED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA PROFITS USE OF PRODUCTS OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brought within one year after the cause of action accrues National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control The warranty provided herein does not cover damages defects malfunctions or service failures caused by owner s failure to follow the National Instruments installation operation or maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or other events outside reasonable control Copyright Under the copyright laws this publication may not be reproduced or transmitted in any form electronic or mechanical including photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation National Instruments respects the intellectual property of others and we ask our users to do the same NI software is protected b
29. What You Need to Get Started cecccececcecceccesceeeseeseesecsecsecaecaeeaeeseeseeeeeeeeeeeeeeeeeeeeeeeeeees Unpacking cee ceeeseneeeeeeeeees Software Programming Choices Safety Information sts aeneae desde ee ide RE NRT Chapter 2 Installing and Configuring Installing the Software nnes DEE AEAEE E 2 1 Installing the Hardware sroine eE AAEN ENEKE KEEKEKE Eas 2 1 Verifying the Installati n nenn a aE E EA E 2 2 Configuring the Module ccecceecescesceseeseesecsecsecsecaeesceseeseeeeseeeeeeeeeeeeeeeeeeeceseseeseeteeeeees 2 2 Chapter 3 Hardware Overview NILPXI 6683 Series Front Panelsissonigcinnrocnie na cations 3 3 GPS LED virei e o EEEE N RENEE Sa EEE te dies E EE NEES 3 4 latero A BH D AE EE AEE EE AAEE ASE EE 3 4 Ethernet Speed LED eccccneicnciincsincinianineaiiii iii i 3 5 Ethernet ACT LINK LED ea csc ra ea EaR KEEA EE SEEE ANIAR TEGS 3 5 CONNECTOTS inean eneen TE EINE E I N 3 5 Hardware Heatures 53 7i sy E Meats hoc se iat bein bt E Ab ds te Ae 3 6 Clock and Event Generation ceeceeeseeecteseeeeee 3 8 TCXO PXL_CLK10 and Clock Disciplining cc eee seeceeceteeeeseceecaeeneeaeeneees 3 8 Time Synchronized Clock and Event Generation cesses seesereeeeeeterseeeeeeeeeee 3 9 PXI_CLK10 Synchronization Design Recommendations eeeeeseseeeetereeeee 3 9 Routitio Signals eiee anro eaa o aA Toa EAEE ENEE ENESES EVESEN ey Determining Sources and Destinations c cccesesscescesc
30. able Length Maximum cable length depends on the GPS antenna gain and the cable s loss per unit of distance National Instruments recommends a GPS signal strength of between 135 dBm and 120 dBm at the NI PXI 6683 Series device SMB input GPS signal strength on the Earth s surface is typically 130 dBm Targeting a signal strength of 125 dBm at the SMB input you can compute the maximum cable length as Max _cable_loss 130 dBm antenna_gain 125 dBm Max _cable_ length Max_cable_loss loss_per_unit_of_distance For example if you use an active antenna with gain of 28 dB and RG 58 cable which has a rated loss at 1 5 GHz of about 0 8 dB m 24 5 dB 100 ft the maximum cable length you could use is Max _cable_loss 130 dBm 28 dB 125 dBm 23 dB Max _cable_length 23 dB 0 8 dB m 29 m Note The GPS antenna kit offered by National Instruments comes with a 30 m cable which has a loss of 15 dB 100 ft making the total loss in the cable approximately 14 8 dB National Instruments 4 5 Calibration This chapter discusses the calibration of the NI PXI 6683 and NI PXI 6683H Calibration consists of verifying the measurement accuracy of a device and correcting for any measurement error The NI PXI 6683 and NI PXI 6683H are factory calibrated before shipment at approximately 25 C to the levels indicated in Appendix A Specifications The associated calibration constants the corrections that were needed to meet
31. al timebase If the IRIG B signal includes the year then it also uses that information to synchronize its clock Otherwise it gets the year from the host computer The NI PXI 6683 Series disregards the rest of the information contained in the IRIG B signal Therefore when configured to synchronize to IRIG B AM the NI PXI 6683 Series supports IRIG B 12X 200 04 standard and when configured to synchronize to IRIG B DC it supports IRIG B 00X 200 04 standard The following assumptions are made regarding the received IRIG B signal All conditions must be met for the NI PXI 6683 Series to be able to synchronize accurately e Seconds begin every minute at 0 increment to 59 and then roll over to 0 e Minutes begin every hour at 0 increment to 59 and then roll over to 0 e Hours begin every day at 0 increment to 23 and then roll over to 0 e Days begin every year at 1 Days increment to 365 in non leap years or to 366 in leap years and then roll over to 1 Leap years must be supported Valid values for year are 01 to 99 inclusive Years are assumed to be in the XXI Century For instance year 09 represents 2009 If the year is not supplied sent as 00 the OS system time is read and the year is derived from it To achieve proper synchronization of the NI PXI 6683 Series ensure that the IRIG B source used conforms to the requirements listed above Note that most IRIG B sources conform to these requirements National Instruments
32. an input signal 3 12 ni com NI PXI 6683 Series User Manual Note Regarding PFIO Since PFIO is a dual purpose terminal capable of performing digital I O like the other PFI lines while also being capable of receiving IRIG B AM and DC inputs care is taken to protect the digital circuitry when PFIO is being used as an IRIG B AM input This is achieved with a normally open solid state relay SSR which is closed only when digital operations for the line are enabled through the API Digital operations include setting up routes in which PFIO is the source or the destination enabling timestamping for PFIO scheduling future time events or clocks for PFIO and setting IRIG B DC as the time reference The SSR has a 5 ms open and close time Therefore care must be taken when using PFIO to ensure correct operation when the SSR is switching To avoid issues due to the SSR switching follow these guidelines e Whenever timestamping begins on PFIO either ensure the input will remain at a logic low state for at least 5 ms or disregard timestamps for at least 5 ms e When setting up PFIO as an output future time events or clocks ensure that PFIO is driven low for at least 5 ms after the line is set up Alternately ensure that the external receiver can tolerate a slow rising edge e Before disabling PFIO set up as an output drive the output low to avoid a very slow ramp down e Any time a route is set up or changed where PFIO is the source or
33. can eliminate the ambiguity and the signal will always be seen in the second clock cycle National Instruments 3 17 Chapter 3 Hardware Overview Figure 3 7 shows a timing diagram that illustrates synchronous routing Figure 3 7 Synchronous Routing Operation Setup Hold Time Time T tsetup thold t e Pi Trigger Input Synchronization Clock i lock to Output Time tctoQ Trigger Output i Possible sources and destinations for synchronous routing include the following e Any front panel PFI pin PFI lt 0 2 gt e Any PXI star trigger line PXI_STAR lt 0 12 gt NI PXI 6683 only e Any PXI Trigger line PXI_TRIG lt 0 7 gt In the NI PXI 6683 Series the synchronization clock for synchronous routes is always PXI CLK10 Note The possible destinations for a synchronous route are identical to those for an asynchronous route The destinations include any front panel PFI pin any PXI star trigger line or any PXI Trigger line 3 18 ni com Synchronization The NI PXI 6683 Series is capable of achieving tight synchronization with various other devices using GPS IRIG B PPS or IEEE 1588 When GPS or IRIG B are selected as the synchronization source the NI PXI 6683 Series module can also serve as an IEEE 1588 grandmaster The following sections describe the synchronization capabilities of the NI PXI 6683 Series GPS GPS stands for Global Positioning System and it is a system
34. d time base The NI PXI 6683 Series keeps an internal time base with 10 ns resolution that can be free running or synchronized to GPS IEEE 1588 IRIG B or PPS The NI Sync API allows you to schedule triggers to occur at an arbitrary future time future time events or clocks with high and low times that are multiples of 10 ns refer to Appendix A Specifications for information about limitations It is also possible to program the start and end time of a clock generated in this way Refer to Table 3 6 for a list of destinations for synchronized time clocks and future time events PXI_CLK10 Synchronization Design Recommendations e Minimize Starting Stopping of PXI_CLK10 Disciplining From startup the PXI_CLK10 synchronization can take on the order of minutes to stabilize to the time reference You should design your application such that PXI_CLK10 disciplining runs asynchronous to other programs that might start and stop more frequently This minimizes the time spent letting the synchronization stabilize and lock Avoid Disrupting PXI_CLK10 Disciplining While you can use the devices used for PXI_CLK10 disciplining within other applications you should avoid resetting them or changing the configured time reference Doing so disrupts the PXI_CLK10 disciplining process Routing Signals The NI PXI 6683 Series has versatile trigger routing capabilities It can route signals to and from the front panel the PXI star triggers and the PXI tri
35. dard deviation All synchronization performance figures are based on empirical results and represent typical behavior All figures are obtained recording the offset between PPS signals generated by two NI PXI 6683 Series boards inside a closed PXI chassis configured to synchronize to the particular time reference at ambient room temperature Synchronization was performed for 15 minutes before PPS offset recording began All test durations were at least 12 hours For the GPS test two NI PXI 6683 Series boards were independently synchronizing to GPS and configured to generate a PPS The specification above represents typical empirical results Please note that GPS satellites are only guaranteed to be within 100 ns of UTC Therefore the offset between any two devices synchronizing can be as high as 200 ns plus the offset of that device to GPS t Sync interval of 1 second was used for IEEE 1588 tests and all Ethernet connections were 1 Gbps unless otherwise specified Hirschmann MAR1040 Gb 1588 switch used tt Netgear DS104 Hub used with 100 Mbps links Airlink 101 Gigabit over copper switch used For this test a moderate amount of non 1588 Ethernet traffic was present on the switch seek IRIG B AM matching specification was obtained by setting two NI PXI 6683 Series boards to synchronize independently to the same IRIG B AM source and generate a PPS The offset between their PPS signals was then measured over a 12 hour
36. e beginning of the year and optionally control functions and the number of seconds since the start of the day encoded as a straight binary number Refer to Appendix B IRIG Protocol Overview for more information about the IRIG standard The NI PXI 6683 Series can function as an IRIG B receiver supporting synchronization to sources outputting IRIG B 12X AM and IRIG B 00X DC compliant with IRIG 200 04 standard National Instruments 4 1 Chapter 4 Synchronization When configured to synchronize to an IRIG B AM source the NI PXI 6683 Series will be able to accept a 1 kHz AM modulated IRIG B 12X signal on its PFIO input When configured to synchronize to an IRIG B DC source the NI PXI 6683 Series will be able to accept an IRIG B 00X DC encoded signal on its PFIO input A Caution Do not connect an AM signal to PFIO when the PFI line is configured for digital operations This could cause damage to the digital circuitry the device driving the AM signal or both Always ensure the line is configured for IRIG B AM operation before connecting an IRIG B AM signal Furthermore once the NI PXI 6683 Series is synchronized to IRIG B it can function as an IEEE 1588 grandmaster to synchronize of external 1588 devices The following assumptions are made regarding the received IRIG B signal All conditions must be met for the NI PXI 6683 Series to be able to synchronize accurately e Seconds begin every minute at 0 increment to 59
37. e connectors on the front panel of the NI PXI 6683 Series Refer to Figure 3 3 for the location of the connectors e GPS ANT GBPS antenna RF input and DC power output for active GPS antenna This connector provides 5 VDC for an active antenna This connector also serves as the input for the RF signal coming in from the GPS antenna e CLKOUT Clock Output This connector is used to source a 10 MHz clock that can be routed programmatically from the temperature compensated crystal oscillator TCXO or backplane clock PXI_CLK10 National Instruments 3 5 Chapter 3 Hardware Overview e CLKIN Clock Input This connector supplies the module with a clock that can be programmatically routed to the PXI backplane PXI_CLK10_IN for distribution to the other modules in the chassis when the NI PXI 6683 is installed in the system timing slot 2 Note The NI PXI 6683H does not have the CLKIN connector e PFI lt 0 2 gt Programmable Function Interface lt 0 2 gt These connectors can be used for either input or output You can program the behavior of these PFI connections individually Additionally PFIO can function as an input for IRIG B DC or AM A Caution Do not connect an AM signal to PFIO when the PFI line is configured for digital operations This could cause damage to the digital circuitry the device driving the AM signal or both Always ensure the line is configured for IRIG B AM operation before connecting an IRIG B AM signa
38. ecsecsecscenceseeseeeeeeeeseeeeeesceeeeseeeeseeeeeeaees Chapter 5 Calibration Factory Calibration oo cccccccecsesscescescesceseeseecescceeceeceeceeceecaeceaesaesaesacsaecaecaecaecaeeaecascnaeatente 5 1 Additional Information cccccccsesssesecesseeseecseceecessecsesessessecessesueeeecsseeseecseseeeesseeeesesseees 5 1 Appendix A Specifications Appendix B IRIG Protocol Overview Appendix C Technical Support and Professional Services Glossary Index vi ni com About This Manual This manual describes the electrical and mechanical aspects of the NI PXI 6683 and NI PXI 6683H and contains information concerning its operation and programming National Instruments Documentation The NI PXI 6683 Series User Manual is one piece of the documentation set for your measurement system You could have any of several other documents describing your hardware and software Use the documentation you have as follows e Measurement hardware documentation This documentation contains detailed information about the measurement hardware that plugs into or is connected to the computer Use this documentation for hardware installation and configuration instructions specifications about the measurement hardware and application hints Software documentation Refer to the N Sync User Manual available at ni com manuals You can download NI documentation from ni com manuals Related Documentation The following documen
39. ee eeeeeeeeeeeneeeeteeeeees Five SMB male 50 Q one standard RJ 45 Compensating for quantization error 2 All SV at 130 dBm 3 24 hours static Ethernet connector National Instruments A 5 Appendix A Specifications Front panel indicators ccececeseeteeteeteeeeee Two tricolor LEDs green red and amber for GPS and IEEE 1588 status and two green amber LEDs for Ethernet link status and speed Recommended maximum cable lengths PFI DC to 1 5 MHZ eeceeeeeecteereeeeeees 200 m CLKOUT to CLKIN 0 cceeeeeceseteteeees 200 m Ethernet CAT5 Power Requirements Voltage V Typical Maximum 3 3 V 740 mA 1 86 A 5 V 335 mA 1 14 A 12 V 54 mA 175 mA 12 V 24 mA 35 mA The NI PXI 6683H does not have a CLKIN connector A 6 ni com NI PXI 6683 Series User Manual Synchronization Accuracy Test Synchronization Performance GPSt 40 ns lt 8 ns standard deviation IEEE 1588 3 m Ethernet direct connection 25 ns lt 4 ns standard deviation IEEE 1588 through a 1588 switch 40 ns lt 8 ns standard deviation IEEE 1588 through a hub 60 ns lt 12 ns standard deviation IEEE 1588 through a switch t 25 us lt 150 ns standard deviation IRIG B DC 55 ns lt 13 ns standard deviation IRIG B AM matching 1 15 us lt 260 ns standard deviation IRIG B AM to source t 5 us lt 500 ns standard deviation PPS 40 ns lt 8 ns stan
40. eeceeeeeseeseesecaeeaecaeeaeeaeeneens T O Considerations e l e a aa a a a raa a aea Using the Ethernet Port ce cseseeereeeees Using Front Panel PFI Terminals as Outputs Using Front Panel PFI Terminals as Inputs s Note Regarding PFIO s sssssesseeesesesseessssesstsesseeseserssestsstsestetssesestensstsessesesrseestsesst Brief Overview of PXI Synchronization Features cccceccecceeeeeceeceeceeeeeseeseeneens 3 13 Using the PXT Triggers oneer artara RAEE AETV EAEn ET 3 14 Using the PXI Star Triggers NI PXI 6683 omly cceccesessesseeseeseesceeeeeeseeceeceneeaes 3 15 National Instruments v Contents Choosing the Type of Routing eeceecesesseeseesecseceecaecaseneeaceaseeseeseeseeseeeseeteeeeees 3 16 Asynchronous Routing ccecccecscessessessesceseeeeeeeeeeeeeeeeeeeeeeceseeeceseeseeetaeceeceeeeaes 3 16 Synchronous Routing cccccsecsecscescesceseeseesseeeeeeceeceeceecseeaeeseeaecaecaecaecaeeaeenaeess 3 17 Chapter 4 Synchronization Synchronization Best Practices ccsceecseseseceseesceseseescseeeceecneeecseceeseceesevsecseeeceeseeeeaee Operating Environment aieeaa nina aaa eee Timing System Performance IEEE 1588 Synchronization Best Practices Network Topology ccccsescseseseesterseeee A GPS Synchronization Best Practices eseesesessseseeeeeessseererersesreretetsrerersserrsessrerees Antenna Installation ien aea aa E E S TEE N Maximum Cable Length 2c ececescesecs
41. ers or a disciplined 10 MHz clock are required in a PXI Express system the NI PXI 6683H can be combined with an NI PXIe 667x timing module to provide this functionality What You Need to Get Started To set up and use a NI PXI 6683 Series Timing and Synchronization Module you need the following items NI PXI 6683 Series Timing and Synchronization Module NI PXI 6683 Series User Manual NI Syne CD One of the following software packages and documentation LabVIEW LabWindows CVI Microsoft Visual C MSVC PXI or PXI Express chassis with an appropriate slot full PXI slot for NI PXI 6683 and NI PXI1 6683H or PXIe hybrid slot for NI PXI 6683H PXI or PXI Express embedded controller or a desktop computer connected to the PXI or PXI Express chassis using MXI hardware National Instruments 1 1 Chapter 1 Introduction Unpacking The NI PXI 6683 Series is shipped in an antistatic package to prevent electrostatic damage to the module Electrostatic discharge ESD can damage several components on the module A Caution Never touch the exposed pins of connectors To avoid such damage in handling the module take the following precautions e Ground yourself using a grounding strap or by touching a grounded object e Touch the antistatic package to a metal part of the computer chassis before removing the module from the package Remove the module from the
42. et up the PFI lines for output A Caution Do not attempt to drive signals into PFI terminals set up as outputs Doing so can damage the NI PXI 6683 Series or the device driving the PFI terminal The signal source for each PFI trigger line configured as an output can be independently selected from one of the following options e Another PFI lt 0 2 gt PXI TRIG lt 0 7 gt PXI STAR lt 0 12 gt NI PXI 6683 only e Future time events e PXI_CLK10 Ground Q Tip Invert Ground to get a logic high The PFI trigger outputs may be synchronized to CLK10 except when routing future time events Refer to the Choosing the Type of Routing section for more information about the synchronization clock Using Front Panel PFI Terminals as Inputs The front panel PFI terminals can be configured by software to accept input signals Refer to the NI Sync User Manual for information on how to set up the PFI terminals to accept input signals You can use these terminals to timestamp triggers with the synchronized system time or to route signals to other destinations refer to Table 3 6 The input terminals accept native 3 3 V signaling but are 5 V tolerant Use 50 Q source termination when driving signals into PFI terminals The voltage thresholds for the front panel PFI input signals are fixed Refer to Appendix A Specifications for the voltage thresholds The front panel PFI input signals can be timestamped on rising falling or both edges of
43. g Sources and Destinations All signal routing operations can be characterized by a source input and a destination In addition synchronous routing operations must also define a third signal known as the synchronization clock Refer to the Choosing the Type of Routing section for more information on synchronous versus asynchronous routing Table 3 6 summarizes the sources and destinations of the NI PXI 6683 Series The destinations are listed in the horizontal heading row and the sources are listed in the column at the far left A Y in a cell indicates that the source and destination combination defined by that cell is a valid routing combination 3 10 ni com NI PXI 6683 Series User Manual Table 3 6 Sources and Destinations for NI PXI 6683 Series Signal Routing Operations Destinations Front Panel Backplane CLKOUT PFI lt 0 2 gt PXI PXI Star PXI TRIG CLK10_IN Trigger lt 0 7 gt lt 0 12 gt 3 CLKIN vi vi v vi vi Z a PFI lt 0 2 gt v vi v c g ra PXI_ CLK10 v v v v o el S PXL STAR vt v v fo s lt 0 12 gt g PXI TRIG lt 0 7 gt v v v 5 TCXO v vi v vi vi S B Time v v v 6 synchronized events and clocks The NI PXI 6683H does not have a CLKIN connector PXI_CLK10_IN or PXI STAR trigger lines Can be accomplished in two stages by routing source to PXI_CLK10_IN replacing PXI_CLK10 with PXI_CLK10_IN occurs automatically in most chassis and t
44. ggers In addition the polarity of the destination signal can be inverted which is useful when handling active low digital signals The NI PXI 6683 can replace the PXI backplane s native 10 MHz clock PXI_CLK10 with its high stability TCXO or with a 10 MHz clock signal from the CLKIN connector replacing PXI_CLK10 is not supported by the NI PXI 6683H The NI PXI 6683 Series can route the TCXO or PXI 10 MHz reference clock to CLKOUT National Instruments 3 9 Chapter 3 Hardware Overview Figure 3 4 summarizes the routing features of the NI PXI 6683 Series The remainder of this chapter details the capabilities and constraints of the routing architecture Figure 3 4 High Level Schematic of NI PXI 6683 Signal Routing Architecture Not in NI PXI 6683H Cikin i PXI_CIk10_n ClkOut lt Router for each I O Not in NI PXI 6683H 4 PXI_Star 12 PFI O PFI 2 PXI_Trig 0 gt e e PXI_Trig 7 gt PXI_Star 0 gt PXI_CIk10 GND gt gt Clk10 Synchronizer PXI_Clk10 m gt PXI_Trig 0 e e e gt PXI_Trig 7 PFIO e e e PFI 2 Not in NI PXI 6683H 1 Note The NI PXI 6683H architecture is identical to the architecture described in Figure 3 4 except that it doesn t have the PXI_STAR trigger lines CLKIN or PXI CLK10 IN Determinin
45. he maximum ratings for the product Do not install wiring while the product is live with electrical signals Do not remove or add connector blocks when power is connected to the system Avoid contact between your body and the connector block signal when hot swapping modules Remove power from signal lines before connecting them to or disconnecting them from the product Operate the product at or below the installation category marked on the hardware label Measurement circuits are subjected to working voltages and transient stresses overvoltage from the circuit to which they are connected during measurement or test Installation categories establish standard impulse withstand voltage levels that commonly occur in electrical distribution systems The following is a description of installation categories e Installation Category I is for measurements performed on circuits not directly connected to the electrical distribution system referred to as MAINS voltage This category is for measurements of voltages from specially protected secondary circuits Such voltage 1 Installation categories also referred to as measurement categories are defined in electrical safety standard IEC 61010 1 2 Working voltage is the highest rms value of an AC or DC voltage that can occur across any particular insulation 3 MAINS is defined as a hazardous live electrical supply system that powers equipment Suitably rated measuring circuits may be connected to the
46. hen routing PXI_CLK10 to the destination The source must be 10 MHz t Asynchronous routes between a single source and multiple destinations are very low skew See Appendix A Specifications for details I O Considerations Using the Ethernet Port The NI PXI 6683 Series provides one standard RJ 45 connection for Ethernet communication This port auto negotiates to the best possible speed 10 Mbps 100 Mbps or 1000 Mbps auto negotiation can be disabled by software The Ethernet port is auto MDI capable which means crossover cabling is not necessary when connecting the NI PXI 6683 Series to another network card The NI PXI 6683 Series senses whether a crossed connection is needed and performs the action internally The Ethernet port also allows for full duplex operation so traffic can be sent and received at the same time National Instruments 3 11 Chapter 3 Hardware Overview Using Front Panel PFI Terminals as Outputs The front panel PFI output signals use 3 3 V signaling for high impedance loads You can use the PFI terminals to generate future time events and clock signals up to 1 5 MHz PFI output signals are suitable for driving most LEDs To ensure proper signal integrity use cables with 50 Q impedance PFI outputs can also drive 50 Q loads although logic high voltage will be lower than 3 3 V Refer to Appendix A Specifications for more information Refer to the NI Sync User Manual for information on how to s
47. herNet IP are trademarks of ODVA Go SensorDAQ and Vernier are registered trademarks of Vernier Software amp Technology Vernier Software amp Technology and vernier com are trademarks or trade dress Xilinx is the registered trademark of Xilinx Inc Taptite and Trilobular are registered trademarks of Research Engineering amp Manufacturing Inc FireWire is the registered trademark of Apple Inc Linux is the registered trademark of Linus Torvalds in the U S and other countries Handle Graphics MATLAB Real Time Workshop Simulink Stateflow and xPC TargetBox are registered trademarks and TargetBox and Target Language Compiler are trademarks of The MathWorks Inc Tektronix Tek and Tektronix Enabling Technology are registered trademarks of Tektronix Inc The Bluetooth word mark is a registered trademark owned by the Bluetooth SIG Inc The ExpressCard word mark and logos are owned by PCMCIA and any use of such marks by National Instruments is under license The mark LabWindows is used under a license from Microsoft Corporation Windows is a registered trademark of Microsoft Corporation in the United States and other countries Other product and company names mentioned herein are trademarks or trade names of their respective companies Members of the National Instruments Alliance Partner Program are business entities independent from National Instruments and have no agency partnership or join
48. l RJ 45 Ethernet 10 100 1000 Mbit Ethernet connection This connector allows the module to communicate via standard Ethernet cabling Caution Connections that exceed any of the maximum ratings of input or output signals on the NI PXI 6683 Series can damage the module the computer or other devices connected to the NI PXI 6683 Series NI is not liable for any damage resulting from such signal connections Hardware Features The NI PXI 6683 Series performs the following functions Synchronization using GPS IRIG B PPS or IEEE 1588 e Generation of future time events and clock signals based on the synchronized time e Timestamping incoming signals with the synchronized time e Routing internally or externally generated signals from one location to another Single board clock disciplining capability 3 6 ni com NI PXI 6683 Series User Manual Table 3 5 outlines the function and direction of the signals discussed in detail in the remainder of this chapter These signals are also identified in Figure 3 2 Table 3 5 NI PXI 6683 Series I O Terminals Signal Name Direction Description PXI_CLK10_IN Out This is a signal that can replace the native System Timing Slot 10 MHz oscillator on the PXI backplane Only PXI _CLK10_IN may originate from the onboard Not in NI PXI 6683H TCXO or from an external source connected to CLKIN PXI_CLK10 In This signal is the PXI 10 MHz backplane clock
49. mum input voltage 0 0 0 0 0 5 V to 6 0 V Stresses beyond those listed can cause permanent damage to the device Exposure to absolute maximum rated conditions for extended periods of time can affect device reliability Functional operation of the device outside the conditions indicated in the operational parts of the specifications is not implied N Applies to asynchronous routes from a single PXI_STAR input to multiple PFI outputs 3 For PFI 0 these characteristics apply when the line is configured as a digital input They do not apply when configured as an IRIG B AM input Stresses beyond those listed can cause permanent damage to the device Exposure to absolute maximum rated conditions for extended periods of time can affect device reliability Functional operation of the device outside the conditions indicated in the operational parts of the specifications is not implied gt A 2 ni com NI PXI 6683 Series User Manual Input thresholds Voltage threshold high cceeeeeeeee 2 3 V max Voltage threshold low c cseeseeeeteees 0 8 V min Asynchronous delay tpa PFIK lt 0 2 gt to PXI TRIG lt 0 7 gt output 17 to 20 ns typical PFI lt 0 2 gt to PXI_STAR lt 0 12 gt output ow 12 ns typical Synchronized trigger input setup time fgguperuncniinincaniisri 25 ns max relative to CLKOUT when configured to route PXI CLK10 Synchronized trigger input hold time thojge ecesscceceececsecsecsec
50. nal Instruments 2 1 Chapter 2 Installing and Configuring Table 2 1 PXI PXI Express Slot Type Compatibility PXI System PXI Express Timing Slot PXI Peripheral Slot Hybrid Slot NI PXI Board O oe NI PXI 6683 v vi NI PXI 6683H vi vt vt Compatible PXI_CLK10 PXI_CLKIN PXI STAR PXI TRIG functionality available Compatible PXI_TRIG functionality available Remove the filler panel for the PXI or PXI Express hybrid slot you chose in step 2 4 Ground yourself using a grounding strap or by touching a grounded object Follow the ESD protection precautions described in the Unpacking section of Chapter 1 Introduction Remove any packing material from the front panel screws and backplane connectors 6 Insert the NI PXI 6683 Series module into the PXI or PXI Express hybrid slot Use the injector ejector handle to fully insert the module into the chassis Screw the front panel of the module to the front panel mounting rail of the chassis Visually verify the installation Plug in and power on the chassis The NI PXI 6683 Series module is now installed Verifying the Installation During the first boot following the software and hardware installation of the NI PXI 6683 Series module the OS detects the device and associates it with the NI Sync driver software Configuring the Module The NI PXI 6683 Series is completely software configurable The system software automatically allocates all
51. nd software and how to configure the device Installing the Software Refer to the readme htm file that accompanies the N Sync CD for software installation directions Note Be sure to install the driver software before installing the NI PXI 6683 Series module Installing the Hardware The following are general installation instructions Consult the chassis user manual or technical reference manual for specific instructions and warnings about installing new modules 1 Power off and unplug the chassis Caution Do not install the NI PXI 6683 Series module in the system controller slot slot 1 of a chassis 2 Choose an available slot in the chassis Refer to Table 2 1 for more information about functionality NI PXI 6683 Install the NI PXI 6683 in an available PXI slot The NI PXI 6683 is a star trigger controller for PXI It can replace PXI_CLK10 and control the PXI_STAR triggers This functionality is only available when the NI PXI 6683 is installed in the system timing slot of a PXI chassis The PXI triggers are accessible from any PXI slot NI PXI 6683H Install the NI PXI 6683H in an available PXI slot If you are using a PXI Express PXIe system install the NI PXI 6683H in an available PXI or PXIe hybrid slot The NI PXI 6683H is a special version of the NI PXI 6683 designed to also fit in hybrid slots on a PXI Express chassis It does not have the ability to replace PXI_CLK10 or drive the PXI STAR triggers Natio
52. ni com NI PXI 6683 Series User Manual Do not substitute parts or modify the product except as described in this document Use the product only with the chassis modules accessories and cables specified in the installation instructions You must have all covers and filler panels installed during operation of the product Do not operate the product in an explosive atmosphere or where there may be flammable gases or fumes If you must operate the product in such an environment it must be in a suitably rated enclosure If you need to clean the product use a soft nonmetallic brush The product must be completely dry and free from contaminants before you return it to service Operate the product only at or below Pollution Degree 2 Pollution is foreign matter in a solid liquid or gaseous state that can reduce dielectric strength or surface resistivity The following is a description of pollution degrees e Pollution Degree 1 means no pollution or only dry nonconductive pollution occurs The pollution has no influence e Pollution Degree 2 means that only nonconductive pollution occurs in most cases Occasionally however a temporary conductivity caused by condensation must be expected e Pollution Degree 3 means that conductive pollution occurs or dry nonconductive pollution occurs that becomes conductive due to condensation You must insulate signal connections for the maximum voltage for which the product is rated Do not exceed t
53. nments Bit position Information transmitted 0 Position identifier Pp seconds boundary marker 1to4 Units of seconds 6 to 8 Tens of seconds 9 Position identifier P 10 to 13 Units of minutes 15 to 17 Tens of minutes National Instruments B 3 Appendix B IRIG Protocol Overview Table B 3 IRIG B Bit Assignments Continued Bit position Information transmitted 19 Position identifier P 20 to 23 Units of hours 25 to 26 Tens of hours 29 Position identifier P3 30 to 33 Units of days 35 to 38 Tens of days 39 Position identifier P4 40 to 41 Hundreds of days 49 Position identifier P5 50 to 53 Units of year or control function bits 55 to 58 Tens of year or control function bits 59 Position identifier P6 60 to 68 Control function bits 69 Position identifier P7 70 to 78 Control function bits 79 Position identifier Pg 80 to 88 Nine lowest significant bits of time of day in straight binary seconds bit 80 gt 2 bit 88 gt 28 89 Position Identifier Po 90 to 97 Eight most significant bits of time of day in straight binary seconds bit 90 gt 29 bit 97 gt 2 99 Position identifier Po Note Bits not listed are index markers and are sent as binary zeroes B 4 ni com NI PXI 6683 Series User Manual The NI PXI 6683 Series uses the time of day information transmitted as BCD to synchronize its intern
54. nsure you remain within the specified operating temperature limits e Place the PXI or PXI Express chassis containing the NI PXIJ 6683 Series module in an environment free of rapid temperature transitions Ensure that PXI filler panels are properly installed for unused PXI or PXI Express slots since inconsistent airflow and temperature transitions across thermally sensitive components can degrade the NI PXI 6683 Series module performance e Perform the same steps listed above for any other synchronization partners systems Timing System Performance The NI PXI 6683 Series can generate or receive a 1 Hz pulse per second signal on any PFI or PXI Trigger terminal You can set up this signal to transition on the seconds boundary of the synchronized system time You can then use this signal to analyze system performance by connecting two or more pulse per second signals to an oscilloscope and measuring the latency between them Adjustments can be made to account for deterministic latency Refer to the NI Sync API Reference Help for more information The NI PXI 6683 Series can also timestamp an incoming pulse per second signal The NI PXI 6683 Series will timestamp the externally generated pulse per second with its internal timebase By comparing this timestamp with the nearest seconds boundary you can quickly determine the synchronization performance National Instruments 4 3 Chapter 4 Synchronization IEEE 1588 Synchronization Best P
55. ntroduce signal integrity issues Therefore National Instruments does not recommend the use of PXI_ Trigger lines for clock distribution especially for clocks above 20 MHz The preferred method for clock distribution is the use of the PXI STAR triggers However the NI PXI 6683 Series does support routing of clocks to the PXI Trigger lines in case you must use them For each PXI_Trigger line configured as an output in the NI PXI 6683 Series the signal source can be independently selected from the following options e PFI lt 0 2 gt e Another PXI trigger line PXI_TRIG lt 0 7 gt e PXI_STAR lt 0 12 gt Future time events e PXI CLK10 Ground Q Tip Invert Ground to get a logic high The PXI trigger outputs may be synchronized to CLK10 except when routing future time events Refer to the Choosing the Type of Routing section for more information about the synchronization clock Using the PXI Star Triggers NI PXI 6683 only There are up to 13 PXI star triggers per chassis Each trigger line is a dedicated connection between the system timing slot and one other slot The PXI Specification Revision 2 1 requires that the propagation delay along each star trigger line be matched to within 1 ns A typical upper limit for the skew in most NI PXI chassis is 500 ps The low skew of the PXI star trigger bus is useful for applications that require triggers to arrive at several modules nearly simultaneously The NI PXI 6683 is able to
56. of over 2 dozen satellites in medium Earth orbit that are constantly transmitting signals down to Earth GPS receivers are able to detect these signals and determine location speed direction and time very precisely GPS satellites are fitted with atomic clocks and the signals they transmit to Earth contain timing information This makes the GPS system a precise timing and synchronization source The NI PXI 6683 Series has a GPS receiver which powers an active GPS antenna and receives and processes the RF signals 1 575 GHz from the satellites The GPS receiver then generates a very precise pulse per second PPS that the NI PXI 6683 Series uses to achieve sub microsecond synchronization GPS enables the NI PXI 6683 Series to synchronize PXI systems located far away from each other as long as GPS satellites are visible to the antenna from each location Furthermore once the NI PXI 6683 Series is synchronized to GPS it can function as an IEEE 1588 grandmaster to enable synchronization of external 1588 devices IRIG B IRIG is a standard used to transmit precise timing information between instruments to achieve synchronization IRIG B is a particular application of the IRIG standard in which 100 bits of data are sent every second Embedded in the data is a seconds boundary marker that the receiving instrument uses to synchronize its timebase to the IRIG source The rest of the data contains information such as the time of day days since th
57. of the oscillator and adjust the oscillator s control voltage to compensate for temperature variations according to the crystal s known frequency variation across its operating temperature range An NI PXI 6683 module in the system timing slot of a PXI chassis can replace the native PXI 10 MHz backplane frequency reference clock PXI_CLK10 with the more stable and accurate output of the TCXO All other PXI modules in the chassis that reference the 10 MHz backplane clock benefit from this improved reference The TCXO does not automatically replace the native 10 MHz clock this feature must be explicitly enabled in software The TCXO output also can be routed out to the CLKOUT connector 3 8 ni com NI PXI 6683 Series User Manual The NI PXI 6683 has the capability to discipline its 10 MHz TCXO to an external time reference such as GPS IEEE 1588 or IRIG B by monitoring and adjusting the clock relative to the external time reference The driver software automatically disciplines the TCXO to the selected time reference TCXO disciplining can be disabled by setting the time reference to Free Running Note Some chassis including the NI PXI 103x series require toggling a hardware switch to enable the system timing module to override PXI_CLK10 Refer to your chassis user manual for more information Time Synchronized Clock and Event Generation The NI PXI 6683 Series is capable of generating clock signals and triggers based on the synchronize
58. opagation delay through the module Figure 3 6 illustrates an asynchronous routing operation Figure 3 6 Asynchronous Routing Operation Propagation Delay tod Trigger Input fF o Trigger Output Some delay is always associated with an asynchronous route and this delay varies among NI PXI 6683 Series modules depending on variations in temperature and chassis voltage Typical delay times in the NI PXI 6683 Series for asynchronous routes between various sources and destinations are given in Appendix A Specifications Asynchronous routing works well if the total system delays are not too long for the application Propagation delay could be caused by the following reasons Output delay on the source e Propagation delay of the signal across the backplane s and cable s e Propagation delay of the signal through the NI PXI 6683 Series Time for the receiver to recognize the signal 3 16 ni com NI PXI 6683 Series User Manual The source of an asynchronous routing operation on the NI PXI 6683 Series can be any of the following lines e Any front panel PFI pin PFI lt 0 2 gt e Any PXI Star trigger line PXIL STAR lt 0 12 gt NI PXI 6683 only e Any PXI Trigger line PXI_TRIG lt 0 7 gt e Synchronized time events e PXI CLK10 e Ground Q Tip Invert Ground to get a logic high The destination of an asynchronous routing operation on the NI PXI 6683 Series can be any of the following lines e Any front panel
59. provide an optimized system intended for rugged applications It is electrically compatible with the PCI Specification which enables low cost PCI components to be utilized in a mechanical form factor suited for rugged environments DAQ DC ESD F frequency front panel G GPS IEEE IEEE 1588 NI PXI 6683 Series User Manual data acquisition 1 collecting and measuring electrical signals from sensors transducers and test probes or fixtures and inputting them to a computer for processing 2 collecting and measuring the same kinds of electrical signals with A D and or DIO devices plugged into a computer and possibly generating control signals with D A and or DIO devices in the same computer direct current electrostatic discharge the basic unit of rate measured in events or oscillations per second using a frequency counter or spectrum analyzer Frequency is the reciprocal of the period of a signal the physical front panel of an instrument or other hardware Global Positioning System worldwide system that allows you to receive precise location and timing information hertz the number of scans read or updates written per second Institute of Electrical and Electronics Engineers an IEEE standard used to synchronize separate devices inch or inches National Instruments G 3 Glossary IRIG IRIG B jitter L LabVIEW LED M master Measurement amp Automation Explorer MAX
60. r technical support options in your area visit ni com services or contact your local office at ni com contact Training and Certification Visit ni com training for training and certification program information You can also register for instructor led hands on courses at locations around the world System Integration If you have time constraints limited in house technical resources or other project challenges National Instruments Alliance Partner members can help To learn more call your local NI office or visit ni com alliance Declaration of Conformity DoC A DoC is our claim of compliance with the Council of the European Communities using the manufacturer s declaration of conformity This system affords the user protection for electromagnetic compatibility EMC and product safety You can obtain the DoC for your product by visiting ni com certification e Calibration Certificate If your product supports calibration you can obtain the calibration certificate for your product at ni com calibration National Instruments C 1 Appendix C Technical Support and Professional Services You also can visit the Worldwide Offices section of ni com niglobal to access the branch office Web sites which provide up to date contact information support phone numbers email addresses and current events C 2 ni com Glossary Symbol Prefix Value p pico 10 2 n nano 10
61. ractices Network Topology To obtain the best NI PXI 6683 Series performance follow these guidelines to set up the Ethernet network topology e Use short cabling when possible Ethernet cabling is inherently asymmetric the longer the cabling the higher the asymmetry This impacts synchronization performance because the IEEE 1588 protocol assumes a symmetric network path If several 1588 devices need to be synchronized on the same network use a 1588 enabled switch 1588 enabled switches are specifically designed to compensate for the varying latency of packets passing through them thus enhancing synchronization performance e Ifa1588 enabled switch is not available use hubs when connecting to multiple IEEE 1588 devices Unlike standard switches hubs offer low latency and close to deterministic performance for Ethernet traffic Standard Ethernet switches can have Ethernet packet latencies vary by hundreds of nanoseconds This latency uncertainty degrades synchronization performance significantly e Ensure that the network is running at 1 Gbps by noting the Ethernet Speed LED status Synchronization performance is degraded when running at 10 or 100 Mbps Note If it is impossible to use a 1000 or 100 Mbps network and you must run IEEE 1588 synchronization using a 10 Mbps network ensure the network interface of the NI PXI 6683 Series is explicitly configured for 10 Mbps Full Duplex operation using the Windows configuration panels G
62. rature stability 0 to 55 C wee eee Measured at the NI PXI 6683 Series backplane connector 2 Applies to asynchronous routes from a single PFI input to multiple PXI_STAR outputs A 4 ni com OUIN SPAN BO cee cos acer eeeaee tues ees t cette eee AGING PEL VEAL arenneren es aani Duty cycle GPS Characteristics DC voltage output for antenna eee Maximum output current 0 eect eteeeeteeeee Minimum current for antenna Presence detection ceninin ni iE Input impedance GPS receiver type Recommended signal strength at NI PXI 6683 Series User Manual 17 5 ppm minimum 1 ppm 45 to 55 5 V 5 60 mA 4 7 mA typical 7 9 mA max 50 Q nominal 50 channels GPS L1 frequency 1575 42 MHz C A Code SMB Connector ae a AAR ete 130 dBm Maximum RF power at input eee 3 dBm Accuracy PPS haoa Hecate eect 15 ns Position aeann ean Aa 2 5 m CEP 3 5 m SEP Velocity 0 1 m s Maximum horizontal velocity 0 0 310 m s Maximum vertical velocity eeeeseeeeteeees 50 m s Physical Chassis requirement NI PXI 6683 S oent ataia saoe One 3U CompactPCI or PXI slot PXI the system timing slot for full functionality NI PXI 6683H oosseseseeseresessesesrererreseeseeeses One 3U CompactPCI PXI or PXI Express hybrid slot Weight NI PXI 6683 a n a aA 186 g NI PXI 6683H 172 g Front panel connectors NI PXEG668 3 inaa Six SMB male 50 Q one standard RJ 45 Ethernet connector NI PXI 6683H oo e
63. route low skew triggers to the PXI _Star lines from any PFI line The star trigger lines are bidirectional so signals can be sent to the system timing slot from a module in another slot or from the system timing slot to the other module The signal source for each PXI star trigger line configured as an output can be independently selected from one of the following options e PFI lt 0 2 gt low skew e PXI_TRIG lt 0 7 gt e Another PXI star trigger line PXI_STAR lt 0 12 gt e Synchronized time event e PXI_CLK10 Ground National Instruments 3 15 Chapter 3 Hardware Overview Q Tip Invert Ground to get a logic high The PXI star trigger outputs may be synchronized to CLK10 except when routing future time events Refer to the Choosing the Type of Routing section for more information about the synchronization clock Choosing the Type of Routing The NI PXI 6683 Series routes signals in one of two ways asynchronously or synchronously The following sections describe the two routing types and the considerations for choosing each type Asynchronous Routing Asynchronous routing is the most straightforward method of routing signals Any asynchronous route can be defined in terms of two signal locations a source and a destination A digital pulse or train comes in on the source and is propagated to the destination When the source signal goes from low to high this rising edge is transferred to the destination after a pr
64. s C 1 E electromagnetic compatibility A 9 environmental management specifications A 9 environmental specifications A 8 equipment getting started 1 1 Ethernet ACT LINK LED color explanation table 3 5 overview 3 5 Ethernet port using 3 11 Ethernet Speed LED color explanation table 3 5 overview 3 5 examples NI resources C 1 F factory calibration 5 1 front panel See also CLKIN connector 1588 LED 3 4 connector descriptions 3 5 Ethernet ACT LINK LED 3 5 Ethernet Speed LED 3 5 GPS LED 3 4 PFI 3 6 front panel PFI terminals using as inputs 3 12 National Instruments l 1 Index G generating a clock or event overview 3 8 generating a clock PXI_CLK10 and TCXO 3 8 getting started configuring the device 2 2 equipment 1 1 installing the hardware 2 1 installing the software 2 1 software programming choices 1 2 unpacking 1 2 GPS ANT connector description 3 5 GPS LED color explanation table 3 4 overview 3 4 GPS synchronization 4 1 best practices 4 4 GPS specifications A 5 H hardware 1588 LED overview 3 4 calibration 5 1 configuring 2 2 connector descriptions 3 5 Ethernet ACT LINK LED overview 3 5 Ethernet Speed LED overview 3 5 GPS LED overview 3 4 installing 2 1 overview 3 6 synchronization 4 1 best practices 4 3 GPS 4 1 TEEE1588 4 2 IRIG B 4 1 PPS 4 2 help technical support C 1 l T O considerations 3 11 T O terminals table 3 7
65. s to achieve low skew triggering PXI_CLK10 is a high quality 10 MHz clock that is distributed with low skew to each PXI slot This 10 MHz signal can be sourced from the native PXI backplane oscillator or from the system timing slot Controller Module installed in the system timing slot such as the NI PX1 6683 The following sections describe in more detail the use of PXI triggers and PXI star triggers with the NI PXI 6683 series Using the PXI Triggers The PXI trigger bus is a set of 8 electrical lines that go to every slot in a segment of a PXI chassis multi drop up to 8 slots Only one PXI module should drive a particular PXI_Trigger line at a given time The signal is then received by modules in all other PXI slots This feature makes the PXI triggers convenient in situations where you want for instance to trigger several devices because all modules will receive the same trigger Given the architecture of the PXI trigger bus triggering signals do not reach each slot at precisely the same time A difference of several nanoseconds can occur between slots especially in larger PXI chassis which can have buffers between segments This delay is not a problem 3 14 ni com NI PXI 6683 Series User Manual for many applications However if your application requires tighter synchronization use the PXI_STAR triggers see next section or use the PXI trigger bus synchronous to PXI_CLK10 The multi drop nature of the PXI trigger bus can i
66. sary synchronous system timing slot T tCtoQ thold tpd TRIG trigger setup VI G 6 ni com a property of an event that is synchronized to a reference clock the second slot in a PXI system which can house a master timing unit clock to output time hold time propagation delay time trigger signal a digital signal that starts or times a hardware event for example starting a data acquisition operation setup time volts virtual instrument Index Numerics 1588 LED color explanation table 3 4 overview 3 4 A asynchronous routing overview 3 16 sources and destinations 3 17 B best practices for synchronization 4 3 C cable length 4 5 calibration additional information 5 1 factory calibration 5 1 calibration certificate NI resources C 1 CE compliance specifications A 9 CLKIN connector description 3 6 specifications A 1 CLKOUT connector 3 6 description 3 5 signal description table 3 7 specifications A 1 clock and event generation overview 3 8 clock generation PXI_CLK10 and TCXO 3 8 color Ethernet Speed LED color explanation table 3 5 Link LED color explanation table 3 5 configuring the device Ethernet Speed LED 3 5 overview 2 2 D Declaration of Conformity NI resources C 1 destinations possible destinations table 3 11 diagnostic tools NI resources C 1 documentation NI resources C 1 related documentation vii drivers NI resource
67. seeneeteeneees 0 ns relative to CLKOUT when configured to route PXI_CLK10 IRIG B Input Characteristics PFIO IRIG B AM compatibility 0 eects IRIG B 12X 200 04 standard 5 V to 5 V Decode Input voltage range 0 eee 1 5 V to 10 V peak peak mark 3 1 ratio mark space Maximum Input voltage range Input carrier frequency cece eeeeetereeeeeees 1 kHz A Caution Do not connect an IRIG B AM signal to PFI 0 when the input is configured for digital operation as this can result in damage of the digital input circuitry IRIG B DC compatibility v1 1 1211110111011111 IRIG B 00X 200 04 standard Input characteristics for IRIG B DC same as PFI digital input characteristics listed above The following assumptions are made regarding the received IRIG B signal All conditions must be met for the NI PXI 6683 Series to be able to synchronize accurately e Seconds begin every minute at 0 increment to 59 and then roll over to 0 e Minutes begin every hour at 0 increment to 59 and then roll over to 0 Hours begin every day at 0 increment to 23 and then roll over to 0 e Days begin every year at 1 Days increment to 365 in non leap years or to 366 in leap years and then roll over to 1 Leap years must be supported Valid values for year are 01 to 99 inclusive Years are assumed to be in the XXI Century For instance year 09 represents The NI PXI 6683H does not have star trigger lines
68. t venture relationship with National Instruments Patents For patents covering National Instruments products technology refer to the appropriate location Help Patents in your software the patents txt file on your media or the National Instruments Patent Notice at ni com patents Export Compliance Information Refer to the Export Compliance Information at ni com legal export compliance for the National Instruments global trade compliance policy and how to obtain relevant HTS codes ECCNs and other import export data WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS 1 NATIONAL INSTRUMENTS PRODUCTS ARE NOT DESIGNED WITH COMPONENTS AND TESTING FOR A LEVEL OF RELIABILITY SUITABLE FOR USE IN OR IN CONNECTION WITH SURGICAL IMPLANTS OR AS CRITICAL COMPONENTS IN ANY LIFE SUPPORT SYSTEMS WHOSE FAILURE TO PERFORM CAN REASONABLY BE EXPECTED TO CAUSE SIGNIFICANT INJURY TO A HUMAN 2 IN ANY APPLICATION INCLUDING THE ABOVE RELIABILITY OF OPERATION OF THE SOFTWARE PRODUCTS CAN BE IMPAIRED BY ADVERSE FACTORS INCLUDING BUT NOT LIMITED TO FLUCTUATIONS IN ELECTRICAL POWER SUPPLY COMPUTER HARDWARE MALFUNCTIONS COMPUTER OPERATING SYSTEM SOFTWARE FITNESS FITNESS OF COMPILERS AND DEVELOPMENT SOFTWARE USED TO DEVELOP AN APPLICATION INSTALLATION ERRORS SOFTWARE AND HARDWARE COMPATIBILITY PROBLEMS MALFUNCTIONS OR FAILURES OF ELECTRONIC MONITORING OR CONTROL DEVICES TRANSIENT FAILURES OF ELECTRONIC SYSTEMS HARDWARE AND OR SOFTWARE UNANTICIPATED
69. the destination allow for a 5 ms settling time For more information refer to KnowledgeBase 4E9BT88P at ni com support Brief Overview of PXI Synchronization Features PCI eXtensions for Instrumentation PXI is a rugged PC based platform that offers a high performance low cost deployment solution for measurement and automation systems PXI combines the Peripheral Component Interconnect PCT electrical bus with the rugged modular Eurocard mechanical packaging of CompactPCI and adds specialized synchronization buses and key software features National Instruments 3 13 Chapter 3 Hardware Overview Figure 3 5 provides an overview of the PXI synchronization architecture Figure 3 5 PXI Synchronization Architecture Star Trigger Bus LL 10 MHz Clock a 5 o 2 58 Bo E E ort Fo fe BS ge Ss o HE je O I I 132 Mbytes s 33 MHz 32 bit PCI Bus y y y y y PXI Trigger Bus 8 lines The PXI trigger Bus PXI star triggers and PXI _CLK10 are PXI features that enhance synchronization The PXI trigger bus is a multi drop 8 line bus that goes to every slot The PXI star trigger bus is a set of up to 13 point to point matched length connections between the system timing slot and every slot starting with slot 3 and up to slot 15 The propagation delay between the system timing slot and each destination slot is matched to within In
70. the information transmitted Table B 1 summarizes the characteristics of each IRIG standard Table B 1 IRIG Standard Definitions Bit rate Frame rate IRIG Standard bit duration frame duration Information sent IRIG A 1 Kbps 1 ms 10 fps 100 ms TOY amp Y BCD SOD SBS IRIG B 100 bps 10 ms 1 fps 1 s TOY amp Y BCD SOD SBS IRIG D 1 bpm 60 s 1 fph 1 hour TOY BCD days and hours only IRIG E 10 bps 100 ms 6 fpm 10s TOY amp Y BCD IRIG G 10 kbps 0 1 ms 100 fps 10 ms TOY amp Y BCD Includes fractions of seconds IRIG H 1 bps 1 s 1 fpm 60 s TOY BCD Days hours and minutes only bpm bits per minute BCD binary coded decimal bps bits per second SBS straight binary seconds fph frames per hour SOD seconds of day fpm frames per minute TOY time of year fps frames per second Y year In addition to the characteristics of each standard described in the table above each of those is subdivided further depending on the electrical characteristics of the signal used to transmit the data and the actual data transmitted This is usually specified by 3 digits that follow the IRIG standard name for instance IRIG B 120 Table B 2 details the different characteristics of each IRIG option National Instruments B 1 Appendix B IRIG Protocol Overview Table B 2 IRIG Option Characteristics Carrier Signal Modula
71. tion type Frequency Information sent 0 Pulse width 0 DC 0 TOY BCD CB SBS modulated 1 Amplitude 1 100 Hz 1 TOY BCD CB modulated sine wave 2 Manchester 2 1 kHz 2 TOY BCD modulated 3 10 kHz 3 TOY BCD SBS 4 100 kHz 4 TOY BCD Year BCD CB SBS 5 1 MHz 5 TOY BCD Year BCD CB 6 TOY BCD Year BCD 7 TOY BCD Year BCD SBS CB control bits For example IRIG B 120 indicates that the information is sent once per second 100 bits per second on a 1kHz amplitude modulated sine wave and that the information sent is the time of year in BCD control bits and the seconds of day in straight binary seconds There are 3 types of bits sent in the IRIG standard binary zeroes binary ones and position identifiers To transmit a binary zero the source must keep the signal at mark for 20 of the bit duration and at space for the remaining 80 to transmit a binary one the source must keep the signal at mark for 50 of the bit duration and at space for the remaining 50 to transmit a position identifier the source must keep the signal at mark for 80 of the bit duration and at space for the remaining 20 Binary bits are used to transmit information such as time of year straight binary seconds and so on and position identifiers are used to separate the different pieces of data transmitted The second s boundary is embedded into the transmission by sending two consecutive position identifiers
72. ts contain information that you might find helpful as you read this manual e PICMG 2 0 R3 0 CompactPCI Core Specification available from PICMG at www picmg org e PXI Specification Revision 2 1 available from www pxisa org e NI Sync User Manual available from ni com manuals NI PXI 6683 H Calibration Procedure available from ni com manuals National Instruments vii Introduction The NI PXI 6683 and NI PXI 6683H timing and synchronization modules synchronize PXI and PXI Express systems using GPS IEEE 1588 IRIG B or PPS The NI PXI 6683 Series boards also support synchronizing the system time of an RT system The NI PXI 6683 Series boards can generate triggers and clock signals at programmable future times and timestamp input events with the synchronized system time The NI PXI 6683 Series boards feature an on board TCXO that can be disciplined to GPS IEEE 1588 IRIG B or PPS for long term stability The NI PXI 6683 Series boards also support routing of clock signals and triggers with low skew within a PXI chassis or between multiple chassis providing you a method for synchronizing multiple devices in a PXI system The NI PX1 6683 has a full PXI connector giving full PXI timing slot functionality The NI PXI 6683H is designed to allow installation in a hybrid slot in a PXI Express system this means some of the PXI Timing slot features are not available in the NI PXI 6683H If synchronized low skew triggers Star trigg
73. uct label or the Online Product Certification section A 8 ni com NI PXI 6683 Series User Manual Electromagnetic Compatibility This product is designed to meet the requirements of the following standards of EMC for electrical equipment for measurement control and laboratory use e EN 61326 IEC 61326 Class A emissions Basic immunity e EN 55011 CISPR 11 Group 1 Class A emissions e AS NZS CISPR 11 Group 1 Class A emissions e FCC 47 CFR Part 15B Class A emissions e ICES 001 Class A emissions Note For the standards applied to assess the EMC of this product refer to the Online Product Certification section Note For EMC compliance operate this device with shielded cabling CE Compliance CE This product meets the essential requirements of applicable European Directives as follows e 2006 95 EC Low Voltage Directive safety e 2004 108 EC Electromagnetic Compatibility Directive EMC Online Product Certification Refer to the product Declaration of Conformity DoC for additional regulatory compliance information To obtain product certifications and the DoC for this product visit ni com certification search by model number or product line and click the appropriate link in the Certification column Environmental Management NI is committed to designing and manufacturing products in an environmentally responsible manner NI recognizes that eliminating certain hazardous substances from our products is
74. work topology 4 4 GPS 4 1 IEEE 1588 4 2 IRIG B 4 1 PFI synchronization clock 3 17 PPS 4 2 synchronization clock See also PXI _Trig PXI Star synchronization clock overview 3 17 synchronization considerations operating environment 4 3 timing system performance 4 3 synchronized future time clock generation specifications A 4 synchronous routing overview 3 17 timing diagram 3 18 T TCXO clock generation 3 8 overview 3 8 specifications A 4 technical support C 1 temperature compensated oscillator See TCXO timestamping specifications A 4 timing system performance 4 3 training and certification NI resources C 1 trigger bus See PXI_TRIG lt 0 7 gt troubleshooting NI resources C 1 U unpacking the device 1 2 W Web resources C 1 l 4 ni com
75. y copyright and other intellectual property laws Where NI software may be used to reproduce software or other materials belonging to others you may use NI software only to reproduce materials that you may reproduce in accordance with the terms of any applicable license or other legal restriction End User License Agreements and Third Party Legal Notices You can find end user license agreements EULAs and third party legal notices in the following locations e Notices are located in the lt National Instruments gt _Legal Information and lt National Instruments gt directories e EULAs are located in the lt National Instruments gt Shared MDF Legal license directory e Review lt National Instruments gt _Legal Information txt for more information on including legal information in installers built with NI products Trademarks Refer to the NMI Trademarks and Logo Guidelines at ni com trademarks for more information on National Instruments trademarks ARM Keil and Vision are trademarks or registered of ARM Ltd or its subsidiaries LEGO the LEGO logo WEDO and MINDSTORMS are trademarks of the LEGO Group 2013 The LEGO Group TETRIX by Pitsco is a trademark of Pitsco Inc 2013 FIELDBUS FOUNDATION and FOUNDATION are trademarks of the Fieldbus Foundation EtherCAT is a registered trademark of and licensed by Beckhoff Automation GmbH CANopen is a registered Community Trademark of CAN in Automation e V DeviceNet and Et

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