RL78/G10 - Renesas Electronics
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1. arising from such alteration modification copy or otherwise misappropriation of Renesas Electronics product Renesas Electronics products are classified according to the following two quality grades Standard and High Quality The recommended applications for each Renesas Electronics product depends on the product s quality grade as indicated below Standard Computers office equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots etc High Quality Transportation equipment automobiles trains ships etc traffic control systems anti disaster systems anti crime systems and safety equipment etc Renesas Electronics products are neither intended nor authorized for use in products or systems that may pose a direct threat to human life or bodily injury artificial life support devices or systems surgical implantations etc or may cause serious property damages nuclear reactor control systems military equipment etc You must check the quality grade of each Renesas Electronics product before using it in a particular application You may not use any Renesas Electronics product for any application for which it is not intended Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for which the produc2. processing objected in this application note Table 1 1 Targeted Arithmetic Processing Arithmetic Processing 1 6bitx 1 6bit Multiplication of unsigned integers of 16 bit data 1 6bitx 1 6bit 32bit Multiply and accumulation of unsigned integers of 16 bit data The overflow flow is not detected from 32 bit data 32bit 32bit The division processing of unsigned integers of 32 bit data 2 Operation Check Conditions The sample code described in this application note has been checked under the conditions listed in the table below Table 2 1 Operation Check Conditions Item C Description Operating frequency e High speed on chip oscillator HOCO clock 20 MHz e CPU peripheral hardware clock 20 MHz Operating voltage 5 0 V can run at a voltage range of 2 9 V to 5 5 V SPOR detection voltage Vspor 2 90 V TYP Vsppr 2 84 V TYP When reset occurs Vpop lt 2 84 V When reset is released Vpp 2 90 V Integrated development CS for CA CX V3 00 00 from Renesas Electronics Corp environment CS Assembler CS RA78KOR V1 70 from Renesas Electronics Corp Integrated development e2studio V3 1 2 10 from Renesas Electronics Corp environment e2studio Assembler e2studio KPIT GNURL78 ELF Toolchain V14 03 from Renesas Electronics Corp Integrated development IAR Embedded Workbench for Renesas RL78 V1 40 5 environment IAR Assembler IAR IAR Assembler for Renesas RL78 V1 40 5 Operating environment RL78 G10 Simulator R
3. register Performs multiplication of higher bits X lower bits Accumulates multiplication results Sets higher bits of multiplicand to A register and higher bits of multiplier to X register Performs multiplication of higher bits X higher bits Accumulates multiplication results Figure 3 9 Multiplication Processing of 16 Bits Data RO1AN1976EJ0200 Rev 2 00 Mar 31 2015 Page 10 of 13 RENESAS RL78 G10 Multiplication and Division Program 3 9 3 Multiply and Accumulation Processing Figure 3 10 shows multiply and accumulation processing M1 6bitA32bit Setup of multiplicand and multiplier A x X AX Accumulates results Setup of multiplicand and multiplier A x X AX Accumulates results Setup of multiplicand and multiplier A x X AX Accumulates results Setup of multiplicand and multiplier A x X AX Accumulates results RET Sets lower bits of multiplicand to A register and lower bits of multiplier to X register Performs multiplication of lower bits X lower bits Accumulates multiplication results Sets lower bits of multiplicand to A register and higher bits of multiplier to X register Performs multiplication of lower bits X higher bits Accumulates multiplication results Sets higher bits of multiplicand to A register and lower bits of multiplier to X register Performs multiplication of higher bits X lower bits Accumulates multiplication results S
4. time first as the preparation of subtraction The MSB of dividend is set to the LSB of work area and the LSB of dividend becomes 0 Refer to Figure 3 3 The LSB of dividend is used as an area for the quotient in order to obtain the efficiency of processing and domain Work area 16 bits Dividend 16 bits 9 ol o o Sp 0 0 0 b15814B13612811816S8 8281 B0 Figure 3 3 Preparation of subtraction 3 Whether a divisor is able to be subtracted from the work area is confirmed If subtraction is possible the quotient of the time becomes 1 and becomes 0 if impossible This quotient is stored in LSB of a dividend domain The remainder at the time of being over is stored in work area Refer to Figure 3 4 Work area 16 bits Dividend 16 bits 9 of o 0 Kp o o o rsfB14B13812B1 1 816 s 52 81 Bo Subtraction Quotient ier eesel Remainder ofofo o Sp 0 0 x B14813 12 811816 8 82 81 80 Figure 3 4 Execution of Subtraction The notes in this calculation are the column numbers of a quotient After shifting a bit to the left it subtracts and the quotient is certainly stored in LSB of a dividend area each time And when both 2 and 3 are performed the subtraction processing for 1 bit had completed In the case of Figure 3 4 the quotient bit A15 stored in LSB ofa dividend has bit weights of the 15th power of 2 Then it is stored in the right lower side of A15 in order of lighter
5. 2tCENESAS APPLICATION NOTE RL78 G10 RO1AN1976EJ0200 Rev 2 00 Multiplication and Division Program Mar 31 2015 Introduction This application note explains the program which realizes multiplication and division of unsigned integer using RL78 G10 A program is shown about three kinds of arithmetic processing 16bitx16bit 16bitx16bit 32bit and 32bit 32bit Target Device RL78 G10 When applying the sample program covered in this application note to another microcomputer modify the program according to the specifications for the target microcomputer and conduct an extensive evaluation of the modified program RO1AN1976EJ0200 Rev 2 00 Page 1 of 13 Mar 31 2015 RENESAS RL78 G10 Multiplication and Division Program Contents Mis RO CIRC UONNS ens N acess cen deeds voce doen a a 3 2 Operation Check Conditions is ivsiccvicccesecsceserecnsesencsncesevecstseneeatecasrcecssstsanswewscsuieaveusasmensecwen 3 3 Description of SoftWare ccc citccgeacs co esnencnceen gener csnascncuenestcressansecessestaveuseesecucsaceaeesucecscassanus 4 3 1 Operation Outline siete tesco pees acerca permease eaters eesme eee es mee recast ue necesneeveacebuaussneueeuscusiwes 4 3 2 The Way of Thinking Of Multiplication cccceseeseeeeeeneeeeeesseeseenseeseeeseeeeeenseeeoenseeeoenseesoonsees 4 3 3 The Way of Thinking Of DIVISION ccscceeeeeeseeeeeeseeeeeeseeeeeesseeeeeseeeoeaseeeeoensessoeaseesonaseesoonnees 4 34 SigN d D ta Handi
6. Access to reserved addresses is prohibited The reserved addresses are provided for the possible future expansion of functions Do not access these addresses the correct operation of LSI is not guaranteed if they are accessed 4 Clock Signals After applying a reset only release the reset line after the operating clock signal has become stable When switching the clock signal during program execution wait until the target clock signal has stabilized When the clock signal is generated with an external resonator or from an external oscillator during a reset ensure that the reset line is only released after full stabilization of the clock signal Moreover when switching to a clock signal produced with an external resonator or by an external oscillator while program execution is in progress wait until the target clock signal is stable 5 Differences between Products Before changing from one product to another i e to a product with a different part number confirm that the change will not lead to problems The characteristics of an MPU or MCU in the same group but having a different part number may differ in terms of the internal memory capacity layout pattern and other factors which can affect the ranges of electrical characteristics such as characteristic values operating margins immunity to noise and amount of radiated noise When changing to a product with a different part number implement a system evaluation test
7. O1AN1976EJ0200 Rev 2 00 Page 3 of 13 Mar 31 2015 RENESAS RL78 G10 Multiplication and Division Program 3 Description of Software 3 1 Operation Outline In the arithmetic processing of this application note specified operation is performed to the data stored in the variable arranged to a short direct area and the result is set to the variable arranged to the short direct area 3 2 The Way of Thinking of Multiplication Calculation is performed by dividing large data into a small digit as well as the way of the usual computation on paper In this case attention is necessary for digit place figure Here a calculation of hexadecimal numbers of A A A3A4 x B B gt B3By is shown as an example As the calculation method the 8 bit multiply instruction MULU X command is used Calculates in 4 steps of every 2 digits 8 bits multiplication AA x B B2 AjA gt x B3By4 A244 x B Bo A3A4 x B3By and 4 times of calculation results are added with attention to digit place This system is shown in Figure 3 1 Thus an answer can be obtained by adding in consideration of the digit of 4 times of calculation results Here although a multiplicand and a multiplier are 4 digits 16 bits if they are beyond 4 digits 16 bits they are calculable similarly by adding the calculation results of every double figure with attention to digit place 1000000H 10000H_ i digit i digit digit I I I I Shift 8 bits l l l Result of A A2xB3B4
8. ama Shift 8 bits l l l l Result of A A2xB1B2 m Shift 16 bits l l l l Higher Upper Lower Lower 8 bits middie midde 8 bits 8bits 8bits l Figure 3 1 Data Scaling of 16 bitsx16 bits 3 3 The Way of Thinking of Division RL78 G10 does not have a division command Moreover the multiplier and divider multiply accumulator circuit is not carried either Therefore it is necessary to repeat subtraction processing in order to realize division The simplest method is making a quotient the number of times that was able to subtract a divisor from a dividend However by such a simple method processing time will be long It is common to shorten the processing time by repeating subtraction for the number of the bits of the dividend while shifting a dividend by 1 bit With division of 16 bits 16 bits as an example this method is explained like below RO1AN1976EJ0200 Rev 2 00 Page 4 of 13 Mar 31 2015 RENESAS RL78 G10 Multiplication and Division Program 1 In order to execute division by repeating subtraction the work area of the same bit length as a divisor is prepared at higher bits of a dividend and cleared by zero Refer to Figure 3 2 Work area The same bit length as a divisor 16 bits Dividend 16 bits 9 ofo o S9 ofo o o fB19B14B138128 694 88 B2 B1 Bo Figure 3 2 Pre preparation of Calculation 2 In subtraction processing a dividend and work area is shifted 1 bit to the left at a
9. bit weights by repeating 2 and 3 4 The work area and the dividend of a result which performed 2 and 3 for the following digits are shown in Figure 3 5 Work area 16 bits Dividend 16 bits 9 fof o SSo Jo o x x ers er2 er1 a10 2 81 80 Figure 3 5 The Second Execution Result RO1AN1976EJ0200 Rev 2 00 Page 5 of 13 Mar 31 2015 RENESAS RL78 G10 Multiplication and Division Program 5 The work area and dividend that are results of the 3rd shift and subtraction are shown in Figure 3 6 Work area 16 bits Dividend 16 bits fo lolol S fo x x x ferzer fara es B66 80 iara Figure 3 6 The Third Execution Result 6 The work area and dividend that are results of having repeated the same shift and subtraction 16 times are shown in Figure 3 7 Here a surplus is stored in work area and a quotient is stored in a dividend Work area 16 bits Dividend 16 bits xl SS Gafas ae at ao Figure 3 7 The 16th Execution Result Thus when a dividend and a quotient share the same area shift processing can also be shared and a program will be shorter And since the command to execute decreases the speed of processing can also be faster Although the above example was a case of 16 bit data the same view is made even 1f it is 32 bit data 3 4 Signed Data Handling A sign is checked first in order to handle signed data for the multiplication and division In the case of a negative numb
10. cts covered by this document refer to the relevant sections of the document as well as any technical updates that have been issued for the products 1 Handling of Unused Pins Handle unused pins in accordance with the directions given under Handling of Unused Pins in the manual The input pins of CMOS products are generally in the high impedance state In operation with an unused pin in the open circuit state extra electromagnetic noise is induced in the vicinity of LSI an associated shoot through current flows internally and malfunctions occur due to the false recognition of the pin state as an input signal become possible Unused pins should be handled as described under Handling of Unused Pins in the manual 2 Processing at Power on The state of the product is undefined at the moment when power is supplied The states of internal circuits in the LSI are indeterminate and the states of register settings and pins are undefined at the moment when power is supplied In a finished product where the reset signal is applied to the external reset pin the states of pins are not guaranteed from the moment when power is supplied until the reset process is completed In a similar way the states of pins in a product that is reset by an on chip power on reset function are not guaranteed from the moment when power is supplied until the power reaches the level at which resetting has been specified 3 Prohibition of Access to Reserved Addresses
11. d divisor checked D32bit_32bitS2 Division of 32 bit data unsigned no divisor check 3 8 Function Subroutine Specifications This section describes the specifications for the functions subroutine that are used in the sample program Function Name M16bitX16bit Synopsis Multiplication of 16 bit data unsigned Explanation Multiplies the multiplicand stored in RREGO by multiplier stored in RREG1 and its result will be stored in RREG2 Arguments RREGO Multiplicand 16 bits RREG1 Multiplier 16 bits Return value RREG2 Product 32 bits Remarks Registers to be used A X B C Stacks to be used 4 4 bytes Function Name M16bitA32bit Synopsis Multiplies 16 bit data by 16 bit data and the result is added to 32 bit data unsigned Explanation Adds the multiplication result of data stored in RREGO and RREG1 on RREG2 Arguments RREGO Multiplicand 16 bits RREG1 Multiplier 16 bits RREG2 Augend 32 bits Return value RREG2 Product sum 32 bits Remarks Registers to be used A X B C Stacks to be used 4 4 bytes RO1AN1976EJ0200 Rev 2 00 Page 7 of 13 Mar 31 2015 RENESAS RL78 G10 Function Name D32bit_ 32bitS Multiplication and Division Program Confirms whether a divisor is 0 and if it is 0 returns in an error If a divisor is not 0 division is done for the data of RREG2 by the data of RREGO and a quotient will be stored in RREG2 a remainder will be stored in RREG3S Divisor lower 16 bits Divisor high
12. er after memorizing the sign to a flag an absolute value is obtained by taking the complement of 2 to data Arithmetic processing is performed in the obtained absolute value The combination of the sign of two data is checked and a result is made into a value with a sign if required 3 5 List of Constants Table 3 1 lists the constants for the sample program Table 3 1 Constants for the Sample Program Constant senng Peserpion DNdivS 32 8 The number of bytes of a divisor 32 bits DNdivD 32 8 The number of bytes of a dividend 32 bits DNQUO DNdivD x 8 The number of times of calculation RO1AN1976EJ0200 Rev 2 00 Page 6 of 13 Mar 31 2015 RENESAS RL78 G10 Multiplication and Division Program 3 6 List of Variables Table 3 2 lists variables that are used in this sample program Table 3 2 Variables for the Sample Program RREGO Multiplicand area Lower part of divisor area RREG1 Multiplier area Upper part of divisor area RREG2 Multiplication result area Product sum addition area Dividend and quotient area RREG3 Work and remainder area 3 7 List of Functions Subroutine Table 3 3 lists the functions that are used in this sample program Table 3 3 List of Functions Subroutine Functions Subroutine Name M1 6bitX 1 6bit Multiplication of 16 bit data unsigned M1 6bitA32bit 16 bit data is multiplied and the result is added to 32 bit data unsigned D32bit_32bitS Division of 32 bit data unsigne
13. er 16 bits Dividend 32 bits Quotient 32 bits Remainder 82 bits 0 Normal termination 1 Error Divisor is 0 Synopsis Division of 32 bit data unsigned divisor checked Explanation Arguments RREGO RREG1 RREG2 Return value RREG2 RREG3 Carry flag Remarks Registers to be used Stacks to be used Function Name D32bit_ 32bitS2 A X B C L 4 bytes only for CALL command Division of 32 bits data unsigned no divisor check Divides the data of RREG2 by the data of RREGO And then a quotient is stored in RREGQG2 and a remainder is stored in RREGS The divisor check of D32bit_32bitS is Synopsis Explanation omitted Arguments RREGO RREG1 RREG2 Return value RREG2 RREG3 Carry flag Remarks Registers to be used Stacks to be used RO1AN1976EJ0200 Rev 2 00 Mar 31 2015 Divisor lower 16 bits Divisor higher 16 bits Dividend 32 bits Quotient 32 bits Remainder 82 bits 0 Normal termination A X B C L 4 bytes only for CALL command Page 8 of 13 RENESAS RL78 G10 3 9 Flowcharts 3 9 1 Main Processing Figure 3 8 shows the main processing main Set multiplicand to RREGO Set multiplier to RREG1 E M16bitX16bit o Set multiplicand to RREGO Set multiplier to RREG1 A M16bitX16bit E Set multiplicand to RREGO Set multiplier to RREG1 E M16bitA32bit a Set lower 16 bits of divisor to RREGO Set higher 16 bits of divisor to RREG1 babi 226s RET Multiplication and Di
14. ets higher bits of multiplicand to A register and higher bits of multiplier to X register Performs multiplication of higher bits X higher bits Accumulates multiplication results Figure 3 10 Multiply and Accumulation Processing RO1AN1976EJ0200 Rev 2 00 Mar 31 2015 Page 11 of 13 RENESAS RL78 G10 Multiplication and Division Program 3 9 4 Division Processing of 32 Bits Figure 3 11 shows division processing of 32 bits D32bit_S2bitS D32bit_S32bitS2 No Divisor gt 0 lf a divisor is O 0 division it does not process but returns an error Yes Clear of work area Clears the work area minuend area 32 loop count Sets the number of times of subtractions 32 to the loop counter Bitwise operation Shift dividend to Shifts dividend and work area total 32 bits to the left the left Shift of work area A divisor is subtracted from the minuend of workspace 32 bit subtraction No When 32 bit subtraction cannot be performed it carries over to the next digit Yes Subtraction result When it can subtract the result 32 bits is saved in work space 1 result bit Sets 1 to the calculation result of the bit Loop count 1 Ends the processing when the remaining dividend digit counter is counted down and it is set to 0 Loop count 0 Bitwise operation Note 32 bit subtraction processing is divided into two steps one time of 16 bit subtraction and two times 8 bit subtractions Fi
15. for the given product A 1 Notice Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information Renesas Electronics has used reasonable care in preparing the information included in this document but Renesas Electronics does not warrant that such information is error free Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein Renesas Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document No license express implied or otherwise is granted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Renesas Electronics assumes no responsibility for any losses incurred by you or third parties
16. g sossssssk nianse Ea aA AE AEEA 6 39 MSU OE CONS CIES cress ccs eee ia iraia aaraa 6 36 LIS OU V AUN sisca ce aceecescscaucs saencanesualvate see ccattuce sane ouehawasseuadsatcescneseecsaceceiuee 7 3 7 List of Functions SUDIOUTINE cceeeeeeeseenseeecenseeeeeeneeeseenseesoeaseesoonseeseoaaseseonnsessoonseesooanees 7 3 8 Function Subroutine Specifications secceiccciolvecssienucnesiervaereubsuesustulvanueuucudes mewevieucuasneeuecuiuvewauateds 7 SF VOW Ga S ana 9 3 9 1 M in Proc sSsSiNg acct tse etcne teres ecesnnesarecntetutecnccsnceanessvuesencdemecuseduceecitessecanecieuessseteieenes 9 3 9 2 Multiplication Processing of 16 Bits Data cc ccccceeceseeeeeeeeeeeeeeeeeeeneseeneneaeeneaes 10 3 9 3 Multiply and Accumulation Processing ccccsscceeseseeseesseeeeeeeenseeenesenseeeaeeoees 11 3 9 4 Division Processing Of 32 Bits cccssccssseseeseeeseeeeseeensseeneeenseeenseeeneseeseneaeeneaes 12 A DAMPE COUO ec esate EEE E E 13 5 Documents for Reler Ne C aricavann vate vanavitvener cece vanavsincben isla deencseuecienvivnvanstiiessesvicsvansviiadinnvas 13 RO1AN1976EJ0200 Rev 2 00 Page 2 of 13 Mar 31 2015 RENESAS RL78 G10 Multiplication and Division Program 1 Specifications In this application note an actual program and its usage are shown from the view of operation for three kinds of arithmetic processing subroutines 16bitx16bit 16bitx 1 6bit 32bit and 32bit 32bit Table 1 1 shows the arithmetic
17. gure 3 11 Division Processing of 32 Bits R01AN1976EJ0200 Rev 2 00 Page 12 of 13 Mar 31 2015 RENESAS RL78 G10 Multiplication and Division Program 4 Sample Code The sample code is available on the Renesas Electronics Website 5 Documents for Reference RL78 G10 User s Manual Hardware Rev 3 00 RO1UH0384EJ0300 RL78 family User s Manual Software Rev 2 20 RO1USOO15EJ0O220 The latest versions of the documents are available on the Renesas Electronics Website Technical Updates Technical Brochures The latest versions of the documents are available on the Renesas Electronics Website Website and Support Renesas Electronics Website http www renesas com Inquiries http www renesas com contact All trademarks and registered trademarks are the property of their respective owners RO1AN1976EJ0200 Rev 2 00 Page 13 of 13 Mar 31 2015 RENESAS Revision History Rev 1 00 2 00 Date Nov 25 2014 Mar 31 2015 Description Summary First edition issued e2studio and IAR information added in Table 2 1 Modification of description in Explanation of M16bitX16bit Modification of description in Explanation of D32bit_32bitS Modification of description in Explanation of D32bit_32bitS2 Modification of description in Figure 3 8 A 1 General Precautions in the Handling of MPU MCU Products The following usage notes are applicable to all MPU MCU products from Renesas For detailed usage notes on the produ
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21. t is not intended by Renesas Electronics You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics especially with respect to the maximum rating operating supply voltage range movement power voltage range heat radiation characteristics installation and other product characteristics Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges Although Renesas Electronics endeavors to improve the quality and reliability of its products semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use conditions Further Renesas Electronics products are not subject to radiation resistance design Please be sure to implement safety measures to guard them against the possibility of physical injury and injury or damage caused by fire in the event of the failure of a Renesas Electronics product such as safety design for hardware and software including but not limited to redundancy fire control and malfunction prevention appropriate treatment for aging degradation or any other appropriate measures Because the evaluation of microcomputer software alone is very difficult please evaluate the safety of the final products or systems manufactured by you Please contact a Renesas Electronics sales office for details as to envi
22. vision Program RREGO lt WORK RREG1 WORK2 RREG2 RREGO X RREG1 RREGO lt WORK RREG1 WORK2 RREG2 RREGO X RREG1 RREGO lt WORK RREG1 WORK2 RREG2 RREG2 RREGO X RREG1 RREGO lt WORK RREG1 lt 0 RREG3 RREG2 mod RREGO RREG1 lt lt 16 RREG2 RREG2 RREGO RREG1 lt lt 16 Figure 3 8 Main Processing RO1AN1976EJ0200 Rev 2 00 Mar 31 2015 Page 9 of 13 RENESAS RL78 G10 Multiplication and Division Program 3 9 2 Multiplication Processing of 16 Bits Data Figure 3 9 shows multiplication processing of 16 bits data M16bitX1 6bit Zero clear of result area Setup of multiplicand and multiplier AxX AX Accumulates results Setup of multiplicand and multiplier AxX AX Accumulates results Setup of multiplicand and multiplier AxX AX Accumulates results Setup of multiplicand and multiplier AxX AX Accumulates results RET Clears a result area RREG2 to 0 Sets lower bits of multiplicand to A register and lower bits of multiplier to X register Performs multiplication of lower bits X lower bits Accumulates multiplication results Sets lower bits of multiplicand to A register and higher bits of multiplier to X register Performs multiplication of lower bits X higher bits Accumulates multiplication results Sets higher bits of multiplicand to A register and lower bits of multiplier to X
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