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Standard Peripheral Library

1. 297 15 2 9 Message Digest generation functions 299 15 2 10 Context swapping functions 301 15 2 11 HASH DMA interface Configuration function 301 15 2 12 Interrupt and flag management 302 15 2 13 High Level SHA1 304 15 2 14 High Level MD5 functions 2 2 2 305 15 3 HASH Firmware driver 4 4 4 444 0 306 15 31 HASH Firmware driver 5 306 154 HASH Programming Example c eR ERR casein 307 16 circuit interface I2C 309 16 1 I2C Firmware driver registers structures 309 16 1 1 12 TypeDef mmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmmm 309 8 634 DoclD 18540 Rev 1 UM1061 Contents 16 1 2 2 310 16 2 12 Firmware driver 311 16 2 1 to use this 311 16 2 2 Initialization and 312 16 2 3 5 5 312 162 4 PEG management iusserit 312 16 25 DMA transfers
2. 276 14 26 GPIO Read and Write functions 278 14 2 7 Alternate functions configuration function 281 143 GPIO Firmware driver 5 283 14 31 Firmware driver 5 283 144 GPIO Programming Example oni nc EE cum einen 289 15 Hash processor HAGSB trenes secu sna emumu nass aeo na ouam e 292 15 1 HASH Firmware driver registers structures 292 15 1 1 HASH 292 15 1 2 HASH 292 15 1 3 HASH 293 1514 HASH Comte ed ieee eis ed i een 293 152 HASH Firmware driver API description 294 15 2 1 to use this 294 15 2 2 Initialization and configuration 295 15 2 3 Message Digest 2 295 15 2 4 2 2 2 00 000 296 15 2 5 Initialization and 296 15 2 6 Interrupt and flag 296 15 2 7 High 22 2 297 15 2 8 Initialization and configuration
3. OTG HS USB OTG HS clock OTG HS USB OTG HS ULPI clock e NewState new state of the specified peripheral clock This parameter can be ENABLE or DISABLE Return values None Notes e After reset the peripheral clock used for registers read write access is disabled and the application software has to enable this clock before using it 374 634 DocID 18540 Rev 1 4 UM1061 Reset and clock control RCC 19 2 8 6 RCC AHB2PeriphClockCmd Function Name void RCC AHB2PeriphClockCmd uint32 t 2 FunctionalState NewState Function Description Enables or disables the AHB2 peripheral clock Parameters e AHBPeriph specifies the AHB2 peripheral to gates its clock This parameter can be any combination of the following values RCC AHB2Periph DCMI DCMI clock RCC AHB2Periph CRYP CRYP clock RCC AHB2Periph HASH HASH clock AHB2Periph RNG clock RCC AHB2Periph OTG FS USB OTG FS clock e NewState new state of the specified peripheral clock This parameter can be ENABLE or DISABLE Return values Notes e After reset the peripheral clock used for registers read write access is disabled and the application software has to enable this clock before using it 19 2 8 7 RCC AHB3PeriphClockCmd Function Name void RCC AHB3PeriphClockCmd uint32 t FunctionalSt
4. Wait states HCLK clock frequency MHz Voltage range 2 7 to Voltage range 2 4 to Voltage range 2 1 to Voltage range 1 8 to latency 3 6 V 27V 24V 2 1 V 7WS 8CPU NA NA NA 12 1 lt 120 cycle Table 10 Program erase parallelism Voltage range 2 7 3 6 Voltage range Voltage range Voltage range Voltage V with External VPP 2 7 3 6 V 2 4 2 7 V 2 1 2 4V range1 8 V 2 1 V a Maximum x64 x32 x16 x8 parallelism PSIZE 1 0 11 10 01 00 e void FLASH SetLatency uint32 t FLASH Latency e void FLASH PrefetchBufferCmd FunctionalState NewState e void FLASH InstructionCacheCmd FunctionalState NewState e void FLASH DataCacheCmd FunctionalState NewState void FLASH_InstructionCacheReset void void FLASH_DataCacheReset void 12 2 3 3 The unlock seguence is needed for these functions The FLASH interface configuration functions are the following FLASH_SetLatency FLASH_PrefetchBufferCmd FLASH InstructionCacheCmd FLASH DataCacheCmd FLASH InstructionCacheReset FLASH DataCacheReset FLASH memory programming This group includes the following functions void FLASH Unlock void void FLASH Lock void FLASH Status FLASH EraseSector uint32 t FLASH Sector uint8 t VoltageRange FLASH Status FLASH EraseAllSectors uint8 t VoltageRange FLASH Status FLASH ProgramDoubleWord uint32 t Address uint64 t Data FLASH Status FLASH ProgramWord uint32 t Address uint32 t Dat
5. bo Eo He ee He I He La kai He 5 STM32F2xx Peripherals Interrupt Handlers 9 Add here the Interrupt Handler for the used peripheral 5 B for the available peripheral interrupt handler s name please refer to the startup file startup stm3 ir BK KK KK IK IK I kk kk kk kk kk kk kk kk kk kk ck ck ck ck ckck ck kckck ck k ck kckckckck ckck ckck ck ck ckck ckckckck kok k brief This function handles External line 0 LOCMESTE param None retval None void EXTIO IRQHandler void Lif EXIT Line0 RESET toggle STM EVAL LEDToggle LED2 Clear the EXTI line 0 pending bit EXTI ClearlTPendingBit EXTI Linel 2 In stm32f2xx it h file add the LineO ISR prototype as follows just after the line void SysTick_Handler void void EXTIO IRQHandler void DocID 18540 Rev 1 49 634 Analog to digital converter ADC UM1061 3 3 1 3 1 1 50 634 Analog to digital converter ADC ADC Firmware driver registers structures ADC_TypeDef ADC_TypeDetf is defined in the stm32f2xx h file and contains the ADC peripheral registers definition Data Fields 10 uint32_t SR 10 uint32_t CR1 10 uint32_t CR2 10 uint32_t SMPR1 10 uint32_t SMPR2 10 uint32_t JOFR1 10 uint32_t JOFR2 10 uint32_t JOFR3 1
6. 526 25 27 Synchronization management sse 526 25 2 8 Specific 5 527 25 2 0 TimeBase management 527 25 2 10 Output Compare management functions 533 25 2 11 Input Capture management functions 548 25 2 12 Advanced control timers TIM1 and TIM8 specific features 553 25 2 13 Interrupts and flags management functions 555 25 2 14 Clocks management functions 561 25 2 15 Synchronization management functions 563 25 2 16 Specific interface management 566 25 2 17 Specific remapping management 567 25 3 TIM Firmware driver 568 25 3 1 Firmware driver defines seen 568 25 4 Programming Example esses 586 26 Universal synchronous asynchronous receiver transmitter USART ascensu nt n D E IUE 589 26 1 USART Firmware driver registers structures 589 26 1 1 USART_TypeDef ii 589 26 1 2 USART InitTypeDetf 590 18540 Rev 1 13 634 Contents UM1061 26 1 3 05
7. IIO Aus PIS p CE RHI aim 08 as PIO IUMUEStLUCEURS GPIO Pim GPIO Pim 6 PIO MimilieSteUccruce GPIO Mode GPTO Mode PIO GPIO Speed EPIO Spec a PIO Init trvcetuzre GPIO Orype EPIO OType PE PIO 1210 PUPA Pur UP PIO Mme Lime 2 configuration KKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKK TIM3 is configured to generate PWM signal with a frequency of 30 KHz and 50 duty cycle TIM3 input clock TIM3CLK is equal to 18540 Rev 1 587 634 General purpose timers TIM UM1061 POLKI PCLKL prescaler is il 2 x PCLKI otherwise This example assumes that HCLK 120 MHz and PCLK1 30 MHz MSCL 2 60 TIM3 signal frequency TIM6CLK Prescaler 1 Period 30 KHz Setting the Prescaler to 0 the Period TIM6CLK 30 KHz 2000 TIM6 signal duty cycle CCR1 ARR 100 50 Pulse Period 100 50 gt with a Period of 2000 KKKKKKKKKKKKKKKKKKKKKKKKKKKKKKKK Enable TIM3 clock APBIPeriphe loekemd REG Periph Time base configuration TIM TimebaseTmit TIM PWM1 Mode f CHL im TIM OCIMLESELUCEUES TIM OCTMICSCrUCTUTE TIM OCIMmLESELUCHES z TIM
8. 344 18 1 PWR Firmware driver registers structures 344 18 1 1 PWR 344 18 2 PWR Firmware driver 344 18 2 1 Backup Domain 55 344 18 2 2 Power control 344 18 23 Backup Domain Access function 347 18 2 4 PVD configuration functions 348 18 2 5 Wakeup pin configuration function 348 18 26 Backup Regulator configuration 349 18 2 7 FLASH Power Down configuration 349 18 28 Low Power modes configuration 350 DoclD 18540 Rev 1 9 634 Contents UM1061 18 2 9 Flags management functions 351 18 3 PWR Firmware driver defines 352 18 81 PWR Firmware driver defines 352 184 PWH Programming Examples Eee RR nane 353 19 Reset and clock control RCOC less 355 19 1 RCC Firmware driver registers structures 355 355 19 1 2 RCC ClocksTypebDetf 357 19 2 RCC Firmware driver description 35
9. PortSourceGPIOA 0 EXTI Tai EXTI Ini BEKTI Ind EX PI Ini EXTI Imi ine PIO Pin 0 CETORMOCERTN EStructure GPTO PuPd GPIO PuPd CCPIO wf MII COL UCTUCS MIT Mock COSTCTUCTCUTS IIL Wangu IAE SEEN inecmd SEXTI_Ini ESICIeMCIE UES Line0 Bem CEN Periph SYSCFEG ENAB E ENABLE EVIL 2204960026120 y EXIL MOCE WA trigger Falling ENABLE DocID 18540 Rev 1 4 UM1061 FLASH Memory FLASH 12 FLASH Memory FLASH 12 1 FLASH Firmware driver registers structures 12 1 1 FLASH_TypeDef FLASH TypeDetf is defined in the stm32f2xx h file and contains the FLASH interface registers definition Data Fields 2 e 2 t KEYR e JOuint32_t e _ 2 t SR e _ JOuint32 t CR e _ 32 t OPTCR Field Documentation e _ lOuint32 t FLASH_TypeDef ACR FLASH access control register Address offset 0 00 e JOuint32_t FLASH_TypeDef KEYR FLASH key register Address offset 0x04 e _ JOuint32 t FLASH TypeDef OPTKEYR FLASH option key register Address offset 0x08 e _ lOuint32 t FLASH_TypeDef SR FLASH status register Address offset 0 0 e 2 t FLASH_TypeDef CR FLASH control regis
10. 481 23 1 Firmware driver registers 481 23 111 SPI TypeDet eei e d ne RR nd RR a cpu e 481 23 1 2 InitTypeDef 482 23 1 3 125 483 23 2 SPI Firmware driver API description 484 23 2 4 How to use this 484 23 2 2 Initialization and configuration 485 29 23 Ct re co e En 485 23 2 4 Hardware CRC calculation sse 485 23 25 DMA transfers management sss 487 23 2 6 Interrupt and flag management sse 487 23 2 7 Initialization and configuration 488 23 2 8 Data transfers 493 23 2 9 Hardware CRC calculation 494 23 2 10 DMA transfers management 495 23 2 11 Interrupt and flag management 496 23 3 SPI Firmware driver JefiNGS 499 23 3 1 SPI Firmware driver 499 234 SPI Programming Example Ren BIRD Rc metn Su 507 23 41 125 Programming Example sese 509 24 System c
11. 591 26 2 USART Firmware driver API 591 26 2 4 How to use this 591 26 2 2 Initialization and 592 26 2 3 593 26 2 4 Multiprocessor 593 26 25 LIN MOGE ec tte 593 26 2 6 Halfdublex MOJA 594 26 2 7 Smartcard mode 595 26 28 IDA mode ee e e 596 26 2 9 DMA transfers management sss 596 26 2 10 Interrupt and flag management 596 26 2 11 Initialization and configuration 598 26 2 12 Data transfers 5 601 26 2 13 MultiProcessor communication 602 26 2 14 LIN mode 603 26 2 15 Halfduplex mode function sss 605 26 2 16 Smartcard mode functions 605 26 2 17 IrDA mode 606 26 2 18 DMA transfers management 607 26 2 19 Interrupt and flag management 608 26 3 USART Firmware driver 5 611 26 31 USART Firmware driver
12. 312 16 2 6 Interrupt event and flag 312 16 2 7 Initialization and configuration 314 16 28 Data transfers functions 320 16 2 9 321 16 2 10 DMA transfers management 323 16 2 11 Interrupt event and flag management functions 323 16 3 12 Firmware driver defines cuoco 329 16 3 1 2 Firmware driver defines 329 16 4 12 Programming 336 17 Independent watchdog IWDG 338 17 1 IWDG Firmware driver registers structures 338 17 11 ya 338 17 2 IWDG Firmware driver API description 338 17 22 1 and Counter configuration functions 339 17 2 2 IWDG activation 341 17 2 8 Flag management function seen 341 17 3 IWDG Firmware driver 341 17 4 IWDG Programming 343 18 Power control PW ER ein
13. 611 26 4 USART Programming 616 27 Window watchdog 619 27 1 WWDG Firmware driver registers structures 619 27 1 4 X WWDG 619 27 2 WWDOG Firmware driver API 619 27 2 Prescaler Refresh window and Counter configuration functions 620 27 22 WWDOG activation function sess 622 27 2 3 Interrupt and flag management 622 27 3 WWDG Firmware driver 5 623 27 4 WWDG Programming 624 28 Miscellaneous add on to CMSIS functions misc 625 28 1 MISC Firmware driver registers structures 625 28 1 1 625 28 2 MISC Firmware driver API description 625 14 634 DoclD 18540 Rev 1 ky UM1061 Contents 28 2 1 to configure Interrupts using 625 28 2 2 F nctlOns ot tt e etti d e ce t dod een 626 28 3 MISC Firmware driver 628 28 3 1 MISC Firmware driver nneenr n
14. 451 22 1 2 SDIO InitTypeDef aa 452 22 1 3 SDIO 453 22 1 4 SDIO 453 22 2 SDIO Firmware driver API description 454 DoclD 18540 Rev 1 11 634 Contents UM1061 22 2 1 Howto use this 454 22 2 2 linitialization and configuration 456 22 2 3 Command path state machine CPSM management 456 22 2 4 Interrupt and flag management 457 22 2 5 Initialization and configuration 457 22 2 6 Command path state machine CPSM management functions 459 22 2 7 Data path state machine DPSM management functions 461 2228 SDIO IO Cards mode management functions 463 22 2 9 CE ATA mode management 464 22 2 10 DMA transfers management 465 22 2 11 Interrupt and flag management 466 22 3 SDIO Firmware driver defines err rna 471 22 3 1 SDIO Firmware driver defines 471 22 4 SDIO Programming 479 23 Serial peripheral interface SPI
15. 187 Gr DocID 18540 Rev 1 5 634 Contents UM1061 10 1 DMA Firmware driver registers 187 10 1 1 DMA TVDBDOf ccce tactic ae tiq Crit e aed 187 10 1 2 187 10 1 3 188 10 2 DMA Firmware driver API description 189 10 2 1 to use this 189 10 2 2 Initialization and configuration 191 10 2 3 Interrupt and flag 193 10 2 4 Initialization and configuration 194 10 2 5 Data Counter functions 197 10 2 6 Double Buffer mode functions 198 10 2 7 Interrupt and flag management 200 10 3 DMA Firmware driver 203 10 31 DMA Firmware driver 5 203 104 DMA Programming 215 11 External interrupt event controller EXTI 217 11 1 EXTI Firmware driver registers 217 US MES UMS RR 217 11 1 2 217 112 Firmware driver descriptio
16. 12C InitTypeDet 126 Tnitstructure 7 Ielele X291 elok APBlPeriphClockCmd RCC 120 IDetyCcycle 1 9 YA CODEC EC peripher comtigueacion s X2XC I2C Mines TAC lobe Siew Siew 2 Acknowledg nr imr GF mr Ga ure Ure ure ure 126 Mode AC Duryowele OwnAdd resis T20 I2C AcknowledgedAddress bie Clockspescl T2C Ack 0x337 in fast mode must be a multiple of 10 MHz ACL Modem e I2C DUTYCYCLI the PCLK1 frequency ENABLE IEA Enable Enable the 2 peripheral Cd 1201 RECS ENA BL MmLeSeeucTuics DoclD 18540 Rev 1 T2C SP F ED 337 634 Independent watchdog IWDG UM1061 17 17 1 17 1 1 17 2 338 634 Independent watchdog IWDG IWDG Firmware driver registers structures IWDG_TypeDef IWDG TypeDef is defined in the stm32f2xx h file and contains the IWDG registers definition Data Fields e JJOuint32 t KR e 32 t PR e e JlOuint32 t SR Field Documentation e JOuint32_t IWDG TypeDef KR IWDG Key register Address offset 0x00 e _ JOuint32_t IWDG TypeDef PR IWDG Prescaler register Addr
17. APBh1Periph I2C3 2 3 clock APB1Periph CANT clock APB1Periph CAN2 clock PWR PWR clock APB1Periph DAC DAC clock NewState new state of the specified peripheral clock This parameter can be ENABLE or DISABLE None Peripheral clock gating in SLEEP mode can be used to further reduce power consumption After wakeup from SLEEP mode the peripheral clock is enabled again By default all peripheral clocks are enabled during SLEEP mode 19 2 8 19 RCC APB2PeriphClockLPModeCmd 4 Function Name Function Description Parameters void RCC APB2PeriphClockLPModeCmd uint32 t RCC APB2Periph FunctionalState NewState Enables or disables the APB2 peripheral clock during Low Power Sleep mode RCC APB2Periph specifies the APB2 peripheral to gates its clock This parameter can be any combination of the following values APB2Periph TIM1 TIM1 clock APB2Periph TIMG TIM8 clock APB2Periph USART1 USART1 clock APB2Periph 05 6 USARTE clock APB2Periph ADC1 ADC1 clock RCC APB2Periph ADC2 ADC2 clock APB2Periph ADCS ADC3 clock RCC APB2Periph SDIO SDIO clock APB2Periph SPH SP11 clock DoclD 18540 Rev 1 383 634 Reset and clock control RCC UM1061 Return values Notes RCC APB2Periph SYSCFG SYSCFG clock
18. uint16 t IT FunctionalState NewSiate Enables or disables the DCMI interface interrupts e IT specifies the DCMI interrupt sources to be enabled or disabled This parameter can be any combination of the following values DCMI IT FRAME Frame capture complete interrupt mask A DCMI IT OVF Overflow interrupt mask A DCMI IT ERR Synchronization error interrupt mask DCMI IT VSYNC VSYNC interrupt mask DCMI IT LINE Line interrupt mask 0 18540 Rev 1 Gr UM1061 Digital camera interface DCMI 9 2 7 2 9 2 7 3 NewState new state of the specified DCMI interrupts This parameter can be ENABLE or DISABLE Return values e None Notes e None DCMI GetFlagStatus Function Name FlagStatus GetFlagStatus 16 t DCMI FLAG Function Description Checks whether the DCMI interface flag is set or not Parameters Return values Notes DCMI ClearFlag DCMI FLAG specifies the flag to check This parameter can be one of the following values FLAG FRAMERI Frame capture complete Raw flag mask FLAG OVFRI Overflow Raw flag mask DCMI FLAG ERRRI Synchronization error Raw flag mask DCMI FLAG VSYNCRI VSYNC Raw flag mask DCMI FLAG LINERI Line Raw flag mask DCMI FLAG FRAMEMI Frame capture complete Masked flag mask DCMI FLAG OVFMI Overflow Masked flag mask DCMI FLAG ERRMI Synchronization error Masked
19. 123 5 2 CRC Firmware driver API description 123 5 2 1 PUMCUOM AA 124 5 3 CRC Programming Example 126 6 Cryptographic processor 127 6 1 CRYP Firmware driver registers 127 6414 CRYP_TypeDef RR RSS 127 6 1 2 128 6 1 3 2 iaiia 129 644 AVP IVI Ly PSD 129 6 1 5 GRYP Context eR en En OE ea MWA 130 6 2 CRYP Firmware driver API description 131 6 2 1 How to use this driver 131 6 2 2 Initialization and 132 6 2 3 Interrupt and flag management 133 6 2 4 High level 134 6 2 5 Initialization and configuration 135 6 2 6 CRYP Data processing 138 6 2 7 Context Swapping functions 139 6 2 8 CRYPTO interface Configuration function 140 6 2 9 Interrupt and flag management 140 6 2 10 High Level AES functions 141 6 2 11 High Level TDES functions sse 143 6 2 12 High Level DES 144 6 3 CRYP Firmw
20. 7 statie volc SPI Comitig woudl p AN Private functions _ s sss sess Sess sss SS SSS SS SS SS SS SSS SSS WA DocID 18540 Rev 1 507 634 Serial peripheral interface SPI UM1061 Qbrief Main program param None retval None int main void COniiguration SPL Comite 0 2 while 1 Wait till Transmit buffer is empty while SPI 128 GetFlagStatus SPI1 SPI 125 FLAG RESET Send dummy data 125 SendData SPil brief Configures the SPI1 Peripheral param None retval None static woicl SPL Contig vote CPUC iml lnictIypeDet SPI Initortructure Enable the SPI clock RCC AP PARE ENEE Enable the GPIOA clock RCC_AHB1PeriphClockCmd RCC_AHB1Periph GPIOA ENAB 35 RI is Connect PAS tO QET SCK IMANI CEO EPIO Aus SIEII Gowweci PAG SPII MISO GIPINO UMA CPlIOA GEO PimSoumces EPIC AF SII owe PA to SPIL MOST GPLO_PinAnComiig GPlOA PIO PumSource GPIO AT KA Camera SPL pins as alternare No need ico configure PA4 since NSS will be managed by software GPIO lomuteSxwet ame G E10 Pim GPIO Pim 5 GPIO Pi
21. AA cce E void USART3 Config void f Qbrief Main program param None retval None DocID 18540 Rev 1 629 634 Miscellaneous add on to CMSIS functions misc 630 634 27 int main void NVIC InitTypeDef NVIC InitStructure BK KK KK IK kk kk kk kk kk kk kk kk kk kk kk ck ok 5 Configure the 1 1 enable the interrupt generation Configure USART3 with receive interrupt enabled generated when the receive data register is not empty USART3 Config BK KK HK IK KK I I kk kk kk kk kk kk kk kk ck oko Enable peripheral IRQ channel in the NVIC controller KOK KKK KK KK KK KK KK KK KK KK KK HC I KK KK KK KK KK KK KK KK Enable USART3 IRQ channel in the NVIC controller When the USART3 interrupt is generated in this example when data is received the USART3 IROHandler will be served NVIC_InitStructure NVIC_IRQChannel USART3 TROn NIC NIC IROCheannelPreempotionPriority 0p NIC AVIC IROChannelsubPriority Op NVIC_InitStructure NVIC_IRQChannelCmd ENABLE NWI GNWIC SE UCTUTS p BK KK KK IK KK I I I La Ie I I Lai Ie I Hk Step3 the peripheral interrupt handler PP MT GO Em Ii Chemis eee
22. ES ELUC CUES IM PULLS CAL Ibat IONS the Pulse amp TIM TimeBaseStr TIM OutpoucStates T TIM OCPolarity TIM 610125 de MUMS TIM OC Pieler 1000 Fe He I He Ie Ie He Lai ke ke kx BL ENA E TIM TimebageStructure TIM 20007 TIM TimeBasestructure TIM Prescaler 07 TIM TiMePaASoScLUcruce TIM ClockDivision Op TIM WEE ufe TIM CoumterMode TIM CounterMode Upp cture OCMode_PWM1 OutputState Enable P Win 1 21722 1257 signs ETIM C ClMvESELUCCUES Enable ARRPreloadConfig TIM3 ENABL Enable TIM3 counter Cmd TIM3 ENABLE 588 634 DoclD 18540 Rev 1 4 UM1061 Universal synchronous asynchronous receiver transmitter USART 26 Universal synchronous asynchronous receiver transmitter USART 26 1 USART Firmware driver registers structures 26 1 1 USART_TypeDef USART TypeDefis defined in the stm32f2xx h file and contains the USART registers definition Data Fields JlOuint16 t SR uint16 t RESERVEDO JOuint16 t DR uint16 t RESERVED1 JO uint16 t BRR 16 t RESERVED2 lO uint16 t 16 t RESERVED3 16 t CR2 uint16 t RESERVED4 JO uint16 t 16 t RESERVED5 lOuint16 t GTPR 16 t RESERVED6 Field Documentation e _ JOu
23. t CRC_TypeDef IDR Independent data register Address offset 0x04 e 8 t CRC TypeDef RESERVEDO Reserved 0x05 e 16 CRC_TypeDef RESERVED1 Reserved 0x06 e _ lOuint32 t CRC_TypeDef CR Control register Address offset 0x08 5 2 CRC Firmware driver API description The following section lists the various functions of the CRC library Functions CRC ResetDR CRC CalcCRC CRC CalcBlockCRC CRC GetCRC CRC SetIDRegister CRC GetlDRegister DocID 18540 Rev 1 123 634 CRC calculation unit CRC UM1061 5 2 1 Functions 5 2 1 1 CRC_ResetDR Function Name void CRC_ResetDR void Function Description Resets the CRC Data register DR Parameters e None Return values e None Notes e None 5 2 1 2 CRC_CalcCRC Function Name uint32_t CRC_CalcCRC uint32_t Data Function Description Computes the 32 bit CRC of a given data word 32 bit Parameters e Data data word 32 bit to compute its CRC Return values 32 bit CRC Notes e None 5 2 1 3 CRC CalcBlockCRC Function Name uint32 t CRC_CalcBlockCRC uint32_t pBuffer uint32 t BufferLength Function Description Computes the 32 bit CRC of a given buffer of data word 32 bit Parameters e pBuffer pointer to the buffer containing the data to be computed e BufferLength length of the buffer to be computed Return values 32 bit CRC Notes e None 124 634 18540 Rev 1 UM1061 CRC calculation unit CRC
24. HMAC SHA 1 Digest Computation HMAC 5 1 KEY TAB SIZE pBuff INPUT TAB SIZE Shaloutput while 1 DoclD 18540 Rev 1 4 UM1061 Inter integrated circuit interface 2 16 Inter integrated circuit interface 12C 16 1 I2C Firmware driver registers structures 16 1 1 I2C TypeDef 2 TypeDef is defined in the stm32f2xx h file and contains the 2 registers definition Data Fields lO uint16 t CH1 uint16 t RESERVEDO lO uint16 t CR2 16 t RESERVED1 lO uint16 t OAR1 16 t RESERVED2 16 t OAR2 16 t RESERVED3 JOuint16 t DR 16 t RESERVED4 lO uint16 t SR1 16 t RESERVED5 lO 16 t SR2 16 t RESERVED6 16 t CCR uint16 t RESERVED7 16 t TRISE 16 t RESERVED8 Field Documentation e _ 16 1 2 TypeDef CH1 I2C Control register 1 Address offset 0x00 e Uint16 tI2C TypeDef RESERVEDO Reserved 0 02 16 1 2 TypeDef CR2 2 Control register 2 Address offset 0x04 e Uuint16 tI2C TypeDef RESERVED1 Reserved 0x06 e _ JOuint16 1 2 TypeDef OAR1 2 Own address register 1 Address offset 0x08 e 16 tI2C TypeDef RESERVED2 Reserved e _ 16 1 2 TypeDef OAR2 2 Own address register 2 Address offset e uint16_t 12C_TypeDef RESERVED3 Reserved e
25. sse 90 4 1 3 FilterRegister 91 4 1 4 GAN FypeDelt uii ce 91 4 1 5 CAN Intl iei cdit oed ropes cat 92 4 1 6 CAN 94 4 1 7 A OE EA a 95 4 1 8 59 ii awaka 95 4 2 CAN Firmware driver API 96 4 2 1 How to use this driver 96 4 2 2 Initialization and configuration 97 4 2 3 Interrupt and flag management 98 4 2 4 Initialization and configuration 100 4 2 5 CAN Frames Transmission 103 4 2 6 CAN Frames Reception functions 104 4 2 7 CAN Operation modes functions seen 105 4 2 8 CAN Bus Error management functions 106 4 2 9 Interrupt and flag management 108 DoclD 18540 Rev 1 3 634 Contents UM1061 4 3 CAN Firmware driver defines 111 4 3 1 CAN Firmware driver defines 111 4 4 CAN Programming Example 121 5 CRC calculation unit CRC 123 5 1 CRC Firmware driver registers structures 123 5 1 1 Bl BEI is nire nerd nan
26. UM1061 General purpose timers TIM 25 2 11 7 TIM_GetCapture4 Function Name uint32 t TIM_GetCapture4 TIM TypeDef TIMx Function Description Gets the TIMx Input Capture 4 value Parameters e TIMx where x can 1 2 3 4 5 or 8 to select the TIM peripheral Return values Capture Compare 4 Register value Notes e None 25 2 11 8 SetlC1Prescaler Function Name void TIM_SetiC1Prescaler T M TypeDef uint16 t TIM_ICPSC Function Description Sets the TIMx Input Capture 1 prescaler Parameters TIMx where x can be 1 to 14 except 6 and 7 to select the TIM peripheral e TIM_ICPSC specifies the Input Capture1 prescaler new value This parameter can be one of the following values ICPSC DIV1 no prescaler ICPSC DIV2 capture is done once every 2 events TIM ICPSC DIVA capture is done once every 4 events TIM ICPSC capture is done once every 8 events Return values e None Notes None 25 2 11 9 SetlC2Prescaler 4 DociD 18540 Rev 1 551 634 General purpose timers TIM UM1061 Function Name Function Description Parameters Return values Notes void SetiC2Prescaler T M TypeDef uint16 t 5 Sets the TIMx Input Capture 2 prescaler 25 2 11 10 TIM_SetiC3Prescaler Function Name Function Description Parameters Return values Notes TIMx where x can be 1 2 3 4 5 8
27. enable the DMA mode for regular channels group use the ADC DMACma function To enable the generation of DMA requests continuously at the end of the last DMA transfer use the ADC DMARequestAfterLastTransferCma function Injected channels group configuration To configure the ADC Injected channels group features use ADC InjectedChannelConfig and InjectedSequencerLengthConfig functions activate the continuous mode use the ADC_continuousModeCmd function To activate the Injected Discontinuous mode use the ADC_InjectedDiscModeCmd function activate the Autolnjected mode use the ADC AutolnjectedConvCmd function Toread the ADC converted values use the ADC GetlnjectedConversionValue function Initialization and configuration This section provides functions allowing to Initialize and configure the ADC Prescaler ADC Conversion Resolution 12bit 6bit Scan Conversion Mode multichannels or one channel for regular group ADC Continuous Conversion Mode Continuous or Single conversion for regular group External trigger Edge and source of regular group Converted data alignment left or right The number of ADC conversions that will be done using the sequencer for regular channel group Multi ADC mode selection Direct memory access mode selection for multi ADC mode Delay between 2 sampling phases used in dual or triple interleaved modes Enable or disable the AD
28. output compare fast disable None None void TIM_ClearOC1Ref T M_TypeDef TIMx uint16 t TIM_OCClear Clears or safeguards the OCREF1 signal an external event e TIMx where x can be 1 to 14 except 6 and 7 to select the TIM peripheral e TIM OCClear new state of the Output Compare Clear Enable Bit This parameter can be one of the following values TIM Enable Output clear enable OCClear Disable Output clear disable None None void TIM_ClearOC2Ref T M_TypeDef uint16_t TIM_OCClear Clears or safeguards the OCREF2 signal on an external event e where x be 1 2 3 4 5 8 9 or 12 to select the TIM peripheral e OCClear new state of the Output Compare Clear Enable Bit This parameter can be one of the following values TIM OCClear Enable Output clear enable OCClear Disable Output clear disable None None DociD 18540 Rev 1 543 634 General purpose timers TIM UM1061 25 2 10 25 TIM ClearOC3Ref Function Name Function Description Parameters Return values Notes 25 2 10 26 TIM ClearOC4Ref Function Name Function Description Parameters Return values Notes void TIM_ClearOC3Ref T M_TypeDef TIMx uint16 t TIM_OCClear Clears or safeguards the OCREFS signal an external event e TIMx where x can be 1 2 3 4 5 or 8 to select t
29. peripheral Preload register on ARR DociD 18540 Rev 1 531 634 General purpose timers TIM UM1061 Parameters Return values Notes TIMx where x can be 1 to 14 to select the TIM peripheral NewState new state of the TIMx peripheral Preload register This parameter can be ENABLE or DISABLE None None 25 2 9 13 SelectOnePulseMode 25 2 9 14 532 634 Function Name Function Description Parameters Return values Notes void TIM SelectOnePulseMode TypeDef TIMx uint16_t TIM_OPMode Selects the TIMx s One Pulse Mode TIM_SetClockDivision Function Name Function Description Parameters Return values Notes TIMx where x can be 1 to 14 to select the TIM peripheral specifies the OPM Mode to be used This parameter can be one of the following values OPMode Single TIM OPMode Repetitive None None void TIM SetClockDivision TypeDef TIMx uint16 t TIM CKD Sets the TIMx Clock Division value TIMx where x can be 1 to 14 except 6 and 7 to select the TIM peripheral TIM CKD specifies the clock division value This parameter can be one of the following value CKD DIV1 TDTS tim DIV2 TDTS 2 Tck tim DIV4 TDTS 4 Tck tim None None DoclD 18540 Rev 1 4 UM1061 General purpose timers TIM 25 2 9 15 TIM_Cmd Function Na
30. 52 3 2 ADC Firmware driver 53 3 2 1 How to use this driver eene 53 3 2 2 Initialization and 54 3 2 3 Interrupt and flag management 56 3 2 4 Initialization and configuration 57 3 2 5 Analog Watchdog configuration 60 3 2 6 Temperature Sensor Vrefint Voltage Reference internal 62 3 2 7 Regular Channels Configuration 62 3 2 8 Regular Channels DMA Configuration functions 67 3 2 9 Injected channels Configuration 68 3 2 10 Interrupt and flag management 74 3 3 ADC Firmware driver defines 76 3 3 1 ADC Firmware driver defines 76 3 4 ADC Programming Example 88 4 Controller area network CAN 90 4 1 CAN Firmware driver registers structures 90 4 1 1 _ _ 22 90 4 1 2 TypebDetf
31. KKK KK KK kCkCk KK kCk Ck k kk k kk k kc k Ck kCk Ck k kk k kc k k kc k Ck k k ck kck ck kck ck ck k ck ckckck ck ckck kc kk k Refer to next section Tstmo2f2xx lit c while 1 brief Configures the USART3 Peripheral param None retval None void USART3 Config void GPIO GPIO ImiicStivuccuce USART InitIypeDet USART IMLECSETUCEUTS USART LOS configuration KOR KKK KKK KKK KK KK KK KKK KK KK kk J clock AHBlPeriphClockCmd RCC AHBlPeriph GPIOC ENABLE f Connect EXC to USART T lt CLLOC PimSouxceld IIO AR USARISI c Connect PCI io USART Bus DoclID 18540 Rev 1 UM1061 4 UM1061 Miscellaneous add on to CMSIS functions misc 4 QAAAQAQAADA PIO 1 CCPIO LEILA 2 EE CLIO IMANI CLLOC CELIO PimSouxeeli IIO Au USES Configure USART3 Tx and USART Rx as alternate function PIO GPIO Pim Gero Pim 10 GPIO Pim 115 PIO Tnit trueture CELIO Mode GPTO Mode AF PIO CPTO Speed GPIO Spesd SOME 5 PIO ImiieSriwccwuice GPIO Olyee CPIO ONwse PIO GPIO lube GPIO PuPe UR USART configuration Fe ee HH HH HH HH HH HH HH HH HC HH I I ON CC I Fa USARTS Comiicueecd as BaudRate 115200 baud Word Length 8 Bits One Step ut No parity Hard
32. 16 1 2 TypeDef DR 2 Data register Address offset 0x10 DocID 18540 Rev 1 309 634 Inter integrated circuit interface 12C UM1061 16 1 2 310 634 uint16 1 2 TypeDef RESERVEDA Reserved 0x12 JO uint16 tI2C TypeDef SR1 I2C Status register 1 Address offset 0x14 uint16_t I2C TypeDef RESERVED5 Reserved 0x16 JO uint16 tI2C TypeDef SR2 I2C Status register 2 Address offset 0x18 uint16_t l2C_TypeDef RESERVED6 Reserved 0x1A JO uint16_t l2C_TypeDef CCR 2 Clock control register Address offset 0x1C uint16_t 12C_TypeDef RESERVED7 Reserved Ox1E 10 uint16 112 TypeDef TRISE 2 TRISE register Address offset 0x20 uint16_t l2C_TypeDet RESERVED8 Reserved 22 I2C_InitTypeDef 12 InitTypeDef is defined in the stm32f2xx_i2c h and contains the 2 initialization parameters Data Fields uint32_t I2C ClockSpeed uint16 t I2C Mode uint16 t I2C DutyCycle uint18 t I2C OwnAdaress1 uint16 112 Ack uint18 t I2C AcknowledgedAddress Field Documentation uint32 t I2C InitTypeDef I2C ClockSpeed Specifies the clock frequency This parameter must be set to a value lower than 400kHz uint16_t I2C InitTypeDef I2C Mode Specifies the I2C mode This parameter can be a value 2 mode uint16 tI2C InitTypeDef I2C DutyCycle Specifies the 12C fast mode duty cycle This parameter can be a value of I2C duty cycle in fa
33. 5 2 1 4 5 2 1 5 5 2 1 6 4 CRC GetCRC Function Name uint32 tCRC GetCRC void Function Description Returns the current CRC value Parameters e None Return values 32 bit CRC Notes e None CRC SetiDRegister Function Name void CRC SetiDRegister uint8_t IDValue Function Description Stores a 8 bit data in the Independent Data ID register Parameters e l DValue 8 bit value to be stored in the ID register Return values e None Notes None CRC GetiDRegister Function Name uint8_t CRC GetiDRegister void Function Description Returns the 8 bit data stored in the Independent Data ID register Parameters e None Return values 8 bit value of the ID register Notes e None DoclD 18540 Rev 1 125 634 CRC calculation unit CRC UM1061 5 3 126 634 CRC Programming Example The example below explains how to compute the 32 bit CRC of a given data word 32 bit For more examples about CRC configuration and usage please refer to the examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples CRC 10 t CRCWalme OF RCC 5 exueunEe ie CIC ara 05455 349 CRC 0555 6 5 461 9 1 p 4 DocID 18540 Rev 1 UM1061 Cryptographic processor CRYP
34. Format BCD BCD data format RTC TimeStruct pointer to RTC_TimeTypeDef structure that contains the time configuration information for the RTC An ErrorStatus enumeration value SUCCESS RTC Time register is configured ERROR RTC Time register is not configured None void RTC TimeStructlnit RTC_TimeTypeDef Fills each RTC_TimeStruct member with its default value Time 00h 00min 00sec TimeStruct pointer to a RTC TimeTypeDef structure which will be initialized None None void RTC GetTime uint32 t RTC Format RTC TimeTypeDef DoclD 18540 Rev 1 429 634 Real time clock RTC UM1061 21 2 12 4 21 2 12 5 430 634 Function Description Parameters Return values Notes RTC SetDate Function Name Function Description Parameters Return values Notes RTC DateStructinit Function Name Function Description RTC TimeStruct Get the RTC current Time RTC Format specifies the format of the returned parameters This parameter can be one of the following values Format BIN Binary data format Format BCD BCD data format TimeStruct pointer to TimeTypeDef structure that will contain the returned current time configuration None None ErrorStatus RTC SetDate uint32 t RTC Format RTC_DateTypeDef RTC DateStruct Set the RTC current date RTC Format specifies the format of
35. Oz 5 0 8 8 x09 sede Osa EL Ox3e f vector UME TE EEG 1000 0011 002 0053 0x04 0057 Ox 0167 0077 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0 uint8 t Plaintext AES TEXT SIZE 10x65 1 Uxbe 0 2 0 2 0x40 0598 0x96 Ox3cl OE ev Oxi O lt 73 01x 93 Oxi 7 OZ ei Wau 05221 02a 0o 0x lier 0 sO scale Os oer DocID 18540 Rev 1 UM1061 Cryptographic processor CRYP 4 12200108 Pers 9 0 0x45 0xaf 99 30 Oxo 05 Qs 0 205 0x rpo Osee dE xi Ost Ls Osx Vay 7 sceite Obst OxeSit 0x24 O45 AA y Oach 0215 Oxi Or Vio Oxe6 Ox6e Ox 7 Oxi O Encryptedtext AES brief Main program param None retval None a int main void Enable RCC CRYP AES the plaintext P 5 MODE Encrypt the plaintex CRYP AES CTR MOD while 1 RCC CRAZE TEXT SIZE ENABLE message in ECB mode B MODE ENCRYPT AES128key 128 Plaintext AES TEXT SIZE Encryptedtext
36. TypeDef FunctionalState NewState Enables or disables the TIM peripheral Main Outputs TIMx where x can be 1 or 8 to select the TIMx peripheral NewState new state of the TIM peripheral Main Outputs This parameter can be ENABLE or DISABLE None None void TIM SelectCOM T M_TypeDef TIMx FunctionalState NewSiate Selects the TIM peripheral Commutation event TIMx where x can be 1 or 8 to select the TIMx peripheral NewState new state of the Commutation event This parameter can be ENABLE or DISABLE None None DociD 18540 Rev 1 UM1061 General purpose timers TIM 25 2 12 5 CCPreloadControl 25 2 13 25 2 13 1 4 Function Name void CCPreloadControl TypeDef TIMx FunctionalState NewState Function Description Sets or Resets the TIM peripheral Capture Compare Preload Control bit Parameters e TIMx where x can be 1 or 8 to select the TIMx peripheral e NevwState new state of the Capture Compare Preload Control bit This parameter can be ENABLE or DISABLE Return values e None Notes None Interrupts DMA and flags management functions Function Name void TypeDef TIMx uint16_t FunctionalState NewState Function Description Enables or disables the specified TIM interrupts Parameters e TIMx where x be 1 to 14 to select the TIMx peripheral TIM
37. be any combination of the following values FLAG AWD Analog watchdog flag ADC FLAG EOC End of conversion flag FLAG End of injected group conversion flag FLAG JSTHT Start of injected group conversion flag FLAG Start of regular group conversion flag FLAG Overrun flag Return values e None Notes e None 3 2 10 4 ADC GetlTStatus Function Name ITStatus ADC GetlTStatus ADC TypeDef ADCx uint16 t DocID 18540 Rev 1 75 634 Analog to digital converter ADC UM1061 3 2 10 5 3 3 3 3 1 76 634 ADC Function Description Checks whether the specified ADC interrupt has occurred or not Parameters e ADCx where x be 1 2 or 3 to select the ADC peripheral e ADC IT specifies the ADC interrupt source to check This parameter can be one of the following values ADC_IT_EOC End of conversion interrupt mask ADC AWD Analog watchdog interrupt mask IT JEOC End of injected conversion interrupt mask IT Overrun interrupt mask Return values The new state SET RESET Notes e None ADC ClearlTPendingBit Function Name void ADC ClearlTPendingBit ADC TypeDef ADCx uint16 t ADC IT Function Description Clears the ADCx s interrupt pending bits Parameters e ADCx where x can be 1 2 or 3 to select the ADC peripheral e ADC IT specifies the ADC interrupt pending bit
38. 576 634 e TIM_FLAG_CC3 uint16_t 0x0008 e TIM_FLAG_CC4 uint16_t 0x0010 e FLAG COM uint16 1 0x0020 e define FLAG Trigger uint16 t 0x0040 e define FLAG Break uint18 1 0x0080 e FLAG CCTOF uint16 t 0x0200 e FLAG CC20F uint16 t 0x0400 e FLAG CCS3OF uint16 t 0x0800 e define FLAG CC4OF uint16 t 0x1000 TIM Forced Action e didefine ForcedAction Active uint16 t 0x0050 e didefine ForcedAction InActive uint16 1 0 0040 TIM Input Capture Polarity DocID 18540 Rev 1 4 UM1061 General purpose timers TIM 3 e define TIM ICPolarity Rising uint18 t 0x0000 e define ICPolarity Falling uint16 1 0x0002 e define ICPolarity BothEdge uint16 1 0 000 TIM Input Capture Prescaler e define ICPSC DlV1 uint18 t 0x0000 Capture performed each time an edge is detected on the capture input e ICPSC DIV2 uint16 1 0 0004 Capture performed once every 2 events e define ICPSC DlV4 uint16 1 0x0008 Capture performed once every 4 events e ICPSC DIV8 uint18 1 0 000 Capture performed once every 8 events TIM Input Capture Selection e define ICSelection DirectTl uint16 t 0x0001 TIM Input 1 2 or 4 is selected to be connected to
39. List of figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 4 Library ARCHITEC CHUNG 27 Library re Ert 28 Library tolder StruCture 29 Project folder SU Aa rr mmm mm m ARES 32 Utilhties folder strUCtUrS 34 Message displayed the LCD when running the template 43 How to run a peripheral example 43 STM32F2xx programming model using the 44 18540 Rev 1 17 634 STM32F2xx Standard Peripheral Library UM1061 18 634 STM32F2xx Standard Peripheral Library Coding rules and conventions The conventions used in the present user manual and in the library are described in the sections below Acronyms Table 1 List of abbreviations describes the acronyms used in this document Table 1 List of abbreviations Acronym Peripheral unit ADC Analog to digital BKPSRAM Backup SRAM memory CAN Controller area network CRC CRC calculation unit CRYP Cryptographic processor DAC Digital to analog converter DBGMCU Debug MCU DOMI Digital camera interface DMA DMA controller EXTI External interrupt event controller FSMC Flexible static memo
40. BDTRInitTypeDef TIM Break Specifies whether the TIM Break inputis enabled or not This parameter can be a value of TIM Break Input enable disable uint16_t TIM BDTRinitTypeDef TIM BreakPolarity Specifies the TIM Break Input pin polarity This parameter can be a value of TIM_Break_Polarity uint16 t TIM BDTRInitTypeDef TIM AutomaticOutput Specifies whether the TIM Automatic Output feature is enabled or not This parameter can be a value of TIM AOE Bit Set Reset TIM Firmware driver API description The following section lists the various functions of the TIM library How to use this driver This driver provides functions to configure and program the TIM of all STM32F2 devices These functions are split in 9 groups 1 TIM TimeBase management this group includes all needed functions to configure the TM Timebase unit Set Get Prescaler Set Get Autoreload Counter modes configuration Set Clock division Select the One Pulse mode Update Request Configuration Update Disable Configuration Auto Preload Configuration Enable Disable the counter TIM Output Compare management this group includes all needed functions to configure the Capture Compare unit used in Output compare mode Configure each channel independently in Output Compare mode Select the output compare modes Select the Polarities of each channel Set Get the Capture Compare register values Sele
41. RCC SYSCLKSource PLLCLK uint32 1 0x00000002 RCC Programming Example The example below explains how to use the RCC driver to configure the system clock to 120 MHz using the PLL as clock source you can tailor the parameters PLL M PLL N and PLL P to have different system clock settings For more examples about RCC configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples RCC DoclID 18540 Rev 1 4 UM1061 Reset and clock control RCC 4 PLL VCO HSE VALUE HSI VALUE define PLL 25 For HSE value equal to 25 MHz define PL QN 240 PLL YA PLL PA define PL 2 USE CHG FS SDIO amcl RNG Clock PLL WOO PELO define PLL Q example PLL VCO 240 MHz SYSCIIK 120 Miz 5 BK KK KK KK I kk kk kk kk kk kk kk kk kk ck ok k PLL clocked by HSE used as System clock SYSCLK source ulnto2 t StarcUpCcoumesr 0 HSEStartUpstatus 07 Enable HSE RCC_HSEConfig RCC_HSI IES Wait till HSE is ready HSEStartUpStatus WaitForHSEStartUp if HSEStartUpStatus SUCCESS Flash 3 wait state prefetch buffer and cache ON FLASH
42. TIM MasterSlaveMode Enable synchronization between the current timer and its slaves through TRGO TIM MasterSlaveMode Disable No action None None void TypeDef TIMx uint16 t ExtTRGPrescaler uint16_t ExtTRGPolarity uint16 t ExtTRGFilter Configures the TIMx External Trigger ETR TIMx where x be 1 2 3 4 5 or 8 to select the TIM peripheral TIM ExtTRGPrescaler The external Trigger Prescaler This parameter can be one of the following values TIM ExtTRGPSC OFF ETRP Prescaler OFF DoclD 18540 Rev 1 565 634 General purpose timers TIM UM1061 25 2 16 25 2 16 1 566 634 Return values Notes TIM_ExtTRGPSC_DIV2 frequency divided by 2 TIM_ExtTRGPSC_DIV4 frequency divided by 4 TIM_ExtTRGPSC_DIV8 ETRP frequency divided by 8 TIM ExtTRGPolarity The external Trigger Polarity This parameter can be one of the following values ExITRGPolarity Inverted active low or falling edge active TIM_ExtTRGPolarity_NonInverted active high or rising edge active ExtTRGFilter External Trigger Filter This parameter must be a value between 0x00 and Ox0F None None Specific interface management functions TIM EncoderlnterfaceConfig Function Name void EncoderlnterfaceConfig TypeDef TIMx uint 6 t EncoderMode uint16_t TIM IC1Polarity uint 6 t TIM
43. c Connect PDI to CANI Tx pin Connect PDO to Rx pin PIO Lia ie GPIO Pim GPIO Pim O 21 kaimu Ca PIO GE OID amp GIPIO Configure CANI Br and CANI Te IDL pins GEO um gt PIO Tnitstrueture Mode GPTO Mode AU PIO wee Speed EPIC Speec Sli CEMORONYPERRE PIO SHE LUCTUS GPIO Pubcl PURE UP EIA 12 IIO CANI 5 PiDnARComiig CLLOD PimSoumcel PO Aus CAN configuration Fe ee Ed aile boi A I I I I ke ke I DoclD 18540 Rev 1 121 634 Controller area network CAN UM1061 122 634 Enable CANL clock RCC_APB1PeriphClockCmd RCC_APB1Periph ENABLE CAN ICH DISABL InitStructure CAN DISABLE InitStructure CAN AWUM DISABLE CAN CAN BIA InitStructure CAN DISABLE CAN nae aa CAN IG InitStructure CAN Mode CAN Mode Normal CAN Baudr CAN InitStru CAN Jones CAN InitStru CAN Init CAN e 1 ure CAN BS1 ure CAN BS2 Wes CAN Proscales Gr ior Gr mr iar mr
44. system_stm32f2xx h Header file for system_stm32f2xx c startup_stm32f2xx s Provides the Cortex M3 startup code and interrupt vectors for all STM32F2xx device interrupt handlers This module performs the following functions lt sets the initial SP DocID 18540 Rev 1 Gr UM1061 STM32F2xx Standard Peripheral Library File name Description lt sets the initial Reset Handler e t sets the vector table entries with the exceptions ISR address e l tbranchesto main the C library which eventually calls main A file is provided for each compiler Table 4 STM32F2xx StdPeriph Driver files description File name Description stm32f2xx ppp c Driver source code file of PPP peripheral coded in Strict ANSI C and independent from the development Tools stm32f2xx ppp h Provides functions prototypes and variable definitions used within for stm32f2xx ppp c file misc c Provides all the miscellaneous firmware functions add on to CMSIS functions misc h Header for misc c file DocID 18540 Rev 1 31 634 STM32F2xx Standard Peripheral Library UM1061 1 3 2 Project folder This folder contains template projects and peripheral examples Its structure is shown in the figure below Figure 4 Project folder structure Project STM32F2 StdPeriph Examples ADC 3 CRC CRYP DAC D
45. 16 t TIM ICInitTypeDef TIM ICPrescaler Specifies the Input Capture Prescaler This parameter can be a value of TIM Input Capture Prescaler e uint16 t TIM ICInitTypeDef TIM ICFilter Specifies the input capture filter This parameter be a number between 0x0 and OxF 25 1 5 BDThInitTypeDef 3 BDTRInitTypeDef is defined in the stm32f2xx_tim h file and contains the Break feature initialization parameters Data Fields uint16_t TIM OSSRState uint16_t OSSIState uint16_t TIM LOCKLevel uint16_t TIM DeadTime uint16_t TIM Break uint16_t TIM_BreakPolarity uint16_t TIM_AutomaticOutput Field Documentation e 16 t TIM_BDTRinitTypeDef TIM_OSSRState DocID 18540 Rev 1 521 634 General purpose timers TIM UM1061 25 2 25 2 1 522 634 Specifies the Off State selection used in Run mode This parameter be a value of TIM OSSR Off State Selection for Run mode state uint16 t TIM BDTRInitTypeDef TIM OSSIState Specifies the Off State used in Idle state This parameter can be a value of OSSI Off State Selection for Idle mode state uint16 t BDTRInitTypeDef TIM LOCKLevel Specifies the LOCK level parameters This parameter can be a value of TIM Lock level uint16 t TIM BDTRInitTypeDef TIM DeadTime Specifies the delay time between the switching off and the switching on of the outputs This parameter can be a number between 0x00 and OxFF uint16 t
46. 229 12 2 7 FLASH memory programming functions 231 12 2 8 Option bytes programming 235 12 2 9 Interrupt and flag management 239 12 3 FLASH Firmware driver defines 242 12 31 FLASH Firmware driver defines 242 12 4 FLASH Programming Example 25 ether 247 13 Flexible static memory controller FSMC 250 13 1 FSMC Firmware driver registers structures 250 13 11 FSMC Banki 250 13 1 2 FSMC Bank1E TypebDef sse 250 13 1 3 FSMC Bank2 250 13 14 FSMC Bank3 251 13 1 5 FSMC Bank4 252 13 1 6 FSMC 252 13 1 7 5 NORSRAMInitTypeDetf 253 13 1 8 FSMC 255 13 1 9 FSMC 255 13 1 10 FSMC 256 13 2 Firmware driver API 257 13 2 1 257 13
47. 4 time quantum e define CAN 51 5tq uint8 1 0 04 5 time quantum e define CAN 51 6tq uint8 1 0 05 6 time quantum e define CAN BS1 7tq uint8 1 0 06 7 time quantum e define CAN BS1 Gtq uint8 1 0 07 8 time quantum 118 634 DocID 18540 Rev 1 UM1061 Controller area network CAN e define CAN_BS1_9tq uint8_t 0x08 9 time guantum e define CAN_BS1_10tq uint8_t 0x09 10 time quantum e define CAN_BS1_11tq uint8_t Ox0A 11 time quantum e define CAN_BS1_12tq uint8_t Ox0B 12 time quantum e CAN_BS1_13tq uint8_t Ox0C 13 time quantum e define CAN BS1 14tq uint8 t JOxOD 14 time quantum e define CAN BS1 15tq uint8 t OxOE 15 time quantum e define CAN BS1 16tq uint8 t OxOF 16 time quantum CAN time quantum in bit segment 2 e define CAN BS2 11 8 1 0 00 1 time quantum e iidefine CAN BS2 2tq uint8 1 0 01 2 time quantum e define CAN 52 S3tq uint8 1 0 02 3 time quantum e define CAN BS2 4tq uint8 1 0 03 DocID 18540 Rev 1 119 634 Controller area network CAN UM1061 120 634 4 time quantum e define CAN_BS2_5tq uint8_t 0x04 5 time quantum e define CAN BS2 6tq uint8 t 0x05 6 time quantum e define CAN BS2 7tq uint8 1 0 06 7 time quantum e define CAN BS2 Gtq uint8 1 0 07 8 time quantum CAN transmit constants e define CAN TxSta
48. 8 1 0 20 ADC interrupts definition e define ADC IT EOC uint16 1 0x0205 e define ADC AWD uint16 t 0x0106 e define ADC IT JEOC uint16 1 0 0407 86 634 DocID 18540 Rev 1 3 UM1061 Analog to digital converter ADC 3 e define 16 t 0x201A ADC Prescaler e define ADC Prescaler Div2 uint32 1 0x00000000 e define Prescaler Div4 uint32 1 0x00010000 e didefine ADC Prescaler Div6 uint32 1 0x00020000 e didefine ADC Prescaler Div8 uint32 1 0x00030000 ADC resolution e didefine ADC Resolution 12b uint32 1 0x00000000 e didefine ADC Resolution TOb uint32 1 0x01000000 e didefine ADC Resolution 8b uint32 1 0x02000000 e define ADC Resolution 6b uint32 1 0x03000000 ADC sampling times e define ADC SampleTime 3Cycles uint8 t 0x00 e define ADC SampleTime 15Cycles uint8 t 0x01 DocID 18540 Rev 1 87 634 Analog to digital converter ADC UM1061 e define SampleTime 28Cycles uint8 1 0 02 e define ADC SampleTime 56Cycles uint8 1 0 03 e define ADC SampleTime 84Cycles uint8 1 0 04 e define ADC SampleTime 112Cycles uint8 1 0x05 e define ADC SampleTime 144Cycles uint8 1 0x06 e define SampleTime 480Cycles uint8 1 0 07 3 4 ADC Programming Example The example below explains how to configure the ADC1 to convert continuously channel14 this example assumes that ADC channel14 pi
49. Card control register 4 Address offset 0 0 JO uint32 t FSMC_Bank4_TypeDef SR4 Card FIFO status and interrupt register 4 Address offset OxA4 JO uint32 t FSMC Bank4 TypeDef PMEMA PC Card Common memory space timing register 4 Address offset 0xA8 JO uint32 t FSMC_Bank4_TypeDef PATT4 PC Card Attribute memory space timing register 4 Address offset JO uint32_t FSMC Bank4 TypeDeft PlO4 PC Card I O space timing register 4 Address offset FSMC NORSRAMTiminglnitTypeDef FSMC NORSRAMTiminglnitTypeDef is defined in the stm32f2xx fsmc h file and contains the NOR SRAM timing initialization parameters Data Fields uint32 t FSMC AddressSetupTime uint32 t FSMC AddressHoldTime uint32 t FSMC DataSetupTime uint32 t FSMC BusTurnAroundDuration uint32 t FSMC CLKDivision uint32 t FSMC_DataLatency uint32 t FSMC AccessMode Field Documentation uint32 t FSMC NORSRAMTiminglnitTypeDef FSMC AddressSetupTime Defines the number of HCLK cycles to configure the duration of the address setup time This parameter be a value between 0 and OxF This parameter is not used with synchronous NOR Flash memories uint32_t FSMC NORSRAMTiminglnitTypeDef FSMC AddressHoldTime DoclD 18540 Rev 1 UM1061 Flexible static memory controller FSMC Defines the number HCLK cycles to configure the duration of the address hold time This parameter can be a value between 0 and Ox
50. Connect TIM13 pins to AF9 AF TIM14 Connect TIM14 pins to AF9 AF OTG FS Connect OTG FS pins to AF10 GPIO AF OTG HS Connect OTG HS pins to AF10 GPIO AF ETH Connect ETHERNET pins to AF11 AF FSMC Connect FSMC pins to AF12 AF OTG HS FS Connect OTG HS configured in FS pins to AF12 GPIO SDIO Connect SDIO pins to AF12 AF DCMI Connect DOMI pins to AF13 AF EVENTOUT Connect EVENTOUT pins to AF15 Return values Notes None 282 634 18540 Rev 1 LY UM1061 General purpose l Os GPIO 14 3 GPIO Firmware driver defines 14 3 1 GPIO Firmware driver defines GPIO Alternat function selection define GPIO e define e define e define e define e define e define e define e define e define e define GPIO AF RTC 50Hz uint8 1 0 00 GPIO AF MCO uint8 1 0 00 GPIO AF TAMPER uint8 1 0x00 GPIO AF SWJ uint8 t 0x00 GPIO AF TRACE uint8 1 0x00 GPIO AF 1 8 t 0x01 GPIO AF TIM2 uint8 t 0x01 GPIO AF TIMS uint8 1 0 02 GPIO AF TIM4 uint8 1 0 02 GPIO AF TIM5 uint8 t 0x02 DocID 18540 Rev 1 283 634 General purpose Os GPIO UM1061 284 634 define define define define define define define define define define define define GPIO_AF_TIM8 uint8_t 0x03 GPIO_AF_TIM9 u
51. define define ADC_Channel_5 uint8_t 0x05 Channel 6 uint8 t 0x06 ADC Channel 7 uint8 1 0 07 ADC Channel 8 uint8 t 0x08 ADC Channel 9 uint8 t 0x09 ADC Channel 10 uint8 90 0 ADC Channel 11 uint8 t OxOB ADC Channel 12 uint8 t 0x0C ADC Channel 13 uint8 t OxOD ADC Channel 14 uint8 t OxOE ADC Channel 15 uint8 t O0xOF ADC Channel 16 uint8 t 0x10 DocID 18540 Rev 1 4 UM1061 Analog to digital converter ADC 3 define define define define define Channel 17 uint8 t Ox11 ADC Channel 18 uint8 t 0x12 ADC Channel TempSensor uint8 Channel 16 ADC Channel Vrefint uint8 t ADC Channel 17 ADC Channel Vbat uint8 t ADC Channel 18 ADC Common mode define define define define define define define ADC Mode Independent uint32 1 0x00000000 ADC DualMode RegSimult InjecSimult uint32 t 0x00000001 ADC DualMode RegSimult AlterTrig uint32 1 0x00000002 ADC DualMode InjecSimult uint32 1 0x00000005 ADC DualMode RegSimult uint32 1 0 00000006 ADC DualMode Interl uint32 t 0x00000007 ADC DualMode AlterTrig uint32 t 0x00000009 DocID 18540 Rev 1 79 634 Analog to digital converter ADC UM1061 e define e define e define e define e define e define ADC_TripleMode_RegSimult_InjecSimult uint32_t Ox0000001 1 TripleMode RegSimult Alter
52. specifies the TIM interrupts sources to be enabled or disabled This parameter can be any combination of the following values TIM IT Update update Interrupt source TIM IT CC1 TIM Capture Compare 1 Interrupt source TIM IT 2 TIM Capture Compare 2 Interrupt source TIM IT TIM Capture Compare Interrupt source TIM IT 4 TIM Capture Compare 4 Interrupt source TIM IT TIM Commutation Interrupt source TIM IT Trigger Trigger Interrupt source TIM IT Break TIM Break Interrupt source Parameters e NevwState new state of the TIM interrupts This parameter can be ENABLE or DISABLE Return values None Notes For TIM6 and TIM7 only the parameter TIM IT Update be used e For 9 and TIM12 only one of the following parameters can be used TIM_IT_Update TIM_IT_CC1 TIM_IT_CC2 or TIM_IT_Trigger e For TIM10 TIM11 TIM13 and TIM14 only one of the following DocID 18540 Rev 1 555 634 General purpose timers TIM UM1061 parameters can be used TIM IT Update or TIM_IT_CC1 e TIM IT COM and TIM IT Break be used only with and TIM8 25 2 13 2 GenerateEvent Function Name void TIM_GenerateEvent TypeDef TIMx uint16 t TIM_EventSource Function Description Configures the TIMx event to be generate by software Parameters e TIMx where x can be 1 to 14 to select the TIM peripheral e EventSource specifies the event so
53. 0 Mo Enable the CAN controller interface clock using RCC APB1PeriphClockCmd RCC APB1Periph ENABLE for CAN1 and RCC APB1PeriphClockCmd RCC APB1Periph CAN2 ENABLE for In case you are using only you have to enable the CANT clock CAN pins configuration Enable the clock for the CAN GPIOs using the following function RCC AHB1PeriphClockCmd RCC AHB1Periph GPIOx ENABLE Connect the involved CAN pins to AF9 using the following function GPIO PinAFConfig GPlOx GPIO PinSourcex GPIO AF Configure these CAN pins in alternate function mode by calling the function GPIO Init Initialize and configure the CAN using CAN and CAN Filterlnit functions Transmit the desired CAN frame using CAN Transmit function Check the transmission of a CAN frame using CAN TransmitStatus function Cancel the transmission of CAN frame using CancelTransmit function Receive CAN frame using CAN function Release the receive FIFOs using CAN FlIFORelease function Return the number of pending received frames using CAN MessagePending function 10 To control CAN events you can use one of the following two methods Check on CAN flags using the CAN GetFlagStatus function Use CAN interrupts through the function CAN ITConfig at initialization phase and CAN GetlTStatus function into interrupt routines to check if the event has occurred or not After ch
54. 12 2 7 7 12 2 7 8 234 634 Function Name Function Description Parameters Parameters Return values Notes FLASH Status FLASH ProgramWord uint32 t Address uint32_t Data Programs a word 32 bit at a specified address Address specifies the address to be programmed This parameter can be any address in Program memory zone or in OTP zone Data specifies the data to be programmed FLASH Status The returned value can be FLASH_BUSY FLASH_ERROR_PROGRAM FLASH_ERROR_WRP FLASH_ERROR_OPERATION or FLASH_COMPLETE This function must be used when the device voltage range is from 2 7V to 3 6V FLASH_ProgramHalfWord Function Name Function Description Parameters Return values Notes FLASH_Status FLASH_ProgramHalfWord uint32_t Address uint16_t Data Programs a half word 16 bit at a specified address FLASH_ProgramByte Function Name Function Description Address specifies the address to be programmed This parameter can be any address in Program memory zone or in OTP zone Data specifies the data to be programmed FLASH Status The returned value can be FLASH BUSY FLASH ERROR PROGRAM FLASH ERROR WRP FLASH ERROR OPERATION or FLASH COMPLETE This function must be used when the device voltage range is from 2 1V to 3 6V FLASH Status FLASH ProgramByte uint32 t Address uint8 t Data Programs a byte 8 bit at a specified address DoclD 18540 Rev 1 4 UM1
55. 19 2 8 13 RCC_APB1PeriphResetCmd Function Name void RCC_APB1PeriphResetCmd uint32_t RCC_APB1Periph FunctionalState NewState Function Description Forces or releases Low Speed APB APB1 peripheral reset Parameters e RCC_APB1Periph specifies the APB1 peripheral to reset This parameter can be any combination of the following values RCC_APB1Periph_TIM2 clock 1 clock TIM4 clock 5 TIM5 clock TIM6 TIM6 clock RCC_APB1Periph_TIM7 clock RCC_APB1Periph_TIM12 TIM12 clock RCC_APB1Periph_TIM13 TIM13 clock RCC_APB1Periph_TIM14 TIM14 clock APBiPeriph WWDG WWDG clock APBliPeriph SPI2 SPI2 clock RCC_APB1Periph_SPI3 SPI3 clock RCC_APB1Periph_USART2 USART2 clock RCC_APB1Periph_USART3 USARTS clock RCC_APB1Periph_UART4 UART4 clock RCC_APB1Periph_UART5 UART5 clock I2C1 2 1 clock I2C2 2 2 clock APBh1Periph I2C3 2 3 clock APBliPeriph CANT clock CAN2 CAN clock PWR PWR clock RCC APB1Periph DAC clock NewState new state of the specified peripheral reset This parameter can be ENABLE or DISABLE Return values e None Notes None
56. 26 2 11 4 26 2 11 5 4 USART Structinit Function Name Function Description Parameters Return values Notes USART Clocklnit Function Name Function Description Parameters Return values Notes USART ClocksStructlnit Function Name Function Description void USART Structlnit USART_InitTypeDef USART_InitStruct Fills each USART_InitStruct member with its default value USART_InitStruct pointer to a USART_InitTypeDef structure which will be initialized None None void USART Clocklnit USART TypeDef USARTx USART ClocklnitTypeDef USART ClocklnitStruct Initializes the USARTx peripheral Clock according to the specified parameters in the USART ClocklnitStruct USARTXx where x can be 1 2 or 6 to select the USART peripheral USART ClocklnitStruct pointer to a USART ClocklnitTypeDef structure that contains the configuration information for the specified USART peripheral None The Smart Card and Synchronous modes are not available for UART4 and UART5 void USART ClockStructlnit USART ClocklnitTypeDef USART ClocklnitStruct Fills each USART ClocklnitStruct member with its default value DoclD 18540 Rev 1 599 634 Universal synchronous asynchronous receiver UM1061 transmitter USART Parameters Return values Notes 26 2 11 6 USART_Cmd Function Name Function Description Parameters Return values Notes USART ClocklnitStruct poi
57. DAC Channel 2 DAC Channel selected Return values The selected DAC channel data output value Notes e None 7 2 7 DMA management function 7 2 7 1 DAC DMACmd Function Name void DMACmd uint32_t DAC Channel FunctionalState NewState Function Description Enables or disables the specified DAC channel DMA request Parameters e Channel The selected DAC channel This parameter can be one of the following values DAC Channel 1 DAC Channeli selected DAC Channel 2 DAC Channel selected e NewState new state of the selected DAC channel DMA request This parameter can be ENABLE or DISABLE Return values None Notes e When enabled DMA1 is generated when an external trigger Line9 2 TIM4 TIM5 6 or TIM8 but not a software trigger occurs e The DAC channel1 is mapped on DMA1 Stream 5 channel7 which must be already configured e The DAC channel2 is mapped on DMA1 Stream 6 channel7 which must be already configured 158 634 18540 Rev 1 Gr UM1061 Digital to analog converter DAC 7 2 8 7 2 8 1 7 2 8 2 4 Interrupt and flag management functions DAC Function Name void DAC uint32 t DAC Channel uint32 t DAC FunctionalState NewState Function Description Enables or disables the specified DAC interrupts Parameters e Channel The selected DAC channel This parameter can be one of the following valu
58. DBGMCU TIM1 STOP uint32 1 0x00000001 DBGMCU TIM8 STOP uint32 1 0x00000002 DBGMCU TIM9 STOP uint32 1 0 00010000 DBGMCU TIM10 STOP uint32 1 0 00020000 DBGMCU TIM11 STOP uint32 1 0 00040000 DocID 18540 Rev 1 4 UM1061 Digital camera interface DCMI 9 Digital camera interface DCMI 9 1 DCMI Firmware driver registers structures 9 1 1 TypeDef 3 TypeDefis defined the stm32f2xx h file contains the DCMI registers definition Data Fields 10 uint32_t CR 10 uint32_t SR 10 uint32_t RISR IO uint32 t IER IO uint32 t MISR IO uint32 t ICR IO uint32 t ESCR IO uint32 t ESUR IO uint32 t CWSTRTR IO uint32 t CWSIZER IO uint32 t DR Field Documentation IO uint32 t TypeDef CR control register 1 Address offset 0x00 IO uint32 t TypeDet SR DOMI status register Address offset 0x04 IO uint32 t TypeDef RISR raw interrupt status register Address offset 0x08 IO uint32 t TypeDeft IER interrupt enable register Address offset 0 0 IO uint32 t DCMI TypeDef MISR DCMI masked interrupt status register Address offset 0x10 IO uint32 t TypeDet ICR DOMI interrupt clear register Address offset 0x14 IO uint32 t DCMI TypeDef ESCR DCMI embedded synchronization code register Address offset 0x18 IO uint32 t DCMI TypeDef ESUR DCMI embedded synchronization unmask register Address offset 0x1C IO uint32 t DCMI
59. Documentation STM32F2 x StdPeriph Driver inc src Release Notes html CMSIS subfolder This subfolder contains the STM32F2xx and Cortex M3 CMSIS files e Cortex M CMSIS files containing name definitions address definitions and helper functions to access Cortex M3 core registers and peripherals It defines also a device independent interface for RTOS kernels that includes debug channel definitions e STM32F2xx CMSIS files consist of stm32f2xx h this file contains the definitions of all peripheral registers bits and memory mapping for STM32F2xx devices It is the unique include file used in the application programmer C source code usually in the main c system stm32f2xx c h this file contains the system clock configuration for STM32F2xx devices It exports Systemlnit function which sets up the system clock source PLL multiplier and divider factors AHB APBx prescalers and Flash settings This function is called at startup just after reset and before connecting to the main program The call is made inside the startup stm32f2xx s file Startup stm32f4xx s this file contains the Cortex M3 startup code and interrupt vectors for all STM32F2xx device interrupt handlers STM32F2xx StdPeriph Driver subfolder This subfolder contains all the subdirectories and files that make up the core of the library They do not need to be modified by the user e inc subfolder contains the peripheral drivers header files
60. FAILURE uint32 1 0x00000400 I2C flags definition 3 define I2C FLAG DUALF uint32 t 0x00800000 define I2C FLAG SMBHOST uint32 t 0x00400000 DocID 18540 Rev 1 331 634 Inter integrated circuit interface 12C UM1061 332 634 e define e define e define e define e define e define e define e define e define e define e define e define I2C FLAG SMBDEFAULT uint32 1 0x00200000 I2C FLAG GENCALL uint32 t 0x00100000 I2C FLAG TRA uint32 t 0x00040000 I2C FLAG BUSY uint32 1 0 00020000 I2C FLAG MSL uint32 1 0x00010000 2 FLAG SMBALERT uint32 t 0x10008000 2 FLAG TIMEOUT uint32 1 0x10004000 2 FLAG PECERR uint32 t 0x10001000 I2C FLAG OVhR uint32 1 0 10000800 I2C FLAG AF uint32 t 0x10000400 2 FLAG ARLO uint32 t 0x10000200 2 FLAG BERR uint32 t 0x10000100 DocID 18540 Rev 1 4 UM1061 Inter integrated circuit interface 12C 3 define define define define define define define 2 FLAG TXE uint32 t 0x10000080 I2C FLAG RXNE uint32 1 0 10000040 2 FLAG STOPF uint32 1 0 10000010 I2C FLAG ADD10 uint32 1 0 10000008 I2C FLAG BTF uint32 t 0x10000004 I2C FLAG ADDR uint32 1 0 10000002 I2C FLAG SB uint32 t 0x 10000001 2 interrupts definition define define define define define 2 IT BUF uint16 t 0x0400 2 IT EVT uin
61. Field Documentation e JOuint32_t CAN FIFOMailBox TypeDef RIR CAN receive FIFO mailbox identifier register e JOuint32_t CAN FIFOMailBox TypeDef RDTR CAN receive FIFO mailbox data length control and time stamp register e _ 2 t CAN FIFOMailBox TypeDef RDLR CAN receive FIFO mailbox data low register e _ lOuint32 t CAN FIFOMailBox TypeDef RDHR DocID 18540 Rev 1 3 UM1061 Controller area network CAN CAN receive FIFO mailbox data high register 4 1 3 CAN_FilterRegister_TypeDef CAN_FilterRegister_TypeDef is defined in the stm32f2xx h Data Fields e _ JOuint32_t FR1 e _ JOuint32_t FR2 Field Documentation e _ lO uint32_t CAN FilterRegister TypeDef FR1 CAN Filter bank register 1 e _ lOuint32 t CAN FilterRegister TypeDef FR2 CAN Filter bank register 1 41 4 CAN TypeDef CAN TypeDefis defined in the stm32f2xx h Data Fields JO uint32 t MCR JO uint32 t MSR JO uint32 t TSR JO uint32 t JO uint32 t RF1R JO uint32 t IER JO uint32 t ESR 10 uint32 t BTR uint32 t RESERVEDO CAN TxMailBox TypeDef sTxMailBox CAN TypeDef sFIFOMailBox uint32 t RESERVED1 JO uint32 t FMR JO uint32 t FM1R uint32 t RESERVED2 JO uint32 t FS1R uint32 t RESERVED3 JO uint32 t FFA1R uint32 t RESERVED4 JO uint32 t FA1R uint32 t RESERVED5 CAN FilterRegister TypeDef sFillerRegister DoclD 18540 Rev 1 91 634 Controller area network CAN
62. Notes 4 2 9 3 CAN_ClearFlag Function Name Function Description Parameters Return values Notes 4 CAN FLAG RQCPO0 Request MailBox0 Flag CAN FLAG RQCP 1 Request MailBox1 Flag CAN FLAG 2 Request MailBox2 Flag CAN FLAG FIFO 0 Message Pending Flag CAN FLAG FFO0 FIFO 0 Full Flag CAN FLAG 0 FIFO 0 Overrun Flag CAN FLAG FIFO 1 Message Pending Flag CAN FLAG FIFO 1 Full Flag CAN FLAG FOVT FIFO 1 Overrun Flag CAN FLAG WKU Wake up Flag CAN FLAG SLAK Sleep acknowledge Flag CAN FLAG EWG Error Warning Flag CAN FLAG EPV Error Passive Flag CAN FLAG BOF Bus Off Flag CAN FLAG LEC Last error code Flag The new state of CAN FLAG SET or RESET None void CAN ClearFlag CAN TypeDef CANx uint32 t CAN FLAG Clears the CAN s pending flags CANXx where x can be 1 or 2 to to select the CAN peripheral CAN FLAG specifies the flag to clear This parameter can be one of the following values CAN FLAG Request MailBox0 Flag CAN FLAG Request MailBox1 Flag CAN FLAG 2 Request MailBox2 Flag CAN FLAG FFO0 FIFO 0 Full Flag CAN FLAG 0 FIFO 0 Overrun Flag CAN FLAG FIFO 1 Full Flag CAN FLAG 1 FIFO 1 Overrun Flag CAN FLAG WKU Wake up Flag CAN FLAG SLAK Sleep acknowledge Flag CAN FLAG LEC Last error code Flag None None DoclD 18540 Rev 1 109 634 Controller area network CAN
63. Parameters Return values Notes void RCC AHB2PeriphClockLPModeCmd uint32 t RCC_AHB2Periph FunctionalState NewState Enables or disables the AHB2 peripheral clock during Low Power Sleep mode RCC_AHBPeriph specifies the AHB2 peripheral to gates its clock This parameter can be any combination of the following values AHB2Periph DCMI DCMI clock RCC AHB2Periph CRYP CRYP clock AHB2Periph HASH HASH clock RCC AHB2Periph RNG RNG clock AHB2Periph OTG FS USB FS clock NewState new state of the specified peripheral clock This parameter can be ENABLE or DISABLE None Peripheral clock gating in SLEEP mode can be used to further reduce power consumption After wakeup from SLEEP mode the peripheral clock is enabled again DocID 18540 Rev 1 381 634 Reset and clock control RCC UM1061 By default all peripheral clocks are enabled during SLEEP mode 19 2 8 17 AHB3PeriphClockLPModeCmd Function Name Function Description Parameters Return values Notes void RCC_AHB3PeriphClockLPModeCmd uint32 t RCC_AHB3Periph FunctionalState NewState Enables or disables the AHB3 peripheral clock during Low Power Sleep mode RCC AHBPeriph specifies the AHB3 peripheral to gates its clock This parameter must be RCC AHB3Periph FSMC NewState new state of the specified peripheral clock This parameter can be ENABLE or DISABLE None Periph
64. Parameters e VoltageRange The device voltage range which defines the erase parallelism This parameter can be one of the following values VoltageRange 1 when the device voltage range is 1 8V to 2 1V the operation will be done by byte 8 bit VoltageRange 2 when the device voltage range is 2 1V to 2 7V the operation will be done by half word 16 bit VoltageRange when the device voltage range is 2 7V to 3 6V the operation will be done by word 32 bit VoltageRange_4 when the device voltage range is 2 7V to 3 6V External Vpp the operation will be done by double word 64 bit Return values FLASH Status The returned value can be FLASH BUSY FLASH ERROR PROGRAM FLASH ERROR WRP FLASH ERROR OPERATION or FLASH COMPLETE Notes e None 12 2 7 5 FLASH ProgramDoubleWord Function Name FLASH Status FLASH ProgramDoubleWord uint32_t Address uint64_t Data Function Description Programs a double word 64 bit at a specified address Parameters e Address specifies the address to be programmed e Data specifies the data to be programmed Return values FLASH Status The returned value can be FLASH BUSY FLASH ERROR PROGRAM FLASH ERROR WRP FLASH ERROR OPERATION or FLASH COMPLETE Notes e This function must be used when the device voltage range is from 2 7V to 3 6V and an External Vpp is present 12 2 7 6 FLASH ProgramWord 3 DociD 18540 Rev 1 233 634 FLASH Memory FLASH UM1061
65. b Click File gt Switch Workspace gt Other and browse to TrueSTUDIO workspace directory c Click File gt Import select General gt Existing Projects into Workspace and then click Next d Browse to the TrueSTUDIO workspace directory and select the STM322xG EVAL project e Rebuild all project files Select the project in the Project explorer window then click on Project gt build project menu f Run program Select the project in the Project explorer window then click Run Debug F11 RIDE a Open the Project rprj project b Rebuild all files Project gt build project c Load project image Debug gt start ctrl D d Run program Debug gt Run ctrl F9 TASKING a Open the TASKING toolchain b Click on File gt Import select General gt Existing Projects into Workspace and click Next c Browse to TASKING workspace directory and select the STM322xG EVAL project to configure the project for STM32F2xx devices d Rebuild all project files by selecting the project in the Project explorer window and clicking on Project gt build project menu e Run the program by selecting the project in the Project explorer window and clicking Run gt Debug F11 If the above sequence has worked correctly LED1 and LED3 should be ON LED2 and LED4 should be blinking and the following message is displayed on the LCD screen 42 634 DocID 18540 Rev 1 UM1061 How to use and customize the library Figure 6 Mes
66. e define e define GPIO Pin O uint16 t 0x0001 GPIO Pin 1 uint18 1 0 0002 DocID 18540 Rev 1 4 UM1061 General purpose Os GPIO 3 define define define define define define define define define define define define GPIO Pin 2 uint16 1 0 0004 GPIO Pin S3 uint16 1 0 0008 GPIO Pin 4 uint16 1 0 0010 GPIO Pin 5 uint16 1 0 0020 GPIO Pin 6 uint16 1 0 0040 GPIO Pin 7 uint18 1 0 0080 GPIO Pin 8 uint16 1 0 0100 GPIO Pin 9 uint16 1 0 0200 GPIO Pin 10 16 t 0x0400 GPIO Pin 11 16 t 0x0800 GPIO Pin 12 16 t 0x1000 GPIO Pin 13 uint16 1 0 2000 DocID 18540 Rev 1 287 634 General purpose 1 GPIO UM1061 288 634 e GPIO Pin 14 uint16 t 0x4000 e Pin 15 uint16 1 0 8000 e define GPIO Pin All uint18 t OXFFFF GPIO Pin sources e didefine GPIO 0 8 1 0x00 e define GPIO PinSourcet uint8 0 01 e define GPIO PinSource2 uint8 1 0x02 e didefine GPIO PinSource3 uint8 1 0x03 e didefine GPIO PinSource4 uint8 1 0x04 e define GPIO PinSourceb5 uint8 1 0x05 e define GPIO 8 1 0x06 e define GPIO PinSource7 uint8 1 0x07 e didefine GPIO PinSource8 uint8 1 0x08 DoclID 18540 Rev 1 4 UM1061 General purpose Os GPIO
67. the plaintext message in CBC mode WENG SI Pa IW 1 255126 129 Ilsibeness AHS TEXT Bnenypiecitext t message CTR mode 5 IW 1 ABSIZ8key 128 Ilse AES TEXT SIZE Eneryptedtext DoclD 18540 Rev 1 149 634 Digital to analog converter DAC UM1061 7 7 1 7 1 1 150 634 Digital to analog converter DAC DAC Firmware driver registers structures DAC_TypeDef DAC TypeDef is defined the stm32f2xx h file and contains the DAC registers definition Data Fields 10 uint32_t CR 10 uint32_t SWTRIGR 10 uint32_t DHR12R1 10 uint32_t DHR12L1 10 uint32_t DHR8R1 10 uint32_t DHR12R2 10 uint32_t DHR12L2 IO uint32 t DHR8R2 IO uint32 t DHR12RD IO uint32 t DHR12LD IO uint32 t DHR8RD IO uint32 t DOR1 IO uint32 t DOR2 IO uint32 t SR Field Documentation IO uint32 t DAC TypeDef CR DAC control register Address offset 0x00 IO uint32 t DAC TypeDef SWTRIGR DAC software trigger register Address offset 0x04 IO uint32 t TypeDef DHR12H1 DAC channel1 12 bit right aligned data holding register Address offset 0x08 IO uint32 t DAC TypeDeft DHR12L 1 DAC channel 12 bit left aligned data holding register Address offset IO uint32 t DAC_TypeDef DHR8R1 DAC channel1 8 bit right aligned data holding register Address offset 0x10 IO uint32 t DAC TypeDef DHR12R2 DAC channel2 12 bit right aligned data holding register Address offset 0x14 IO uint32 t DAC TypeDef DHR12L2 DAC chann
68. 11 2 6 2 ClearFlag Function Name void EXTI ClearFlag uint32 t EXTI Line Function Description Clears the EXTI s line pending flags Parameters e EXTI Line specifies the EXTI lines flags to clear This parameter can be any combination of EXTI Linex where x can be 0 22 Return values e None Notes e None 11 2 6 3 EXTI GetlTStatus 11 2 6 4 4 Function Name ITStatus EXTI GetiTStatus uint32 t EXTI Line Function Description Checks whether the specified EXTI line is asserted or not Parameters e Line specifies the EXTI line to check This parameter can be EXTI Linex where x can be 0 22 Return values e The new state of EXTI Line SET or RESET Notes e None EXTI_ClearlTPendingBit Function Name void EXTI ClearlTPendingBit uint32 t EXTI Line Function Description Clears the EXTI s line pending bits Parameters e EXTI Line specifies the EXTI lines to clear This parameter can be any combination of EKTI Linex where x can be 0 22 Return values e None Notes e None DoclD 18540 Rev 1 221 634 interrupt event controller EKTI UM1061 11 3 11 3 1 222 634 EXTI Firmware driver defines EXTI Firmware driver defines Lines e define EXTI LineO uint32 t 0x00001 External interrupt line 0 e define Linet uint32 1 0 00002 External interrupt line 1 e didefine EXTI_Line2 uint32_t 0x00004 External interrupt line 2 e
69. 12 2 8 6 FLASH OB Function Name void FLASH OB BORConfig uint8 t OB BOR Function Description Sets the BOR Level Parameters e BOR specifies the Option Bytes BOR Reset Level This parameter can be one of the following values LEVELS Supply voltage ranges from 2 7 to Supply voltage ranges from 2 4 to MAMAA Supply voltage ranges from 2 1 to OFF Supply voltage from 1 62 to 2 1 Return values None Notes None 12 2 8 7 FLASH Launch Gr 18540 Rev 1 237 634 FLASH Memory FLASH UM1061 Function Name FLASH Status FLASH Launch void Function Description Launch the option byte loading Parameters None Return values FLASH Status The returned value can be FLASH BUSY FLASH ERROR PROGRAM FLASH ERROR WRP FLASH ERROR OPERATION or FLASH COMPLETE Notes None 12 2 8 8 FLASH GetUser Function Name uint8_t FLASH OB GetUser void Function Description Returns the FLASH User Option Bytes values Parameters e None Return values The FLASH User Option Bytes values IWDG_SW Bit0 RST_STOP Bit1 RST STDBY Bit2 Notes e None 12 2 8 1 OB GetWRP Function Name uint6 t FLASH OB GetWRP void Function Description Returns the FLASH Write Protection Option Bytes value Parameters e None Return values The FLASH Write Protection Option Bytes value Notes e None 12 2 8 10 FLASH
70. 14 4 4 e define PinSource9 uint8 1 0x09 e define GPIO 10 8 t 0x0A e define GPIO PinSourcet uint8 t Ox0B e didefine GPIO_PinSource12 uint8_t 0x0C e define GPIO_PinSource13 uint8_t OxOD e define GPIO PinSourcet4 uint8 t OxOE e define GPIO PinSourcet5 uint8 t OxOF GPIO Programming Example The example below explains how to configure the different GPIO modes For more examples about GPIO configuration and usage please refer to the GPIO examples provided within the STM32F2xx Standard Peripheral Library package under Projects TM32F2xx StdPeriph Examples Output mode The example below shows how to configure an I O in output mode for example PG6 to drive a led GPIO InicrypeDst GPIO LEE Enable GPIOG s interface clock AHBlPeriphClockCmd RCC AHBlPeriph GPIOG Configure PG6 in output pushpull mode GPIO IMITSTTUCTULG GPIO Pim GIO Pim 7 ENABLE GPIO 3omitStwelwes GPI0 Moce GIO Mode OUT CENI Ee EBEe GEPIO Owoe GOPIO Oye PEE GPIO GPIO lue GPIO PUPA Um DoclD 18540 Rev 1 289 634 General purpose 1 GPIO UM1061 290 634 CPTO GPIO Speed GPIO Init GPIOG Set PG6 to high level GPIO Speed 100 2 CEPTO 5 2 GPIO SetBits GPIOG GPIO Pin 6 Input mode The example below shows how to configu used
71. 19 1 1 RCC TypeDef RCC TypeDefis defined in the stm32f2xx h file and contains the RCC registers definition Data Fields lO uint32 t CR lO uint32 t PLLCFGR IO uint32 t CFGR JO uint32 t CIR JO uint32 t AHB1RSTR IO uint32 t AHB2RSTR lO uint32 t AHB3RSTR uint32 t RESERVEDO lO uint32 t APB1RSTR IO uint32 t APB2RSTR uint32 t RESERVED1 IO uint32 t AHB1ENR IO uint32 t AHB2ENR IO uint32 t AHB3ENR uint32 t RESERVED2 uint32 t APB1ENR IO uint32 t APB2ENR uint32 t RESERVED3 IO uint32 t AHB1LPENR lO uint32 t AHB2LPENR lO uint32 t AHB3LPENR uint32 t RESERVED4 IO uint32 t APB1LPENR IO uint32 t APB2LPENR uint32 t RESERVED5 lO uint32 t BDCR lO uint32 t CSR uint32 t RESERVED6 JO uint32 t SSCGR lO uint32 t PLLIZSCFGR Field Documentation 2 t RCC_TypeDef CR RCC clock control register Address offset 0x00 e _ JOuint32_t RCC_TypeDef PLLCFGR RCC PLL configuration register Address offset 0x04 e lOuint32 t RCC TypeDet CFGR RCC configuration register Address offset 0 08 3 DocID 18540 Rev 1 355 634 Reset and clock control RCC UM1061 356 634 JO uint32_t RCC_TypeDef CIR RCC clock interrupt register Address offset JO uint32 t RCC_TypeDef AHB1RSTR RCC 1 peripheral reset register Address offset 0 10 JO uint32 t RCC TypeDef AHB2RSTR RCC 2 peripheral reset register Add
72. 2 respectively e define ICSelection IndirectTI uint16 1 0x0002 TIM Input 1 2 3 or 4 is selected to be connected to IC2 IC1 IC4 or IC3 respectively e didefine ICSelection TRC uint16 1 0x0003 TIM Input 1 2 3 or 4 is selected to be connected to TRC TIM Internal Trigger Selection e define TS ITRO uint16 0 0000 DocID 18540 Rev 1 577 634 General purpose timers TIM UM1061 e TIM_TS_ITR1 uint16_t 0x0010 e TIM_TS_ITR2 uint16_t 0x0020 e TIM_TS_ITR3 uint16_t 0x0030 e TIM_TS_TI1F_ED uint16_t 0x0040 e define TIM_TS_TI1FP1 uint16_t Ox0050 e define TS TI2FP2 uint16 t 0x0060 e TS ETRF uint16 1 0 0070 TIM interrupt sources e define IT Update uint16 t 0x0001 e IT 1 6 t 0x0002 e IT CC2 uint18 t 0x0004 e IT 6 t 0x0008 e define TIM IT CC4 uint16 t 0x0010 578 634 DoclID 18540 Rev 1 4 UM1061 General purpose timers TIM e IT COM uint16 t 0x0020 e define TIM IT Trigger uint16 1 0 0040 e Break uint16 1 0x0080 TIM Legacy e ididefine TIM DMABurstLength 1ByteTIM DMABursiLength 1Transfer e define DMABursiLength 2BytlesTIM DMABurstLength 2Transfers e define DMABursiLen
73. DMA IT DMEIF7 uint32 t 0x21001000 IT TEIF7 uint32 1 0x22002000 HTIF7 uint32 1 0 24004000 TCIF7 uint32 1 0 28008000 DoclID 18540 Rev 1 4 UM1061 DMA controller DMA 3 interrupt enable definitions e define IT TC uint32 1 0 00000010 e define IT HT uint32 1 0x00000008 e iidefine TE uint32 1 0 00000004 e define IT DME uint32 1 0x00000002 e define IT FE uint32 0 00000080 DMA memory burst e define MemoryBurst Single uint32 1 0 00000000 define MemoryBurst INC4 uint32 1 0 00800000 e define MemoryBurst INC8 uint32 1 0x01000000 e define MemoryBurst INC16 uint32 1 0 01800000 DMA memory data size e define MemoryDataSize Byte uint32 1 0x00000000 e define MemoryDataSize HalfWord uint32 1 0 00002000 DocID 18540 Rev 1 213 634 DMA controller UM1061 214 634 e define MemoryDataSize Word uint32 1 0x00004000 DMA memory incremented mode e define Enable uint32 1 0 00000400 e define Memorylnc Disable uint32 1 0x00000000 DMA memory targets definitions e idefine Memory O uint32 t 0x00000000 e ididefine Memory 1 uint32 1 0 00080000 DMA peripheral burst e iidefine PeripheralBurst Single uint32 1 0x00000000 e iidefine
74. Error Interrupts IT EWG Error warning Interrupt if enabled this interrupt source is pending when the warning limit has been reached Receive Error Counter or Transmit Error Counter 96 CAN IT Error passive Interrupt if enabled this interrupt source is pending when the Error Passive limit has been reached Receive Error Counter or Transmit Error Counter gt 127 CAN IT BOF Bus off Interrupt if enabled this interrupt source is pending when CAN enters the bus off state The bus off state is entered on TEC overflow greater than 255 This Flag is cleared only by hardware CAN IT LEC Last error code Interrupt if enabled this interrupt source is pending when a message has been transferred reception or transmission with error and the error code is hold 3 DocID 18540 Rev 1 99 634 Controller area network CAN UM1061 4 2 4 4 2 4 1 4 2 4 2 100 634 CAN IT ERR Error Interrupt if enabled this interrupt source is pending when an error condition is pending Managing the CAN controller events The user should identify which mode will be used in his application to manage the CAN controller events Polling mode or Interrupt mode In the Polling Mode it is advised to use the following functions CAN_GetFlagStatus to check if flags events occur ClearFlag to clear the flags events In the Interrupt Mode it is advised to use the following functions The functio
75. Function Name void FLASH Lock void Function Description Locks the FLASH control register access Parameters e None Return values e None Notes e None FLASH_EraseSector Function Name FLASH_Status FLASH_EraseSector uint32_t FLASH_ Sector uint8_t VoltageRange Function Description Erases a specified FLASH Sector Parameters e FLASH Sector The Sector number to be erased This parameter can be a value between FLASH Sector 0 and FLASH_Sector_11 e VoltageRange The device voltage range which defines the erase parallelism This parameter can be one of the following values VoltageRange 1 when the device voltage range is 1 8V to 2 1V the operation will be done by byte 8 bit VoltageRange 2 when the device voltage range is 2 1V to 2 7V the operation will be done by half word 16 bit when the device voltage range is 2 7V to 3 6V the operation will be done by word 32 bit VoltageRange 4 when the device voltage range is 2 7V to 3 6V External Vpp the operation will be done by double word 64 bit Return values e FLASH Status The returned value can be FLASH_BUSY FLASH_ERROR_PROGRAM FLASH_ERROR_WRP FLASH_ERROR_OPERATION or FLASH_COMPLETE Notes None FLASH EraseAllSectors Function Name FLASH Status FLASH EraseAllSectors uint8_t DoclD 18540 Rev 1 4 UM1061 FLASH Memory FLASH VoltageRange Function Description Erases all FLASH Sectors
76. Parameters e None Return values The new state of the I O Compensation Cell ready flag SET or RESET Notes e None SYSCFG Firmware driver defines SYSCFG SYSCFG ETHERNET Media Interface e define SYSCFG ETH Medialnterface Mll uint32 1 0 00000000 e define SYSCFG ETH Medialnterface RMII uint32 t 0x00000001 SYSCFG Pin Sources e define EXTI PinSource0 uint8 t 0x00 DocID 18540 Rev 1 513 634 System configuration controller SYSCFG UM1061 514 634 define define define define define define define define define define define define 1 8 1 0 01 PinSource2 uint8 1 0x02 EXTI PinSource3 uint8 1 0 03 EXTI PinSource4 uint8 1 0 04 EXTI PinSourceb5 uint8 t 0x05 EXTI 8 1 0x06 EXTI_PinSource7 uint8_t 0x07 8 8 1 0 08 EXTI PinSource9 uint8 t 0x09 10 8 1 0 0 11 8 1 0 0 EXTI_PinSource12 uint8_t Ox0C DocID 18540 Rev 1 4 UM1061 System configuration controller SYSCFG 3 define define define EXTI_PinSource13 uint8_t Ox0D EXTI_PinSource14 uint8_t Ox0E EXTI_PinSource15 uint8_t Ox0F SYSCFG_EXTI_Port_Sources define define define define define define define
77. Return values Notes HASH Dataln Function Name Function Description Parameters Return values Notes void HASH SetLastWordValidBitsNbr uint16 t ValidNumber Configure the Number of valid bits in last word of the message e ValidNumber Number of valid bits in last word of the message This parameter must be a number between 0 and Ox1F 0x00 All 32 bits of the last data written are valid 0x01 Only bit 0 of the last data written is valid 0x02 Only bits 1 0 of the last data written are valid 0x03 Only bits 2 0 of the last data written are valid Ox1F Only bits 30 0 of the last data written are valid None e The Number of valid bits must be set before to start the message digest competition in Hash and HMAC and key treatment in HMAC void HASH Dataln uint32 t Data Writes data in the Data Input FIFO e Data new data of the message to be processed None None DoclD 18540 Rev 1 299 634 Hash processor HASH UM1061 15 2 9 3 15 2 9 4 15 2 9 5 300 634 HASH GetlnFIFOWordsNbr Function Name Function Description Parameters Return values Notes HASH GetDigest Function Name Function Description Parameters Return values Notes HASH StartDigest Function Name Function Description Parameters Return values Notes uint8 t HASH GetlnFIFOWordsNbr void Returns the number of words already pushed into the IN FIFO None
78. SPI 125 DMAReq specifies the SPI DMA transfer request to be enabled or disabled This parameter can be any combination of the following values SPI 125 DMAReq Tx Tx buffer DMA transfer request SPI 125 DMAReq Rx Rx buffer DMA transfer request NewState new state of the selected SPI DMA transfer request This parameter can be ENABLE or DISABLE None None Interrupt and flag management functions SPI 125 void SPI 125 5 TypeDef uint8 t SPI 125 IT FunctionalState NewState Function Description Enables or disables the specified SPI I2S interrupts Parameters e SPlx To select the SPIx I2Sx peripheral where x be 1 2 or in SPI mode or 2 or 3 in 25 mode SPI 125 specifies the SPI interrupt source to be enabled or disabled This parameter can be one of the following values SPI 128 IT TXE Tx buffer empty interrupt mask SPI 128 IT RXNE Rx buffer not empty interrupt mask SPI 125 IT Error interrupt mask e NewState new state of the specified SPI interrupt This parameter can be ENABLE or DISABLE Return values e None Notes e None SPI 125 GetFlagStatus Function Name FlagStatus SPI 125 GetFlagStatus 5 TypeDef SPIx 6 t SPI 125 FLAG DocID 18540 Rev 1 UM1061 Serial peripheral interface SPI Function Description Checks whether the specified SPIx I2Sx flag is set or n
79. UM1061 7 Description of STM32F2xx Standard Peripheral Library Introduction The STM32F2xx Standard Peripheral Library covers 3 abstraction levels and includes e A complete register address mapping with all bits bitfields and registers declared C This avoids a cumbersome task and more important it brings the benefits of a bug free reference mapping file speeding up the early project phase e collection of routines and data structures covering all peripheral functions drivers with common API It can directly be used as a reference framework since it also includes macros for supporting core related intrinsic features common constants and definition of data types e A set of examples covering all available peripherals with template projects for the most common development tools With the appropriate hardware evaluation board this allows to get started with a brand new micro within few hours Each driver consists of a set of functions covering all peripheral features The development of each driver is driven by a common application programming interface which standardizes the driver structure the functions and the parameter names The driver source code is developed in Strict ANSI C relaxed ANSI C for projects and example files It is fully documented and is MISRA C 2004 compliant Writing the whole library in Strict ANSI C makes it independent from the development tools Only the start up files depend o
80. define define EXTI_PortSourceGPIOA uint8_t 0x00 EXTI PortSourceGPlOB uint8 t 0x01 EXTI PortSourceGPlOC uint8 t 0x02 PortSourceGPlOD uint8 t 0x03 EXTI_PortSourceGPIOE uint8_t 0x04 EXTI PortSourceGPlOF uint8 1 0x05 EXTI PortSourceGPlOG uint8 1 0x06 PortSourceGPIOH uint8 1 0x07 EXTI PortSourceGPlOl uint8 1 0x08 DocID 18540 Rev 1 515 634 System configuration controller SYSCFG UM1061 SYSCFG_Memory_Remap_Config e define SYSCFG_MemoryRemap_Flash uint8_t 0x00 e define SYSCFG_MemoryRemap_SystemFlash uint8_t 0x01 e define SYSCFG_MemoryRemap_FSMC uint8_t Ox02 e define SYSCFG_MemoryRemap_SRAM uint8_t 0x03 516 634 18540 Rev 1 3 UM1061 General purpose timers TIM 25 25 1 25 1 1 General purpose timers TIM TIM Firmware driver registers structures TIM TypeDef TIM TypeDef is defined in the stm32f2xx h file and contains the TIM registers definition Data Fields lOuint16_tCR1 uint16 t RESERVEDO lO uint16 t CR2 16 t RESERVED1 IOuint16 t SMCR 16 t RESERVED2 10 uint16 t DIER 16 t RESERVED3 JlOuint16 t SR uint16 t RESERVED4 lO uint16 t EGR 16 t RESERVED5 JO uint16 t CCMH1 uint16 t RESERVED6 JO uint 6 t CCMR2 uint16 t RESERVED7 JO uint16 t CCER 16 t RESERVED8 10 uint32 t CNT JO uint16 t PSC 16 t RESERVED9 JO uint32 t ARR lOuint
81. e define e define MCO 2Source HSE uint32 t 0x80000000 RCC MCO2Source PLLCLK uint32 t 0xC0000000 RCC MCO2Div 1 uint32 t 0x00000000 RCC MCO2Div 2 uint32 t 0x20000000 RCC MCO2Div S3 uint32 1 0 28000000 RCC MCO2Div 4 uint32 t 0x30000000 RCC MCO2Div 5 uint32 t 0x38000000 RCC PLL Clock Source e didefine e didefine RCC PLLSource HSl uint32 1 0 00000000 RCC PLLSource HSE uint32 1 0x00400000 RCC RTC Clock Source e didefine e didefine 3 RCC_RTCCLKSource_LSE uint32_t 0x00000100 RCC_RTCCLKSource_LSI uint32_t 0x00000200 DocID 18540 Rev 1 397 634 Reset and clock control RCC UM1061 398 634 define define define define define define define define define define define define RCC_RTCCLKSource_HSE_Div2 uint32_t 0x00020300 RCC_RTCCLKSource_HSE_Div3 uint32_t 0x00030300 RCC_RTCCLKSource_HSE_Div4 uint32_t 0x00040300 RCC_RTCCLKSource_HSE_Div5 uint32_t 0x00050300 RCC_RTCCLKSource_HSE_Div6 uint32_t 0x00060300 RCC_RTCCLKSource_HSE_Div7 uint32_t 0x00070300 RCC_RTCCLKSource_HSE_Div8 uint32_t 0x00080300 RTCCLKSource HSE Div9 uint32 1 0x00090300 RCC RTCCLKSource HSE Divi0O uint32 1 0 00040300 RCC_RTCCLKSource_HSE_Div11 uint32_t Ox000B0300 RCC_RTCCLKSource_HSE_Div12 uint32_t Ox000C0300 RCC_RTCCLKSource_HSE_Div13 uint32_t Ox000D0300 DocID 18540 Rev 1 4
82. new state of the TIMx Hall sensor interface This parameter can be ENABLE or DISABLE None None Specific remapping management function TIM RemapConfig Function Name Function Description Parameters void TIM RemapContig TypeDef TIMx uint16 t TIM Remap Configures the TIM2 TIM5 and TIM11 Remapping input capabilities TIMx where x can be 2 5 or 11 to select the TIM peripheral TIM Remap specifies the TIM input remapping source This parameter can be one of the following values TIM2 8 TRGO TIM2 ITR1 input is connected to TIM8 Trigger output default TIM2 ETH TIM2 ITR1 input is connected to ETH PTP trogger output TIM2 USBFS SOF TIM2 ITR1 input is connected to USB FS SOF TIM2 USBHS SOF TIM2 ITR1 input is connected to USB HS SOF TIM5 GPIO TIM5 input is connected to dedicated Timer pin default TIMS5 LSI TIM5 input is connected to LSI clock TIM5 LSE TIM5 CH4 input is connected to LSE clock TIM5 RTC TIM5 input is connected to Output event DocID 18540 Rev 1 567 634 General purpose timers TIM UM1061 25 3 25 3 1 568 634 TIM11 GPIO TIM11 input is connected to dedicated Timer pin default TIM11 HSE TIM11 input is connected to HSE RTC clock HSE divided by a programmable prescaler Return values None Notes None TIM Firmware driver defines TIM Firmware dr
83. parameter can be one of the following values USART_IT_CTS CTS change interrupt not available for UART4 and UART5 USART IT LBD LIN Break detection interrupt USART IT Transmission complete interrupt USART RXNE Receive Data register not empty interrupt None PE Parity error FE Framing error NE Noise error ORE OverRun error and IDLE Idle line detected pending bits are cleared by software sequence a read operation to USART SR register USART GetlTStatus followed by a read operation to USART DR register USART ReceiveData RXNE pending bit can be also cleared by a read to the USART DR register USART_ReceiveData TC pending bit can be also cleared by software sequence a read operation to USART SR register USART GetlTStatus followed by a write operation to USART DR register USART SendData TXE pending bit is cleared only by a write to the USART DR register USART SendData USART Firmware driver defines USART Firmware driver defines USART USART Clock e didefine USARHT Clock Disable uint16 1 0x0000 e define USARHT Clock Enable uint16 1 0x0800 USART Clock Phase DocID 18540 Rev 1 611 634 Universal synchronous asynchronous receiver UM1061 transmitter USART 612 634 e define USART 1Edge uint16 1 0x0000 e define USART 2Edge uint16 1 0x0200 05 Clock Polarity e define USART CPOL Low uint16 t 0x0
84. void CAN DBGFreeze CAN TypeDef FunctionalState NewState Enables or disables the DBG Freeze for CAN where x can be 1 or 2 to to select the CAN peripheral e NewState new state of the CAN peripheral This parameter can be ENABLE CAN reception transmission is frozen during debug Reception FIFOs can still be accessed controlled normally or DISABLE CAN is working during debug None None CAN_TTComModeCmd Function Name Function Description Parameters void CAN TypeDef FunctionalState NewState Enables or disables the CAN Time TriggerOperation communication mode where x can be 1 or 2 to to select the CAN peripheral e NewState Mode new state This parameter can be ENABLE or DISABLE When enabled Time stamp TIME 15 0 value is sent in the last two data bytes of the 8 byte message TIME 7 0 in data byte 6 and TIME 15 8 in 18540 Rev 1 UM1061 Controller area network CAN data byte 7 Return values e None Notes e DLC must be programmed as 8 in order Time Stamp 2 bytes to be sent over the CAN bus 4 2 5 CAN Frames Transmission functions 4 2 5 1 CAN Transmit Function Name uint8 t CAN Transmit CAN TypeDef CANx CanTxMsg TxMessage Function Description Initiates and transmits a CAN frame message Parameters e CANx where x be 1 or 2 to to select the CAN peripheral e TxMe
85. 19 2 8 14 RCC_APB2PeriphResetCmd 4 DoclD 18540 Rev 1 379 634 Reset and clock control RCC UM1061 19 2 8 15 380 634 Function Name Function Description Parameters Return values Notes void RCC_APB2PeriphResetCmd uint32_t RCC_APB2Periph FunctionalState NewState Forces or releases High Speed APB 2 peripheral reset RCC_APB2Periph specifies the APB2 peripheral to reset This parameter can be any combination of the following values APB2Periph TIM1 clock APB2Periph 8 8 clock APB2Periph USART1 USART1 clock APB2Periph USART6 USARTE clock APB2Periph ADC1 ADC1 clock RCC APB2Periph ADC2 ADC2 clock RCC APB2Periph ADC3 ADC3 clock RCC APB2Periph SDIO SDIO clock APB2Periph SPI1 SP11 clock RCC APB2Periph SYSCFG SYSCFG clock APB2Periph 9 9 clock RCC 2 TIM10 TIM10 clock APB2Periph TIM11 TIM11 clock NewState new state of the specified peripheral reset This parameter can be ENABLE or DISABLE None None RCC_AHB1PeriphClockLPModeCmd Function Name Function Description Parameters void RCC_AHB1PeriphClockLPModeCmd uint32_t RCC_AHB1Periph FunctionalState NewState Enables or disables the AHB1 peripheral clock during Low Power Sleep mode RCC_AHBPeriph specifies the AHB1 peripheral to gates its cloc
86. 1Edge uint16 t 0x0000 DocID 18540 Rev 1 499 634 Serial peripheral interface SPI UM1061 500 634 e define SPI 2Edge uint16 t 0x0001 SPI Clock Polarity e define SPI CPOL Low uint16 1 0x0000 e define SPI CPOL High uint16 1 0x0002 SPI CRC Transmit Receive e define SPI CRC Tx uint8 t 0x00 e SPI CRC Rx uint8 1 0 01 SPI data direction e define SPI Direction 2Lines FullDuplex uint16 1 0x0000 e define SPI Direction 2Lines RxOnly uint16 t 0x0400 e define SPI Direction 1Line Rx uint16 1 0 8000 e SPI Direction 1Line Tx uint16 1 0 000 SPI data size e didefine SPI DataSize 16b uint16 t 0x0800 e didefine SPI DataSize 8b uint16 1 0 0000 DocID 18540 Rev 1 4 UM1061 Serial peripheral interface SPI 3 SPI direction transmit receive e define SPI Direction Rx uint16 t JOXBFFF e define SPI Direction Tx uint18 1 0x4000 SPI 125 Audio Frequency e define 28 AudioFreq 192k uint32 1 192000 e define 125 AudioFreq 96k uint32 1 96000 e define 12S_AudioFreq_48k uint32_t 48000 e 128 AudioFreq 44k uint32 1 44100 e define 12S_AudioFreq_32k uint32_t 32000 e 12S_AudioFreq_22k uint32_t 22050 e define 12S_AudioFreq_16k uint32_t 16000 e define 12S_AudioFreq_11k uint32_t 11025 define 12S_AudioFreq_8k uint32_t 8000 DocID 18540 Rev 1 501 634 Seri
87. 2 How to use and customize the library 37 2 1 Library configuration 37 2 2 Library programming model 39 2 3 Peripheral initialization and 40 2 4 How to run your first 41 2 4 1 41 2 4 2 Run your first example reete bea de x 41 2 4 3 Run a peripheral 43 2 5 STM32F2xx programming model using the library 44 2 6 How to develop your first 46 2 6 1 Starting OUI 46 2 6 2 Library configuration 46 2 6 3 SYSTEM SM2 DKC adakwa 46 2 6 4 E rr 47 2 6 5 Simo 22H 49 3 Analog to digital converter ADOC 50 3 1 ADC Firmware driver registers structures 50 333 ADC 50 2 634 18540 Rev 1 Gr UM1061 Contents 3 1 2 ADC Common 51 3 1 3 52 3 1 4 ADC
88. 2 or 3 in SPI mode or 2 or 3 in 125 mode e SPI 125 IT specifies the SPI interrupt pending bit to clear This function clears only CRCERR interrupt pending bit SPI IT CRCERR CRC Error interrupt None e OverRun Error interrupt pending bit is cleared by software sequence a read operation to SPI DR register SPI 125 ReceiveData followed by a read operation to SPI SR register SPI 125 GetlTStatus e UnderRun Error interrupt pending bit is cleared by a read operation to SPI SR register SPI 25 GetlTStatus e Mode Fault interrupt pending bit is cleared by software sequence a read write operation to SPI SR register SPI 125 GetlTStatus followed by a write operation to DoclD 18540 Rev 1 Gr UM1061 Serial peripheral interface SPI SPI register Cmd to enable the SPI 23 3 SPI Firmware driver defines 23 3 1 SPI Firmware driver defines 4 SPI BaudRate Prescaler SPI e define e define e define e define e define e define e define e define SPI_BaudRatePrescaler_2 uint16_t Ox0000 SPI_BaudRatePrescaler_4 uint16_t Ox0008 SPI_BaudRatePrescaler_8 uint16_t 0x0010 SPI_BaudRatePrescaler_16 uint16_t 0x0018 SPI_BaudRatePrescaler_32 uint16_t 0x0020 SPI_BaudRatePrescaler_64 uint16_t 0x0028 SPI_BaudRatePrescaler_128 uint16_t 0x0030 SPI_BaudRatePrescaler_256 uint16_t 0x0038 SPI_Clock_Phase e define SPI
89. 6 or 8 ADCCLK maximum value is 30 MHz when the APB2 clock is 60 MHz ADCCLK is configure through the ADC registers A Clock for the digital interface used for registers read write access This clock is equal to the APB2 clock The digital interface clock can be enabled disabled individually for each ADC through the RCC APB2 peripheral clock enable register APB2bENR However there is only one bit to reset the three ADCs at the same time A For more details refer to Section 3 Analog to digital converter ADC Configure the peripheral GPIOs Whatever the peripheral mode the I Os should be configured as alternate function before being used as input or output To configure the I Os follow the steps below a Connect the pin to the desired peripheral alternate function AF using GPIO PinAFConfig function b Use GPIO Init function to configure the I O pin Configure the desired pin in alternate function mode using GPIO_InitStructure GPIO Mode GPIO Mode AF Select the type pull up pull down and output speed via GPIO PuPd GPIO and GPIO Speed members For more details refer to Section 14 General purpose I Os GPIO y DocID 18540 Rev 1 45 634 How to use and customize the library UM1061 2 6 2 6 1 2 6 2 2 6 3 46 634 5 Configure the peripheral in the desired mode refer to the peripheral firmware driver section for details on the initialization procedure and
90. 8 0x90 0x94 0x98 0x9C uint32 t RTC InitTypeDef RTC HourFormat Specifies the RTC Hour Format This parameter can be a value of RTC Hour Formats uint32 t RTC InitTypeDef RTC AsynchPrediv DocID 18540 Rev 1 4 UM1061 Real time clock RTC Specifies the RTC Asynchronous Predivider value This parameter must be set to a value lower than Ox7F e uint32_t RTC_InitTypeDef RTC_SynchPrediv Specifies the RTC Synchronous Predivider value This parameter must be set to a value lower than Ox1FFF 21 1 3 RTC_TimeTypeDef RTC_TimeTypeDef is defined in the stm32f2xx_rtc h and contains the time configuration parameters Data Fields e uint8 t RTC Hours e Uuini8 t RTC Minutes e Uuini8 t RTC Seconds uint8 tRTC H12 Field Documentation e uint8_t RTC_TimeTypeDef RTC_Hours Specifies the RTC Time Hour This parameter must be set to a value the 0 12 range if the RTC_HourFormat_12 is selected or 0 23 range if the RTC_HourFormat_24 is selected e uint8_t RTC_TimeTypeDef RTC_Minutes Specifies the RTC Time Minutes This parameter must be set to a value in the 0 59 range e uint8_t RTC TimeTypeDef RTC Seconds Specifies the RTC Time Seconds This parameter must be set to a value in the 0 59 range e uint8_t RTC_TimeTypeDef RTC_H12 Specifies the AM PM Time This parameter can be a value of RTC PM Detfinitions 21 1 4 RTC DateTypeDef 3 RTC DateTypeDef is defined the stm32f2
91. 9 or 12 to select the TIM peripheral TIM_ICPSC specifies the Input Capture2 prescaler new value This parameter can be one of the following values 5 DIV1 no prescaler TIM 5 DIV2 capture is done once every 2 events ICPSC DIVA capture is done once every 4 events TIM ICPSC capture is done once every 8 events None None void SetlC3Prescaler TIM TypeDef TIMx uint16 t TIM ICPSC Sets the TIMx Input Capture 3 prescaler 25 2 11 11 TIM SetlCA4Prescaler 552 634 TIMx where x can be 1 2 3 4 5 or 8 to select the TIM peripheral TIM ICPSC specifies the Input Capture3 prescaler new value This parameter can be one of the following values ICPSC DIV1 no prescaler TIM ICPSC DIV2 capture is done once every 2 events ICPSC DIVA capture is done once every 4 events 5 DIV8 capture is done once every 8 events None None DoclID 18540 Rev 1 UM1061 General purpose timers TIM Function Name void TIM_SetiC4Prescaler T M_TypeDef TIMx uint16 t TIM_ICPSC Function Description Sets the TIMx Input Capture 4 prescaler Parameters e TIMx where x be 1 2 3 4 5 or 8 to select the TIM peripheral ICPSC specifies the Input Capture4 prescaler new value This parameter can be one of the following values TIM ICPSC DIV1 no prescaler TIM ICPSC DIV2 capture is done onc
92. External clock mapped the 125 CKIN pin used as 125 clock source None e This function must be called before enabling the 125 clock e This function applies only to Silicon RevisionB and RevisionY DoclD 18540 Rev 1 373 634 Reset and clock control RCC UM1061 19 2 8 5 RCC _AHB1PeriphClockCmd Function Name void RCC_AHB1PeriphClockCmd uint32 t RCC_AHB1Periph FunctionalState NewState Function Description Enables or disables the AHB1 peripheral clock Parameters e RCC_AHBPeriph specifies the AHB1 peripheral to gates its clock This parameter can be any combination of the following values RCC_AHB1Periph_GPIOA GPIOA clock RCC_AHB1Periph_GPIOB GPIOB clock RCC_AHB1Periph_GPIOC GPIOC clock RCC_AHB1Periph_GPIOD GPIOD clock RCC_AHB1Periph_GPIOE GPIOE clock RCC_AHB1Periph_GPIOF GPIOF clock RCC_AHB1Periph_GPIOG GPIOG clock AHBiPeriph GPIOG GPIOG clock GPIOI GPIOI clock AHBtPeriph CRC CRC clock AHBiPeriph BKPSRAM BKPSRAM interface clock DMA1 DMA1 clock 1 DMA2 clock 1 Ethernet MAC clock 1 Tx Ethernet Transmission clock 1 ETH MAC Rx Ethernet Reception clock AHBiPeriph ETH MAC Ethernet clock
93. GP Gr ter ier CAN ic S terrae a 1 f CANN Ga hmc CAN CAN FilterInitStruc CAN FilterInitStruc CAN FilterInitStruc CAN FilterInitStruc e CANN gu ure CAN Fil ure CAN Fili ure CAN Fil ure CAN Fil ure CAN Fil ure CAN Fil CAN FilterInitStru CAN FilterInitStru CAN PallicerlmieSerumctuce CAN Fili CAN 12 meno e ee CAN Pali CAN Pallicere lime 1 5 mr p er 18540 Rev 1 ure CAN SJW SJW_ltq CAN clocked at 30 MHz CAN 51 6tq CAN 52 8 p ECAN 5 terNumber 0 terMode CAN FilterMode IdMask CAN PilitecSeale 321900162 terIdHigh 0x0000 terIdLow 0x0000 terMaskIdHigh 0x0000 terMaskIdLow 0x0000 terFIFOAssignment 0 terActivation ENABLE tructure 4 UM1061 CRC calculation unit CRC 5 CRC calculation unit CRC 5 1 CRC Firmware driver registers structures 5 1 1 CRC_TypeDef CRC TypeDef is defined in the stm32f2xx h file and contains the CRC registers definition Data Fields e _ JlOuint32 t DR e _ JlOuint8 t IDR 8 t RESERVEDO e uint16 t RESERVED1 e _ JOuint32 t CR Field Documentation _ lOuint32 t CRC TypeDef DR Data register Address offset 0x00 e
94. PeripheralBurst 4 2 1 0 00200000 e define PeripheralBurst INC8 uint32 1 0 00400000 e define PeripheralBurst INC16 uint32 1 0x00600000 DMA peripheral data size e define PeripheralDataSize Byte uint32 1 0x00000000 e define PeripheralDataSize HalfWord uint32 1 0x00000800 DocID 18540 Rev 1 4 UM1061 DMA controller DMA e define PeripheralDataSize Word uint32 1 0x00001000 DMA peripheral incremented mode e define Peripherallnc Enable uint32 1 0x00000200 e didefine Peripherallnc Disable uint32 1 0 00000000 DMA peripheral increment offset e define PINCOS Psize uint32 1 0 00000000 e define PINCOS WordAligned uint32 t 0x00008000 DMA priority level e ididefine Priority Low uint32 1 0 00000000 e define Priority Medium uint32 t 0x00010000 e didefine Priority High uint32 t 0x00020000 e Priority VeryHigh uint32 t 0x00030000 10 4 DMA Programming Example 3 The below lt how to the to transfer continuously converted data from ADC1 to SRAM memory this example assumes that the ADC is already configured For more examples about DMA configuration and usage please refer to the DMA examples provided within the STM32F2xx Standard Peripheral Library package under Project S TM32F2xx_StdPeriph_Examples DMA DocID 18540
95. RIC Darcegtructurs RIC Date 0x30 RIC sis Feis RIC Year Odo RIC SetDate RIC Format BCD ERIC Davestructure DoclD 18540 Rev 1 AsynchPrediv 1 SynchPrediv 1 4 UM1061 Secure digital input output interface SDIO 22 Secure digital input output interface 5010 22 1 SDIO Firmware driver registers structures 22 1 1 SDIO_TypeDef 3 SDIO TypeDef is defined in the stm32f2xx h file and contains the SDIO registers definition Data Fields uint32_t RESERVEDO uint32_t RESERVED1 10 uint32_t POWER 10 uint32_t CLKCR 10 uint32_t ARG 10 uint32_t CMD uint32 t RESPCMD uint32 t RESP1 uint32_t RESP2 2 t RESP3 1 uint32 t RESP4 IO uint32 t DTIMER IO uint32 t DLEN IO uint32 t DCTRL uint32 t DCOUNT uint32 t STA IO uint32 t ICR IO uint32 t MASK l uint32 t FIFOCNT IO uint32 t FIFO Field Documentation IO uint32 t SDIO TypeDef POWER SDIO power control register Address offset 0x00 IO uint32 t SDIO TypeDef CLKCR SDI clock control register Address offset 0x04 IO uint32 t SDIO TypeDef ARG SDIO argument register Address offset 0x08 IO uint32 t SDIO TypeDef CMD SDIO command register Address offset uint32 t SDIO TypeDef RESPCMD SDIO command response register Address offset 0x10 l uint32 t SDIO_TypeDef RESP1 SDIO response 1 register Address offset 0x14 I uint32 t SDIO TypeDef RESP2 SDIO response 2 register Address
96. RTC TimeStampEdge Falling uint32 t 0x00000008 RTC Wakeup Timer Definitions e define e define e define e define e define e define RTC WakeUpClock RTCCLK Div16 uint32 1 0 00000000 RTC WakeUpClock RTCCLK Div8 uint32 t 0x00000001 RTC WakeUpClock RTCCLK Div4 uint32 1 0 00000002 RTC WakeUpClock RTCCLK Div2 uint32 t 0x00000003 RTC WakeUpClock CK SPRE 16bits uint32 1 0 00000004 RTC WakeUpClock CK SPRE 17bits uint32 1 0 00000006 RTC WeekDay Definitions e didefine RTC Weekday Monday uint32 t 0x00000001 DocID 18540 Rev 1 4 UM1061 Real time clock RTC 21 4 4 e define e define e define e define e define e define RTC Weekday Tuesday uint32 t 0x00000002 RTC Weekday Wednesday uint32 1 0x00000003 RTC Weekday Thursday uint32 1 0x00000004 RTC Weekday Friday uint32 1 0x00000005 RTC Weekday Saturday uint32 1 0x00000006 RTC Weekday Sunday uint32 1 0 00000007 RTC Programming Example The example below explains how to configure the RTC clock source calendar Time and Date For more examples about RTC configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples RTC RIC InitIiypeDet RIC RIC TU nest yee RIC Uie tiU ENSE RIC IDeite webs KIC Enable Write access to the RTE KKK KK KK
97. RTC Wakeup counter stopped when Core is halted DBGMCU WWDG STOP Debug WWDG stopped when Core is halted DBGMCU IWDG STOP Debug IWDG stopped when Core is halted DBGMCU 2 1 SMBUS TIMEOUT 2 1 SMBUS timeout mode stopped when Core is halted DBGMCU 2 2 SMBUS TIMEOUT 2 2 SMBUS timeout mode stopped when Core is halted DBGMCU 12C3 SMBUS TIMEOUT 2C3 SMBUS timeout mode stopped when Core is halted DBGMCU CAN2 STOP Debug stopped when Core is halted DBGMCU CANT STOP Debug stopped when Core is halted This parameter can be ENABLE or DISABLE Return values Notes None DoclD 18540 Rev 1 169 634 Debug support DBGMCU UM1061 8 2 1 5 8 3 170 634 DBGMCU_APB2PeriphConfig Function Name void DBGMCU APB2PeriphConfig uint32 t DBGMCU Periph FunctionalState NewState Function Description Configures APB2 peripheral behavior when the MCU is in Debug mode Parameters e DBGMCU specifies the APB2 peripheral This parameter can be any combination of the following values DBGMCU TIM1 STOP TIM1 counter stopped when Core is halted DBGMCU TIM8 STOP TIM8 counter stopped when Core is halted DBGMCU TIM9 STOP TIM9 counter stopped when Core is halted DBGMCU TIM10 STOP TIM10 counter stopped when Core is halted DBGMCU TIM11 STOP TIM11 counter stopped when Core is halted e NevwState new state of the specified
98. TIM_ExtTRGPolarity_NonInverted active high or rising edge active ExtTRGFilter External Trigger Filter This parameter must a value between 0x00 and OxOF None None Synchronization management functions TIM SelectlnputTrigger Function Name Function Description void TIM SelectInputTrigger TIM TypeDef TIMx uint16 t TIM InputTriggerSource Selects the Input Trigger source DocID 18540 Rev 1 563 634 General purpose timers TIM UM1061 Parameters e TIMx where x be 1 2 3 4 5 8 9 10 11 12 13 14 to select the TIM peripheral InputTriggerSource The Input Trigger source This parameter can be one of the following values TIM TS ITRO Internal Trigger O TS 1 Internal Trigger 1 TS ITR2 Internal Trigger 2 TS ITRS Internal Trigger TS ED Edge Detector TS TIIFP1 Filtered Timer Input 1 TS TI2FP2 Filtered Timer Input 2 TIM TS External Trigger input Return values None Notes None 25 2 15 2 TIM SelectOutputTrigger Function Name void TIM SelectOutputTrigger T M TypeDef uint16 t TIM TRGOSource Function Description Selects the TIMx Trigger Output Mode Parameters e TIMx where x can be 1 2 3 4 5 6 7 or 8 to select the TIM peripheral e TRGOSource specifies the Trigger Output source This parameter can be one of the following values Notes Non
99. The value of words already pushed into the IN FIFO e None void HASH_GetDigest HASH MsgDigest HASH_MessageDigest Provides the message digest result HASH_MessageDigest pointer to a HASH_MsgDigest structure which will hold the message digest result None In MD5 mode Data 4 filed of HASH_MsgDigest structure is not used and is read as zero void HASH StartDigest void Starts the message padding and calculation of the final message None None None DoclD 18540 Rev 1 UM1061 Hash processor HASH 15 2 10 Context swapping functions 15 2 10 1 HASH_SaveContext Function Name void HASH SaveContext HASH Context HASH ContextSave Function Description Save the Hash peripheral Context Parameters e HASH ContextSave pointer to a HASH Context structure that contains the repository for current context Return values e None Notes e context can be saved only when no block is currently being processed So user must wait for DINIS 1 the last block has been processed and the input FIFO is empty or NBW 0 the FIFO is not full and no processing is ongoing 15 2 10 2 HASH RestoreContext Function Name void HASH RestoreContext HASH Context HASH ContextRestore Function Description Restore the Hash peripheral Context Parameters e HASH ContextRestore pointer to a HASH Context structure that contains the repository for saved context Return values e None Notes e Af
100. These operations must be done before step 6 Enable the DMA stream using the DMA_Cmd function Activate the needed Stream Request using PPP DMACmd function for any PPP peripheral except internal SRAM and FLASH ie SPI USART The function allowing this operation is provided in each PPP peripheral driver ie SPI DMACmd for SPI peripheral Once the Stream is enabled it is not possible to modify its configuration unless the stream is stopped and disabled After enabling the Stream it is advised to monitor the EN bit status using the function DMA_GetCmdStatus In case of configuration errors or bus errors this bit will remain reset and all transfers on this Stream will remain on hold Optionally you can configure the number of data to be transferred when the Stream is disabled ie after each Transfer Complete event or when a Transfer Error occurs using the function DMA SetCurrDataCounter And you can get the number of remaining data to be transferred using the function GetCurrDataCounter at run time when the DMA Stream is enabled and running To control DMA events you can use one of the following two methods After checking a flag you should clear it using DMA ClearFlag function And after checking on an interrupt event you should clear it using DMA_ClearlTPendingBit function a Check on DMA Stream flags using the function DMA GetFlagStatus b Use DMA interrupts through the function ITConfig at initialization
101. UM1061 4 2 9 4 4 2 9 5 110 634 CAN GetlTStatus Function Name ITStatus CAN GetlTStatus CAN TypeDef CANx uint32 t CAN IT Function Description Checks whether the specified CANx interrupt has occurred or not Parameters e Return values e Notes CAN_ClearlTPendingBit CANXx where x be 1 or 2 to to select the CAN peripheral specifies the CAN interrupt source to check This parameter can be one of the following values Transmit mailbox empty Interrupt IT FIFO 0 message pending Interrupt FIFO 0 full Interrupt CAN FOVO FIFO 0 overrun Interrupt IT FMP 1 FIFO 1 message pending Interrupt IT FF1 FIFO 1 full Interrupt CAN IT FOVT FIFO 1 overrun Interrupt IT Wake up Interrupt CAN IT SLK Sleep acknowledge Interrupt CAN IT EWG Error warning Interrupt CAN IT EPV Error passive Interrupt CAN IT BOF Bus off Interrupt CAN IT LEC Last error code Interrupt CAN IT ERR Error Interrupt The current state of CAN IT SET or RESET None Function Name void CAN_ClearlTPendingBit TypeDef uint32 t CAN IT Function Description Clears the CANx s interrupt pending bits Parameters where x be 1 2 to to select the CAN peripheral specifies the interrupt pending bit to clear
102. and RCC_APB1PeriphClockLPModeCmd functions Below is the list of functions used to configure peripheral clocks RCC_RTCCLKConfig RCC_RTCCLKCmd RCC_BackupResetCmd RCC_I2SCLKConfig RCC_AHB1PeriphClockCmd RCC_AHB2PeriphClockCmd RCC_AHB3PeriphClockCmd RCC_APB1PeriphClockCmd RCC_APB2PeriphClockCmd RCC_AHB1PeriphResetCmd RCC_AHB2PeriphResetCmd RCC_AHB3PeriphResetCmd RCC_APB1PeriphResetCmd RCC_APB2PeriphResetCmd RCC_AHB1PeriphClockLPModeCmd 360 634 DocID 18540 Rev 1 4 UM1061 Reset and clock control RCC RCC_AHB2PeriphClockLPModeCmd RCC_AHB3PeriphClockLPModeCmd RCC_APB1PeriphClockLPModeCmd RCC_APB2PeriphClockLPModeCmd 19 2 5 Interrupt and flag management functions Below is the list of functions to manage interrups and flags RCC_ITConfig GetFlagStatus RCC ClearFlag RCC GellTStatus ClearlTPendingBit 19 2 6 Internal and external clocks PLL CSS and MCO configuration functions 19 2 6 1 RCC Delnit Function Name Function Description Parameters Return values Notes 19 2 6 2 RCC HSEContig Function Name Function Description Parameters 4 void RCC Delnit void Resets the RCC clock configuration to the default reset state e None e None e default reset state of the clock configuration is given below HSI ON and used as system clock sourceHSE PLL and PLLI2S OFFAHB APB1 and APB2 prescaler set to 1 CSS MCO1
103. define LineS uint32 1 0x00008 External interrupt line 3 e define EXTI Lined uint32 1 0x00010 External interrupt line 4 e define Line5 uint32 1 0x00020 External interrupt line 5 e define Line6 uint32 1 0 00040 External interrupt line 6 e Line7 uint32 1 0 00080 External interrupt line 7 e define Line8 uint32 1 0x00100 External interrupt line 8 e define EXTI Line9 uint32 1 0x00200 External interrupt line 9 e iidefine EXTI LinetO uint32 1 0 00400 External interrupt line 10 DocID 18540 Rev 1 4 UM1061 External interrupt event controller 3 e define EXTI_Line11 uint32_t 0x00800 External interrupt line 11 e define EXTI_Line12 uint32_t 0x01000 External interrupt line 12 define EXTI_Line13 uint32_t 0x02000 External interrupt line 13 define EXTI_Line14 uint32_t 0x04000 External interrupt line 14 e define EXTI_Line15 uint32_t 0x08000 External interrupt line 15 e define EXTI Linet6 uint32 1 0 10000 External interrupt line 16 Connected to the PVD Output e define EXTI Line17 uint32 1 0 20000 External interrupt line 17 Connected to the RTC Alarm event e didefine EXTI Linet8 uint32 1 0x40000 External interrupt line 18 Connected to the USB OTG FS Wakeup from suspend event e define EXTI 19 2 t 0x80000 External interrup
104. define TIM DMABursiLength 1Transfer uint16 1 0x0000 TIM DMABursiLength 2Transfers uint16 t 0x0100 DMABurstiLength 3Transfers uint16 t 0x0200 DMABursiLength 4Transfers uint16 t 0x0300 DMABursiLength 5Transfers uint16 t 0x0400 TIM DMABursiLength 6Transfers uint16 t 0x0500 DMABursiLength 7Transfers uint16 t 0x0600 DMABursiLength 8Transfers uint16 t 0x0700 DMABursiLength 9Transfers uint16 t 0x0800 TIM DMABursiLength 10Transfers uint16 t 0x0900 TIM DMABursiLength 11Transfers uint16 t 0x0A00 DocID 18540 Rev 1 4 UM1061 General purpose timers TIM 3 e define e define e define e define e define e define e define TIM DMABursiLength 12Transfers uint16 t 0x0BOO0 TIM DMABursiLength 13Transfers uint16 1 0 0 00 TIM DMABursiLength 14Transfers uint16 t 0xODOO DMABursiLength 15Transfers uint16 t OxOEO0 DMABurstLength 16Transfers uint16 t OxOF00 TIM DMABursiLength 17Transfers uint16 t 0x1000 TIM DMABursiLength 18Transfers uint16 t Ox1100 TIM DMA sources e define e define e define e define e define TIM DMA Update uint16 t 0x0100 16 t 0x0200 CC2 uint16 t 0x0400 CC3 uint16 t 0x0800 CCdA uint16 t 0x1000 DocID 18540 Rev 1 573 634 General purpose timers TIM UM1061 574 634
105. define CRYP AlgoDir Encrypt uint16 0 0000 e ididefine CRYP_AlgoDir_Decrypt uint16_t 0x0004 4 DocID 18540 Rev 1 145 634 Cryptographic processor CRYP UM1061 146 634 CRYP_Algorithm_Mode define CRYP_AlgoMode_TDES_ECB uint16_t 0x0000 lt TDES Modes define CRYP_AlgoMode_TDES_CBC uint16_t 0x0008 DES Modes define CRYP_AlgoMode_DES_ECB uint16_t 0x0010 define CRYP_AlgoMode_DES_CBC uint16_t 0x0018 AES Modes define CRYP_AlgoMode_AES_ECB uint16_t 0x0020 define CRYP_AlgoMode_AES_CBC uint16_t 0x0028 define CRYP_AlgoMode_AES_CTR uint16_t 0x0030 define CRYP_AlgoMode_AES_Key uint16_t 0x0038 CRYP_Data_Type define DataType 32b uint16 1 0x0000 define DataType 16b uint16 1 0x0040 define DataType 8b uint16 1 0x0080 define CRYP_DataType_1b uint16_t Ox00CO DoclID 18540 Rev 1 4 UM1061 Cryptographic processor CRYP CRYP DMA transfer reguests e define CRYP DMAReq DatalN uint8 t 0x01 e define CRYP DMAReq DataOUT uint8 1 0x02 CRYP Encryption Decryption modes definition e define MODE ENCRYPT uint8 t 0x01 define MODE DECRYPT uint8 1 0 00 CRYP flags definition e idefine CRYP FLAG BUSY uint8 t 0x10 The CRYP core is currently processing a block of data or a key preparation for AES decryption e idefine CRYP FLAG IFEM uint8 t 0x01 Input Fifo Empty e define CRYP FLAG IFNF
106. during normal operation to prevent MCU reset using WWDG SetCounter function This operation must occur only when the counter value is lower than the refresh window value programmed using WWDG_SetWindowValue Prescaler Refresh window and Counter configuration functions WWDG Delnit WWDG SetPrescaler WWDG SetWindowValue WWDG EnablelT WWDG SetCounter WWDG activation functions WWDG_Enable Interrupts and flags management functions WWDG GetFlagStatus e ClearFlag 27 2 1 Prescaler Refresh window and Counter configuration functions 27 2 1 1 WWDG_Delnit Function Name void WWDG_Delnit void Function Description Deinitializes the WWDG peripheral registers to their default reset values Parameters e None Return values e None Notes e None 27 21 2 WWDG SetPrescaler 620 634 DocID 18540 Rev 1 4 UM1061 Window watchdog WWDG 27 2 1 3 27 2 1 4 Function Name Function Description Parameters Return values Notes void WWDG SetPrescaler uint32 t WWDG Prescaler Sets the WWDG Prescaler e WWDG Prescaler specifies the WWDG Prescaler This parameter can be one of the following values WWDG Prescaler 1 WWDG counter clock PCLK1 4096 1 WWDG Prescaler 2 WWDG counter clock PCLK1 4096 2 WWDG Prescaler 4 WWDG counter clock PCLK1 4096 4 WWDG Prescaler 8 WWDG counter clock PCLK1 4096 8 WWD
107. e Src subfolder contains the peripheral drivers source files Each peripheral has a source code file stm32f2xx ppp c and a header file stm32f2xx ppp h The stm32f2xx_ppp c file contains all the firmware functions required to use the PPP peripheral DoclD 18540 Rev 1 29 634 STM32F2xx Standard Peripheral Library UM1061 30 634 The library files are listed and described in details in the following tables Table 3 Description of CMSIS files File name Description core_cm3 c Defines several helper functions that access Cortex M3 core registers core_cm3 h Describes the data structures for the Cortex M3 core peripherals and performs the address mapping of these structures It also provides basic access to the Cortex M3 core registers and core peripherals using efficient functions defined as static inline stm32f2xx h CMSIS Cortex M3 STM32F2xx peripheral access layer header file This file contains the definitions of all peripheral registers bits and memory mapping for STM32F2xx devices The file is the unique include file used in the application programmer C source code usually in the main c This file contains e Configuration section allowing To select the device used in the target application To use or not the peripheral drivers in your application code meaning that the code is based on direct access to peripheral registers rather than drivers API This option is controlled by define USE STDPER
108. e define DIR MemoryToPeripheral uint32 t 0x00000040 e define DIR MemoryToMemory uint32 1 0 00000080 DocID 18540 Rev 1 4 UM1061 DMA controller DMA 3 fifo direct mode e define e define DMA_FIFOMode_Disable uint32_t Ox00000000 DMA_FIFOMode_Enable uint32_t Ox00000004 DMA_fifo_status_level e define e define e define e define e define e define DMA_FIFOStatus_Less1QuarterFull uint32_t Ox00000000 lt lt 3 DMA_FIFOStatus_1QuarterFull uint32_t Ox00000001 lt lt 3 DMA_FIFOStatus_HalfFull uint32_t Ox00000002 lt lt 3 DMA_FIFOStatus_3QuartersFull uint32_t Ox00000003 lt lt 3 DMA_FIFOStatus_Empty uint32_t 0x00000004 lt lt 3 DMA_FIFOStatus_Full uint32_t O0x00000005 lt lt 3 DMA_fifo_threshold_level e didefine e didefine e didefine DMA FiIFOThreshold 1QuarterFull uint32 1 0 00000000 HalfFull uint32 1 0 00000001 FIFOThreshold 3QuartersFull uint32 1 0x00000002 DocID 18540 Rev 1 205 634 DMA controller DMA UM1061 206 634 e define FIFOThreshold Full uint32 1 0 00000003 DMA flags definition e define e define e define e define e define e define e define e define e define e define e define FLAG FEIFO uint32 t 0x10800001 DMA FLAG DMEIFO uint32 t 0x 10800004 DMA FLAG TEIFO uint32 t 0x100000
109. e define SPI 125 IT 8 t 0x58 SPI 125 IT OVhR uint8 1 0 56 SPI IT MODF uint8 1 0 55 SPI CRCERR uint8 t 0x54 SPI I2S Legacy e define e e e define e define e define e define e iidefine SPI DMAReq TxSPI 125 DMAReq Tx SPI DMAReq RxSPI 125 DMAReq Rx SPI IT TXESPI I2S IT TXE SPI IT RXNESPI 125 RXNE SPI IT ERRSPI 25 IT ERR SPI OVRSPI 125 SPI FLAG RXNESPI 125 FLAG RXNE SPI FLAG TXESPI 128 FLAG TXE DoclID 18540 Rev 1 3 UM1061 Serial peripheral interface SPI 3 e define e e define e define e define e define e define e define e define e define e define SPI FLAG OVRSPI 125 FLAG OVR SPI FLAG BSYSPI 128 FLAG BSY SPI DelnitSPI 125 Delnit SPI ITConfigSPI 125 ITConfig SPI DMACmdSPI 125 DMACmd SPI SendDataSPI 125 SendData SPI HRHeceiveDataSPI 125 ReceiveData SPI GetFlagStatusSPI 128 GetFlagStatus SPI ClearFlagSPI 125 ClearFlag SPI GetlTStatusSPI I2S GetlTStatus SPI ClearlTPendingBitSPI 125 ClearlTPendingBit SPI 125 MCLK Ouiput e didefine 25 MCLKOutput Enable uint16 t 0x0200 DoclID 18540 Rev 1 505 634 Serial peripheral interface SPI UM1061 506 634 e define I28 MCLKOutput Disable uint16 t 0x0000 SPI 125 Mode e define e define e define e define 125 Mode SlaveTx uint16 1 0 0000 125
110. e The HSI is stopped by hardware when entering STOP STANDBY modes It is used enabled by hardware as system clock source after startup from Reset wakeup from STOP and STANDBY mode or in case of failure of the HSE used directly or indirectly as system clock if the Clock Security System CSS is enabled e not be stopped if it is used as system clock source In this case you have to select another source of the system clock then stop the HSI e After enabling the HSI the application software should wait on HSIRDY flag to be set indicating that HSI clock is stable and can be used as system clock source e When the HSI is stopped HSIRDY flag goes low after 6 HSI oscillator clock cycles void RCC LSEConfig uint8_t RCC_LSE Configures the External Low Speed oscillator LSE e LSE specifies the new state of the LSE This parameter can be one of the following values LSE OFF turn OFF the LSE oscillator LSERDY DoclID 18540 Rev 1 363 634 Reset and clock control RCC UM1061 Return values Notes 19 2 6 7 RCC LSICmd Function Name Function Description Parameters Return values Notes 19 2 6 8 RCC PLLConfig Function Name Function Description Parameters 364 634 flag goes low after 6 LSE oscillator clock cycles LSE ON turn ON the LSE oscillator LSE Bypass LSE oscillator bypassed with clock None As the LSE is in th
111. function data can be transferred e From memory to the CRYP IN FIFO using the DMA peripheral by enabling the CRYP DMAReq DatalN request From the CRYP OUT FIFO to the memory using the DMA peripheral by enabling the DataOUT request The function that can be used for CRYP DMA interface Configuration is e CRYP_DMACmd 6 2 3 Interrupt and flag management 4 This section provides functions allowing to configure the CRYP Interrupts and to get the status and Interrupts pending bits The CRYP provides 7 Flags and 2 Interrupt sources Flags e CRYP FLAG IFEM Set when Input FIFO is empty This Flag is cleared only by hardware DoclD 18540 Rev 1 133 634 Cryptographic processor CRYP UM1061 6 2 4 134 634 CRYP_FLAG_IFNF Set when Input FIFO is not full This Flag is cleared only by hardware e CRYP FLAG INRIS Set when Input FIFO Raw interrupt is pending it gives the raw interrupt state prior to masking of the input FIFO service interrupt This Flag is cleared only by hardware e FLAG OFNE Set when Output FIFO not empty This Flag is cleared only by hardware e CRYP FLAG OFFU Set when Output FIFO is full This Flag is cleared only by hardware FLAG OUTRIS Set when Output FIFO Raw interrupt is pending it gives the raw interrupt state prior to masking of the output FIFO service interrupt This Flag is cleared only by hardware e FLAG BUSY Set when the CRYP co
112. iidefine PVDLevel 2PWR CR PLS LEV2 e iidefine PVDLevel 3PWR CR PLS LEV3 DoclID 18540 Rev 1 3 UM1061 Power control PWR e define PWR_PVDLevel_4PWR_CR_PLS_LEV4 e define PWR PVDLevel 5PWR CR PLS LEV5 e define PWR PVDLevel 6PWR CR PLS LEV6 e define PWR PVDLevel 7PWR PLS LEV7 PWR Regulator state in STOP mode e define PWR Regulator ON uint32 t 0x00000000 e define PWR Regulator LowPowerPWR CR LPDS PWR STOP mode entry e define PWR_STOPEntry_WFI uint8_t 0x01 e define PWR_STOPEntry_WFE uint8_t 0x02 18 4 PWR Programming Example The example below explains how to enter the system to STANDBY mode and wake up from this mode using the WKUP pin PAO For more examples about PWR configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples PWR Enable PWR Clock RCC_APB1PeriphClockCmd RCC_APB1Periph PWR ENABLE Enable WKUP pin 1 WakeUpPi nCmd ENABLE Request to enter STANDBY mode Wake Up flag is cleared in DoclID 18540 Rev 1 353 634 Power control PWR UM1061 354 634 PWR PWR EnterSTAND BYMode function EnterSTANDBYMode DocID 18540 Rev 1 Sn 4 UM1061 Reset and clock control RCC 19 Reset and clock control RCC 19 1 RCC Firmware driver registers structures
113. status and clear flags and Interrupts pending bits DoclD 18540 Rev 1 UM1061 Analog to digital converter ADC Each ADC provides 4 Interrupts sources and 6 Flags which can be divided into 3 groups 1 Flags and Interrupts for ADC regular channels Flags Interrupts a ADC FLAG OVR Overrun detection when regular converted data are lost ADC FLAG ECC Regular channel end of conversion gt to indicate depending on EOCS bit managed by ADC_EOCOnEachRegularChannelCmd the end of gt a regular CHANNEL conversion gt sequence of regular GROUP conversions ADC_FLAG_STRT Regular channel start gt to indicate when regular CHANNEL conversion starts d ADC_IT_OVR specifies the interrupt source for Overrun detection event e ADC_IT_EOC specifies the interrupt source for Regular channel end of conversion event 2 Flags and Interrupts for ADC Injected channels Flags Interrupts a ADC FLAG Injected channel end of conversion gt to indicate at the end of injected GROUP conversion b ADC FLAG JSTRT Injected channel start gt to indicate hardware when injected GROUP conversion starts c ADC IT specifies the interrupt source for Injected channel end of conversion event 3 General Flags and Interrupts for the ADC Flags Interrupts a ADC FLAG AWD Analog watchdog to indicate if the converted voltage crosses the programmed thresholds values b ADC IT AWD specifies the
114. uint32 1 0x00000010 e define RTC Month November uint32 1 0x0000001 1 e define RTC Month December uint32 1 0x00000012 RTC Output Polarity Definitions e define RTC OutputPolarity High uint32 1 0x00000000 e define RTC OuiputPolarity Low uint32 t 0x00100000 RTC Output selection Definitions e define RTC Output Disable uint32 1 0 00000000 DoclD 18540 Rev 1 4 UM1061 Real time clock RTC 3 e define RTC_Output_AlarmA uint32_t 0x00200000 e define RTC Ouiput AlarmB uint32 1 0x00400000 e define RTC Output WakeUp uint32 1 0x00600000 RTC Output Type ALARM OUT e define RTC OutputType OpenDrain uint32 0 00000000 e define RTC PushPull uint32 t 0x00040000 RTC Tamper Pins Definitions e define RTC Tamper 1TRTC TAFCR TAMP1E Tamper Pin Selection e define RTC TamperPin PC13 uint32 t 0x00000000 e define RTC TamperPin Pl8 uint32 t 0x00010000 RTC Tamper Trigger Definitions e define RTC TamperTrigger RisingEdge uint32 t 0x00000000 e define RTC TamperTrigger FallingEdge uint32 1 0 00000001 DoclID 18540 Rev 1 447 634 Real time clock RTC UM1061 448 634 RTC TimeStamp Pin Selection e define e define RTC TimeStampPin PC13 uint32 t 0x00000000 RTC TimeStampPin Pl8 uint32 1 0x00020000 RTC Time Stamp Edges definitions e didefine e didefine RTC TimeStampEdge Rising uint32 1 0 00000000
115. 00000100 Unmask DAC channel LFSR bit 1 0 for noise wave generation e define DAC LFSRUnmask Bits2 O uint32 1 0 00000200 Unmask DAC channel LFSR bit 2 0 for noise wave generation e define DAC LFSRUnmask Bits3 O uint32 t 0x00000300 Unmask DAC channel LFSR bit 3 0 for noise wave generation e ididefine DAC LFSRUnmask Bits4 O uint32 1 0 00000400 Unmask DAC channel LFSR bit 4 0 for noise wave generation e ididefine DAC LFSRUnmask Bits5 O uint32 1 0 00000500 Unmask DAC channel LFSR bit 5 0 for noise wave generation e define DAC LFSRUnmask Bits6 O uint32 t 0x00000600 Unmask DAC channel LFSR bit 6 0 for noise wave generation e ididefine DAC LFSRUnmask Bits7 O uint32 1 0 00000700 Unmask DAC channel LFSR bit 7 0 for noise wave generation DocID 18540 Rev 1 4 UM1061 Digital to analog converter DAC 3 e define DAC LFSRUnmask Bits8 O uint32 1 0 00000800 Unmask DAC channel LFSR bit 8 0 for noise wave generation define DAC LFSRUnmask Bits9 O uint32 t 0x00000900 Unmask DAC channel LFSR bit 9 0 for noise wave generation e ididefine DAC LFSRUnmask Bits10 O uint32 1 0x00000A00 Unmask DAC channel LFSR bit 10 0 for noise wave generation e ididefine DAC LFSRUnmask Bits11 O uint32 1 0x00000B00 Unmask DAC channel LFSR bit 11 0 for noise wave generation e define DAC TriangleAmplitude 1 2 0 00000000 Select max triangle amplitude of 1 e iidefine DAC TriangleAmpl
116. 0x20000200 FLAG HTIF5 uint32 1 0x20000400 FLAG TCIF5 uint32 1 0 20000800 FLAG FEIF6 uint32 t 0x20010000 FLAG DMEIF6 uint32 1 0 20040000 FLAG TEIF6 uint32 t 0x20080000 FLAG HTIF6 uint32 1 0x20100000 FLAG TCIF6 uint32 1 0 20200000 DoclID 18540 Rev 1 4 UM1061 DMA controller DMA define define define define define DMA_FLAG_FEIF7 uint32_t 0x20400000 DMA FLAG DMEIF7 uint32 1 0x21000000 DMA FLAG TEIF7 uint32 t 0x22000000 FLAG HTIF7 uint32 1 0 24000000 FLAG TCIF7 uint32 1 0 28000000 DMA flow controller definitions define define DMA FlowCtrl Memory uint32 1 0x00000000 FlowCtrl Peripheral uint32 1 0x00000020 DMA interrupts definitions 3 define define define define DMA IT FEIFO uint32 1 0x90000001 DMA IT DMEIFO uint32 t 0x10001004 IT TEIFO uint32 1 0x10002008 HTIFO uint32 1 0 10004010 DocID 18540 Rev 1 209 634 DMA controller DMA UM1061 210 634 define define define define define define define define define define define define DMA_IT_TCIFO uint32_t 0x10008020 DMA_IT_FEIF1 uint32_t 0x90000040 DMA_IT_DMEIF1 uint32_t 0x10001100 DMA_IT_TEIF1 uint32_t 0x10002200 DMA_IT_HTIF1 uint32_t 0x10004400 DMA_IT_TCIF1 uint32_t 0x10
117. 1 DMABase CCR2 DMABase CCR3 DMABase 4 DMABase DMABase TIM_DMABurstLength DMA Burst length This parameter can be one value between TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers DocID 18540 Rev 1 559 634 General purpose timers TIM UM1061 Return values Notes 25 2 13 8 TIM DMACmd 25 2 13 9 TIM SelectCCDMA 560 634 Function Name Function Description Parameters Return values Notes Function Name Function Description Parameters Return values Notes None None void TIM DMACmd TypeDef TIMx uint16 t TIM DMASource FunctionalState NewState Enables or disables the TIMx s DMA Requests TIMx where x can be 1 2 3 4 5 6 7 or 8 to select the TIM peripheral TIM DMASource specifies the DMA Request sources This parameter can be any combination of the following values TIM Update TIM update Interrupt source TIM DMA CCT TIM Capture Compare 1 DMA source 2 TIM Capture Compare 2 DMA source TIM TIM Capture Compare 3 DMA source TIM 4 TIM Capture Compare 4 DMA source TIM DMA COM TIM Commutation DMA source TIM DMA Trigger TIM Trigger DMA source NewState new state of the DMA Request sources This parameter can be ENABLE or DISABLE None None void TIM SelectCCDMA TIM TypeDef TIMx Function
118. 1 4 UM1061 DMA controller DMA When FIFO is disabled it is not allowed to configure different Data Sizes for Source and Destination In this case the Peripheral Data Size will be applied to both Source and Destination 10 2 2 Initialization and configuration This subsection provides functions allowing to initialize the Stream source and destination addresses incrementation and data sizes transfer direction buffer size circular normal mode selection memory to memory mode selection and Stream priority value The DMA Init function follows the DMA configuration procedures as described in reference manual 0033 except the first point waiting EN bit to be reset This condition should be checked by user application using the function DMA_GetCmdStatus before calling the DMA_Init function Delnit Init DMA_Structinit DMA_Cmd DMA_PeriphincOffsetSizeContig DMA FlowControllerConfig Data Counter functions This subsection describes the functions allowing to configure and read the buffer size number of data to be transferred The DMA data counter can be written only when the DMA Stream is disabled ie after transfer complete event The following function can be used to write the Stream data counter value e void SetCurrDataCounter DMA Stream TypeDef Streamx uint16 t Counter It is advised to use this function rather than Init in situatio
119. 1 4 UM1061 Serial peripheral interface SPI 23 2 9 3 23 2 9 4 23 2 10 23 2 10 1 SPI GetCRC Function Name uint16_t SPI GetCRC SP TypeDef SPIx uint8_t SPI CRC Function Description Returns the transmit or the receive CRC register value for the specified SPI Parameters e SPlx where x be 1 2 or to select the SPI peripheral e SPI CRC specifies the CRC register to be read This parameter can be one of the following values SPI CRC Tx Selects Tx CRC register SPI CRC Selects Rx CRC register Return values The selected CRC register value Notes e None SPI GetCRCPolynomial Function Name uint16 t SPI GetCRCPolynomial 5 TypeDef SPIx Function Description Returns the CRC Polynomial register value for the specified SPI Parameters e SPlx where x be 1 2 or 3 to select the SPI peripheral Return values The CRC Polynomial register value Notes e None DMA transfers management function 125 Function void SPI 125 SP TypeDef SPIx uint16 t SPI 125 DMAReq FunctionalState NewState Function Description Enables or disables the SPIx I2Sx DMA interface DociD 18540 Rev 1 495 634 Serial peripheral interface SPI UM1061 23 2 11 23 2 11 1 23 2 11 2 496 634 Parameters e Return values Notes SPIx To select the SPIx I2Sx peripheral where x be 1 2 or 3 in SPI mode or 2 or 3 in 125 mode
120. 1 603 634 Universal synchronous asynchronous receiver UM1061 transmitter USART 26 2 14 2 26 2 14 3 604 634 Function Name Function Description Parameters Return values Notes USART_LINCmd Function Name Function Description Parameters Return values Notes USART_SendBreak Function Name Function Description Parameters void USART_LINBreakDetectLengthConfig USART_TypeDef USARTx 16 t USART_LINBreakDetectLength Sets the USART LIN Break detection length USARTXx where x can be 1 2 3 4 5 6 to select the USART or UART peripheral USART_LINBreakDetectLength specifies the LIN break detection length This parameter can be one of the following values USART LlINBreakDeteciLength 10b 10 bit break detection USART LlINBreakDeteciLength 11b 11 bit break detection None None void USART LINCmd USART TypeDef USARTx FunctionalState NewState Enables or disables the USART s LIN mode USARTx where x can be 1 2 3 4 5 or 6 to select the USART or UART peripheral NewState new state of the USART LIN mode This parameter can be ENABLE or DISABLE None None void USART SendBreak USART_TypeDef USARTx Transmits break characters USARTx where x can be 1 2 3 4 5 or 6 to select the USART or UART peripheral DoclD 18540 Rev 1 UM1061 Universal synchronous asynchronous receiver transmitter USART Return values e
121. 2 Disable the CRC calculation using the CalculateC RC function 3 Enable the CRC calculation using the SPI CalculateC RC function 4 Enable SPI using the SPI Cmd function The hardware CRC calculation functions are e SPI CalculateCRC e SPI TransmitCRCY e GetCRC SPI GetCRCPolynomial 23 2 5 DMA transfers management e SPI 25 DMACmd 23 2 6 Interrupt and flag management 4 This section provides a set of functions allowing to configure the SPI Interrupts sources and check or clear the flags or pending bits status The user should identify which mode will be used in his application to manage the communication Polling mode Interrupt mode or DMA mode Polling Mode In Polling Mode the 5 25 communication be managed by 9 flags SPI 125 FLAG to indicate the status of the transmit buffer register SPI l28 FLAG RXNE to indicate the status of the receive buffer register 125 FLAG BSY to indicate the state of the communication layer of the SPI SPI_FLAG_CRCERR to indicate if a CRC Calculation error occur SPI FLAG to indicate if a Mode Fault error occur SPI 125 FLAG OVR to indicate if an Overrun error occur 125 FLAG TIFRFE to indicate a Frame Format error occurs 125 FLAG to indicate an Underrun error occurs 125 FLAG CHSIDE to indicate Channel Side Do not use the BSY flag to handle each data transmission or reception It is better to use
122. 2 prescaler This parameter can be one of the following values MCO2Div 1 no division applied to MCO2 clock MCO2Div 2 division by 2 applied to MCO2 clock RCC MCO2Div 3 division by applied to MCO2 clock RCC MCO2Div 4 division by 4 applied to MCO2 clock RCC MCO2Div 5 division by 5 applied to MCO2 clock Return values Notes e 9 should be configured in alternate function mode System AHB and APB busses clocks configuration functions RCC_SYSCLKConfig Function Name void RCC_SYSCLKConfig uint32_t RCC_SYSCLKSource Function Description Configures the system clock SYSCLK DocID 18540 Rev 1 UM1061 Reset and clock control RCC 19 2 7 2 19 2 7 3 4 Parameters e Return values e Notes RCC SYSCLKSource specifies the clock source used as system clock This parameter can be one of the following values SYSCLKSource HSI HSI selected as system clock source RCC SYSCLKSource HSE HSE selected as system clock source SYSCLKSource PLLCLK PLL selected as system clock source None The HSI is used enabled by hardware as system clock source after startup from Reset wake up from STOP and STANDBY mode or in case of failure of the HSE used directly or indirectly as system clock if the Clock Security System CSS is enabled A switch from one clock source to another occurs only if the target clock source is ready clock
123. BASE uint32 t 0x42000000 RCC registers bit address in the alias region CENE define REC BASE gt PERT PH BASE CR Regisiter Alias word address of PLLON bit DocID 18540 Rev 1 UM1061 STM32F2xx Standard Peripheral Library 3 define CR_OFFSET RCC_OFFSET 0x00 define PLLON BitNumber 0x18 define CR_PLLON BB PERIPH BASE CR OFFSET 32 PLLON BitNumber 4 To code a function which enables disables the PLL the usual method is the following void RCC PLLCmd FunctionalState NewState if NewState DISABLE Enable PLL RCC gt CR RCC CR PLLON else 1 Disable PLL RCC gt CR amp RCC_CR_PLLON Using bit band access this function will be coded as follows void RCC PLLCmd FunctionalState NewState IO wimes2 1 7 CR_PLLON BE mimes2 ic NewSicaces Run time checking The library implements run time failure detection by checking the input values of all library functions The run time checking is achieved by using an assert_param macro This macro is used in all the library functions which have an input parameter It allows checking that the input value lies within the parameter allowed values To enable the run time checking use the assert_param macro and leave the define USE FULL ASSERT uncommented in stm32f2xx_conf h file Example PWR
124. Bank to be used This parameter can be one of the following values FSMC 2 FSMC 2 FSMC Bank3 NAND FSMC Bank3 NAND FSMC Bank4 PCCARD FSMC 4 PCCARD e FSMC FLAG specifies the flag to clear This parameter can be any combination of the following values FSMC FLAG RisingEdge Rising edge detection Flag FSMC FLAG Level Level detection Flag FSMC FLAG FallingEdge Falling edge detection Flag Return values e None Notes e None 13 2 8 4 FSMC GetlTStatus Function Name ITStatus FSMC GetlTStatus uint32 t FSMC Bank uint32 t FSMC Function Description Checks whether the specified FSMC interrupt has occurred or not Parameters e Bank specifies the FSMC Bank to be used This parameter can be one of the following values 266 634 DocID 18540 Rev 1 Gr UM1061 Flexible static memory controller FSMC 13 2 8 5 13 3 13 3 1 3 Return values Notes FSMC 2 FSMC Bank2 FSMC Bank3 NAND FSMC Bank3 NAND FSMC Bank4 PCCARD FSMC Bank4 PCCARD FSMC specifies the FSMC interrupt source to check This parameter can be one of the following values FSMC IT RisingEdge Rising edge detection interrupt FSMC IT Level Level edge detection interrupt FSMC IT FallingEdge Falling edge detection interrupt The new state of FSMC IT SET or RESET None FSMC_ClearlTPendingBit Function Name
125. Channel9 selected Channel 10 ADC Channel10 selected Channel 11 ADC Channel11 selected Channel 12 ADC Channel12 selected ADC Channel 13 ADC Channel13 selected Channel 14 ADC Channel14 selected Channel 15 ADC Channel15 selected ADC Channel 16 ADC Channel16 selected ADC Channel 17 ADC Channel17 selected Channel 18 ADC Channel18 selected e Rank The rank in the regular group sequencer This parameter must be between 1 and 16 e ADC SampleTime The sample time value to be set for the selected channel This parameter can be one of the following values SampleTime Sample time equal to cycles SampleTime 15Cycles Sample time equal to 15 cycles SampleTime 28Cycles Sample time equal to 28 cycles SampleTime 56Cycles Sample time equal to 56 cycles SampleTime 84Cycles Sample time equal to 84 cycles ADC SampleTime 112Cycles Sample time equal to 112 cycles ADC SampleTime 144Cycles Sample time equal to 144 cycles SampleTime 480Cycles Sample time equal to 480 cycles Return values e None Notes e None DocID 18540 Rev 1 63 634 Analog to digital converter ADC UM1061 3 2 7 2 ADC_SoftwareStartConv Function Name void ADC_SoftwareStartConv ADC_TypeDef ADCx Function Description Enables the selected ADC software start conversion of the regular channels Pa
126. Clears the I2Cx s pending flags I2Cx where x be 1 2 or 3 to select the I2C peripheral I2C_FLAG specifies the flag to clear This parameter can be any combination of the following values 2 FLAG 5 SMBus Alert flag 2C_FLAG_TIMEOUT Timeout or Tlow error flag 2C FLAG PECERR PEC error in reception flag 2C FLAG Overrun Underrun flag Slave mode 2C FLAG Acknowledge failure flag 2C FLAG ARLO Arbitration lost flag Master mode 2C FLAG Bus error flag None STOPF STOP detection is cleared by software sequence a read operation to 12C SR1 register 2 GetFlagStatus followed by a write operation to 2 register 2 Cma to re enable the 2 peripheral ADD10 10 bit header sent is cleared by software sequence a read operation to 12 SR1 2 GetFlagStatus followed by writing the second byte of the address in DR register BTF Byte Transfer Finished is cleared by software sequence a read operation to I2C SH1 register I2C GetFlagStatus followed by a read write to l2C DR register 2 SendData ADDR Address sent is cleared by software sequence a read operation to 2 SR1 register l2C_GetFlagStatus followed by a read operation to 2 SRA register void I2Cx gt SR2 SB Start Bit is cleared software sequence a read operation to 2 SR1 register l12C_GetFlagStatus followed by a write
127. DMA_Stream_TypeDef 3 Stream TypeDefis defined the stm32f2xx h file and contains the DMA s stream registers definition Data Fields lO uint32_t CR lO uint32 t NDTR lO uint32 t PAR lO uint32 t MOAR JO uint32 t M1AR JlOuint32 t FCR Field Documentation e _ lOuint32 t DMA Stream TypeDef CR DMA stream x configuration register e _ JO uint32_t DMA_Stream_TypeDef NDTR DocID 18540 Rev 1 187 634 DMA controller UM1061 10 1 3 188 634 stream number data register JO uint32 t DMA_Stream_TypeDef PAR DMA stream x peripheral address register JO uint32 t DMA Stream TypeDef MOAR stream memory 0 address register JO uint32 t DMA Stream TypeDef M1AR stream memory 1 address register JO uint32 t DMA_Stream_TypeDef FCR DMA stream x FIFO control register InitTypeDef InitTypeDef is defined in the stm32f2xx dma h file and contains the DMA initialization parameters Data Fields uint32 t DMA Channel uint32 t DMA PeripheralBaseAddr uint32 t MemoryOBaseAddr uint32 t DMA DIR uint32 t DMA BufferSize uint32 t DMA Peripherallnc uint32 t DMA Memorylnc uint32 t DMA PeripheralDataSize uint32 t DMA MemoryDataSize uint32 t DMA Mode uint32 t DMA Priority uint32 t DMA FIFOMode uint32 t DMA FIFOThreshold uint32 t DMA MemoryBurst uint32 t DMA PeripheralBurst Field Documentation uint32 t DMA InitTypeDef DM
128. Data Fields e Ouint32_t BTCR Field Documentation e _ lOuint32 t FSMC_Bank1_TypeDetf BTCR 8 NOR PSRAM chip select control register BCR and chip select timing register BTR Address offset 0x00 1C FSMC_Bank1E_TypeDef FSMC_Bank1E_TypeDef is defined in the stm32f2xx h file and contains the FSMC Banki write timing registers definition Data Fields e JOuint32 t BWTR Field Documentation e 2 t FSMC Bank1E TypeDef BWTR 7 NOR PSRAM write timing registers Address offset 0x104 0x11C FSMC Bank2 TypeDef FSMC Bank2 TypeDet is defined in the stm32f2xx h file and contains the FSMC Bank2 configuration registers definition Data Fields 10 uint32 t PCR2 lO uint32 t SR2 IO uint32 t PMEM2 lO uint32 t PATT2 uint32 t RESERVEDO DocID 18540 Rev 1 4 UM1061 Flexible static memory controller FSMC e JOuint32 t ECCR2 Field Documentation _ 2 t FSMC Bank2 TypeDef PCR2 Flash control register 2 Address offset 0x60 e _ JO uint32_t FSMC Bank2 TypeDef SR2 NAND Flash FIFO status and interrupt register 2 Address offset 0x64 e _ JO uint32_t FSMC_Bank2_TypeDef PMEM2 Flash Common memory space timing register 2 Address offset 0x68 e _ JOuint32_t FSMC_Bank2_TypeDef PATT2 Flash Attribute memory space timing register 2 Address offset Ox6C e uint32 t FSMC_Bank2_TypeDef RESERVEDO Reserved 70 e _ 2 t FSMC Bank2
129. Description Set the specified RTC Alarm Parameters e RTC Format specifies the format of the returned parameters This parameter can be one of the following values RTC Format BIN Binary data format RTC Format BCD BCD data format RTC Alarm specifies the alarm to be configured This parameter can be one of the following values Alarm to select Alarm RTC Alarm to select Alarm B DoclD 18540 Rev 1 431 634 Real time clock RTC UM1061 Return values Notes 21 2 13 2 RTC AlarmStructlnit Function Name Function Description Parameters Return values Notes 21 2 13 3 GetAlarm Function Name Function Description Parameters 432 634 RTC AlarmStruct pointer to AlarmTypeDef structure that contains the alarm configuration parameters None e The Alarm register can only be written when the corresponding Alarm is disabled Use the RTC_AlarmCmd DISABLE void RTC AlarmStructlnit RTC_AlarmTypeDef RTC AlarmStruct Fils each RTC AlarmStruct member with its default value Time 00h 00mn 00sec Date 1st day of the month Mask all fields are masked e RTC AlarmStruct pointer to a AlarmTypeDef structure which will be initialized None None void RTC GetAlarm uint32 t RTC Format uint32 t RTC Alarm RTC AlarmTypeDef AlarmStruct Get the RTC Alarm value and masks e RTC Format specifies the for
130. Enable The DMA controller clock using RCC_AHB1PeriphResetCmd RCC_AHB1Periph_DMA1 ENABLE function for DMA1 or using RCC AHB1PeriphResetCmd RCC AHB1Periph DMA2 ENABLE function for DMA2 Enable and configure the peripheral to be connected to the DMA Stream except for internal SRAM FLASH memories no initialization is necessary For a given Stream program the required configuration through following parameters Source and Destination addresses Transfer Direction Transfer size Source and Destination data formats Circular or Normal mode Stream Priority level Source and Destination Incrementation mode FIFO mode and its Threshold if needed Burst DocID 18540 Rev 1 189 634 DMA controller DMA UM1061 mode for Source and or Destination if needed using the Init function To avoid filling un nesecessary fields you can call Structlnit function to initialize a given structure with default values reset values the modify only necessary fields ie Source and Destination addresses Transfer size and Data Formats Enable the NVIC and the corresponding interrupt s using the function ITConfig if you need to use DMA interrupts Optionally if the Circular mode is enabled you can use the Double buffer mode by configuring the second Memory address and the first Memory to be used through the function DMA DoubleBufferModeConfig Then enable the Double buffer mode through the function DMA DoubleBufferModeCmd
131. Error CAN_ERRORCODE_BitDominantErr Bit Dominant Error CAN ERHRORCODE CRCErr CRC Error ERRORCODE SoftwareSetErr Software Set Error Notes None CAN GetReceiveErrorCounter Function Name uint8_t CAN GetReceiveErrorCounter CAN TypeDef CANx Function Description Returns the Receive Error Counter REC Parameters where x can be 1 or 2 to to select the CAN peripheral Return values CAN Receive Error Counter Notes e In case of an error during reception this counter is incremented by 1 or by 8 depending on the error condition as defined by the CAN standard After every successful reception the counter is decremented by 1 or reset to 120 if its value was higher than 128 When the counter value exceeds 127 the CAN controller enters the error passive state CAN GetLSBTransmitErrorCounter Function Name uint8 t CAN GetLSBTransmitErrorCounter CAN TypeDef Function Description Returns the LSB of the 9 bit CANY Transmit Error Counter TEC Parameters e where x be 1 or 2 to to select the CAN peripheral Return values LSB of the 9 bit CAN Transmit Error Counter Notes e None DoclD 18540 Rev 1 107 634 Controller area network CAN UM1061 4 2 9 4 2 9 1 4 2 9 2 108 634 Interrupt and flag management functions Function Name void CAN_TypeDef uint32_t CAN FunctionalState New
132. FLAG 4 TIM Capture Compare 4 Flag TIM FLAG COM TIM Commutation Flag TIM FLAG Trigger TIM Trigger Flag FLAG Break TIM Break Flag FLAG CC10OF Capture Compare 1 over capture Flag FLAG CC20F TIM Capture Compare 2 over capture Flag TIM FLAG TIM Capture Compare 3 over capture Flag TIM FLAG CC4OF TIM Capture Compare 4 over capture Flag The new state of TIM FLAG SET or RESET TIM6 and TIM7 can have only one update flag TIM FLAG COM and TIM FLAG Break are used only with TIM1 and TIM8 void ClearFlag TypeDef TIMx uint16 t TIM FLAG Clears the TIMx s pending flags TIMx where x can be 1 to 14 to select the TIM peripheral TIM FLAG specifies the flag bit to clear This parameter can be any combination of the following values TIM FLAG Update TIM update Flag TIM FLAG CCT TIM Capture Compare 1 Flag TIM FLAG 2 TIM Capture Compare 2 Flag TIM FLAG TIM Capture Compare Flag TIM FLAG 4 TIM Capture Compare 4 Flag TIM FLAG COM TIM Commutation Flag FLAG Trigger TIM Trigger Flag FLAG Break TIM Break Flag FLAG CC10OF Capture Compare 1 over capture Flag FLAG 2 Capture Compare 2 over capture Flag TIM FLAG TIM Capture Compare 3 over capture Flag DocID 18540 Rev 1 557 634 General purpose timers TIM UM1061 FLAG CC
133. FLAG RXDAVL uint32 1 0x00200000 SDIO FLAG SDIOIT uint32 1 0 00400000 SDIO FLAG CEATAEND uint32 1 0 00800000 SDIO Hardware Flow Control e didefine e didefine SDIO HardwareFlowControl Disable uint32 1 0x00000000 SDIO HardwareFlowControl Enable uint32 1 0x00004000 SDIO Interrupt sources e didefine e didefine SDIO IT CCRCFAIL uint32 1 0 00000001 SDIO IT DCRCFAIL uint32 t 0x00000002 DocID 18540 Rev 1 475 634 Secure digital input output interface SDIO UM1061 476 634 define define define define define define define define define define define define SDIO IT CTIMEOUT uint32 1 0 00000004 SDIO_IT_DTIMEOUT uint32_t 0x00000008 SDIO IT TXUNDERR uint32 1 0x00000010 SDIO IT RXOVERR uint32 1 0x00000020 SDIO CMDREND uint32 1 0 00000040 SDIO IT CMDSENT uint32 1 0 00000080 SDIO DATAEND uint32 t 0x00000100 SDIO IT STBITERR uint32 1 0 00000200 SDIO IT DBCKEND uint32 1 0 00000400 SDIO IT CMDACT uint32 1 0x00000800 SDIO IT TXACT uint32 t 0x00001000 SDIO IT RXACT uint32 1 0 00002000 DocID 18540 Rev 1 4 UM1061 Secure digital input output interface SDIO e define e define e define e define e define e define e define e define e define e define SDIO IT TXFIFOHE uint32 1 0x00004000 SDIO IT RXFIFOHF uint32 1 0 00008000 SDIO
134. Function Name Function Description Parameters Return values Notes trigger is received first request void DAC ClearFlag uint32 t DAC Channel uint32 t DAC FLAG Clears the DAC channel s pending flags DAC Channel The selected DAC channel This parameter can be one of the following values DAC Channel 1 DAC Channeli selected DAC Channel 2 DAC Channel2 selected DAC FLAG specifies the flag to clear This parameter can be of the following value DAC FLAG DMAUDR underrun flag None The DMA underrun occurs when a second external trigger arrives before the acknowledgement for the first external trigger is received first request ITStatus DAC GetlTStatus uint32 t DAC Channel uint32 t DAC IT Checks whether the specified DAC interrupt has occurred or not DAC Channel The selected DAC channel This parameter can be one of the following values DAC Channel 1 DAC Channeli selected DAC Channel 2 DAC Channel2 selected DAC specifies the DAC interrupt source to check This parameter can be the following values IT DMAUDR DMA underrun interrupt mask The new state of DAC IT SET or RESET The DMA underrun occurs when a second external trigger arrives before the acknowledgement for the first external trigger is received first request DoclD 18540 Rev 1 4 UM1061 Digital to analog converter DAC 7 2 8 5 DAC_ClearlTPendingBit Function Name void DA
135. GetlTStatus followed by a read operation to 2 SR2 register void I2Cx gt SR2 e SB Start Bit is cleared by software sequence a read operation to I2C SR1 register I2C GetlTStatus followed by a write operation to 12 DR register I2C_SendData 12C Firmware driver defines 2 Firmware driver defines 2 2 acknowledged address e define 2 AcknowledgedAddress 7bit uint16 1 0x4000 e define 2 AcknowledgedAddress 10bit uint16 0 000 I2C acknowledgement e didefine 2 Enable uint16 t 0x0400 e didefine 2 Disable uint16 1 0x0000 I2C duty cycle in fast mode e define 2 DutyCycle 16 9 uint16 t 0x4000 I2C fast mode Tlow Thigh 16 9 e define I2C DutyCycle 2 uint18 t JOXBFFF DocID 18540 Rev 1 329 634 Inter integrated circuit interface 12C UM1061 330 634 I2C fast mode Tlow Thigh 2 I2C Events e define 2 EVENT MASTER MODE SELECT uint32 1 0x00030001 Communication start e didefine I2C EVENT MASTER TRANSMITTER MODE SELECTED uint32 t 0x00070082 After checking on EV5 start condition correctly released on the bus the master sends the address of the slave s with which it will communicate I2C Send7bitAdaress function it also determines the direction of the communication Master transmitter or Receiver Then the master has to wait that a slave acknowledges his address If an acknowledge is sent on the bus one of the
136. Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com 634 634 DocID 18540 Rev 1 4
137. IC2Polarity Function Description Configures the TIMx Encoder Interface Parameters e e Return values e Notes TIMx where x be 1 2 3 4 5 8 9 or 12 to select the TIM peripheral TIM_EncoderMode specifies the TIMx Encoder Mode This parameter can be one of the following values EncoderMode Counter counts on TI1FP1 edge depending on TI2FP2 level EncoderMode TI2 Counter counts on 2 2 edge depending on TI1FP1 level EncoderMode TI12 Counter counts both and TI2FP2 edges depending on the level of the other input TIM IC1Polarity specifies the IC1 Polarity This parameter can be one of the following values ICPolarity Falling Falling edge ICPolarity Rising Rising edge TIM IC2Polarity specifies the IC2 Polarity This parameter can be one of the following values ICPolarity Falling Falling edge TIM ICPolarity Rising Rising edge None None DocID 18540 Rev 1 4 UM1061 General purpose timers TIM 25 2 16 2 SelectHallSensor 25 2 17 25 2 17 1 4 Function Name Function Description Parameters Return values Notes void TIM SelectHallSensor TIM TypeDef TIMx FunctionalState NewState Enables or disables the TIMx s Hall sensor interface TIMx where x can be 1 2 3 4 5 8 9 12 to select the TIM peripheral NewState
138. Mode SlaveRx uint16 1 0x0100 125 Mode MasterTx uint16 1 0x0200 25 Mode MasterRx uint16 t 0x0300 SPI I2S Standard e define e define e define e define e define SPI mode e define I2S Standard Phillips uint16 1 0 0000 125 Standard MSB uint16 t 0x0010 125 Standard LSB uint16 1 0x0020 125 Standard PCMShort uint16 t 0x0030 25 Standard PCMLong uint16 1 0 00 0 SPI Mode Master uint16 1 0x0104 DocID 18540 Rev 1 4 UM1061 Serial peripheral interface SPI 23 4 4 e didefine SPI Mode Slave uint16 t 0x0000 SPI MSB LSB transmission e didefine SPI FirstBit MSB uint16 1 0 0000 e iidefine SPI FirstBit LSB uint18 t 0x0080 SPI NSS internal software management e define SPI NSSInternalSoft Set uint16 t 0x0100 e define SPI NSSInternalSoft Reset uint16 t OXFEFF SPI Slave Select management e define SPI NSS Soft uint16 1 0 0200 e define SPI NSS Hard uint16 1 0 0000 SPI Programming Example The example below explains how to initialize the SPI and associated resources in Master mode with NSS managed by software and send continuously 8 bit data For more examples about SPI configuration and usage please refer to the SPI examples provided within the STM32F2 Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples SPI In DL include stm32f2xx h PEIVAEG prototypes
139. Name ErrorStatus RTC_WakeUpCmd FunctionalState NewState Function Description Enables or Disables the RTC WakeUp timer Parameters e NewState new state of the WakeUp timer This parameter can be ENABLE or DISABLE Return values e None Notes e None 21 2 15 Daylight Saving configuration functions 21 2 15 1 RTC DayLightSavingConfig Function Name void RTC DayLightSavingConfig uint32 t RTC DayLightSaving uint32 t RTC StoreOperation Function Description Adds or substract one hour from the current time Parameters e RTC DayLightSaveOperation the value of hour adjustment This parameter can be one of the following values DayLightiSaving SUB1H Substract one hour winter time DayLightSaving ADD1H Add one hour summer time RTC StoreOperation Specifies the value to be written in the BCK bit in CR register to store the operation This parameter can be one of the following values StoreOperation Reset Bit Reset StoreOperation Set Bit Set Return values e None Notes e None 21 2 15 2 RTC GetStoreOperation 3 Function uint32_t RTC_GetStoreOperation void Function Description Returns the RTC Day Light Saving stored operation Parameters e None DocID 18540 Rev 1 435 634 Real time clock RTC UM1061 21 2 16 21 2 16 1 21 2 17 21 2 17 1 436 634 Return values Notes RTC Day Light Saving stored operation StoreOpe
140. Notes e Since teh DMA transfer is stopped in CRYP_SaveContext function after restoring the context you have to enable the DMA again if the DMA was previously used e data that were saved during context saving must be rewrited into the IN FIFO DociD 18540 Rev 1 139 634 Cryptographic processor CRYP UM1061 6 2 8 CRYPTO interface Configuration function 6 2 8 1 CRYP_DMACmd Function Name void CRYP DMACmd uint8 t CRYP DMAReq FunctionalState NewState Function Description Enables or disables the CRYP DMA interface Parameters e DMAReq specifies the CRYP DMA transfer request to be enabled or disabled This parameter can be any combination of the following values CHYP DataOUT DMA for outgoing Tx data transfer CRYP DMAReq DatalN DMA for incoming Rx data transfer e NewState new state of the selected CRYP DMA transfer request This parameter can be ENABLE or DISABLE Return values e None Notes e None 6 2 9 Interrupt and flag management functions 6 2 9 1 CRYP Function Name void CRYP ITConfig uint8 t CRYP IT FunctionalState NewState Function Description Enables or disables the specified CRYP interrupts Parameters specifies the CRYP interrupt source to be enabled or disabled This parameter can be any combination of the following values IT Input FIFO interrupt IT Output FIFO int
141. Output Compare active low Return values None Notes None TIM_OC3PolarityConfig Function Name void TIM OC3PolarityConfig TypeDef TIMx uint16_t TIM_OCPolarity Function Description Configures the TIMx channel 3 polarity Parameters e TIMx where x be 1 2 3 4 5 or 8 to select the TIM peripheral e TIM OCPolarity specifies the Polarity This parameter can be one of the following values TIM OCPolarity High Output Compare active high TIM OCPolarity Low Output Compare active low Return values None Notes None DociD 18540 Rev 1 4 UM1061 General purpose timers TIM 25 2 10 32 TIM_OC3NPolarityConfig Function Name Function Description Parameters Return values Notes void TIM OC3NPolarityConfig TIM TypeDef uint16_t TIM OCNPolarity Configures the TIMx Channel 3N polarity e TIMx where x can be 1 or 8 to select the TIM peripheral e TIM OCNPolarity specifies the OC3N Polarity This parameter can be one of the following values TIM OCNPolarity High Output Compare active high TIM OCNPolarity Low Output Compare active low 25 2 10 33 TIM_OC4PolarityConfig Function Description Parameters Return values Notes 25 2 10 34 TIM_CCxCmd Function Name Function Description void TIM_OC4PolarityConfig TIM TypeDef uint16 t TIM OCPolarity Con
142. Reset and clock control RCC UM1061 19 2 8 11 19 2 8 12 378 634 Return values Notes NewState new state of the specified peripheral reset This parameter can be ENABLE or DISABLE None None RCC_AHB2PeriphResetCmd Function Name void RCC_AHB2PeriphResetCmd uint32 t 2 FunctionalState NewState Function Description Forces or releases AHB2 peripheral reset Parameters e e Return values Notes RCC_AHB2Periph specifies the AHB2 peripheral to reset This parameter can be any combination of the following values AHB2Periph DCMI DCMI clock AHB2Periph CRYP CRYP clock 2 HASH HASH clock RCC AHB2Periph RNG RNG clock AHB2Periph OTG FS USB FS clock NewState new state of the specified peripheral reset This parameter can be ENABLE or DISABLE None None RCC AHBS3PeriphResetCmd Function Name void RCC AHB3PeriphResetCmd uint32 t FunctionalState NewState Function Description Forces or releases AHB3 peripheral reset Parameters e e Return values Notes specifies the AHB3 peripheral to reset This parameter must be RCC_AHB3Periph_FSMC NewState new state of the specified peripheral reset This parameter can be ENABLE or DISABLE None None DoclID 18540 Rev 1 4 UM1061 Reset and clock control RCC
143. Rev 1 215 634 DMA controller DMA UM1061 define 1 DR ADDRESS uint32 t 0x4001204C t ZDCComwesrtesWelwues 0 DWA ImiitypeDet DMA L n ie STE UE Enable DMA2 s interface clock AHBlPeriphClockCmd RCC AHBlPeriph DMA2 ENABLE Configure DMA2 StreamO0 10 to transfer in circular mode the converted data from ADC1 DR register to the ADCConvertedValue variable DMA InitStruct DMA Channel DMA Channel 0 InitStruct DMA PeripheralBaseAddr ADC1 DR ADDRESS InitStruct DMA Memory0BaseAddr uint32 t amp ADCConvertedValue DMA InitStruct DMA DIR DMA DIR PeripheralToMemory DMA Exe E DMA BurieeSize 1p DMA Initstruct DMA PeripheralIne DMA PeripherealIne Disabler InitStruct DMA MemoryInc DMA MemoryInc Disable DMA Exe DMA PeripherelDatasize DMA PeripheralDataSize HalfWord InitStruct DMA MemoryDataSize DMA MemoryDataSize HalfWord DMA JosubESEx Uie E DMA Mode DMA Moce Circulery DMA Imitstruct DMA Priority DNA Priority mii InitStruct DMA FIFOMode DMA FIFOMode Disable DMA logub SEE DMA inona DMA Blader DMA InitStruct MemoryBurst MemoryBurst Single DMA Initstruct DMA Peripherealburst DMA Peripherelburst Simglep Init DMA2 Stream0 amp DMA InitStruct 9 Enable DM
144. STM32F2xx Standard Peripherals Driver CMSIS Layers Core Peripheral Access Layer 4 STM32F2xx Device Peripheral Access Layer Hardware STM32F2xx MCU HAL HAL is a Hardware Abstraction Layer HAL that allows controlling the different STM32F2xx device s registers and features e CMSIS layer Core Peripheral Access Layer contains name definitions address definitions and helper functions to access core registers and peripherals It defines also a device independent interface for RTOS Kernels that includes debug channel definitions STMS32F2xx Device Peripheral Access Layer provides definitions for all the peripheral register s definitions bits definitions and memory mapping for STMS2F2xx devices STM32F2xx standard peripheral driver that provides drivers and header files for all the peripherals It uses CMSIS layer to access STM32F2xx registers 2 I E a 7 9 un BSP BSP is a board specific package BSP that implements an abstraction layer to interact with the Human Interface resources buttons LEDs LCD and COM ports USARTs available on STMicroelectronics evaluation boards A common API is provided to manage these different resources and can be easily tailored to support any other development board by just adapting the initialization routine DoclD 18540 Rev 1 27 634 STM32F2xx Standard Peripheral Library UM1061 Application layer The application layer consists of a set of
145. TDES ECB TDES CBC DES ECB DES CBC AES ECB AES CBC AES CTR AES Key This parameter can be a value of CRYP_Algorithm_Mode uint16_t CRYP_InitTypeDef CRYP_DataType 32 bit data 16 bit data bit data or bit string This parameter can be a value of CRYP_Data_Type uint16_t CRYP_InitTypeDef CRYP_KeySize DoclD 18540 Rev 1 IT UM1061 Cryptographic processor CRYP 6 1 4 Used only in AES mode only 128 192 or 256 bit key length This parameter can be a value of CRYP_Key_Size_for_AES_only CRYP KeylnitTypeDef CRYP KeylnitTypeDef is defined in the stm32f2xx cryp h file and contains the CRYP keys initialization parameters Data Fields uint32 t KeyOLeft uint32 t CRYP KeyORight uint32 t CRYP_Key1Left uint32 t CRYP_Key1Right uint32 t Key2Left uint32 t CRYP Key2Right uint32 t CRYP_Key3Left uint32 t CRYP_Key3Right Field Documentation uint32 t CRYP KeylnitTypeDef Key 0 Left uint32 t CRYP KeylnitTypeDef Key 0 Right uint32 t CRYP KeylnitTypeDef Key 1 left uint32 t CRYP KeylnitTypeDef Key 1 Right uint32 t CRYP KeylnitTypeDef Key 2 left uint32 t CRYP KeylnitTypeDef Key 2 Right uint32 t CRYP KeylnitTypeDef Key 3 left uint32 t CRYP KeylnitTypeDef Key 3 Right CRYP CRYP_IVinitTypeDef is defined in the stm32f2xx_cryp h file and contains the CRYP initialization Vectors IV Data Fields ui
146. TXFIFOF uint32 t 0x00010000 SDIO IT RXFIFOF uint32 t 0x00020000 SDIO IT TXFIFOE uint32 1 0x00040000 SDIO IT RXFIFOE uint32 1 0 00080000 SDIO IT TXDAVL uint32 1 0 00100000 SDIO RXDAVL uint32 1 0 00200000 SDIO IT SDIOIT uint32 1 0x00400000 SDIO IT CEATAEND uint32 1 0x00800000 SDIO Power State e didefine e didefine 3 SDIO_PowerSiate_OFF uint32_t 0x00000000 SDIO PowerState ON uint32 1 0x00000003 DoclID 18540 Rev 1 477 634 Secure digital input output interface SDIO UM1061 478 634 SDIO Read Wait Mode e define SDIO ReadWaitMode CLK uint32 t 0x00000000 e define SDIO ReadWaitMode DATA2 uint32 1 0x00000001 SDIO Response Registers define SDIO RESP1 uint32 1 0 00000000 e define SDIO RESP2 uint32 t 0x00000004 e define SDIO RESP3 uint32 t 0x00000008 e SDIO RESP4 uint32 1 0 0000000 SDIO Response Type e define SDIO Response No uint32 0 00000000 e SDIO Response Shori uint32 t 0x00000040 e define SDIO Response Long uint32 1 0 000000 0 SDIO Transfer Direction e didefine SDIO TransferDir ToCard uint32 t 0x00000000 DocID 18540 Rev 1 4 UM1061 Secure digital input output interface SDIO 22 4 4 e define SDIO TransferDir ToSDlO uint32 t 0x00000002 SDIO Transfer Type e didefine SDIO TransferMode Block uint32 1 0x00000000 e didefine SDIO TransferMode Stream uint
147. This parameter can be one of the following values IT TME Transmit mailbox empty Interrupt IT FIFO 0 full Interrupt CAN IT FOVO FIFO 0 overrun Interrupt IT FF1 FIFO 1 full Interrupt CAN IT FOVT FIFO 1 overrun Interrupt IT Wake up Interrupt DocID 18540 Rev 1 UM1061 Controller area network CAN 4 3 4 3 1 3 SLK Sleep acknowledge Interrupt EWG Error warning Interrupt Error passive Interrupt IT BOF Bus off Interrupt CAN IT LEC Last error code Interrupt CAN IT ERR Error Interrupt Return values e None Notes CAN Firmware driver defines CAN Firmware driver defines CAN Error Code constants e didefine CAN_ErrorCode_NoErr uint8_t Ox00 No Error e define CAN ErrorCode StuffErr uint8 1 0x10 Stuff Error e define CAN ErrorCode FormErr uint8 t 0x20 Form Error e didefine CAN ErrorCode ACKErr uint8 1 0 30 Acknowledgment Error e didefine CAN ErrorCode BitRecessiveErr uint8 1 0 40 Bit Recessive Error e didefine CAN ErrorCode BitDominantErr uint8 1 0x50 Bit Dominant Error e didefine CAN ErrorCode CRCErr uint8 1 0 60 CRC Error e define CAN ErrorCode SoftwareSetErr uint8 t 0x70 DocID 18540 Rev 1 111 634 Controller area network CAN UM1061 112 634 Software Set Error CAN
148. TypeDef CWSTRTH crop window start Address offset 0x20 IO uint32 t DCMI TypeDef CWSIZER crop window size Address offset 0x24 IO uint32 t DCMI TypeDef DR DCMI data register Address offset 0x28 DocID 18540 Rev 1 173 634 Digital camera interface UM1061 9 1 2 174 634 DCMI InitTypeDef DCMI InitTypeDef is defined in the stm32f2xx dcmi h file and contains the DCMI common initialization parameters Data Fields uint18 t DCMI CaptureMode uint18 t DCMI SynchroMode uint18 t DCMI PCKPolarity uint18 t DCMI VSPolarity uint16_t DCMI HSPolarity uint18 t DCMI CaptureRate uint18 t DCMI ExtendedDataMode Field Documentation e Uuint16 t DCMI InitTypeDef DCMI CaptureMode Specifies the Capture Mode Continuous or Snapshot This parameter can be a value of DCMI Capture Mode e uint16 t DCMI InitTypeDef DCMI SynchroMode Specifies the Synchronization Mode Hardware or Embedded This parameter be a value of DCMI_Synchronization_Mode e Uuint16 t DCMI_InitTypeDef DCMI_PCKPolarity Specifies the Pixel clock polarity Falling or Rising This parameter be a value DCMI_PIXCK_Polarity e uint16 t DCMI InitTypeDef DCMI VSPolarity Specifies the Vertical synchronization polarity High or Low This parameter can be a value of VSYNC Polarity e Uuint16 t DCMI InitTypeDef DCMI HSPolarity Specifies the Horizontal synchronization polarity High or Low This parameter
149. TypeDef ECCR2 NAND Flash ECC result registers 2 Address offset 0x74 13 1 4 FSMC Bank3 TypeDef FSMC Bank3 TypeDetf is defined in the stm32f2xx h file and contains the FSMC Bank3 configuration registers definition Data Fields JO uint32 t PCR3 lO uint32 t SR3 10 uint32 t PMEM3 lO uint32 t PATT3 uint32 t RESERVEDO 10 uint32 t ECCR3 Field Documentation e _ 2 t FSMC_Bank3_TypeDef PCR3 NAND Flash control register 3 Address offset 0x80 e _ JlOuint32 t FSMC_Bank3_TypeDef SR3 NAND Flash FIFO status and interrupt register 3 Address offset 0x84 e _ JO uint32_t FSMC_Bank3_TypeDef PMEM3 Flash Common memory space timing register 3 Address offset 0x88 e _ lOuint32 t FSMC_Bank3_TypeDef PATT3 Flash Attribute memory space timing register 3 Address offset 0 8 e uint32 t FSMC_Bank3_TypeDef RESERVEDO Reserved 90 _ 2 t FSMC Bank3 TypeDef ECCRS3 NAND Flash ECC result registers 3 Address offset 0 94 3 DocID 18540 Rev 1 251 634 Flerible static memory controller FSMC UM1061 13 1 5 13 1 6 252 634 FSMC Bank4 TypeDef FSMC Bank4 TypeDefis defined in the stm32f2xx h file and contains the FSMC Bank4 configuration registers definition Data Fields 10 uint32 t PCR4 lO uint32 t SR4 IO uint32 t PMEM4 lO uint32 t PATT4 10 uint32 t PIO4 Field Documentation JO uint32 t FSMC_Bank4_TypeDef PCR4
150. TypeDef SQR3 ADC regular sequence register 3 Address offset 0x34 IO uint32 t ADC TypeDef JSQR ADC injected sequence register Address offset 0x38 IO uint32 t ADC_TypeDef JDR1 ADC injected data register 1 Address offset IO uint32 t ADC TypeDef JDR2 ADC injected data register 2 Address offset 0x40 IO uint32 t ADC TypeDef JDR3 ADC injected data register 3 Address offset 0x44 IO uint32 t ADC TypeDef JDR4 ADC injected data register 4 Address offset 0x48 IO uint32 t ADC TypeDef DR ADC regular data register Address offset OxAC Common TypeDef ADC Common TypebDef is defined in the stm32f2xx h file and contains the ADC common registers definition Data Fields IO uint32 t CSR IO uint32 t CCR IO uint32 t CDR Field Documentation 3 IO uint32 t ADC Common TypeDef CSR ADC Common status register Address offset ADC1 base address 4 0x300 IO uint32 t ADC Common TypeDeft CCR ADC common control register Address offset ADC1 base address 0x304 IO uint32 t ADC Common TypeDeft CDR ADC common regular data register for dual AND triple modes Address offset ADC1 base address 0x308 DocID 18540 Rev 1 51 634 Analog to digital converter ADC UM1061 3 1 3 52 634 ADC_InitTypeDef ADC_InitTypeDet is defined in the stm32f2xx_adc h file and contains the ADC initialization parameters This structure is passed as parameter to ADC_Init function Data Fields uint32_t ADC_Resolution Functi
151. UM1061 Reset and clock control RCC 3 define define define define define define define define define define define define RTCCLKSource HSE 14 2 1 0 000 0300 RCC_RTCCLKSource_HSE_Div15 uint32_t Ox000F0300 RCC_RTCCLKSource_HSE_Div16 uint32_t 0x00100300 RCC_RTCCLKSource_HSE_Div17 uint32_t 0x001 10300 RCC_RTCCLKSource_HSE_Div18 uint32_t 0x00120300 RCC_RTCCLKSource_HSE_Div19 uint32_t 0x00130300 RCC RTCCLKSource HSE Div20 uint32 t 0x00140300 RCC RTCCLKSource HSE Div21 uint32 t 0x00150300 RCC RTCCLKSource HSE Div22 uint32 1 0 00160300 RTCCLKSource HSE Div23 uint32 1 0 00170300 RCC RTCCLKSource HSE Div24 uint32 t 0x00180300 RCC RTCCLKSource HSE Div25 uint32 t 0x00190300 DoclID 18540 Rev 1 399 634 Reset and clock control RCC UM1061 19 4 400 634 e e define e define e define e define e define RCC_RTCCLKSource_HSE_Div26 uint32_t 0x001A0300 RCC RTCCLKSource HSE Div27 uint32 t 0x001B0300 RCC RTCCLKSource HSE Div28 uint32 1 0 001 0300 RCC RTCCLKSource HSE Div29 uint32 1 0 00100300 RCC RTCCLKSource HSE DivS30 uint32 t 0x001E0300 RTCCLKSource HSE Div31 uint32 1 0 001 0300 RCC System Clock Source e define e define e define SYSCLKSource HSl uint32 1 0x00000000 RCC SYSCLKSource HSE uint32 1 0x00000001
152. USART InitS USART InitSt LIED IEIBUEGS USART Word Length USART WordLength 8b USART StopBits USART StopBits 1 USART Parii USART HardwareFlowControl None USA USA USART InitS Cie UCI UES RT Init USART3 RT Cmd USART3 Enable USART3 USART Mode ENABLE DoclD 18540 Rev 1 USAR USART HardwareFlowControl USART Mode Rx USART Model Tx amp USART InitStructure UM1061 Window watchdog WWDG 27 27 1 27 1 1 27 2 3 Window WWDG WWDG Firmware driver registers structures WWDG_TypeDef WWDG TypebDet is defined in the stm32f2xx h file and contains the WWDG registers definition Data Fields e 2 t CR e 32 t CFR e JlOuint32 t SR Field Documentation e _ JOuint32 t WWDG TypeDef CR WWDG Control register Address offset 0x00 e JOuint32_t WWDG TypeDef CFR WWDG Configuration register Address offset 0x04 e _ JOuint32 t WWDG TypeDef SR J WWDG Status register Address offset 0x08 WWDG Firmware driver API description The following section lists the various functions of the WWDG library WWDG features Once enabled the WWDG generates a system reset on expiry of a programmed time period unless the program refreshes the counter downcounter before to reach Ox3F valu
153. Wrap Mode e define FSMC WrapMode Disable uint32 1 0x00000000 e define FSMC WrapMode Enable uint32 1 0x00000400 FSMC Write Burst e didefine FSMC WriteBurst Disable uint32 1 0x00000000 e didefine FSMC WriteBurst Enable uint32 1 0x00080000 FSMC Write Operation e define FSMC WriteOperation Disable uint32 1 0 00000000 e define FSMC WriteOperation Enable uint32 1 0x00001000 DoclID 18540 Rev 1 4 UM1061 Flexible static memory controller FSMC 13 4 FSMC Programming Example The example below explains how to configure the FSMC to interface with an external SRAM connected to Bank1_SRAM2 Bank For more examples about FSMC configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples FSMC FSMC NORSRAMInitTypeDef SRAMInits FSMC NORSRAMTimingInitTypeDef p Enable FSMC clock RCC AHB3PeriphClockCmd RCC AHB3Periph FSMC ENABLE FSMC Configuration ck ck ckck ckck ck ck ckck ckck ck ck ckck ck ck ck ck ckck ck ok ck ke k SD AckdzessSecuplime 0p PB 07 p FSMC DataSetupTime 4 p FSMC BusTurnAroundDuration 1 DI SIC p Datalkateney 0 Oo ACCessMode Ap SRAMInitS
154. as an EXTI line an I O in input mode for example PG6 to be GPIO GPIO Tin Ie She ace Ice Enable GPIOG s interface clock AHBlPeriphClockCmd RCC AHBlPeriph GPIOG GPIlO_ImveStxeumetuce PLlO_ Pim GPIO InitStructure GPIO Mode PURE GPIO Analog mode The below shows how to configu used as ADC input DAC output ENABLE GPIO Pin 5 GPIO Mode GPIO PuPd NOPULL Iob an I O in analog mode for example PA4 to be GPIO wee GPIO Tmitgtructure Enable GPIOA s AHB interface clock AHBlPeriphClockCmd RCC AHBlPeriph GPIOA GPIO GPIO Pim GPIO InitStructure GPIO Mode GPIOA Alternate function mode The below shows how to configu GPIO InitIypeDet GPIO Tmiicsic ENABLE GEUO Jum dip GPTO Mode GPIO PuPd NOPULL GIL Im TITUS p re USART2 Tx Rx I Os on PD5 PD6 pins ructure Enable GPIOD s AHB interface clock 2818 Nani Connect PDS to USART Tx 2100 ce Configure USART Tz and US Ene Pim GPIO ImicSiceumcctuze GPIO Moe i
155. below 1 Configure the I O in input mode using GPIO 2 Select the input source pin for the EXTI line using SYSCFG EXTILineConfig 3 Select the mode interrupt event and configure the trigger selection Rising falling or both using Init 4 Configure IRQ channel mapped to the EXTI line using NVIC Init registers using 5 RCC APB2PeriphClockCmd RCC APB2Periph SYSCFG SYSCFG clock must be enabled to get write access to SYSCFG_EXTICRx ENABLE Initialization and configuration e EXTI Delnit EXTI Init Structinit DocID 18540 Rev 1 UM1061 External interrupt event controller 11 2 4 11 2 5 11 2 5 1 11 2 5 2 11 2 5 3 3 e GenerateSWinterrupt Interrupt flag management EXTI GetFlagStatus EXTI ClearFlag EXTI GetlTStatus ClearlTPendingBit Initialization and configuration functions EXTI Delnit Function Name Function Description Parameters Return values Notes EXTI Init Function Name Function Description Parameters Return values Notes EXTI Structlnit void EXTI Delnit void Deinitializes the EXTI peripheral registers to their default reset values void EXTI Init InitTypeDef InitStruct Initializes the peripheral according to the specified parameters in the EXTI InitStruct e EXT
156. can be one of the following configurations 1 bit data length SDIO SDIO CK and DO A 4 bi 8 bit data length SDIO CMD SDIO CK and D 7 0 t data length SDIO CMD SDIO CK and D 3 0 8 bit data length SDIO CMD SDIO CK and 0 7 0 4 Peripheral s alternate function 18540 Rev 1 UM1061 Secure digital input output interface SDIO Connect the pin to the desired peripherals Alternate Function AF using GPIO_PinAFConfig function Configure the desired pin in alternate function by GPIO_InitStruct gt GPIO_Mode GPIO_Mode_AF Select the type pull up pull down and output speed via GPIO PuPd GPIO GPIO Speed members Call GPIO Init function 5 Program the Clock Edge Clock Bypass Clock Power Save Bus Wide hardware flow control and the Clock Divider using the SDIO_Init function Enable the Power ON State using the SDIO SetPowerState SDIO PowerState ON function Enable the clock using the SDIO_ClockCmd function Enable the NVIC and the corresponding interrupt using the function SDIO ITConfig if you need to use interrupt mode When using the DMA mode Configure the DMA using DMA Init function Activate the needed channel Request using SDIO_DMACmd function Enable the DMA using the DMA_Cmd function when using DMA mode To control the CPSM Command Path State Machine and send commands to the card use the SDIO SendCommand SDIO_GetCommandR
157. clock is used as source clock for the 125 then the and set to the value of the source clock frequency in Hz In SPI mode To use the SPI TI mode call the function SPI just after calling the function SPI_Init Initialization and configuration This section provides a set of functions allowing to initialize the SPI Direction SPI Mode SPI Data Size SPI Polarity SPI Phase SPI NSS Management SPI Baud Rate Prescaler SPI First Bit and SPI CRC Polynomial SPI Init function follows the SPI configuration procedures for Master mode and Slave mode details for these procedures are available in reference manual 0033 SPI 128 Delnit SPI Init I2S Init SPI_Structinit I2S Structinit SPI 25 SPI DataSizeConfig SPI BiDirectionalLineConfig SPI NSSInternalSoftwareConfig SPI SSOutputCmd SPI TiModeCmd Data transfers This section provides a set of functions allowing to manage the SPI data transfers In reception data are received and then stored into an internal Rx buffer while In transmission data are first stored into an internal Tx buffer before being transmitted The read access of the SPI DR register can be done using the SPI 125 ReceiveData function and returns the Rx buffered value Whereas a write access to the SPI DR can be done using SPI 125 function and stores the written data into Tx buffer e 125 ReceiveData e S
158. counter should be refreshed only when the counter is below 80 and greater than 64 otherwise a reset will be generated WWDG SetWindowValue 80 Enable WWDG and set counter value to 127 WWDG timeout 1092 us 64 269 9 ms In this case the refresh window is 1092 127 80 51 3 ms lt refresh window lt 1092 64 69 9ms WWDG Enable 127 18540 Rev 1 4 UM1061 Miscellaneous add on to CMSIS functions misc 28 Miscellaneous add on to CMSIS functions misc 28 1 MISC Firmware driver registers structures 28 1 1 NVIC_InitTypeDef NVIC_InitTypeDef is defined in the misc h file and contains the NVIC initialization parameters Data Fields e uint8 t NVIC IRQChannel e uini8 t NVIC IRQChannelPreemptionPriority e uint8 t NVIC IRQChannelSubPriority e FunctionalState NVIC IRQChannelCmd Field Documentation e uint8 t NVIC InitTypeDef NVIC IRQChannel Specifies the IRQ channel to be enabled or disabled This parameter can be an enumerator of IRQn Type enumeration For the complete STM32 Devices IRQ Channels list please refer to stm32f2xx h file e uint8 t NVIC InitTypeDef NVIC IRQChannelPreemptionPriority Specifies the pre emption priority for the IRQ channel specified in NVIC_IRQChannel This parameter can be a value between 0 and 15 as described in the table MISC_NVIC_Priority_Table A lower priority value indicates a higher priority e uint8 t NVIC InitTypeDef NVIC IRQChannelSubPri
159. data bytes to be transferred Notes e None 18540 Rev 1 461 634 Secure digital input output interface SDIO UM1061 22 2 7 4 22 2 7 5 22 2 7 6 462 634 SDIO ReadData Function Name Function Description Parameters Return values Notes SDIO WriteData Function Name Function Description Parameters Return values Notes SDIO GetFIFOCount Function Name Function Description Parameters Return values Notes uint32_t SDIO_ReadData void Read one data word from Rx FIFO e None Data received None void SDIO_WriteData uint32_t Data Write one data word to Tx FIFO e Data 32 bit data word to write e None None uint32_t SDIO GetFIFOCount void Returns the number of words left to be written to or read from FIFO None Remaining number of words None DoclD 18540 Rev 1 UM1061 Secure digital input output interface SDIO 22 2 8 22 2 8 1 22 2 8 2 22 2 8 3 4 SDIO IO Cards mode management functions SDIO StartSDIOReadWait Function Name void SDIO StartSDIOReadWait FunctionalState NewState Function Description Starts the SD I O Read Wait operation Parameters e NewState new state of the Start SDIO Read Wait operation This parameter can be ENABLE or DISABLE Return values e None Notes e None SDIO_StopSDIOReadWait Function Name void SDIO_StopSDIOReadWait FunctionalState NewState Function Descrip
160. define FLASH Latency 4 uint8 1 0 0004 FLASH Four Latency cycles e define FLASH Latency 5 uint8 t 0x0005 FLASH Five Latency cycles e define FLASH Latency 6 uint8 t 0x0006 FLASH Six Latency cycles e define FLASH Latency 7 uint8 t 0x0007 FLASH Seven Latency cycles FLASH Option Bytes IWatchdog e define OB IWDG SW uint8 t 0x20 Software IWDG selected e didefine OB IWDG 8 t 0x00 Hardware IWDG selected FLASH Option Bytes nRST STDBY e define OB STDBY NoRST uint8 1 0x80 DocID 18540 Rev 1 4 UM1061 FLASH Memory FLASH 3 reset generated when entering STANDBY e define OB STDBY RST uint8 t 0x00 Reset generated when entering in STANDBY FLASH Option Bytes nRST STOP e define OB STOP NoHST uint8 1 0 40 No reset generated when entering in STOP e define OB STOP RST uint8 1 0 00 Reset generated when entering in STOP FLASH Option Bytes Read Protection e define Level 8 t OxAA e define Level 1 8 t 0x55 FLASH Program Parallelism e didefine FLASH PSIZE BYTE uint32 t 0x00000000 e iidefine FLASH PSIZE HALF WORD uint32 1 0 00000100 e didefine FLASH PSIZE WORD uint32 1 0 00000200 e didefine FLASH PSIZE DOUBLE WORD uint32 1 0x00000300 e define CR PSIZE MASK uint32 t OXFFFFFCFF FLASH Sectors DocID 18540 Rev 1 245 634 FLASH Memory FLASH UM1061 246 634 e
161. didefine FLASH Sector 0 uint16 1 0x0000 Sector Number 0 e didefine FLASH Sector 1 uint16 1 0x0008 Sector Number 1 e define FLASH Sector 2 uint16 1 0x0010 Sector Number 2 e define FLASH Sector 16 1 0x0018 Sector Number 3 e define FLASH Sector 4 16 1 0x0020 Sector Number 4 e define FLASH Sector 5 uint16 1 0x0028 Sector Number 5 e define FLASH Sector 6 uint16 1 0x0030 Sector Number 6 e didefine FLASH Sector 7 uint16 1 0 0038 Sector Number 7 e didefine FLASH Sector 8 16 1 0x0040 Sector Number 8 e didefine FLASH Sector 9 16 1 0x0048 Sector Number 9 e didefine FLASH Sector 10 16 1 0x0050 Sector Number 10 e didefine FLASH Sector 11 16 1 0x0058 Sector Number 11 DocID 18540 Rev 1 4 UM1061 FLASH Memory FLASH 12 4 4 FLASH Voltage Range e define VoltageRange 1 uint8 1 0 00 Device operating range 1 8V to 2 1V e define VoltageRange_2 uint8_t 0x01 Device operating range 2 1V to 2 7V e define VoltageRange 3 uint8 1 0 02 Device operating range 2 7V to 3 6V e define VoltageRange 4 uint8 1 0x03 Device operating range 2 7V to 3 6V External Vpp FLASH Programming Example The example below explains how to program the FLASH For more examples about FLASH configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package
162. e SetCurrDataCounter e DMA_GetCurrDataCounier Double Buffer mode functions This subsection provides function allowing to configure and control the double buffer mode parameters The Double Buffer mode can be used only when Circular mode is enabled The Double Buffer mode cannot be used when transferring data from Memory to Memory The Double Buffer mode allows to set two different Memory addresses from to which the DMA controller will access alternatively after completing transfer to from target memory 0 it will start transfer to from target memory 1 This allows to reduce software overhead for double buffering and reduce the CPU access time Two functions must be called before calling the DMA_Init function e void DMA DoubleBufferModeConfig DMA Stream TypeDef DMAy Streamx uint32 t Memory1BaseAddr uint32 t DMA CurrentMemory void DMA_DoubleBufferModeCmd DMA_Stream_TypeDef DMAy Streamx FunctionalState NewState DMA_DoubleBufferModeConfig is called to configure the Memory 1 base address and the first Memory target from to which the transfer will start after enabling the DMA Stream Then DMA_DoubleBufferModeCmd must be called to enable the Double Buffer mode or disable it when it should not be used Two functions can be called dynamically when the transfer is ongoing or when the DMA Stream is stopped to modify on of the target Memories addresses or to check wich Memory target is currently used e void DMA_
163. e define e define TIM_DMA_COM uint16_t 0x2000 TIM DMA Trigger uint16 t 0x4000 TIM Encoder Mode e didefine e didefine e didefine TIM_EncoderMode_TI1 uint16_t 0x0001 EncoderMode Tli2 uint16 1 0x0002 EncoderMode Tl12 uint16 1 0x0003 TIM Event Source e define e define e define e ididefine e ididefine e define EventSource Update uint16 1 0x0001 EventSource 16 t 0x0002 TIM EventSource CC2 uint16 t 0x0004 EventSource CC3 uint16 t 0x0008 EventSource CC4 uint16 t 0x0010 EventSource COM uint16 1 0 0020 DocID 18540 Rev 1 4 UM1061 General purpose timers TIM 3 e define TIM_EventSource_Trigger uint16_t 0x0040 e define EventSource Break uint16 1 0 0080 TIM_External_Trigger_Polarity e define TIM_ExtTRGPolarity_Inverted uint16_t Ox8000 e define TIM_ExtTRGPolarity_Noninverted uint16_t Ox0000 TIM_External_Trigger_Prescaler e define e define e define e define TIM_Flags e define e define e define TIM_ExtTRGPSC_OFF uint16_t 0x0000 TIM_ExtTRGPSC_DIV2 uint16_t 0x1000 TIM ExtTRGPSC DIV4 uint16 1 0x2000 ExtTRGPSC DIV8 uint16 1 0x3000 TIM FLAG Update uint16 1 0x0001 FLAG 16 1 0 0002 FLAG CC2 uint16 1 0 0004 DocID 18540 Rev 1 575 634 General purpose timers TIM UM1061
164. flag is cleared by software sequence read write operation to SPI SR register SPI 125 GetFlagStatus followed by a write operation to SPI register SPI Cmd to enable the SPI 4 DociD 18540 Rev 1 497 634 Serial peripheral interface SPI UM1061 23 2 11 4 SPI 125 GetlTStatus 23 2 11 5 498 634 Function Name Function Description Parameters Return values Notes ITStatus SPI 125 GetlTStatus SP TypeDef SPIx uint8 t SPI 125 IT Checks whether the specified SPIx I2Sx interrupt has occurred or not e SPlx To select the SPIx I2Sx peripheral where x be 1 2 or 3 in SPI mode or 2 or 3 in 25 mode SPI 125 specifies the SPI interrupt source to check This parameter can be one of the following values SPI 128 IT Transmit buffer empty interrupt SPI 128 IT RXNE Receive buffer not empty interrupt SPI 125 IT Overrun interrupt SPI IT Mode Fault interrupt SPI IT CRCERR CRC Error interrupt 128 IT Underrun interrupt SPI 125 IT TIFRFE Format Error interrupt The new state of SPI 125 SET or RESET None SPI_I2S_ClearlTPendingBit Function Name Function Description Parameters Return values Notes void SPI 125 ClearlTPendingBit SP TypeDef SPlx uint8 t SPI 125 Clears the SPIx CRC Error CRCERR interrupt pending bit SPlx To select the SPIx I2Sx peripheral where x can be 1
165. flag mask DCMI FLAG VSYNCMI VSYNC Masked flag mask DCMI FLAG LINEMI Line Masked flag mask DCMI FLAG HSYNC HSYNC flag mask DCMI FLAG VSYNC VSYNC flag mask DCMI FLAG FNE Fifo not empty flag mask The new state of DCMI FLAG SET or RESET None Function Name void ClearFlag 6 t FLAG Function Description Clears the DCMI s pending flags Parameters DCMI FLAG specifies the flag to clear This parameter DoclD 18540 Rev 1 181 634 Digital camera interface UM1061 be any combination of the following values DCMI FLAG FRAMERI Frame capture complete Raw flag mask DCMI FLAG OVFRI Overflow Raw flag mask DCMI FLAG Synchronization error Raw flag mask DCMI FLAG VSYNCRI VSYNC Raw flag mask DCMI FLAG LINERI Line Raw flag mask Return values None Notes None 9 2 7 4 DCMI GetlTStatus Function Name ITStatus DCMI GetlTStatus uint 6 t IT Function Description Checks whether the DCMI interrupt has occurred or not Parameters e IT specifies the DCMI interrupt source to check This parameter can be one of the following values DCMI IT FRAME Frame capture complete interrupt mask A DCMI IT OVF Overflow interrupt mask A DCMI IT ERR Synchronization error interrupt mask DCMI IT VSYNC VSYNC interrupt mask DCMI IT LINE Line interrupt mask Return values The new state of DCMI IT SET
166. following events will be set e didefine I2C EVENT MASTER RECEIVER MODE SELECTED uint32 t 0x00030002 e didefine I2C EVENT MASTER MODE ADDRESS10 uint32 1 0 00030008 e I2C EVENT MASTER BYTE RECEIVED uint32 1 0x00030040 If a communication is established START condition generated and slave address acknowledged then the master has to check on one of the following events for communication procedures e I2C EVENT MASTER BYTE TRANSMITTING uint32 1 0 00070080 e I2C EVENT MASTER BYTE TRANSMITTED uint32 1 0 00070084 e didefine 2 EVENT SLAVE RECEIVER ADDRESS MATCHED uint32 t 0x00020002 Communication start events e didefine 2 EVENT SLAVE TRANSMITTER ADDRESS MATCHED uint32 1 0x0006008 2 DocID 18540 Rev 1 4 UM1061 Inter integrated circuit interface 2 define I2C EVENT SLAVE RECEIVER SECONDADDRESS MATCHED uint32 t 0x008 20000 define I2C EVENT SLAVE TRANSMITTER SECONDADDRESS MATCHED uint32 t 0 x00860080 define I2C EVENT SLAVE GENERALCALLADDRESS MATCHED uint32 1 0 0012000 0 define I2C EVENT SLAVE BYTE RECEIVED uint32 1 0x00020040 Wait on one of these events when EV1 has already been checked and define 2 EVENT SLAVE STOP DETECTED uint32 1 0x00000010 define 2 EVENT SLAVE BYTE TRANSMITTED uint32 t 0x00060084 define I2C EVENT SLAVE BYTE TRANSMITTING uint32 1 0 00060080 define I2C EVENT SLAVE
167. for the specified ADC ADCx where x can be 1 2 or 3 to select the ADC peripheral NewState new state of the selected ADC discontinuous mode on injected group channel This parameter can be ENABLE or DISABLE None None ADC GetlnjectedConversionValue Function Name Function Description Parameters uint 6 t ADC GetlnjectedConversionValue ADC TypeDef ADCx uint8 t ADC InjectedChannel Returns the ADC injected channel conversion result ADCx where x can be 1 2 to select the ADC peripheral ADC InjectedChannel the converted ADC injected channel This parameter can be one of the following values ADC InjectedChannel 1 Injected Channeli selected DoclD 18540 Rev 1 73 634 Analog to digital converter ADC UM1061 3 2 10 3 2 10 1 3 2 10 2 74 634 Return values Notes ADC InjectedChannel 2 Injected Channel2 selected ADC InjectedChannel 3 Injected Channel3 selected ADC InjectedChannel 4 Injected Channel4 selected The Data conversion value None Interrupt and flag management functions ADC ITConfig Function Name void ITConfig ADC TypeDef ADCx uint 6 t ADC FunctionalState NewState Function Description Enables or disables the specified ADC interrupts Parameters Return values Notes ADC GetFlagStatus ADCx where x can be 1 2 or to select the ADC peripheral ADC specifies the ADC interrupt sources t
168. generation through the slave mode controller e define TIM UpdateSource Regular uint16 1 0x0001 Source of update is counter overflow underflow TIM Programming Example The example below explains how to configure the TIM3 to generate a PWM signal on CHI with a frequency of 30 KHz and 5096 duty cycle For more examples about TIM configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx StdPeriph Examples DocID 18540 Rev 1 4 UM1061 General purpose timers TIM 4 Jc docN finclude stm32f2xx h c cu hi 77 void TIM3 PWMConfig void Private functions Vas Qbrief Main program param None retval None 5 int main void Configure TIM3 to generate PWM signal on 1 with a frequency of 30 KHz and 50 duty cycle TE MSESEWMG IGO while 1 Qbrief Configure the TIM3 in PWM mode param None retval None xy void PWMConfig void GIO kaeni GIO TIM TIM Mmea TIM ENE TIM ESSE DIE ERES 10 configuration Fe I I I I I I I I Enable GPIOC clock AHBlPeriphClockCmd RCC AHBlPeriph GPIOC ENABLE 2 Commecic WMS pin PCG to Ns2 CRU PinATComrig CPO
169. low power modes the software must first clear the RSF flag The software must then wait until it is set again before reading the calendar which means that the calendar registers have been correctly copied into the RTC_TR and RTC_DR shadow registers The RTC_WaitForSynchro function implements the above software sequence RSF clear and RSF check The following functions can be used to initialize and configure the RTC 21 2 4 418 634 RTC Delnit RTC Init RTC Structinit RTC_WriteProtectionCmd RTC EnterlnitMode RTC ExitlnitMode RTC WaitForSynchro Backup Data registers configuration DocID 18540 Rev 1 4 UM1061 Real time clock RTC 21 2 5 21 2 6 21 2 7 3 RTC_WriteBackupRegisier e RTC and low power modes The MCU can be woken up from a low power mode by an RTC alternate function The RTC alternate functions are the RTC alarms Alarm A and Alarm B RTC wakeup RTC tamper event detection and RTC time stamp event detection These RTC alternate functions can wake up the system from the Stop and Standby lowpower modes The system can also wake up from low power modes without depending on an external interrupt Auto wakeup mode by using the RTC alarm or the RTC wakeup events The RTC provides a programmable time base for waking up from the Stop or Standby mode at regular intervals Wakeup from STOP and Standby
170. of the LIN break detection USART IT to indicate if a noise error occur USART IT FE to indicate if a frame error occur USART IT PE to indicate if a parity error occur USART ORE to indicate if an Overrun error occur e Interrupt Source Some parameters are coded in order to use them as interrupt source or as pending bits In this Mode it is advised to use the following functions void USART ITConfig USART TypeDef USARTx uint16 t USART FunctionalState NewState ITStatus USART GetlTStatus USART TypeDef USARTx uint16 t USART void USART ClearlTPendingBit USART TypeDef USARTx uint16 t USART IT a USART IT TXE specifies the interrupt source for the Tx buffer empty interrupt b USART IT RXNE specifies the interrupt source for the Rx buffer not empty interrupt c USART IT TC specifies the interrupt source for the Transmit complete interrupt USART IT IDLE specifies the interrupt source for the Idle Line interrupt USART IT CTS specifies the interrupt source for the CTS interrupt USART LBD specifies the interrupt source for the LIN break detection interrupt g USART specifies the interrupt source for the parity error interrupt USART IT ERR specifies the interrupt source for the errors interrupt DMA Mode In DMA Mode USART communication can be managed by 2 DMA Channel requests DoclID 18540 Rev 1 597 634 Universal synchronous asynchrono
171. offset 0x18 l uint32 t SDIO_TypeDef RESP3 DocID 18540 Rev 1 451 634 Secure digital input output interface SDIO UM1061 22 1 2 452 634 SDIO response register Address offset AJ uint32 t SDIO_TypeDef RESP4 SDIO response 4 register Address offset 0x20 __10 uint32 t SDIO_TypeDef DTIMER SDIO data timer register Address offset 0x24 IO uint32 t SDIO_TypeDef DLEN SDIO data length register Address offset 0x28 IO uint32 t SDIO TypeDef DCTRL SDIO data control register Address offset 0 2 AJ uint32 t SDIO_TypeDef DCOUNT SDIO data counter register Address offset 0x30 J uint32_t SDIO TypeDef STA SDIO status register Address offset 0x34 IO uint32 t SDIO_TypeDef ICR SDIO interrupt clear register Address offset 0x38 JO uint32 t SDIO TypeDef MASK SDIO mask register Address offset uint32 t SDIO TypeDef RESERVEDO 2 Reserved 0x40 0x44 __ 2 SDIO TypeDef FIFOCNT SDIO FIFO counter register Address offset 0x48 uint32_t SDIO TypeDef RESERVED1 13 Reserved 0x4C 0x7C JO uint32 t SDIO TypeDet FIFO SDIO data FIFO register Address offset 0x80 SDIO_InitTypeDef SDIO_InitTypeDef is defined in the stm32f2xx sdio h file and contains the SDIO initialization parameters Data Fields uint32_t SDIO_ClockEdge uint32_t SDIO_ClockBypass uint32_t SDIO_ClockPowerSave uint32_t SDIO_BusWide uint32_t SDI
172. operation to 2 DR register 2 SendData DoclD 18540 Rev 1 327 634 Inter integrated circuit interface 12 UM1061 Function Name ITStatus I2C GetlTStatus 2C TypeDef 2 uint32 t I2C IT Function Description Checks whether the specified 12C interrupt has occurred or not Parameters e Return values Notes 16 2 11 8 2 ClearlTPendingBit I2Cx where x be 1 2 or 3 to select the 12C peripheral 2 specifies the interrupt source to check This parameter can be one of the following values 2 SMBALERT SMBus Alert flag 2C IT TIMEOUT Timeout or error flag 2C IT PECERR PEC error in reception flag 2C IT Overrun Underrun flag Slave mode I2C IT AF Acknowledge failure flag C IT ARLO Arbitration lost flag Master mode 12 IT Bus error flag 2C IT Data register empty flag Transmitter 2C IT RXNE Data register not empty Receiver flag 2C IT STOPF Stop detection flag Slave mode 2C IT ADD10 10 bit header sent flag Master mode 2C IT Byte transfer finished flag 2C ADDR Address sent flag Master mode ADSL Address matched flag Slave mode ENDAD 12 IT SB Start bit flag Master mode The new state of 2 IT SET or RESET None Function Name void I2C_ClearlTPendingBit 2 TypeDef 2 uint32 t I2C IT Function Descri
173. or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream The number of remaining data units in the current DMAy transfer None DocID 18540 Rev 1 197 634 DMA controller DMA UM1061 10 2 6 Double Buffer mode functions 10 2 6 1 DoubleBufferModeConfig Function Name void DoubleBufferModeConfig Stream TypeDef DMAy Streamx uint32 t Memory1BaseAddr uint32 t DMA CurrentMemory Function Description Configures when the DMAy Streamx is disabled the double buffer mode and the current memory target Parameters e Streamx where y can be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream e MemoryiBaseAddr the base address of the second buffer Memory 1 e CurrentMemory specifies which memory will be first buffer for the transactions when the Stream will be enabled This parameter can be one of the following values Memory 0 Memory 0 is the current buffer Memory 1 Memory 1 is the current buffer Return values e None Notes e MemoryOBaseAdqddr is set by the DMA structure configuration in DMA Init 10 2 6 2 DoubleBufferModeCmd Function Name void DoubleBufferModeCmd Stream TypeDef DMAy Streamx FunctionalState NewState Function Description Enables or disables the double buffer mode for the selected DMA stream Parameters e Streamx where y be 1 or 2 to select the DMA and x can be 0
174. peripheral in Debug mode This parameter can be ENABLE or DISABLE Return values None Notes None DBGMCU Firmware driver defines DBGMCU DBGMCU_Exported_Consiants e define DBGMCU_SLEEP uint32_t 0x00000001 e DBGMCU_STOP uint32_t 0x00000002 e define DBGMCU STANDBY uint32 1 0x00000004 DBGMCU TIM2 STOP uint32 t 0x00000001 DoclID 18540 Rev 1 4 UM1061 Debug support DBGMCU 3 define define define define define define define define define define define define DBGMCU_TIM3_STOP uint32_t 0x00000002 DBGMCU_TIM4_STOP uint32_t 0x00000004 DBGMCU_TIM5_STOP uint32_t 0x00000008 DBGMCU_TIM6_STOP uint32_t 0x00000010 DBGMCU_TIM7_STOP uint32_t 0x00000020 DBGMCU TIM12 STOP uint32 1 0x00000040 DBGMCU TIM13 STOP uint32 t 0x00000080 DBGMCU TIM14 STOP uint32 1 0x00000100 DBGMCU RTC STOP uint32 1 0 00000400 DBGMCU WWDG STOP uint32 1 0 00000800 DBGMCU IWDG STOP uint32 1 0x00001000 DBGMCU_I2C1_SMBUS_ TIMEOUT uint32 1 0 00200000 DocID 18540 Rev 1 171 634 Debug support DBGMCU UM1061 172 634 define define define define define define define define define DBGMCU_I2C2_SMBUS_TIMEOUT uint32_t 0x00400000 DBGMCU I2C3 SMBUS TIMEOUT uint32 1 0x00800000 DBGMCU CANT STOP uint32 1 0x02000000 DBGMCU CANA STOP uint32 1 0 04000000
175. requirements and constraints Basic state monitoring Using 12C_CheckEvent function It compares the status registers SR1 and SR2 content to a given event can be the combination of one or more flags It returns SUCCESS if the current status includes the given flags and returns ERROR if one or more flags are missing in the current status This function is suitable for most applications as well as for startup activity since the events are fully described in the product reference manual RM0033 It is also suitable for users who need to define their own events Limitations If an error occurs ie error flags are set besides to the monitored flags the 2 CheckEvent function may return SUCCESS despite the communication hold or corrupted real state In this case it is advised to use error interrupts to monitor the error events and handle them in the interrupt IRQ handler For error management it is advised to use the following functions I2C ITConfig to configure and enable the error interrupts I2C ERR I2Cx ER IRQHandler which is called when the error interrupt occurs Where x is the peripheral instance I2C1 2 2 I2C GetFlagStatus or I2C GetlTStatus to be called into the 2 ER IRQHandler function in order to determine which error occurred I2C ClearFlag or l2C_ClearlTPendingBit and or I2C SoftwareResetCmd and or 2 GenerateStop in order to clear the error flag and source and return t
176. stable after startup delay or PLL locked If a clock source which is not yet ready is selected the switch will occur when the clock source will be ready You can use RCC GetSYSCLKSource function to know which clock is currently used as system clock source RCC GetSYSCLKSource Function Name uint8 t RCC GetSYSCLKSource void Function Description Returns the clock source used as system clock Parameters e Return values e Notes RCC HCLKConfig None The clock source used as system clock The returned value can be one of the following 0x00 HSI used as system clock 0x04 HSE used as system clock 0x08 PLL used as system clock None Function Name void RCC HCLKConfig uint32 t RCC SYSCLK DoclD 18540 Rev 1 369 634 Reset and clock control RCC UM1061 Function Description Configures the AHB clock Parameters Return values Notes 19 2 7 4 PCLK1Config SYSCLK defines the AHB clock divider This clock is derived from the system clock SYSCLK This parameter can be one of the following values SYSCLK Div1 AHB clock SYSCLK SYSCLK Div2 AHB clock SYSCLK 2 SYSCLK Div4 AHB clock SYSCLK 4 SYSCLK Div8 AHB clock SYSCLK 8 SYSCLK Div16 AHB clock SYSCLK 16 RCC SYSCLK Div64 AHB clock SYSCLK 64 SYSCLK Div128 AHB clock SYSCLK 128 SYSCLK Div256 AHB clock SYSCLK 25
177. structure which will be initialized None None DoclD 18540 Rev 1 277 634 General purpose Os GPIO UM1061 14 2 6 14 2 6 1 14 2 6 2 278 634 Function Name void GPIO PinLockConfig TypeDef GPIOx uint16 t GPIO Pin Function Description Locks GPIO Pins configuration registers Parameters e GPIOx where x be to select the GPIO peripheral e GPIO Pin specifies the port bit to be locked This parameter can be any combination of GPIO Pin x where x can be 0 15 Return values e None Notes e The locked registers GPIOx_MODER GPIOx OTYPER GPIOx OSPEEDR GPIOx PUPDR GPIOx_AFRL and GPIOx AFRH e Theconfiguration of the locked GPIO pins can no longer be modified until the next reset GPIO Read and Write functions GPIO_ReadInputDataBit Function Name uint8 t GPIO ReadlnputDataBit TypeDef GPIOx 16 t GPIO Pin Function Description Reads the specified input port pin Parameters e GPIOx where x can be A l to select the GPIO peripheral e GPIO Pin specifies the port bit to read This parameter be GPIO Pin x where x can be 0 15 Return values The input port pin value Notes None GPIO ReadinputData Function Name uint16_t GPIO ReadinputData TypeDef GPIOx Function Description Reads the specified GPIO input data port Parameters e GPIOx where x be A l to select the GPIO peripheral Return values G
178. that the next DMA transfer is the last one Parameters e 12 where x can be 1 2 or 3 to select the 2 peripheral e NewState new state of the 2 DMA last transfer This parameter can be ENABLE or DISABLE Return values None Notes None Interrupt event and flag management functions I2C ReadRegister DociD 18540 Rev 1 323 634 Inter integrated circuit interface 12C UM1061 16 2 11 2 16 2 11 3 324 634 Function Name Function Description Parameters Return values Notes 2 ITConfig Function Name Function Description Parameters Return values Notes I2C CheckEvent uint16 112 ReadRegister 2C_TypeDef I2Cx uint8 t I2C Register Reads the specified I2C register and returns its value I2C Register specifies the register to read This parameter can be one of the following values 2C Register register 2 Register CR2 register 2C Register OAHR1 register 126 Register OAR2 2 register 2C Register DR DR register 2C Register SH1 SR1 register 2 Register SH2 SR2 register 2C Register CCR CCR register 2C Register TRISE TRISE register The value of the read register None void I2C ITConfig 2C TypeDef I2Cx uint16 t I2C IT FunctionalState NewState Enables or disables the specified 2 interrupts I2Cx where x be 1 2 or 3 to select th
179. the entered parameters This parameter can be one of the following values RTC Format Binary data format Format BCD BCD data format RTC_DateStruct pointer toa RTC DateTypeDef structure that contains the date configuration information for the RTC An ErrorStatus enumeration value SUCCESS HTC Date register is configured ERROR RTC Date register is not configured None void RTC DateStructlnit RTC DateTypeDef RTC DateStruct Fills each RTC DateStruct member with its default value Monday January 01 xx00 DoclD 18540 Rev 1 4 UM1061 Real time clock RTC Parameters e RTC DateStruct pointer to a RTC DateTypeDef structure which will be initialized Return values e None Notes e None 21 2 12 6 RTC_GetDate Function Name void RTC GetDate uint32 t RTC Format RTC_DateTypeDef RTC_DateStruct Function Description Get the RTC current date Parameters e RTC Format specifies the format of the returned parameters This parameter can be one of the following values RTC Format BIN Binary data format RTC Format BCD BCD data format e RTC DateStruct pointer to a RTC DateTypeDef structure that will contain the returned current date configuration Return values e None Notes e None 21 2 13 Alarm configuration functions 21 2 13 1 RTC SetAlarm 4 Function Name void RTC SetAlarm uint32 t RTC Format uint32 t RTC Alarm RTC_AlarmTypeDef RTC AlarmStruct Function
180. the line define USE STDPERIPH DRIVER stm32f2xx h 2 stm32f2xx_conf h file select the peripherals to include their header file by default all header files are included in the template file 3 Use the peripheral drivers API provided by stm32f2xx_ppp h c files under Libraries STM32F2xx_StdPeriph_Driver to build your application For more information refer to the detailed description of each peripheral driver DocID 18540 Rev 1 39 634 How to use and customize the library UM1061 2 3 40 634 4 addition to the peripheral drivers you can reuse adapt the rich set of examples available within the library This reduces your application development time and allows you to start within few hours For many applications the peripheral drivers can be used as is However for applications having tough constraints in terms of code size and or execution speed these drivers should be used as reference on how to configure the peripherals and tailor them to specific application requirements in combination with peripheral direct register access The application code performance in terms of size and or speed depends also on the C compiler optimization settings To help you make the application code smaller faster or balanced between size and speed fine tune the optimizations according to your application needs For more information please refer to your C compiler documentation Peripheral initialization and configuratio
181. the repetition counter value Each time the RCR downcounter reaches zero an update event is generated and counting restarts from the RCR value This means PWM mode that 1 corresponds to the number of PWM periods in edge aligned modethe number of half PWM period in center aligned mode This parameter must be a number between 0x00 and OxFF This parameter is valid only for TIM1 and TIM8 TIM OCInitTypeDef is defined in the stm32f2xx_tim h file and contains the TIM Output Compare initialization parameters Data Fields uint16_t TIM_OCMode uint16_t TIM_OutputState uint16_t TIM_OutputNSiate uint32_t TIM_Pulse uint16_t TIM OCPolarity uint16 t OCNPolarity uint16 t OCldleState uint16 t OCNIdleState Field Documentation uint16 t OCInitTypeDef TIM OCMode Specifies the TIM mode This parameter can be a value of TIM Output Compare and PWM modes uint16 t TIM OCInitTypeDef TIM OutputState Specifies the TIM Output Compare state This parameter can be a value of TIM Output Compare State uint16 t OCInitTypeDef TIM OutputNState Specifies the TIM complementary Output Compare state This parameter can be a value of TIM Output Compare N State uint32_t TIM_OCInitTypeDef TIM_Pulse Specifies the pulse value to be loaded into the Capture Compare Register This parameter be a number between 0x0000 and OxFFFF uint16 t TIM_OCInitTypeDef TIM_OC
182. to 7 to select the DMA Stream NewState new state of the DMAy Streamx double buffer mode This parameter can be ENABLE or DISABLE Return values e None Notes e This function can be called only when the DMA Stream is disabled 198 634 DoclD 18540 Rev 1 Ly UM1061 DMA controller DMA 10 2 6 3 10 2 6 4 4 DMA MemoryTargetConfig Function Name void DMA_MemoryTargetConfig DMA Stream TypeDef DMAy Streamx uint32 t MemoryBaseAddr uint32 t DMA MemoryTarget Function Description Configures the Memory address for the next buffer transfer in double buffer mode for dynamic use Parameters e Return values Notes Streamx where be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream MemoryBaseAddr The base address of the target memory buffer DMA MemoryTarget Next memory target to be used This parameter can be one of the following values DMA Memory 0 To use the memory address 0 Memory 1 To use the memory address 1 None It is not allowed to modify the Base Address of a target Memory when this target is involved in the current transfer ie If the DMA Stream is currently transferring to from Memory 1 then it not possible to modify Base address of Memory 1 but itis possible to modify Base address of Memory 0 To know which Memory is currently used you can use the function DMA GetCurrentMemoryTarget GetCurrentMemoryTarget Funct
183. to clear This parameter can be one of the following values ADC_IT_EOC End of conversion interrupt mask ADC IT AWD Analog watchdog interrupt mask IT JEOC End of injected conversion interrupt mask ADC IT Overrun interrupt mask Return values e None Notes e None ADC Firmware driver defines ADC Firmware driver defines ADC analog waichdog selection e define ADC AnalogWatchdog SingleRegEnable uint32 1 0x00800200 DoclD 18540 Rev 1 UM1061 Analog to digital converter ADC e define e define e define e define e define e define ADC_AnalogWatchdog_SingleInjecEnable uint32_t 0x00400200 ADC_AnalogWatchdog_SingleRegOrinjecEnable uint32_t Ox00C00200 AnalogWatchdog AllRegEnable uint32 1 0x00800000 ADC AnalogWatchdog AlllnjecEnable uint32 t 0x00400000 ADC AnalogWatchdog AllRegAllInjecEnable uint32 1 0 00 00000 ADC AnalogWatchdog None uint32 1 0 00000000 ADC channels e didefine e didefine e define e define e define 3 Channel O uint8 1 0x00 Channel 1 8_1 0 01 ADC Channel 2 uint8 1 0x02 Channel 8 1 0 03 Channel 4 8 1 0 04 DocID 18540 Rev 1 77 634 Analog to digital converter ADC UM1061 78 634 define define define define define define define define define define
184. uint16 t 0x0000 e define HASH DataType 16b uint16 t 0x0010 e define HASH DataType 8b uint16 t 0x0020 e define HASH DataType 1b uint16 t 0x0030 HASH flags definition e define HASH FLAG DINIS uint16 t 0x0001 16 locations are free in the DIN A new block can be entered into the input buffer e define HASH FLAG DClS uint16 t 0x0002 Digest calculation complete e didefine HASH FLAG DMAS uint16 1 0 0004 DocID 18540 Rev 1 4 UM1061 Hash processor HASH 15 4 3 interface enabled 1 transfer ongoing e define HASH FLAG BUSY uint16 1 0 0008 The hash core is Busy processing a block of data e define HASH FLAG DINNE uint16 1 0 1000 DIN not empty The input buffer contains at least one word of data HASH HMAC Long key only for HMAC mode e define HASH HMACKeyType ShortKey uint32 t 0x00000000 HMAC Key is lt 64 bytes e define HASH HMACKeyType LongKey uint32 1 0 00010000 HMAC Key is 64 bytes HASH interrupts definition e define HASH IT DINI uint8 1 0 01 A new block can be entered into the input buffer DIN e define HASH IT DCl uint8 1 0x02 Digest calculation complete HASH processor Algorithm Mode e iidefine HASH AlgoMode HASH uint16 1 0 0000 Algorithm is HASH e define HASH AlgoMode HMAC uint16 1 0 0040 Algorithm is HMAC HASH Programming Example The example below explains how to use the HASH periphe
185. uint8 1 0 02 Input Fifo is Not Full e define CRYP FLAG INRIS uint8 1 0x22 Raw interrupt pending e define CRYP FLAG OFNE uint8 1 0 04 Input Fifo service raw interrupt status e define CRYP FLAG 8 t 0x08 Output Fifo is Full e define CRYP FLAG OUTRIS uint8 t 0x21 DocID 18540 Rev 1 147 634 Cryptographic processor CRYP UM1061 6 4 148 634 Output Fifo service raw interrupt status CRYP_interrupts_definition e define CRYP_IT_INI uint8_t 0x01 IN Fifo Interrupt e define CRYP IT OUTI uint8 t 0x02 OUT Fifo Interrupt CRYP Key Size for AES only e define CRYP KeySize 128b uint16 1 0x0000 e iidefine CRYP KeySize 192b uint16 1 0x0100 e define CRYP KeySize 256b uint16 1 0x0200 CRYP Programming Example The example below explains how to use the Cryptographic processor to encrypt data using AES 128 in all modes ECB CBC and CTR For more examples about CRYP configuration and usage please refer to the examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples CRYP include stm32f2xx h Gleitilme define AES TEKT SIZE 64 2 Private variables uint8 t 5128 161 0x2b 0 7 0x15 0x16 0x28 0 2 0 eag
186. under Project STM32F2xx_StdPeriph_Examples FLASH Tmelucleg 7 finclude stm32f2xx h Private or define BUFFER SIZE 10 Pziwete variables f UIMES2 1E SIAD Ox20212223 02242526217 0 2 OxFFEEDDCC O0xBBAA9988 0771065544 0 a 512 2 1 110000 0 10000000 0 20000000 JER E FLASE It Aa Wames2 iE Data ll p Priwate functione f Qbrief Main program param None retval None iA int main void vinoto e Wheiewelebeese OXVSOOR0007 Base eechkess DocID 18540 Rev 1 247 634 FLASH Memory FLASH UM1061 Unlock the Flash to enable the flash control register access FLASH Unlock Device voltage range supposed to be NONI ES operation will be done by word FLAS 1 Erase Sector 2 LAS UASI 2 WolicageiRamge 3 H_COMPL ETE f Weste ene to Sector 2 it PLASE Wit Witte Waende PULSE SULEE SIAH de Error occurred while Flash write User can add here some code to deal wi
187. values None Notes None 7 2 6 2 DAC_Init Function Name void DAC Init uint32 t DAC Channel DAC_InitTypeDef DAC InitStruct Function Description Initializes the DAC peripheral according to the specified parameters in the DAC InitStruct Parameters e Channel the selected DAC channel This parameter can be one of the following values DAC Channel 1 DAC Channeli selected DAC Channel 2 DAC Channel2 selected e DAC _InitStruct pointer to a DAC InitTypeDef structure that contains the configuration information for the specified DAC channel Return values e None Notes e None 7 2 6 3 DAC Structlnit Function Name void DAC Structlnit DAC nitTypeDef DAC InitStruct Function Description Fills each DAC InitStruct member with its default value Parameters e DAC _InitStruct pointer to a DAC InitTypeDef structure which will be initialized Return values Notes None 154 634 18540 Rev 1 UM1061 Digital to analog converter DAC 7 2 6 4 7 2 6 5 7 2 6 6 4 DAC Cmd Function Name void DAC Cmd uint32 t DAC Channel FunctionalState NewState Function Description Enables or disables the specified DAC channel Parameters e Channel The selected DAC channel This parameter can be one of the following values DAC Channel 1 DAC Channeli selected DAC Channel 2 DAC Channel selected new state of the DAC channel This parameter can be EN
188. voltage threshold detected by the Power Voltage Detector PVD PWR PVDLevel specifies the PVD detection level This parameter can be one of the following values PWR PVDLevel 0 PVD detection level set to 2 0V PWR PVDLevel 1 PVD detection level set to 2 2V PWR PVDLevel 2 PVD detection level set to 2 3V PWR PVDLevel 3 PVD detection level set 2 5V PWR PVDLevel 4 PVD detection level set to 2 7V PWR PVDLevel 5 PVD detection level set to 2 8V PWR PVDLevel 6 PVD detection level set to 2 9V PWR PVDLevel 7 PVD detection level set to 3 0V None Refer to the electrical characteristics of you device datasheet for more details void PWR PVDCmd FunctionalState NewState Enables or disables the Power Voltage Detector PVD NewState new state of the PVD This parameter can be ENABLE or DISABLE None None 18 2 5 Wakeup pin configuration function 18 2 5 1 WakeUpPinCmd 348 634 DoclD 18540 Rev 1 4 UM1061 Power control PWR 18 2 6 18 2 6 1 18 2 7 18 2 7 1 4 Function Name void PWR WakeUpPinCmd FunctionalState NewState Function Description Enables or disables the WakeUp Pin functionality Parameters NewState new state of the WakeUp Pin functionality This parameter can be ENABLE or DISABLE Return values e None Notes e None Backup Regulator configuration function PWR_BackupRegulatorCmd Function Name void PWR BackupRegulatorCmd FunctionalStat
189. where x can be 1 2 or to select the SPI peripheral SPI NSSInternalSoft specifies the SPI NSS internal state This parameter can be one of the following values SPI NSSInternalSoft Set Set NSS pin internally SPI NSSInternalSoft Reset Reset NSS pin internally None None void SPI SSOutputCmd SP TypeDef SPIx FunctionalState NewState Enables or disables the SS output for the selected SPI e SPlx where x can be 1 2 to select the SPI peripheral e NewState new state of the SPIx SS output This parameter can be ENABLE or DISABLE DocID 18540 Rev 1 Gr UM1061 Serial peripheral interface SPI Return values None Notes None 23 2 7 12 SPI 23 2 8 23 2 8 1 4 Function Name void SPI TIModeCmd SPI TypeDef SPIx FunctionalState NewState Function Description Enables or disables the SPIx I2Sx DMA interface Parameters SPIx where x be 1 2 3 NewState new state of the selected SPI communication mode This parameter can be ENABLE or DISABLE Return values e None Notes e This function can be called only after the SPI_Init function has been called e When TI mode is selected the control bits SSM SSI CPOL and CPHA are not taken into consideration and are configured by hardware respectively to the TI mode requirements Data transfers functions SPI 125 ReceiveData Function Name uint 6 t SPI 125 ReceiveData SP _Typ
190. 0 e _ JOuint32_t HASH_TypeDef SR HASH status register Address offset 0x24 e Uuint32 t HASH TypeDef RESERVED 52 Reserved 0x28 0xF4 e _ JOuint32_t HASH TypeDef CSR 51 HASH context swap registers Address offset 0 0 8 0 1 0 HASH_InitTypeDef HASH_InitTypeDef is defined in the stm32f2xx_hash h file and contains the HASH common initialization parameters Data Fields e uint32_t HASH AlgoSelection DocID 18540 Rev 1 4 UM1061 Hash processor HASH uint32 t HASH AlgoMode e uint32 t HASH DataType e uint32 t HASH HMACKeyType Field Documentation e uint32 t HASH InitTypeDef HASH AlgoSelection SHA 1 MD5 This parameter can be a value of HASH Algo Selection e uint32 t HASH InitTypeDef HASH AlgoMode HASH or HMAC This parameter can be a value of HASH processor Algorithm Mode e uint32_t HASH_InitTypeDef HASH_DataType 32 bit data 16 bit data 8 bit data or bit string This parameter can a value of HASH_Data_Type e uint32_t HASH InitTypeDef HASH HMACKeyType Short key or Long Key This parameter be value of HASH HMAC Long key only for HMAC mode 15 1 3 HASH MsgDigest HASH_MsgDigest is defined in the stm32f2xx_hash h Data Fields e 32 t Data Field Documentation e 32 t HASH_MsgDigest Data 5 Message digest result 5x 32bit words for SHA1 or 4x 32bit words for MD5 15 1 4 HASH_Context HASH Context is defined in the stm
191. 0 High Level AES functions 6 2 101 AES ECB 4 Function Name ErrorStatus CRYP AES ECB uint8 t Mode uint8 t Key uint16_t Keysize uint8 t Input uint32_t llength uint8_t DoclD 18540 Rev 1 141 634 Cryptographic processor CRYP UM1061 Function Description Parameters Return values Notes 6 2 10 2 CBC Function Name Function Description Parameters Return values Notes 142 634 Output Encrypt and decrypt using AES in ECB Mode Mode encryption or decryption Mode This parameter can be one of the following values MODE Encryption MODE DECRYPT Decryption Key Key used for AES algorithm Keysize length of the Key must be a 128 192 or 256 Input pointer to the Input buffer llength length of the Input buffer must be a multiple of 16 Output pointer to the returned buffer An ErrorStatus enumeration value SUCCESS Operation done ERROR Operation failed None ErrorStatus CRYP AES CBC uint8 t Mode uint8 t InitVectors uint8 Key uint16 t Keysize uint8 t Input uint32 t llength uint8 t Output Encrypt and decrypt using AES in CBC Mode Mode encryption or decryption Mode This parameter can be one of the following values MODE ENCRYPT Encryption MODE DECRYPT Decryption InitVectors Initialisation Vectors used for AES algorithm Key Key used for AES algorithm Keysize length of the Key mu
192. 0 uint32_t JOFR4 10 uint32_t HTR 10 uint32_t LTR 10 uint32_t SQR1 10 uint32_t SQR2 10 uint32_t SQR3 10 uint32_t JSQR 10 uint32_t JDR1 10 uint32_t JDR2 10 uint32_t JDR3 10 uint32_t JDR4 10 uint32_t DR Field Documentation 10 uint32_t ADC_TypeDef SR ADC status register Address offset 0x00 10 uint32_t ADC_TypeDef CR1 ADC control register 1 Address offset 0x04 10 uint32_t ADC_TypeDef CR2 ADC control register 2 Address offset 0x08 10 uint32_t ADC_TypeDef SMPR1 ADC sample time register 1 Address offset 10 uint32_t ADC_TypeDef SMPR2 ADC sample time register 2 Address offset 0x10 IO uint32 t ADC_TypeDef JOFR1 ADC injected channel data offset register 1 Address offset 0x14 IO uint32 t ADC TypeDef JOFR2 ADC injected channel data offset register 2 Address offset 0x18 IO uint32 t ADC TypeDef JOFR3 DoclID 18540 Rev 1 4 UM1061 Analog to digital converter ADC 3 1 2 ADC ADC injected channel data offset register 3 Address offset Ox1C IO uint32 t ADC TypeDef JOFRA ADC injected channel data offset register 4 Address offset 0x20 IO uint32 t ADC TypeDef HTR ADC watchdog higher threshold register Address offset 0x24 IO uint32 t ADC TypeDef LTR ADC watchdog lower threshold register Address offset 0x28 IO uint32 t ADC TypeDef SQH1 ADC regular sequence register 1 Address offset 0 2 IO uint32 t ADC TypeDeft SQR2 ADC regular sequence register 2 Address offset 0x30 IO uint32 t ADC
193. 0 uint32_t LCKR 10 uint32_t AFR Field Documentation 10 uint32_t GPIO_TypeDef MODER GPIO port mode register Address offset 0x00 10 uint32_t GPIO_TypeDef OTYPER GPIO port output type register Address offset 0x04 IO uint32 t TypeDef OSPEEDR GPIO port output speed register Address offset 0x08 IO uint32 t GPIO TypeDef PUPDR GPIO port pull up pull down register Address offset 10 uint32_t GPIO_TypeDef IDR GPIO port input data register Address offset 0x10 IO uint32 t GPIO TypeDef ODR GPIO port output data register Address offset 0x14 IO uint16 t GPIO TypeDef BSRRL GPIO port bit set reset low register Address offset 0x18 IO uint16 t GPIO TypeDef BSRRH GPIO port bit set reset high register Address offset 0x1A IO uint32 t GPIO TypeDef LCKR GPIO port configuration lock register Address offset 0x1C IO uint32 t GPIO_TypeDef AFR 2 GPIO alternate function registers Address offset 0x24 0x28 GPIO InitTypeDef InitTypeDefis defined in the stm32f2xx_gpio h DocID 18540 Rev 1 4 UM1061 General purpose Os GPIO 14 2 14 2 1 3 Data Fields uint32_t Pin GPIOMode TypeDef GPIO Mode GPlOSpeed TypeDef GPIO Speed GPIOOType TypeDef GPIO OType GPIOPuPd TypeDef GPIO PuPd Field Documentation uint32 t InitTypeDef GPIO Pin Specifies the GPIO pins to be configured This parameter can be any value of GPIO pins define GPlOMode TypeDef InitTyp
194. 000 e define USART CPOL High uint16 t 0x0400 05 Requests e define USART DMAReq Tx uint16 t 0x0080 e USART DMAReq Rx uint16 1 0 0040 USART Flags e define USART FLAG CTS uint16 1 0 0200 e define USART FLAG LBD uint16 1 0 0100 e define USART FLAG TXE uint16 1 0 0080 e define USART FLAG TC uint16 1 0x0040 e USART FLAG RXNE uint16 t 0x0020 DocID 18540 Rev 1 4 UM1061 Universal synchronous asynchronous receiver transmitter USART e define e define e define e define e define USART_FLAG_IDLE uint16_t 0x0010 USART_FLAG_ORE uint16_t 0x0008 USART_FLAG_NE uint16_t 0x0004 USART_FLAG_FE uint16_t 0x0002 USART_FLAG_PE uint16_t 0x0001 USART_Hardware_Flow_Control e define e define e define e define USART HardwareFlowControl None uint16 1 0x0000 USART HardwareFlowControl RTS uint16 1 0x0100 USART HardwareFlowControl CTS uint16 1 0x0200 USART HardwareFlowControl RTS CTS uint16 1 0x0300 USART Interrupt definition e didefine e didefine e didefine 3 USART_IT_PE uint16_t 0x0028 USART_IT_TXE uint16_t 0x0727 USART_IT_TC uint16_t 0x0626 DoclD 18540 Rev 1 613 634 Universal synchronous asynchronous receiver UM1061 transmitter USART 614 634 e define e define e define e define e define e define e define e define USART_IT_RXNE
195. 00000 ADC TwoSamplingDelay 19Cycles uint32 t 0x00000E00 DocID 18540 Rev 1 81 634 Analog to digital converter ADC UM1061 82 634 e define ADC TwoSamplingDelay 20Cycles uint32 t 0x00000F00 ADC Direct memory access mode for multi mode e define ADC DMAAccessMode Disabled uint32 1 0x00000000 e define ADC DMAAccessMode 1 uint32 1 0x00004000 e define ADC DMAAccessMode 2 uint32 1 0x00008000 e define ADC DMAAccessMode 3 uint32 1 0 0000 000 ADC external trigger edge for injected channels conversion e define ADC ExternalTriglnjecConvEdge None uint32 t 0x00000000 e define ADC ExternalTriglnjecConvEdge Rising uint32 t 0x00100000 e define ADC ExternalTriglnjecConvEdge Falling uint32 0 00200000 e define ADC ExternalTriglnjecConvEdge RisingFalling uint32 1 0x00300000 ADC external trigger edge for regular channels conversion e define ADC ExternalTrigConvEdge 2 1 0x00000000 e define ADC ExternalTrigConvEdge Rising uint32 1 0 10000000 DocID 18540 Rev 1 4 UM1061 Analog to digital converter ADC 3 define define ExternalTrigConvEdge Falling uint32 t 0x20000000 ADC ExternalTrigConvEdge RisingFalling uint32 1 0 30000000 ADC extrenal trigger sources for injected channels conversion define define define define define define define define define define ExternalTr
196. 00000001 FLASH End of Operation flag e define FLASH FLAG OPERR uint32 1 0x00000002 FLASH operation Error flag DocID 18540 Rev 1 3 UM1061 FLASH Memory FLASH 3 e define FLASH_FLAG_WRPERR uint32_t 0x00000010 FLASH Write protected error flag e define FLASH_FLAG_PGAERR uint32_t 0x00000020 FLASH Programming Alignment error flag e define FLASH_FLAG_PGPERR uint32_t 0x00000040 FLASH Programming Parallelism error flag e define FLASH_FLAG_PGSERR uint32_t 0x00000080 FLASH Programming Sequence error flag e define FLASH FLAG BSY uint32 1 0 00010000 FLASH Busy flag FLASH e define FLASH EOP uint32 1 0x01000000 End of FLASH Operation Interrupt source e define FLASH IT ERR uint32 t 0x02000000 Error Interrupt source FLASH Keys e didefine KEY uint16 t 0x00A5 e iidefine FLASH KEY1 uint32 1 0 45670123 e iidefine FLASH KEY2 uint32 t JOXCDEF89AB e define FLASH 1 32 1 0x08192A3B e define FLASH KEY2 uint32 t OXAC5BDGE7F DocID 18540 Rev 1 243 634 FLASH Memory FLASH UM1061 244 634 Flash Latency e define FLASH Latency 0 uint8 t 0x0000 FLASH Zero Latency cycle e define FLASH Latency 1 uint8 t 0x0001 FLASH One Latency cycle e define FLASH Latency 2 uint8 t 0x0002 FLASH Two Latency cycles e define FLASH Latency 8 t 0x0003 FLASH Three Latency cycles e
197. 00010 RCC_AHB1Periph_GPIOF uint32_t 0x00000020 RCC_AHB1Periph_GPIOG uint32_t 0x00000040 GPIOH uint32 t 0x00000080 RCC_AHB1Periph_GPIOI uint32_t 0x00000100 RCC_AHB1Periph_CRC uint32_t 0x00001000 RCC_AHB1Periph_FLITF uint32_t Ox00008000 RCC_AHB1Periph_SRAM1 uint32_t 0x00010000 RCC_AHB1Periph_SRAM2 uint32_t 0x00020000 RCC_AHB1Periph_BKPSRAM uint32_t 0x00040000 DoclID 18540 Rev 1 387 634 Reset and clock control RCC UM1061 388 634 define RCC_AHB1Periph_DMA1 uint32_t 0x00200000 define RCC_AHB1Periph_DMA2 uint32_t 0x00400000 define RCC_AHB1Periph_ETH_MAC uint32_t 0x02000000 define RCC_AHB1Periph_ETH_MAC_Tx uint32_t 0x04000000 define RCC_AHB1Periph_ETH_MAC_Rx uint32_t 0x08000000 define RCC_AHB1Periph_ETH_MAC_PTP uint32_t 0x10000000 define RCC_AHB1Periph_OTG_HS uint32_t 0x20000000 define RCC_AHB1Periph_OTG_HS_ULPI uint32_t 0x40000000 RCC_AHB2_Peripherals define RCC_AHB2Periph_DCMI uint32_t 0x00000001 define AHB2Periph CRYP uint32 1 0 00000010 define RCC_AHB2Periph_HASH uint32_t 0x00000020 define AHB2Periph RNG uint32 1 0 00000040 DoclD 18540 Rev 1 4 UM1061 Reset and clock control RCC 3 define RCC AHB2Periph OTG FS uint32 t 0x00000080 AHBS Peripherals define RCC_AHB3Periph_FSMC uint32_t 0x00000001 RCC_AHB_Clock_Source define defin
198. 00040 1 2 1 0 00000080 TIM14 uint32 1 0 00000100 RCC_APB1Periph_WWDG uint32_t 0x00000800 SPI2 uint32 t 0x00004000 RCC_APB1Periph_SPI3 uint32_t 0x00008000 RCC_APB1Periph_USART2 uint32_t 0x00020000 RCC_APB1Periph_USART3 uint32_t 0x00040000 RCC_APB1Periph_UART4 uint32_t 0x00080000 RCC_APB1Periph_UART5 uint32_t 0x00100000 RCC_APB1Periph_l2C1 uint32_t Ox00200000 APBiPeriph I2C2 uint32 1 0x00400000 DocID 18540 Rev 1 391 634 Reset and clock control RCC UM1061 define define define define define RCC_APB1Periph_l2C3 uint32_t Ox00800000 RCC_APB1Periph_CAN1 uint32_t 0x02000000 RCC_APB1Periph_CAN2 uint32_t 0x04000000 RCC_APB1Periph_PWR uint32_t 0x10000000 RCC_APB1Periph_DAC uint32_t 0x20000000 RCC_APB2_Peripherals 392 634 define define define define define define define 2 2 t 0x00000001 2 TIM8 uint32 1 0 00000002 RCC_APB2Periph_USART1 uint32_t 0x00000010 RCC_APB2Periph_USART6 uint32_t 0x00000020 APB2Periph ADC uint32 t 0x00000100 RCC APB2Periph ADCi uint32 1 0x00000100 RCC APB2Periph ADC2 uint32 1 0x00000200 DocID 18540 Rev 1 4 UM1061 Reset and clock control RCC 3 e define e de
199. 008800 DMA_IT_FEIF2 uint32_t 0x90010000 DMA IT DMEIF2 uint32 t 0x10041000 IT TEIF2 uint32 1 0x10082000 HTIF2 uint32 1 0 10104000 TCIF2 uint32 1 0 10208000 IT FEIFS3 uint32 1 0x90400000 DoclID 18540 Rev 1 4 UM1061 DMA controller DMA 3 define define define define define define define define define define define define DMA_IT_DMEIF3 uint32_t 0x11001000 DMA_IT_TEIF3 uint32_t 0x12002000 DMA_IT_HTIF3 uint32_t 0x14004000 DMA_IT_TCIF3 uint32_t 0x18008000 DMA IT FEIF4 uint32 t 0xA0000001 DMEIF4 uint32 1 0 20001004 IT TEIF4 uint32 1 0x20002008 HTIFA uint32 1 0 20004010 TCIFA4 uint32 1 0 20008020 IT FEIF5 uint32 t 0xA0000040 DMA IT DMEIF5 uint32 t 0x20001100 IT TEIF5 uint32 1 0 20002200 DocID 18540 Rev 1 211 634 DMA controller DMA UM1061 212 634 define define define define define define define define define define define define DMA_IT_HTIF5 uint32_t 0x20004400 DMA_IT_TCIF5 uint32_t 0x20008800 DMA IT FEIF6 uint32 t 0xA0010000 DMEIF6 uint32 t 0x20041000 IT TEIF6 uint32 1 0x20082000 DMA_IT_HTIF6 uint32_t 0x20104000 DMA_IT_TCIF6 uint32_t 0x20208000 DMA IT FEIF7 uint32 t 0xA0400000
200. 061 FLASH Memory FLASH Parameters e Address specifies the address to be programmed This parameter can be any address in Program memory zone or in OTP zone e Data specifies the data to be programmed Return values FLASH Status The returned value can be FLASH BUSY FLASH ERROR PROGRAM FLASH ERROR WRP FLASH ERROR OPERATION or FLASH COMPLETE Notes e This function can be used within all the device supply voltage ranges 12 2 8 Option bytes programming functions 12 2 8 1 OB Unlock Function Name void FLASH OB Unlock void Function Description Unlocks the FLASH Option Control Registers access Parameters e None Return values e None Notes e None 12 2 82 FLASH OB Lock Function Name void FLASH OB Lock void Function Description Locks the FLASH Option Control Registers access Parameters e None Return values e None Notes e None 4 DociD 18540 Rev 1 235 634 FLASH Memory FLASH UM1061 12 2 8 3 12 2 8 4 12 2 8 5 236 634 FLASH_OB_WRPConfig Function Name void FLASH OB WRPConfig uint32 t OB WRP FunctionalState NewState Function Description Enables or disables the write protection of the desired sectors Parameters e specifies the sector s to be write protected or unprotected This parameter can be one of the following values WRP A value between Sector0 and OB Sector11 WRP Sector All e Newstate new state of t
201. 08 FLAG HTIFO uint32 1 0 10000010 FLAG TCIFO uint32 1 0 10000020 FLAG FEIF1 uint32 t 0x10000040 FLAG DMEIF1 uint32 1 0 10000100 FLAG TEIF1 uint32 t 0x10000200 FLAG HTIF1 uint32 1 0x10000400 FLAG TCIF1 uint32 1 0 10000800 DMA FLAG FEIF2 uint32 t 0x10010000 DocID 18540 Rev 1 4 UM1061 DMA controller DMA 3 define define define define define define define define define define define define DMA FLAG DMEIF2 uint32 t 0x 10040000 DMA FLAG TEIF2 uint32 t 0x10080000 FLAG HTIF2 uint32 1 0 10100000 FLAG TCIF2 uint32 1 0 10200000 FLAG FEIFS3 uint32 t 0x10400000 FLAG DMEIFS uint32 t 0x11000000 FLAG TEIFS3 uint32 t 0x12000000 FLAG HTIFS3 uint32 1 0 14000000 FLAG TCIFS3 uint32 1 0 18000000 FLAG FEIF4 uint32 t 0x20000001 FLAG DMEIF4 uint32 1 0 20000004 FLAG TEIF4 uint32 t 0x20000008 DocID 18540 Rev 1 207 634 DMA controller DMA UM1061 208 634 define define define define define define define define define define define define DMA_FLAG_HTIF4 uint32_t 0x20000010 DMA_FLAG_TCIF4 uint32_t 0x20000020 DMA_FLAG_FEIF5 uint32_t 0x20000040 DMA FLAG DMEIF5 uint32 1 0x20000100 DMA FLAG TEIF5 uint32 t
202. 1 320 634 I2C_SMBusAlertConfig Function Name Function Description Parameters Return values Notes I2C ARPCmd Function Name Function Description Parameters Return values Notes void 2 SMBusaAlertConfig 2 TypeDef I2Cx uint16_t 2 SMBusAlert Drives the SMBusAlert pin high or low for the specified I2C I2Cx where x be 1 2 or 3 to select the 12C peripheral I2C_SMBusAlert specifies SMBAlert pin level This parameter can be one of the following values 2C SMBusAlert Low SMBAlert pin driven low JC SMBusAlert High SMBAlert pin driven high None None void 2 ARPCmd 2C TypeDef I2Cx FunctionalState NewState Enables or disables the specified 2 ARP I2Cx where x be 1 2 or 3 to select the I2C peripheral NewState new state of the I2Cx ARP This parameter can be ENABLE or DISABLE None None Data transfers functions I2C SendData Function Name void 2 SendData 2 TypeDef I2Cx uint8 t Data DoclD 18540 Rev 1 4 UM1061 Inter integrated circuit interface 2 Function Description Sends data byte through the 2 peripheral Parameters e 2 where x can be 1 2 3 to select the 12C peripheral e Data Byte to be transmitted Return values e None Notes e None 16 2 8 2 2 ReceiveData Function Name uint8 t I2C ReceiveData 2C TypeDef 2 Function Description Returns the most
203. 1 359 634 Reset and clock control RCC UM1061 Wait states HCLK clock frequency MHz Voltage range 2 7 to Voltage range 2 4 to Voltage range 2 1 to Voltage range 1 8 to latency 3 6 V 27V 24V 2 1 V cycle 5WS 6CPU NA NA 90 HCLK x 108 80 HCLK s 96 cycle 6WS 7CPU NA NA 108 HCLK s 120 96 HCLK s 112 cycle 7WS 8CPU NA NA NA 12 HCLKs 120 cycle e RCC SYSCLKConfig e RCC GetSYSCLKSource RCC HCLKConfig e RCC_PCLK1Config e RCC_PCLK2Config e RCC_GetClocksFreq 19 2 4 Peripheral clocks configuration This section provide functions allowing to configure the Peripheral clocks e The RTC clock which is derived from the LSI LSE or HSE clock divided by 2 to 31 e After restart from Reset or wakeup from STANDBY all peripherals are off except internal SRAM Flash and JTAG Before to start using a peripheral you have to enable its interface clock You can do this using RCC_AHBPeriphClockCmd APB2PeriphClockCmd RCC_APB1PeriphClockCmd functions e Toresetthe peripherals configuration to the default state after device reset you can use RCC AHBPeriphResetCmd RCC APB2PeriphResetCmd and RCC_APB1PeriphResetCmd functions e further reduce power consumption in SLEEP mode the peripheral clocks can be disabled prior to executing the WFI or WFE instructions You can do this using RCC_AHBPeriphClockLPModeCmd RCC_APB2PeriphClockLPModeCmd
204. 1 4 UM1061 Real time clock RTC 21 2 8 6 21 2 8 7 3 Notes ExitlnitMode SUCCESS RTC is in Init mode ERROR RTC is not in Init mode The RTC Initialization mode is write protected use the RTC_WriteProtectionCmd DISABLE before calling this function Function Name void RTC ExitlnitMode void Function Description Exits the RTC Initialization mode Parameters e None Return values e None Notes e When the initialization sequence is complete the calendar RTC_WaitForSynchro restarts counting after 4 RTCCLK cycles The RTC Initialization mode is write protected use the RTC_WriteProtectionCmd DISABLE before calling this function Function Name ErrorStatus RTC_WaitForSynchro void Function Description Waits until the RTC Time and Date registers RTC_TR and RTC_DR are synchronized with RTC APB clock Parameters Return values Notes None An ErrorStatus enumeration value SUCCESS HTC registers are synchronised ERROR HTC registers are not synchronised The RTC Resynchronization mode is write protected use the RTC_WriteProtectionCmd DISABLE before calling this function To read the calendar through the shadow registers after Calendar initialization calendar update or after wakeup from low power modes the software must first clear the RSF flag The software must then wait until it is set again before reading the calendar which means that the calendar register
205. 15 2 13 1 15 2 13 2 304 634 Function Name Function Description Parameters Return values Notes void HASH CleariTPendingBit uint8_t HASH Clears the HASH interrupt pending bit s HASH specifies the HASH interrupt pending bit s to clear This parameter can be any combination of the following values HASH_IT_DINI Data Input interrupt A HASH IT DCI Digest Calculation Completion Interrupt None None High Level SHA1 functions HASH SHA1 Function Name Function Description Parameters Return values Notes HMAC SHA1 Function Name Function Description Parameters ErrorStatus HASH uint8 t Input uint32 t uint8 t Output Compute the HASH 5 digest Input pointer to the Input buffer to be treated llen length of the Input buffer Output the returned digest An ErrorStatus enumeration value SUCCESS digest computation done ERROR digest computation failed None ErrorStatus HMAC uint8 Key uint32 t Keylen uint8 t Input uint32 t uint8 t Output Compute the HMAC SHA1 digest Key pointer to the Key used for HMAC Keylen length of the Key used for HMAC Input pointer to the Input buffer to be treated llen length of the Input buffer DoclD 18540 Rev 1 UM1061 Hash processor HASH e Output the returned digest Return values An ErrorStatus enumeration value SUCCESS digest computatio
206. 16_t RCR uint16 t RESERVED10 10 uint32 t CCH1 10 uint32 t CCR2 JO uint32 t 10 uint32 t CCR4 10 16 t BDTR uint16 t RESERVED11 16 t DCR uint16 t RESERVED12 16 t DMAR uint16 t RESERVED13 16 t OR 16 t RESERVED14 Field Documentation DocID 18540 Rev 1 517 634 General purpose timers TIM UM1061 518 634 JO uint16_t TIM_TypeDef CR1 control register 1 Address offset 0x00 uint16 t TypeDef RESERVEDO Reserved 0 02 JO uint16 t TypeDef CR2 control register 2 Address offset 0x04 uint16 t TypeDef RESERVED1 Reserved 0x06 JO uint16 t TypeDef SMCR slave mode control register Address offset 0x08 uint16 t TypeDef RESERVED2 Reserved JO uint16 t TIM_TypeDef DIER DMA interrupt enable register Address offset uint16 t TypeDef RESERVEDS3 Reserved JO uint16_t TIM_TypeDef SR TIM status register Address offset 0x10 uint16_t TIM_TypeDef RESERVED4 Reserved 0x12 16 t TypeDef EGR event generation register Address offset 0x14 uint16 t TIM_TypeDef RESERVED5 Reserved 0x16 JO uint16 t TIM_TypeDef CCMR1 capture compare mode register 1 Address offset 0x18 uint16 t TypeDef RESERVED6 Reserved 0x1A JO uint16 t TypeD
207. 2 2 controller enne 258 13 23 258 13 2 4 Interrupt and flag management 259 13 25 SRAM controller 8 259 13 2 6 controller functions 261 13 27 PCCARD 263 13 2 8 Interrupt and flag management 265 13 3 FSMC Firmware driver 5 267 13 3 1 Firmware driver 5 267 134 FSMC Programming 273 14 General purpose I Os GPIO 274 14 4 Firmware driver registers 274 144 1 GPIO usine ndun ids inscia in da ode tabe 274 14 1 2 GPIO 274 14 2 GPIO Firmware driver API description 275 DoclID 18540 Rev 1 7 634 Contents UM1061 14 2 1 to use this 22 2 275 14 2 2 Initialization and 276 14 23 GPIO Read 276 14 24 Alternate functions 276 14 2 5 Initialization and configuration
208. 3 0 3 2 bits for pre emption priority 2 bits for subpriority NVIC_PriorityGroup_3 0 7 0 1 3 bits for pre emption priority 1 bits for subpriority NVIC_PriorityGroup_4 0 15 0 4 bits for pre emption priority 0 bits for subpriority Enable and Configure the priority of the selected IRQ Channels using NVIC Init When the NVIC_PriorityGroup_0 is selected IRQ pre emption is no more possible The pending IRQ priority will be managed only by the subpriority IRQ priority order sorted by highest to lowest priority Lowest pre emption priority Lowest subpriority e Lowest hardware priority IRQ number Functions e PriorityGroupConfig e NVIC Init e SetVectorTable e SystemLPConfig e SysTick CLKSourceConfig Functions NVIC Init Function Name void NVIC Init NVIC InitTypeDef NVIC InitStruct Function Description Initializes the NVIC peripheral according to the specified parameters in the NVIC_InitStruct Parameters e NVIC_InitStruct pointer to InitTypeDef structure that contains the configuration information for the specified NVIC peripheral Return values None Notes e configure interrupts priority correctly the NVIC_PriorityGroupConfig function should be called before NVIC_PriorityGroupConfig DoclD 18540 Rev 1 4 UM1061 Miscellaneous add on to CMSIS functions misc 28 2 2 3 3 Function Function Description Parameters Retu
209. 32 1 0x00000004 SDIO Wait Interrupt State e define SDIO Wait No uint32 t 0x00000000 SDIO No Wait TimeOut is enabled e define SDIO Wait IT uint32 1 0 00000100 SDIO Wait Interrupt Request e SDIO Wait Pend uint32 1 0x00000200 SDIO Wait End of transfer SDIO Programming Example The example below provides a typical configuration of the SDIO peripheral For more examples about SDIO configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx StdPeriph Examples SDIO define SDIO TRANSFE SDIO InitTypeDef 5 R CLK DIV DIO Tales Enable SDIO Clock RCC PSicijolaC loc Im Coire igure Eme S kCmd RCC_AP SDIO_ CK SDIOCLK 2 8 On STM32F2xx devices uf SDIO litio SDIO SEE DIE EDS SDIO Tnitgtructure SDIO IMmitSETUCTUTE esiko eds DIO Clock lock SDIO Clock do Up gm SDIO ClockPowerSave Disable DocID 18540 Rev 1 DIO peripheral SDIOCLK is fixed to uint8 t 0x00 ucture B2Periph SDIO ENABLE TRANSFER DIV 48MHz Div SDIO TRANSFER CLK DIV 2666 SDIO Mo elc MERERI 5ypass SDIO Clocksyoass Disable PowerSave 479 634 Secure digital input output interface SDIO UM1061 SDIO InitStructure SDIO BusWide SDIO BusWide 1b SDIO InitStructure SD
210. 32f2xx_hash h Data Fields uint32_t HASH_IMR uint32 t HASH STR uint32 t HASH CR uint32 t HASH CSR Field Documentation e uint32 t HASH Context HASH 3 DocID 18540 Rev 1 293 634 Hash processor HASH UM1061 15 2 15 2 1 294 634 e uint32 t HASH_Context HASH_STR e uint32 t HASH Context HASH CR uint32_t HASH_Context HASH_CSR 51 HASH Firmware driver API description The following section lists the various functions of the HASH library How to use this driver HASH operation 1 Enable the HASH controller clock using RCC_AHB2PeriphClockCmd RCC_AHB2Periph_HASH ENABLE function 2 Initialize the HASH using HASH_Init function 3 Reset the HASH processor core so that the HASH will be ready to compute he message digest of a new message by using HASH Reset function 4 Enable the HASH controller using the HASH_Cmd function 5 ifusing DMA for Data input transfer Activate the DMA Request using HASH_DMACmd function 6 if DMA is not used for data transfer use HASH Dataln function to enter data to IN FIFO 7 Configure the Number of valid bits in last word of the message using HASH_SetLastWordValidBitsNbr function 8 Ifthe message length is not an exact multiple of 512 bits then the function HASH StartDigest must be called to launch the computation of the final digest 9 Once computed the digest can be read using HASH_GetDigest function 10 To control HASH events you c
211. 34 Reset and clock control RCC UM1061 19 2 8 19 2 8 1 19 2 8 2 372 634 other parameters Each time SYSCLK HCLK PCLK1 and or PCLK2 clock changes this function must be called to update the structure s field Otherwise any configuration based on this function will be incorrect Peripheral clocks configuration functions RTCCLKConfig Function Name void RCC RTCCLKConfig uint32 t RCC RTCCLKSource Function Description Configures the RTC clock RTCCLK Parameters e Return values e Notes RCC RTCCLKCmd RCC RTCCLKSource specifies the RTC clock source This parameter can be one of the following values RTCCLKSource LSE LSE selected as RTC clock RTCCLKSource LSI LSI selected as RTC clock RCC_RTCCLKSource_HSE_Divx HSE clock divided by x selected as RTC clock where x 2 31 None As the RTC clock configuration bits are in the Backup domain and write access is denied to this domain after reset you have to enable write access using PWR_BackupAccessCmd ENABLE function before to configure the RTC clock source to be done once after reset Once the RTC clock is configured it can t be changed unless the Backup domain is reset using RCC_BackupResetCmd function or by a Power On Reset POR If the LSE or LSI is used as RTC clock source the RTC continues to work in STOP and STANDBY modes and can be used as wakeup source However when the HSE clock is used as RTC clock s
212. 4 DocID 18540 Rev 1 4 UM1061 General purpose timers TIM 3 Output Compare Idle State e define OCNIdleState Set uint16 t 0x0200 e didefine TIM OCNIdleStiate Reset uint16 1 0x0000 TIM Output Compare N Polarity e didefine OCNPolarity High uint16 1 0x0000 e define OCNPolarity Low uint16 t 0x0008 TIM Output Compare N State e define OutputNState Disable uint16 t 0x0000 e OutputNState Enable uint16 t 0x0004 TIM Output Compare Polarity e didefine OCPolarity High uint16 t 0x0000 e define OCPolarity Low uint16 1 0x0002 TIM Output Compare Preload State e didefine OCPreload Enable uint16 1 0 0008 e didefine OCPreload Disable uint16 1 0x0000 DocID 18540 Rev 1 583 634 General purpose timers TIM UM1061 584 634 TIM_Output_Compare_State e define e define TIM OutputState Disable uint16 t 0x0000 OutputState Enable uint16 t 0x0001 TIM Prescaler Reload Mode e ididefine e define TIM Remap e define e define e define e define e define e define e define PSCHReloadMode Update uint16 t 0x0000 PSCReloadMode Immediate uint16 1 0x0001 TIM2 TIM8 TRGO uint16 1 0x0000 2 PTP uint16 1 0 0400 TIM2_USBFS_SOF uint16_t 0x0800 TIM2 USBHS SOF uint16 t 0x0CO00 TIM5 GPlO uint16 t 0x0000 TIM5 LSl uin
213. 4OF TIM Capture Compare 4 over capture Flag Return values e None Notes e TIM6 and can have only one update flag e FLAG COM and TIM FLAG Break are used only with TIM1 and TIM8 25 2 13 5 TIM GetlTStatus Function Name ITStatus GetlTStatus TypeDef uint16_t TIM IT Function Description Checks whether the TIM interrupt has occurred or not Parameters TIMx where x can be 1 to 14 to select the TIM peripheral IT specifies the TIM interrupt source to check This parameter can be one of the following values TIM IT Update TIM update Interrupt source TIM IT CC1 TIM Capture Compare 1 Interrupt source IT 2 TIM Capture Compare 2 Interrupt source TIM IT TIM Capture Compare Interrupt source TIM IT 4 TIM Capture Compare 4 Interrupt source IT TIM Commutation Interrupt source IT Trigger Trigger Interrupt source TIM IT Break TIM Break Interrupt source Return values The new state of the TIM IT SET or RESET Notes e TIM6 and can generate only an update interrupt TIM IT COM and TIM IT Break are used only with TIM1 and TIM8 25 2 13 6 _ClearlTPendingBit Function Name void TIM_ClearlTPendingBit T M_TypeDef uint16_t TIM IT Function Description Clears the TIMx s interrupt pending bits Parameters e TIMx where x be 1 to 14 to select the TIM peripheral TIM spec
214. 540 Rev 1 Ly UM1061 DMA controller DMA 10 2 5 10 2 5 1 10 2 5 2 Data Counter functions DMA SetCurrDataCounter Function Name void SetCurrDataCounter Stream TypeDef DMAy Streamx uint16_t Counter Function Description Writes the number of data units to be transferred on the DMAy Streamx Parameters Return values Notes Streamx where y be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream Counter Number of data units to be transferred from 0 to 65535 Number of data items depends only on the Peripheral data format The number of remaining data units in the current DMAy transfer If Peripheral data format is Bytes number of data units is equal to total number of bytes to be transferred If Peripheral data format is Half Word number of data units is equal to total number of bytes to be transferred 2 If Peripheral data format is Word number of data units is equal to total number of bytes to be transferred 4 In Memory to Memory transfer mode the memory buffer pointed by DMAy SxPAR register is considered as Peripheral DMA GetCurrDataCounter Function Name uint amp t GetCurrDataCounter Stream TypeDef DMAy Streamx Function Description Returns the number of remaining data units in the current DMAy Streamx transfer Parameters e Return values e Notes DMAy Streamy where be 1
215. 6 SYSCLK Div512 AHB clock SYSCLK 512 None Depending on the device voltage range the software has to set correctly these bits to ensure that HCLK not exceed the maximum allowed frequency for more details refer to section above CPU AHB and APB busses clocks configuration functions Function Name void PCLK1Config uint32 t RCC HCLK Function Description Configures the Low Speed APB clock PCLK1 Parameters e Return values e Notes 19 2 7 5 RCC PCLK2Config 370 634 RCC defines the APB1 clock divider This clock is derived from the AHB clock HCLK This parameter can be one of the following values HCLK Div1 APB1 clock HCLK HCLK Div2 APB1 clock HCLK 2 HCLK Div4 APB1 clock HCLK 4 RCC HCLK Div8 APB1 clock HCLK 8 HCLK Div16 APB1 clock HCLK 16 None None DoclD 18540 Rev 1 UM1061 Reset and clock control RCC 19 2 7 6 3 void PCLK2Config uint32 t RCC Function Description Configures the High Speed APB clock PCLK2 Parameters e HCLK defines the APB2 clock divider This clock is derived from the AHB clock HCLK This parameter can be one of the following values RCC_HCLK_Div1 APB2 clock HCLK HCLK Div2 APB2 clock HCLK 2 HCLK Div4 APB2 clock HCLK 4 HCLK Div8 APB2 clock HCLK 8 HCLK Div16
216. 6 6 1 6 1 1 3 Cryptographic processor CRYP Firmware driver registers structures CRYP_TypeDef CRYP TypeDef is defined in the stm32f2xx h file and contains the CRYP registers definition Data Fields 10 uint32_t CR 10 uint32_t SR 10 uint32_t DR 10 uint32_t DOUT 10 uint32_t DMACR IO uint32 t IMSCR IO uint32 t RISR IO uint32 t MISR IO uint32 t KOLR IO uint32 t KORR IO uint32 t KILR IO uint32 t K1RR IO uint32 t K2LR IO uint32 t K2RR IO uint32 t K3LR IO uint32 t K3RR IO uint32 t IVOLR IO uint32 t IVORR IO uint32 t IV1LR IO uint32 t IVIRR Field Documentation IO uint32 t CRYP TypeDef CR CRYP control register Address offset 0x00 IO uint32 t CRYP TypeDef SR CRYP status register Address offset 0x04 IO uint32 t CRYP TypeDef DR CRYP data input register Address offset 0x08 IO uint32 t CRYP TypeDef DOUT CRYP data output register Address offset IO uint32 t TypeDef DMACR CRYP DMA control register Address offset 0x10 IO uint32 t CRYP TypeDef IMSCR CRYP interrupt mask set clear register Address offset 0x14 IO uint32 t TypeDef RISR CRYP raw interrupt status register Address offset 0x18 IO uint32 t CRYP TypeDef MISR DocID 18540 Rev 1 127 634 Cryptographic processor CRYP UM1061 128 634 CRYP masked interrupt status register Address offset 0x1C JO uint32 t CRYP_TypeDef KOLR CRYP key left register 0 Address offset 0x20 JO uint32 t CR
217. 7 19 2 1 RCC specific 4440440 enne 357 19 2 2 Internal and external clocks PLL CSS MCO configuration 358 19 2 3 System AHB and APB busses clocks configuration 359 19 2 4 Peripheral clocks configuration 360 19 2 5 Interrupt and flag management 361 19 2 6 Internal and external clocks PLL CSS and MCO configuration functions 361 19 2 7 System AHB and busses clocks configuration functions 368 19 2 8 Peripheral clocks configuration 372 19 2 9 Interrupt and flag management 384 19 3 RCC Firmware driver defines 386 19 31 RCC Firmware driver defines 386 19 4 RCC Programming 400 20 Random number generator RNG 403 20 1 RNG Firmware driver registers 403 20411 TypeDef nuez erede ere 403 20 2 RNG Firmware driver API description 403 20 2 1 Howto use this 403 20 2 2 Initialization and 403 20 2 3 Getting 32 bit Random 404 20 2 4 Interrupt
218. 8540 Rev 1 25 634 STM32F2xx Standard Peripheral Library UM1061 Required Advisory Summary Reason 2004 rule number different underlying type 10 6 Reguired A U suffix shall be applied to all constants The stdint h defined types are of unsigned type used to be CMSIS compliant 11 2 Required Conversions shall not be performed Needed when addressing between a pointer to object and any type memory mapped registers other than an integral type another pointer to object type or a pointer to void 11 3 Advisory A cast should not be performed between Needed when addressing pointer type and an integral type memory mapped registers 16 7 Advisory A pointer parameter in a function prototype should be declared as pointer to const if the pointer is not used to modify the addressed object 19 1 Advisory include statements in a file shall only be This rule was violated to be in preceded by other preprocessor directives line with the CMSIS or comments architecture How to check that your code is MISRA C 2004 compliant The default IAR project template provided with the STM32F2xx Standard Peripheral Library is already pre configured for MISRA C 2004 compliance Then the user has to enable the MISRA C 2004 checker if needed To enable the IAR MISRA C 2004 checker go to Project gt Options ALT F7 and then in General Options Category select the MISRA C 2004 tab and check the Enable
219. A Channel Specifies the channel used for the specified stream This parameter canbe a value of DMA channel uint32 t InitTypeDef DMA PeripheralBaseAddr Specifies the peripheral base address for DMAy Streamx uint32 t InitTypeDef DMA Memory0BaseAddr Specifies the memory 0 base address for DMAy Streamx This memory is the default memory used when double buffer mode is not enabled uint32 t DMA InitTypeDef DMA DIR Specifies if the data will be transferred from memory to peripheral from memory to memory or from peripheral to memory This parameter can be a value of DMA data transfer direction uint32 t DMA InitTypeDef DMA BufferSize DocID 18540 Rev 1 4 UM1061 DMA controller DMA Specifies the buffer size in data unit the specified Stream The data unit is equal to the configuration set in DMA_PeripheralDataSize or DMA_MemoryDataSize members depending in the transfer direction e uint32 t DMA_InitTypeDef DMA_Peripheralinc Specifies whether the Peripheral address register should be incremented or not This parameter be a value of DMA_peripheral_incremented_mode e uint32 t DMA InitTypeDef DMA Memorylnc Specifies whether the memory address register should be incremented or not This parameter can be a value of DMA_memory_incremented_mode e uint32 t DMA_InitTypeDef DMA_PeripheralDataSize Specifies the Peripheral data width This parameter can be a value of DMA peripheral data s
220. A2 StreamO0 DMA Cmd DMA2 Stream0 ENABLE 216 634 DoclD 18540 Rev 1 4 UM1061 External interrupt event controller 11 External interrupt event controller 11 1 EXTI Firmware driver registers structures 11 1 1 EXTI TypeDef TypeDet is defined in the stm32f2xx h file and contains the EXTI registers definition Data Fields 10 uint32 t IMR 10 uint32 t EMR O uint32 t RTSR IO uint32 t FTSR 10 uint32 t SWIER IO uint32 t PR Field Documentation e _ 32 t EXTI_TypeDef IMR Interrupt mask register Address offset 0 00 e __ 32 t EXTI TypeDef EMR Event mask register Address offset 0 04 e _ JOuint32_t EXTI TypeDef RTSR Rising trigger selection register Address offset 0x08 e _ JOuint32_t EXTI TypeDef FTSR Falling trigger selection register Address offset 0 0 e 2 t EXTI TypeDef SWIER Software interrupt event register Address offset 0x10 JOuint32_t EXTI TypeDef PR Pending register Address offset 0x14 11 1 2 EXTI_InitTypeDef EXTI_InitTypeDefis defined in the stm32f2xx_exti h Data Fields uint32_t EXTI Line EXTIMode TypeDef EXTI Mode e EXTITrigger TypeDef EXTI Trigger FunctionalState EXTI LineCmd Field Documentation e uint32 t EXTI InitTypeDef EXTI Line 3 DoclD 18540 Rev 1 217 634 External interr
221. ABLE or DISABLE Return values e None Notes e When the DAC channel is enabled the trigger source can no more be modified DAC_SoftwareTriggerCmd Function Name void DAC SoftwareTriggerCmd uint32 t DAC Channel FunctionalState NewState Function Description Enables or disables the selected DAC channel software trigger Parameters e Return values Notes DAC Channel The selected DAC channel This parameter can be one of the following values DAC Channel 1 DAC Channeli selected DAC Channel 2 DAC Channel selected NewState new state of the selected DAC channel software trigger This parameter can be ENABLE or DISABLE None None DAC DualSoftwareTriggerCmd Function Name void DAC DualSoftwareTriggerCmd FunctionalState NewState DoclD 18540 Rev 1 155 634 Digital to analog converter DAC UM1061 7 2 6 7 7 2 6 8 156 634 Function Description Enables or disables simultaneously the two DAC channels software triggers Parameters Return values Notes NewState new state of the DAC channels software triggers This parameter can be ENABLE or DISABLE None None DAC_WaveGenerationCmd Function Name void DAC_WaveGenerationCmd uint32_t DAC_Channel uint32_t DAC_Wave FunctionalState NewState Function Description Enables or disables the selected DAC channel wave generation Parameters e DAC Channel The selected DAC channel This parameter can be one of the followi
222. ADC_TypeDef stm32fxx h file Almost all peripheral function names are preceded by the corresponding peripheral acronym in upper case followed by an underscore The first letter in each word is in upper case for example USART SendData Only one underscore is allowed in a function name to separate the peripheral acronym from the rest of the function name The structure containing the initialization parameters for the PPP peripheral are named PPP InitTypeDef e g InitTypeDet The functions used to initialize the PPP peripheral according to parameters specified in PPP InitTypeDef are named PPP Init e g Init The functions used to reset the PPP peripheral registers to their default values are named PPP Delnit e g TIM Delnit The functions used to fill the PPP InitTypeDef structure with the reset values of each member are named PPP Structlnit e g USART Structlnit The functions used to enable or disable the specified PPP peripheral are named PPP Cmd for example USART Cmd The functions used to enable or disable an interrupt source for the specified PPP peripheral are named PPP ITConfig e g ITConfig The functions used to enable or disable the DMA interface for the specified PPP peripheral are named PPP DMAContfig e g DMAContig The functions used to configure a peripheral function always end with the string Config for example GPIO PinAFConfig The functions used to check whether the specified PPP
223. AHB1Periph PPPx ENABLE RCC AHB2PeriphClockCmd RCC AHB2Periph PPPx ENABLE RCC AHB3PeriphClockCmd RCC AHBS3Periph PPPx ENABLE RCC APB2PeriphClockCmd RCC APB2Periph PPPx ENABLE RCC APB1PeriphClockCmd RCC APB1Periph PPPx ENABLE For example the following function should be used to enable USART1 interface clock 2 APB2Periph USART1 ENABLE For more details refer to Section 19 Heset and clock control RCC Configure the clock source s for peripherals which clocks are not derived from the System clock 125 5 2 2 125 clock can be derived either from a specific PLL PLLI2S or from an external clock mapped on the I2S_CKIN pin For more details refer to Section 23 Serial perihperal interface SPI b RTC STM32F2xx RTC clock can be derived either from LSI LSE or HSE clock divided by 2 to 31 For more details refer to Section 21 Real time clock RTC c USB OTG FS SDIO in STM32F2xx devices the USB OTG FS requires a frequency equal to 48 MHz to work correctly while the SDIO requires a frequency equal or lower than to 48 MHz For more details refer to Section 22 Secure digital input output interface SDIO d ADC STM32F2xx ADC features two clock schemes Clock for the analog circuitry ADCCLK This clock is common to all ADCs It is generated from the APB2 clock divided by a programmable prescaler that allows the ADC to work at fPCLK2 2 4
224. APB2 clock HCLK 16 Return values e None Notes e None RCC GetClocksFreq Function Name void RCC GetClocksFreq RCC ClocksTypeDef RCC Clocks Function Description Returns the frequencies of different on chip clocks SYSCLK HCLK PCLK1 and PCLK2 Parameters e Return values Notes Clocks pointer toa RCC ClocksTypeDef structure which will hold the clocks freguencies None The system freguency computed by this function is not the real frequency in the chip It is calculated based on the predefined constant and the selected clock source If SYSCLK source is HSI function returns values based on HSI VALUE If SYSCLK source is HSE function returns values based on HSE VALUE If SYSCLK source is PLL function returns values based on HSE VALUE or HSI VALUE multiplied divided by the PLL factors HSI VALUE is a constant defined in stm32f2xx h file default value 16 MHz but the real value may vary depending on the variations in voltage and temperature HSE VALUE is a constant defined in stm32f2xx h file default value 25 MHz user has to ensure that HSE VALUE is same as the real frequency of the crystal used Otherwise this function may have wrong result The result of this function could be not correct when using fractional value for HSE crystal This function can be used by the user application to compute the baudrate for the communication peripherals or configure DoclD 18540 Rev 1 371 6
225. APB2Periph 9 9 clock RCC 2 TIM10 TIM10 clock RCC 2 TIM11 TIM11 clock NewState new state of the specified peripheral clock This parameter can be ENABLE or DISABLE None Peripheral clock gating in SLEEP mode can be used to further reduce power consumption After wakeup from SLEEP mode the peripheral clock is enabled again By default all peripheral clocks are enabled during SLEEP mode 19 2 9 Interrupt and flag management functions 19 2 9 1 RCC ITContfig Function Name void RCC uint8 t RCC IT FunctionalState NewState Function Description Enables or disables the specified RCC interrupts Parameters e Return values Notes 19 2 9 2 RCC GetFlagStatus 384 634 RCC specifies the RCC interrupt sources to be enabled or disabled This parameter can be any combination of the following values IT LSIRDY LSI ready interrupt IT LSERDY LSE ready interrupt IT HSIRDY HSI ready interrupt RCC IT HSERDY HSE ready interrupt IT PLLRDY main PLL ready interrupt IT PLLI2SRDY PLLI2S ready interrupt NewState new state of the specified RCC interrupts This parameter can be ENABLE or DISABLE None None DoclD 18540 Rev 1 4 UM1061 Reset and clock control RCC Function Name FlagStatus RCC GetFlagStatus uint8_t RCC FLAG Function Description Checks wh
226. ARDInitTypeDef structure that contains the configuration information for the FSMC PCCARD Bank Return values e None Notes e None 13 2 3 PCCARDStructlnit 13 2 7 4 264 634 Function Name void FSMC PCCARDStructlnit FSMC PCCARDiInitTypeDef FSMC PCCARDInitStruct Function Description Fills each FSMC_PCCARDInitStruct member with its default value Parameters e FSMC PCCABDinitStruct pointer to FSMC PCCARDInitTypeDef structure which will be initialized Return values e None Notes e None FSMC PCCARDCmd Function Name void FSMC_PCCARDCmd FunctionalState NewState Function Description Enables or disables the PCCARD Memory Bank Parameters e NewState new state of the PCCARD Memory Bank This parameter can be ENABLE or DISABLE Return values e None Notes e None DoclD 18540 Rev 1 4 UM1061 Flexible static memory controller FSMC 13 2 8 Interrupt and flag management functions 13 2 8 1 FSMC_ITConfig Function Name void FSMC_ TConfig uint32 t FSMC Bank uint32 t FSMC IT FunctionalState NewState Function Description Enables or disables the specified FSMC interrupts Parameters e Bank specifies the FSMC Bank to be used This parameter can be one of the following values FSMC 2 FSMC 2 FSMC Bank3 FSMC Bank3 FSMC Bank4 PCCARD FSMC Bank4 PCCARD e FSMC specifies the FSMC interrupt sources to be enabled or disabled This p
227. ART IDLE Idle line detection interrupt USART IT Parity Error interrupt USART ERR Error interrupt Frame error noise error overrun error e NewState new state of the specified USARTx interrupts This parameter can be ENABLE or DISABLE Return values e None Notes e None 26 2 19 2 USART GetFlagStatus Function Name FlagStatus USART GetFlagStatus USART TypeDef USARTX uint 6 t USART FLAG 608 634 DoclID 18540 Rev 1 UM1061 Universal synchronous asynchronous receiver transmitter USART Function Description Parameters Return values Notes 26 2 19 3 USART ClearFlag Function Name Function Description Parameters Return values Notes 4 Checks whether the specified USART flag is set or not USARTx where can be 1 2 3 4 5 or 6 to select the USART or UART peripheral USART FLAG specifies the flag to check This parameter can be one of the following values USAHRT FLAG CTS CTS Change flag not available for UART4 and UART5 USART FLAG LBD LIN Break detection flag USART FLAG Transmit data register empty flag USART FLAG Transmission Complete flag USARHT FLAG RXNE Receive data register not empty flag USART FLAG IDLE Idle Line detection flag USART FLAG ORE OverRun Error flag USART FLAG Noise Error flag USART FLAG FE Framing Error flag USART FLAG Parity Error flag
228. Bit Segment 1 This parameter be a value of CAN_time_quantum_in_bit_segment_1 uint8_t CAN_InitTypeDef CAN_BS2 Specifies the number of time quanta in Bit Segment 2 This parameter be a value of CAN_time_quantum_in_bit_segment_2 FunctionalState CAN InitTypeDef CAN TTCM Enable or disable the time triggered communication mode This parameter can be set either to ENABLE or DISABLE FunctionalState CAN_InitTypeDef CAN_ABOM Enable or disable the automatic bus off management This parameter can be set either to ENABLE or DISABLE FunctionalState CAN InitTypeDef CAN AWUM Enable or disable the automatic wake up mode This parameter be set either to ENABLE or DISABLE FunctionalState CAN_InitTypeDef CAN_NART Enable or disable the non automatic retransmission mode This parameter can be set either to ENABLE or DISABLE FunctionalState CAN InitTypeDef CAN RFLM Enable or disable the Receive FIFO Locked mode This parameter can be set either to ENABLE or DISABLE FunctionalState CAN InitTypeDef CAN TKFP Enable disable the transmit FIFO priority This parameter be set either to ENABLE or DISABLE DocID 18540 Rev 1 93 634 Controller area network CAN UM1061 4 1 6 94 634 CAN FilterlnitTypeDef CAN FilterlnitTypeDef is defined in the stm32f2xx_can h Data Fields uint16 t CAN FilterldHigh uint16 t CAN FilterldLow uint16 t CAN FilterMaskldHigh uint16 t CAN FilterMaskldL
229. C WakeUpCmd Daylight Saving configuration functions This section provide functions allowing to configure the RTC DayLight Saving e HTC DayLighiSavingConfig e RTC GetStoreOperation Output pin Configuration function This section provide functions allowing to configure the RTC Output source e DocID 18540 Rev 1 4 UM1061 Real time clock RTC 21 2 8 21 2 8 1 21 2 8 2 4 Coarse Calibration configuration functions e RTC CoarseCalibConfig RTC_CoarseCalibCmd e RTC_CalibOutputCmd TimeStamp configuration functions RTC_TimeStampCmd RTC_GetTimeStamp Tampers configuration functions e RTC_TamperTriggerConfig RTC_TamperCmd Initialization and configuration functions RTC_Delnit Function Name Function Description Parameters Return values Notes RTC_Init Function Name Function Description Parameters Return values Notes ErrorStatus RTC Delnit void Deinitializes the RTC registers to their default reset values e None An ErrorStatus enumeration value SUCCESS RTC registers are deinitialized ERROR RTC registers are not deinitialized e This function doesn t reset the RTC Clock source and RTC Backup Data registers ErrorStatus RTC_Init RTC_InitTypeDef InitStruct Initializes the RTC registers according to the specified parameters in RTC InitStruct e RTC_InitStruct pointer to a InitTypeDef str
230. C clock can be derived either from the LSI LSE or HSE clock divided by 2 to 31 You have to use RCC RTCCLKConfig RCC_RTCCLKCmd functions to configure this clock e USB OTG FS SDIO and RTC USB FS require a frequency equal to 48 MHz to work correctly while the SDIO require a frequency equal or lower than to 48 This clock is derived of the main PLL through PLLQ divider IWDGclock which is always the LSI clock The maximum frequency of the SYSCLK and HCLK is 120 MHz PCLK2 60 MHz and PCLK1 30 MHz Depending on the device voltage range the maximum frequency should be adapted accordingly Table 11 Number of wait states according to CPU clock HCLK frequency Wait states HCLK clock frequency MHz WS Voltage range 2 7 to Voltage range 2 4to Voltage range 2 1 to Voltage range 1 8 to latency 3 6 V 27 2 4V 2 1 OWS 1CPU 0 lt HCLK lt 30 0 HCLK s 24 0 HCLK lt 18 0 HCLK s 16 cycle 1WS 2CPU 30 HCLK lt 60 24 HCLK s 48 18 HCLK s 36 16 lt HCLK lt 32 cycle 2WS 3CPU 60 HCLK s 90 48 HCLK s 72 36 HCLK lt 54 32 HCLK lt 48 cycle 3WS ACPU 90 HCLK lt 120 72 lt HCLK lt 96 54 HCLK s 72 48 HCLK lt 64 cycle 4WS 5CPU NA 96 HCLK x 120 72 HCLK lt 90 64 HCLK s 80 3 l IRROFF is set to STM32F20xx devices this value can be lowered to 1 65 V when the device operates in a reduced temperature range DoclD 18540 Rev
231. C peripheral Section 3 2 4 1 ADC Delnit Section 3 2 4 2 ADC Init Section 3 2 4 3 ADC Structlnit Section 3 2 4 4 ADC Commoninit Section 3 2 4 3 ADC Structlnit Section 3 2 4 6 ADC Analog Watchdog configuration functions This section provides functions allowing to configure the Analog Watchdog AWD feature in the ADC A typical configuration Analog Watchdog is done following these steps 1 2 the ADC guarded channel s is are selected using the ADC AnalogWatchdogSingleChannelConfig function The Analog watchdog lower and higher threshold are configured using the ADC AnalogWatchdogThresholdsConfig function DoclD 18540 Rev 1 4 UM1061 Analog to digital converter ADC 4 3 The Analog watchdog is enabled and configured to enable the check on one or more channels using the ADC_AnalogWatchdogCmd function A typical configuration Analog Watchdog is done following these steps 1 the ADC guarded channel s is are selected using the ADC AnalogWatchdogSingleChannelConfig function 2 The Analog watchdog lower and higher threshold are configured using the ADC_AnalogWatchdogThresholdsConfig function 3 Analog watchdog is enabled and configured to enable the check on one or more channels using the ADC_AnalogWatchdogCmd function ADC_AnalogWatchdogCmd e AnalogWatchdogThresholdsConfig e ADC AnalogWatchdogSingleChannelConfig Temperature Se
232. CC3 uint32 1 0 04000000 ADC ExternalTrigConv T2 CC4 uint32 1 0 05000000 DocID 18540 Rev 1 4 UM1061 Analog to digital converter ADC e didefine e didefine e didefine e didefine e didefine e didefine e didefine e didefine e define e didefine ADC ExternalTrigConv T2 TRGO uint32 t 0x06000000 ADC ExternalTrigConv T3 CCi uint32 1 0 07000000 ADC ExternalTrigConv T3 TRGO uint32 t 0x08000000 ADC ExternalTrigConv T4 CC4 uint32 1 0 09000000 ADC ExternalTrigConv T5 2 1 0 04000000 ADC ExternalTrigConv T5 CC2 uint32 t 0x0B000000 ADC ExternalTrigConv T5 CC3 uint32 1 0 0 000000 ADC_ExternalTrigConv_T8_CC1 uint32_t OxOD000000 ADC_ExternalTrigConv_T8_TRGO uint32_t OxOE000000 ExternalTrigConv Ext IT11 uint32 t OXOF000000 ADC flags definition e didefine 4 ADC FLAG AWD uint8 t 0x01 DocID 18540 Rev 1 85 634 Analog to digital converter ADC UM1061 define ADC_FLAG_EOC uint8_t 0x02 e define FLAG JEOC uint8 t 0x04 e define FLAG JSTRT uint8 1 0 08 e define FLAG 5 8 t 0x10 e iidefine FLAG OVhR uint8 1 0x20 ADC injected channel selection e define ADC InjectedChannel 1 uint8 1 0 14 e define ADC InjectedChannel 2 uint8 1 0 18 e define InjectedChannel 8 1 0 1 e define ADC InjectedChannel 4
233. CMI EXT FLASH FSMC GPIO 5 HASH 12 125 IWDG Lib DEBUG PWR RCC RNG RTC 500 SPI SysTick x j USART WWDG Library Examples html amp Release Notes html STM32F2 StdPeriph Template EWARM MDK ARM RIDE TASKING TrueSTUDIO mainh 18 Release Notes html stm32f2 conf h stm32f2 stm32t2 ith system_stm32a c STMS32F2xx StdPeriph Template subfolder This subfolder contains standard template projects for the supported development tools that compile the needed STM32F2 standard peripheral drivers plus all the user modifiable files that are necessary to create a new project The files are listed and described in details in the following table Table 5 STM32F2xx StdPeriph Template files description File name Description main c Template source file allowing starting a development from scratch using the library drivers main h header file for main c stm32f2xx_conf h Header file allowing to enable disable the peripheral drivers header files inclusion This file can also be used to enable or disable the library run time failure detection before compiling the firmware library drivers through the 32 634 DoclD 18540 Rev 1 Gr UM1061 STM32F2xx Standard Peripheral Library File name Description preproc
234. C_ClearlTPendingBit uint32 t DAC Channel uint32 t DAC IT Function Description Clears the DAC channel s interrupt pending bits Parameters e Channel The selected DAC channel This parameter can be one of the following values DAC Channel 1 DAC Channeli selected DAC Channel 2 DAC Channel selected e DAC IT specifies the DAC interrupt pending bit to clear This parameter can be the following values DAC IT DMAUDR DMA underrun interrupt mask Return values e None Notes e The DMA underrun occurs when a second external trigger arrives before the acknowledgement for the first external trigger is received first request 7 3 DAC Firmware driver defines 7 3 1 DAC Firmware driver defines 3 DAC Channel selection e define DAC Channel 1 uint32 t 0x00000000 e define DAC Channel 2 uint32 1 0 00000010 DAC data alignement e ddefine DAC Align 12b R uint32 1 0 00000000 e DAC Align 12b L uint32 1 0 00000004 DocID 18540 Rev 1 161 634 Digital to analog converter DAC UM1061 162 634 e DAC_Align_8b_R uint32_t 0x00000008 DAC flags definition e define DAC FLAG DMAUDR uint32 1 0x00002000 DAC interrupts definition e define DAC IT DMAUDR uint32 1 0x00002000 DAC Ifsrunmask triangleamplitude e define DAC LFSRUnmask BitO uint32 t 0x00000000 Unmask DAC channel LFSR for noise wave generation e ididefine DAC LFSRUnmask Bits1 O uint32 1 0
235. C_ITConfig FSMC_GetFlagSiatus FSMC_ClearFlag FSMC GetlTStatus FSMC_ClearlTPendingBit 13 2 5 NOR_SRAM controller functions 13 2 5 1 FSMC_NORSRAMDelnit Function Name void FSMC_NORSRAMDelnit uint32_t FSMC_Bank Function Description Deinitializes the FSMC NOR SRAM Banks registers to their default reset values Parameters e FSMC Bank specifies the FSMC Bank to be used This parameter can be one of the following values FSMC_Bank1_NORSRAM1 FSMC Banki NOR SRAM1 FSMC_Bank1_NORSRAM2 FSMC Banki NOR SRAM2 FSMC NORSRAMS FSMC Banki NOR SRAM3 FSMC_Bank1_NORSRAM4 FSMC Banki NOR SRAM4 Return values None Notes None 13 2 5 2 FSMC NORSRAMhhnit DoclD 18540 Rev 1 259 634 Flerible static memory controller FSMC UM1061 13 2 5 3 13 2 5 4 260 634 Function Name void FSMC_NORSRAMInit FSMC_NORSRAMInitTypeDef FSMC NORSRAMIhnitStruct Function Description Initializes the FSMC NOR SRAM Banks according to the specified parameters in the FSMC_NORSRAMInitStruct Parameters e FSMC NORSRAMInitStruct pointer to FSMC_NORSRAMInitTypeDef structure that contains the configuration information for the FSMC NOR SRAM specified Banks Return values Notes None FSMC NORSRAMStructinit Function Name void FSMC NORSRAMStructinit FSMC NORSRAMInitTypeDef FSMC NORSRAMInitStruct Function Description Fills each FSMC NORSRAMInitStruct member with its defau
236. C_NANDInitStruct Initializes the FSMC NAND Banks according to the specified parameters in the FSMC_NANDInitStruct e FSMC_NANDInitStruct pointer to a FSMC NANDInitTypeDef structure that contains the configuration information for the FSMC NAND specified Banks DoclD 18540 Rev 1 261 634 Flerible static memory controller FSMC UM1061 13 2 63 5 NANDStructinit Function Name void NANDStructinit FSMC NANDInitTypeDef FSMC_NANDInitStruct Function Description Fills each FSMC_NANDInitStruct member with its default value Parameters e FSMC_NANDInitStruct pointer to a FSMC_NANDInitTypeDef structure which will be initialized Return values e None Notes e None 13 2 64 FSMC NANDCmd Function Name void FSMC NANDCmd uint32 t FSMC Bank FunctionalState NewState Function Description Enables or disables the specified NAND Memory Bank Parameters e Bank specifies the FSMC Bank to be used This parameter can be one of the following values FSMC 2 FSMC Bank2 FSMC Bank3 NAND FSMC Bank3 NAND NewState new state of the FSMC Bank This parameter can be ENABLE or DISABLE Return values Notes None 13 2 6 5 FSMC_NANDECCCmd Function Name void FSMC_NANDECCCmd uint32_t FSMC Bank FunctionalState NewState Function Description Enables or disables the FSMC NAND ECC feature 262 634 DoclID 18540 Rev 1 4 U
237. C_ReadBackupRegister function Selection of RTC_AF1 alternate functions The RTC_AF1 pin PC13 can be used for the following purposes e AFO_ALARM output e CALIB output e AFI_TIMESTAMP Table 12 Selection RTC_AF1 alternate functions Pin AFO_ AFO CALI Tamper Timestam TAMP1INSE TSINSEL ALARMOUTYP configuratio Aj ARM Benabled enable penabled TIME E AFO_ALARM enable d pin selection STAMP configuration d pin selectio n Alarm out 1 Don t care Don t Don t care Don t care Don t 0 output OD care care Alarm out 1 Don t care Don t Don t care Don t care Don t 1 output PP care care Calibration 0 1 Don t Don t care Don t care Don t Don t care out output PP care care TAMPER 0 0 1 0 0 Don t Don t care input floating care TIMESTAMP 0 0 1 1 0 0 Don t care and input floating TIMESTAMP 0 0 0 1 Don t care 0 Don t care input floating Standard 0 0 0 0 Don t care Don t Don t care GPIO care Selection of RTC_AF2 alternate functions The RTC_AF2 pin PI8 can be used for the following purposes AFI TAMPER AFI TIMESTAMP DoclD 18540 Rev 1 417 634 Real time clock RTC UM1061 Table 13 Selection of RTC_AF2 alternate functions Pin configuration Tamper Timestamp TAMP1INSEL TSINSEL ALARMOUTYPE and function enabled enabled TAMPERI pin TIMESTAMP pin AFO_ALARM slection slectio
238. ChannelConfig SoftwareStartConv dGetSoftwareStartConvStatus ADC_EOCOnEachRegularChannelCmd ContinuousModeCmd DiscModeChannelCountConfig ADC_GetConversionValue ADC_GetMultiModeConversionValue Regular Channels DMA Configuration functions This section provides functions allowing to configure the DMA for ADC regular channels DocID 18540 Rev 1 55 634 Analog to digital converter ADC UM1061 3 2 3 56 634 Since converted regular channel values are stored into a unique data register it is useful to use DMA for conversion of more than one regular channel This avoids the loss of the data already stored in the ADC Data register When the DMA mode is enabled using the ADC_DMACmd function after each conversion of a regular channel a DMA request is generated Depending on the DMA disable selection for Independent ADC mode configuration using the ADC_DMARequestAfterLastTransferCmd function at the end of the last DMA transfer two possibilities are allowed e DMA request is issued to the DMA controller feature DISABLED e Requests can continue to be generated feature ENABLED Depending on the DMA disable selection for multi ADC mode configuration using the void ADC MultiModeDMARequestAfterLastTransferCmd function at the end of the last DMA transfer two possibilities are allowed No new DMA reques
239. ClearFlag function stm32f2xx_pwr c void PWR ClearFlag uint32 t PWR FLAG 1 Check the parameters assert param IS PWR CLEAR FLAG PWR FLAG PWR gt CR PWR FLAG lt lt stm32f2xx_pwr h PWR Flag define PWR_FLAG WU define PWR FLAG SB define PWR_FLAG PVDO define PWR FLAG BRR uint32 t 0x00000001 uint32 t 0x00000002 uint32 t 0x00000004 4 4 a uint32 t 0x00000008 define IS PWR CLEAR FLAG FLAG FLAG PWR FLAG WU FLAG PWR FLAG SB DocID 18540 Rev 1 23 634 STM32F2 Standard Peripheral Library UM1061 24 634 If the expression passed to the assert_param macro is false the assert failed function is called and retu rns the name of the source file and the source line number of the call that failed If the expression is true no value is returned The assert_param macro is implemented in stm32f2xx_conf h ifdef USE EE briet Parameters param which line retval A define a assert fail FULL ASSERT lime ASSCLE PREM 1S Wee Tox iumctiom check lir Gor is false it cells assert failed function reports the name of the source file and the source number of the call that failed pr is true it returns no value None ssert param expr aims t 9 PILE y 4 Exported eR OTN Sa ILLIC void asse else de
240. CommonSpaceTimingStruct DoclD 18540 Rev 1 255 634 Flerible static memory controller FSMC UM1061 13 1 10 256 634 FSMC NAND PCCARDTIminginitTypeDef FSMC_AttributeSpaceTimingStruct Field Documentation uint32 t FSMC_NANDInitTypeDef FSMC_Bank Specifies the NAND memory bank that will be used This parameter canbe a value of FSMC NAND Bank uint32_t FSMC NANDInitTypeDef FSMC Waitfeature Enables or disables the Wait feature for the NAND Memory Bank This parameter can be any value of FSMC Wait feature uint32_t FSMC_NANDInitTypeDef FSMC_MemoryDataWidth Specifies the external memory device width This parameter can be any value of 5 Data Width uint32 t FSMC NANDiInitTypeDef FSMC ECC Enables or disables the ECC computation This parameter can be any value of FSMC ECC uint32_t FSMC_NANDInitTypeDef FSMC_ECCPageSize Defines the page size for the extended ECC This parameter can be any value of FSMC_ECC_Page_Size uint32 t FSMC_NANDInitTypeDef FSMC_TCLRSetupTime Defines the number HCLK cycles to configure the delay between CLE low RE low This parameter can be a value between 0 and OxFF uint32_t FSMC_NANDInitTypeDef FSMC_TARSetupTime Defines the number of HCLK cycles to configure the delay between ALE low and RE low This parameter can be a number between 0 0 and OxFF FSMC_NAND_PCCARDTimingInitTypeDef FSMC_NANDInitTypeDet FSMC_CommonSpaceTimingStruct FSMC Common Space T
241. D12 Reserved 0x4A JO uint16 t TypeDef DMAR TIM DMA address for full transfer Address offset 0 4 uint16 t TypeDef RESERVED13 Reserved Ox4E JO uint16 t TIM TypeDef OR option register Address offset 0x50 uint16 t TypeDef RESERVED14 Reserved 52 TIM_TimeBaselnitTypeDef TIM TimeBaselnitTypeDef is defined in the stm32f2xx_tim h file and contains the time base initialization parameters Data Fields uint16_t TIM_Prescaler uint16_t TIM_CounterMode uint32_t TIM_Period uint16_t TIM_ClockDivision uint8_t RepetitionCounter Field Documentation uint16 t TIM TimeBaselnitTypeDef TIM Prescaler Specifies the prescaler value used to divide the TIM clock This parameter can a number between 0 0000 and OxFFFF uint16_t TIM TimeBaselnitTypeDef TIM CounterMode Specifies the counter mode This parameter can be a value of TIM Counter Mode uint32 t TIM TimeBaselnitTypeDef TIM Period Specifies the period value to be loaded into the active Auto Reload Register at the next update event This parameter must be a number between 0x0000 and OxFFFF uint16_t TIM TimeBaselnitTypeDef TIM ClockDivision Specifies the clock division This parameter can be a value of TIM Clock Division CKD uint8_t TIM TimeBaselnitTypeDef TIM RepetitionCounter DoclD 18540 Rev 1 519 634 General purpose timers TIM UM1061 25 1 3 520 634 Specifies
242. DAC Align 12b L 12bit left data alignment selected DAC Align 12b 12bit right data alignment selected Data Data to be loaded in the selected data holding register Return values None Notes None 7 2 6 10 SetDualChannelData 4 Function Name void DAC_SetDualChannelData uint32 t DAC Align uint16 t Data2 uint16 t Data1 Function Description Set the specified data holding register value for dual channel DAC Parameters e DAC Align Specifies the data alignment for dual channel DAC This parameter can be one of the following values DAC Align 8b 8bit right data alignment selected DAC Align 12b L 12bit left data alignment selected DAC Align 12b 12bit right data alignment selected e Data2 Data for DAC Channel2 to be loaded in the selected data holding register e Datal Data for DAC Channel to be loaded in the selected data holding register Return values 18540 Rev 1 157 634 Digital to analog converter DAC UM1061 Notes e dual mode a unique register access is required to write in both DAC channels at the same time 7 2 6 11 GetDataOutputValue Function Name uint16_t DAC_GetDataOutputValue uint32 t Channel Function Description Returns the last data output value of the selected DAC channel Parameters e Channel The selected DAC channel This parameter can be one of the following values DAC Channel 1 DAC Channeli selected
243. DCMI interrupt sources e IT FRAME uint16 1 0x0001 e iidefine IT OVF uint16 1 0 0002 e dsidefine DCMI ERR uint16 t 0x0004 e define IT VSYNC uint16 1 0x0008 e IT LINE uint16 t 0x0010 DCMI PIXCK Polarity e didefine DCMI PCKPolarity Falling uint16 t 0x0000 Pixel clock active on Falling edge DocID 18540 Rev 1 185 634 Digital camera interface UM1061 9 4 186 634 e define DCMI PCKPolarity Rising uint16 1 0x0020 Pixel clock active on Rising edge DCMI Synchronization Mode e define DCMI SynchroMode Hardware uint16 1 0x0000 Hardware synchronization data capture frame line start stop is synchronized with the HSYNC VSYNC signals e define DCMI SynchroMode Embedded uint16 1 0x0010 Embedded synchronization data capture is synchronized with synchronization codes embedded in the data flow DCMI VSYNC Polarity e DCMI VSPolarity Low uint16 t 0x0000 Vertical synchronization active Low e VSPolarity High uint16 1 0x0080 Vertical synchronization active High DCMI Programming Example The example below explains how to configure the DCMI to capture continuous frame from a camera module For more examples about DCMI configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project S TM32F2xx StdPeriph Examplesi
244. DCMh DEMI InitIrypeDet DCMI AE Enable DCMI clock RCC AHB2PeriphClockCmd RCC AHB2Periph DCMI ENABLE YA DEMI comiigurartiom DCMI InitStruct DCMI CaptureMode DCMI CaptureMode Continuous DCMI InitStruct DCMI SynchroMode DCMI SynchroMode Hardware DOMI DOMI PCRKPOlearity DCMI ani DEM Sh VSPolarity DEMI DCMI ImaieSiccUee DEMI 181001 DOMI MsPolarity DCMI Tina DCMI CaprtureRate DOMT ALL Prene DCMI InitStruct DCMI ExtendedDataMode DEMI ExtendedDataMode 8b DCMI Init amp DCMI InitStruct DocID 18540 Rev 1 4 UM1061 DMA controller DMA 10 DMA controller DMA 10 1 DMA Firmware driver registers structures 10 1 1 DMA_TypeDef DMA TypeDef is defined in the stm32f2xx h file and contains the DMA common registers definition Data Fields e _ JOuint32_t LISR e _ JOuint32_t HISR e _ JOuint32_t LIFCR e _ JOuint32_t HIFCR Field Documentation e _ JO uint32_t DMA_TypeDef LISR low interrupt status register Address offset 0x00 e _ JO uint32_t DMA_TypeDef HISR high interrupt status register Address offset 0 04 e _ IOuint32 t DMA TypeDef LIFCR low interrupt flag clear register Address offset 0x08 e _ JO uint32_t DMA_TypeDef HIFCR DMA high interrupt flag clear register Address offset 0 0 10 1 2
245. DCOUNT is zero interrupt SDIO IT STBITERR Start bit not detected on all data signals in wide bus mode interrupt SDIO IT DBCKEND Data block sent received CRC check passed interrupt SDIO IT CMDACT Command transfer in progress interrupt A SDIO IT TXACT Data transmit in progress interrupt A SDIO IT RXACT Data receive in progress interrupt SDIO IT TXFIFOHE Transmit FIFO Half Empty interrupt SDIO IT RXFIFOHF Receive FIFO Half Full interrupt SDIO TXFIFOF Transmit FIFO full interrupt A SDIO IT RXFIFOF Receive FIFO full interrupt SDIO IT TXFIFOE Transmit FIFO empty interrupt SDIO IT RXFIFOE Receive FIFO empty interrupt SDIO TXDAVL Data available in transmit FIFO interrupt SDIO IT RXDAVL Data available in receive FIFO interrupt A SDIO IT SDIOIT SD VO interrupt received interrupt SDIO IT CEATAEND CE ATA command completion 4 DoclD 18540 Rev 1 469 634 Secure digital input output interface SDIO UM1061 22 2 11 5 470 634 signal received for CMD61 interrupt Return values e The new state of SDIO IT SET or RESET Notes e None SDIO ClearlTPendingBit Function Name void SDIO_ClearlTPendingBit uint32 t SDIO Function Description Clears the SDIO s interrupt pending bits Parameters e SDIO specifies the interrupt pending bit to clear This parameter can be one or a combination of the following values
246. DR12 uint32_t Ox0000000C RTC DR13 uint32 t 0x0000000D RTC DR14 uint32 1 0 0000000 RTC DRi15 uint32 t 0x0000000F RTC_BKP_DR16 uint32_t 0x00000010 RTC_BKP_DR17 uint32_t 0x00000011 RTC_BKP_DR18 uint32_t 0x00000012 RTC_BKP_DR19 uint32_t 0x00000013 DocID 18540 Rev 1 4 UM1061 Real time clock RTC 3 RTC DayLightSaving Definitions e define RTC_DayLightSaving_SUB1H uint32_t 0x00020000 e define RTC_DayLightSaving_ADD1H uint32_t 0x00010000 e define RTC StoreOperation Resei uint32 1 0x00000000 e define RTC StoreOperation Set uint32 t 0x00040000 RTC Digital Calibration Definitions e define RTC CalibSign Positive uint32 1 0 00000000 e define RTC CalibSign Negative uint32 1 0x00000080 RTC Flags Definitions e define RTC FLAG TAMP1F uint32 1 0x00002000 e define RTC FLAG TSOVF uint32 1 0 00001000 e define RTC FLAG TSF uint32 1 0 00000800 e define RTC FLAG WUTF uint32 1 0x00000400 e define RTC FLAG ALRBF uint32 1 0 00000200 DoclID 18540 Rev 1 443 634 Real time clock RTC UM1061 e define e define e define e define e define e define e define RTC FLAG ALRAF uint32 1 0x00000100 RTC FLAG INITF uint32 1 0x00000040 RTC FLAG RSF uint32 t 0x00000020 RTC FLAG INITS uint32 1 0 00000010 RTC FLAG WUTWFw uint32 t 0x00000004 RTC FLAG ALRBWF uint32 t 0x00000002 RTC FLAG ALRA
247. Def ADCx Function Description Enables the selected ADC software start conversion of the injected channels Parameters e ADCx where x can be 1 2 or 3 to select the ADC peripheral Return values None Notes None ADC GetSoftwareStartlnjectedConvCmdStatus Function Name FlagStatus ADC GetSoftwareStartlnjectedConvCmdStatus ADC TypeDef ADCx Function Description Gets the selected ADC Software start injected conversion Status Parameters e ADCx where x be 1 2 or 3 to select the ADC peripheral Return values The new state of ADC software start injected conversion SET or RESET Notes e None ADC AutolnjectedConvCmd DociD 18540 Rev 1 4 UM1061 Analog to digital converter ADC 3 2 9 9 3 2 9 10 Function Name Function Description Parameters Return values Notes void ADC AutolnjectedConvCmd ADC_TypeDef ADCx FunctionalState NewState Enables or disables the selected ADC automatic injected group conversion after regular one ADCx where x can be 1 2 or 3 to select the ADC peripheral NewState new state of the selected ADC auto injected conversion This parameter can be ENABLE or DISABLE None None InjectedDiscModeCmd Function Name Function Description Parameters Return values Notes void ADC InjectedDiscModeCmd ADC TypeDef ADCx FunctionalState NewState Enables or disables the discontinuous mode for injected group channel
248. Def PCLK2 Frequency 2 clock frequency expressed in Hz 19 2 RCC Firmware driver API description The following section lists the various functions of the RCC library 19 2 1 RCC specific features 4 After reset the device is running from Internal High Speed oscillator HSI 16MHz with Flash 0 wait state Flash prefetch buffer D Cache and are disabled and all peripherals are off except internal SRAM Flash and JTAG There is no prescaler on High speed AHB and Low speed APB busses all peripherals mapped on these busses are running at HSI speed e The clock for all peripherals is switched off except the SRAM and FLASH e GPIOs are in input floating state except the JTAG pins which are assigned to be used for debug purpose DocID 18540 Rev 1 357 634 Reset and clock control RCC UM1061 19 2 2 358 634 Once the device started from reset the user application has to Configure the clock source to be used to drive the System clock if the application needs higher frequency performance Configure the System clock frequency and Flash settings Configure the AHB and APB busses prescalers Enable the clock for the peripheral s to be used Configure the clock source s for peripherals which clocks are not derived from the System clock 125 RTC ADC USB FS SDIO RNG Internal and external clocks PLL CSS and MCO configuration This section provides functions allowing to configure
249. ERIPH BASE 0x3800 define SPI3 BASE APBIPERIPH BASE 0 3 00 APB2 peripherals base address define SPI1 BASE APB2PERIPH BASE 0x3000 1 lt Peripheral Declaration define SPI2 SPL_ UyeeDer 9 SP BASI define SPI3 SEL_WypeDeir 7 SPIJ BASE define 5 1 SPL aT ypweber SEIL BASI SPIx BASE is the base address of a specific SPI and SPIx is a pointer to a register structure that refers to a specific SPI The peripheral registers are accessed as follows 0p Peripheral registers bits All the peripheral registers bits are defined as constants in the stm32f2xx h file They are defined as acronyms written in upper case into the form PPP register memes ot name gt DocID 18540 Rev 1 21 634 STM32F2xx Standard Peripheral Library UM1061 22 634 Example detine CRI CREA uinte c Ox0001 1 Clock Phase define SPI CR CEOL nine 1 05490012 Clock Polarity 7 define SET CRI MS c Ox0004 i lt Master Selection Geiime SPL CRI BR 18 E000 2 sw Dite raud Rate Control detine CRI ITUR 16 ic Ox0008 1 lt Bue define CRI BR vimtile 15 050010 01 Bit 1 2 decine BR 2 15 00020 ix Bue 2 Bit Banding The Cortex M3 memory map includes two bit band memory regions These regions map each word in an alias region of memory to a bit in a bit band region of
250. Enable uint16 1 0x5555 IWDG WriteAccess Disable uint16 t 0x0000 DocID 18540 Rev 1 4 UM1061 Independent watchdog IWDG 17 4 4 IWDG Programming Example The example below explains how to configure the IWDG to have a timeout of 250 ms the timeout may varies due to LSI frequency dispersion For more examples about IWDG configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples IWDG IWDG timeout equal to 250ms The timeout may varies due to LSI frequency dispersion the SSE value is centred around 32 KHz Enable write access to IWDG PR and IWDG RLR registers IWDG WriteAccessCmd IWDG WriteAccess Enable INDE counter Clocks 22 YA IWE 32 9 Set counter reload value to obtain 250ms IWDG TimeOut Counter Reload Value 250ms IWDG counter clock period 250ms LSI 32 0 253 32 mm 82 250 IWDG SetReload 250 Reload IWDG counter IWDG ReloadCounter Enable IWDG LSI oscillator will be enabled by hardware IWDG Enable DocID 18540 Rev 1 343 634 Power control PWR UM1061 18 18 1 18 1 1 18 2 18 2 1 18 2 2 344 634 Power control PWR PWR Firmware driver registers structures PWR_TypeDef PWR TypeDef is defined in the stm32f2xx h file and contains the PW
251. F This parameter is not used with synchronous NOR Flash memories e uint32 t FSMC NORSRAMTiminglnitTypeDef FSMC DataSetupTime Defines the number of HCLK cycles to configure the duration of the data setup time This parameter can be a value between 0 and OxFF This parameter is used for SRAMs ROMs and asynchronous multiplexed NOR Flash memories e 32 t FSMC_NORSRAMTimingInitTypeDef FSMC_BusTurnAroundDuration Defines the number of HCLK cycles to configure the duration of the bus turnaround This parameter can be a value between 0 and OxF This parameter is only used for multiplexed NOR Flash memories e uint32 t FSMC_NORSRAMTimingInitTypeDef FSMC_CLKDivision Defines the period of CLK clock output signal expressed in number of HCLK cycles This parameter can be a value between 1 and OxF This parameter is not used for asynchronous NOR Flash SRAM or ROM accesses e uint32_t FSMC_NORSRAMTimingInitTypeDef FSMC_DataLatency Defines the number of memory clock cycles to issue to the memory before getting the first data The parameter value depends on the memory type as shown below It must be set to 0 in case of a CRAMIt is don t care in asynchronous NOR SRAM or ROM accesseslt may assume a value between 0 and OxF in NOR Flash memories with synchronous burst mode enable e uint32 t FSMC NORSRAMTiminglnitTypeDef FSMC AccessMode Specifies the asynchronous access mode This parameter can be a value of FSMC Access Mo
252. FSMC Bank FSMC 1 NORSRAM2 SRAMInitS FSMC DataAddressMux FSMC DataAddressMux Disable SRAMInitS FSMC MemoryType FSMC MemoryType PSRAM SRAMInitS FSMC MemoryDataWidth FSMC MemoryDataWidth 16b SRAMInitS FSMC BurstAccessMode FSMC BurstAccessMode Disable SRAMInitS FSMC AsynchronousWait FSMC AsynchronousWait Disable SRAMInitS FSMC WaitSignalPolarity FSMC WaitSignalPolarity Low SRAMInitS FSMC WrapMode FSMC WrapMode Disable SRAMInitS FSMC WaitSignalActive FSMC WaitSignalActive BeforeWaitState SRAMInitS FSMC WriteOperation FSMC WriteOperation Enable SRAMInitS FSMC WaitSignal FSMC WaitSignal Disable SRAMInitS FSMC ExtendedMode FSMC ExtendedMode Disable SHAMIS HOME Mm Wiese SB ures Disaolep SRAMInitS FSMC ReadWriteTimingStruct SRAMInitS FSMC WriteTimingStruct FSMC NORSRAMInit amp SRAMInitS Enable FSMC Bankl SRAM2 Bank FSMC NORSRAMCmd FSMC 1 NORSRAM2 ENABLE DocID 18540 Rev 1 273 634 General purpose Os GPIO UM1061 14 14 1 14 1 1 14 1 2 274 634 General purpose I Os GPIO GPIO Firmware driver registers structures GPIO_TypeDef GPIO_TypeDef is defined in the stm32f2xx h file and contains the GPIO registers definition Data Fields 10 uint32_t MODER 10 uint32_t OTYPER 10 uint32_t OSPEEDR 10 uint32_t PUPDR 10 uint32_t IDR 10 uint32_t ODR 10 uint16_t BSRRL IO uint16_t BSRRH 1
253. G_SetWindowValue Function Name Function Description Parameters Return values Notes WWDG EnablelT Function Name Function Description Parameters Return values Notes void WWDG SetWindowValue uint8 t WindowValue Sets the WWDG window value e WindowValue specifies the window value to be compared to the downcounter This parameter value must be lower than 0x80 None None void WWDG EnablelT void Enables the WWDG Early Wakeup interrupt EWI e None e None e Once enabled this interrupt cannot be disabled except by a DociD 18540 Rev 1 621 634 Window watchdog WWDG UM1061 27 2 1 5 27 2 2 27 2 2 1 27 2 3 27 2 3 1 622 634 system reset WWDG_SetCounter Function Name void WWDG SetCounter uint8 t Counter Function Description Sets the WWDG counter value Parameters e Counter specifies the watchdog counter value This parameter must be a number between 0x40 and Ox7F to prevent generating an immediate reset Return values Notes None WWDG activation function WWDG_Enable Function Name void WWDG_Enable uint8_t Counter Function Description Enables WWDG and load the counter value Parameters e Counter specifies the watchdog counter value This parameter must be a number between 0x40 and Ox7F to prevent generating an immediate reset Return values None Notes None Interrupt and flag management functions WWDG GetFlagStatus Funct
254. HSI HSI clock selected as MCO1 source MCO1Source LSE LSE clock selected as MCO 1 source RCC 15 HSE HSE clock selected as MCO 1 source RCC 15 PLLCLK main PLL clock selected as MCO1 source MCOn1Div specifies the MCO1 prescaler This parameter can be one of the following values 1 no division applied to clock MCO Div 2 division by 2 applied to MCO1 clock MCO1Div 3 division by applied to MCO1 clock DoclD 18540 Rev 1 367 634 Reset and clock control RCC UM1061 19 2 6 14 19 2 7 19 2 7 1 368 634 MCO1Div 4 division by 4 applied to MCO1 clock RCC_MCO1Div_5 division by 5 applied to MCO1 clock Return values None Notes e PA8 should be configured in alternate function mode RCC_MCO2Config Function Name void RCC_MCO2Config uint32 t RCC_MCO2Source uint32 t RCC MCO2Div Function Description Selects the clock source to output on MCO2 pin PC9 Parameters e RCC MCO28Source specifies the clock source to output This parameter can be one of the following values MCO2Source SYSCLK System clock SYSCLK selected as MCO2 source 25 PLLI2SCLK PLLI2S clock selected as MCO2 source MCO2Source HSE HSE clock selected as 2 source RCC MCO2Source PLLCLK main PLL clock selected as MCO2 source e RCC MCO2Div specifies the
255. I DataSize Specifies the SPI data size This parameter can be a value 5 data size uint16_t SPI InitTypeDef SPI CPOL Specifies the serial clock steady state This parameter can be a value of SPI Clock Polarity uint16 t SPI InitTypeDef SPI DocID 18540 Rev 1 UM1061 Serial peripheral interface SPI Specifies the clock active edge for the bit capture This parameter can be a value of SPI Clock Phase e 6 t SPI InitTypeDef SPI NSS Specifies whether the NSS signal is managed by hardware NSS pin or by software using the SSI bit This parameter can be a value of SPI Slave Select management e 16 t SPI_InitTypeDef SPI_BaudRatePrescaler Specifies the Baud Rate prescaler value which will be used to configure the transmit and receive SCK clock This parameter can be a value of SPI BaudRate Prescaler e 6 t SPI InitTypeDef SPI FirstBit Specifies whether data transfers start from or LSB bit This parameter can be a value of SPI MSB LSB transmission e 16 t SPI InitTypeDef SPI CRCPolynomial Specifies the polynomial used for the CRC calculation 23 1 3 I2S_InitTypeDef 4 I2S InitTypeDef is defined in the stm32f2xx_spi h file and contains the 125 initialization parameters Data Fields uint16_t 12S_Mode 16 1125 Standard 16 1125 DataFormat 16 1125 uint32 1125 AudioFreq uint16 1125 Field Documentatio
256. I InitStruct pointer to a InitTypeDef structure that contains the configuration information for the EXTI peripheral e None e None DoclD 18540 Rev 1 219 634 External interrupt event controller EKTI UM1061 11 2 5 4 11 2 6 11 2 6 1 220 634 Function Name void EXTI Structlnit InitTypeDef InitStruct Function Description Fills each EXTI InitStruct member with its reset value Parameters e EXTI InitStruct pointer to EXTI InitTypeDef structure which will be initialized Return values e None Notes e None EXTI GenerateSWilnterrupt Function Name void EXTI_GenerateSWinterrupt uint32 t EXTI Line Function Description Generates a Software interrupt on selected EXTI line Parameters e EXTI Line specifies the EXTI line on which the software interrupt will be generated This parameter can be any combination of Lines where can be 0 22 Return values None Notes None Interrupt and flag management functions EXTI_GetFlagStatus Function Name FlagStatus EXTI GetFlagStatus uint32 t EXTI Line Function Description Checks whether the specified EXTI line flag is set or not Parameters e Line specifies the EXTI line flag to check This parameter can be EXTI Linex where x can be 0 22 Return values The new state of EKTI Line SET or RESET Notes e None DociD 18540 Rev 1 4 UM1061 External interrupt event controller
257. I oscillator clock selected as PLL clock entry PLLSource HSE HSE oscillator clock selected as PLL clock entry PLLM specifies the division factor for PLL VCO input clock This parameter must be a number between 0 and 63 PLLN specifies the multiplication factor for PLL VCO output clock This parameter must be a number between 192 and 432 PLLP specifies the division factor for main system clock SYSCLK This parameter must be a number in the range 2 4 6 or 8 PLLQ specifies the division factor for OTG FS SDIO and RNG clocks This parameter must be a number between 4 and 15 None This function must be used only when the main PLL is disabled This clock source RCC PLLSource is common for the main PLL and PLLI2S You have to set the PLLM parameter correctly to ensure that the VCO input frequency ranges from 1 to 2 MHz It is recommended to select a frequency of 2 MHz to limit PLL jitter You have to set the PLLN parameter correctly to ensure that the VCO output frequency is between 192 and 432 MHz You have to set the PLLP parameter correctly to not exceed 120 MHz on the System clock frequency If the USB FS is used in your application you have to set the PLLQ parameter correctly to have 48 MHz clock for the USB However the SDIO and RNG need a frequency lower than or equal to 48 MHz to work correctly void RCC PLLCmd FunctionalState NewState Enables or disables the main PLL NewState
258. ID 18540 Rev 1 47 634 How to use and customize the library UM1061 48 634 1 System clock configuration At this stage the microcontroller clock setting is already configured this is done through SystemInit function which is Called from startup Lille startup SMITA sz 8 before tO branch te application main To reconfigure the default setting of SystemInit function refer to system stm32f2xx c file 2 Enable the clock for the peripheral s to be used EXTI interface clock is always enabled Enable GPIOA s AHB interface clock AHBlPeriphClockCmd RCC GPIOA ENAB Enable SYSCFG s APB interface clock RCC APB2PeriphClockCmd RCC APB2Periph SYSCFG ENABLE 3 Configure the peripheral s GPIOs Comeet am to AO pim 7 SYSCFG EXTILineConfig EXTI PortSourceGPIOA EXTI PinSource0 Configure PAO pin in input mode GPIO INMITCSTTUCTULG GPIO Pim GIO Pim 07 GPIO CRPIO Moce GPIO Moce IN GPIO GPIO PURE GPIO PUPA BOUND GUO domne GIO GIO LUIZ 4 Configure the peripheral in the desired mode Configure EXTI lineO EXIIT Malele EXIIT Sic ewe Sie wwe t amp EXT Enable and NVIC InitStruc NVIC InitStruc EKITI Line EX Line Ure MKII Moce Mode Interrup
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260. IO HardwareFlowControl SDIO HardwareFlowControl Disable SDIO Imit ESDIO IMITCSETUCTUTS 7 480 634 DoclD 18540 Rev 1 4 UM1061 Serial peripheral interface SPI 23 Serial peripheral interface 23 1 SPI Firmware driver registers structures 23 1 1 SPI_TypeDef SPI TypeDefis defined in the stm32f2xx h file and contains the SPI I2S registers definition Data Fields lOuint16_tCR1 uint16_t RESERVEDO lO uint16 t CR2 16 t RESERVED1 lO 16 t SR 16 t RESERVED2 JOuint16 t DR 16 t RESERVED3 JO uint G t CRCPR 16 t RESERVED4 16 t RXCRCR 16 t RESERVED5 JlOuint16 t TXCRCR uint16 t RESERVED6 JO uint16 t l2SCFGR uint16 t RESERVED7 lO uint16 t I2SPR 16 t RESERVED8 Field Documentation e _ JlOuint16 t SPI TypeDef CH1 SPI control register 1 not used 125 mode Address offset 0x00 e uint16 t SPI TypeDef RESERVEDO Reserved 0x02 e _ JOuint16_t SPI TypeDef CR2 SPI control register 2 Address offset 0x04 e uint16 t SPI TypeDef RESERVED1 Reserved 0x06 e _ JOuint16_t SPI TypeDef SR SPI status register Address offset 0 08 e uint16 t SPI TypeDef RESERVED2 Reserved e 16 t SPI TypeDef DR SPI data register Address offset e uint16 t SPl_TypeDef RESERVED3 Reserved e _ JOuint16_t SPI TypeDef CRCPR DocID 18540 Rev 1 Serial peripheral interfa
261. IO_Flags define define define define define SDIO_DPSM_Disable uint32_t 0x00000000 SDIO DPSM Enable uint32 t 0x00000001 SDIO FLAG CCRCFAlL uint32 0 00000001 SDIO FLAG DCRCFAIL uint32 0 00000002 SDIO FLAG CTIMEOUT uint32 1 0 00000004 SDIO FLAG DTIMEOUT uint32 1 0 00000008 SDIO FLAG TXUNDERR uint32 0 00000010 DocID 18540 Rev 1 473 634 Secure digital input output interface SDIO UM1061 474 634 define define define define define define define define define define define define SDIO FLAG RXOVERR uint32 t 0x00000020 SDIO FLAG CMDREND uint32 1 0x00000040 SDIO FLAG CMDSENT uint32 t 0x00000080 SDIO FLAG DATAENDX uint32 1 0x00000100 SDIO FLAG STBITERR uint32 1 0x00000200 SDIO FLAG DBCKEND uint32 1 0x00000400 SDIO FLAG CMDACT uint32 1 0 00000800 SDIO FLAG TXACT uint32 t 0x00001000 SDIO FLAG RXACT uint32 t 0x00002000 SDIO FLAG TXFIFOHE uint32 t 0x00004000 SDIO FLAG RXFIFOHF uint32 1 0x00008000 SDIO FLAG TXFIFOF uint32 t 0x00010000 DocID 18540 Rev 1 4 UM1061 Secure digital input output interface SDIO 3 e define e define e define e define e define e define e define SDIO_FLAG_RXFIFOF uint32_t 0x00020000 SDIO_FLAG_TXFIFOE uint32_t 0x00040000 SDIO_FLAG_RXFIFOE uint32_t 0x00080000 SDIO FLAG TXDAVL uint32 1 0x00100000 SDIO
262. IPH DRIVER change few application specific parameters such as the HSE crystal frequency e Data structures and address mapping for all peripherals e Peripheral registers declarations and bits definition e Macros to access peripheral registers hardware This file also contains the library release number defined by the define statement STM32F2XX STDPERIPH VERSION System stm32f2xx c This file contains the system clock configuration for STM32F2xx devices This file includes two functions and one global variable to be called from the user application e Systemlnit this function setups the system clock source PLL multiplier and divider factors AHB APBx prescalers and Flash settings This function is called at startup just after reset and before branch to the main program The call is made inside the startup stm32f2xx s file e SystemCoreClock this variable contains the core clock HCLK It can be used by the application code to set up the SysTick timer or configure other parameters e SystemCoreClockUpdate this function updates the variable SystemCoreClock and must be called whenever the core clock is changed during program execution tool STMS2f2xx Clock Configuration xls Using this tool you can generate a configuration file customized for your application requirements For more information please refer to AN3362 available from ST web site This is automatically generated the configuration
263. InitStruct Configures the TIM peripheral according to the specified parameters in the IClInitStruct to measure an external PWM signal TIMx where x can be 1 2 3 4 5 8 9 or 12 to select the TIM peripheral ICInitStruct pointer to ICInitTypeDef structure that contains the configuration information for the specified TIM peripheral None None DoclD 18540 Rev 1 549 634 General purpose timers TIM UM1061 25 2 11 4 GetCapture1 Function Name Function Description Parameters Return values Notes 25 2 11 5 TIM GetCapture2 Function Name Function Description Parameters Return values Notes 25 2 11 6 TIM GetCapture3 550 634 Function Name Function Description Parameters Return values Notes uint32 t TIM TypeDef TIMx Gets the TIMx Input Capture 1 value e TIMx where x can be 1 to 14 except 6 and 7 to select the TIM peripheral Capture Compare 1 Register value e None uint32 t TIM_GetCapture2 TIM TypeDef TIMx Gets the TIMx Input Capture 2 value e where x can be 1 2 3 4 5 8 9 or 12 to select the TIM peripheral Capture Compare 2 Register value None uint32 t TIM GetCapture3 TIM TypeDef TIMx Gets the TIMx Input Capture 3 value TIMx where x can be 1 2 3 4 5 or 8 to select the TIM peripheral Capture Compare 3 Register value None DoclD 18540 Rev 1
264. KK KK KK KK KK KK KK KK Enable the PWR clock APBlPeriphClockCmd RCC APBlPeriph PWR ENABLE Allow access to RTC PWR BackupAccessCmd ENABLE Configure CRS RTC clock source Fe a I I He e Enable the LSE OSC RCC LSEConfig RCC LSE fe Wie till LSS is while RCC_GetFlagStatus RCC FLAG LSERDY RESET DoclD 18540 Rev 1 449 634 Real time clock RTC UM1061 450 634 Select the RTC Clock Source RCC_RTCCLKConfig RCC_RTCCLKSource_LS Enable the Clock RCC_RTCCLKCmd ENABLE Wait for RTC APB registers synchronisation RTC WaitForSynchro Contigure the RIC calender Time anc RTC time base LSE 1 iz i RIG Initstructurs RIC 1275 RIC InitcStructurs RIC SymenPreciy 255p RIC RNC RIC Hourkormet 247 RIC aha TEUA Set the Time rater 0x08 RIC RIC Minutes 02007 RIC Tinestructurs RIC Seconde 02007 RIC RIC Format BCD EG TIMSSETUCLUTE 2 Set tbe Date WAHA TC Maa Ma RTC DateStructure RTC WeekDay Weekday Monday
265. LASH OB GetUser void uint8 t FLASH OB GetWRP void uint8 t FLASH OB GetRDP void uint8 t FLASH OB GetBOhR void Any operation of erase or program should follow these steps 1 the FLASH OB Unlock function to enable the FLASH option control register access 2 Call one or several functions to program the desired Option Bytes void FLASH OB WRPOonfig uint32 t FunctionalState NewState to Enable Disable the desired sector write protection void FLASH OB RDPOonfig uint8 t OB RDP to set the desired read Protection Level void FLASH OB UserConfig uint8 t OB IWDG uint8 t OB STOP uint8 t OB STDBY to configure the user Option Bytes void FLASH OB BOROonfig uint8 t OB BOR to set the BOR Level 3 Once all needed Option Bytes to be programmed are correctly written call the FLASH OB Launch function to launch the Option Bytes programming process When changing the IWDG mode from HW to SW or from SW to HW a system reset is needed to make the change effective 4 the FLASH OB Lock function to disable the FLASH option control register access recommended to protect the Option Bytes against possible unwanted operations The functions that can be used to program the option bytes are the following e FLASH OB Unlock FLASH OB Lock DocID 18540 Rev 1 4 UM1061 FLASH Memory FLASH e FLASH_OB_WRPConfig e FLASH_OB_RDPConfig e FLASH_OB_UserConfig FLASH_OB_BORConfig e FLASH_OB_Laun
266. M TypeDef 6 t TIM SlaveMode The following functions can be used to in synchronous mode TIM SelectlnputTrigger TIM SelectOutputTrigger SelectSlaveMode TIM SelectMasterSlaveMode TIM ETRConfig Specific functions Specific interface management functions TIM EncoderlnterfaceConfig e SelectHallSensor Specific remapping management function TIM_RemapConfig TimeBase management functions TIM_Delnit Function Name void TIM Delnit T M_TypeDef TIMx Function Description Deinitializes the TIMx peripheral registers to their default reset values Parameters TIMx where x can be 1 to 14 to select the TIM peripheral Return values e None Notes e None TIM TimeBaselnit DocID 18540 Rev 1 527 634 General purpose timers TIM UM1061 Function Name Function Description Parameters Return values Notes 25 2 9 3 TimeBaseStruct void TimeBaselnit T M_TypeDef TIMx TIM_TimeBaselnitTypeDef TIM_TimeBaselnitStruct Initializes the TIMx Time Base Unit peripheral according to the specified parameters in the TIM_TimeBaselnitStruct e TIMx where x be 1 to 14 to select the TIM peripheral e TimeBaselnitStruct pointer to a TIM TimeBaselnitTypeDef structure that contains the configuration information for the specified TIM peripheral Init Function Name void TIM TimeBaseStructlnit T M_TimeB
267. M1061 Flexible static memory controller FSMC Parameters e FSMC Bank specifies the FSMC Bank to be used This parameter can be one of the following values FSMC Bank2 FSMC Bank2 FSMC Bank3 FSMC Bank3 e NewState new state of the FSMC ECC feature This parameter can be ENABLE or DISABLE Return values e None Notes e None 13 2 6 6 FSMC_GetECC Function Name uint32_t FSMC_GetECC uint32_t FSMC_Bank Function Description Returns the error correction code register value Parameters e FSMC Bank specifies the FSMC Bank to be used This parameter can be one of the following values FSMC 2 FSMC Bank2 FSMC Bank3 FSMC Bank3 Return values The Error Correction Code ECC value Notes e None 13 2 7 PCCARD controller functions 13 2 7 1 PCCARDDelnit Function Name void FSMC PCCARDDelnit void Function Description Deinitializes the FSMC PCCARD Bank registers to their default reset values Parameters None Return values None Notes None DoclD 18540 Rev 1 263 634 Flerible static memory controller FSMC UM1061 13 2 PCCARDInit Function Name void FSMC PCCARDInit FSMC PCCARDInitTypeDef FSMC PCCARDInitStruct Function Description Initializes the FSMC PCCARD Bank according to the specified parameters in the FSMC PCCARDInitStruct Parameters e FSMC PCCABDinitStruct pointer to a FSMC PCC
268. MA mode Configure the DMA using DMA Init function Active the needed channel Request using SPI 125 DMACmd function Enable the SPI using the function or enable the 125 using 25 Enable the DMA using the DMA_Cmd function when using DMA mode Optionally you can enable configure the following parameters without re initialization i e there is no need to call again SPI Init function When bidirectional mode SPI Direction 1Line Rx or SPI Direction 1Line Tx is programmed as Data direction parameter using the SPI Init function it can be possible to switch between SPI Direction Tx or SPI Direction Rx using the SPI BiDirectionalLineConfig function When SPI NSS Soft is selected as Slave Select Management parameter using the SPI Init function it can be possible to manage the NSS internal signal using the SPI NSSInternalSoftwareConfig function Reconfigure the data size using the SPI DataSizeConfig function A Enable or disable the SS output using the SPI SSOutputCmd function To use the CRC Hardware calculation feature refer to the Peripheral CRC hardware Calculation subsection DocID 18540 Rev 1 UM1061 Serial peripheral interface SPI 23 2 2 23 2 3 23 2 4 This driver supports only the 25 clock scheme available in Silicon RevisionB and RevisionY define 25 EXTERNAL CLOCK VAL in file stm32f2xx_conf h should be enabled In 125 mode if an external
269. MISRA C box With the default EWARM template project all violated rules described above are unchecked To use the IAR MISRA C Checker to verify that your code is MISRA C 2004 compliant please follow the following steps 1 Enable the IAR MISRA C 2004 Checker 2 Inside the core cm3 h file add the following directive pragma system include to prevent the MISRA C checker to check this file 3 Uncomment the USE FULL ASSERT inside the STM32f2xx conf h file Only the STM32F2 standard peripherals driver are MISRA C 2004 Compliant 1 MISRA C 2004 Guidelines for the use of the C language in critical systems Motor Industry Software Reliability Association October 2004 26 634 DoclID 18540 Rev 1 LY UM1061 STM32F2xx Standard Peripheral Library 1 2 3 Architecture The library is built around a modular programming model ensuring the independencies between the several components building the main application and allowing an easy porting on a large product range evaluation boards and even the use of some integrated firmware components for other application with the minimum changes on the code of the common parts The following figure provides a global view of the STM32F2xx Standard Peripheral Library usage and interaction with other firmware components Figure 1 Library architecture Application Library Examples User Application Layer STM32 EVAL drivers LEDs Push buttons Joystick COM ports LCD Memories
270. M_Cmd ENABLE function to enable the TIM counter Use TIM_GetCapturex TIMx to read the captured value of the Timer gt All other functions be used separately to modify if needed specific feature The Input Capture functions are the following ICinit ICStructlnit TIM GetCapture1 TIM GetCapture2 TIM GetCapture3 TIM GetCapture4 SetlC1Prescaler SetlC2Prescaler SetlC3Prescaler SetlC4Prescaler DocID 18540 Rev 1 525 634 General purpose timers TIM UM1061 25 2 4 25 2 5 25 2 6 25 2 7 526 634 Advanced control timers TIM1 and TIM8 specific features TIM Driver how to use the Break feature After configuring the Timer channel s in the appropriate Output Compare mode 1 2 Fill the BDTRinitStruct with the desired parameters for the Timer Break Polarity dead time Lock level the OSSI OSSR State and the AOE automatic output enable Call TIM BDTRConfig TIMx amp TIM BDThInitStruct to configure the Timer Enable the Main Output using CtrlIPWMOutputs TIM1 ENABLE Once the break even occurs the Timer s output signals are put in reset state or in a known state according to the configuration made in TIM BDTRConfig function The following functions can be used to configure the advanced control timers TIM BDTRConfig BDTRStructinit TIM CtriPWMOutputs TIM Se
271. MemoryTargetConfig DMA_Stream_TypeDef DMAy_Streamx uint32 t MemoryBaseAddr uint32 t DMA_MemoryTarget e uint32 t GetCurrentMemoryTarget DMA Stream TypeDef DMAy Streamx DMA MemoryTargetConfig can be called to modify the base address of one of the two target Memories The Memory of which the base address will be modified must not be currently be used by the DMA Stream ie if the DMA Stream is currently transferring from Memory 1 then you can only modify base address of target Memory 0 and vice versa To check this condition it is recommended to use the function DMA GetCurrentMemoryTarget which returns the index of the Memory target currently in use by the DMA Stream DMA DoubleBufferModeConfig DMA DoubleBufferModeCmd DMA MemoryTargetConfig DMA_GetCurrentMemoryTarget DocID 18540 Rev 1 4 UM1061 DMA controller DMA 10 2 3 3 Interrupt flag management This subsection provides functions allowing to e Check the DMA enable status e Check the FIFO status e Configure the DMA Interrupts sources and check or clear the flags or pending bits status DMA Enable status After configuring the DMA Stream DMA_Init function and enabling the stream it is recommended to check or wait until the DMA Stream is effectively enabled A Stream may remain disabled if a configuration parameter is wrong After disabling a DMA Stream it is also recommended to check or wait until the DMA Stream is
272. MethodCmd Data transfers This subsection provides a set of functions allowing to manage the USART data transfers During an USART reception data shifts in least significant bit first through the RX pin In this mode the USART_DR register consists of a buffer RDR between the internal bus and the received shift register When a transmission is taking place a write instruction to the USART_DR register stores the data in the TDR register and which is copied in the shift register at the end of the current transmission The read access of the USART_DR register can be done using the USART_ReceiveData function and returns the RDR buffered value Whereas a write access to the USART_DR can be done using USART_SendData function and stores the written data into TDR buffer e USART_SendData e USART_ReceiveDaita Multiprocessor communication This subsection provides a set of functions allowing to manage the USART multiprocessor communication For instance one of the USARTs can be the master its TX output is connected to the RX input of the other USART The others are slaves their respective TX outputs are logically ANDed together and connected to the RX input of the master USART multiprocessor communication is possible through the following procedure 1 Program the Baud rate Word length 9 bits Stop bits Parity Mode transmitter or Mode receiver and hardware flow control values using the USART_Init function 2 Configures the
273. NVIC using the NVIC_Init function 3 Configure the RTC to detect the RTC tamper event using the TamperTriggerConfig RTC_TamperCmd functions To enable the RTC TimeStamp interrupt the following sequence is required DocID 18540 Rev 1 419 634 Real time clock RTC UM1061 420 634 1 Configure and enable the EXTI Line 21 in interrupt mode and select the rising edge sensitivity using the EXTI Init function 2 Configure and enable the TAMP STAMP IRQ channel in the NVIC using the NVIC_Init function 3 Configure the RTC to detect the RTC time stamp event using the RTC_TimeStampCmd functions The following functions that can be used to configure the RTC interrupts and flags RTC ITConfig RTC GetFlagStatus RTC ClearFlag RTC GetlTStatus RTC ClearlTPendingBit Time and Date configuration functions This section provide functions allowing to program and read the RTC Calendar Time and Date RTC SetTime RTC TimeStructlnit RTC GetTime SeiDate RTC DateStructlnit RTC GetDate Alarms Alarm A and Alarm B configuration functions This section provide functions allowing to program and read the RTC Alarms RTC SetAlarm RTC AlarmStructlnit RTC GetAlarm RTC AlarmCmda WakeUp Timer configuration functions This section provide functions allowing to program and read the RTC WakeUp RTC WakeUpClockConfig RTC SetWakeUpCounter RTC GetWakeUpCounter RT
274. None Notes e None 26 2 15 Halfduplex mode function 26 2 15 1 USART HalfDuplexcmd Function Name void USART_HalfDuplexCmd USART TypeDef USARTx FunctionalState NewState Function Description Enables or disables the USART s Half Duplex communication Parameters e USARTx where x can be 1 2 3 4 5 or 6 to select the USART or UART peripheral NewState new state of the USART Communication This parameter can be ENABLE or DISABLE Return values e None Notes e None 26 2 16 Smartcard mode functions 26 2 16 1 USART SetGuardTime Function Name void USART_SetGuardTime USART TypeDef USARTx uint8_t USART_GuardTime Function Description Sets the specified USART guard time Parameters e USARTx where x can be 1 2 3 or 6 to select the USART or UART peripheral e USART GuardTime specifies the guard time Return values Notes None DoclD 18540 Rev 1 605 634 Universal synchronous asynchronous receiver UM1061 transmitter USART 26 2 16 2 26 2 16 3 26 2 17 26 2 17 1 606 634 USART_SmartCardCmd Function Name void USART_SmartCardCmd USART_TypeDef USARTx FunctionalState NewState Function Description Enables or disables the USART s Smart Card mode Parameters e USARTx where x can be 1 2 3 or 6 to select the USART or UART peripheral NewState new state of the Smart Card mode This parameter can be ENABLE or DISABLE Return values Notes None USART
275. Notes e None 21 2 19 Tampers configuration functions 21 2 19 1 RTC TamperTriggerConfig Function Name void uint32_t RTC_Tamper uint32_t RTC TamperTrigger Function Description Configures the select Tamper pin edge Parameters e Tamper Selected tamper pin This parameter can be RTC Tamper 1 e RTC TamperTrigger Specifies the trigger on the tamper pin that stimulates tamper event This parameter can be one of the following values HTC TamperTrigger RisingEdge Rising Edge of the tamper pin causes tamper event HTC TamperTrigger FallingEdge Falling Edge of the tamper pin causes tamper event Return values e None Notes e None 21 2 19 2 RTC TamperCmd 3 Function Name Function Description Parameters Return values void TamperCmd uint32 t RTC Tamper FunctionalState NewState Enables or Disables the Tamper detection RTC Tamper Selected tamper pin This parameter can be RTC Tamper 1 NewState new state of the tamper pin This parameter can be ENABLE or DISABLE None DoclD 18540 Rev 1 439 634 Real time clock RTC UM1061 21 3 21 3 1 440 634 Notes None RTC Firmware driver defines RTC Firmware driver defines RTC RTC AlarmDateWeekDay Definitions e define RTC AlarmDateWeekDaySel Date uint32 1 0x00000000 e define RTC AlarmDateWeekDaySel WeekDay uint32 1 0 40000000 RTC AlarmMask Definitions e define RTC A
276. OB GetRDP 238 634 DoclD 18540 Rev 1 4 UM1061 FLASH Memory FLASH Function Name FlagStatus FLASH OB GetRDP void Function Description Returns the FLASH Read Protection level Parameters e None Return values FLASH ReadOut Protection Status SET when OB Level 1 or RDP Level 2 is set A RESET when RDP Level 0 is set Notes e None 12 2 8 11 FLASH OB GetBOR Function Name uint8 t FLASH OB GetBOR void Function Description Returns the FLASH BOR level Parameters e None Return values The FLASH BOR level OB_BOR_LEVEL3 Supply voltage ranges from 2 7 to 3 6 LEVEL2 Supply voltage ranges from 2 4 to 27V LEVELT1 Supply voltage ranges from 2 1 to 24V OB BOR Supply voltage ranges from 1 62 to 21V Notes e None 12 2 9 Interrupt and flag management functions 12 2 9 1 FLASH ITConfig 3 Function Name void FLASH ITConfig uint32_t FLASH IT FunctionalState NewSiate Function Description Enables or disables the specified FLASH interrupts Parameters e FLASH specifies the FLASH interrupt sources to be enabled or disabled This parameter can be any combination DoclD 18540 Rev 1 239 634 FLASH Memory FLASH UM1061 Return values Notes 12 2 9 2 Function Name Function Description Parameters Return values Notes 12 2 9 3 Function Name Function Description Parameters 240 634 FLASH ClearFlag FLASH GetFlagStat
277. O_HardwareFlowControl uint8 t SDIO ClockDiv Field Documentation uint32 t SDIO InitTypeDef SDIO ClockEdge Specifies the clock transition on which the bit capture is made This parameter can be a value of SDIO Clock Edge uint32 t SDIO InitTypeDef SDIO ClockBypass Specifies whether the SDIO Clock divider bypass is enabled or disabled This parameter can be a value of SDIO Clock Bypass uint32 t SDIO InitTypeDef SDIO ClockPowerSave DoclD 18540 Rev 1 UM1061 Secure digital input output interface SDIO 22 1 3 22 1 4 Specifies whether SDIO Clock output is enabled or disabled when the bus is idle This parameter can be a value of SDIO_Clock_Power_Save uint32 t SDIO InitTypeDef SDIO BusWide Specifies the SDIO bus widih This parameter can be a value of SDIO Bus Wide uint32 t SDIO InitTypeDef SDIO HardwareFlowControl Specifies whether the SDIO hardware flow control is enabled or disabled This parameter can be a value of SDIO Hardware Flow Control uint8_t SDIO_InitTypeDef SDIO_ClockDiv Specifies the clock frequency of the SDIO controller This parameter be a value between 0x00 and SDIO_CmdlnitTypeDef SDIO CmdlnitTypeDef is defined in the stm32f2xx_sdio h file and contains the SDIO command parameters Data Fields uint32 t SDIO Argument uint32 t SDIO Cmdlndex uint32 t SDIO Response uint32 t SDIO Wait uint32 t SDIO CPSM Field Documentation uint32 t SDIO Cmdln
278. PI 125 SendData Hardware CRC calculation DociD 18540 Rev 1 485 634 Serial peripheral interface UM1061 486 634 This section provides a set of functions allowing to manage the SPI CRC hardware calculation SPI communication using CRC is possible through the following procedure 1 Program the Data direction Polarity Phase First Data Baud Rate Prescaler Slave Management Peripheral Mode CRC Polynomial values using the SPI Init function Enable the CRC calculation using the SPI_CalculateCRC function Enable the SPI using the Cma function Before writing the last data to the TX buffer set the CRCNext bit using the SPI TransmitCRC function to indicate that after transmission of the last data the CRC should be transmitted 5 After transmitting the last data the SPI transmits the CRC SPI CRCNEXT bit is reset The CRC is also received and compared against the SPI RXCRCR value If the value does not match the SPI FLAG CRCERR flag is set and an interrupt can be generated when the SPI 25 IT ERR interrupt is enabled It is recommended not to read the calculated CRC values during the communication When the SPI is in slave mode be careful to enable CRC calculation only when the clock is stable that is when the clock is in the steady state If not a wrong CRC calculation may be done In fact the CRC is sensitive to the SCK slave input clock as soon as CRCEN
279. PIO input data port value Notes e None DoclD 18540 Rev 1 4 UM1061 General purpose Os GPIO 14 2 6 3 GPIO_ReadOutputDataBit Function Name Function Description Parameters Return values Notes uint8_t GPIO ReadOutputDataBit GPIO_TypeDef GPIOx uint 6 t GPIO Pin Reads the specified output data port bit e GPIOx where x can be A l to select the GPIO peripheral e GPIO Pin specifies the port bit to read This parameter be GPIO Pin x where x can be 0 15 The output port pin value None 14 2 6 4 GPIO ReadOutputData Function Name Function Description Parameters Return values Notes 14 2 6 5 SetBits Function Function Description Parameters uint16_t GPIO ReadOutputData TypeDef GPIOx Reads the specified GPIO output data port e GPIOx where x can be A l to select the GPIO peripheral GPIO output data port value None void GPIO SetBits GPIO_TypeDef GPIOx uint16_t GPIO_Pin Sets the selected data port bits e GPIOx where x can be to select the GPIO peripheral e GPIO_Pin specifies the port bits to be written This parameter can be any combination of GPIO_Pin_x where x can be 0 15 DoclID 18540 Rev 1 279 634 General purpose 1 GPIO UM1061 14 2 6 6 14 2 6 7 280 634 Return values Notes GPIO_ResetBits Function Name Function Description Paramet
280. Pointers to peripherals are used to access the peripheral control registers They point to data structures that represent the mapping of the peripheral control registers Peripheral registers structure stm32f2xx h contains the definition of all peripheral register structures The example below illustrates the SPI register structure declaration Seidl Perijslnerall imtewtage m typedef struct wlgsuEd SPI control register 1 not used 125 mode Address offset 0x00 16 t RESERVEDO lt Reserved 0x02 te SPI control register 2 Address offset 0x04 uintl6 t RESERVED1 Reserved 0x06 n ENCORE 16 SPI status register Address offset 0x08 n ie RESERVED2 Reserved Ox0A ERE ORE PERDR SPI data register Address offset 0 0 uintl6 t RESERVED3 Reserved 0 0 1 lt SPI CRC polynomial register not used 125 mode Address offset 0 10 uintl6 t RESERVED4 lt Reserved 0x12 DoclD 18540 Rev 1 1571 UM1061 STM32F2xx Standard Peripheral Library 3 SPI CRC register not used 125 mode Address offset 0x14 uintl6 t RESERVED5 Reserved 0x16 o SPI TX CRC register not used in 125 mode Address offset 0x18 uintl6 t RESE
281. Polarity Specifies the output polarity This parameter can be a value of TIM Output Compare Polarity uint16 t TIM_OCInitTypeDef TIM_OCNPolarity Specifies the complementary output polarity This parameter can be a value of TIM Output Compare N Polarity uint16 t TIM OCInitTypeDef TIM OCldleState Specifies the TIM Output Compare pin state during Idle state This parameter can be a value of TIM Output Compare Idle State uint16 t OClinitTypeDef TIM OCNIdleState Specifies the TIM Output Compare pin state during Idle state This parameter be a value of TIM Output Compare N Idle State DoclD 18540 Rev 1 IT UM1061 General purpose timers TIM 25 1 4 IClnitTypeDef is defined the stm32f2xx_tim h file contains the TIM Input Compare initialization parameters Data Fields e 16 t TIM Channel e uint16 t ICPolarity e uint16 t ICSelection e uint16 t ICPrescaler e uint16 t ICFilter Field Documentation e uint16 t ICInitTypeDef TIM Channel Specifies the TIM channel This parameter can be a value of TIM Channel e 6 t ICInitTypeDef TIM ICPolarity Specifies the active edge of the input signal This parameter be a value of TIM Input Capture Polarity e uint16 t ICInitTypeDef TIM ICSelection Specifies the input This parameter can be a value of TIM_Input_Capture_Selection e
282. R registers definition Data Fields JlOuint32 t CR e 2 t CSR Field Documentation e t PWR TypeDef CR PWR power control register Address offset 0x00 _ JO uint32_t PWR_TypeDef CSR PWR power control status register Address offset 0x04 PWR Firmware driver API description The following section lists the various functions of the PWR library Backup Domain access After reset the backup domain RTC registers RTC backup data registers and backup SRAM is protected against possible unwanted write accesses To enable access to the RTC Domain and RTC registers proceed as follows Enable the Power Controller PWR APB1 interface clock using the RCC_APB1PeriphClockCmd function Enable access to RTC domain using the PWR_BackupAccessCmd function e PWR_Delnit PWR_BackupAccessCmd Power control configuration PVD Configuration functions The PVD is used to monitor the VDD power supply by comparing it to a threshold selected by the PVD Level PLS 2 0 bits in the PWR_CR A PVDO flag is available to indicate if VDD VDDA is higher or lower than the PVD threshold This event is internally connected to the line16 and can generate an interrupt if enabled through the registers The PVD is stopped in Standby mode 18540 Rev 1 4 UM1061 Power control PWR 3 e PVDLevelConfig e PWR_PVvDCmd WakeUp pin configuration func
283. RSRAMIinit FSMC_NORSRAMStructinit FSMC NORSRAMCmd DoclD 18540 Rev 1 257 634 Flerible static memory controller FSMC UM1061 13 2 2 13 2 3 258 634 NAND controller The following seguence should be followed to configure the FSMC to interface with 8 bit or 16 bit NAND memory connected to the NAND Bank 1 4 5 6 Enable the clock for the FSMC and associated GPIOs using the following functions RCC_AHB3PeriphClockCmd RCC_AHB3Periph_FSMC ENABLE RCC_AHB1PeriphClockCmd RCC_AHB1Periph_GPIOx ENABLE FSMC pins configuration Connect the involved FSMC pins to AF 12 using the following function GPIO_PinAFConfig GPIOx GPIO PinSourcex GPIO AF FSMO Configure these FSMC pins in alternate function mode by calling the function GPIO Init Declare FSMC_NANDInitTypeDef structure for example FSMC_NANDInitTypeDef FSMC NANDInitStructure and fill the FSMC NANDinitStructure variable with the allowed values of the structure member Initialize the NAND Controller by calling the function FSMC NANDInit amp FSMC NANDinitStructure Then enable the NAND Bank for example FSMC_NANDCmd FSMC_Bank3_NAND ENABLE At this stage you can read write from to the memory connected to the NAND Bank To enable the Error Correction Code ECC use the function FSMC NANDECCCmd FSMC Bank3 ENABLE and to get the current ECC value use the function ECCval FSMC GetECC FSMC Bank3 NAND NAND Controller fu
284. RT GetlTStatus USART_TypeDef USARTx uint16 t USART IT Checks whether the specified USART interrupt has occurred or not USARTx where x can be 1 2 3 4 5 or 6 to select the USART or UART peripheral USART IT specifies the USART interrupt source to check This parameter can be one of the following values USART IT CTS CTS change interrupt not available for UART4 and UART5 USART IT LBD LIN Break detection interrupt A USART IT Transmit Data Register empty interrupt USART IT Transmission complete interrupt USART RXNE Receive Data register not empty interrupt A USART IT IDLE Idle line detection interrupt A USART IT ORE OverRun Error interrupt A USART IT Noise Error interrupt USART IT FE Framing Error interrupt USART Parity Error interrupt The new state of USART IT SET or RESET None 26 2 19 5 USART ClearlTPendingBit 610 634 DoclID 18540 Rev 1 4 UM1061 Universal synchronous asynchronous receiver transmitter USART 26 3 26 3 1 3 void USART_ClearlTPendingBit USART TypeDef USARTx uint16 t USART Function Description Clears the USARTx s interrupt pending bits Parameters e Return values Notes USARTXx where x be 1 2 3 4 5 or 6 to select the USART or UART peripheral USART IT specifies the interrupt pending bit to clear This
285. RVED6 Reserved 1 00 256 1 IZS configuration segisten Address offset uintl6 t RESERVED7 Reserved 1 f EN CE Undo SP SPI I28 prescaler register Address offset 0x20 uintl6 t RESERVED8 Reserved 0x22 SPI TypeDef The register names are the register acronyms written in upper case for each peripheral RESERVEDi I being an integer that indexes the reserved field indicates a reserved field Each peripheral has several dedicated registers which contain different flags Registers are defined within a dedicated structure for each peripheral Flags are defined as acronyms written in upper case and preceded by PPP FLAG The flag definition is adapted to each peripheral case and defined in stm32f2xx ppp h Peripheral declaration All peripherals are declared in stm32f2xx h The following example shows the declaration of the SPI peripheral Peripheral base address in the alias region define PERIPH BASE uint32 t 0x40000000 Peripheral memory map define APBIPERIPH BASE PERIPH BASE define APB2PERIPH BASE PERIPH BASE 0x00010000 define AHBIPERIPH BASE PERIPH BASE 0x00020000 define AHB2PERIPH BASE PERIPH BASE 0x10000000 1 peripherals base address define SPI2 BASE APBIP
286. Return values Notes CAN Structlnit Function Name Function Description Parameters Return values Notes parameters in the CAN InitStruct CANXx where x can be 1 or 2 to select the CAN peripheral CAN InitStruct pointer to a CAN InitTypeDef structure that contains the configuration information for the CAN peripheral Constant indicates initialization succeed which will be CAN InitStatus Failed or CAN InitStatus Success None void CAN Filterlnit CAN FilterlnitTypeDef CAN FilterlnitStruct Configures the CAN reception filter according to the specified parameters in the CAN FilterlnitStruct CAN FilterlnitStruct pointer to CAN FilterlnitTypeDef structure that contains the configuration information None None void CAN Structlnit CAN nitTypeDef CAN InitStruct Fills each CAN InitStruct member with its default value CAN SlaveStartBank CAN InitStruct pointer to a CAN InitTypeDef structure which ill be initialized None None DoclD 18540 Rev 1 101 634 Controller area network CAN UM1061 4 2 4 6 4 2 4 7 102 634 Function Name Function Description Parameters Return values Notes CAN DBGFreeze Function Name Function Description Parameters Return values Notes void CAN SlaveStartBank uint8 t CAN BankNumber Select the start bank filter for slave CAN BankNumber Select the start slave bank filter from 1 27 None None
287. S only Enter the symmetric key Configure the data type In case of decryption 5 5 you must prepare the key configure the key preparation mode Then Enable the CRYP peripheral using CRYP_Cmd function the BUSY flag is set Wait until BUSY flag is reset the key is prepared for decryption Configure the algorithm and chaining the DES TDES ECB CBC the AES in ECB CBC CTR Configure the direction encryption decryption Write the initialization vectors in CBC or CTR modes only b Flush the IN and OUT FIFOs using the CRYP_FIFOFlush function Basic Processing mode polling mode a Enable the cryptographic processor using function b Write the first blocks in the input FIFO 2 to 8 words using Dataln function c Repeat the following sequence until the complete message has been processed a Wait for flag CRYP FLAG OFNE occurs using GetFlagStatus function then read the OUT FIFO using CRYP DataOut function 1 block or until the FIFO is empty DocID 18540 Rev 1 131 634 Cryptographic processor CRYP UM1061 6 2 2 132 634 b Wait for flag CRYP_FLAG_IFNF occurs using CRYP_GetFlagStatus function then write the IN FIFO using CRYP_Dataln function 1 block or until the FIFO is full Atthe end of the processing CRYP_FLAG_BUSY flag will be reset and both FIFOs are empty CRYP FLAG IFEM is set and CRYP FLAG OFNE is reset You
288. SART IOs configuration Fe I I A I I I Enable GPIOC clock AHBlPeriphClockCmd RCC AHBlPeriph GPIOC ENABLE E P E E D 0 0 0 00 0 x Connect qme USART Se GPIO_PinAFConfig GPIOC GPIO PinSourcel0 CEO SARE Connect 11 to USARTS Rx CLLOC GIO PimSouceelil AR USA S Configure USART3 Tx and USART3 Rx alternate function LO GPIO Pim GPIO Pim 10 GPIO Pin 115 IO CRIO Moce GRIO Moce Arp Init trueture GPIO Speecl See 5p LO Olyos GPIO Onyo PP lube GPIO PUPA UP SERIO Tmitstructure 5 ra 0 00 i m USART configuration KOK KKK KKK KK KKK KK KK kck KK KK KK KK KK KKK USART3 configured as follow BaudRate 115200 baud Word Length 8 Bits One Stop Bit NN NI abis Hardware flow control disabled RTS and CTS signals Receive and transmit enabled Enable USART3 clock APBlPeriphClockCmd RCC APBlPeriph USART3 ENABLE USART Init tructu re USART BawmcRace 1152005 DoclD 18540 Rev 1 617 634 Universal synchronous asynchronous receiver transmitter USART UM1061 618 634 USART InitS USART InitS
289. SDIO CCRCFAIL Command response received CRC check failed interrupt SDIO IT DCRCFAIL Data block sent received CRC check failed interrupt SDIO IT CTIMEOUT Command response timeout interrupt SDIO IT DTIMEOUT Data timeout interrupt SDIO IT TXUNDERR Transmit FIFO underrun error interrupt SDIO IT RXOVERR Received FIFO overrun error interrupt SDIO IT CMDREND Command response received CRC check passed interrupt SDIO CMDSENT Command sent no response required interrupt SDIO IT DATAEND Data end data counter SDIO DCOUNT is zero interrupt A SDIO IT STBITERR Start bit not detected on all data signals in wide bus mode interrupt A SDIO IT SDIOIT SD O interrupt received interrupt SDIO CEATAEND CE ATA command completion signal received for CMD61 Return values None Notes None DoclD 18540 Rev 1 4 UM1061 Secure digital input output interface SDIO 22 3 22 3 1 SDIO Firmware driver defines SDIO Firmware driver defines SDIO SDIO Bus Wide e define SDIO BusWide 1b uint32 1 0 00000000 define SDIO BusWide 4b uint32 1 0 00000800 e define SDIO BusWide 8b uint32 1 0 00001000 SDIO Clock Bypass e define SDIO ClockBypass Disable uint32 1 0x00000000 e define SDIO ClockBypass Enable uint32 1 0x00000400 SDIO Clock Edge e define SDIO ClockEdge Rising uint32 1 0 00000000 e define SDIO Clo
290. SPI InitStruct Initializes the SPIx peripheral according to the specified parameters in the SPI InitStruct SPIx where x can be 1 2 or 3 to select the SPI peripheral SPI InitStruct pointer to a SPI InitTypeDef structure that contains the configuration information for the specified SPI peripheral None None void 125 Init SP TypeDef SPlx 25 InitTypeDef 125 InitStruct Initializes the SPIx peripheral according to the specified parameters in the 125 InitStruct SPIx where x can be 2 or 3 to select the SPI peripheral configured in 125 mode 125 InitStruct pointer to an 25 InitTypeDef structure that contains the configuration information for the specified SPI peripheral configured 125 mode None The function calculates the optimal prescaler needed to obtain the most accurate audio frequency depending on the 125 clock source the PLL values and the product configuration But in case the prescaler value is greater than 511 the default value 0x02 will be configured instead if an external clock is used as source clock for the 125 then the define 25 EXTERNAL CLOCK VAL in file stm32f2xx conf h should be enabled and set to the value of DoclD 18540 Rev 1 489 634 Serial peripheral interface SPI UM1061 the the source clock frequency in Hz 23 2 7 4 Function void SPI Structlnit InitTypeDef SPI InitStruct Function Description Fills each
291. SPI InitStruct member with its default value Parameters e SPI InitStruct pointer to a SPI InitTypeDef structure which will be initialized Return values e None Notes e None 23 2 7 5 125 Structinit Function Name void I2S Structlnit 2S nitTypeDef I2S InitStruct Function Description Fills each 125 InitStruct member with its default value Parameters e 125 InitStruct pointer toa 125 InitTypeDef structure which will be initialized Return values e None Notes None 23 2 76 SPI Function Name void SPI SP TypeDef SPIx FunctionalState NewState Function Description Enables or disables the specified SPI peripheral Parameters e SPlx where x can be 1 2 or 3 to select the SPI peripheral e NewState new state of the SPIx peripheral This parameter can be ENABLE or DISABLE 490 634 DoclD 18540 Rev 1 Gr UM1061 Serial peripheral interface SPI Return values Notes 23 2 7 7 125 Function Name Function Description Parameters Return values Notes 23 2 7 8 SPI_DataSizeConfig Function Name Function Description Parameters Return values Notes None None void 125 SP TypeDef SPlx FunctionalState NewSiate Enables or disables the specified SPI peripheral in 125 mode SPIx where x can be 2 or 3 to select the SPI peripheral NewState new state of the SPIx peripheral This parameter can be ENABLE or DISABLE None None void SPI Data
292. SetLatency FLASH Latency 3 FLASH PrefetchBufferCmd ENABLE FLASH InstructionCacheCmd ENABLE FLASH DataCacheCmd ENABLE fe CHK SYSCIK RCC HCLKConfig RCC SYSCLK Divl PCLK2 HCLK 2 RCC_PCLK2Config HCLK Div2 PCLK1 HCLK 4 oni Comrigure thes meim PLG ro 120 Miz RCC_PLLConfig RCC_PLLSource HSE PLL PLL PLL PLL 0 Enable the main PLL RCC PLLCmd ENABLE Wait 5111 the main PLE is ready while GetFlagStatus FLAG PLLRDY RESET t Select the main PLL as system clock source SYSCLKConfig RCC SYSCLKSource PLLCLK DoclD 18540 Rev 1 401 634 Reset and clock control RCC UM1061 fe mairt cill the main PLL is used as system clock source watie RCC Gei Ci else tSYSCLKSource SWS J Iie tells to Stereo User can accel here Some to deal with this error 402 634 DoclD 18540 Rev 1 UM1061 Random number generator RNG 20 Random number generator RNG 20 1 RNG Firmware driver registers structures 20 1 1 RNG_TypeDef RNG TypeDef is defined in the stm32f2xx h file and contains the RNG registers definition Data Fields e _ JOuini32 t CR e JjOuint32 t SR e _ JlOuint32 t DR Field Documentation e _ lO
293. SizeConfig SPI TypeDef SPlx uint16 t SPI DataSize Configures the data size for the selected SPI SPIx where x can be 1 2 or 3 to select the SPI peripheral SPI DataSize specifies the SPI data size This parameter can be one of the following values SPI DataSize 16b Set data frame format to 16bit SPI DataSize 8b Set data frame format to 8bit None None 23 2 7 9 SPI BiDirectionalLineConfig 4 DociD 18540 Rev 1 491 634 Serial peripheral interface SPI UM1061 Function Name Function Description Parameters Return values Notes void SPI BiDirectionalLineConfig SP TypeDef SPIx uint16_t SPI Direction Selects the data transfer direction in bidirectional mode for the specified SPI e SPlx where x can be 1 2 to select the SPI peripheral e Direction specifies the data transfer direction in bidirectional mode This parameter can be one of the following values SPI Direction Tx Selects Tx transmission direction SPI Direction Rx Selects Rx receive direction None None 23 2 7 10 SPI NSSInternalSoftwareConfig Function Name Function Description Parameters Return values Notes 23 2 7 11 SPI SSOutputCmd Function Name Function Description Parameters 492 634 void SPI NSSInternalSoftwareConfig 5 TypeDef SPlIx 16 t SPI NSSInternalSoft Configures internally by software the NSS pin for the selected SPI e SPlx
294. SmartCardNACKCmd Function Name void USART SmartCardNACKCmd USART_TypeDef USARTx FunctionalState NewState Function Description Enables or disables NACK transmission Parameters e USARTX where x can be 1 2 or 6 to select the USART or UART peripheral NewState new state of the transmission This parameter can be ENABLE or DISABLE Return values None Notes None IrDA mode functions USART IrDAConfig Function Name void USART IrDAConfig USART_TypeDef USARTx uint6 t USART_IrDAMode Function Description Configures the USART s IrDA interface DoclD 18540 Rev 1 4 UM1061 Universal synchronous asynchronous receiver transmitter USART Parameters e USARTx where x can be 1 2 3 4 5 or 6 to select the USART or UART peripheral e USART IrDAMode specifies the IrDA mode This parameter can be one of the following values USART IrDAMode LowPower USART IrDAMode Normal Return values e None Notes e None 26 2 17 2 USART IrDACmd Function Name void USART IrDACmd USART TypeDef USARTx FunctionalState NewState Function Description Enables or disables the USART s IrDA interface Parameters e USARTx where x can be 1 2 3 4 5 or to select the USART or UART peripheral e NewState new state of the IrDA mode This parameter be ENABLE or DISABLE Return values e None Notes e None 26 218 DMA transfers management functions 26 2 18 1 USART DMACmd Function Nam
295. State Function Description Enables or disables the specified CANx interrupts Parameters Return values Notes CAN GetFlagStatus where x be 1 or 2 to to select the CAN peripheral specifies the CAN interrupt sources to be enabled or disabled This parameter can be IT TME Transmit mailbox empty Interrupt CAN IT FIFO 0 message pending Interrupt IT FIFO 0 full Interrupt CAN IT FOVO FIFO 0 overrun Interrupt IT FIFO 1 message pending Interrupt CAN IT FF1 FIFO 1 full Interrupt CAN IT FOVT FIFO 1 overrun Interrupt CAN IT WKU Wake up Interrupt CAN IT SLK Sleep acknowledge Interrupt CAN IT EWG Error warning Interrupt CAN IT EPV Error passive Interrupt CAN IT BOF Bus off Interrupt CAN IT LEC Last error code Interrupt CAN IT ERR Error Interrupt NewState new state of the CAN interrupts This parameter can be ENABLE or DISABLE None None Function Name FlagStatus CAN GetFlagStatus CAN TypeDef CANx uint32 t CAN FLAG Function Description Checks whether the specified CAN flag is set or not Parameters e CANXx where x can be 1 or 2 to to select the CAN peripheral CAN FLAG specifies the flag to check This parameter can be one of the following values DoclD 18540 Rev 1 UM1061 Controller area network CAN Return values
296. Status FLASH GetStatus void Function Description Returns the FLASH Status Parameters e None Return values FLASH Status The returned value can be FLASH BUSY FLASH ERROR PROGRAM FLASH ERROR WRP FLASH ERROR OPERATION or FLASH COMPLETE Notes e None 12 2 9 5 FLASH_WaitForLastOperation 4 Function Name FLASH Status FLASH WaitForLastOperation void Function Description Waits for a FLASH operation to complete Parameters e None Return values e FLASH Status The returned value can be FLASH BUSY FLASH ERROR PROGRAM FLASH ERROR WRP FLASH ERROR OPERATION or FLASH COMPLETE Notes e None 18540 Rev 1 241 634 FLASH Memory FLASH UM1061 12 3 12 3 1 242 634 FLASH Firmware driver defines FLASH Firmware driver defines FLASH FLASH_BOR_Reset_Level e define 8 0 00 Supply voltage ranges from 2 70 to 3 60 V e define OB_BOR_LEVEL2 uint8_t 0x04 Supply voltage ranges from 2 40 to 2 70 V e define OB_BOR_LEVEL1 uint8_t 0x08 Supply voltage ranges from 2 10 to 2 40 V e define OB_BOR_OFF uint8_t 0x0C Supply voltage ranges from 1 62 to 2 10 V FLASH_Exported_Constants e define BYTEO ADDRESS uint32 1 0x40023C00 e define OPTCR BYTEO ADDRESS uint32 1 0 40023 14 e OPTCR BYTE1 ADDRESS uint32 t 0x40023C15 e define OPTCR 2 ADDRESS uint32 1 0 40023 16 FLASH Flags e define FLASH FLAG EOP uint32 1 0x
297. TED l2C FLAG GENCALL EV3 I2C EVENT SLAVE FAILURE EV3 2 I2C EVENT SLAVE STOP DETECTED EV4 I2C EVENT MASTER MODE SELECT EV5 I2C EVENT MASTER TRANSMITTER MODE SELECTED EV6 2 EVENT MASTER RECEIVER MODE SELECTED EV6 2 EVENT MASTER BYTE RECEIVED I2C EVENT MASTER BYTE TRANSMITTING EV8 I2C EVENT MASTER BYTE TRANSMITTED EV8 2 I2C EVENT MASTER MODE ADDRESS 10 EV9 An ErrorStatus enumeration value SUCCESS Last event is equal to the I2C EVENT ERROR Last event is different from the I2C EVENT For detailed description of Events please refer to section 2 Events in stm32f2xx i2c h file DocID 18540 Rev 1 325 634 Inter integrated circuit interface 12 UM1061 16 2 11 5 326 634 Function Name uint32 t 12C_GetLastEvent 2C_TypeDef 12 Function Description Returns the last 2 Event Parameters e 2 where x can be 1 2 3 to select the 12C peripheral Return values The last event Notes e For detailed description of Events please refer to section 2 Events stm32f2xx_i2c h file 2 GetFlagStatus Function Name FlagStatus I2C_GetFlagStatus 2C TypeDef I2Cx uint32 t I2C FLAG Function Description Checks whether the specified 12C flag is set or not Parameters e 2 where x be 1 2 3 to select the 12C peripheral e 2C FLAG specifies the flag to check This parameter can be one of the following valu
298. T_InitTypeDef USART_BaudRate This member configures the USART communication baud rate The baud rate is computed using the following formula IntegerDivider PCLKx 8 OVR8 1 USART_InitStruct gt USART_BaudRate FractionalDivider IntegerDivider u32 IntegerDivider 8 OVR8 1 0 5 Where OVR8 is the oversampling by 8 mode configuration bit in the CR1 register uint16 t USART InitTypeDef USART WordLength Specifies the number of data bits transmitted or received in a frame This parameter can be a value of USART_Word_Length uint16 t USART_InitTypeDef USART_StopBits Specifies the number of stop bits transmitted This parameter can be a value of USART Stop Bits uint16_t USART InitTypeDef USART Parity Specifies the parity mode This parameter can be a value of USART Parity uint16_t USART InitTypeDef USART Mode Specifies wether the Receive or Transmit mode is enabled or disabled This parameter can be a value of USART Mode uint16 t USART InitTypeDef USART HardwareFlowControl Specifies wether the hardware flow control mode is enabled or disabled This parameter can be a value of USART Hardware Flow Control DoclD 18540 Rev 1 UM1061 Universal synchronous asynchronous receiver transmitter USART 26 1 3 USART ClocklnitTypeDef USART ClocklnitTypeDef is defined in the stm32f2xx_usart h file and contains the USART Synchronous mode initialization parameters Data Fields e uint16
299. The new state of USART FLAG SET or RESET None void USART ClearFlag USART TypeDef USARTx uint16 t USART FLAG Clears the USARTx s pending flags USARTXx where x can be 1 2 3 4 5 or 6 to select the USART or UART peripheral USART_FLAG specifies the flag to clear This parameter can be any combination of the following values USART FLAG CTS CTS Change flag not available for UART4 and UART5 USART FLAG LBD LIN Break detection flag USART FLAG Transmission Complete flag USAHT FLAG RXNE Receive data register not empty flag None PE Parity error FE Framing error NE Noise error ORE OverRun error and IDLE Idle line detected flags are cleared by software sequence a read operation to USART SR register USART_GetFlagStatus followed by a read operation to USART DR register USART ReceiveData DoclD 18540 Rev 1 609 634 Universal synchronous asynchronous receiver UM1061 transmitter USART 26 2 194 USART GetlTStatus Function Name Function Description Parameters Return values Notes RXNE flag can be also cleared by a read to the USART DR register USART ReceiveData TC flag can be also cleared by software sequence a read operation to USART SR register USART GetFlagStatus followed by a write operation to USART DR register USART SendData TXE flag is cleared only by a write to the USART DR register USART_SendData ITStatus USA
300. Trig uint32 1 0x00000012 ADC InjecSimult uint32 1 0x00000015 ADC HegSimult uint32 1 0x00000016 ADC Interl uint32 1 0x0000001 7 ADC AlterTrig uint32 1 0 00000019 ADC data align e didefine e didefine DataAlign Right uint32 t 0x00000000 ADC DataAlign Left uint32 t 0x00000800 ADC delay between 2 sampling phases e didefine e didefine e didefine 80 634 ADC TwoSamplingDelay 5Cycles uint32 t 0x00000000 ADC TwoSamplingDelay 6Cycles uint32 t 0x00000100 ADC TwoSamplingDelay 7Cycles uint32 t 0x00000200 DocID 18540 Rev 1 4 UM1061 Analog to digital converter ADC 3 define define define define define define define define define define define define ADC TwoSamplingDelay 8Cycles uint32 t 0x00000300 ADC TwoSamplingDelay 9Cycles uint32 t 0x00000400 ADC TwoSamplingDelay 10Cycles uint32 1 0 00000500 ADC TwoSamplingDelay 11Cycles uint32 1 0 00000600 ADC TwoSamplingDelay 12Cycles uint32 1 0 00000700 ADC TwoSamplingDelay 13Cycles uint32 1 0 00000800 ADC TwoSamplingDelay 14Cycles uint32 1 0 00000900 ADC TwoSamplingDelay 15Cycles uint32 1 0x00000A00 ADC TwoSamplingDelay 16Cycles uint32 1 0x00000B00 ADC TwoSamplingDelay 17Cycles uint32 0 00000 00 ADC TwoSamplingDelay 18Cycles uint32 0 000
301. TypeDef PMC SYSCFG peripheral mode configuration register Address offset 0x04 e _ JOuint32_t SYSCFG TypeDef EXTICR 4 SYSCFG external interrupt configuration registers Address offset 0 08 0 14 e uint32_t SYSCFG TypeDef RESERVED 2 Reserved 0 18 0 1 e _ lO uint32_t SYSCFG TypeDef CMPCR SYSCFG Compensation cell control register Address offset 0x20 SYSCFG Firmware driver API description The following section lists the various functions of the SYSCFG library How to use this driver This driver provides functions for Remapping the memory accessible in the code area using SYSCFG MemoryRemapConfig Manage the EXTI lines connection to the GPIOs using SYSCFG EXTILineConfig Select the ETHERNET media interface RMII RII using SYSCFG ETH MedialnterfaceConfig SYSCFG APB clock must be enabled to get write access to SYSCFG registers using RCC_APB2PeriphClockCmd RCC_APB2Periph_SYSCFG ENABLE Functions DocID 18540 Rev 1 4 UM1061 System configuration controller SYSCFG 24 2 1 24 2 1 1 24 2 1 2 Functions SYSCFG Delnit Function Name Function Description Parameters Return values Notes SYSCFG_DelInit SYSCFG_MemoryRemapConfig SYSCFG EXTILineConfig SYSCFG ETH MedialnterfaceConfig SYSCFG CompensationCellCmd SYSCFG GetCompensationCellStatus void SYSCFG Delnit void Deinitializes the Alternate Functions remap and EXTI configuration reg
302. TypeDef RESERVED3 Reserved 210 e 2 t CAN_TypeDef FFA1R filter FIFO assignment register Address offset 0x214 e 32 t CAN TypeDeft RESERVED4 Reserved 218 e _ 2 t CAN_TypeDef FA1R CAN filter activation register Address offset 0x21C e 32 t CAN_TypeDef RESERVED5 8 Reserved 0x220 0x23F e FilterRegister TypeDef CAN TypeDef sFilterRegister 28 Filter Register Address offset 0x240 0x31C CAN InitTypeDef CAN InitTypeDef is defined in the stm32f2xx can h DocID 18540 Rev 1 4 UM1061 Controller area network CAN 4 Data Fields uint16 t CAN Prescaler uint8 t CAN Mode uint8 t CAN SJW uint8_t CAN 51 uint8_t CAN BS2 FunctionalState CAN TTCM FunctionalState CAN ABOM FunctionalState CAN AWUM FunctionalState CAN NART FunctionalState CAN RFLM FunctionalState CAN TKFP Field Documentation uint16_t CAN InitTypeDef CAN Prescaler Specifies the length of a time quantum It ranges from 1 to 1024 uint8_t CAN_InitTypeDef CAN_Mode Specifies the CAN operating mode This parameter can be a value of CAN operating mode uint8 t CAN InitTypeDef CAN SJW Specifies the maximum number of time quanta the CAN hardware is allowed to lengthen or shorten a bit to perform resynchronization This parameter can be a value of CAN_synchronisation_jump_width uint8 t CAN InitTypeDef CAN BS1 Specifies the number of time quanta in
303. UM1061 92 634 Field Documentation e _ JOuint32_t CAN_TypeDef MCR CAN master control register Address offset 0 00 e 2 t CAN_TypeDef MSR CAN master status register Address offset 0 04 e _ JOuint32_t CAN_TypeDef TSR CAN transmit status register Address offset 0x08 e _ JOuint32_t CAN_TypeDef RFOR CAN receive FIFO 0 register Address offset 0 0 e _ 2 t CAN_TypeDef RF1R CAN receive FIFO 1 register Address offset 0 10 e JOuint32_t TypeDef IER interrupt enable register Address offset 0x14 e _ JOuint32_t CAN_TypeDef ESR CAN error status register Address offset 0x18 e _ JOuint32_t CAN_TypeDef BTR CAN bit timing register Address offset e uint32 t CAN_TypeDef RESERVEDO 88 Reserved 0x020 0x17F e TypeDef CAN_TypeDef sTxMailBox 3 CAN Tx MailBox Address offset 0x180 e CAN_FIFOMailBox_TypeDef CAN TypeDef sFIFOMailBox 2 FIFO MailBox Address offset e Uuint32 t CAN_TypeDef RESERVED1 12 Reserved 0 100 Ox1FF JOuint32_t CAN_TypeDef FMR filter master register Address offset 0x200 2 TypeDef FM1R filter mode register Address offset 0x204 e Uuint32 t CAN TypeDeft RESERVED2 Reserved 0x208 e 2 t CAN TypeDef FS1R filter scale register Address offset 0 20 e uint32 t CAN
304. USART address using the USART_SetAddress function 3 Configures the wake up method USART WakeUp ldleLine or USART WakeUp AddressMark using USART_WakeUpConfig function only for the slaves 4 Enable the USART using the USART_Cmd function 5 Enter the USART slaves in mute mode using USART_ReceiverWakeUpCmd function The USART Slave exit from mute mode when receive the wake up condition USART SetAddress e USART_ReceiverWakeUpCmd e USART_WakeUpConfig LIN mode This subsection provides a set of functions allowing to manage the USART LIN Mode communication In LIN mode 8 bit data format with 1 stop bit is required in accordance with the LIN standard The USART IP supports only the LIN Master Synchronous Break send capability and LIN slave break detection capability DocID 18540 Rev 1 593 634 Universal synchronous asynchronous receiver UM1061 transmitter USART 26 2 6 594 634 13 bit break generation and 10 11 bit break detection USART LIN Master transmitter communication is possible through the following procedure a b ii Program the Baud rate Word length 8bits Stop bits 1bit Parity Mode transmitter or Mode receiver and hardware flow control values using the USART Init function Enable the USART using the USART_Cmd function Enable the LIN mode using the USART_LINCmd function Send the break character using USART_SendBreak function USART LIN Master receiver co
305. USART_Cmd function Enable the Smartcard using the USART_SmartCardNACKCmd function Enable the Smartcard interface using the USART_SmartCardCmd function Please refer to the ISO 7816 3 specification for more details 3 1 5 stop bits for both transmitting receiving to avoid switching between the two configurations It is also possible to choose 0 5 stop bit for receiving but it is recommended to use In smartcard mode the following bits must be cleared e LINEN bit in the register HDSEL and IREN bits in the USART CR3 register and UART5 peripherals Smartcard mode is available peripherals only available USART_SetGuardTime DoclD 18540 Rev 1 595 634 Universal synchronous asynchronous receiver UM1061 transmitter USART 26 2 8 26 2 9 26 2 10 596 634 lt lt USART_SmartCardCmd e USART_SmartCardNACKCmd IrDA mode This subsection provides a set of functions allowing to manage the USART IrDA communication IrDA is a half duplex communication protocol If the Transmitter is busy any data on the IrDA receive line will be ignored by the IrDA decoder and if the Receiver is busy data on the TX from the USART to IrDA will not be encoded by IrDA While receiving data transmission should be avoided as the data to be transmitted could be corrupted IrDA communication is possible through the following pro
306. WF uint32 t 0x00000001 RTC Hour Formats e didefine e didefine RTC HourFormat 24 uint32 1 0x00000000 RTC HourFormat 12 uint32 1 0x00000040 Input parameter format definitions e didefine e didefine 444 634 RTC Format BIN uint32 t 0x000000000 RTC Format BCD uint32 1 0 000000001 DocID 18540 Rev 1 4 UM1061 Real time clock RTC 3 Interrupts Definitions e define e define e define e define e define e define RTC Legacy e define e define RTC IT TS uint32 t 0x00008000 RTC IT WUT uint32 1 0 00004000 RTC ALRB uint32 1 0 00002000 RTC IT ALRA uint32 1 0 00001000 RTC IT TAMP uint32 1 0x00000004 RTC IT 2 1 0 00020000 RTC DigitalCalibConfigRTC CoarseCalibConfig RTC DigitalCalibCmdRTC CoarseCalibCmd RTC Month Date Definitions e didefine e didefine e didefine RTC Month January uint32 1 0x00000001 RTC Month February uint32 1 0x00000002 RTC Month March uint32 t 0x00000003 DocID 18540 Rev 1 445 634 Real time clock RTC UM1061 446 634 e define RTC Month April uint32 t 0x00000004 e define RTC Month May uint32 1 0x00000005 e didefine RTC Month June uint32 t 0x00000006 e define RTC Month July uint32 t 0x00000007 e define RTC Month Augusi uint32 t 0x00000008 e define RTC Month September uint32 t 0x00000009 e define RTC Month October
307. YP TypeDef KORR CRYP key right register 0 Address offset 0x24 JO uint32 t CRYP_TypeDef K1LR CRYP key left register 1 Address offset 0x28 JO uint32 t CRYP_TypeDef K1RR CRYP key right register 1 Address offset 0 2 JO uint32 t CRYP_TypeDef K2LR CRYP key left register 2 Address offset 0x30 JO uint32 t CRYP TypeDef K2RR CRYP key right register 2 Address offset 0x34 JO uint32 t CRYP_TypeDef K3LR CRYP key left register 3 Address offset 0x38 10 uint32 t CRYP_TypeDef K3RR CRYP key right register Address offset JO uint32 t CRYP_TypeDef IVOLR CRYP initialization vector left word register 0 Address offset 0x40 __ 10 uint32_t CRYP_TypeDef IVORR CRYP initialization vector right word register 0 Address offset 0x44 __10 uint32 t CRYP TypeDef IV1LR CRYP initialization vector left word register 1 Address offset 0x48 __10 uint32 t CRYP_TypeDef IV1RR CRYP initialization vector right word register 1 Address offset 0x4C CRYP_InitTypeDef CRYP_InitTypeDef is defined in the stm32f2xx_cryp h file and contains the CRYP initialization parameters Data Fields uint16 t CRYP_AlgoDir uint18 t CRYP_AlgoMode uint18 t DataType uint18 t CRYP_KeySize Field Documentation uint16 t CRYP InitTypeDef CRYP AlgoDir Encrypt Decrypt This parameter be a value of CRYP_Algorithm_Direction uint16_t CRYP_InitTypeDef CRYP_AlgoMode
308. _AHB2PeriphClockCmd RCC_AHB2Periph_DCMI ENABLE RCC_AHB1PeriphClockCmd RCC_AHB1Periph_GPIOx ENABLE DCMI pins configuration a Connect the involved DCMI pins to AF13 using the following function GPIO PinAFConfig GPlOx PinSourcex GPIO DOMI b Configure these DCMI pins in alternate function mode by calling the function GPIO Init Declare a DOMI InitTypeDef structure for example InitTypeDef DOMI InitStructure and fill the DCMI InitStructure variable with the allowed values of the structure member nitialize the DCMI interface by calling the function DCMI Init amp DCMI InitStructure Configure the Stream1 channel1 to transfer Data from DCMI DR register to the destination memory buffer Enable DOMI interface using the function DCMI Cmd ENABLE Start the image capture using the function DCMI_CaptureCmd ENABLE At this stage the interface waits for the first start of frame then a request is generated continuously once depending on the mode used Continuous Snapshot to transfer the received data into the destination memory have to use the DCMI_CROPConfig function to configure the coordinates and size of the window to be captured then enable the Crop feature using DCMI CROPOCmd ENABLE In this case the Crop configuration should be made before to enable and start the DCMI interface If you need to capture only a rectangular window from the received image you Initialization and con
309. _filter_FIFO e define CAN Filter 8 1 0 00 Filter FIFO 0 assignment for filter x e define CAN_Filter_FIFO1 uint8_t 0x01 Filter FIFO 1 assignment for filter x e CAN_FilterFIFOOCAN_Filter_FIFOO e CAN FilterFIFO1CAN Filter FIFO1 CAN filter mode e didefine CAN FilterMode IdMask uint8 t 0x00 identifier mask mode e define CAN FilterMode ldList uint8 1 0 01 identifier list mode CAN filter scale e didefine CAN FilterScale 16bit uint8 t Ox00 Two 16 bit filters e define CAN FilterScale 32bit uint8 1 0 01 One 32 bit filter CAN flags e define CAN FLAG RQCPO uint32 t 0x38000001 Request MailBox0 Flag e define CAN_FLAG_RQCP1 uint32_t 0x38000100 Request 1 Flag DocID 18540 Rev 1 4 UM1061 Controller area network CAN 3 e define CAN_FLAG_RQCP2 uint32_t 0x38010000 Request MailBox2 Flag e define CAN_FLAG_FMPO uint32_t 0x12000003 FIFO 0 Message Pending Flag e define CAN_FLAG_FFO uint32_t 0x32000008 FIFO 0 Full Flag e define CAN FLAG FOVO uint32 1 0x32000010 FIFO 0 Overrun Flag e define CAN FLAG FMP1 uint32 1 0 14000003 FIFO 1 Message Pending Flag e define CAN FLAG FFfi uint32 1 0 34000008 FIFO 1 Full Flag e define CAN FLAG FOV1 uint32 1 0x34000010 FIFO 1 Overrun Flag e define CAN FLAG WkK U uint32 1 0x31000008 Wake up Flag e define CAN FLAG SLAK uint32 t 0x31000012 Slee
310. a FLASH Status FLASH ProgramHalfWord uint32 t Address t Data FLASH Status FLASH ProgramByte uint32 t Address uint8 t Data Any operation of erase or program should follow these steps 1 Call the FLASH Unlock function to enable the FLASH control register access 2 the desired function to erase sector s or program data l IRROFF is set to on STM32F20xx devices this value can be lowered to 1 65 V when the device operates in a reduced temperature range DocID 18540 Rev 1 227 634 FLASH Memory FLASH UM1061 12 2 4 228 634 3 Call the FLASH Lock function to disable the FLASH control register access recommended to protect the FLASH memory against possible unwanted operation The FLASH memory programming functions are the following FLASH Unlock FLASH Lock FLASH EraseSector FLASH EraseAllSectors FLASH ProgramDoubleWord FLASH ProgramWord FLASH ProgramHalfWord FLASH Option bytes programming This group includes the following functions void FLASH OB Unlock void void FLASH OB Lock void void FLASH OB WhRPConfig uint32 t OB WRP FunctionalState NewState void FLASH OB RDPOonfig uint8 t void FLASH OB UserConfig uint8 t OB IWDG uint8 t OB STOP uint8 t OB STDBY void FLASH OB BORConfig uint8 t BOR FLASH Status FLASH ProgramOTP uint32 t Address uint32 t Data FLASH Status FLASH OB Launch void uint32 t F
311. a ie ili la VSIEMSZEZOS WIE ol include stm32f2xx wwdg h mise in USE STM322xG EVAL stm322xg eval h Default status disabled This define statement is used to include the driver for STM322xG_EVAL board when used DATA ExtSRAM System stm32f2xx c Default status disabled This define statement enables the use of the external SRAM mounted on STM322xG EVAL board as data memory 38 634 DoclD 18540 Rev 1 ky UM1061 How to use and customize the library Parameter File Description VECT_TAB_SRAM Default status disabled When enabled this define statement relocate the vector table in the Internal SRAM VECT_TAB_OFFSET Default value 0x00 Defines the vector table base offset It must be a multiple of 0x200 Use this define statement to build an application that will be loaded at an address different from the Flash memory base address for example when building an application to be loaded through in application programming IAP program Notes These define statements are declared the compiler preprocessor section of the template projects provided within the library As a consequence you do not need to enable them in the corresponding header file 2 2 Library programming model Direct register Access This model is based on direct register access using the CMSIS layer This layer provides the definition of a
312. able write access to IWDG PR and IWDG RLR registers IWDG WriteAccess Disable Disable write access to IWDG PR and IWDG RLR registers Return values Notes None DoclD 18540 Rev 1 339 634 Independent watchdog IWDG UM1061 17 2 1 2 17 2 1 3 17 2 1 4 340 634 IWDG_SetPrescaler Function Name void IWDG SetPrescaler uint8 t IWDG Prescaler Function Description Sets IWDG Prescaler value Parameters e IWDG Prescaler specifies the IWDG Prescaler value This parameter can be one of the following values IWDG Prescaler 4 IWDG prescaler set to 4 IWDG Prescaler 8 IWDG prescaler set to 8 IWDG Prescaler 16 IWDG prescaler set to 16 IWDG Prescaler 32 IWDG prescaler set to 32 IWDG Prescaler 64 IWDG prescaler set to 64 IWDG Prescaler 128 IWDG prescaler set to 128 IWDG Prescaler 256 IWDG prescaler set to 256 Return values e None Notes None IWDG SetReload Function Name void IWDG_SetReload uint16_t Reload Function Description Sets IWDG Reload value Parameters e Reload specifies the IWDG Reload value This parameter must be a number between 0 and OxOFFF Return values e None Notes e None IWDG ReloadCounter Function Name void IWDG ReloadCounter void Function Description Reloads IWDG counter with value defined in the reload register write access to IWDG PR and IWDG RLR registers disabled DocID 18540 Rev 1 Ly UM1061 Independ
313. advised to use the following functions The CRYPT interrupts have no pending bits the interrupt is cleared as soon as the associated event is reset CRYP_ITConfig to enable or disable the interrupt source CRYP_GetITStatus to check if Interrupt occurs The functions used to manage the CRYP controller event are the following CRYP_ITConfig e GetllTStatus CRYP_GetFlagStatus High level functions The library also includes high level function High Level AES functions e CRYP_AES ECB AES DocID 18540 Rev 1 4 UM1061 Cryptographic processor CRYP AES CTR High Level TDES functions e CRYP_TDES_ECB e CRYP_TDES_CBC High Level DES functions e CRYP_DES_ECB e CRYP DES CBC 6 2 5 Initialization and configuration functions 6 2 5 1 CRYP Delnit Function Name void CRYP_Delnit void Function Description Deinitializes the CRYP peripheral registers to their default reset values Parameters e None Return values e None Notes e None 6 2 5 2 CRYP Init Function Name void CRYP Init CRYP InitTypeDef CRYP InitStruct Function Description Initializes the CRYP peripheral according to the specified parameters in the CRYP_InitStruct Parameters e CRYP_InitStruct pointer to a CRYP InitTypeDef structure that contains the configuration information for the CRYP peripheral Return values e None Notes e None 6 2 5 3 CRYP Stru
314. ady interrupt RCC_IT_HSIRDY HSI ready interrupt RCC_IT_HSERDY HSE ready interrupt RCC_IT_PLLRDY main PLL ready interrupt RCC_IT_PLLI2SRDY PLLI2S ready interrupt RCC IT CSS Clock Security System interrupt Return values The new state of RCC SET or RESET Notes e None RCC_ClearlTPendingBit Function Name void RCC_ClearlTPendingBit uint8 t RCC IT Function Description Clears the RCC s interrupt pending bits Parameters e RCC specifies the interrupt pending bit to clear This parameter can be any combination of the following values RCC IT LSIRDY LSI ready interrupt RCC IT LSERDY LSE ready interrupt RCC IT HSIRDY HSI ready interrupt RCC IT HSERDY HSE ready interrupt RCC IT PLLRDY main PLL ready interrupt RCC IT PLLI2SRDY PLLI2S ready interrupt RCC IT CSS Clock Security System interrupt Return values e None Notes e None RCC Firmware driver defines RCC Firmware driver defines RCC RCC AHB1 Peripherals e define RCC GPIOA uint32 t 0x00000001 e define RCC GPIOB uint32 t 0x00000002 DoclID 18540 Rev 1 UM1061 Reset and clock control RCC 3 define define define define define define define define define define define define GPIOC uint32 t 0x00000004 RCC GPIOD uint32 t 0x00000008 RCC AHB1Periph GPIOE uint32 1 0 000
315. al peripheral interface SPI UM1061 define 12S_AudioFreq_Default uint32_t 2 SPI_I2S_Clock_Polarity e define 12S CPOL Low uint16 1 0 0000 e define 25 CPOL High uint16 1 0x0008 SPI I2S Data Format e define 25 DataFormat 16b uint16 1 0x0000 e define 25 DataFormat 16bextended uint16 1 0x0001 e define 12S_DataFormat_24b uint16_t 0x0003 e define 25 DataFormat 32b uint16 1 0x0005 SPI 128 DMA transfer requests e define SPI 25 DMAReq Tx uint16 1 0 0002 e SPI 25 DMAReq Rx uint16 1 0x0001 SPI I2S flags definition e define SPI 128 FLAG RXNE uint16 t 0x0001 e SPI 125 FLAG TXE uint16 1 0 0002 502 634 DoclID 18540 Rev 1 3 UM1061 Serial peripheral interface SPI define define define define define define define I2S_FLAG_CHSIDE uint16_t 0x0004 12S_FLAG_UDR uint16_t 0x0008 SPI_FLAG_CRCERR uint16_t 0x0010 SPI FLAG MODF uint16 1 0x0020 SPI 125 FLAG OVhR uint16 1 0 0040 SPI 125 FLAG BSY uint16 t 0x0080 SPI 125 FLAG TIFRFE uint16 1 0 0100 SPI 125 definition 3 define define define define SPI 125 IT TXE uint8 t 0x71 SPI 125 IT RXNE uint8 1 0x60 SPI 125 IT ERR uint8 t 0x50 125 UDR uint8 1 0 53 DocID 18540 Rev 1 503 634 Serial peripheral interface SPI UM1061 504 634 e define e define e define
316. alState NewState Selects the TIMx peripheral Capture Compare DMA source TIMx where x can be 1 2 3 4 5 or 8 to select the TIM peripheral NewState new state of the Capture Compare DMA source This parameter can be ENABLE or DISABLE None None DoclD 18540 Rev 1 4 UM1061 General purpose timers TIM 25 2 14 Clocks management functions 25 2 14 1 InternalClockConfig Function Name void TIM InternalClockConfig TIM TypeDef TIMx Function Description Configures the TIMx internal Clock Parameters e TIMx where x be 1 2 3 4 5 8 9 or 12 to select the TIM peripheral Return values e None Notes e None 25 2 14 2 ITRxExternalClockConfig Function Name void TIM ITRxExternalClockConfig TIM TypeDef TIMx uint16 t InputTriggerSource Function Description Configures the TIMx Internal Trigger as External Clock Parameters e TIMx where x be 1 2 3 4 5 8 9 12 to select the TIM peripheral TIM_InputTriggerSource Trigger source This parameter can be one of the following values TIM TS ITRO Internal Trigger O TS ITR1 Internal Trigger 1 TS ITR2 Internal Trigger 2 TS ITRS Internal Trigger Return values Notes None 25 2 14 3 TIM TlxExternalClockConfig DociD 18540 Rev 1 561 634 General purpose timers TIM UM1061 Function Name Function Description Parameters Return
317. all the TIM Cmd ENABLE function to enable the TIM counter All other functions can be used separately to modify if needed a specific feature of the Timer In case of PWM mode this function is mandatory TIM OCxPreloadConfig TIMx TIM OCPreload ENABLE a If the corresponding interrupt or DMA reguest are needed the user should 1 Enable the NVIC or the DMA to use the TIM interrupts or DMA requests 2 Enable the corresponding interrupt DMA request using the function ITConfig TIMx CCx DMA Cmd TIMx TIM DMA OC2lnit TIM_OC4Init TIM_OCStructinit TIM SelectOCxM TIM_SetCompare1 TIM_SetCompare2 TIM_SetCompare3 TIM_SetCompare4 TIM_ForcedOC1Config TIM_ForcedOC2Config TIM_ForcedOC3Config TIM_ForcedOC4Config TIM_OC1PreloadConfig TIM_OC2PreloadConfig TIM_OC3PreloadConfig TIM_OC4PreloadConfig TIM_OC1FastConfig TIM_OC2FastConftig OCSFastConfig TIM_OC4FastConfig TIM ClearOC1Ref TIM ClearOC2Ref ClearOCS3Ref ClearOC4Ref OCiPolarityConfig OC1NPolarityConfig OC2PolarityConfig TIM OC2NPolarityConfig OCSPolarityConfig DoclD 18540 Rev 1 4 UM1061 General purpose timers TIM e OC3NPolarityConfig OC4PolarityConfig e e 25 2 3 Input Captu
318. an be a value of DAC_wave_generation e uint32 t DAC_InitTypeDef DAC_LFSRUnmask_TriangleAmplitude Specifies the LFSR mask for noise wave generation or the makimum amplitude triangle generation for the DAC channel This parameter can be a value of DAC_Ifsrunmask_triangleamplitude e uint32 t DAC_InitTypeDef DAC_OutputBuffer Specifies whether the DAC channel output buffer is enabled or disabled This parameter can be a value of DAC output buffer 7 2 DAC Firmware driver API description The following section lists the various functions of the DAC library 7 2 1 DAC peripheral features 4 DAC Channels The device integrates two 12 bit Digital Analog Converters that can be used independently or simultaneously dual mode e DAC channel1 with DAC_OUT1 PA4 as output DocID 18540 Rev 1 151 634 Digital to analog converter DAC UM1061 152 634 DAC channel2 with DAC_OUT2 as output DAC Triggers Digital to Analog conversion can be non triggered using DAC_Trigger_None and DAC_OUT1 DAC_OUT2 is available once writing to DHRx register using DAC SetChannel1Data DAC_SetChannel2Data functions Digital to Analog conversion can be triggered by External event EXTI Line 9 GPIOx Pin9 using DAC Trigger Ext IT9 The used pin GPIOx Pin9 must be configured in input mode e Timers TRGO TIM2 5 6 and TIM8 DAC Trigger T2 TRGO DAC Trigger T4 TRGO The timer TRGO event shoul
319. an use one of the following two methods After checking flag you should clear it using HASH ClearFlag function And after checking an interrupt event you should clear it using HASH ClearlTPendingBit function J Check on HASH flags using the HASH GetFlagStatus function Use HASH interrupts through the function HASH ITConfig at initialization phase and HASH GetlTStatus function into interrupt routines in hashing phase 11 Save and restore hash processor context using HASH SaveContext and HASH RestoreContext functions HMAC operation The HMAC algorithm is used for message authentication by irreversibly binding the message being processed to a key chosen by the user For HMAC specifications refer to HMAC keyed hashing for message authentication H Krawczyk M Bellare R Canetti February 1997 Basically the HMAC algorithm consists of two nested hash operations HMAC message Hash key pad KOR 0x5C Hash key pad KOR 0x36 message where e is a sequence of zeroes needed to extend the key to the length of the underlying hash function data block that is 512 bits for both the SHA 1 and MD5 hash algorithms represents the concatenation operator DoclD 18540 Rev 1 UM1061 Hash processor HASH To compute the HMAC four different phases are required 1 Initialize the HASH using HASH_Init function to do HMAC operation 2 key to be used for the inner h
320. and MCO2 OFFAII interrupts disabled e This function doesn t modify the configuration of the Peripheral clocksLSI LSE and RTC clocks void HSEConfig uint8_t HSE Configures the External High Speed oscillator HSE e RCC HSE specifies the new state of the HSE This parameter can be one of the following values RCC HSE OFF turn OFF the HSE oscillator HSERDY flag goes low after 6 HSE oscillator clock cycles HSE turn ON the HSE oscillator DoclD 18540 Rev 1 361 634 Reset and clock control RCC UM1061 19 2 6 3 19 2 6 4 362 634 Return values Notes HSE Bypass HSE oscillator bypassed with external clock None After enabling the HSE RCC_HSE_ON or RCC_HSE_Bypass the application software should wait on HSERDY flag to be set indicating that HSE clock is stable and can be used to clock the PLL and or system clock HSE state can not be changed if it is used directly or through the PLL as system clock In this case you have to select another source of the system clock then change the HSE state ex disable it The HSE is stopped by hardware when entering STOP and STANDBY modes This function reset the CSSON bit so if the Clock security system CSS was previously enabled you have to enable it again after calling this function RCC_WaitForHSEStartUp Function Name ErrorStatus RCC_WaitForHSEStartUp void Function Description Waits for HSE start up Pa
321. and flag management 404 20 2 5 Initialization and configuration functions 405 20 2 8 Get 32 bit Random number function 406 20 2 7 Interrupt and flag management 406 20 3 RNG Firmware driver 2 408 20 3 1 RNG Firmware driver 408 20 4 RNG Programming 409 21 Real time clock RTC 0 ee 410 10 634 18540 Rev 1 Gr UM1061 Contents 21 1 RTC Firmware driver registers structures 410 21 11 410 21 4 2 RIC InitIypebDet ren 412 21 1 3 RTC 413 21 1 4 RTC 413 21 1 5 RTC 414 21 2 Firmware driver description sssssssssennneeeeeessrrrnnnneeeeee 414 21 2 1 Backup Domain operating 414 21 2 2 How to use the RTC driver 415 21 2 8 RTC configuration sss 416 21 2 4 Backup Data registers configuration 418 21 25 and low power modes sse 419 21 2 6 RTC Tamper and TimeStamp pin selection and Output Type Conf
322. aphic processor CRYP e uint32 t CRYP_Context CRYP_K3LR e uint32 t CRYP_Context CRYP_K3RR 6 2 CRYP Firmware driver API description The following section lists the various functions of the CRYP library 6 2 1 How to use this driver Enable the CRYP controller clock using RCC_AHB2PeriphClockCmd RCC_AHB2Periph_CRYP ENABLE function Initialize the CRYP using CRYP_Init CRYP_Keylnit and if needed CRYP_IVInit Flush the IN and OUT FIFOs by using CRYP_FIFOFlush function Enable the CRYP controller using the CRYP_Cmd function If using DMA for Data input and output transfer Activate the needed DMA Requests using CRYP_DMACmd function If DMA is not used for data transfer use CRYP_Dataln and CRYP_DataOut functions to enter data to IN FIFO and get result from OUT FIFO To control CRYP events you can use one of the following two methods Check CRYP flags using the CRYP_GetFlagStatus function Use interrupts through the function CRYP_ITConfig at initialization phase and CRYP_GetITStatus function into interrupt routines in processing phase Save and restore Cryptographic processor context using CRYP_SaveContext and CRYP_RestoreContext functions Procedure to perform an encryption or a decryption Initialization a Initialize the peripheral using CRYP Keylnit and CRYP_IVInit functions Configure the key size 128 192 or 256 bit in the AE
323. ar flags Get FLASH operation status Wait for last FLASH operation 12 2 2 FLASH interface configuration This group includes the following functions void FLASH SetLatency uint32 t FLASH Latency To correctly read data from FLASH memory the number of wait states LATENCY must be correctly programmed according to the frequency of the CPU clock HCLK and the supply voltage of the device Table 9 Number of wait states according to CPU clock HCLK frequency Wait states HCLK clock frequency MHz Voltage range 2 7 to Voltage range 2 4 to Voltage range 2 1 to Voltage range 1 8 to latency 3 6 V 27V 24V 2 1 V OWS 1CPU 0 lt HCLK lt 30 0 HCLK lt 24 0 HCLK s 18 0 HCLK s 16 cycle 1WS 2CPU 30 HCLK lt 60 24 HCLK s 48 18 HCLK s 36 16 HCLK s 32 cycle 2WS 3CPU 60 lt HCLK lt 90 48 HCLK s 72 36 HCLK s 54 32 HCLK s 48 cycle 3WS ACPU 90 HCLK lt 120 72 lt HCLK lt 96 54 HCLK s 72 48 HCLK lt 64 cycle 4WS 5CPU NA 96 lt HCLK lt 120 72 HCLK s 90 64 HCLK s 80 cycle 5WS 6CPU NA NA 90 lt HCLK lt 108 80 HCLK s 96 cycle 6WS 7CPU NA NA 108 lt HCLK lt 120 96 HCLK s 112 cycle If IRROFF is set to on STM32F20xx devices this value can be lowered to 1 65 V when the device operates in a reduced temperature range 226 634 DoclD 18540 Rev 1 UM1061 FLASH Memory FLASH
324. arameter can be a value of FSMC Data Width uint32 t FSMC NORSRAMlInitTypeDef FSMC BurstAccessMode Enables disables the burst access mode for Flash memory valid only with synchronous burst Flash memories This parameter can be a value of FSMC Burst Access Mode uint32 t FSMC NORSRAMInitTypeDef FSMC Asynchronous Enables or disables wait signal during asynchronous transfers valid only with asynchronous Flash memories This parameter can be a value of FSMC_AsynchronousWait uint32 t FSMC_NORSRAMInitTypeDef FSMC_WaitSignal Polarity Specifies the wait signal polarity valid only when accessing the Flash memory burst mode This parameter can be a value of FSMC Wait Signal Polarity uint32 t FSMC NORSRAMInitTypeDef FSMC WrapMode Enables or disables the Wrapped burst access mode for Flash memory valid only when accessing Flash memories in burst mode This parameter canbe a value of FSMC Wrap Mode uint32 t FSMC NORSRAMInitTypeDef FSMC WaitSignalActive Specifies if the wait signal is asserted by the memory one clock cycle before the wait state or during the wait state valid only when accessing memories in burst mode This parameter can be a value of FSMC Wait Timing uint32_t FSMC_NORSRAMInitTypeDef FSMC_WriteOperation Enables or disables the write operation in the selected bank by the FSMC This parameter can be a value of FSMC Write Operation uint32 t FSMC NORSRAMInitTypeDef FSMC WaitSignal Enables
325. arameter can be any combination of the following values FSMC IT RisingEdge Rising edge detection interrupt FSMC IT Level Level edge detection interrupt FSMC IT FallingEdge Falling edge detection interrupt e NewState new state of the specified FSMC interrupts This parameter can be ENABLE or DISABLE Return values e None Notes e None 13 2 8 2 FSMC GetFlagStatus Function Name FlagStatus FSMC GetFlagStatus uint32 t FSMC Bank uint32_t FSMC_FLAG Function Description Checks whether the specified FSMC flag is set or not Parameters FSMC Bank specifies the FSMC Bank to be used This parameter can be one of the following values FSMC 2 FSMC Bank2 FSMC Bank3 NAND FSMC Bank3 NAND FSMC Bank4 PCCARD FSMC 4 PCCARD FSMC FLAG specifies the flag to check This parameter can be one of the following values DocID 18540 Rev 1 265 634 Flerible static memory controller FSMC UM1061 FSMC FLAG RisingEdge Rising edge detection Flag FSMC FLAG Level Level detection Flag FSMC FLAG FallingEdge Falling edge detection Flag FSMC FLAG FEMPT Fifo empty Flag Return values The new state of FSMC FLAG SET or RESET Notes e None 13 2 8 3 5 Function Name void FSMC_ClearFlag uint32_t FSMC_Bank uint32_t FSMC_FLAG Function Description Clears the FSMC s pending flags Parameters e Bank specifies the FSMC
326. are driver defines esses 145 6 3 1 CRYP Firmware driver 145 6 4 CRYP Programming 148 7 Digital to analog converter 150 YA DAC Firmware driver registers structures 150 7 1 1 DAG iii awa 150 7 1 2 DAC 151 4 634 DoclD 18540 Rev 1 ky UM1061 Contents 7 2 DAC Firmware driver API 151 7 2 1 DAC peripheral features 151 7 2 2 How to use this driver 153 7 2 3 DAC channels configuration trigger output buffer data format 153 7 2 4 DMA 153 7 2 5 Interrupt and flag management 153 7 2 6 DAC channels 153 7 2 7 DMA management function essere 158 7 2 8 Interrupt and flag management 159 7 3 DAC Firmware driver defines 161 7 3 1 DAC Firmware driver defines sss 161 7 4 DAC Programming Example 165 8 Debug support 2 22 2 167 8 1 DBGMCU Firmware driver registers structure
327. aselnitTypeDef TIM TimeBaselnitStruct Function Description Fills each TIM TimeBaselnitStruct member with its default value Parameters TIM TimeBaselnitStruct pointer to a TimeBaselnitTypeDef structure which will be initialized Return values e None Notes e None 25 2 9 4 TIM PrescalerConfig Function Name void TIM PrescalerConfig TIM TypeDef TIMx uint16 t Prescaler uint t TIM PSCReloadMode Function Description Configures the TIMx Prescaler Parameters e TIMx where x can be 1 to 14 to select the TIM peripheral e Prescaler specifies the Prescaler Register value 528 634 TIM PSCReloadMode specifies the TIM Prescaler Reload mode This parameter can be one of the following values PSCReloadMode Update The Prescaler is loaded at the update event PSCReloadMode Immediate The Prescaler is loaded immediatly 0 18540 Rev 1 Gr UM1061 General purpose timers TIM 25 2 9 5 25 2 9 6 Return values Notes None None TIM CounterModeConfig Function Name Function Description Parameters Return values Notes TIM SetCounter Function Name Function Description Parameters Return values Notes void TIM CounterModeConfig TIM TypeDef TIMx uint16 t CounterMode Specifies the TIMx Counter Mode to be used TIMx where x can be 1 2 3 4 5 or 8 to select the TIM peripheral TIM CounterMode specifies the Co
328. ash function is then given to the core This operation follows the same mechanism as the one used to send the message in the hash operation that is by HASH_Dataln function and finally HASH StartDigest function 3 Once the last word has been entered and computation has started the hash processor elaborates the key It is then ready to accept the message text using the same mechanism as the one used to send the message in the hash operation 4 After the first hash round the hash processor returns ready to indicate that it is ready to receive the key to be used for the outer hash function normally this key is the same as the one used for the inner hash function When the last word of the key is entered and computation starts the HMAC result is made available using HASH_GetDigest function 15 2 2 Initialization and configuration This section provides functions allowing to Initialize the HASH peripheral Configure the HASH Processor MD5 SHA1 e HASH HMAC e datatype HMAC Key if mode Reset the HASH Processor The initialization and configuration functions are the following HASH Delnit e HASH Init HASH Siructlnit e HASH Reset 15 2 3 Message Digest generation This section provides functions allowing the generation of message digest Push data in the IN FIFO using HASH Dataln Get the number of words set in IN FIFO use HASH GetlnFIFOWordsNbr set the last word va
329. ate NewState Function Description Enables or disables the peripheral clock Parameters e RCC AHBPeriph specifies the AHB3 peripheral to gates its clock This parameter must be RCC AHB3Periph FSMC NewState new state the specified peripheral clock This parameter can be ENABLE or DISABLE Return values None Notes e After reset the peripheral clock used for registers read write access is disabled and the application software has to enable this clock before using it 19 2 8 8 RCC ky DoclD 18540 Rev 1 375 634 Reset and clock control RCC UM1061 19 2 8 9 376 634 Function Name Function Description Parameters Return values Notes void RCC_APB1PeriphClockCmd uint32_t RCC_APB1Periph FunctionalState NewState Enables or disables the Low Speed APB APB1 peripheral clock RCC_APB1Periph specifies the APB1 peripheral to gates its clock This parameter can be any combination of the following values New para RCC_APB1Periph_TIM2 TIM2 clock RCC_APB1Periph_TIM3 clock RCC_APB1Periph_TIM4 clock RCC_APB1Periph_TIM5 5 clock RCC_APB1Periph_TIM6 TIM6 clock RCC_APB1Periph_TIM7 clock RCC_APB1Periph_TIM12 12 clock RCC_APB1Periph_TIM13 TIM13 clock RCC APBiPeriph TIM14 TIM14 clock RCC APBiPeriph WWDG WWDG clock RCC APB1Periph SPI2 SPI2 clock RCC_APB1Periph_SPI3 SPI3 clock RCC APB1Per
330. ation information for the specified ADC peripheral Return values None Notes e This function is used to configure the global features of the ADC Resolution and Data Alignment however the rest of the configuration parameters are specific to the regular channels group scan mode activation continuous mode activation External trigger source and edge number of conversion in the regular channels group sequencer 3 2 4 3 ADC Structinit Function Name void ADC Structlnit ADC_InitTypeDef ADC InitStruct Function Description Fills each ADC InitStruct member with its default value Parameters e pointer to an ADC InitTypeDef structure which will be initialized Return values e None Notes e This function is used to initialize the global features of the ADC Resolution and Data Alignment however the rest of the configuration parameters are specific to the regular channels group scan mode activation continuous mode activation External trigger source and edge number of conversion in the regular channels group sequencer 58 634 DoclD 18540 Rev 1 4 UM1061 Analog to digital converter ADC 3 2 4 4 ADC_Commonlnit Function Name void Commonlnit ADC CommonlnitTypeDef ADC CommonlnitStruct Function Description Initializes the ADCs peripherals according to the specified parameters in the ADC CommonlnitStruct Parameters e CommonlnitStruct pointer to an ADC Common
331. be 1 or 2 to select the CAN peripheral FlFONumber Receive FIFO number CAN FIFOO or CAN e pointer to a structure receive frame which contains CAN Id CAN DLC CAN data and FMI number None None void CAN FIFORelease CAN_TypeDef uint8_t FIFONumber Releases the specified receive FIFO DociD 18540 Rev 1 4 UM1061 Controller area network CAN Parameters e CANx where x be 1 or 2 to select the CAN peripheral FlFONumber FIFO to release FIFOO CAN_FIFO1 Return values e None Notes e None 4 2 6 3 CAN MessagePending Function Name uint8 t CAN MessagePending CAN TypeDef CANx uint8 t FIFONumber Function Description Returns the number of pending received messages Parameters CANx where x be 1 or 2 to select the CAN peripheral FlFONumber Receive FIFO number CAN_FIFOO or CAN_FIFO1 Return values NbMessage which is the number of pending message Notes e None 4 2 7 CAN Operation modes functions 4 2 7 1 CAN_OperatingModeRequest 4 Function Name uint8 t CAN OperatingModeReguest CAN TypeDef uint8 t CAN OperatingMode Function Description Selects the CAN Operation mode Parameters e CAN OperatingMode CAN Operating Mode This parameter can be one of CAN OperatingMode TypeDef enumeration Return values status of the reguested mode which can be CAN_ModeStatus_Failed CAN failed entering the specific m
332. be sensitive to rising edges Interrupt or Event modes using the EXTI Init function b Enable the RTC Tamper or time stamp Interrupt using the RTC ITConfig function Configure the RTC to detect the tamper or time stamp event using the RTC_TimeStampConfig RTC TamperTriggerConfig and TamperCmda functions To wake up from the Stop mode with an RTC WakeUp event it is necessary to a Configure the EXTI Line 22 to be sensitive to rising edges Interrupt or Event modes using the EXTI Init function b Enable the RTC WakeUp Interrupt using the RTC ITConfig function c Configure the RTC to generate the RTC WakeUp event using the WakeUpClockConfig RTC SetWakeUpCounter and RTC WakeUpCmda functions e auto wakeup AWU from the Standby mode To wake up from the Standby mode with an RTC alarm event it is necessary to a Enable the RTC Alarm Interrupt using the ITConfig function b Configure the RTC to generate the RTC alarm using the RTC SetAlarm and AlarmCmda functions To wake up from the Standby mode with an RTC Tamper or time stamp event it is necessary to a Enable the RTC Tamper or time stamp Interrupt using the ITConfig function DoclD 18540 Rev 1 UM1061 Power control PWR 18 2 3 18 2 3 1 18 2 3 2 4 b Configure the RTC to detect the tamper or time stamp event using the RTC TimeStampConfig RTC_TamperTriggerConfig and RTC_Tamp
333. before using the 1 Enable the RTC domain access see description in the section above DocID 18540 Rev 1 415 634 Real time clock RTC UM1061 21 2 3 416 634 2 Configure the RTC Prescaler Asynchronous and Synchronous and RTC hour format using the RTC_Init function RTC configuration Time and Date configuration 1 To configure the RTC Calendar Time and Date use the SetTime and SetDate functions 2 To read the RTC Calendar use the GetTime and RTC GetDate functions 3 Usethe RTC DayLightSavingConfig function to add or sub one hour to the RTC Calendar Alarm configuration 1 To configure the RTC Alarm use the SetAlarm function 2 Enable the selected RTC Alarm using the RTC AlarmCmd function 3 To read the RTC Alarm use the RTC_GetAlarm function RTC Wakeup configuration 1 Configure the RTC Wakeup Clock source using the RTC_WakeUpClockConfig function 2 Configure the RTC WakeUp Counter using the RTC_SetWakeUpCounter function 3 Enable the RTC WakeUp using the WakeUpCmd function 4 read the RTC WakeUp Counter register use the RTC GetWakeUpCounter function Outputs configuration The RTC has 2 different outputs AFO ALARM this output is used to manage the RTC Alarm A Alarm WaKeUp signals To output the selected RTC signal on RTC AF1 pin use the RTC OutputConfig function e CALIB this output is used to
334. bers that user wants to modify How to run your first example The library provides a rich set of examples covering the main features of each peripheral All the examples are independent from the development tools These examples run on STMicroelectronics STM322xG EVAL evaluation board and can be easily tailored to any other supported device and development board Only source files are provided for each example and user can tailor the provided project template to run the selected example with his preferred development Tool Prerequisites 1 Latest release of documents and library You can download the latest version STMS2F2xx related documents and library from STMicroelectronics web site www st com stm32 2 Hardware to run the examples you need an STM322xG EVAL evaluation board from STMicroelectronics or any other compatible hardware 3 To use your own hardware simply adapt the example hardware configuration to your platform 4 Development tools Use your preferred development tool MDK ARM Keil EWARM IAR RIDE Raisonance TASKING or TrueSTUDIO Atollic Just check that the version you are using supports STM32F2 devices see section Section 1 4 2 Supported development tools and compilers Run your first example This section describes how to load and execute the template example provided within the Library This example configures the system clock to 120 MHz initializes the EVAL board LEDs and LCD then displays a welc
335. byte is PEC None This function configures the same bit POS as I2C NACKPositionConfig but is intended to be used in SMBUS mode while 2 NACKPositionConfig is intended to used 2 mode void I2C CalculatePEC 2C TypeDef I2Cx FunctionalState NewState Enables or disables the PEC value calculation of the transferred bytes I2Cx where x be 1 2 or 3 to select the I2C peripheral NewState new state of the 2 PEC value calculation This parameter can be ENABLE or DISABLE None None uint8 112 GetPEC 2 TypeDef I2Cx Returns the PEC value for the specified 2 I2Cx where x can be 1 2 or 3 to select the I2C peripheral DocID 18540 Rev 1 Ly UM1061 Inter integrated circuit interface 2 16 2 10 16 2 10 1 16 2 10 2 16 2 11 16 2 11 1 ky Return values e The PEC value Notes None DMA transfers management functions I2C DMACmd Function Name void I2C DMACmd 2C TypeDef 2 FunctionalState NewState Function Description Enables or disables the specified I2C DMA requests Parameters e 12 where x be 1 2 or 3 to select the 2 peripheral e NewState new state of the 2 DMA transfer This parameter can be ENABLE or DISABLE Return values e None Notes None I2C_DMALastTransferCmd Function Name void I2C_DMALastTransferCmd 2C_TypeDef 12 FunctionalState NewState Function Description Specifies
336. c c for NVIC SysTick config and stm32f2xx syscfg c forsome miscellanecus config System clock configuration the STM32F2xx devices can run at frequency up to 120 MHz and feature several prescalers to configure the AHB APB1 and APB2 frequencies The maximum frequency of the AHB domain is 120 MHz The maximum allowed frequency of the high speed APB2 domain is 60 MHz while the maximum allowed frequency of the low speed APB1 domain is 30 MHz If the application requires higher frequency performance follow the sequence below to configure the system clock 0 18540 Rev 1 UM1061 How to use and customize the library 4 a Configure the Flash wait state through FLASH register For more details refer to Section 12 FLASH Memory FLASH b Select the clock source to be used Internal HSI 16MHz or external HSE up to 26 MHz c Configure the PLL optional system input clock and AHB APB1 and APB2 prescaler For more details refer to Section 19 Reset and clock control You can use the clock configuration tool STMS2F2xx Clock Configuration xls to generate a customized system stm32f2xx c file depending on your application requirements Enable the clock for the peripheral s to be used Before starting to use a peripheral enable the corresponding interface clock as well as the clock for the associated GPIOs This is done by using one of the following functions RCC AHB1PeriphClockCmd RCC
337. cModeChannelCountConfig Function Name void ADC DiscModeChannelCountConfig ADC TypeDef ADCx uint8 t Number Function Description Configures the discontinuous mode for the selected ADC regular group channel Parameters e Return values Notes 3 2 7 7 ADC DiscModeCmd 4 ADCx where x can be 1 2 or 3 to select the ADC peripheral Number specifies the discontinuous mode regular channel count value This number must be between 1 and 8 None None DoclD 18540 Rev 1 65 634 Analog to digital converter ADC UM1061 3 2 7 8 3 2 7 9 66 634 Function Name void ADC_DiscModeCmd ADC_TypeDef ADCx FunctionalState NewState Function Description Enables or disables the discontinuous mode on regular group channel for the specified ADC Parameters e ADCx where x be 1 2 or 3 to select the ADC peripheral e NewState new state of the selected ADC discontinuous mode on regular group channel This parameter can be ENABLE or DISABLE Return values None Notes None ADC GetConversionValue Function Name 16_1 ADC_GetConversionValue ADC_TypeDef ADCx Function Description Returns the last ADCx conversion result data for regular channel Parameters e ADCx where x be 1 2 or 3 to select the ADC peripheral Return values The Data conversion value Notes e None ADC GetMultiModeConversionValue Function Name uint32 t ADC GetMultiModeConversionValue void F
338. caler TIM TypeDef TIMx Gets the TIMx Prescaler value TIMx where x can be 1 to 14 to select the TIM peripheral Prescaler Register value None DoclD 18540 Rev 1 UM1061 General purpose timers TIM 25 2 9 10 UpdateDisableConfig Function Name void TIM_UpdateDisableConfig TIM TypeDef TIMx FunctionalState NewState Function Description Enables or Disables the TIMx Update event Parameters e TIMx where x can be 1 to 14 to select the TIM peripheral e NewState new state of the TIMx UDIS bit This parameter can be ENABLE or DISABLE Return values e None Notes None 25 2 9 11 TIM UpdateReguestConfig Function Name void TIM UpdateReguestConfig TIM TypeDef TIMx uint16_t TIM UpdateSource Function Description Configures the TIMx Update Request Interrupt source Parameters where x can be 1 to 14 to select the TIM peripheral e TIM UpdateSource specifies the Update source This parameter can be one of the following values TIM UpdateSource Regular Source of update is the counter overflow underflow or the setting of UG bit or an update generation through the slave mode controller TIM UpdateSource Global Source of update is counter overflow underflow Return values Notes None 25 2 9 12 ARRPreloadConfig Function Name void ARRPreloadConfig TIM TypeDef TIMx FunctionalState NewState Function Description Enables or disables
339. can be a value of DCMI HSYNC Polarity e uint16 t DCMI InitTypeDef DCMI CaptureRate Specifies the frequency of frame capture All 1 2 or 1 4 This parameter can be a value of DCMI Capture Hate e Uuint16 t DCMI InitTypeDef DCMI ExtendedDataMode Specifies the data width 8 bit 10 bit 12 bit or 14 bit This parameter can be a value of DCMI_Extended_Data_Mode DCMI CROPInitTypeDef DCMI CROPInitTypeDef is defined in the stm32f2xx_dcmi h file and contains the DCMI s CROP mode initialization parameters Data Fields uint16 t DCMI VerticalStartLine uint16_t HorizontalOffsetCount uint16 t DCMI VerticalLineCount e uint16 t DCMI CaptureCount DocID 18540 Rev 1 4 UM1061 Digital camera interface DCMI Field Documentation e uint16 t DCMI CROPInitTypeDef DCMI VerticalStartLine Specifies the Vertical start line count from which the image capture will start This parameter can be a value between 0x00 and Ox1FFF e uint16 t DCMI CROPInitTypeDef DCMI HorizontalOffsetCount Specifies the number of pixel clocks to count before starting a capture This parameter can be a value between 0x00 and OxSFFF e uint16 t DCMI CROPInitTypeDef DCMI VerticalLineCount Specifies the number of lines to be captured from the starting point This parameter can be a value between 0x00 and OxSFFF e uint16 t DCMI CROPInitTypeDef DCMI CaptureCount Specifies the number of pixel clocks to be captured from the starting point on
340. can disable the peripheral using CRYP_Cmd function Interrupts Processing mode In this mode Processing is done when the data are transferred by the CPU during interrupts Enable the interrupts CRYP IT INI and CRYP OUTI using CRYP ITConfig function Enable the cryptographic processor using CRYP Cmd function In the IT INI interrupt handler load the input message into the IN FIFO using CRYP Dataln function You can load 2 or 4 words at a time or load data until the IN FIFO is full When the last word of the message has been entered into the IN FIFO disable the CRYP IT INI interrupt using CRYP function In the CRYP OUTI interrupt handler read the output message from the OUT FIFO using DataOut function You can read 1 block 2 or 4 words at a time or read data until the FIFO is empty When the last word has been read INIM 0 BUSY 0 and both FIFOs are empty CRYP FLAG IFEM is set and CRYP FLAG OFNE is reset You can disable the CRYP IT OUTI interrupt using ITConfig function and you can disable the peripheral using CRYP_Cmd function DMA Processing mode In this mode Processing is done when the DMA is used to transfer the data from to the memory a Configure the DMA controller to transfer the input data from the memory using Init function The transfer length is the length of the message As message padding is not managed by the peripheral the message le
341. cceptable accuracy For more information please refer to the STM32F2xx Reference manual How to use this driver 1 Enable write access to IWDG PR and IWDG RLR registers using IWDG WriteAccessCmd IWDG WriteAccess Enable function 2 Configure the IWDG prescaler using IWDG SetPrescaler function 3 Configure the IWDG counter value using IWDG_SetReload function This value will be loaded in the IWDG counter each time the counter is reloaded then the IWDG will start counting down from this value 4 Start the IWDG using IWDG_Enable function when the IWDG is used in software mode no need to enable the LSI it will be enabled by hardware 5 Then the application program must reload the IWDG counter at regular intervals during normal operation to prevent an MCU reset using IWDG ReloadCounter function Prescaler and Counter configuration functions IWDG WriteAccessCma IWDG SetPrescaler IWDG_SetReload IWDG_ReloadCounter IWDG activation function e IWDG_Enable Flag management function e IWDG GetFlagStatus Prescaler and Counter configuration functions IWDG WriteAccessCmd Function Name void IWDG WriteAccessCmd 16 t IWDG WriteAccess Function Description Enables or disables write access to IWDG PR and IWDG RLR registers Parameters e WrtiteAccess new state of write access to IWDG PR and IWDG RLR registers This parameter can be one of the following values IWDG WriteAccess Enable En
342. ccording to the specified parameters in the HASH InitStruct structure e HASH_InitStruct pointer to a HASH InitTypeDef structure that contains the configuration information for the HASH peripheral None e hash processor is reset when calling this function so that the HASH will be ready to compute the message digest of a new message There is no need to call HASH_Reset function e The field HASH HMACKeyType HASH InitTypeDef must be filled only if the algorithm mode is HMAC void HASH Structlnit HASH_InitTypeDef HASH InitStruct Fills each HASH member with its default value e HASH InitStruct pointer to a HASH InitTypeDef structure which will be initialized e The default values set are Processor mode is HASH Algorithm selected is SHA1 Data type selected is 32b and HMAC Key Type is short key void HASH_Reset void Resets the HASH processor core so that the HASH will be ready to compute the message digest of a new message DocID 18540 Rev 1 Gr UM1061 Hash processor HASH 15 2 9 15 2 9 1 15 2 9 2 4 Parameters Return values Notes e None e None e Calling this function will clear the HASH SR DCIS Digest calculation completion interrupt status bit corresponding to HASH IT DCI interrupt and HASH_FLAG_DCIS flag Message Digest generation functions HASH SetLastWordValidBitsNbr Function Name Function Description Parameters
343. ce SPI UM1061 23 1 2 482 634 SPI CRC polynomial register not used 125 mode Address offset 0x10 uint16 t SPI TypeDef RESERVED4 Reserved 0x12 JO uint16_t SPI TypeDef RXCRCR SPI RX CRC register not used 125 mode Address offset 0x14 uint16 t SPI TypeDef RESERVED5 Reserved 0x16 JO uint16 t SPI TypeDef TXCRCR SPI TK CRC register not used 125 mode Address offset 0x18 uint16 t SPI TypeDef RESERVEDG Reserved 10 uint16_t SPI TypeDef I28CFGR SPI 125 configuration register Address offset 0x1C uint16 t 5 TypeDef RESERVED Reserved 0x1E JO uint16 t SPI TypeDef I28PR SPI 125 prescaler register Address offset 0x20 uint16 t SPI TypeDef RESERVEDG8 Reserved 0 22 SPI_InitTypeDef SPI_InitTypeDef is defined in the stm32f2xx_spi h file and contains the SPI initialization parameters Data Fields uint16 t SPI Direction 16 t SPI Mode uint16 t SPI DataSize 16 t SPI CPOL uint16 t SPI uint16_t SPI NSS uint16 t SPI BaudHRatePrescaler uint16 t SPI FirstBit uint16 t SPI CRCPolynomial Field Documentation uint16 t SPI InitTypeDef SPI Direction Specifies the SPI unidirectional or bidirectional data mode This parameter can be a value of SPI data direction uint16 t SPI InitTypeDef SPI Mode Specifies the SPI operating mode This parameter can be a value of SPI mode uint16_t SPI InitTypeDef SP
344. cedure 1 Program the Baud rate Word length 8 bits Stop bits Parity Transmitter Receiver modes and hardware flow control values using the USART_Init function 2 Enable the USART using the USART_Cmd function 3 Configures the IrDA pulse width by configuring the prescaler using the USART SetPrescaler function 4 Configures the IrDA USART IrDAMode LowPower or USART IrDAMode Normal mode using the USART IrDAConfig function 5 Enable the IrDA using the USART_IrDACmd function A pulse of width less than two and greater than one PSC period s may or may gt not be rejected specification specifies a minimum of 10 ms delay between transmission and The receiver set up time should be managed by software The IrDA physical layer reception IrDA is a half duplex protocol In IrDA mode the following bits must be kept cleared e LINEN STOP CLKEN bits in the USART_CR2 register SCEN and HDSEL bits in the USART_CR3 register e USART IrDAConfig USART_IrDACmd DMA transfers management USART_DMACmd Interrupt and flag management This subsection provides a set of functions allowing to configure the USART Interrupts sources DMA channels requests and check or clear the flags or pending bits status DoclD 18540 Rev 1 Ly UM1061 Universal synchronous asynchronous receiver transmitter USART 3 The user should identify which mode will be used his application to manage the comm
345. ch e FLASH_OB_GetUser e FLASH_OB_GetWRP e FLASH_OB_GetRDP e FLASH_OB_GetBOR 12 2 5 Interrupt and flag management e FLASH ITConfig FLASH_GetFlagStatus e FLASH ClearFlag e FLASH_GetStatus FLASH_WaitForLastOperation 12 2 6 FLASH interface configuration functions 12 2 61 FLASH SetLatency Function Name void FLASH SetLatency uint32 t FLASH Latency Function Description Sets the code latency value Parameters e FLASH Latency specifies the FLASH Latency value This parameter can be one of the following values FLASH Latency 0 FLASH Zero Latency cycle FLASH_Latency_1 FLASH One Latency cycle FLASH_Latency_2 FLASH Two Latency cycles FLASH Latency 3 FLASH Three Latency cycles FLASH Latency 4 FLASH Four Latency cycles FLASH_Latency_5 FLASH Five Latency cycles FLASH Latency 6 FLASH Six Latency cycles FLASH Latency 7 FLASH Seven Latency cycles Return values e None Notes e None 12 2 6 2 FLASH PrefetchBufferCmd 3 Function void FLASH PrefetchBufferCmd FunctionalState NewState DocID 18540 Rev 1 229 634 FLASH Memory FLASH UM1061 Function Description Enables or disables the Prefetch Buffer Parameters e NewState new state of the Prefetch Buffer This parameter can be ENABLE or DISABLE Return values e None Notes e None 12 2 6 3 FLASH InstructionCacheCmd Function Name void FLASH InstructionCacheCmd FunctionalState NewState Function Description Enab
346. chdog_SingleRegEnable Analog watchdog on a single regular channel AnalogWaichdog SinglelnjecEnable Analog watchdog on a single injected channel AnalogWaichdog SingleRegOrlnjecEnable Analog watchdog on a single regular or injected channel ADC AnalogWatchdog AllRegEnable Analog watchdog on all regular channel AnalogWatchdog AlllnjecEnable Analog watchdog on all injected channel AnalogWaichdog AllRegAllInjecEnable Analog watchdog on all regular and injected channels AnalogWaichdog None No channel guarded by the analog watchdog Return values e None Notes None 3 2 5 2 ADC_AnalogWatchdogThresholdsConfig Function Name void ADC_AnalogWatchdogThresholdsConfig ADC_TypeDef 60 634 DocID 18540 Rev 1 Gr UM1061 Analog to digital converter ADC ADCx uint16_t HighThreshold uint16_t LowThreshold Configures the high and low thresholds of the analog watchdog ADCx where x can be 1 2 or to select the ADC peripheral e HighThreshold the ADC analog watchdog High threshold value This parameter must be a 12 bit value e LowThreshold the ADC analog watchdog Low threshold value This parameter must be a 12 bit value Function Description Parameters Return values None Notes None 3 2 5 3 ADC_AnalogWatchdogSingleChannelConfig Function Name void ADC_AnalogWatchdogSingleChannelConfig TypeDef ADCx uint8_t ADC Channel Configu
347. ckEdge Falling uint32 1 0x00002000 SDIO Clock Power Save e didefine SDIO ClockPowerSave Disable uint32 t 0x00000000 e define SDIO ClockPowerSave Enable uint32 1 0x00000200 SDIO CPSM State e define SDIO 5 Disable uint32 1 0 00000000 DocID 18540 Rev 1 471 634 Secure digital input output interface SDIO UM1061 472 634 define SDIO CPSM Enable uint32 t 0x00000400 SDIO Data Block Size define define define define define define define define define define SDIO DataBlockSize 1b uint32 t 0x00000000 SDIO DataBlockSize 2b uint32 t 0x00000010 SDIO DataBlockSize 4b uint32 1 0 00000020 SDIO DataBlockSize 8b uint32 1 0 00000030 SDIO DataBlockSize 16b uint32 t 0x00000040 SDIO DataBlockSize 32b uint32 t 0x00000050 SDIO DataBlockSize 64b uint32 t 0x00000060 SDIO DataBlockSize 128b uint32 1 0x00000070 SDIO DataBlockSize 256b uint32 t 0x00000080 SDIO DataBlockSize 512b uint32 1 0x00000090 DocID 18540 Rev 1 4 UM1061 Secure digital input output interface SDIO 3 define define define define define SDIO DataBlockSize 1024b uint32 t 0x000000A0 SDIO DataBlockSize 2048b uint32 t 0x000000B0 SDIO DataBlockSize 4096b uint32 1 0 000000 0 SDIO DataBlockSize 8192b uint32 t 0x000000D0 SDIO DataBlockSize 16384b uint32 t 0x000000E0 SDIO DPSM State define define SD
348. clock APB2Periph SPH SP11 clock RCC APB2Periph SYSCFG SYSCFG clock RCC APB2Periph TIM9 TIM9 clock RCC 2 TIM10 TIM10 clock RCC 2 TIM11 TIM11 clock e NewState new state of the specified peripheral clock This parameter can be ENABLE or DISABLE Return values Notes e After reset the peripheral clock used for registers read write access is disabled and the application software has to enable this clock before using it RCC_AHB1PeriphResetCmd Function Name void RCC_AHB1PeriphResetCmd uint32_t RCC_AHB1Periph FunctionalState NewState Function Description Forces or releases AHB1 peripheral reset Parameters e AHBIPeriph specifies the AHB1 peripheral to reset This parameter can be any combination of the following values RCC_AHB1Periph_GPIOA GPIOA clock RCC_AHB1Periph_GPIOB GPIOB clock RCC_AHB1Periph_GPIOC GPIOC clock RCC_AHB1Periph_GPIOD GPIOD clock RCC_AHB1Periph_GPIOE GPIOE clock RCC_AHB1Periph_GPIOF GPIOF clock AHBiPeriph GPIOG GPIOG clock AHBiPeriph GPIOG GPIOG clock GPIOI clock AHBIPeriph CRC CRC clock DMA1 DMA1 clock RCC_AHB1Periph_DMA2 clock RCC_AHB1Periph_ETH_MAC Ethernet MAC clock OTG HS USB OTG HS clock DoclD 18540 Rev 1 377 634
349. cription Fills each TIM OCinitStruct member with its default value Parameters TIM OCinitStruct pointer to a TIM OCInitTypeDef structure which will be initialized Return values e None Notes None 25 2 10 6 TIM SelectOCxM Function Name void TIM SelectOCxM TypeDef uint16 t TIM Channel uint16_t OCMode Function Description Selects the TIM Output Compare Mode Parameters e TIMx where x can be 1 to 14 except 6 7 to select the TIM peripheral e TIM Channel specifies the TIM Channel This parameter can be one of the following values TIM Channel 1 TIM Channel 1 TIM Channel 2 TIM Channel 2 Channel 3 TIM Channel 3 Channel 4 TIM Channel 4 e TIM OCMode specifies the TIM Output Compare Mode This parameter can be one of the following values OCMode Timing OCMode Active TIM OCMode Toggle OCMode TIM OCMode 2 TIM ForcedAction Active TIM ForcedAction InActive 3 DociD 18540 Rev 1 535 634 General purpose timers TIM UM1061 Return values Notes 25 2 10 7 TIM SetComparel 25 2 10 8 536 634 Function Name Function Description Parameters Return values Notes TIM SetCompare2 Function Name Function Description Parameters Return values Notes None This function disables the selected channel before changing the Output Compare Mode If needed user has to enab
350. ct baudrate Divider value 26 2 11 9 USART OneBitMethodCmd Function Name void USART OneBitMethodCmd USART TypeDef USARTx FunctionalState NewState Function Description Enables or disables the USART s one bit sampling method Parameters e USARTx where x can be 1 2 3 4 5 or 6 to select the USART or UART peripheral e NewState new state of the USART one bit sampling method This parameter can be ENABLE or DISABLE Return values e None Notes e None 26 2 12 Data transfers functions 26 2 12 1 USART SendData 4 Function Name void USART SendData USART TypeDef USARTx 6 Data Function Description Transmits single data through the USARTx peripheral DoclID 18540 Rev 1 601 634 Universal synchronous asynchronous receiver UM1061 transmitter USART Parameters e USARTx where x be 1 2 3 4 5 or 6 to select the USART or UART peripheral e Data the data to transmit Return values e None Notes e None 26 2 12 2 USART ReceiveData Function Name uint16 t USART ReceiveData USART TypeDef USARTx Function Description Returns the most recent received data by the USARTx peripheral Parameters e USARTx where x be 1 2 3 4 5 or 6 to select the USART or UART peripheral Return values The received data Notes e None 26 2 13 26 2 13 1 602 634 MultiProcessor communication functions USART_SetAddress Function Name void USART_SetAddress USART_TypeDef USARTx uint8_t USART_Ad
351. ct the Output Compare Fast mode Select the Output Compare Forced mode Output Compare Preload Configuration Clear Output Compare Reference Select the OCREF Clear signal Enable Disable the Capture Compare Channels DocID 18540 Rev 1 4 UM1061 General purpose timers TIM 25 2 2 3 TIM Input Capture management this group includes all needed functions to configure the Capture Compare unit used in Input Capture mode Configure each channel in input capture mode Configure Channel1 2 in PWM Input mode Set the Input Capture Prescaler Get the Capture Compare values Advanced control timers TIM1 and TIM8 specific features Configures the Break input dead time Lock level the OSSI the OSSR State and the AOE automatic output enable Enable Disable the TIM peripheral Main Outputs Select the Commutation event Set Reset the Capture Compare Preload Control bit TIM interrupts DMA and flags management Enable Disable interrupt sources Get flags status Clear flags Pending bits Enable Disable DMA reguests Configure DMA burst mode Select CaptureCompare DMA reguest TIM clocks management this group includes all needed functions to configure the clock controller unit Select internal External clock Select the external clock mode ETR Mode1 Mode2 or ITRx TIM synchronization management this group includes all needed functions to configure the Synchronizati
352. ctlnit 3 DociD 18540 Rev 1 135 634 Cryptographic processor CRYP UM1061 Function Name void CRYP Structlnit CRYP_InitTypeDef CRYP InitStruct Function Description Fills each CRYP InitStruct member with its default value Parameters e CRYP_InitStruct pointer to a CRYP InitTypeDef structure which will be initialized Return values e None Notes e None 6 2 5 4 CRYP Keylnit Function Name void CRYP Keylnit CRYP KeylnitTypeDef CRYP KeylnitStruct Function Description Initializes the CRYP Keys according to the specified parameters in the CRYP KeylnitStruct Parameters e KeylnitStruct pointer to KeylnitTypeDef structure that contains the configuration information for the CRYP Keys Return values e None Notes e None 6 2 5 5 CRYP KeyStructlnit Function Name void CRYP KeyStructlnit CRYP KeylnitTypeDef CRYP KeylnitStruct Function Description Fills each KeylnitStruct member with its default value Parameters e KeylnitStruct pointer to a CRYP KeylnitTypeDef structure which will be initialized Return values Notes None 136 634 DoclD 18540 Rev 1 4 UM1061 Cryptographic processor CRYP 6 2 5 6 CRYP IVInit Function Name void CRYP_IVInit CRYP_IVinitTypeDef CRYP IVInitStruct Function Description Initializes the CRYP Initialization Vectors IV according to the specified parameters in the CRYP_IVInitStruct Parameters e CRYP_IVini
353. d be selected using TIM SelectOutputTrigger e Software using DAC Trigger Software DAC Buffer mode feature Each DAC channel integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly without having to add an external operational amplifier To enable the output buffer use DAC nitStructure DAC OutputBuffer DAC OutputBuffer Enable Refer to the device datasheet for more details about output impedance value with and without output buffer DAC wave generation feature Both DAC channels can be used to generate Noise wave using DAC WaveGeneration Noise e Triangle wave using DAC_WaveGeneration_Triangle Wave generation can be disabled using DAC_WaveGeneration_None DAC data format The DAC data format can be e 8 bit right alignment using DAC_Align_8b_R 12 bit left alignment using DAC Align 12b L e 12 bit right alignment using Align 12b DAC data value to voltage correspondence The analog output voltage on each DAC channel pin is determined by the following eguation DAC_OUTx VREF DOR 4095 with DOR is the Data Output Register is the input voltage reference refer to the device datasheet e g To set DAC_OUT1 to 0 7V use DAC_SetChannel1Data DAC_Align_12b_R 868 assuming that VREF 3 3V DAC_OUT1 3 3 868 4095 0 7V DMA request 1 request be generated when an external trigger but not a software trigger occurs if DMA1 r
354. de 13 1 7 FSMC NORSRAMInitTypeDef FSMC NORSRAMInitTypeDef is defined in the stm32f2xx fsmc h file and contains the NOR SRAM common initialization parameters Data Fields uint32 t FSMC Bank uint32 t FSMC DataAddressMux uint32 t FSMC MemoryType uint32 t FSMC MemoryDataWidth uint32 t FSMC BurstAccessMode uint32 t FSMC AsynchronousWait uint32 t FSMC WaitSignalPolarity uint32 t FSMC WrapMode uint32 t FSMC WaitSignalActive uint32 t FSMC WriteOperation uint32 t FSMC WaitSignal uint32 t FSMC ExtendedMode uint32 t FSMC WriteBurst FSMC_NORSRAMTimingInitTypeDef FSMC ReadWriteTimingStruct FSMC_NORSRAMTimingInitTypeDef FSMC WriteTimingStruct Field Documentation 3 DocID 18540 Rev 1 253 634 Flerible static memory controller FSMC UM1061 254 634 uint32_t FSMC NORSRAMInitTypeDef FSMC Bank Specifies the NOR SRAM memory bank that will be used This parameter can be a value NORSRAM Bank uint32 t FSMC NORSRAMInitTypeDef FSMC DataAddressMux Specifies whether the address and data values are multiplexed on the databus or not This parameter can be a value of FSMC Data Address Bus Multiplexing uint32 t FSMC NORSRAMInitTypeDef FSMC Specifies the type of external memory attached to the corresponding memory bank This parameter can be a value of FSMC_Memory_ Type uint32_t FSMC NORSRAMInitTypeDef FSMC MemoryDataWidth Specifies the external memory device width This p
355. default reset values e DMAy Streamx where y can be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream void Init Stream TypeDef DMAy_Streamx InitStruct Initializes the Streamx according to the specified parameters in the DMA_InitStruct structure e where y be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream e DMA_InitStruct pointer to a InitTypeDef structure that contains the configuration information for the specified DMA Stream None e Before calling this function it is recommended to check that the Stream is actually disabled using the function DMA_GetCmdStatus DocID 18540 Rev 1 UM1061 DMA controller DMA 10 2 4 3 10 2 4 4 4 DMA_Structinit Function Name Function Description Parameters Return values Notes DMA_Cmd Function Name Function Description Parameters Return values Notes void Structlnit DA InitTypeDef DMA_InitStruct Fills each InitStruct member with its default value e lnitStruct pointer to a InitTypeDef structure which will be initialized None None void DMA Cmd DMA Stream TypeDef DMAy Streamx FunctionalState NewState Enables or disables the specified DMAy Streamx e DMAy Streamx where y be 1 or 2 to se
356. defines RNG RNG_flags_definition e define RNG FLAG DRDY uint8 t 0x0001 Data ready DoclID 18540 Rev 1 4 UM1061 Random number generator RNG 20 4 3 e define RNG_FLAG_CECS uint8_t 0x0002 Clock error current status e define RNG_FLAG_SECS uint8_t 0x0004 Seed error current status RNG_interrupts_definition define RNG CEl uint8 1 0 20 Clock error interrupt e define RNG IT SEl uint8 t 0x40 Seed error interrupt RNG Programming Example The example below explains how to generate random number using the RNG processor For more examples about RNG configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples RNG Wine t rendoms2bit 0p Enable RNG clock source RCC AHB2PeriphClockCmd RCC AHB2Periph RNG ENABLE RNG Peripheral enable Cmd ENABLE Wait until random number is ready while GetFlagStatus RNG_FLAG DRDY RESET Get the random number random32bit RNG GetRandomNumber DocID 18540 Rev 1 409 634 Real time clock RTC UM1061 21 Real time clock RTC 21 1 RTC Firmware driver registers structures 21 1 1 RTC_TypeDef RTC TypeDef is defined the stm32f2xx h file and contains the RTC registers definition Data Fields lO uin
357. divided by 4 ExITRGPSC DIV8 frequency divided by 8 ExtTRGPolarity The external Trigger Polarity This parameter can be one of the following values ExtTRGpPolarity Inverted active low or falling edge active ExITRGPolarity active high or rising edge active ExtTRGFilter External Trigger Filter This parameter must DoclD 18540 Rev 1 UM1061 General purpose timers TIM Return values Notes be a value between 0x00 and OxOF None None 25 2 14 5 ETRClockMode2Config 25 2 15 25 2 15 1 Function Name Function Description Parameters Return values Notes void ETRClockMode2Config TypeDef TIMx uint16_t TIM_ExtTRGPrescaler uint16_t TIM_ExtTRGPolarity uint16_t ExtTRGFilter Configures the External clock Mode2 TIMx where x can be 1 2 3 4 5 or 8 to select the TIM peripheral TIM_ExtTRGPrescaler The external Trigger Prescaler This parameter can be one of the following values TIM ExtTRGPSC OFF ETRP Prescaler OFF ExITRGPSC DIV2 frequency divided by 2 5 DIVA frequency divided by 4 TIM ExtTRGPSC DIV8 frequency divided by 8 ExtTRGPolarity The external Trigger Polarity This parameter can be one of the following values ExITRGPolarity Inverted active low or falling edge active
358. dress Function Description Sets the address of the USART node Parameters e Return values Notes USARTx where x be 1 2 3 4 5 or 6 to select the USART or UART peripheral USART_Address Indicates the address of the USART node None None DoclD 18540 Rev 1 UM1061 Universal synchronous asynchronous receiver transmitter USART 26 2 13 2 USART ReceiverWakeUpCmd 26 2 13 3 26 2 14 26 2 14 1 4 Function Name void USART ReceiverWakeUpCmd USART_TypeDef USARTx FunctionalState NewState Function Description Determines if the USART is in mute mode or not Parameters e USARTx where x can be 1 2 3 4 5 or 6 to select the USART or UART peripheral NewState new state of the USART mute mode This parameter can be ENABLE or DISABLE Return values None Notes None USART_WakeUpConfig Function Name void USART_WakeUpConfig USART_TypeDef USARTx uint16_t USART WakeUp Function Description Selects the USART WakeUp method Parameters e USARTx where x be 1 2 3 4 5 or to select the USART or UART peripheral e USART WakeUp specifies the USART wakeup method This parameter can be one of the following values USART WakeUp ldleLine WakeUp by an idle line detection USART WakeUp AddressMark WakeUp by an address mark Return values Notes None LIN mode functions USART LINBreakDetectLengthConfig DociD 18540 Rev
359. dress offset 0x60 10 uint32_t RTC_TypeDef BKP5R RTC backup register 5 Address offset 0x64 IO uint32 t RTC_TypeDef BKP6R RTC backup register 6 Address offset 0x68 IO uint32 t RTC TypeDef BKP7R RTC backup register 7 Address offset 0 6 IO uint32 t RTC TypeDef BKP8R RTC backup register 8 Address offset 0x70 IO uint32 t RTC_TypeDef BKP9R RTC backup register 9 Address offset 0x74 IO uint32 t TypeDef BKP10R RTC backup register 10 Address offset IO uint32 t RTC TypeDef BKP11R RTC backup register 11 Address offset IO uint32 t RTC TypeDef BKP12R RTC backup register 12 Address offset IO uint32 t TypeDef BKP13R RTC backup register 13 Address offset IO uint32 t RTC TypeDef BKP14R RTC backup register 14 Address offset IO uint32 t RTC TypeDef BKP15R RTC backup register 15 Address offset IO uint32 t RTC TypeDef BKP16R RTC backup register 16 Address offset IO uint32 t RTC TypeDef BKP17R RTC backup register 17 Address offset IO uint32 t RTC TypeDef BKP18R RTC backup register 18 Address offset IO uint32 t RTC TypeDef BKP19R RTC backup register 19 Address offset RTC InitTypeDef RTC InitTypeDef is defined in the stm32f2xx rtc h file and contains the RTC common initialization parameters Data Fields uint32 t RTC_HourFormat uint32 t RTC AsynchPrediv uint32 t RTC SynchPrediv Field Documentation 0x78 0x7C 0x80 0x84 0x88 0
360. e define define define define define define define RCC SYSCLK Div1 uint32 t 0x00000000 RCC SYSCLK Div2 uint32 1 0 00000080 RCC SYSCLK Div4 uint32 1 0 00000090 RCC SYSCLK Diva8 uint32 t 0x000000A0 RCC SYSCLK Div16 uint32 t 0x000000B0 RCC SYSCLK Div64 uint32 1 0 000000 0 RCC SYSCLK Div128 uint32 t 0x000000D0 RCC SYSCLK Div256 uint32 1 0 000000 0 RCC SYSCLK Div512 uint32 1 0 000000 0 DoclID 18540 Rev 1 389 634 Reset and clock control RCC UM1061 390 634 RCC_APB1_APB2_Clock_Source define define define define define RCC_HCLK_Div1 uint32_t 0x00000000 HCLK Div2 uint32 1 0x00001000 RCC HCLK Div4 uint32 1 0 00001400 RCC HCLK Div8 uint32 1 0 00001800 RCC HCLK Divi6 uint32 1 0 00001 00 RCC APB1 Peripherals define define define define define define RCC APBTPeriph TIM2 uint32 t 0x00000001 RCC_APB1Periph_TIM3 uint32_t Ox00000002 RCC_APB1Periph_TIM4 uint32_t 0x00000004 RCC_APB1Periph_TIM5 uint32_t Ox00000008 RCC_APB1Periph_TIM6 uint32_t Ox0000001 0 RCC_APB1Periph_TIM7 uint32_t 0x00000020 DocID 18540 Rev 1 4 UM1061 Reset and clock control RCC 3 define define define define define define define define define define define define TIM12 uint32 1 0 000
361. e 25 2 15 3 TIM SelectSlaveMode Function Name void TIM SelectSlaveMode TypeDef uint16_t TIM_SlaveMode Function Description Selects the TIMx Slave Mode Parameters e TIMx where x be 1 2 3 4 5 8 9 or 12 to select the TIM peripheral TIM specifies the Timer Slave Mode This parameter can be one of the following values SlaveMode Reset Rising edge of the selected trigger signal TRGI reinitialize the counter and triggers 564 634 DoclD 18540 Rev 1 ky UM1061 General purpose timers TIM Return values Notes an update of the registers TIM SlaveMode Gated The counter clock is enabled when the trigger signal TRGI is high TIM SlaveMode Trigger The counter starts at a rising edge of the trigger TRGI SlaveMode Rising edges of the selected trigger TRGI clock the counter None None 25 2 15 4 SelectMasterSlaveMode Function Name Function Description Parameters Return values Notes 25 2 15 5 ETRConfig Function Name Function Description Parameters 3 void SelectMasterSlaveMode TypeDef TIMx uint16_t TIM_MasterSlaveMode Sets or Resets the TIMx Master Slave Mode TIMx where x can be 1 2 3 4 5 8 9 or 12 to select the TIM peripheral TIM MasterSlaveMode specifies the Timer Master Slave Mode This parameter can be one of the following values
362. e CAN 2 1 0 00000040 FIFO 1 overrun Interrupt e CAN_IT_WKU uint32_t 0x00010000 Wake up Interrupt e define CAN_IT_SLK uint32_t 0x00020000 Sleep acknowledge Interrupt e CAN IT EWG uint32 t 0x00000100 Error warning Interrupt e define CAN IT EPV uint32 1 0 00000200 Error passive Interrupt e define CAN IT BOF uint32 1 0x00000400 Bus off Interrupt e CAN IT LEC uint32 1 0 00000800 Last error code Interrupt e define CAN ERR uint32 1 0 00008000 Error Interrupt DocID 18540 Rev 1 115 634 Controller area network CAN UM1061 116 634 e CAN IT RQCPOCAN e IT IT e define CAN IT RQCP2CAN CAN operating mode e didefine CAN Mode Normal uint8 1 0 00 normal mode e define CAN Mode LoopBack uint8 1 0 01 loopback mode e define CAN Mode Silent uint8 t 0x02 silent mode e define CAN Mode Silent LoopBack uint8 t 0x03 loopback combined with silent mode e define CAN OperatingMode Initialization uint8 1 0 00 Initialization mode e define CAN OperatingMode Normal uint8 1 0 01 Normal mode e define CAN OperatingMode Sleep uint8 1 0x02 sleep mode CAN operating mode status e didefine CAN ModeStatus Failed uint8 1 0 00 CAN entering the specific mode failed e didefine CAN ModeStatus Succes
363. e i e a reset is generated when the counter value rolls over from 0x40 to Ox3F An MCU reset is also generated if the counter value is refreshed before the counter has reached the refresh window value This implies that the counter must be refreshed in a limited window Once enabled the WWDG cannot be disabled except by a system reset WWDGRST flag in RCC CSR register can be used to inform when a WWDG reset occurs The WWDG counter input clock is derived from the APB clock divided by a programmable prescaler WWDG counter clock PCLK1 Prescaler WWDG timeout WWDG counter clock counter value Min max timeout value 930 MHz PCLK1 136 5 us 69 9 ms DoclD 18540 Rev 1 619 634 Window watchdog WWDG UM1061 How to use this driver 1 Enable WWDG clock using RCC_APB1PeriphClockCmd RCC_APB1Periph_WWDG ENABLE function 2 Configure the WWDG prescaler using WWDG SetPrescaler function 3 Configure the WWDG refresh window using WWDG_SetWindowValue function 4 Set the WWDG counter value and start it using WWDG_Enable function When the WWDG is enabled the counter value should be configured to value greater than 0x40 to prevent generating an immediate reset 5 Optionally you can enable the Early wakeup interrupt which is generated when the counter reach 0x40 Once enabled this interrupt cannot be disabled except by a system reset 6 Then the application program must refresh the WWDG counter at regular intervals
364. e uint16 1 0 0000 e define USART WakeUp AddressMark uint16 1 0x0800 USART Word Length e define USART WordLength 8b uint16 1 0x0000 e define USART WordLength 9b uint16 t 0x1000 USART Programming Example The example below explains how to initialize the USART and associated resources and send continuously 8 bit data For more examples about SPI configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project S TMS32F2xx StdPeriph Examples SPA 17 Incl des Se A finclude stm32f2xx h YA LEUMCIOM statie void VSARTS Coni Qbrief Main program param None Gretval None int main void fe USARTS YA USATI DocID 18540 Rev 1 4 UM1061 Universal synchronous asynchronous receiver transmitter USART 4 while 1 Send dummy data USART_SendData USART3 5 Loop until the end of transmission while USART GetFlagStatus USART3 USART FLAG TC RESET Bi brief Configures the USART3 Peripheral param None retval None static void USART3 Config void GPIO TInitIypeDet GPIO menu USART InitTypeDef USART InitStructure U
365. e Backup domain and write access is denied to this domain after reset you have to enable write access using PWR_BackupAccessCmd ENABLE function before to configure the LSE to be done once after reset After enabling the LSE RCC_LSE_ON or RCC_LSE_Bypass the application software should wait on LSERDY flag to be set indicating that LSE clock is stable and can be used to clock the RTC void RCC LSICmd FunctionalState NewState Enables or disables the Internal Low Speed oscillator LSI NewState new state of the LSI This parameter can be ENABLE or DISABLE None After enabling the LSI the application software should wait on LSIRDY flag to be set indicating that LSI clock is stable and can be used to clock the IWDG and or the RTC LSI can not be disabled if the IWDG is running When the LSI is stopped LSIRDY flag goes low after 6 LSI oscillator clock cycles void RCC PLLConfig uint32 t RCC PLLSource uint32 t PLLM uint32 t PLLN uint32 t PLLP uint32 t PLLQ Configures the main PLL clock source multiplication and division factors RCC PLLSource specifies the PLL entry clock source This parameter can be one of the following values DoclD 18540 Rev 1 Gr UM1061 Reset and clock control RCC 19 2 6 9 4 Parameters Parameters Parameters Parameters Return values Notes RCC PLLCmd Function Name Function Description Parameters Return values Notes PLLSource HSI HS
366. e I2C peripheral I2C specifies the 2 interrupts sources to be enabled or disabled This parameter can be any combination of the following values 12 BUF Buffer interrupt mask 12 IT Event interrupt mask 2C IT ERR Error interrupt mask NewState new state of the specified 2 interrupts This parameter can be ENABLE or DISABLE None None DoclD 18540 Rev 1 4 UM1061 Inter integrated circuit interface 12 Function Name Function Descriptio n Paramete rs Return values Notes 16 2 11 4 I2C GetLastEvent 4 ErrorStatus I2C_CheckEvent 2C_TypeDef I2Cx uint32 t I2C EVENT Checks whether the last I2Cx Event is egual to the one passed as parameter I2Cx where x can be 1 2 or 3 to select the I2C peripheral I2C EVENT specifies the event to be checked This parameter can be one of the following values I2C EVENT SLAVE TRANSMITTER ADDRESS MATCHED EVI I2C EVENT SLAVE RECEIVER ADDRESS EV1 I2C EVENT SLAVE TRANSMITTER SECONDADDRESS MATC HED I2C EVENT SLAVE RECEIVER SECONDADDRESS MATCHED EV1 I2C EVENT SLAVE GENERALCALLADDRESS MATCHED EV1 I2C EVENT SLAVE BYTE RECEIVED EV2 2 EVENT SLAVE BYTE RECEIVED 126 FLAG DUALF 2 EVENT SLAVE BYTE RECEIVED 2 FLAG GENCALL EV2 I2C EVENT SLAVE BYTE TRANSMITTED EV3 2 EVENT SLAVE BYTE TRANSMITTED l2C FLAG DUALF EV3 2 EVENT SLAVE BYTE TRANSMIT
367. e NewState Function Description Enables or disables the Backup Regulator Parameters e NewState new state of the Backup Regulator This parameter can be ENABLE or DISABLE Return values e None Notes e None FLASH Power Down configuration function PWR FlashPowerDownCmd Function Name void PWR FlashPowerDownCmd FunctionalState NewState Function Description Enables or disables the Flash Power Down in STOP mode Parameters e NewState new state of the Flash power mode This parameter can be ENABLE or DISABLE Return values e None Notes e None DoclD 18540 Rev 1 349 634 Power control PWR UM1061 18 2 8 18 2 8 1 18 2 8 2 350 634 Low Power modes configuration functions PWR EnterSTOPMode Function Name void PWR EnterSTOPMode uint32 t PWR Regulator uint8 t PWR_STOPEntry Function Description Enters STOP mode Parameters Return values Notes PWR_Regulator specifies the regulator state in STOP mode This parameter can be one of the following values PWR Regulator ON STOP mode with regulator ON PWR Regulator LowPower STOP mode with regulator in low power mode PWR STOPEntry specifies if STOP mode in entered with WFI or WFE instruction This parameter can be one of the following values PWR STOPEntry WFI enter STOP mode with WFI instruction PWR STOPEntry WFE enter STOP mode with WFE instruction None In Stop mode all I O pins keep the same s
368. e Notes html 32 legacy h TM322xG_EVAL Release_Notes html stm322xg eval c stm322xg eval h stm322xg eval audio codec c stm322xg eval audio stm322xg fsmc onenand c stm322xg eval fsmc onenand h stm322xg eval fsmc psram c stm322xg eval fsmc psram h stm322xg eval fsmc sram c stm322xg_eval_fsmc_sram h stm322xg_eval_i2c_ee c stm322xg_eval_i2c_eeh stm322xg_eval_ioe c stm322xg eval ioe h stm322xg_eval_Icd c stm322xg_eval_Icd h stm322xg_eval_sdio_sd c stm322xg eval sdio sdh It contains common files and folder plus a folder for STM322xG_EVAL board files Table 6 Utilities STM32 EVAL files description File name Description stm322xg eval c This file provides A set of firmware functions to manage LEDs pushbuttons and COM port S Low level initialization functions for SDcard on SDIO and serial EEPROM sEE available on STM322xG EVAL board stm322xg eval h Header file for stm322xg eval c stm322xg eval audio codec c This file includes the low layer driver for CS43L22 Audio Codec available on STM322xG EVAL board stm322xg_eval_audio_codec h Header file for stm322xg_eval_audio_codec c stm322xg_eval_fsmc_onenand c This file provides a set of functions needed to drive the KFG1216U2A B DIB6 34 634 18540 Rev 1 LY UM1061 STM32F2xx Standard Peripheral Library File name Description OneNAND memory mounted o
369. e a 12bit value Return values e None Notes None 3 2 9 4 ADC ExternalTrigInjectedConvConfig Function Name void ADC ExternalTriglInjectedConvConfig TypeDef ADCx uint32 t ADC ExternalTrigInjecConv Function Description Configures the ADCx external trigger for injected channels conversion Parameters e ADCx where x can be 1 2 or 3 to select the ADC peripheral e ADC ExternalTriglnjecConv specifies the ADC trigger to start injected conversion This parameter can be one of the following values ExternalTriglnjecConv T1 4 Timeri capture compare4 selected TRGO event selected ADC_ExternalTriginjecConv_T2_CC1 Timer2 capture compare1 selected ADC_ExternalTriginjecConv_T2_TRGO Timer2 TRGO event selected T3 2 Timer3 70 634 18540 Rev 1 UM1061 Analog to digital converter ADC 3 2 9 5 4 Return values Notes capture compare2 selected ADC ExternalTriglnjecConv T3 CC4 Timer3 capture compare4 selected ADC_ExternalTriginjecConv_T4_CC1 Timer4 capture compare1 selected ExternalTriglnjecConv T4 CC2 Timer4 capture compare2 selected ADC ExternalTriginjecConv T4 Timer4 capture compare3 selected ADC ExternalTriginjecConv T4 TRGO Timer4 TRGO event selected ADC ExternalTriglInjecConv T5 4 5 cap
370. e duty cycle This parameter can be one of the following values 2 DutyCycle 2 2 fast mode Tlow Thigh 2 2C DutyCycle 16 9 2 fast mode Tlow Thigh 16 9 Return values e None Notes e None I2C NACKPositionConfig Function Name void I2C NACKPositionConfig 2 TypeDef I2Cx uint16 t I2C NACKPosition Function Description Selects the specified I2C position in master receiver mode Parameters e Return values e Notes I2Cx where x be 1 2 or 3 to select the 12C peripheral I2C_NACKPosition specifies the NACK position This parameter can be one of the following values 2 NACKPosition Next indicates that the next byte will be the last received byte 2C NACKPosition Current indicates that current byte is the last received byte None This function is useful 12C Master Receiver mode when the number of data to be received is equal to 2 In this case this function should be called with parameter I2C NACKPosition Next before data reception starts as described in the 2 byte reception procedure recommended in Reference Manual in Section Master receiver This function configures the same bit POS as 2 PECPositionConfig but is intended to be used in 2 mode while 2 PECPositionConfig is intended to used in SMBUS mode DoclD 18540 Rev 1 319 634 Inter integrated circuit interface 12C UM1061 16 2 7 16 16 2 7 17 16 2 8 16 2 8
371. e every 2 events 5 DIVA capture is done once every 4 events ICPSC DIV8 capture is done once every 8 events Return values e None Notes e None 25 2 12 Advanced control timers TIM1 and TIM8 specific features 25 2 12 1 BDTRConfig Function Name void TIM BDTRConfig TIM TypeDef TIMx BDTRInitTypeDef BDThRInitStruct Function Description Configures the Break feature dead time Lock level OSSI OSSR State and the AOE automatic output enable Parameters e e Return values e Notes 25 2 12 2 BDTRStructinit 4 TIMx where x can be 1 or 8 to select the TIM TIM BDTRInitStruct pointer toa TIM BDTRInitTypeDef structure that contains the BDTR Register configuration information for the TIM peripheral None None DociD 18540 Rev 1 553 634 General purpose timers TIM UM1061 Function Name Function Description Parameters Return values Notes void TIM_BDTRStructinit BDTRInitTypeDef TIM BDTRinitStruct Fills each BDTRinitStruct member with its default value 25 2 12 3 TIM_CtriPWMOutputs 25 2 12 4 554 634 Function Name Function Description Parameters Return values Notes TIM_SelectCOM Function Name Function Description Parameters Return values Notes BDTRInitStruct pointer to TIM_BDTRInitTypeDef structure which will be initialized None None void TIM_CtrlPWMOuiputs
372. e of the following values TIM Channel 1 TIM Channel 1 Channel 2 TIM Channel 2 Channel 3 TIM Channel 3 e TIM CCXxN specifies the TIM Channel CCxNE bit new state This parameter can be TIM CCxN Enable or TIM Disable None None Input Capture management functions ICInit Function Name void TypeDef TIM_ICInitTypeDef DoclD 18540 Rev 1 Gr UM1061 General purpose timers TIM Function Description Parameters Return values Notes 25 2 11 2 TIM_ICStructinit 25 2 11 3 4 Function Name Function Description Parameters Return values Notes TIM PWMIConfig Function Name Function Description Parameters Return values Notes Initializes the TIM peripheral according to the specified parameters in the IClnitStruct TIMx where x can be 1 to 14 except 6 and 7 to select the TIM peripheral ICInitStruct pointer to a ICinitT ypeDef structure that contains the configuration information for the specified TIM peripheral None None void TIM ICStructlnit ICinitTypeDef ICinitStruct Fills each ICinitStruct member with its default value ICInitStruct pointer to a ICInitTypeDef structure which will be initialized None None void PWMIConfig TIM_TypeDef TIMx ICInitTypeDef IC
373. e using GPIO_InitStruct gt GPIO_Mode GPIO Mode AN For other peripherals TIM USART DoclD 18540 Rev 1 275 634 General purpose Os GPIO UM1061 14 2 2 14 2 3 14 2 4 14 2 5 14 2 5 1 276 634 Connect the pin to the desired peripherals Alternate Function AF using GPIO_PinAFConfig function Configure the desired pin in alternate function mode using GPIO_InitStruct gt GPIO_Mode GPIO_Mode_AF Select the type pull up pull down and output speed via GPIO_PuPd GPIO_OType and GPIO_Speed members Call GPIO_Init function 4 To get the level of a pin configured in input mode use GPIO ReadInputDataBit 5 To set reset the level a pin configured in output mode use GPIO SetBits GPIO ResetBits 6 During and just after reset the alternate functions are not active and the GPIO pins are configured in input floating mode except JTAG pins 7 The LSE oscillator pins OSC32 IN and OSC32 OUT can be used as general purpose PC14 and PC15 respectively when the LSE oscillator is off The LSE has priority over the GPIO function 8 HSE oscillator pins OSC IN OSC OUT can be used as general purpose PHO and PH1 respectively when the HSE oscillator is off The HSE has priority over the GPIO function Initialization and configuration GPIO Delnit GPIO_Init GPIO_Structinit GPIO_PinLockConfig GPIO Read and Write GPIO_ReadInputDataBit GPIO_ReadInputData GPIO_ReadOutputDataBi
374. e void USART_DMACmd USART_TypeDef USARTx uint16 t USART DMAReq FunctionalState NewState Function Description Enables or disables the USART s DMA interface Parameters e USARTXx where can be 1 2 3 4 5 or 6 to select the USART or UART peripheral USART_DMAReq specifies the DMA request This parameter can be any combination of the following values USART DMAReq Tx USART DMA transmit request USART DMAReq Hx USART DMA receive request NewState new state of the DMA Request sources This DoclD 18540 Rev 1 607 634 Universal synchronous asynchronous receiver UM1061 transmitter USART parameter can be ENABLE or DISABLE Return values e None Notes e None 26 2 19 Interrupt and flag management functions 26 2 19 1 USART ITConfig Function Name void USART ITConfig USART TypeDef USARTx uint16 t USART IT FunctionalState NewState Function Description Enables or disables the specified USART interrupts Parameters e USARTx where x can be 1 2 3 4 5 or 6 to select the USART or UART peripheral e USART specifies the USART interrupt sources to be enabled or disabled This parameter can be one of the following values A USART IT CTS CTS change interrupt USART IT LBD LIN Break detection interrupt A USART IT Transmit Data Register empty interrupt USART IT TC Transmission complete interrupt A USART IT RXNE Receive Data register not empty interrupt US
375. eDef SPIx Function Description Returns the most recent received data by the SPIx I2Sx peripheral Parameters e SPlx To select the SPIx I2Sx peripheral where x be 1 2 or 3 in SPI mode or 2 or 3 in 25 mode Return values The value of the received data Notes e None 18540 Rev 1 493 634 Serial peripheral interface SPI UM1061 23 2 8 2 125 SendData Function Name void SPI 125 SendData SPI_TypeDef uint16_t Data Function Description Transmits a Data through the SPIx I2Sx peripheral Parameters e SPIx To select the SPIx I2Sx peripheral where x be 1 2 or 3 in SPI mode or 2 or 3 in 125 mode e Data Data to be transmitted Return values e None Notes e None 23 2 9 Hardware CRC calculation functions 23 2 9 1 CalculateCRC Function Name void SPI CalculateCRC TypeDef SPIx FunctionalState NewState Function Description Enables or disables the CRC value calculation of the transferred bytes Parameters e SPlx where x can be 1 2 or 3 to select the SPI peripheral e NewState new state of the SPIx CRC value calculation This parameter can be ENABLE or DISABLE Return values e None Notes e None 23 2 9 2 TransmitCRC Function Name void SPI TransmitCRC SPI_TypeDef SPIx Function Description Transmit the SPIx CRC value Parameters e SPlx where x can be 1 2 or 3 to select the SPI peripheral Return values e None Notes e None 494 634 18540 Rev
376. eDef GPIO Mode Specifies the operating mode for the selected pins This parameter can be a value of GPlOMode TypeDef GPlOSpeed TypeDef InitTypeDef GPIO Speed Specifies the speed for the selected pins This parameter can be a value of GPlOSpeed TypeDef GPIOOType TypeDef InitTypeDef GPIO OType Specifies the operating output type for the selected pins This parameter can be a value of GPIOOType TypeDef GPIOPuPd TypeDef GPIO InitTypeDef GPIO PuPd Specifies the operating Pull up Pull down for the selected pins This parameter can be a value of GPIOPuPd TypeDef GPIO Firmware driver API description The following section lists the various functions of the GPIO library How to use this driver 1 Enable the GPIO AHB clock using the following function RCC AHB1PeriphClockCmd RCC AHB1Periph GPIOx ENABLE Configure the GPIO pin s using GPIO_Init Four possible configuration are available for each pin Input Floating Pull up Pull down Output Push Pull Pull up Pull down or no Pull Open Drain Pull up Pull down or no Pull In output mode the speed is configurable 2 MHz 25 MHz 50 MHz or 100 MHz A Alternate Function Push Pull Pull up Pull down or no Pull Open Drain Pull up Pull down or no Pull Analog required mode when a pin is to be used as ADC channel or DAC output Peripherals alternate function ADC and DAC configure the desired pin in analog mod
377. eamx FIFO error flag Where x can be 0 to 7 to select the DMA Stream Return values e The new state of DMA_FLAG SET or RESET Notes e None 10 2 7 4 _ClearFlag 4 Function Name void DMA ClearFlag DMA Stream TypeDef DMAy_Streamx uint32 t DMA FLAG Function Description Clears the DMAy Streamx s pending flags Parameters DMAy_Streamx where y can be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream e DMA FLAG specifies the flag to clear This parameter can be any combination of the following values DMA_FLAG_TCIFx Streamx transfer complete flag DMA_FLAG_HTIFx Streamx half transfer complete flag DMA_FLAG_TEIFx Streamx transfer error flag DMA_FLAG_DMEIFx Streamx direct mode error flag DMA_FLAG_FEIFx Streamx FIFO error flag Where x can be 0 to 7 to select the DMA Stream DocID 18540 Rev 1 201 634 DMA controller DMA UM1061 Return values Notes 10 2 7 5 Function Name Function Description Parameters Return values Notes 10 2 7 6 DMA_GetITStatus Function Name Function Description Parameters 202 634 None None void ITConfig Stream TypeDef DMAy uint32 t FunctionalState NewState Enables or disables the specified DMAy Streamx interrupts DMAy Streamx where y can be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream specifies
378. ease refer to the examples provided within the STM32F2xx Standard Peripherals Library package under Project STM32F2xx StdPeriph Examples V2SV 128 liNwpeDetr 128 liist Enable the 5 2 1252 peripheral clock cure a 8 RCC Me INCC API Meon I gurat ronk 126 ImMLESCLUGEMKE 1209 AvuciloPreg IZS Awucdiorreg 46159 128 125 Standard 129 Standar 125 125 Datarormet Lalo 28 Ipit tructure 128 CPOL 128 CPOL Lowe 12S 125 125 Moce Mestesl 126 128 MCLKOUT Ut 1 29 IMICIdOwncswhe Enabler Initialize the 1252 peripheral with the structure above 25 Make SPL2 6128 Mmekuwa DocID 18540 Rev 1 509 634 System configuration controller SYSCFG UM1061 24 24 1 24 1 1 24 2 510 634 System configuration controller SYSCFG SYSCFG Firmware driver registers structures SYSCFG_TypeDef SYSCFG_TypeDef is defined in the stm32f2xx h file and contains the SYSCFG registers definition Data Fields 10 uint32 t MEMRMP 10 uint32 t PMC 10 uint32 t EXTICR uint32 t RESERVED 10 uint32 t CMPCR Field Documentation e JOuint32_t SYSCFG TypeDef MEMRMP SYSCFG memory remap register Address offset 0x00 e _ lOuint32 t SYSCFG
379. ecking on a flag you should clear it using DoclD 18540 Rev 1 UM1061 Controller area network CAN CAN_ClearFlag function And after checking on an interrupt event you should clear it using CAN_ClearlTPendingBit function 4 2 2 Initialization and configuration 4 This section provides functions allowing to e Initialize the CAN peripherals Prescaler operating mode the maximum number of time guanta to perform resynchronization the number of time guanta in Bit Segment 1 and 2 and many other modes Refer to ref CAN InitTypeDef for more details Configures the CAN reception filter Select the start bank filter for slave CAN Enables or disables the Debug Freeze mode for CAN Enables or disables the CAN Time Trigger Operation communication mode Below is the list of functions that can be used to initialize and configure the CAN CAN Delnit CAN Init CAN Filterlnit CAN Structlnit CAN SlaveStartBank CAN DBGFreeze CAN TTComModeCmda CAN Frames Transmission functions This section provides functions allowing to Initiate and transmit a CAN frame message if there is an empty mailbox e Check the transmission status of a CAN Frame e Cancel a transmit request Below is the list of CAN Frames Transmission functions e CAN Transmit CAN TransmitStatus CAN CancelTransmit CAN Frames Reception functions This section provides functions allowing to e Receive a correct CAN frame e Release a spec
380. ed the peripheral drivers are not included and the application code is based on direct access to peripherals registers HSE_VALUE stm32f2xx h Default value 25 MHz Defines the value of the external oscillator HSE expressed in Hz The user must adjust this define statement when using a different crystal value HSE_STARTUP_TIMEOUT stm32f2xx h Default value 0x0500 Defines the maximum external oscillator HSE startup timeout value The user must adjust this define statement when using a different statement startup time HSI VALUE stm32f2xx h Default value 16 MHz Defines the value of the internal oscillator HSI expressed in Hz __MPU_PRESENT __NVIC_PRIO_BITS __Vendor_SysTickConfig stm32f2xx h These define statements are used by Cortex M3 CMSIS layer to inform about the options supported by STM32F2xx devices STM32F2XX provide an MPU define PRESENT 1 1 lt STM32F2XX uses 4 Bits for the Priority Levels fdefine NVTCRERTOFBTES 4 515 SysTick Config is used tdetine Vendor Swe TiC ie 0 They should not be modified by the user USE_FULL_ASSERT stm32f2xx_conf h Default status disabled ky DocID 18540 Rev 1 37 634 How to use and customize the library UM1061 Parameter File Description This define statement is used to enable or disable the library run time failure detec
381. ef CCMR2 capture compare mode register 2 Address offset uint16 t TypeDef RESERVED Reserved 0 1 JO uint16 t TIM_TypeDef CCER capture compare enable register Address offset 0x20 uint16 t TIM_TypeDef RESERVED8 Reserved 0 22 __ JO uint32 t TypeDef CNT counter register Address offset 0x24 10 uint16 t TIM TypeDef PSC prescaler Address offset 0x28 uint16 t TypeDef RESERVED9 Reserved 0x2A JO uint32 t TIM_TypeDef ARR auto reload register Address offset 0 2 JO uint16 t TypeDef RCR repetition counter register Address offset 0x30 uint16_t TIM_TypeDef RESERVED10 Reserved 0x32 JO uint32 t TIM TypeDef CCH1 capture compare register 1 Address offset 0x34 JO uint32 t TypeDef CCR2 capture compare register 2 Address offset 0x38 DocID 18540 Rev 1 4 UM1061 General purpose timers TIM 25 1 2 JO uint32 t TIM TypeDef CCR3 capture compare register 3 Address offset JO uint32 t TIM_TypeDef CCR4 capture compare register 4 Address offset 0x40 JO uint16 t TIM TypeDef BDTR break and dead time register Address offset 0x44 uint16 t TIM TypeDef RESERVED 11 Reserved 46 JO uint16 t TypeDef DCR TIM DMA control register Address offset 0x48 uint16_t TIM_TypeDef RESERVE
382. effectively disabled If a Stream is disabled while a data transfer is ongoing the current data will be transferred and the Stream will be effectively disabled only after this data transfer completion To monitor this state it is possible to use the following function FunctionalState GetCmdStatus DMA Stream TypeDef DMAy_Streamx FIFO Status It is possible to monitor the FIFO status when a transfer is ongoing using the following function uint32 t DMA GetFIFOStatus DMA Stream TypeDef DMAy Streamx DMA Interrupts and Flags The user should identify which mode will be used in his application to manage the DMA controller events Polling mode or Interrupt mode e Polling Mode Each DMA stream can be managed through 5 event Flags x DMA Stream number DMA FLAG FEIFx that indicates that a FIFO Mode Transfer Error event occurred DMA FLAG DMEIFx that indicates that a Direct Mode Transfer Error event occurred FLAG TEIFx that indicates that a Transfer Error event occurred DMA FLAG HTIFx that indicates that a Half Transfer Complete event occurred DMA FLAG TCIFx that indicates that a Transfer Complete event occurred In this mode it is recommended to use the following functions FlagStatus GetFlagStatus DMA Stream TypeDef Streamx uint32 t FLAG void DMA ClearFlag DMA Stream TypeDef DMAy Streamx uint32 t DMA FLAG e Interrupt Mode Each DMA Stream can be managed through 5 Interrupts depe
383. egrated circuit interface 2 16 2 7 9 16 2 7 10 16 2 7 11 4 Parameters e e Return values e Notes I2Cx where x be 1 2 or 3 to select the 2 peripheral NewState new state of the 2 Acknowledgement This parameter can be ENABLE or DISABLE None None I2C_OwnAddress2Config Function Name void I2C OwnAddress2Config 2C TypeDef 2 uint8_t Address Function Description Configures the specified I2C own address2 Parameters e 2 where x can be 1 2 3 to select the 12C peripheral e Address specifies the 7bit 2 own address2 Return values None Notes e None I2C DualAddressCmd Function Name void 2 DualAddressCmd 2C TypeDef 12 FunctionalState NewState Function Description Enables or disables the specified 12C dual addressing mode Parameters Return values Notes I2C_GeneralCallCmd I2Cx where x can be 1 2 or 3 to select the 12C peripheral NewState new state of the 12C dual addressing mode This parameter can be ENABLE or DISABLE None None DoclD 18540 Rev 1 317 634 Inter integrated circuit interface 12C UM1061 16 2 7 12 16 2 7 13 318 634 Function Name void I2C_GeneralCallCmd 2C TypeDef 12 FunctionalState NewState Function Description Enables or disables the specified 12C general call feature Parameters e 12 where x be 1 2 or 3 to select the 12C peripheral e NewSta
384. egular channel group This parameter must range from 1 to 16 ADC_CommonlnitTypeDef CommonilnitTypeDef is defined in the stm32f2xx adc h file and contains the common ADC initialization parameters This structure is passed as parameter to ADC Commonlnit function Data Fields uint32 t ADC Mode DocID 18540 Rev 1 4 UM1061 Analog to digital converter ADC uint32 t ADC Prescaler uint32_t ADC_DMAAccessMode e uint32_t ADC TwoSamplingDelay Field Documentation e uint32 t ADC CommonlnitTypeDef ADC Mode Configures the ADC to operate in independent or multi mode This parameter be a value of ADC Common mode e uint32 t ADC CommonlnitTypeDef ADC Prescaler Select the frequency of the clock to the ADC The clock is common for all the ADCs This parameter can be a value of ADC_Prescaler e uint32 t ADC CommonlnitTypeDef ADC DMAAccessMode Configures the Direct memory access mode for multi ADC mode This parameter can be a value of ADC_Direct_memory_access_mode_for_multi_mode e uint32 t ADC CommonlnitTypeDef ADC TwoSamplingDelay Configures the Delay between 2 sampling phases This parameter be a value of ADC_delay_between_2_sampling_phases 3 2 ADC Firmware driver API description The following section lists the various functions of the ADC library 3 2 1 How to use this driver This section provides informations to use the driver 1 Enable the ADC interface clock using RCC_APB2Peri
385. el2 12 bit left aligned data holding register Address offset 0x18 IO uint32 t DAC TypeDeft DHR8R2 DAC 2 8 bit right aligned data holding register Address offset Ox1C IO uint32 t DAC TypeDef DHR12RD Dual DAC 12 bit right aligned data holding register Address offset 0x20 IO uint32 t TypeDef DHR12LD DUAL DAC 12 bit left aligned data holding register Address offset 0x24 IO uint32 t DAC TypeDef DHR8RD DUAL DAC 8 bit right aligned data holding register Address offset 0x28 DoclD 18540 Rev 1 IT UM1061 Digital to analog converter DAC e _ JOuini32 t DAC_TypeDef DOR1 DAC channel data output register Address offset 0 2 e JOuint32_t DAC_TypeDef DOR2 DAC channel2 data output register Address offset 0x30 e _ lOuint32 t DAC_TypeDef SR DAC status register Address offset 0x34 7 1 2 DAC_InitTypeDef DAC_InitTypeDef is defined in the stm32f2xx_dac h file and contains the DAC initialization parameters Data Fields e uint32_t DAC Trigger e uint32_t DAC WaveGeneration e uint32 t DAC LFSRUnmask TriangleAmplitude e Uuint32 t DAC OutputBuffer Field Documentation e uint32 t DAC InitTypeDef DAC Trigger Specifies the external trigger for the selected DAC channel This parameter can be a value of DAC_trigger_selection e uint32 t DAC InitTypeDef DAC WaveGeneration Specifies whether DAC channel noise waves triangle waves are generated whether no wave is generated This parameter c
386. ent mode Standby mode The Standby mode allows to achieve the lowest power consumption It is based on the Cortex M3 deepsleep mode with the voltage regulator disabled The 1 2V domain is consequently powered off The PLL the HSI oscillator and the HSE oscillator are also switched off SRAM and register contents are lost except for the RTC registers RTC backup registers backup SRAM and Standby circuitry The voltage regulator is OFF e Entry The Standby mode is entered using the PWR_EnterSTANDBYMode function e Exit WKUP pin rising edge RTC alarm Alarm A and Alarm B RTC wakeup tamper event time stamp event external reset in NRST pin IWDG reset Auto wakeup AWU from low power mode The MCU can be woken up from low power mode by an RTC Alarm event an RTC Wakeup event a tamper event a time stamp event or a comparator event without depending on an external interrupt Auto wakeup mode e RTC auto wakeup AWU from the Stop mode To wake up from the Stop mode with an RTC alarm event it is necessary to a Configure the EXTI Line 17 to be sensitive to rising edges Interrupt or Event modes using the EXTI Init function b Enable the RTC Alarm Interrupt using the RTC ITConfig function c Configure the RTC to generate the RTC alarm using the RTC SetAlarm AlarmCmda functions To wake up from the Stop mode with an RTC Tamper or time stamp event it is necessary to a Configure the EXTI Line 21 to
387. ent watchdog IWDG Parameters None Return values None Notes None 17 2 2 IWDG activation function 17 2 2 1 IWDG Enable Function Name void IWDG Enable void Function Description Enables IWDG write access to IWDG PR IWDG registers disabled Parameters None Return values None Notes None 17 2 3 Flag management function 17 2 3 1 IWDG GetFlagStatus Function Name FlagStatus IWDG GetFlagStatus uint16_t IWDG FLAG Function Description Checks whether the specified IWDG flag is set or not Parameters e IWDG FLAG specifies the flag to check This parameter can be one of the following values IWDG FLAG PVU Prescaler Value Update on going IWDG FLAG RVU Reload Value Update on going Return values The new state of IWDG FLAG SET or RESET Notes None 17 3 IWDG Firmware driver defines 4 IWDG DoclD 18540 Rev 1 341 634 Independent watchdog IWDG UM1061 342 634 IWDG_Flag e define e didefine IWDG FLAG PVU uint16 1 0 0001 IWDG FLAG RVU uint16 1 0 0002 IWDG prescaler e define e define e define e define e define e define e define IWDG Prescaler 4 uint8 t 0x00 IWDG Prescaler 8 uint8 t 0x01 IWDG Prescaler 16 uint8 1 0 02 IWDG Prescaler 32 uint8 1 0 03 IWDG Prescaler 64 uint8 1 0 04 IWDG Prescaler 128 uint8 t 0x05 IWDG Prescaler 256 uint8 t 0x06 IWDG WriteAccess e didefine e define IWDG WriteAccess
388. equests are enabled using DAC DMACmd requests are mapped as following DocID 18540 Rev 1 4 UM1061 Digital to analog converter DAC 7 2 2 7 2 3 7 2 4 7 2 5 7 2 6 7 2 6 1 e DAC channel mapped DMA1 Stream5 channel7 which must be already configured e DAC channel2 mapped on DMA1 Stream6 channel7 which must be already configured How to use this driver 1 Enable DAC APB clock to get write access to DAC registers using RCC APB1PeriphClockCmd RCC APB1Periph DAC ENABLE 2 Configure DAC OUTx DAC OUT1 4 OUT2 PAS in analog mode 3 Configure the DAC channel using DAC Init function 4 Enable the DAC channel using DAC Cmd function DAC channels configuration trigger output buffer data format DAC Delnit DAC Init DAC Structinit DAC Cmda DAC SoftwareTriggerCmd DAC DualSoftwareTriggerCmd DAC WaveGenerationCma DAC SetChannel1Data DAC SetChannel2Data DAC SetDualChannelData DAC_GetDataOutputValue DMA management DAC_DMACmd Interrupt and flag management DAC ITConfig DAC GetFlagStatus DAC ClearFlag DAC GetllTStatus DAC ClearITPendingBit DAC channels configuration DAC Delnit Function Name void DAC Delnit void Function Description Deinitializes the DAC peripheral registers to their default reset values 18540 Rev 1 153 634 Digital to analog converter DAC UM1061 Parameters None Return
389. er of data bytes to be transferred e 32 t SDIO DatalnitTypeDef SDIO DataBlockSize Specifies the data block size for block transfer This parameter can be a value of SDIO Data Block Size e uint32 t SDIO DatalnitTypeDef SDIO TransferDir Specifies the data transfer direction whether the transfer is a read or write This parameter can be a value of SDIO Transfer Direction e 32 t SDIO DatalnitTypeDef SDIO TransferMode Specifies whether data transfer is in stream or block mode This parameter can be a value of SDIO Transfer Type e uint32 t SDIO DatalnitTypeDef SDIO DPSM Specifies whether SDIO Data path state machine DPSM is enabled or disabled This parameter can be a value of SDIO DPSM State SDIO Firmware driver API description The following section lists the various functions of the SDIO library How to use this driver 1 The SDIO clock SDIOCLK 48 MHz is coming from a specific output of PLL PLLA8CLK Before starting to work with SDIO peripheral make sure that the PLL is well configured The SDIO peripheral uses two clock signals SDIO adapter clock SDIOCLK 48 MHz APB2 bus clock PCLK2 PCLK2 and SDIO CK clock frequencies must respect the following condition Frequenc PCLK2 gt 3 8 x Frequency SDIO CK 2 Enable peripheral clock using APB2PeriphClockCmd RCC APB2Periph SDIO ENABLE 3 According to the SDIO mode enable the GPIO clocks using RCC_AHB1PeriphClockCmd function The I O
390. erCmd functions To wake up from the Standby mode with an RTC WakeUp event it is necessary to a Enable the WakeUp Interrupt using the ITConfig function b Configure the RTC to generate the RTC WakeUp event using the WakeUpClockConfig RTC SetWakeUpCounter and RTC WakeUpCmda functions e PWH EnterSTOPMode e PWR EnterSTANDBYMode Backup Domain Access function PWR Delnit Function Name void PWR Delnit void Function Description Deinitializes the PWR peripheral registers to their default reset values Parameters e None Return values e None Notes e None PWR BackupAccessCmd Function Name void PWR BackupAccessCmd FunctionalState NewState Function Description Enables or disables access to the backup domain RTC registers RTC backup data registers and backup SRAM Parameters NewState new state of the access to the backup domain This parameter can be ENABLE or DISABLE Return values e None Notes e lfthe HSE divided by 2 3 31 is used as the RTC clock the Backup Domain Access should be kept enabled DoclD 18540 Rev 1 347 634 Power control PWR UM1061 18 2 4 PVD configuration functions 18 2 41 PWR PVDLevelConfig Function Name Function Description Parameters Return values Notes 18 2 4 PWR PVDCmd Function Name Function Description Parameters Return values Notes void PWR PVDLevelConfig uint32 t PWR PVDLevel Configures the
391. eral clock gating in SLEEP mode can be used to further reduce power consumption After wakeup from SLEEP mode the peripheral clock is enabled again By default all peripheral clocks are enabled during SLEEP mode 19 2 8 18 RCC APB1PeriphClockLPModeCmd 382 634 Function Name Function Description Parameters void RCC APB1PeriphClockLPModeCmd uint32 t APB1Periph FunctionalState NewState Enables or disables the APB1 peripheral clock during Low Power Sleep mode RCC specifies the APB1 peripheral to gates its clock This parameter can be any combination of the following values RCC_APB1Periph_TIM2 TIM2 clock RCC_APB1Periph_TIM3 clock RCC_APB1Periph_TIM4 clock RCC_APB1Periph_TIM5 TIM5 clock RCC_APB1Periph_TIM6 TIM6 clock RCC_APB1Periph_TIM7 TIM7 clock RCC_APB1Periph_TIM12 TIM12 clock DoclD 18540 Rev 1 UM1061 Reset and clock control RCC Return values Notes RCC_APB1Periph_TIM13 TIM13 clock RCC_APB1Periph_TIM14 TIM14 clock APBiPeriph WWDG WWDG clock APB1Periph SPI2 SPI2 clock RCC_APB1Periph_SPI3 clock APB1Periph USART2 USART2 clock APB1Periph USARTS USARTS3 clock RCC_APB1Periph_UART4 UARTA clock APB1Periph UARTS5 UART5 clock I2C1 2 1 clock APBh1Periph I2C2 2 2 clock
392. ere x can be from 0 to 19 to specify the register Return values e None Notes e None 21 2 10 RTC Tamper and TimeStamp pin selection and Output Type Config configuration functions 21 2 10 1 RTC TamperPinSelection Function Name void TamperPinSelection uint32 t RTC TamperPin Function Description Selects the RTC Tamper Pin Parameters e RTC_TamperPin specifies the RTC Tamper Pin This parameter can be one of the following values TamperPin PC13 PC13 is selected as RTC Tamper Pin TamperPin 8 is selected as RTC Tamper Pin Return values None Notes None 21 2 10 2 RTC TimeStampPinSelection 3 Function Name Function Description Parameters void RTC_TimeStampPinSelection uint32_t RTC_TimeStampPin Selects the RTC TimeStamp Pin RTC_TimeStampPin specifies the RTC TimeStamp Pin This parameter can be one of the following values TimeStampPin PC13 PC13 is selected as RTC TimeStamp Pin TimeStampPin 8 8 is selected as RTC TimeStamp Pin DoclD 18540 Rev 1 425 634 Real time clock RTC UM1061 Return values e None Notes e None 21 2 10 3 RTC OutputTypeConfig Function void OutputTypeConfig uint32 t RTC_OutputType Function Description Configures the RTC Output Pin mode Parameters e RTC OutputType specifies the RTC Output PC13 pin mode This parameter can be one of the following values O
393. error SDIO FLAG CMDREND Command response received CRC check passed SDIO FLAG CMDSENT Command sent no response required SDIO FLAG DATAEND Data end data counter SDIDCOUNT is zero SDIO FLAG STBITERR Start bit not detected on all data signals in wide bus mode SDIO FLAG DBCKEND Data block sent received CRC check passed SDIO FLAG SDIOIT SD V O interrupt received SDIO FLAG CEATAEND CE ATA command completion signal received for CMD61 None DocID 18540 Rev 1 UM1061 Secure digital input output interface SDIO Notes None 22 2 11 4 SDIO GetlTStatus Function Name ITStatus SDIO GetlTStatus uint32 t SDIO IT Function Description Checks whether the specified SDIO interrupt has occurred or not Parameters SDIO specifies the SDIO interrupt source to check This parameter can be one of the following values SDIO IT CCRCFAIL Command response received CRC check failed interrupt SDIO DCRCFAIL Data block sent received CRC check failed interrupt SDIO CTIMEOUT Command response timeout interrupt SDIO IT DTIMEOUT Data timeout interrupt SDIO IT TXUNDERR Transmit FIFO underrun error interrupt SDIO IT RXOVERR Received FIFO overrun error interrupt SDIO IT CMDREND Command response received CRC check passed interrupt SDIO IT CMDSENT Command sent no response required interrupt SDIO IT DATAEND Data end data counter SDI
394. errupt e NewState new state of the specified CRYP interrupt This parameter can be ENABLE or DISABLE Return values None Notes None 140 634 DoclD 18540 Rev 1 UM1061 Cryptographic processor CRYP 6 2 9 2 CRYP GetlTStatus Function Name ITStatus CRYP GetlTStatus uint8 t CRYP IT Function Description Checks whether the specified CRYP interrupt has occurred or not Parameters e IT specifies the CRYP masked interrupt source to check This parameter can be one of the following values CRYP IT INI Input FIFO interrupt IT Output FIFO interrupt Return values The new state of CRYP IT SET or RESET Notes e This function checks the status of the masked interrupt i e the interrupt should be previously enabled 6 2 9 3 CRYP_GetFlagStatus Function Name FlagStatus CRYP_GetFlagStatus uint8_t CRYP_FLAG Function Description Checks whether the specified CRYP flag is set or not Parameters e FLAG specifies the CRYP flag to check This parameter can be one of the following values CRYP FLAG IFEM Input FIFO Empty flag CRYP FLAG IFNF Input FIFO Not Full flag CRYP FLAG OFNE Output FIFO Not Empty flag CRYP FLAG OFFU Output FIFO Full flag CRYP FLAG BUSY Busy flag CHYP FLAG OUTRIS Output FIFO raw interrupt flag FLAG Input FIFO raw interrupt flag Return values The new state of CRYP FLAG SET or RESET Notes e None 6 2 1
395. errupt pending bits Parameters DMAy_Streamx where y can be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream e DMA_IT specifies the DMA interrupt pending bit to clear This parameter can be any combination of the following values TCIFx Stream transfer complete interrupt HTIFx Streamx half transfer complete interrupt TEIFx Streamx transfer error interrupt DMEIFx Streamx direct mode error interrupt FEIFx Streamx FIFO error interrupt Where x can be 0 to 7 to select the DMA Stream Return values e None Notes e None 10 3 DMA Firmware driver defines 10 3 1 DMA Firmware driver defines 3 channel e define Channel 0 uint32 1 0x00000000 e define Channel 1 uint32 1 0x02000000 DocID 18540 Rev 1 203 634 DMA controller UM1061 204 634 e define Channel 2 uint32 1 0x04000000 e define Channel 32 1 0x06000000 e iidefine Channel 4 uint32 1 0x08000000 e iidefine Channel 5 uint32 1 0x0A000000 e iidefine Channel 6 uint32 1 0x0C000000 e define Channel 7 uint32 1 0 0 000000 DMA circular normal mode e define Mode Normal uint32 1 0x00000000 e define Mode Circular uint32 1 0x00000100 DMA data transfer direction e define DIR PeripheralToMemory uint32 1 0x00000000
396. ers Return values Notes GPIO WriteBit Function Name Function Description Parameters Return values Notes None e This functions uses GPIOx_BSRR register to allow atomic read modify accesses In this way there is no risk of an IRQ occurring between the read and the modify access void GPIO_ResetBits GPIO TypeDef GPIOx uint16 t GPIO Pin Clears the selected data port bits e GPIOx where x can be to select the GPIO peripheral e GPIO Pin specifies the port bits to be written This parameter can be any combination of GPIO Pin x where x can be 0 15 None e This functions uses GPIOx_BSRR register to allow atomic read modify accesses In this way there is no risk of an IRQ occurring between the read and the modify access void GPIO WriteBit TypeDef uint16 t GPIO Pin BitAction BitVal Sets or clears the selected data port bit e where x can be to select the GPIO peripheral GPIO Pin specifies the port bit to be written This parameter can be one of GPIO Pin x where x can be 0 15 e BitVal specifies the value to be written to the selected bit This parameter can be one of the BitAction enum values Bit RESET to clear the port pin Bit SET to set the port pin None None DociD 18540 Rev 1 UM1061 General purpose Os GPIO 14 2 6 8 14 2 6 9 14 2 7 14 2 7 1 GPIO Write Functio
397. ers and the DR register contents can be used Interrupt and flag management functions RNG Function Name void FunctionalState NewState Function Description Enables or disables the RNG interrupt Parameters e NewState new state of the RNG interrupt This parameter can be ENABLE or DISABLE DoclD 18540 Rev 1 Gr UM1061 Random number generator RNG 20 2 7 2 20 2 7 3 Return values Notes RNG_GetFlagStatus Function Name Function Description Parameters Return values Notes RNG_ClearFlag Function Name Function Description Parameters Return values Notes None The RNG provides 3 interrupt sources Computed data is ready event DRDY andSeed error Interrupt SEI andClock error Interrupt CEI all these interrupts sources are enabled by setting the IE bit in CR register However each interrupt have its specific status bit see RNG GetlTStatus function and clear bit except the DRDY event see ClearlTPendingBit function FlagStatus RNG GetFlagStatus uint8 t RNG FLAG Checks whether the specified RNG flag is set or not RNG FLAG specifies the RNG flag to check This parameter can be one of the following values RNG FLAG DRDY Data Ready flag RNG FLAG CECS Clock Error Current flag RNG FLAG SECS Seed Error Current flag The new state of RNG FLAG SET or RESET None void RNG ClearF
398. es 2 FLAG DUALF Dual flag Slave mode 2C FLAG SMBHOST SMBus host header Slave mode 1 2 FLAG SMBDEFAULT SMBus default header Slave mode 2C FLAG GENCALL General call header flag Slave mode 2C FLAG Transmitter Receiver flag 2C FLAG BUSY Bus busy flag 2C FLAG MSL Master Slave flag 2C FLAG SMBALERT SMBus Alert flag 12 FLAG TIMEOUT Timeout or Tlow error flag 2C FLAG PECERR PEC error in reception flag 2 FLAG Overrun Underrun flag Slave mode 2C FLAG Acknowledge failure flag 2C FLAG ARLO Arbitration lost flag Master mode 2C FLAG BERR Bus error flag 2C FLAG Data register empty flag Transmitter 2C FLAG RXNE Data register not empty Receiver flag 2C FLAG STOPF Stop detection flag Slave mode 2C FLAG ADD 10 10 bit header sent flag Master mode 2C FLAG Byte transfer finished flag 2C FLAG ADDR Address sent flag Master mode ADSL Address matched flag Slave mode ENDAD 2C FLAG SB Start bit flag Master mode Return values The new state of I2C_FLAG SET or RESET DocID 18540 Rev 1 IT UM1061 Inter integrated circuit interface 12 Notes 16 2 11 6 I2C_ClearFlag Function Name Function Description Parameters Return values Notes 16 2 11 7 2C GetlTStatus 4 None void I2C ClearFlag I2C TypeDef I2Cx uint32 t I2C FLAG
399. es DAC Channel 1 DAC Channeli selected DAC Channel 2 DAC Channel2 selected e DAC IT specifies the DAC interrupt sources to be enabled or disabled This parameter can be the following values DAC IT DMAUDR DMA underrun interrupt mask Parameters e NewState new state of the specified DAC interrupts This parameter can be ENABLE or DISABLE Return values e None Notes e The underrun occurs when a second external trigger arrives before the acknowledgement for the first external trigger is received first request DAC GetFlagStatus Function Name FlagStatus DAC GetFlagStatus uint32 t DAC Channel uint32 t DAC FLAG Function Description Checks whether the specified DAC flag is set or not Parameters e Channel The selected DAC channel This parameter can be one of the following values DAC Channel 1 DAC Channeli selected DAC Channel 2 DAC Channel2 selected e FLAG specifies the flag to check This parameter be only of the following value DAC FLAG DMAUDR DMA underrun flag Return values The new state of DAC FLAG SET or RESET Notes e The DMA underrun occurs when a second external trigger arrives before the acknowledgement for the first external DocID 18540 Rev 1 159 634 Digital to analog converter DAC UM1061 7 2 8 3 7 2 8 4 160 634 DAC ClearFlag Function Name Function Description Parameters Return values Notes DAC GetlTStatus
400. es Function Name Function Description Parameters interrupt SDIO IT RXFIFOHF Receive FIFO Half Full interrupt SDIO IT TXFIFOF Transmit FIFO full interrupt SDIO IT RXFIFOF Receive FIFO full interrupt SDIO IT TXFIFOE Transmit FIFO empty interrupt SDIO IT RXFIFOE Receive FIFO empty interrupt SDIO TXDAVL Data available in transmit FIFO interrupt SDIO IT RKDAVL Data available in receive FIFO interrupt SDIO IT SDIOIT SD I O interrupt received interrupt SDIO IT CEATAEND CE ATA command completion signal received for CMD61 interrupt NewState new state of the specified SDIO interrupts This parameter can be ENABLE or DISABLE None None FlagStatus SDIO GetFlagStatus uint32 t SDIO FLAG Checks whether the specified SDIO flag is set or not SDIO FLACG specifies the flag to check This parameter can be one of the following values SDIO FLAG CCRCFAIL Command response received CRC check failed SDIO FLAG DCRCFAIL Data block sent received CRC check failed SDIO FLAG CTIMEOUT Command response timeout SDIO FLAG DTIMEOUT Data timeout SDIO FLAG TXUNDERR Transmit FIFO underrun error SDIO FLAG RKOVERR Received FIFO overrun error SDIO FLAG CMDREND Command response received CRC check passed SDIO FLAG CMDSENT Command sent no response reguired SDIO FLAG DATAEND Data end data counter SDIDCOUNT is zero SDIO FLAG STBITERR Start bit not detected on all data signals in wide bu
401. es functions allowing to configure the HASH Interrupts and to get the status and clear flags and Interrupts pending bits The HASH provides 5 Flags and 2 Interrupts sources e Flags HASH FLAG DINIS set when 16 locations are free in the Data IN FIFO which means that a new block 512 bit can be entered into the input buffer HASH_FLAG_DCIS set when Digest calculation is complete HASH FLAG DMAS set when HASH s DMA interface is enabled DMAE 1 or a transfer is ongoing This Flag is cleared only by hardware HASH FLAG BUSY set when The hash core is processing a block of data This Flag is cleared only by hardware HASH_FLAG_DINNE set when Data IN FIFO is not empty which means that the Data IN FIFO contains at least one word of data This Flag is cleared only by hardware DoclD 18540 Rev 1 UM1061 Hash processor HASH 15 2 7 15 2 8 15 2 8 1 4 e Interrupts HASH IT DINI if enabled this interrupt source is pending when 16 locations are free in the Data IN FIFO which means that a new block 512 bit can be entered into the input buffer This interrupt source is cleared using HASH_ClearlTPendingBit HASH_IT_DINI function HASH if enabled this interrupt source is pending when Digest calculation is complete This interrupt source is cleared using HASH ClearlITPendingBit HASH IT DCI function e Managing the HASH controller events The user should identify which m
402. eset GPIO AF TAMPER Connect TAMPER pins TAMPER 1 and TAMPER 2 to AFO default after reset AF SWJ Connect SWJ pins SWD and JTAG to AFO default after reset AF TRACE Connect TRACE pins to default after reset AF TIM1 Connect pins to AF1 AF 2 Connect pins to AF1 GPIO AF TIMS Connect TIM3 pins to AF2 AF 4 Connect TIM4 pins to AF2 AF 5 Connect TIM5 pins to AF2 GPIO AF TIM8 Connect TIM8 pins to AF3 AF TIMO9 Connect TIM9 pins to AF3 GPIO AF TIM10 Connect TIM10 pins to AF3 AF 11 Connect TIM11 pins to AF3 A AF I2C1 Connect 1261 pins to AF4 GPIO AF I2C2 Connect 1262 pins to GPIO AF I2C3 Connect I2C3 pins to AF Connect SPI pins to AF5 AF SPI2 Connect SPI2 I2S2 pins to AF5 AF 5 Connect SPI3 I2S3 pins to AF6 AF 05 1 Connect USART1 pins to AF7 GPIO AF 05 2 Connect USART2 pins to AF7 GPIO AF 05 Connect USARTS pins to AF7 A GPIO AF UARTA Connect UARTA pins to AF8 A GPIO AF UARTS Connect UART5 pins to AF8 GPIO 05 6 Connect USARTE pins to AF8 A GPIO AF CANT Connect pins to AF9 GPIO AF Connect pins to AF9 AF TIM12 Connect TIM12 pins to AF9 A GPIO AF
403. esponse and SDIO GetResponse functions First user has to fill the command structure pointer to SDIO_CmdlInitTypeDef according to the selected command to be sent The parameters that should be filled are Command Argument Command Index Command Response type Command Wait CPSM Status Enable or Disable To check if the command is well received read the SDIO CMDRESP register using SDIO GetCommandhResponse The SDIO responses registers SDIO RESP1 to SDIO RESP2 use the SDIO GetResponse function To control the DPSM Data Path State Machine and send receive data to from the card use the SDIO DataConfig SDIO GetDataCounter SDIO ReadData SDIO WriteData and SDIO GetFlFOCount functions Read Operations 1 2 3 4 First user has to fill the data structure pointer to SDIO DatalnitTypeDef according to the selected data type to be received The parameters that should be filled are Data TimeOut Data Length Data Block size Data Transfer direction should be from card SDIO Data Transfer mode A DPSM Status Enable or Disable Configure the SDIO resources to receive the data from the card according to selected transfer mode Refer to Step 8 9 and 10 Send the selected Read command refer to step 1 1 Use the SDIO flags interrupts to check the transfer status Write Operations 1 First user has to fill the data structure pointer to SDIO DatalnitTypeDef according to the
404. ess offset 0x04 e _ JO uint32_t IWDG_TypeDef RLR IWDG Reload register Address offset 0 08 e _ JOuint32_t IWDG_TypeDef SR IWDG Status register Address offset IWDG Firmware driver API description The following section lists the various functions of the IWDG library IWDG features The IWDG can be started by either software or hardware configurable through option byte The IWDG is clocked by its own dedicated low speed clock LSI and thus stays active even if the main clock fails Once the IWDG is started the LSI is forced ON and cannot be disabled LSI cannot be disabled too and the counter starts counting down from the reset value of OXFFF When it reaches the end of count value 0x000 a system reset is generated The IWDG counter should be reloaded at regular intervals to prevent an MCU reset The IWDG is implemented in the VDD voltage domain that is still functional in STOP and STANDBY mode IWDG reset can wake up from STANDBY IWDGRST flag in RCC CSR register can be used to inform when a IWDG reset occurs Min max timeout value 232KHz LSI 125us 32 7s The IWDG timeout may vary due to LSI frequency dispersion STM32F2xx devices provide the capability to measure the LSI frequency LSI clock connected internally to TIM5 CH4 input capture The measured value DoclD 18540 Rev 1 Ly UM1061 Independent watchdog IWDG 17 2 1 17 2 1 1 can be used to have an IWDG timeout with an a
405. essor define USE_FULL_ASSERT system_stm32f2xx c This file contains the system clock configuration for STM32F2xx devices This file provides two functions and one global variable to be called from user application e Systemlnit this function sets up the system clock source PLL multiplier and divider factors AHB APBx prescalers and Flash settings This function is called at startup just after reset and before branch to main program This call is made inside the startup stm32f2xx s file e SystemCoreClock this variable contains the core clock HCLK It can be used by the user application to set up the SysTick timer or configure other parameters e SystemCoreClockUpdate this function updates the variable SystemCoreClock and must be called whenever the core clock is changed during program execution This file is automatically generated by the clock configuration YA tool STMS2f2xx Clock Configuration xls Using this tool you can generate a configuration file customized for your application requirements For more information please refer to AN3362 available from ST web site stm32f2xx_it c Template source file containing the interrupt service routine ISR for Cortex M3 exceptions You can add additional ISR s for the used peripheral s for the available peripheral interrupt handler name please refer to the startup file startup_stm32f2xx s stm32f2xx_it h Header file for stm32f2xx_it c STM32F2xx_StdPeriph_Examples sub folder Th
406. ether the specified RCC flag is set or not Parameters e FLAG specifies the flag to check This parameter can be one of the following values FLAG HSIRDY HSI oscillator clock ready FLAG HSERDY HSE oscillator clock ready FLAG PLLRDY main PLL clock ready FLAG PLLI2SRDY PLLI2S clock ready FLAG LSERDY LSE oscillator clock ready FLAG LSIRDY LSI oscillator clock ready FLAG 5 POR PDR or BOR reset FLAG PINRST Pin reset FLAG PORRST POR PDR reset FLAG 5 5 Software reset FLAG IWDGRST Independent Watchdog reset FLAG WWDGRST Window Watchdog reset FLAG LPWRRST Low Power reset Return values The new state of RCC FLAG SET or RESET Notes e None 19 2 9 3 RCC ClearFlag Function Name void RCC_ClearFlag void Function Description Clears the RCC reset flags Parameters None Return values e None Notes e None 19 2 9 4 RCC GetlTStatus Function Name Function Description Parameters ITStatus RCC GetlTStatus uint8 t RCC Checks whether the specified RCC interrupt has occurred or not RCC IT specifies the RCC interrupt source to check This parameter can be one of the following values IT LSIRDY LSI ready interrupt DoclD 18540 Rev 1 385 634 Reset and clock control RCC UM1061 19 2 9 5 19 3 19 3 1 386 634 RCC_IT_LSERDY LSE re
407. examples covering all available peripherals with template projects for the most common development Tools With the appropriate hardware evaluation board this allows to get started with a brand new micro within few hours 1 3 Package description The Library is supplied in one single zip file The extraction of the zip file generates one folder STM32F2xx_SitdPeriph_Lib_VX Y Z which contains the following subfolders Figure 2 Library package structure STM32F2 x StdPeriph Lib VXY Z _ 21 69 Libraries CMSIS STM32F2xx StdPeriph Driver inc sre Release_Notes html Project STM32F2c_StdPeriph_Examples STM32F Do StdPeriph Template Utilities STM32 EVAL amp Release Notes html E stm32f2xx stdperiph lib um chm 1 VX Y Z refer to the library version ex V1 0 0 The library package consists of three main folders described in Section 1 3 1 Library folder structure 28 634 DoclD 18540 Rev 1 4 UM1061 STM32F2xx Standard Peripheral Library 1 3 1 Library folder structure This folder contains all CMSIS files and STM32F2xx Standard Peripheral Drivers The library folder structure is shown in the figure below Figure 3 Library folder structure Libraries CMSIS CM3 21 69 CoreSupport core_cm3 c core cm3h DeviceSupport ST STM32F2 startup amp Release Notes html 322 _51 3 2 Bi system_stm32f2a h
408. fast enable TIM OCFast Disable TIM output compare fast disable Return values e None Notes e None 25 2 10 21 OC3FastConfig Function Name void OC3FastConfig TypeDef TIMx uint16 t OCFast Function Description Configures the TIMx Output Compare 3 Fast feature Parameters e TIMx where x 1 2 3 4 5 or 8 to select the TIM peripheral TIM OCFast new state of the Output Compare Fast Enable Bit This parameter can be one of the following values TIM output compare fast enable TIM_OCFast_Disable output compare fast disable Return values e None Notes e None 25 2 10 22 TIM_OC4FastConfig Function Name void TIM_OC4FastConfig TIM_TypeDef TIMx uint16 t TIM_OCFast Function Description Configures the TIMx Output Compare 4 Fast feature Parameters e TIMx where x be 1 2 3 4 5 or 8 to select the TIM peripheral 542 634 18540 Rev 1 UM1061 General purpose timers TIM Return values Notes 25 2 10 23 TIM_ClearOC1 Ref Function Name Function Description Parameters Return values Notes 25 2 10 24 TIM_ClearOC2Ref Function Name Function Description Parameters Return values Notes 3 TIM OCFast new state of the Output Compare Fast Enable Bit This parameter can be one of the following values Enable TIM output compare fast enable TIM_OCFast_Disable
409. figuration DCMI Delnit DCMI Init DCMI Structinit DCMI CROPConfig DCMI_CROPCmd DCMI SetEmbeddedSynchroCodes DCMI JPEGCmd Image capture DCMI DCMI CaptureCmd DCMI ReadData Interrupt and flag management DCMI ITConfig DCMI GetFlagStatus DoclD 18540 Rev 1 4 UM1061 Digital camera interface DCMI 9 2 5 9 2 5 1 9 2 5 2 9 2 5 3 4 e ClearFlag e GetlTStatus DCMI_ClearlTPendingBit Initialization and configuration functions DCMI Delnit Function Name Function Description Parameters Return values Notes DCMI Init Function Name Function Description Parameters Return values Notes DCMI Structlnit Function Name Function Description Parameters Return values void DCMI Delnit void Deinitializes the DCMI registers to their default reset values e None e None None void DCMI Init DCMI InitTypeDef DCMI_InitStruct Initializes the DCMI according to the specified parameters in the DOMI InitStruct e InitStruct pointer to a DOMI InitTypeDef structure that contains the configuration information for the DCMI None None void DCMI Structlnit DCMI_InitTypeDef DCMI InitStruct Fills each DCMI InitStruct member with its default value DCMI InitStruct pointer to a InitTypeDef structure which will be initialized None DoclD 18540 Rev 1 177 634 Digital camera i
410. figures the TIMx channel 4 polarity e TIMx where x be 1 2 3 4 5 or 8 to select the TIM peripheral e TIM OCPolarity specifies the Polarity This parameter can be one of the following values TIM OCPolarity High Output Compare active high OCPolarity Low Output Compare active low None None void TIM CCxCmd TypeDef TIMx uint16 t TIM Channel uint16_t Enables or disables the TIM Capture Compare Channel x DociD 18540 Rev 1 547 634 General purpose timers TIM UM1061 Parameters Return values Notes 25 2 10 35 _ 25 2 11 25 2 11 1 548 634 Function Name Function Description Parameters Return values Notes e TIMx where x can be 1 to 14 except 7 to select the TIM peripheral e TIM Channel specifies the TIM Channel This parameter can be one of the following values TIM Channel 1 TIM Channel 1 Channel 2 TIM Channel 2 TIM Channel 3 TIM Channel 3 TIM Channel 4 TIM Channel 4 e TIM specifies the TIM Channel CCxE bit new state This parameter can be TIM Enable or TIM COx Disable None None void CCxNCmd TIM TypeDef TIMx uint16_t TIM_Channel uint16_t TIM_CCxN Enables or disables the TIM Capture Compare Channel xN e TIMx where x be 1 or 8 to select the TIM peripheral e TIM Channel specifies the TIM Channel This parameter can be on
411. fine e define e define e define e define e define RCC_Flag e define e define e define e define e define RCC_APB2Periph_ADC3 uint32_t 0x00000400 RCC_APB2Periph_SDIO uint32_t 0x00000800 2 5 2 t 0x00001000 2 SYSCFG uint32 1 0 00004000 RCC 2 TIM9 uint32 t 0x00010000 2 TIMT10 uint32 1 0 00020000 2 TIM11 uint32 1 0x00040000 FLAG HSIRDY uint8 1 0 21 RCC FLAG HSERDY uint8 1 0x31 RCC FLAG PLLRDY uint8 t 0x39 FLAG PLLI2SRDY uint8 t Ox3B FLAG LSERDY uint8 10 41 DocID 18540 Rev 1 393 634 Reset and clock control RCC UM1061 e define e define e define e define e define e define e define e define RCC FLAG LSIRDY uint8 1 0x61 RCC FLAG BORRST uint8 1 0 79 RCC FLAG PINRST uint8 t 0x7A RCC FLAG PORRST uint8 1 0 7 RCC FLAG SFTRST uint8 t 0x7C RCC FLAG IWDGRST uint8 t Ox7D RCC FLAG WWDGRST uint8 0 7 RCC FLAG LPWRRST uint8 t Ox7F RCC HSE configuration e didefine e didefine e didefine 394 634 RCC HSE OFF uint8 t 0x00 RCC HSE ON uint8 t 0x01 HSE Bypass uint8 1 0 05 DocID 18540 Rev 1 4 UM1061 Reset and clock control RCC 3 RCC 125 Clock Source e define e define I2S2CLKSource PLLI2S
412. fine DCMI ExtendedDataMode 8 6 1 0x0000 Interface captures 8 bit data on every pixel clock e define DCMI ExtendedDataMode 10b uint16 1 0 0400 Interface captures 10 bit data on every pixel clock DocID 18540 Rev 1 183 634 Digital camera interface UM1061 184 634 define DCMI ExtendedDataMode 12b uint16 1 0x0800 Interface captures 12 bit data on every pixel clock define DCMI ExtendedDataMode 14b uint16 1 0x0C00 Interface captures 14 bit data on every pixel clock DCMI Flags define define define define define define define define define define DCMI FLAG HSYNC uint16 t 0x2001 DCMI FLAG VSYNC uint16 t 0x2002 DCMI FLAG FNE uint16 1 0 2004 DCMI FLAG FRAMERI uint16 t 0x0001 DCMI FLAG OVFRlI uint16 t 0x0002 DCMI FLAG ERRRI uint16 1 0x0004 DCMI FLAG VSYNCRI uint16 t 0x0008 DCMI FLAG LINERlI uint16 t 0x0010 DCMI FLAG FRAMEMI uint16 00 1001 DCMI FLAG OVFMl uint16 t 0x1002 DocID 18540 Rev 1 4 UM1061 Digital camera interface DCMI 3 e define DCMI_FLAG_ERRMI uint16_t 0x1004 e define DCMI_FLAG_VSYNCMI uint16_t 0x1008 e define DCMI_FLAG_LINEMI uint16_t 0x1010 DCMI HSYNC e define DCMI HSPolarity Low uint16 t 0x0000 Horizontal synchronization active Low e define DCMI HSPolarity High uint16 t 0x0040 Horizontal synchronization active High
413. fine a U if rc tailedluinte 55 tile wimies2 lame ssert param expr void 0 SE FULL ASSERT The assert_failed function is implemented in the main c file or in any other user C file ifdef USE EE FULL ASSERT Qbrief number param param retval Reports the name of the source file and the source line waere the assert peram error has Kalu file pointer to the source file name lines assert param error line source mumloeic None void assert c tile ie line User add his own implementation to report the file name and line number printf n r Wrong parameter value detected on r n 059 rile Be 31e p peime lina Infinite loop while 1 endif USE FULL ASSERT Because of the overhead it introduces it is recommended to use run time checking during application code development and debugging and to remove it from the final application to improve code size and speed However if you want to keep this functionality in your final application reuse the assert_param macro defined within the library to test the parameter values before calling the library functions DocID 18540 Rev 1 r UM1061 STM32F2xx Standard Peripheral Library 1 1 6 MISRA C 2004 compliance The C programming language is growing in importance f
414. flag is set or reset are named PPP GetFlagStatus e g 2 GetFlagStatus The functions used to clear a PPP flag are named PPP ClearFlag for example I2C ClearFlag The functions used to check whether the specified PPP interrupt has occurred or not are named PPP GetlTStatus e g 2 GetlTStatus The functions used to clear a PPP interrupt pending bit are named PPP ClearlTPendingBit e g 2 ClearlTPendingBit DocID 18540 Rev 1 19 634 STM32F2xx Standard Peripheral Library UM1061 1 1 3 20 634 Coding rules This section describes the coding rules used in the library General e All codes should comply with ANSI C standard and should compile without warning under at least its main compiler Any warnings that cannot be eliminated should be commented in the code Thelibrary uses ANSI standard data types defined in the ANSI C header file lt stdint h gt e The library has no blocking code and all required waiting loops polling loops are controlled by an expiry programmed timeout Variable types Specific variable types are already defined with a fixed type and size These types are defined in the file stm32f2xx h typedef enum RESET 0 SET RESET FlagStatus ITStatus typedef enum DISABDE 0 ENABLE DISABLI E FunctionalState typedef enum ERROR 0 SUG CHS ERROR Mice OMS tarus Peripherals
415. g HTC FLAG TSOVF Time Stamp OverFlow flag FLAG TSF Time Stamp event flag FLAG WUTF WakeUp Timer flag FLAG ALRBF Alarm B flag FLAG ALRAF Alarm flag FLAG Initialization mode flag FLAG HRSF Registers Synchronized flag RTC FLAG INITS Registers Configured flag FLAG WUTWF WakeUp Timer Write flag FLAG ALRBWF Alarm B Write flag FLAG ALRAWF Alarm A write flag The new state of RTC FLAG SET or RESET None void RTC ClearFlag uint32 t RTC FLAG Clears the RTC s pending flags RTC FLAG specifies the RTC flag to clear This parameter can be any combination of the following values FLAG Tamper 1 event flag FLAG TSOVF Time Stamp Overflow flag FLAG TSF Time Stamp event flag FLAG WakeUp Timer flag FLAG ALRBF Alarm B flag RTC FLAG ALRAF Alarm A flag FLAG HRSF Registers Synchronized flag None DoclD 18540 Rev 1 427 634 Real time clock RTC UM1061 Notes None 21 2 11 4 RTC GetiTStatus 21 2 11 5 428 634 Function Name ITStatus RTC GetiTStatus uint32 t RTC IT Function Description Checks whether the specified RTC interrupt has occurred or not Parameters RTC IT specifies the RTC interrupt source to check This parameter can be one of the following values IT TS Time Stamp in
416. g Function Name void TIM ForcedOC1Config TIM TypeDef uint16_t TIM_ForcedAction Function Description Forces the TIMx output 1 waveform to active or inactive level Parameters e TIMx where x can be 1 to 14 except 6 7 to select the TIM peripheral e TIM ForcedAction specifies the forced Action to be set to the output waveform This parameter can be one of the 4 DoclD 18540 Rev 1 537 634 General purpose timers TIM UM1061 following values TIM ForcedAction Active Force active level on OC1REF TIM ForcedAction InActive Force inactive level on OC1REF Return values None Notes None 25 2 10 12 TIM ForcedOC2Config Function Name void TIM ForcedOC2Config TIM TypeDef TIMx uint16_t TIM_ForcedAction Function Description Forces the TIMx output 2 waveform to active or inactive level Parameters e TIMx where x be 1 2 3 4 5 8 9 or 12 to select the TIM peripheral TIM ForcedAction specifies the forced Action to be set to the output waveform This parameter can be one of the following values ForcedAction Active Force active level on OC2REF TIM ForcedAction Force inactive level on OC2REF Return values Notes None 25 2 10 13 TIM ForcedOC3Config Function Name void TIM ForcedOC3Config TIM TypeDef uint16_t TIM ForcedAction Function Description Forces the TIMx output 3 waveform to active or inactive leve
417. ges 05 Dec 2011 1 Initial release 18540 Rev 1 633 634 Disclaimer UM1061 30 Disclaimer Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at anytime without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND OR SALE OF ST PRODUCTS INCLUDING WITHOUT L
418. gth 3BylesTIM DMABurstLength 3Transfers e define DMABursiLength 4BylesTIM DMABurstLength 4ATransfers define DMABursiLength 5BytesTIM DMABurstLength 5Transfers e define DMABursiLength 6BylesTIM DMABurstLength 6Transfers e define DMABursiLength 7BytlesTIM DMABurstLength 7Transfers e define DMABursiLength 8BylesTIM DMABurstLength 8Transfers e define DMABursiLength 9BylesTIM DMABurstLength 9Transfers DocID 18540 Rev 1 579 634 General purpose timers TIM UM1061 e define DMABurstLength 10BytesTIM DMABurstLength 10Transfers e define TIM DMABursiLength 11BytesTIM DMABurstLength 11Transfers e define DMABurstLength 12BytesTIM DMABurstLength 12Transfers e define DMABurstLength 13BytesTIM DMABurstLength 13Transfers e define DMABurstLength 14BytesTIM DMABurstLength 14Transfers e define TIM DMABurstLength 15BytesTIM DMABurstLength 15Transfers e define DMABurstLength 16BytesTIM DMABurstLength 16Transfers e ididefine DMABurstLength 17BytesTIM DMABurstLength 17Transfers e define DMABurstLength 18BytesTIM DMABurstLength 18Transfers TIM Lock level e define LOCKLevel OFF uint16 t 0x0000 e TIM LOCKLevel 1 uint16 1 0 0100 580 634 DocID 18540 Rev 1 UM1061 General purpose timers TIM 3 e define TIM_LOCKLevel_2 uint16_t 0x0200 e define TIM_LOCKLeve
419. he DAC this example assumes that DAC channel2 pin and TIM6 are already configured For more examples about DAC configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples DAC DAC DAC lont Siue Enable DAC clock DocID 18540 Rev 1 165 634 Digital to analog converter DAC UM1061 APBlPeriphClockCmd RCC APBlPeriph DAC ENABLE DAC channel2 Configuration AKAK ck ckck DAC ImitStruct DAC Triggar DAC To MNO TIM6 TRGO signal is used to trigger the DAC DAC InitStruct DAC WaveGeneration DAC WaveGeneration Triangle DAC InitStruct DAC LFSRUnmask TriangleAmplitude DAC TriangleAmplitude 1023 DAC InitStruct DAC DAC Outputbuitter DAC Tale DNC Channel 2 Una p Enable DAC Channel2 DAC Cmd DAC Channel 2 ENABLE Set DAC channel2 DHR12RD register DAC SetChannel2Data DAC Align 12b R 0x100 166 634 DoclD 18540 Rev 1 UM1061 Debug support DBGMCU 8 8 1 8 1 1 8 2 8 2 1 8 2 1 1 Debug support DBGMCU DBGMCU Firmware driver registers structures DBGMCU TypeDef DBGMCU TypeDef is defined in the stm32f2xx h file and contains the DBGMCU registers definition Data Fields IO uint32 t IDCODE 10 u
420. he TIM peripheral e TIM OCClear new state of the Output Compare Clear Enable Bit This parameter can be one of the following values TIM OCClear Enable Output clear enable OCClear Disable Output clear disable None void TIM_ClearOC4Ref TIM TypeDef TIMx uint16_t TIM_OCClear Clears or safeguards the OCREF4 signal on an external event e TIMx where x be 1 2 3 4 5 or 8 to select the TIM peripheral e TIM OCClear new state of the Output Compare Clear Enable Bit This parameter can be one of the following values TIM OCClear Enable Output clear enable OCClear Disable Output clear disable None None 25 2 10 27 TIM_OC1PolarityConfig 544 634 DoclD 18540 Rev 1 4 UM1061 General purpose timers TIM Function Name Function Description Parameters Return values Notes void TIM_OC1PolarityConfig TIM TypeDef uint16_t TIM_OCPolarity Configures the TIMx channel 1 polarity TIMx where x can be 1 to 14 except 6 and 7 to select the TIM peripheral TIM_OCPolarity specifies the Polarity This parameter can be one of the following values TIM OCPolarity High Output Compare active high OCPolarity Low Output Compare active low None None 25 2 10 28 OC1NPolarityConfig 25 2 10 29 TIM_OC2PolarityConfig 4 Function Name Function Description Paramete
421. he Write Protection This parameter can be ENABLE or DISABLE Return values Notes None FLASH_OB_RDPConfig Function Name void FLASH OB RDPConfig uint8 t OB RDP Function Description Sets the read protection level Parameters e specifies the read protection level This parameter can be one of the following values RDP Level 0 No protection OB RDP Level 1 Read protection of the memory OB RDP Level 2 Full chip protection Return values None Notes None FLASH OB UserConfig Function Name void FLASH OB UserConfig uint8 t OB IWDG uint8 t OB STOP uint8 t OB STDBY Function Description Programs the FLASH User Option Byte IWDG SW RST STOP DocID 18540 Rev 1 UM1061 FLASH Memory FLASH RST STDBY Parameters e IWDG Selects the IWDG mode This parameter can be one of the following values OB IWDG SW Software IWDG selected OB IWDG HW Hardware IWDG selected e STOP Reset event when entering STOP mode This parameter can be one of the following values STOP 5 No reset generated when entering in STOP OB STOP RST Reset generated when entering in STOP e STDBY Reset event when entering Standby mode This parameter can be one of the following values STDBY 5 No reset generated when entering in STANDBY STDBY Reset generated when entering in STANDBY Return values e None Notes e None
422. he library DoclD 18540 Rev 1 UM1061 How to use and customize the library Table 8 Default clock configuration in system_stm32F2xxx c System Clock source PLL HSESystem Clock source SYSCLK 120000000 Hz HCLK 120000000 Hz AHB Prescaler 1 1 Prescaler 4 2 Prescaler 2 HSE Frequency 25000000 Hz PLL_M 25 PLL_N 240 PLL_P 2 PLL_Q 5 VDD 3 3 V Flash Latency 3 WS Prefetch Buffer ON Prefetch Buffer ON Prefetch Buffer ON 48 MHz required for USB OTG FS SDIO and RNG clock Enabled 2 6 4 4 main c The main c file calls the library driver functions to configure the EXTI GPIO and NIVC peripherals Include the library and STM322xG EVAL board resources S IN CUU CESS ii aa ee E Fimeluce 0 5 Tae include stm322xg eval Needed when using STM322xG EVAL board Declare three structure variables used to initialize the GPIO and NIVC peripherals YA Kaka SSS 27 WAL GPIO Ty 5 VIC limitis ucture Declare prototype for a local function JAN TS AWATA mI T OOV 5 A void Delay 3 2 icem The main program will be structured as follow Qbrief Main program param None retval None AA int main void Doc
423. here x can be 1 2 or 3 to select the ADC peripheral NewState new state of the selected ADC DMA request after last transfer This parameter can be ENABLE or DISABLE None None DoclD 18540 Rev 1 67 634 Analog to digital converter ADC UM1061 3 2 8 3 ADC_MultiModeDMARequestAfterLastTransferCmd Function Name void ADC MultiModeDMARequestAfterLastTransferCmd FunctionalState NewState Function Description Enables or disables the ADC DMA request after last transfer in multi ADC mode Parameters e NewState new state of the selected ADC DMA request after last transfer This parameter can be ENABLE or DISABLE Return values e None Notes e if Enabled DMA requests are issued as long as data converted and DMA mode for multi ADC mode selected using ADC Commonlnit function by ADC CommonlnitStruct ADC DMAAccessMode structure member is ADC DMAAccessMode 1 ADC DMAAccessMode 2 or ADC DMAAccessMode 3 3 2 9 Injected channels Configuration functions 3 2 9 1 InjectedChannelConfig Function Name void ADC_InjectedChannelConfig ADC TypeDef ADCx uint8 t ADC Channel uint8 t Rank uint8 t ADC SampleTime Function Description Configures for the selected ADC injected channel its corresponding rank in the sequencer and its sample time Parameters e ADCx where x can be 1 2 or 3 to select the ADC peripheral e ADC Channel the ADC channel to configure This parameter can be one of the following
424. his parameter can be one of the following values HTC WakeUpClock RTCCLK Div16 RTC Wakeup Counter Clock RTCCLK 16 WakeUpClock RTCCLK Div8 RTC Wakeup Counter Clock RTCCLK 8 WakeUpClock Div4 RTC Wakeup Counter Clock RTCCLK 4 WakeUpClock RTCCLK Div2 RTC Wakeup Counter Clock RTCCLK 2 HTC WakeUpClock CK SPRE 16bits RTC Wakeup Counter Clock CK SPRE DoclD 18540 Rev 1 433 634 Real time clock RTC UM1061 HTC WakeUpClock CK SPRE 17bits RTC Wakeup Counter Clock CK SPRE Return values e None Notes e The WakeUp Clock source can only be changed when the RTC WakeUp is disabled Use the RTC WakeUpCmd DISABLE 21 2 14 2 RTC SetWakeUpCounter Function Name void RTC SetWakeUpCounter uint32 t RTC WakeUpCounter Function Description Configures the RTC Wakeup counter Parameters e RTC WakeUpCounter specifies the WakeUp counter This parameter can be a value from 0x0000 to OxFFFF Return values e None Notes e The RTC WakeUp counter can only be written when the RTC WakeUp is disabled Use the RTC WakeUpCmd DISABLE 21 2 14 3 RTC GetWakeUpCounter Function Name uint32 t RTC GetWakeUpCounter void Function Description Returns the RTC WakeUp timer counter value Parameters e None Return values The WakeUp Counter value Notes e None 21 2 14 4 RTC_WakeUpCmd 434 634 DociD 18540 Rev 1 4 UM1061 Real time clock RTC Function
425. how to use the available API Other modules need to be configured when using interrupt and DMA a Using the interrupts after enabling the interrupt source s the peripheral registers enable the peripheral interrupt line and configure its priority in the NVIC For more details refer to Section 28 Miscellaneous add on to CMSIS misc b Using the DMA after enabling the DMA source s in the peripheral registers configure and enable the peripheral DMA channel in the DMA controller For more details refer to Section 10 DMA controller DMA How to develop your first application This section describes all steps required for using and customizing the library to build an application from scratch It gives a real example based on the requirements described below STM322xG EVAL board used as reference hardware e System clock configured to 120 MHz with 3 Flash wait state Flash prefetch Instruction cache and Data cache enabled e PAO pin used as EXTI LineO This pin is connected externally to a pushbutton e PG6 and PG8 pins used in output mode to drive LED1 and LED2 respectively e toggles continuously while LED2 toggles each time the pushbutton is pressed Starting point The typical starting point is the template project provided within the library package Project S TM32F2xx StdPeriph Template This folder contains all the required template files as well as the project files for different development tools Reu
426. ies the HASH flag to check This parameter can be one of the following values FLAG DINIS Data input interrupt status flag HASH FLAG DOCIS Digest calculation completion interrupt status flag HASH FLAG BUSY Busy flag HASH FLAG DMAS DMAS Status flag DoclD 18540 Rev 1 UM1061 Hash processor HASH Return values Notes 15 2 12 3 HASH ClearFlag HASH FLAG DINNE Data Input register DIN not empty status flag The new state of HASH FLAG SET or RESET None Function Name void HASH ClearFlag uint16_t HASH FLAG Function Description Clears the HASH flags Parameters e FLAG specifies the flag to clear This parameter can be any combination of the following values HASH FLAG DINIS Data Input Flag HASH FLAG DCIS Digest Calculation Completion Flag Return values e None Notes e None 15 2 12 4 HASH GetlTStatus Function Name ITStatus HASH GetlTStatus uint8 t HASH IT Function Description Checks whether the specified HASH interrupt has occurred or not Parameters e HASH specifies the HASH interrupt source to check This parameter can be one of the following values HASH DINI Data Input interrupt HASH IT DCI Digest Calculation Completion Interrupt Return values The new state of HASH_IT SET or RESET Notes e None 15 2 12 5 HASH_ClearlTPendingBit ky DociD 18540 Rev 1 303 634 Hash processor HASH UM1061 15 2 13
427. ified receive FIFO 2 FIFOs are available Return the number the pending received frames Below is the list of CAN Frames Reception functions CAN Receive e FlFORelease e MessagePending Operation modes functions This section provides functions allowing to select the CAN Operation modes Sleep mode e Normal mode DocID 18540 Rev 1 97 634 Controller area network CAN UM1061 4 2 3 98 634 e Initialization mode Below is the list of CAN Operating modes functions CAN_OperatingModeRequesi CAN_Sleep CAN_WakeUp CAN Bus Error management functions This section provides functions allowing to e Return the CANx s last error code LEC Return the Receive Error Counter REC Return the LSB of the 9 bit CANx Transmit Error Counter TEC If TEC is greater than 255 The CAN is bus off state If REC or TEC are greater than 96 an Error warning flag occurs If REC or TEC are greater than 127 an Error Passive Flag occurs Below is the list of CAN Bus Error management functions Section 4 2 8 1 CAN GetLastErrorCode Section 4 2 8 2 CAN GetReceiveErrorCounter Section 4 2 8 3 CAN_GetLSBTransmitErrorCounter Interrupt and flag management This section provides functions allowing to configure the CAN Interrupts and to get the status and clear flags and Interrupts pending bits The CAN provides 15 Flags and 14 Interrupts so
428. ifies the pending bit to clear This parameter can be any combination of the following values 558 634 DoclD 18540 Rev 1 ITA UM1061 General purpose timers TIM 25 2 13 7 DMAContig 4 Return values Notes Function Name Function Description Parameters TIM IT Update TIM1 update Interrupt source TIM IT CCT TIM Capture Compare 1 Interrupt source TIM IT 2 TIM Capture Compare 2 Interrupt source TIM IT TIM Capture Compare 3 Interrupt source TIM IT 4 TIM Capture Compare 4 Interrupt source TIM IT TIM Commutation Interrupt source IT Trigger TIM Trigger Interrupt source TIM Break Break Interrupt source None TIM6 and TIM7 can generate only an update interrupt TIM_IT_COM and TIM_IT_Break are used only with TIM1 and TIM8 void TIM DMAContig TypeDef TIMx uint16_t DMABase 16 t TIM DMABurstLength Configures the TIMx s DMA interface TIMx where x can be 1 2 3 4 5 8 to select the TIM peripheral TIM DMABase DMA Base address This parameter can be one of the following values DMABase DMABase CR2 DMABase SMCR TIM DMABase DIER TIM1 DMABase SR DMABase EGR DMABase CCMH1 TIM DMABase CCMR2 DMABase CCER DMABase DMABase DMABase DMABase DMABase
429. ig m 419 21 2 7 Interrupt and flag management 419 21 2 8 Initialization and configuration 421 21 2 9 Backup Data registers configuration functions 424 21 2 10 RTC Tamper and TimeStamp pin selection and Output Type Config configuration functions 425 21 2 11 Interrupt and flag management 426 21 2 12 Time and Date configuration 429 21 2 13 Alarm configuration 431 21 2 14 WakeUp Timer configuration functions 433 21 2 15 Daylight Saving configuration functions 435 21 2 16 Output pin Configuration function 436 21 2 17 Coarse Calibration configuration 436 21 2 18 TimeStamp configuration functions sess 438 21 2 19 Tampers configuration functions 439 21 3 RTC Firmware driver defines 440 21 31 RTC Firmware driver defines 440 21 4 RTC Programming Example sees 449 22 Secure digital input output interface SDIO 451 22 1 SDIO Firmware driver registers structures 451 2244 TypebDel
430. iglnjecConv T1 CC4 uint32 1 0x00000000 ADC ExternalTriglnjecConv T1 TRGO uint32 t 0x00010000 ADC ExternalTriglnjecConv T2 1 2 1 0x00020000 ADC ExternalTriglnjecConv T2 TRGO uint32 t 0x00030000 ADC ExternalTriglnjecConv CC2 uint32 1 0x00040000 ADC ExternalTriglnjecConv CC4 uint32 1 0x00050000 ADC ExternalTriglnjecConv T4 2 1 0x00060000 ADC ExternalTriglnjecConv T4 CC2 uint32 1 0x00070000 ADC ExternalTriglnjecConv T4 CC3 uint32 1 0x00080000 ADC ExternalTriglnjecConv T4 TRGO uint32 1 0x00090000 DocID 18540 Rev 1 83 634 Analog to digital converter ADC UM1061 84 634 define define define define define define ADC_ExternalTriginjecConv_T5_CC4 uint32_t OxO00A0000 ExternalTriglnjecConv T5 TRGO uint32 1 0x000B0000 ADC ExternalTriglnjecConv T8 CC2 uint32 1 0x000C0000 ADC ExternalTriglInjecConv T8 CC3 uint32 1 0x000D0000 ADC ExternalTriglnjecConv T8 CC4 uint32 1 0 000 0000 ADC ExternalTriglnjecConv Ext 15 2 1 0 000 0000 ADC trigger sources for regular channels conversion define define define define define define ExternalTrigConv T1 CCi uint32 1 0 00000000 ADC ExternalTrigConv T1 CC2 uint32 t 0x01000000 ADC ExternalTrigConv T1 CC3 uint32 1 0 02000000 ADC ExternalTrigConv T2 CC2 uint32 1 0 03000000 ADC ExternalTrigConv T2
431. iguration Initialization and Configuration functions This subsection provides a set of functions allowing to initialize the USART in asynchronous and in synchronous modes For the asynchronous mode only these parameters can be configured Baud Rate Word Length Stop Bit Parity If the parity is enabled then the MSB bit of the data written in the data register is transmitted but is changed by the parity bit Depending on the frame length defined by the M bit 8 bits or 9 bits the possible USART frame formats are as listed in the following table M bit PCE bit USART frame 0 0 SB 8 bit data STB 0 1 SB 7 bit data PB STB 1 0 SB 9 bit data STB 1 1 SB 8 bit data PB STB e Hardware flow control e Receiver transmitter modes The USART_Init function follows the USART asynchronous configuration procedure details for the procedure are available in reference manual RM0033 For the synchronous mode in addition to the asynchronous mode parameters these parameters should be also configured USART Clock Enabled USART polarity USART phase USART LastBit These parameters can be configured using the USART Clocklnit function USART Delnit USART Init USART_Siructinit USART Clocklnit USART ClocksStructlnit USART Cmd USART SetPrescaler DocID 18540 Rev 1 UM1061 Universal synchronous asynchronous receiver transmitter USART 26 2 3 26 2 4 26 2 5 4 e USART_OverSampling8Cmd e USART_OneBit
432. iming FSMC_NAND_PCCARDTimingInitTypeDef FSMC_NANDInitTypeDef FSMC_AttributeSpace TimingStruct FSMC Attribute Space Timing FSMC PCCARDInitTypeDef FSMC PCCARDInitTypeDef is defined in the stm32f2xx fsmc h file and contains the PCCARD common initialization parameters Data Fields uint32 t FSMC Waitfeature uint32 t FSMC TCLRSetupTime uint32 t FSMC TARSetupTime FSMC PCCARDTiminglnitTypeDef FSMC_CommonSpaceTimingStruct FSMC PCCARDTiminglnitTypeDef FSMC_AttributeSpaceTimingStruct PCCARDTiminglnitTypeDef FSMC lOSpaceTimingStruct Field Documentation DocID 18540 Rev 1 4 UM1061 Flexible static memory controller FSMC 13 2 13 2 1 uint32_t FSMC_PCCARDInitTypeDef FSMC_Waitfeature Enables or disables the Wait feature for the Memory Bank This parameter can be any value of FSMC Wait feature uint32 t FSMC PCCARDinitTypeDef FSMC TCLRSetupTime Defines the number HCLK cycles to configure the delay between CLE low RE low This parameter can be a value between 0 and OxFF uint32_t FSMC_PCCARDInitTypeDef FSMC_TARSetupTime Defines the number of HCLK cycles to configure the delay between ALE low and RE low This parameter can be a number between 0 0 and OxFF FSMC NAND PCCARDTiminglnitTypeDef FSMC PCCARDInitTypeDef FSMC CommonSpaceTimingStruct FSMC Common Space Timing FSMC PCCARDTiminglnitTypeDef FSMC PCCARDInitTypeDef FSMC Attrib
433. ing GPIO_PinAFConfig function Configure the desired in alternate function by GPIO InitStruct GPIO Mode GPIO Mode AF Select the type pull up pull down and output speed via GPIO PuPd GPIO GPIO Speed members Call GPIO Init function DoclID 18540 Rev 1 591 634 Universal synchronous asynchronous receiver UM1061 transmitter USART 26 2 2 592 634 4 Program the Baud Rate Word Length Stop Bit Parity Hardware flow control and Mode Receiver Transmitter using the USART_Init function 5 For synchronous mode enable the clock and program the polarity phase and last bit using the USART Clocklnit function 6 Enable the NVIC and the corresponding interrupt using the function USART if you need to use interrupt mode 7 When using the DMA mode Configure the DMA using DMA Init function Active the needed channel Request using USART_DMACmd function 8 Enable the USART using the USART_Cmd function 9 Enable the DMA using the DMA_Cmd function when using DMA mode Refer to Multi Processor LIN half duplex Smartcard IrDA sub sections for more details To reach higher communication baudrates it is possible to enable the oversampling by 8 mode using the function USART_OverSampling8Cmd This function should be called after enabling the USART clock RCC APBxPeriphClockCmdad and before calling the function USART Init Initialization and conf
434. int16 t USART TypeDef SR USART Status register Address offset 0 00 e uinti6 t USART TypeDef RESERVEDO Reserved 0x02 e JOuint16 t USART_TypeDef DR USART Data register Address offset 0x04 e uint16 t USART_TypeDef RESERVED1 Reserved 0 06 e _ JOuint16_t USART_TypeDef BRR USART Baud rate register Address offset 0x08 e uint16 t USART_TypeDef RESERVED2 Reserved e _ JOuint16 t USART TypeDef CH1 USART Control register 1 Address offset e 16 t USART_TypeDef RESERVED3 Reserved e JOuint16_t USART_TypeDef CR2 USART Control register 2 Address offset 0x10 DocID 18540 Rev 1 589 634 Universal synchronous asynchronous receiver UM1061 transmitter USART 26 1 2 590 634 uint16_t USART_TypeDef RESERVED4 Reserved 0 12 JO uint16 t USART_TypeDef CR3 USART Control register 3 Address offset 0x14 uint16_t USART_TypeDef RESERVED5 Reserved 0x16 JO uint16 t USART_TypeDef GTPR USART Guard time and prescaler register Address offset 0 18 uint16_t USART_TypeDef RESERVED6 Reserved 0x1A USART_InitTypeDef USART InitTypeDef is defined in the stm32f2xx_usart h file and contains the USART initialization parameters Data Fields uint32_t USART_BaudRate uint16_t USART_WordLength uint16_t USART_StopBits uint16_t USART_Parity uint16_t USART_Mode uint16_t USART_HardwareFlowControl Field Documentation uint32_t USAR
435. int32 t CR lO uint32 t APB1FZ IO uint32 t APB2FZ Field Documentation e _ lOuint32 t DBGMCU TypeDef IDCODE device ID code Address offset 0x00 e _ lOuint32 t DBGMCU TypeDef CR Debug MCU configuration register Address offset 0x04 e _ lOuint32 t DBGMCU TypeDef APB1FZ Debug MCU APB 1 freeze register Address offset 0x08 e _ lOuint32 t DBGMCU TypeDef APB2FZ Debug MCU 2 freeze register Address offset 0 0 DBGMCU Firmware driver API description The following section lists the various functions of the DBGMCU library Functions DBGMCU_GetREVID DBGMCU GetDEVID DBGMCU_Config DBGMCU APB1PeriphConfig DBGMCU APB2PeriphConfig Functions DBGMCU GetREVID Function Name uint32 t DBGMCU GetREVID void DocID 18540 Rev 1 167 634 Debug support DBGMCU UM1061 Function Description Parameters Return values Notes Returns the device revision identifier None Device revision identifier None 8 2 1 2 DBGMCU GetDEVID Function Name Function Description Parameters Return values Notes 8 2 1 3 DBGMCU Config Function Name Function Description Parameters Return values Notes 168 634 uint32_t DBGMCU_GetDEVID void Returns the device identifier e None Device identifier None void DBGMCU Config uint32 t DBGMCU Periph FunctionalState NewState Configures low power mode behavior when the MCU is in Debug mode e DBGMCU_Peri
436. int8_t 0x03 GPIO_AF_TIM10 uint8_t 0x03 GPIO_AF_TIM11 uint8_t 0x03 GPIO_AF_I2C1 uint8_t 0x04 GPIO_AF_I2C2 uint8_t 0x04 GPIO_AF_I2C3 uint8_t 0x04 GPIO_AF_SPI1 uint8_t 0x05 GPIO_AF_SPI2 uint8_t 0x05 GPIO_AF_SPI3 uint8_t 0x06 GPIO_AF_USART1 uint8_t 0x07 GPIO_AF_USART2 uint8_t 0x07 DocID 18540 Rev 1 4 UM1061 General purpose Os GPIO 3 define define define define define define define define define define define define GPIO_AF_USART3 uint8_t 0x07 GPIO AF UARTA uint8 1 0x08 GPIO_AF_UART5 uint8_t 0x08 GPIO_AF_USART6 uint8_t 0x08 GPIO_AF_CAN1 uint8_t 0x09 GPIO AF CAN2 uint8 1 0x09 GPIO AF TIM12 uint8 1 0 09 GPIO AF 8 1 0 09 GPIO AF 14 8 1 0 09 GPIO AF OTG FS uint8 U0xA GPIO HS uint8 t 0xA GPIO AF ETH uint8 1 0 0 DoclID 18540 Rev 1 285 634 General purpose Os GPIO UM1061 286 634 e define e define e define e define e define GPIO AF FSMC uint8 t 0xC GPIO OTG HS FS uint8 t 0xC GPIO SDlO uint8 t OxC GPIO DCMl uint8 t OxOD GPIO AF EVENTOUT uint8 t OxOF GPIO Legacy e define e define e define e define GPIO_Mode_AINGPIO_Mode_AN GPIO_AF_OTG1_FSGPIO_AF_OTG_FS GPIO_AF_OTG2_HSGPIO_AF_OTG_HS GPIO_AF_OTG2_FSGPIO_AF_OTG_HS_FS GPIO_pins_define
437. interrupt source for Analog watchdog event The user should identify which mode will be used in his application to manage the ADC controller events Polling mode or Interrupt mode In the Polling Mode it is advised to use the following functions e ADC GetFlagStatus to check if flags events occur e ClearFlag to clear the flags events In the Interrupt Mode it is advised to use the following functions ADC ITConfig to enable or disable the interrupt source ADC GetlTStatus to check if Interrupt occurs ADC ClearlTPendingBit to clear the Interrupt pending Bit corresponding Flag ADC ITConfig ADC GetFlagStatus ADC ClearFlag ADC GetlTStatus ADC ClearlTPendingBit 3 2 4 Initialization and configuration functions 3 2 4 1 ADC Delnit Function Name void ADC Delnit void Function Description Deinitializes all ADCs peripherals registers to their default reset values Parameters e None Ly 18540 Rev 1 57 634 Analog to digital converter ADC UM1061 Return values None Notes None 3 2 4 2 ADC Init Function Name void ADC Init ADC TypeDef ADCx ADC InitTypeDef ADC Function Description Initializes the ADCx peripheral according to the specified parameters in the InitStruct Parameters e ADCx where x can be 1 2 or 3 to select the ADC peripheral e ADC _InitStruct pointer to an ADC InitTypeDef structure that contains the configur
438. ion Name FlagStatus WWDG GetFlagStatus void DoclD 18540 Rev 1 4 UM1061 Window watchdog WWDG 27 2 3 2 27 3 3 Function Description Checks whether the Early Wakeup interrupt flag is set or not Parameters e None Return values The new state of the Early Wakeup interrupt flag SET or RESET Notes e None WWDG Function Name void WWDG ClearFlag void Function Description Clears Early Wakeup interrupt flag Parameters e None Return values e None Notes e None WWDG Firmware driver defines WWDG WWDG_Prescaler define WWDG_Prescaler_1 uint32_t Ox00000000 e define WWDG Prescaler 2 uint32 1 0x00000080 e define WWDG Prescaler 4 uint32 t 0x00000100 e define WWDG Prescaler 8 uint32 t 0x00000180 DoclD 18540 Rev 1 623 634 Window watchdog WWDG UM1061 27 4 624 634 WWDG Programming Example The example below explains how to configure the WWDG to have a timeout of 69 9 ms with the refresh window set to 80 For more examples about WWDG configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples WWDG Enable WWDG clock RCC_APB1PeriphClockCmd RCC_APB1Periph WWDG ENABLE WWDG clock counter PCLK1 30MHz 4096 8 915 Bi 21092 ws WWDG SetPrescaler WWDG Prescaler 8 Set Window value to 80 WWDG
439. ion Name uint32 t DMA GetCurrentMemoryTarget DMA Stream TypeDef DMAy Streamx Function Description Returns the current memory target used by double buffer transfer Parameters e Return values Notes DMAy Streamx where y be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream The memory target number 0 for MemoryO or 1 for Memory1 None DociD 18540 Rev 1 199 634 DMA controller DMA UM1061 10 2 7 10 2 7 1 10 2 7 2 200 634 Interrupt and flag management functions DMA_GetCmdStatus Function Name FunctionalState GetCmdStatus Stream TypeDef DMAy Streamx Function Description Returns the status of EN bit for the specified DMAy Streamx Parameters e Streamx where y can be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream Return values Current state of the DMAy Streamx ENABLE DISABLE Notes e After configuring the DMA Stream DMA_Init function and enabling the stream it is recommended to check or wait until the DMA Stream is effectively enabled A Stream may remain disabled if a configuration parameter is wrong After disabling a DMA Stream it is also recommended to check or wait until the DMA Stream is effectively disabled If a Stream is disabled while a data transfer is ongoing the current data will be transferred and the Stream will be effectively disabled only after the transfer of this single data is fi
440. iph USART2 USART2 clock RCC APB1Periph USARTS3 USARTS clock RCC_APB1Periph_UART4 UARTA clock RCC_APB1Periph_UART5 UART5 clock RCC 1 I2C1 2 1 clock RCC 1 I2C2 2 2 clock RCC APB1Periph I2C3 2 3 clock RCC 1 CANT clock RCC 1 CAN2 clock RCC APB1Periph PWR clock RCC 1 DAC DAC clock State new state of the specified peripheral clock This meter can be ENABLE or DISABLE None After reset the peripheral clock used for registers read write acce SS is disabled and the application software has to enable this clock before using it RCC APB2PeriphClockCmd Function Name Function Description Parameters void RCC APB2PeriphClockCmd uint32 t RCC APB2Periph FunctionalState NewState Enables or disables the High Speed APB APB2 peripheral clock 2 specifies the APB2 peripheral to gates Docl D 18540 Rev 1 Gr UM1061 Reset and clock control RCC 19 2 8 10 4 its clock This parameter can be any combination of the following values APB2Periph TIM1 TIM1 clock APB2Periph 8 TIM8 clock APB2Periph 05 1 USART1 clock APB2Periph USART6 USARTE clock APB2Periph ADC1 ADC1 clock RCC APB2Periph ADC2 ADC2 clock RCC APB2Periph ADC3 ADC3 clock RCC APB2Periph SDIO SDIO
441. is set and this whatever the value of the SPE bit number of used CPU cycles has to be as low as possible in the CRC transfer phase it is forbidden to call software functions in the CRC transmission sequence to avoid errors in the last data and CRC reception In fact CRCNEXT bit has to be written before the end of the transmission reception of the last data gt With high bitrate freguencies be careful when transmitting the CRC As the For high bit rate freguencies it is advised to use the DMA mode to avoid the degradation of the SPI speed performance due to CPU accesses impacting the SPI bandwidth When the STMS2F2xx is configured as slave and the NSS hardware mode is used the NSS pin needs to be kept low between the data phase and the CRC phase calculation takes place even if a high level is applied on the NSS pin This may happen for example in case of a multi slave environment where the communication master addresses slaves alternately When the SPI is configured slave mode with the CRC feature enabled CRC DociD 18540 Rev 1 4 UM1061 Serial peripheral interface SPI Between a slave de selection high level on NSS and a new slave selection low gt level NSS the CRC value should be cleared on both master and slave sides in order to resynchronize the master and slave for their respective CRC calculation To clear the CRC follow the procedure below 1 Disable SPI using the SPI Cmd function
442. is subfolder contains for each peripheral the minimum set of files needed to run a typical example on this peripheral In addition to the user files described in the section above each subfolder contains a readme txt file describing the example and how to make it work For more details about the available examples within the library please refer to Library Examples html file located in the root of this folder 1 3 3 Utilities folder 4 This folder contains the abstraction layer allowing interacting with the human interface resources buttons LEDs LCD and COM ports USARTs available on STMicroelectronics evaluation boards A common API is provided to manage these different resources It and can be easily tailored to support any other development board by adapting the initialization routine Additional drivers are provided to manage the different memories and storage media available on these boards For each hardware module e g LCD 2 EEPROM external SRAM memory gt the API is fully compatible across all STMicroelectronics evaluation board drivers DoclD 18540 Rev 1 33 634 STM32F2xx Standard Peripheral Library UM1061 The Utilities folder structure is shown below Figure 5 Utilities folder structure C Utilities STM32 EVAL 21 69 Common me 3e emo wA WA Mm m m jm mm m WA WA mm MA fonts c fonts h lcd log c lcd log h lcd log conf template h Releas
443. is supplied by VBAT analog switch connected to VBAT because VDD is not present the following functions are available e PC14 and PC15 can be used as LSE pins only e 1 can be used as the pin 8 can be used as the AF2 pin Backup domain reset The backup domain reset sets all RTC registers and the RCC_BDCR register to their reset values The BKPSRAM is not affected by this reset The only way of resetting the BKPSRAM is through the Flash interface by requesting a protection level change from 1 to 0 A backup domain reset is generated when one of the following events occurs e Software reset triggered by setting the BDRST bit in the RCC Backup domain control register RCC_BDCR You can use the RCC_BackupResetCmd e VDD or VBAT power on if both supplies have previously been powered off Backup Domain Access After reset the backup domain RTC registers RTC backup data registers and backup SRAM is protected against possible unwanted write accesses To enable access to the RTC Domain and RTC registers proceed as follows 1 Enable the Power Controller PWR interface clock using the RCC_APB1PeriphClockCmd function 2 Enable access to RTC domain using the PWR_BackupAccessCmd function 3 Select the RTC clock source using the RTCCLKConfig function 4 Enable RTC Clock using the RCC_RTCCLKCmd function 21 2 2 How to use the RTC driver 3 The following steps are reguired
444. ister Address offset 0x18 e _ lOuint32 t RTC_TypeDef ALRMAR RTC alarm register Address offset 0x1C e _ lOuint32 t RTC_TypeDef ALRMBR RTC alarm register Address offset 0 20 e _ 32 t RTC TypeDef WPR RTC write protection register Address offset 0x24 e 32 t RTC_TypeDef RESERVED1 Reserved 28 e 32 t RTC_TypeDef RESERVED2 Reserved 0x2C e _ JOuint32_t RTC_TypeDef TSTR time stamp time register Address offset 30 e 2 t RTC TypeDef TSDR RTC time stamp date register Address offset 0 34 e Uuint32 t TypeDef RESERVED3 Reserved 38 e 32 t RTC_TypeDef RESERVED4 Reserved JOuint32_t RTC_TypeDef TAFCR RTC tamper and alternate function configuration register Address offset 0x40 e uint32 t RTC TypeDef RESERVED5 Reserved 0x44 e uint32 t RTC_TypeDef RESERVED6 Reserved 0 48 e Uuint32 t RTC TypeDef RESERVED7 Reserved 0x4C e 2 TypeDef BKPOR RTC backup register 1 Address offset 0 50 e JOuint32_t RTC_TypeDef BKP1R RTC backup register 1 Address offset 0x54 e _ lOuint32 t RTC_TypeDef BKP2R RTC backup register 2 Address offset 0 58 e JOuint32_t RTC_TypeDef BKP3R RTC backup register 3 Address offset 0 5 3 DoclD 18540 Rev 1 411 634 Real time clock RTC UM1061 21 1 2 412 634 10 uint32_t RTC TypeDef BKP4R RTC backup register 4 Ad
445. isters to their default reset values None None None SYSCFG MemoryRemapConfig Function Name Function Description Parameters Return values Notes void SYSCFG_MemoryRemapConfig uint8 t SYSCFG MemoryRemap Changes the mapping of the specified pin SYSCFG Memory selects the memory remapping This parameter can be one of the following values SYSCFG MemoryRemap Flash Main Flash memory mapped at 0x00000000 SYSCFG SystemFlash System Flash memory mapped at 0x00000000 SYSCFG MemoryRemap FSMC FSMC Banki NOR PSRAM 1 and 2 mapped at 0x00000000 SYSCFG MemoryRemap SRAM Embedded SRAM 112kB mapped at 0x00000000 None In remap mode the FSMC addressing is fixed to the remap address area only Banki NOR PSRAM 1 and NOR PSRAM 2 and FSMC control registers are not accessible The FSMC remap function must be disabled to allows addressing other memory devices through the FSMC and or to access FSMC control registers DoclD 18540 Rev 1 511 634 System configuration controller SYSCFG UM1061 24 21 3 SYSCFG_EXTILineConfig Function Name void SYSCFG_EXTILineConfig uint8 t EXTI PortSourceGPIOx uint8 t EXTI PinSourcex Function Description Selects the GPIO pin used as EXTI Line Parameters e EXTI PortSourceGPIOx selects the GPIO port to be used as source for EXTI lines where x be A I e EXTI PinSourcex specifies the EXTI line to be configured Thi
446. itStruct pointer to a l2C InitTypeDef structure that contains the configuration information for the specified I2C peripheral e To use the 2 at 400 KHz in fast mode the PCLK1 frequency 2 peripheral input clock must be a multiple of 10 MHz DoclID 18540 Rev 1 4 UM1061 Inter integrated circuit interface I2C 16 2 7 4 16 2 7 5 3 Function Description Parameters Return values Notes 2 Function Function Description Parameters Return values Notes void I2C Structlnit 2C_InitTypeDef I2C InitStruct Fills each 12C_InitStruct member with its default value e 2 InitStruct pointer to 2 structure which will be initialized None None void I2C_Cmd 2C TypeDef 2 FunctionalState NewState Enables or disables the specified I2C peripheral e 2 where x can be 1 2 3 to select the 12C peripheral NewState new state of the 2 peripheral This parameter can be ENABLE or DISABLE None None I2C GenerateSTART Function Name Function Description Parameters Return values Notes void 2 GenerateSTART 2C_TypeDef 12 FunctionalState NewState Generates I2Cx communication START condition e 2 where x be 1 2 3 to select the 12C peripheral e NewState new state of the 2 START condition generati
447. itTypeDef SDIO Argument Specifies the SDIO command argument which is sent to card as part of a command message If a command contains an argument it must be loaded into this register before writing the command to the command register uint32_t SDIO CmdlnitTypeDef SDIO Cmdlndex Specifies the SDIO command index It must be lower than 0x40 uint32 t SDIO CmdlnitTypeDef SDIO Response Specifies the SDIO response type This parameter can be a value of SDIO_Response_Type uint32_t SDIO CmdlnitTypeDef SDIO Wait Specifies whether SDIO wait for interrupt request is enabled or disabled This parameter can be a value of SDIO_Wait_Interrupt_State uint32_t SDIO CmdlnitTypeDef SDIO Specifies whether SDIO Command path state machine CPSM is enabled or disabled This parameter can be a value of SDIO CPSM State SDIO_DatalnitTypeDef SDIO_DatalnitTypeDef is defined in the stm32f2xx_sdio h file and contains the SDIO data parameters Data Fields DoclD 18540 Rev 1 453 634 Secure digital input output interface SDIO UM1061 22 2 22 2 1 454 634 uint32_t SDIO_DataTimeOut uint32_t SDIO_DataLength uint32_t SDIO_DataBlockSize uint32_t SDIO_TransferDir uint32_t SDIO_TransferMode uint32_t SDIO_DPSM Field Documentation e Uuint32 t SDIO DatalnitTypeDef SDIO DataTimeOut Specifies the data timeout period in card bus clock periods e uint32 t SDIO DatalnitTypeDef SDIO DataLength Specifies the numb
448. itive The value sign is positive CalibSign Negative The value sign is negative e Value value of coarse calibration expressed in ppm coded on 5 bits Return values An ErrorStatus enumeration value SUCCESS RTC Coarse calibration are initialized ERROR RTC Coarse calibration are not initialized Notes e This Calibration value should be between 0 63 when using negative sign with a 2 ppm step e This Calibration value should be between 0 126 when using positive sign with a 4 ppm step 21 2 17 2 RTC CoarseCalibCmd Function Name ErrorStatus RTC CoarseCalibCmd FunctionalState NewState Function Description Enables or disables the Coarse calibration process Parameters NewState new state of the Coarse calibration This parameter can be ENABLE or DISABLE Return values An ErrorStatus enumeration value SUCCESS RTC Coarse calibration are enabled disabled ERROR RTC Coarse calibration are not enabled disabled Notes e None 21 2 17 3 RTC_CalibOutputCmd 3 Function void CalibOutputCmd FunctionalState NewState Function Description Enables or disables the RTC clock to be output through the relative pin 18540 Rev 1 437 634 Real time clock RTC UM1061 21 2 18 21 2 18 1 21 2 18 2 438 634 Parameters Return values Notes NewState new state of the digital calibration Output This parameter can be ENABLE or DISABLE None None TimeSta
449. itude 2 1 0 00000100 Select max triangle amplitude of 3 define DAC TriangleAmplitude 7 uint32 1 0 00000200 Select max triangle amplitude of 7 e didefine DAC TriangleAmplitude 15 uint32 1 0 00000300 Select max triangle amplitude of 15 e DAC TriangleAmplitude 31 uint32 t 0x00000400 Select max triangle amplitude of 31 e define DAC TriangleAmplitude 63 uint32 1 0 00000500 Select max triangle amplitude of 63 define DAC TriangleAmplitude 127 uint32 1 0x00000600 Select max triangle amplitude of 127 e iidefine DAC TriangleAmplitude 255 uint32 1 0x00000700 Select max triangle amplitude of 255 DocID 18540 Rev 1 163 634 Digital to analog converter DAC UM1061 164 634 e define DAC_TriangleAmplitude_511 uint32_t 0x00000800 Select max triangle amplitude of 511 e define DAC TriangleAmplitude 1023 uint32 1 0x00000900 Select max triangle amplitude of 1023 e ddefine DAC TriangleAmplitude 2047 uint32 t 0x00000A00 Select max triangle amplitude of 2047 e define DAC TriangleAmplitude 4095 uint32 t 0Ox00000B00 Select max triangle amplitude of 4095 DAC output buffer e define DAC OutputBuffer Enable uint32 t 0x00000000 e define DAC OutputBuffer Disable uint32 t 0x00000002 DAC trigger selection e define DAC Trigger None uint32 t 0x00000000 Conversion is automatic once the DAC 1_DHRxxxx register has been loaded not by external trigge
450. ity 4 bits for subpriority e define NVIC PriorityGroup 1 uint32 t 0x600 1 bits for pre emption priority 3 bits for subpriority e define NVIC PriorityGroup 2 uint32 t 0x500 2 bits for pre emption priority 2 bits for subpriority e define NVIC PriorityGroup 3 uint32 t 0x400 3 bits for pre emption priority 1 bits for subpriority e define NVIC PriorityGroup 4 uint32 t 0x300 4 bits for pre emption priority O bits for subpriority MISC System Low Power e dsidefine NVIC SEVONPEND uint8 1 0 10 e sidefine NVIC SLEEPDEEP uint8 1 0 04 e didefine NVIC SLEEPONEXIT uint8 1 0 02 MISC SysTick clock source e define SysTick CLKSource HCLK Div8 uint32 t OXFFFFFFFB e define SysTick CLKSource HCLK uint32 1 0 00000004 MISC Vector Table Base e NVIC VectTab RAM uint32 1 0 20000000 e define NVIC VectTab FLASH uint32 1 0 08000000 Interrupt Programming Example The example below explains step by step how to configure and manage the peripheral interrupt this program generates an interrupt each time a byte is received by the USART3 For more examples about misc c driver usage please refer to the NVIC and SysTick examples provided within the STM32F2xx Standard Peripheral Library package under Projects TM32F2xx StdPeriph Examples How to proceed Copy the code below to main c file 5 wan UTI Wa na aa ea ma aa a aa aa aa finclude stm32f2xx h
451. iver defines TIM TIM AOE Bit Set Reset e AutomaticOutput Enable uint16 t 0x4000 e define AutomaticOutput Disable uint16 0 0000 TIM Break Input enable disable e define TIM Break Enable uint16 1 0x1000 e define TIM Break Disable uint16 t 0x0000 TIM Break Polarity e define BreakPolarity Low uint16 1 0x0000 e BreakPolarity High uint16 1 0 2000 TIM Capture Compare N State e define CCxN Enable uint16 1 0x0004 DoclD 18540 Rev 1 4 UM1061 General purpose timers TIM 3 e define CCxN Disable uint16 1 0x0000 TIM Capture Compare State e define Enable uint16 1 0 0001 e define CCx Disable uint16 0 0000 TIM Channel e didefine TIM Channel 1 uint16 1 0x0000 e TIM Channel 2 uint16 t 0x0004 e define TIM Channel 3 uint16 1 0x0008 e TIM Channel 4 uint16 t 0x000C TIM Clock Division CKD e didefine DilV1 uint16 1 0 0000 e DlV2 uint16 1 0 0100 e define DlV4 uint16 1 0 0200 TIM Counter Mode e define TIM CounterMode Up uint16 1 0x0000 DocID 18540 Rev 1 569 634 General purpose timers TIM UM1061 570 634 e define e define e define e define TIM CounterMode Down uint16 1 0x0010 CounterMode CenterAligned1 uint16 1 0 0020 TIM Counte
452. ize e uint32 t DMA InitTypeDef DMA MemoryDataSize Specifies the Memory data width This parameter can be a value of DMA_memory_data_size e uint32 t DMA_InitTypeDef DMA_Mode Specifies the operation mode of the DMAy Streamx This parameter can be a value of DMA circular normal mode e uint32 t DMA InitTypeDef DMA Priority Specifies the software priority for the Streamx This parameter can be a value of DMA priority level e uint32 t DMA InitTypeDef DMA FIFOMode Specifies if the FIFO mode or Direct mode will be used for the specified Stream This parameter can be a value of DMA fifo direct mode e uint32 t DMA InitTypeDef DMA FIFOThreshold Specifies the FIFO threshold level This parameter can be a value of DMA fifo threshold level e 32 t DMA InitTypeDef DMA MemoryBurst Specifies the Burst transfer configuration for the memory transfers It specifies the amount of data to be transferred in a single non interruptable transaction This parameter can be a value of DMA memory burst e Uuint32 t InitTypeDef DMA PeripheralBurst Specifies the Burst transfer configuration for the peripheral transfers lt specifies the amount of data to be transferred in a single non interruptable transaction This parameter be a value DMA peripheral burst 10 2 DMA Firmware driver API description The following section lists the various functions of the DMA library 10 2 1 How to use this driver 3 1
453. k This parameter can be any combination of the following values RCC_AHB1Periph_GPIOA GPIOA clock RCC_AHB1Periph_GPIOB GPIOB clock RCC_AHB1Periph_GPIOC GPIOC clock RCC_AHB1Periph_GPIOD GPIOD clock RCC_AHB1Periph_GPIOE GPIOE clock RCC_AHB1Periph_GPIOF GPIOF clock RCC_AHB1Periph_GPIOG GPIOG clock RCC_AHB1Periph_GPIOG GPIOG clock RCC_AHB1Periph_GPIOI GPIOI clock RCC_AHB1Periph_CRC CRC clock AHBiPeriph BKPSRAM BKPSRAM interface DocID 18540 Rev 1 Gr UM1061 Reset and clock control RCC Return values Notes clock RCC_AHB1Periph_DMAT1 clock RCC_AHB1Periph_DMA2 clock 1 Ethernet MAC clock 1 Ethernet Transmission clock RCC_AHB1Periph_ETH_MAC_Rx Ethernet Reception clock AHBiPeriph ETH MAC Ethernet clock AHBiPeriph OTG HS USB OTG HS clock AHBiPeriph OTG HS ULPI USB OTG HS ULPI clock NewState new state of the specified peripheral clock This parameter can be ENABLE or DISABLE None Peripheral clock gating in SLEEP mode can be used to further reduce power consumption After wakeup from SLEEP mode the peripheral clock is enabled again By default all peripheral clocks are enabled during SLEEP mode 19 2 8 16 RCC AHB2PeriphClockLPModeCmd 4 Function Name Function Description
454. l Parameters e TIMx where x can be 1 2 3 4 5 8 to select the TIM peripheral e TIM ForcedAction specifies the forced Action to be set to the output waveform This parameter can be one of the following values ForcedAction Active Force active level 538 634 DoclD 18540 Rev 1 ITA UM1061 General purpose timers TIM OC3REF TIM ForcedAction InActive Force inactive level on OC3REF Return values None Notes None 25 2 10 14 TIM ForcedOC4Config Function Name void TIM_ForcedOC4Config TIM TypeDef TIMx uint16 t TIM ForcedAction Function Description Forces the TIMx output 4 waveform to active or inactive level Parameters e TIMx where x be 1 2 3 4 5 or 8 to select the TIM peripheral e ForcedAction specifies the forced Action to be set to the output waveform This parameter can be one of the following values ForcedAction Active Force active level on OCAREF TIM_ForcedAction_InActive Force inactive level on OC4REF Return values e None Notes e None 25 2 10 15 TIM_OC1PreloadConfig Function Name void TIM_OC1PreloadConfig T M_TypeDef TIMx uint16_t TIM_OCPreload Function Description Enables or disables the TIMx peripheral Preload register on CCR1 Parameters e TIMx where x can be 1 to 14 except 7 to select the TIM peripheral e TIM OCPreload new state of the TIMx peripheral Preload register This parameter can be one of the fol
455. lD 18540 Rev 1 43 634 4 How to use and customize the library UM1061 2 5 44 634 STM32F2xx programming model using the library This chapter contains useful general information for using the library to develop application based on STM32F2xx devices It describes in details the sequence to use a peripheral from the configuration of the system to the configuration of the peripheral registers After reset the device is running from Internal High Speed oscillator HSI 16MHz with 0 Flash wait state Flash prefect buffer D Cache I Cache disabled and all peripherals off except internal SRAM Flash and JTAG There is no prescaler on High speed AHB and Low speed APB buses All the peripherals mapped on these buses are running at HSI speed The clock for all peripherals is switched off except for SRAM and FLASH All GPIOs are in input floating state except for pins which are assigned to debug Once the device started from reset the user application has to configure the system clock and all peripheral hardware resources GPIO Interrupt DMA Figure 8 STM32F2xx programming model using the library Start from Reset Configure the system clock Using system stm32f2xx c Enable the clock for the peripheral s to be used Using stm32f2xx rcc c Configure the peripheral s GPIOs Using stm32f2xx gpio c Configure the peripheral in the desired mode Using stm32f2xx stm32f2xx dma cfor config mis
456. l_3 uint16_t 0x0300 TIM_Master_Slave_Mode e define MasterSlaveMode Enable uint16 1 0x0080 e didefine MasterSlaveMode Disable uint16 1 0x0000 TIM One Pulse Mode e define OPMode Single uint16 t 0x0008 e define TIM OPMode Repetitive uint16 1 0 0000 TIM OSSI Off State Selection for Idle mode state e define OSSIState Enable uint16 1 0 0400 e didefine OSSIState Disable uint16 t 0x0000 TIM OSSR Off State Selection for Run mode state e define TIM OSSRSIate Enable uint16 1 0x0800 e didefine OSSRSIate Disable uint16 1 0x0000 TIM Output Compare and PWM modes e define OCMode Timing uint16 1 0x0000 DocID 18540 Rev 1 581 634 General purpose timers TIM UM1061 e define OCMode Active uint16 1 0x0010 e define OCMode Inactive uint16 1 0x0020 e define OCMode Toggle uint16 1 0x0030 e OCMode 16 1 0 0060 e define OCMode PWM2 uint16 t 0x0070 TIM Output Compare Clear State e didefine OCClear Enable uint16 t 0x0080 e didefine OCClear Disable uint16 t 0x0000 TIM Output Compare Fast State e didefine TIM OCFast Enable uint16 1 0 0004 e didefine TIM OCFast Disable uint16 1 0x0000 TIM Output Compare Idle State e define OCIdleState Set uint16 1 0 0100 e define OCIdleState Reset uint16 t 0x0000 582 63
457. lag uint8 t RNG FLAG Clears the RNG flags RNG FLAG specifies the flag to clear This parameter can be any combination of the following values RNG FLAG Clock Error Current flag RNG FLAG SECS Seed Error Current flag None RNG FLAG DRDY can not be cleared ClearFlag function This flag is cleared only by reading the Random number data using GetRandomNumber function DoclD 18540 Rev 1 407 634 Random number generator RNG UM1061 20 2 7 4 20 2 7 5 20 3 20 3 1 408 634 RNG GetiTStatus Function Name ITStatus RNG GetiTStatus uint8_t RNG IT Function Description Checks whether the specified RNG interrupt has occurred or not Parameters RNG IT specifies the RNG interrupt source to check This parameter can be one of the following values CEI Clock Error Interrupt IT SEI Seed Error Interrupt Return values The new state of RNG IT SET or RESET Notes None RNG_ClearlTPendingBit Function Name void ClearlTPendingBit uint8 t RNG Function Description Clears the RNG interrupt pending bit s Parameters e RNG specifies the RNG interrupt pending bit s to clear This parameter can be any combination of the following values IT CEI Clock Error Interrupt A RNG SEI Seed Error Interrupt Return values None Notes None RNG Firmware driver defines RNG Firmware driver
458. larmMask None uint32 1 0x00000000 e define RTC AlarmMask DateWeekDay uint32 1 0x80000000 e define RTC AlarmMask Hours uint32 1 0x00800000 e define RTC AlarmMask Minutes uint32 0 00008000 e didefine RTC AlarmMask Seconds uint32 1 0 00000080 e define RTC AlarmMask All uint32 1 0x80808080 RTC Alarms Definitions e define RTC Alarm A uint32 1 0 00000100 DocID 18540 Rev 1 4 UM1061 Real time clock RTC 3 e RTC_Alarm_B uint32_t 0x00000200 RTC AM PM Definitions e define RTC H12 AM uint8 t 0x00 e didefine RTC H12 PM uint8 t 0x40 RTC Backup Registers Definitions e define DRO uint32 1 0 00000000 e define DR1 uint32 1 0 00000001 e define DR2 uint32 1 0 00000002 e define DRS3 uint32 1 0 00000003 e iidefine DR4 uint32 1 0 00000004 e define DRb5 uint32 1 0 00000005 e define RTC DRO uint32 1 0 00000006 e define DR7 uint32 1 0 00000007 DocID 18540 Rev 1 441 634 Real time clock RTC UM1061 442 634 define define define define define define define define define define define define RTC DR8f uint32 1 0 00000008 RTC_BKP_DR9 uint32_t Ox00000009 RTC_BKP_DR10 uint32_t Ox0000000A RTC_BKP_DR11 uint32_t Ox0000000B RTC_BKP_
459. le this channel using TIM_CCxCmd functions void TIM_SetCompare1 TIM TypeDef uint32 t 1 Sets the TIMx Capture Compare1 Register value TIMx where x can be 1 to 14 except 6 and 7 to select the TIM peripheral Compare1 specifies the Capture Compare1 register new value None None void TIM SetCompare2 TIM TypeDef uint32 t Compare2 Sets the TIMx Capture Compare2 Register value TIMx where x can be 1 2 3 4 5 8 9 or 12 to select the TIM peripheral Compare2 specifies the Capture Compare2 register new value None None DoclID 18540 Rev 1 UM1061 General purpose timers TIM 25 2 10 9 TIM SetCompare3 Function Name void TIM SetCompare3 TIM TypeDef TIMx uint32 t Compare3 Function Description Sets the TIMx Capture Compare3 Register value Parameters e TIMx where x can 1 2 3 4 5 or 8 to select the TIM peripheral e Compare specifies the Capture Compare3 register new value Return values e None Notes e None 25 2 10 10 TIM_SetCompare4 Function Name void TIM_SetCompare4 T M_TypeDef TIMx uint32_t Compare4 Function Description Sets the TIMx Capture Compare4 Register value Parameters e TIMx where x be 1 2 3 4 5 or 8 to select the TIM peripheral e Compare4 specifies the Capture Compare4 register new value Return values e None Notes e None 25 2 10 11 TIM_ForcedOC1Confi
460. le time equal to 84 cycles ADC SampleTime 112Cycles Sample time equal to 112 cycles ADC SampleTime 144Cycles Sample time equal to 144 cycles SampleTime 480Cycles Sample time equal to 480 cycles None None InjectedSequencerLengthConfig Function Name void InjectedSequencerLengthConfig TypeDef ADCx uint8 t Length Function Description Configures the sequencer length for injected channels Parameters e Return values Notes ADCx where x be 1 2 to select the ADC peripheral Length The sequencer length This parameter must be a number between 1 and 4 None None DoclID 18540 Rev 1 69 634 Analog to digital converter ADC UM1061 3 2 9 3 ADC SetinjectedOffset Function Name void ADC SetinjectedOffset ADC_TypeDef ADCx uint8 t ADC_InjectedChannel uint16_t Offset Function Description Set the injected channels conversion value offset Parameters e ADCx where x be 1 2 or 3 to select the ADC peripheral e ADC InjectedChannel the ADC injected channel to set its offset This parameter can be one of the following values ADC InjectedChannel 1 Injected Channel1 selected InjectedChannel 2 Injected Channel2 selected ADC InjectedChannel 3 Injected Channel3 selected InjectedChannel 4 Injected Channel4 selected e Offset the offset value for the selected ADC injected channel This parameter must b
461. lect the DMA and x can be 0 to 7 to select the DMA Stream e NewState new state of the DMAy Streamx This parameter can be ENABLE or DISABLE e This function may be used to perform Pause Resume operation When a transfer is ongoing calling this function to disable the Stream will cause the transfer to be paused All configuration registers and the number of remaining data will be preserved When calling again this function to re enable the Stream the transfer will be resumed from the point where it was paused e After configuring the DMA Stream DMA_Init function and enabling the stream it is recommended to check or wait until the DMA Stream is effectively enabled A Stream may remain disabled if a configuration parameter is wrong After disabling a DMA Stream it is also recommended to check or wait until the DMA Stream is effectively disabled If a Stream is disabled while a data transfer is ongoing the current data will be transferred and the Stream will be effectively disabled only after the transfer of this single data is finished DoclD 18540 Rev 1 195 634 DMA controller DMA UM1061 10 2 4 5 DMA _PeriphIncOffsetSizeConfig Function Name void DMA_PeriphincOffsetSizeConfig Stream TypeDef DMAy Streamx uint32 t DMA_Pincos Function Description Configures when the PINC Peripheral Increment address mode bit is set if the peripheral address should be incremented with the data size configu
462. lectCOM TIM CCPreloadControl Interrupts DMA and flags management ITConfig GenerateEvent TIM_GetFlagStatus TIM_ClearFlag TIM GetlTStatus TIM ClearlTPendingBit TIM DMAConfig TIM TIM SelectCCDMA Clocks management TIM InternalClockConfig TIM ITRxExternalClockConfig TixExternalClockConfig ETRClockModet1 Config TIM ETRClockMode2Config Synchronization management Case of two several Timers 1 2 Configure the Master Timers using the following functions void SelectOutputTrigger TIM TypeDef TIMx uint6 t TIM TRGOSource void TIM SelectMasterSlaveMode TIM TypeDef TIMx uint16 t TIM MasterSlaveMode Configure the Slave Timers using the following functions DocID 18540 Rev 1 4 UM1061 General purpose timers TIM 25 2 8 25 2 9 25 2 9 1 25 2 9 2 ky void TIM_SelectInputTrigger TIM_TypeDef uint16_t TIM_InputTriggerSource void TIM_SelectSlaveMode TIM_TypeDef TIMx uint16 t TIM SlaveMode Case of Timers and external trigger ETR pin 1 Configure the External trigger using the function void ETRConfig TIM TypeDef uint6 t ExtTRGPrescaler uint16 t ExtTRGPolarity uint16 t ExtTRGFilter 2 Configure the Slave Timers using the following functions void SelectlnputTrigger TIM TypeDef TIMx uint16 t TIM InputTriggerSource void TIM SelectSlaveMode TI
463. les or disables the Instruction Cache feature Parameters e NewState new state of the Instruction Cache This parameter can be ENABLE or DISABLE Return values e None Notes e None 12 2 6 4 FLASH DataCacheCmd Function Name void FLASH DataCacheCmd FunctionalState NewState Function Description Enables or disables the Data Cache feature Parameters e NewState new state of the Data Cache This parameter can be ENABLE or DISABLE Return values e None Notes e None 12 2 6 5 230 634 FLASH InstructionCacheReset DoclD 18540 Rev 1 4 UM1061 FLASH Memory FLASH Function Name Function Description Parameters Return values Notes void FLASH_InstructionCacheReset void Resets the Instruction Cache None None e This function must be used only when the Instruction Cache is disabled 12 2 6 6 FLASH_DataCacheReset Function Name Function Description Parameters Return values Notes void FLASH_DataCacheReset void Resets the Data Cache None None e This function must be used only when the Data Cache is disabled 12 2 7 FLASH memory programming functions 12 2 7 1 FLASH Unlock Function Name Function Description Parameters Return values Notes 12 2 7 2 FLASH Lock 4 void FLASH Unlock void Unlocks the FLASH control register access e None e None e None DociD 18540 Rev 1 231 634 FLASH Memory FLASH UM1061 12 2 7 3 12 2 7 4 232 634
464. lid bits number using HASH SetLastWordValidBitsNbr start digest calculation using HASH StartDigest Get the Digest message using HASH_GetDigest The message digest functions are the following HASH_SetLastWordValidBitsNbr HASH Dataln HASH_GetinFlFOWordsNbr HASH_GetDigesi DocID 18540 Rev 1 295 634 Hash processor HASH UM1061 15 2 4 15 2 5 15 2 6 296 634 Context swapping This section provides functions allowing to save and store HASH Context It is possible to interrupt HASH HMAC process to perform another processing with a higher priority and to complete the interrupted process later on when the higher priority task is complete To do so the context of the interrupted task must be saved from the HASH registers to memory and then be restored from memory to the HASH registers e To save the current context use HASH SaveContext function To restore the saved context use HASH_RestoreContext function e HASH_SaveConiext e HASH_RestoreContext Initialization and configuration This section provides functions allowing to Initialize the HASH peripheral Configure the HASH Processor MD5 SHA1 HASH HMAC datatype HMAC Key if mode HMAC Reset the HASH Processor The initialization and configuration functions are the following HASH Delnit HASH Init HASH Siructlnit HASH_Reset Interrupt and flag management This section provid
465. ll STM32F2xx peripheral registers and bits as well as memory mapping The advantage of this approach if that the code produced is compact and efficient The drawback is that the developer should know in details the peripheral operation registers and bits meaning and the configuration procedure This task is time consuming and might lead to programming errors which may slow down the project development phase To use this model poceed as follows 1 Comment the line Zdefine USE STDPERIPH DRIVER in stm32f2xx h file Make sure that this define statement is not defined in the compiler preprocessor section 2 Use peripheral registers structure and bits definition available within stm32f2xx h to build the application Peripheral driver access In this model the application code uses the peripheral driver API to control the peripheral configuration and operation It allows any device to be used in the user application without the need for in depth study of each peripheral specification As a result using the peripheral drivers saves significant time that would otherwise be spent in coding while reducing the application development and integration cost However since the drivers are generic and cover all peripherals functionalities the size and or execution speed of the application code may not be optimized To use this model proceed as follows 1 Add the line define USE STDPERIPH DRIVER in the compiler preprocessor section or uncomment
466. lnitTypeDef structure that contains the configuration information for All ADCs peripherals Return values Notes None 3 2 4 5 ADC Function Name void CommonStructlnit ADC CommonlnitTypeDef ADC CommonlnitStruct Function Description Fills each ADC CommonlnitStruct member with its default value Parameters e CommonlnitStruct pointer to an ADC CommonlnitTypeDef structure which will be initialized Return values e None Notes e None 3 2 46 ADC Function Name void ADC Cmd ADC TypeDef ADCx FunctionalState NewState Function Description Enables or disables the specified ADC peripheral Parameters e ADCx where x can be 1 2 or 3 to select the ADC peripheral e NewState new state of the ADCx peripheral This 3 18540 Rev 1 59 634 Analog to digital converter ADC UM1061 parameter can be ENABLE or DISABLE Return values e None Notes e None 3 2 5 Analog Watchdog configuration functions 3 2 5 1 ADC_AnalogWatchdogCmd Function Name void ADC_AnalogWatchdogCmd ADC_TypeDef ADCx uint32_t ADC_AnalogWatchdog Function Description Enables or disables the analog watchdog on single all regular or injected channels Parameters e ADCx where x be 1 2 or 3 to select the ADC peripheral e AnalogWatchdog the ADC analog watchdog configuration This parameter can be one of the following values ADC_AnalogWat
467. lowing values TIM OCPreload Enable TIM OCPreload Disable 4 DociD 18540 Rev 1 539 634 General purpose timers TIM UM1061 Return values Notes None None 25 2 10 16 TIM OC2PreloadConfig Function Name Function Description Parameters Return values Notes void TIM_OC2PreloadConfig TypeDef TIMx uint16 t TIM OCPreload Enables or disables the TIMx peripheral Preload register on CCR2 e TIMx where x be 1 2 3 4 5 8 9 or 12 to select the TIM peripheral e TIM OCPreload new state of the TIMx peripheral Preload register This parameter can be one of the following values TIM OCPreload Enable TIM OCPreload Disable None None 25 2 10 17 TIM OC3PreloadConfig 540 634 Function Name Function Description Parameters Return values Notes void TIM_OC3PreloadConfig T M_TypeDef TIMx uint16 t TIM_OCPreload Enables or disables the TIMx peripheral Preload register on CCR3 e TIMx where x be 1 2 3 4 5 or 8 to select the TIM peripheral e TIM OCPreload new state of the TIMx peripheral Preload register This parameter can be one of the following values TIM OCPreload Enable TIM OCPreload Disable None None DociD 18540 Rev 1 4 UM1061 General purpose timers TIM 25 2 10 18 TIM_OC4PreloadConfig Function Name void TIM OC4PreloadConfig TypeDef uint16_t TIM_OCP
468. lt value Parameters FSMC_NORSRAMIhnitStruct pointer to a FSMC_NORSRAMInitTypeDef structure which will be initialized Return values e None Notes e None FSMC_NORSRAMCmd Function Name void FSMC_NORSRAMCmd uint32 t FSMC_Bank FunctionalState NewState Function Description Enables or disables the specified NOR SRAM Memory Bank Parameters e Bank specifies the FSMC Bank to be used This parameter can be one of the following values FSMC_Bank1_NORSRAM1 FSMC Banki NOR SRAM1 FSMC_Bank1_NORSRAM2 FSMC Banki NOR SRAM2 FSMC_Bank1_NORSRAM3 FSMC Banki NOR SRAM3 DoclD 18540 Rev 1 UM1061 Flexible static memory controller FSMC FSMC_Bank1_NORSRAM4 FSMC Banki NOR SRAM4 e NewState new state of the FSMC_Bank This parameter can be ENABLE or DISABLE Return values e None Notes e None 13 2 6 NAND controller functions 13 2 61 FSMC NANDDelnit Function Name void FSMC NANDDelnit uint32 t FSMC Bank Function Description Deinitializes the FSMC NAND Banks registers to their default reset values Parameters e Bank specifies the FSMC Bank to be used This parameter can be one of the following values FSMC 2 FSMC 2 FSMC Bank3 NAND FSMC Bank3 NAND Return values e None Notes e None 13 2 6 2 FSMC NANDInit Function Function Description Parameters Return values Notes void FSMC_NANDInit FSMC_NANDInitTypeDef FSM
469. m 6 GPIO Pim 78 GPIO 5 GPIO Moce GIO Moce CPTO Be GPIO Speecl CPTO GPIO ImitSceumctuce CLIO OWyoe OType PE GIPIQ GIS Pus GIPIO lue Us CEMO TMA CETO IE SPI configuration Fe ee HH HH HH HH HH HH HH I I NCC I ke ke ke ke x 508 634 DoclD 18540 Rev 1 ITA UM1061 Serial peripheral interface SPI 23 4 1 3 eu PIL haaa 2X 9462218 aoil 9X Naibu _BaudRatePr 2X 916220 Jii 2X SPILL ct 9 bo COME C 0 0 ar iar iar mp wr Gp ge I 90 wp 400 ge ep Tl Go SPI_Cmd SPI1 SEL ines FullDupl ure SPI Mode ure SPI Datas ure ure ure ure Caller 256 Hee SPL Wes SIME GIO PI CPHA PI NSS tul ENABLE 125 Programming Example PI CPOL tion PI Mode Master ize SPI Datasize slo SPI CPOL High SET PI Bit lynomial ucture Tg SPI wina MSS The example below provides a typical configuration of the 125 peripheral For more examples about 125 configuration and usage pl
470. m and read the SDIO IO Cards SDIO StartSDIOReadWait SDIO StopSDIOReadWait SDIO_SetSDIOReadWaitMode SDIO SetSDlOOperation SDIO SendSDlOSuspendCmdad CE ATA mode management functions This section provide functions allowing to program and read the CE ATA card SDIO CommandCompletionCmd SDIO_CEATAITCmd e SDIO_SendCEATACmd DMA transfers management functions This section provide functions allowing to program SDIO DMA transfer DocID 18540 Rev 1 4 UM1061 Secure digital input output interface SDIO SDIO_DMACmd 22 2 4 Interrupt and flag management SDIO ITConfig SDIO GetFlagStatus SDIO ClearFlag SDIO GetlTStatus SDIO ClearlTPendingBit 22 2 5 Initialization and configuration functions 22 2 5 41 SDIO_Delnit Function Name void SDIO Delnit void Function Description Deinitializes the SDIO peripheral registers to their default reset values Parameters e None Return values e None Notes e None 22 2 5 2 SDIO Init Function Name void SDIO Init SDIO InitTypeDef SDIO InitStruct Function Description Initializes the SDIO peripheral according to the specified parameters in the SDIO_InitStruct Parameters e 500 InitStruct pointer to a SDIO InitTypeDef structure that contains the configuration information for the SDIO peripheral Return values e None Notes e None 22 2 5 3 SDIO Structlnit 3 DoclD 18540 Rev 1 457 634 Secure digital input output i
471. manage the RTC Clock divided by 64 512 2 signal To output the RTC Clock on RTC AF1 pin use the RTC_CalibOutputCmd function Coarse Calibration configuration 1 Configure the RTC Coarse Calibration Value and the corresponding sign using the RTC CoarseCalibConfig function 2 Enable the RTC Coarse Calibration using the RTC_CoarseCalibCmd function TimeStamp configuration e Configure the RTC AF1 trigger and enables the RTC TimeStamp using the RTC_TimeStampCmd function e To read the TimeStamp Time and Date register use the RTC GetTimeStamp function The TAMPER alternate function can be mapped either to RTC AF1 PC13 AF2 PI8 depending on the value of TAMP1INSEL bit in RTC TAFCR register You can use the RTC TamperPinSelection function to select the corresponding pin Tamper configuration 1 Configure the RTC Tamper trigger using the RTC TamperConfig function 2 Enable the RTC Tamper using the function DocID 18540 Rev 1 4 UM1061 Real time clock RTC The TIMESTAMP alternate function can be mapped to either RTC_AF1 or RTC_AF2 depending on the value of the TSINSEL bit in the RTC_TAFCR register You can use the RTC_TimeStampPinSelection function to select the corresponding pin Backup Data Registers configuration e To write to the RTC Backup Data registers use the RTC_WriteBackupRegister function e To read the RTC Backup Data registers use the RT
472. mand Parameters e SDIO_RESP Specifies the SDIO response register This parameter can be one of the following values 5 1 Response Register 1 SDIO RESF2 Response Register 2 SDIO RESPS Response Register SDIO Response Register 4 Return values The Corresponding response register value Notes e None DoclD 18540 Rev 1 4 UM1061 Secure digital input output interface SDIO 22 2 7 Data path state machine DPSM management functions 22 2 7 1 SDIO_DataConfig Function Name void SDIO_DataConfig SD O_DataInitTypeDef SDIO DatalnitStruct Function Description Initializes the SDIO data path according to the specified parameters in the SDIO DatalnitStruct Parameters e 50 DatalnitStruct pointer to a SDIO DatalnitTypeDef structure that contains the configuration information for the SDIO command Return values e None Notes e None 22 27 2 SDIO DataStructlnit Function Name void SDIO DataStructlnit SDIO DatalnitTypeDef SDIO DatalnitStruct Function Description Fills each SDIO DatalnitStruct member with its default value Parameters e 50 DatalnitStruct pointer to an SDIO DatalnitTypeDef structure which will be initialized Return values e None Notes e None 22 2 7 3 SDIO GetDataCounter Function Name uint32 t SDIO GetDataCounter void Function Description Returns number of remaining data bytes to be transferred Parameters e None Return values Number of remaining
473. mat of the output parameters This parameter can be one of the following values RTC Format BIN Binary data format Format BCD BCD data format e RTC Alarm specifies the alarm to be read This parameter can be one of the following values Alarm to select Alarm RTC Alarm to select Alarm B e AlarmStruct pointer to a AlarmTypeDef structure that will contains the output alarm configuration values DoclD 18540 Rev 1 UM1061 Real time clock RTC Return values e None Notes e None 21 2 13 4 AlarmCmd Function Name ErrorStatus AlarmCmd uint32 t RTC Alarm FunctionalState NewState Function Description Enables or disables the specified RTC Alarm Parameters e RTC Alarm specifies the alarm to be configured This parameter can be any combination of the following values Alarm to select Alarm Alarm to select Alarm B e NewState new state of the specified alarm This parameter can be ENABLE or DISABLE Return values An ErrorStatus enumeration value SUCCESS RTC Alarm is enabled disabled ERROR RTC Alarm is not enabled disabled Notes e None 21 2 14 WakeUp Timer configuration functions 21 2 141 RTC WakeUpClockContig 3 void RTC_WakeUpClockConfig uint32_t RTC_WakeUpClock Function Description Configures the RTC Wakeup clock source Parameters RTC_WakeUpClock Wakeup Clock source T
474. mber Interrupt and flag management This section provides functions allowing to configure the RNG Interrupts and to get the status and clear flags and Interrupts pending bits The RNG provides 3 Flags and 3 Interrupts sources Flags RNG_FLAG_DRDY In the case of the RNG DR register contains valid random data it is cleared by reading the valid data using RNG_GetRandomNumber function RNG_FLAG_CECS In the case of a seed error detection RNG_FLAG_SECS In the case of a clock error detection Interrupts e if enabled an RNG interrupt is pending Inthe case of the DR register contains valid random data This interrupt source is cleared once the RNG DR register has been read using GetRandomNumber function until a new valid value is computed In the case of a seed error One of the following faulty seguences has been detected More than 64 consecutive bits at the same value 0 or 1 More than 32 consecutive alternance of 0 and 1 0101010101 01 This interrupt source is cleared using RNG ClearlTPendingBit RNG IT SEI function nthe case of a clock error the PLL48CLK RNG peripheral clock source was not correctly detected fPLL48CLK lt fHCLK 16 This interrupt source is cleared using ClearlTPendingBit RNG IT CEI function In this case User have to check that the clock controller is correctly configured to provide the RNG clock Managing the RNG controller eve
475. me Function Description Parameters Return values Notes void TypeDef TIMx FunctionalState NewSiate Enables or disables the specified TIM peripheral TIMx where x be 1 to 14 to select the TIMx peripheral NewState new state of the TIMx peripheral This parameter can be ENABLE or DISABLE None None 25 2 10 Output Compare management functions 25 2 10 1 TIM_OC1Init Function Name Function Description Parameters Return values Notes 25 2 10 2 OC2lnit Function Name void TIM_OC1Init TypeDef TIMx TIM_OCInitTypeDef OCInitStruct Initializes the Channel1 according to the specified parameters in the TIMx where x can be 1 to 14 except 6 and 7 to select the TIM peripheral OCInitStruct pointer to structure that contains the configuration information for the specified TIM peripheral None None void OC2lnit TypeDef TIM_OCInitTypeDef DociD 18540 Rev 1 533 634 General purpose timers TIM UM1061 Function Description Parameters Return values Notes 25 2 10 3 OC3lnit Function Name Function Description Parameters Return values Notes 25 2 10 4 TIM_OC4init Function Name Function Description Parameters 534 634 OCInitStruct Initializes the TIMx Channel2 acco
476. memory Writing to a word in the alias region has the same effect as a read modify write operation on the targeted bit in the bit band region All the STM32F2xx peripheral registers are mapped in a bit band region This feature is consequently intensively used in functions which perform single bit set reset in order to reduce and optimize code size The sections below describe how the bit band access is used in the Library Mapping formula The mapping formula shows how to link each word in the alias region to a corresponding target bit in the bit band region The mapping formula is given below bit word offset byte offset 32 oi number 4 bit word addr bit band bese r bit wana Oise where e bit word offsetis the position of the target bit in the bit band memory region e bit word addr is the address of the word in the alias memory region that maps to the targeted bit e bit band base is the starting address of the alias region e byte offsetis the number of the byte in the bit band region that contains the targeted bit e bit number is the bit position 0 7 of the targeted bit Example of implementation The following example shows how to map the PLLON 24 bit of RCC CR register in the alias region Peripheral base address in the alias region define PERIPH BASE uint32 t 0x40000000 Peripheral base address in the bit band region define PERIPH BB
477. meter can be a value between 0 and OxFF e uint32 t FSMC NAND PCCARDTiminglnitTypeDef FSMC WaitSetupTime Defines the minimum number of HCLK cycles to assert the command for NAND Flash read or write access to common Attribute or I O memory space depending on the memory space timing to be configured This parameter can be a number between 0x00 and OxFF e uint32 t FSMC_NAND_PCCARDTimingInitTypeDef FSMC_HoldSetupTime Defines the number of HCLK clock cycles to hold address and data for write access after the command deassertion for NAND Flash read or write access to common Attribute or memory space depending on the memory space timing to be configured This parameter can be a number between 0x00 and OxFF e uint32 t FSMC NAND PCCARDTiminglnitTypeDef FSMC HiZSetupTime Defines the number HCLK clock cycles during which the databus is in HiZ after the start of a NAND Flash write access to common Attribute or I O memory space depending on the memory space timing to be configured This parameter can be a number between 0x00 and OxFF 13 1 9 FSMC_NANDInitTypeDef 3 FSMC NANDInitTypeDef is defined in the stm32f2xx_fsmc h file and contains the common initialization parameters Data Fields uint32_t FSMC_Bank uint32_t FSMC_Waitfeature uint32_t FSMC_MemoryDataWidth uint32_t FSMC_ECC uint32_t FSMC_ECCPageSize uint32_t FSMC_TCLRSetupTime uint32_t FSMC_TARSetupTime FSMC_NAND_PCCARDTimingInitTypeDef FSMC_
478. mmunication is possible through the following procedure a Program the Baud rate Word length 8bits Stop bits 1bit Parity Mode transmitter or Mode receiver and hardware flow control values using the USART Init function Enable the USART using the USART_Cmd function Configures the break detection length using the USART_LINBreakDetectLengthConfig function Enable the LIN mode using the USART_LINCmd function In LIN mode the following bits must be kept cleared e CLKEN in the USART_CR2 register STOP 1 0 SCEN HDSEL and IREN in the USART register USART LINBreakDetectLengthConfig USART_LINCmd USART_SendBreak Halfduplex mode This subsection provides a set of functions allowing to manage the USART Half duplex communication The USART can be configured to follow a single wire half duplex protocol where the TX and lines are internally connected USART Half duplex communication is possible through the following procedure 1 2 3 4 Program the Baud rate Word length Stop bits Parity Mode transmitter or Mode receiver and hardware flow control values using the USART Init function Configures the USART address using the USART_SetAddress function Enable the USART using the USART_Cmd function Enable the half duplex mode using USART_HalfDuplexCmd function The RX pin is no longer used In Half duplex mode the following bits must be kept cleared e LINEN and CLKEN bits in
479. modes is possible only when the RTC clock source is LSE or LSI RTC Tamper and TimeStamp pin selection and Output Type Config configuration RTC_TamperPinSelection e RTC_TimeStampPinSelection RTC_OutputTypeConfig Interrupt and flag management All RTC interrupts are connected to the EXTI controller To enable the RTC Alarm interrupt the following sequence is required 1 Configure and enable the EXTI Line 17 in interrupt mode and select the rising edge sensitivity using the EXTI Init function 2 Configure and enable the RTC Alarm IRQ channel in the NVIC using the NVIC_Init function 3 Configure the RTC to generate RTC alarms Alarm A and or Alarm B using the SetAlarm AlarmCmd functions To enable the RTC Wakeup interrupt the following sequence is required 1 Configure and enable the EXTI Line 22 in interrupt mode and select the rising edge sensitivity using the EXTI Init function 2 Configure and enable the RTC WKUP IRQ channel in the NVIC using the function 3 Configure the RTC to generate the RTC wakeup timer event using the RTC_WakeUpClockConfig RTC_SetWakeUpCounter RTC_WakeUpCmd functions To enable the RTC Tamper interrupt the following sequence is required 1 Configure and enable the EXTI Line 21 in interrupt mode and select the rising edge sensitivity using the EXTI Init function 2 Configure and enable the TAMP STAMP IRQ channel in the
480. mp configuration functions RTC_TimeStampCmd Function Name void uint32_t RTC_TimeStampEdge FunctionalState NewState Function Description Enables or Disables the RTC TimeStamp functionality with the specified time stamp pin stimulating edge Parameters e TimeStampEdge Specifies the pin edge on which the TimeStamp is activated This parameter can be one of the following RTC TimeStampEdge Rising the Time stamp event occurs on the rising edge of the related pin RTC TimeStampEdge Falling the Time stamp event occurs on the falling edge of the related pin e NewState new state of the TimeStamp This parameter can be ENABLE or DISABLE Return values e None Notes e None RTC GetTimeStamp Function Name void RTC GetTimeStamp uint32 t RTC Format RTC TimeTypeDef RTC StampTimeStruct RTC DateTypeDef RTC StampDateStruct Function Description Get the RTC TimeStamp value and masks Parameters Format specifies the format of the output parameters This parameter can be one of the following values RTC Format BIN Binary data format Format BCD BCD data format RTC StampTimeStruct pointer to a RTC TimeTypeDef DocID 18540 Rev 1 LY UM1061 Real time clock RTC structure that will contains the TimeStamp time values e RTC_StampDateStruct pointer toa RTC_DateTypeDef structure that will contains the TimeStamp date values Return values e None
481. n 218 1124 EX Teatur S ce e tne 218 11 2 2 How to use this 218 11 2 3 Initialization and configuration 218 11 24 Interrupt and flag management 219 11 2 5 Initialization and configuration 219 11 2 6 Interrupt and flag management 220 da EXT Firmware driver eerie t arn 222 11 3 1 EXTI Firmware driver 222 114 EXTI Programming 224 12 FLASH Memory 2 1 22 2 1 225 12 1 FLASH Firmware driver registers structures 225 12 1 1 FLASH TypeDef 225 12 2 FLASH Firmware driver 225 12 2 1 How to use this 225 12 2 2 FLASH interface configuration 226 12 2 3 FLASH memory 1 227 12 2 4 Option bytes programming sse 228 6 634 DoclD 18540 Rev 1 Gr UM1061 Contents 12 2 5 Interrupt and flag management 229 12 26 FLASH interface configuration
482. n This section describes step by step how to initialize and configure a peripheral The peripheral is referred to as PPP Before configuring a peripheral its clock must be enabled by calling one of the following functions AHBlPeriphClockCmd RCC AHBlPeriph PPPx ENA AHB2PeriphClockCmd RCC AHB2Periph PPPx ENA AHB3PeriphClockCmd RCC AHB3Periph PPPx ENA APB2PeriphClockCmd RCC APB2Periph ENA REC APBI Perilpheloekemd REG APBI Periph ENA luv lus lus w eal fea re YH HY 1 Inthe main application file declare PPP_InitTypeDef structure for example PPP Imiltlyes Der PPP luitStiuetuse The PPP_InitStructure is a working variable located in data memory area It allows to initialize one or more PPP instances 2 Fill the PPP InitStructure variable with the allowed values of the structure member Two solutions are possible a Configure the whole structure by following the procedure described below PPP ImilcStcucruce memberi valis PPP ImLcSecucrure member2 wel2p PPP where is the number of the structure members The previous initialization step can be merged in one single line to optimize the code size PPP InittypeDet PPP ImiiStiweture wall wal2 cc b Configure only a few members of the structure i
483. n uint16 1125 InitTypeDef I28 Mode Specifies the 125 operating mode This parameter can be a value of 25 Mode uint16 1125 25 Standard Specifies the standard used for the 125 communication This parameter can be a value of 25 Mode uint16 1125 InitTypeDef I2S8 DataFormat Specifies the data format for the 25 communication This parameter can be a value of 25 Data Format uint16 1125 InitTypeDef 28 Specifies whether the 25 MCLK output is enabled or This parameter can be a value of 25 uint32_t 12S_InitTypeDef I2S_AudioFreq Specifies the frequency selected for the 12S communication This parameter can be a value of 25 Audio Frequency uint16 1125 InitTypeDef I28 CPOL Specifies the idle state of the 125 clock This parameter be value of 125 Clock Polarity DocID 18540 Rev 1 483 634 Serial peripheral interface SPI UM1061 23 2 23 2 1 484 634 SPI Firmware driver API description The following section lists the various functions of the SPI library How to use this driver co ON Enable peripheral clock using the following functions RCC_APB2PeriphClockCmd RCC_APB2Periph_SPI1 ENABLE for SPH RCC_APB1PeriphClockCmd RCC_APB1Periph_SPI2 ENABLE for SPI2 RCC_APB1PeriphResetCmd RCC_APB1Periph_SPI3 ENABLE for Enable SCK MOSI MISO and NSS GPIO clocks using RCC_AHB1PeriphClockCmd functio
484. n lp ADE Lime CADE eile ADC1 regular channell4 configuration Enable Enable Enable ADC_RegularChannelConfig ADC1 ADC Channel 14 1 ADC SampoleTime SCyeles 5 DMA request after last transfer Single ADC mode ADC_DMARequestAfterLastTransferCmd ADC1 ENABLE ADCI S DMA interface lt DMACmd ADC1 ENABLE wA ADC ENABLE Start ADC1 Software Conversion ADC SoftwareStartConv ADCl DoclD 18540 Rev 1 89 634 Controller area network CAN UM1061 4 4 1 4 1 1 90 634 Controller area network CAN CAN Firmware driver registers structures CAN_TxMailBox_TypeDef CAN TxMailBox TypeDef is defined in the stm32f2xx h Data Fields e _ 32 t TIR e Ouint32_t TDTR e 32 t TDLR e JOuint32 t TDHR Field Documentation e JOuint32_t CAN TxMailBox TypeDef TIR CAN TX mailbox identifier register JOuint32_t CAN_TxMailBox_TypeDef TDTR CAN mailbox data length control and time stamp register e _ JO uint32_t CAN_TxMailBox_TypeDef TDLR mailbox data low register e _ JOuint32_t CAN_TxMailBox_TypeDef TDHR CAN mailbox data high register CAN_FIFOMailBox_TypeDef CAN FIFOMailBox TypeDef is defined in the stm32f2xx h Data Fields 10 uint32 t RIR 10 uint32 t RDTR 10 uint32 t RDLR 10 uint32 t RDHR
485. n In 125 mode if an external clock source is used then the I2S CKIN pin GPIO clock should also be enabled Peripherals alternate function Connect the pin to the desired peripherals Alternate Function AF using GPIO PinAFConfig function Configure the desired pin in alternate function by GPIO_InitStruct gt GPIO_Mode GPIO Mode AF Select the type pull up pull down and output speed via GPIO PuPd GPIO and GPIO Speed members A Call GPIO_Init function In 125 mode if an external clock source is used then the 125 CKIN pin should be also configured in Alternate function Push pull pull up mode Program the Polarity Phase First Data Baud Rate Prescaler Slave Management Peripheral Mode and CRC Polynomial values using the SPI Init function In 125 mode program the Mode Standard Data Format MCLK Output Audio frequency and Polarity using 125 Init function For 125 mode make sure that either 125 PLL is configured using the functions I2SCLKConfig RCC 125261 PLLI2S RCC PLLI2SCmd ENABLE and RCC GetFlagStatus RCOC FLAG PLLI2SRDY Or that external clock source is configured using the function I2SCLKConfig RCC I282CLKSource Ext and after setting correctly the define constant 25 EXTERNAL CLOCK VAL in the stm32f2xx_conf h file Enable the and the corresponding interrupt using the function SPI ITConfig if you need to use interrupt mode When using the D
486. n Name void GPIO Write GPIO_TypeDef GPIOx uint16_t PortVal Function Description Writes data to the specified GPIO data port Parameters e GPIOx where x be to select the GPIO peripheral e PortVal specifies the value to be written to the port output data register Return values None Notes None GPIO ToggleBits Function Name void GPIO_ToggleBits GPIO_TypeDef GPIOx uint16_t GPIO_Pin Function Description Toggles the specified GPIO pins Parameters e GPIOx where x be to select the GPIO peripheral e Pin Specifies the pins to be toggled Return values e None Notes e None GPIO Alternate functions configuration function GPIO_PinAFConfig Function Name void GPIO PinAFConfig GPIO_TypeDef GPIOx uint16_t GPIO PinSource uint8 t GPIO AF Function Description Changes the mapping of the specified pin Parameters e GPIOx where x be to select the GPIO peripheral e PinSource specifies the pin for the Alternate function This parameter can be GPIO PinSourcex where x can be 0 15 DoclD 18540 Rev 1 281 634 General purpose Os GPIO UM1061 e GPIO_AFSelection selects the pin to used as Alternate function This parameter can be one of the following values AF RTC 50H Connect RTC_50Hz pin to default after reset GPIO Connect MCO1 2 to AFO default after r
487. n Name void SDIO CommandCompletionCmd FunctionalState 464 634 DoclD 18540 Rev 1 ky UM1061 Secure digital input output interface SDIO NewSiate Function Description Enables or disables the command completion signal Parameters e NewState new state of command completion signal This parameter can be ENABLE or DISABLE Return values e None Notes e None 22 2 9 2 SDIO CEATAITCmd Function Name void SDIO_CEATAITCmd FunctionalState NewState Function Description Enables or disables the CE ATA interrupt Parameters e NewState new state of CE ATA interrupt This parameter can be ENABLE or DISABLE Return values e None Notes e None 22 2 9 3 SDIO SendCEATACmd Function Name void SDIO SendCEATACmd FunctionalState NewState Function Description Sends CE ATA command CMD61 Parameters e NewState new state of CE ATA command This parameter can be ENABLE or DISABLE Return values e None Notes e None 22 2 10 DMA transfers management function 22 2 10 1 SDIO DMACmd ky DociD 18540 Rev 1 465 634 Secure digital input output interface SDIO UM1061 22 2 11 22 2 11 1 466 634 Function Name void SDIO_DMACmd FunctionalState NewState Function Description Enables or disables the SDIO DMA reguest Parameters NewState new state of the selected SDIO DMA request This parameter can be ENABLE or DISABLE Return values e None Notes e None Interrupt and flag management functions SDIO ITC
488. n STM322xG EVAL board This memory is available only on STM322xG EVAL board RevA stm322xg_eval_fsmc_onenand h Header file for stm322xg_eval_fsmc_onenand c stm322xg_eval_fsmc_psram c This file provides a set of functions needed to drive the IS66WV25616BLL PSRAM memory mounted on STM322xG EVAL board This memory is available only on STM322xG EVAL board RevA stm322xg_eval_fsmc_psram h Header file for stm322xg_eval_fsmc_psram c stm322xg_eval_fsmc_sram c This file provides a set of functions needed to drive the CY7C1071DV33 12 SRAM memory mounted on STM322xG EVAL board This memory is available only on STM322xG EVAL board RevB stm322xg_eval_fsmc_sram h Header file for stm322xg_eval_fsmc_sram c stm322xg_eval_i2c_ee c This file provides a set of functions needed to manage the 2 24 EEPROM memory mounted on STM322xG EVAL board stm322xg_eval_i2c_ee h Header file for stm322xg_eval_i2c_ee c stm322xg_eval_ioe c This file provides a set of functions needed to manage the STMPE811 IO Expander devices mounted on STM322xG EVAL board stm322xg_eval_ioe h Header file for stm322xg_eval_ioe c stm322xg eval lcd c This file includes the LCD driver for AM 240320L8TNQWOOH LCD 1119320 and AM240320D5TOQW01H LCD 1119325 Liquid Crystal Display Modules of STM322xG EVAL board stm322xg_eval_Icd h Header file for stm322xg eval lcd c lcd log c Provides all
489. n and DMA are already configured For more examples about ADC configuration and usage please refer to the ADC examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples ADC ADC InitTypeDef ADC Lili CommonInitTypeDef ADC CommonInitStruct Enable ADC s APB interface clock RCC APB2PeriphClockCmd RCC APB2Periph ADC1 ENABLE f Camon ajjolicalolks ioe ile SI MIDIS Single ADC mode CommonInitStruct ADC ADC Mode Independent ADCCLK PCLK2 2 ADC ConrmoninitStruct ADC Prescaler ADC Proscaler Duw2p Available only for multi ADC mode CommonInitStruct ADC DMAAccessMode ADC_DMAAccessMode Disabled Delay between 2 sampling phases 88 634 DoclD 18540 Rev 1 4 UM1061 Analog to digital converter ADC 4 ADC_CommonInitStruct ADC TwoSamplingDelay ADC TwoSamplingDelay 5Cycles ADC CommonInit amp ADC CommonInitStruct Camera ADC tO Convert Gomcimously Clamimalid eese ADC LMESEZUCE ADC Resolution ADC Resolution 1297 ADC Initstruct ADC InitStruct ADC ContinuousConvMode ENABLE ADS ImLeESteuce ADC EscermnalteigComyacdge ADC_ExternalTrigConvEdge None ADC InitStruct ADC DataAlign ADC DataAlign Right ADE Inicstruct ADC NorOTConversio
490. n configuration input 1 0 1 Don t care Don t care floating TIMESTAMP and 1 1 1 1 Don t care inputs floating TIMESTAMP input 0 1 Don t care 1 Don t care floating Standard GPIO 0 0 Don t care Don t care Don t care RTC Initialization and Configuration functions This section provide functions allowing to initialize and configure the RTC Prescaler Synchronous and Asynchronous RTC Hour format disable RTC registers Write protection enter and exit the RTC initialization mode RTC registers synchronization check and reference clock detection enable 1 The RTC Prescaler is programmed to generate the RTC 1 Hz time base It is split into 2 programmable prescalers to minimize power consumption When both prescalers are used it is recommended to configure the asynchronous prescaler to a high value to minimize consumption A 7 bit asynchronous prescaler A 13 bit synchronous prescaler All RTC registers are Write protected Writing to the RTC registers is enabled by writing a key into the Write Protection register RTC_WPR To Configure the RTC Calendar user application should enter initialization mode In this mode the calendar counter is stopped and its value can be updated When the initialization sequence is complete the calendar restarts counting after 4 RTCCLK cycles To read the calendar through the shadow registers after Calendar initialization calendar update or after wakeup from
491. n done ERROR digest computation failed Notes e None 15 2 14 High Level MD5 functions 15 2 141 HASH MD5 Function Name ErrorStatus HASH MD5 uint8 Input uint32 t uint8 t Output Function Description Compute the HASH MD5 digest Parameters e Input pointer to the Input buffer to be treated e length of the Input buffer e Output the returned digest Return values An ErrorStatus enumeration value SUCCESS digest computation done ERROR digest computation failed Notes e None 15 2 14 2 HMAC MD5 4 Function Name Function Description Parameters Return values ErrorStatus uint8 Key uint32 t Keylen uint8 t Input uint32_t uint8 t Output Compute the HMAC MD5 digest Key pointer to the Key used for HMAC Keylen length of the Key used for HMAC Input pointer to the Input buffer to be treated llen length of the Input buffer Output the returned digest An ErrorStatus enumeration value SUCCESS digest computation done ERROR digest computation failed DoclID 18540 Rev 1 305 634 Hash processor HASH UM1061 15 3 15 3 1 306 634 Notes None HASH Firmware driver defines HASH Firmware driver defines HASH HASH Algo Selection e define HASH AlgoSelection 1 16 1 0x0000 HASH function is SHA1 e define HASH AlgoSelection MD5 uint16 1 0x0080 HASH function is MD5 HASH Data Type e define HASH DataType 32b
492. n the development tools Thanks to the Standard Peripheral Library low level implementation details are transparent so that reusing code on a different MCU requires only to reconfigure the compiler As a result developers can easily migrate designs across the STM32 series to quickly bring product line extensions to market without any redesign In addition the library is built around a modular architecture that makes it easy to tailor and run it on the same MCU using hardware platforms different from ST evaluation boards The Standard Peripheral Library implements run time failure detection by checking the input values for all library functions Such dynamic checking contributes towards enhancing the robustness of the software Run time detection is suitable for user application development and debugging It adds an overhead which can be removed from the final application code to minimize code size and execution speed For more details refer to Section 1 1 5 Run time checking Since the Standard Peripheral Library is generic and covers all peripheral features the size and or execution speed of the application code may not be optimized For many applications the library may be used as is However for applications having tough constraints in terms of code size and or execution speed the library drivers should be used as a reference on how to configure the peripheral and tailor them to specific application requirements The firmware library user ma
493. n this case modify the PPP InitStructure variable that has been already filled by a call to the PPP Structlnit function This ensures that the other members of the PPP InitStructure variable are initialized to the appropriate values in most cases their default values PPP EPA wells PPP Initstructure welxp where X and Y are the members the user wants to configures 3 Initialize the PPP peripheral by calling the PPP_Init function PPP Imilit PPP PPP DoclD 18540 Rev 1 4 UM1061 How to use and customize the library 2 4 2 4 1 2 4 2 3 4 Atthis stage the PPP peripheral is initialized and be enabled by making a call to PPP_Cmd function The PPP peripheral can then be used through a set of dedicated functions These functions are specific to the peripheral For more details refer to the peripheral driver chapter PPP_Delnit function can be used to set all PPP peripheral registers to their default values only for debug purpose PPP DeInit PPP To modify the peripheral settings after configuring it you have to proceed as follows em emis eR wa Init tructure menberi wel PPP where X and Y are the only mem
494. n using DMA mode in the transfers DocID 18540 Rev 1 311 634 Inter integrated circuit interface 12 UM1061 16 2 2 16 2 3 16 2 4 16 2 5 16 2 6 312 634 Initialization and configuration I2C Delnit I2C Init 2 Structlnit 2 I2C GenerateSTART 2 GenerateSTOP 2 Send bitAddress I2C AcknowledgeConfig 2 OwnAddress2Config 2 DualAddressCmd 2 GeneralCallCma 12C_SoftwareResetCmd 12C_StretchClockCmd I2C FastModeDutyCycleConfig 2 NACKPositionConfig I2C SMBusAlertConfig 2 Data transfers 12C_SendData I2C HReceiveData PEC management 2 TransmitPEC 2 PECPositionConfig 2 CalculatePEC I2C GetPEC DMA transfers management This section provides functions allowing to configure the I2C DMA channels requests Interrupt event and flag management DMACmda DMALastTransferCmd This section provides functions allowing to configure the 2 Interrupts sources and check or clear the flags or pending bits status The user should identify which mode will be used in his application to manage the communication Polling mode Interrupt mode or DMA mode DocID 18540 Rev 1 4 UM1061 Inter integrated circuit interface 2 3 I2C State Monitoring Functions This 2 driver provides three different ways for 2 state monitoring depending on the application
495. nce of the STM32F2xx standard peripherals driver 5 2 2 StdPeriph Driver with MISRA C 2004 has been checked using the IAR C C Compiler for ARM MISRA compliance applies only to STM32F2xx standard peripherals driver source file Examples and project files are not MISRA compliant Two options are available for checking MISRA compliance e The compiler IAR C C Compiler for ARM V6 20 e Manual checking code review The following table lists the MISCRA C 2004 rules that are frequently violated in the code Table 2 MSIRA C 2004 compliance matrix MISRA C 2004 rule number Required Advisory Summary Reason 1 1 Required Compiler is configured to allow extensions all code shall conform to ISO 9899 standard C with no extensions permitted IAR compiler extensions are enabled This was allowed to support new CMSIS types 5 1 Required Identifiers internal and external shall not rely on significance of more than 31 characters Some long parameters names are defined for code readability 8 1 Required No prototype seen functions shall always have prototype declarations and the prototype shall be visible at both the function definition This rule is violated as there is no function prototype for WFI and WFE macros in the CMSIS layer 10 1 Required The value of an expression of integer type shall not be implicitly converted to a Complexity DocID 1
496. nctionalState NewState ITStatus SPI 125 GetlTStatus SPI TypeDef SPIx uint8 t SPI 125 IT void SPI 125 ClearlTPendingBit SPI TypeDef uint8 t SPI 125 IT DMA Mode In DMA Mode the SPI communication can be managed by 2 DMA Channel requests SPI 125 DMAReq Tx specifies the Tx buffer DMA transfer request SPI I28 DMAReq Rx specifies the Rx buffer DMA transfer request In this Mode it is advised to use the following function void SPI 125 DMACmdqd SPI TypeDef SPIx uint 6 t SPI 125 DMAReq FunctionalState NewState The following functions can be used to manage the SPI flags and interrupts SPI I2S ITConfig SPI I2S GetFlagStatus SPI 25 ClearFlag SPI I2S GetlTStatus SPI 125 ClearlTPendingBit Initialization and configuration functions SPI 125 Delnit Function Name void SPI 125 Delnit SP TypeDef SPIx Function Description Deinitialize the SPIx peripheral registers to their default reset values Parameters e SPlx To select the SPIx I2Sx peripheral where x be 1 2 or 3 in SPI mode or 2 or 3 in 125 mode DoclD 18540 Rev 1 Ly UM1061 Serial peripheral interface SPI 23 2 7 2 23 2 7 3 Return values Notes SPL Init Function Name Function Description Parameters Return values Notes 125 Init Function Name Function Description Parameters Return values Notes None None void SPI Init SP TypeDef 5 SPI InitTypeDef
497. nctions are the following FSMC NANDDelnit FSMC_NANDInit FSMC_NANDStructinit FSMC_NANDCmd FSMC_NANDECCCmd FSMC GetECC PCCARD controller The following sequence should be followed to configure the FSMC to interface with 16 bit PC Card compatible memory connected to the PCCARD Bank 1 Enable the clock for the FSMC and associated GPIOs using the following functions RCC AHB3PeriphClockCmd RCC FSMC ENABLE RCC AHB1PeriphClockCmd RCC AHB1Periph GPIOx ENABLE FSMC pins configuration Connect the involved FSMC pins to AF12 using the following function GPIO_PinAFConfig GPIOx GPIO PinSourcex GPIO AF Configure these FSMC pins in alternate function mode by calling the function GPIO Init Declare FSMC_PCCARDInitTypeDef structure for example FSMC PCCARDInitTypeDef FSMC PCCARDInitStructure and fill the FSMC_PCCARDInitStructure variable with the allowed values of the structure member DocID 18540 Rev 1 UM1061 Flexible static memory controller FSMC 4 Initialize the PCCARD Controller by calling the function FSMC PCCARDInit amp FSMC PCCARDInitStructure 5 Then enable the PCCARD Bank FSMC_PCCARDCmd ENABLE 6 Atthis stage you can read write from to the memory connected to the PCCARD Bank The PCCARD Oontroller functions are FSMC PCCARDDelnit FSMC PCCARDInit FSMC_PCCARDStructinit FSMC_PCCARDCmd 13 2 4 Interrupt and flag management FSM
498. nding on the Interrupt Source DMA IT FEIFx specifies the interrupt source for the FIFO Mode Transfer Error event DMA IT DMEIFx specifies the interrupt source for the Direct Mode Transfer Error event DMA IT TEIFx specifies the interrupt source for the Transfer Error event DMA IT HTIFx specifies the interrupt source for the Half Transfer Complete event DMA IT TCIFx specifies the interrupt source for the a Transfer Complete event In this Mode it is recommended to use the following functions void DMA ITConfig DMA Stream TypeDef DMAy Streamx uint32 t DMA IT FunctionalState NewState ITStatus GetlTStatus DMA Stream TypeDef DocID 18540 Rev 1 193 634 DMA controller DMA UM1061 10 2 4 10 2 4 1 10 2 4 2 194 634 DMAy_Streamx uint32 t DMA_IT void DMA_ClearlTPendingBit DMA_Stream_TypeDef Streamx uint32 t IT As a summary the functions allowing to manage the DMA interrupts and flags are the following DMA_GetCmdStatus DMA_GetFlFOStatus DMA_GetFlagStatus DMA ClearFlag ITConfig GetlTStatus DMA_ClearlTPendingBit Initialization and configuration functions Delnit Function Name Function Description Parameters Return values Notes DMA Init Function Name Function Description Parameters Return values Notes void Delnit Stream TypeDef DMAy Streamx Deinitialize the DMAy Streamx registers to their
499. nels Parameters e NewState new state of the temperature sensor and Vrefint channels This parameter can be ENABLE or DISABLE Return values e None Notes e None 3 2 6 2 ADC VBATCmd Function Name void ADC FunctionalState NewState Function Description Enables or disables the VBAT Voltage Battery channel Parameters NewState new state of the VBAT channel This parameter can be ENABLE or DISABLE Return values e None Notes e None 3 2 7 Regular Channels Configuration functions 3 2 7 1 ADC RegularChannelConfig Function Name void ADC RegularChannelConfig ADC TypeDef ADCx uint8 t ADC Channel uint8 t Rank uint8 t ADC SampleTime Function Description Configures for the selected ADC regular channel its corresponding rank in the sequencer and its sample time 62 634 DoclD 18540 Rev 1 UM1061 Analog to digital converter ADC Parameters e ADCx where x can be 1 2 or 3 to select the ADC peripheral e ADC Channel the ADC channel to configure This parameter can be one of the following values Channel 0 ADC Channel selected Channel 1 ADC Channel1 selected Channel 2 ADC Channel selected Channel 3 ADC Channels selected Channel 4 ADC Channel4 selected Channel 5 ADC Channel5 selected Channel 6 ADC Channel6 selected Channel 7 ADC Channel7 selected Channel 8 ADC Channel8 selected Channel 9 ADC
500. ner ennnnen n 628 28 4 Interrupt Programming 629 29 Revision DISIOFV nu as A RATES 633 30 mamaa maaana aana 634 Gr 18540 Rev 1 15 634 List of tables UM1061 List of tables Table List of ADDIE ii aaa 18 Table 2 MSIRA C 2004 compliance matrix 25 Table 3 Description CMSIS files 30 Table 4 STMS2F2xx StdPeriph Driver files description 31 Table 5 STM32F2xx StdPeriph Template files description sse 32 Table 6 Utilities STM32_EVAL files description 34 Table 7 Library configuration parameters 37 Table 8 Default clock configuration in system stm32F2 09 C sse 47 Table 9 Number of wait states according to CPU clock HCLK frequency 226 Table 10 Program erase sss nennen nent 227 Table 11 Number of wait states according to CPU clock HCLK frequency 359 Table 12 Selection of RTC 1 alternate functions 2 417 Table 13 Selection of RTC AF2 alternate functions 418 Table 14 Revision history 2 site picti iae 633 16 634 DoclD 18540 Rev 1 UM1061 List of figures
501. new state of the main PLL This parameter can be ENABLE or DISABLE None After enabling the main PLL the application software should wait on PLLRDY flag to be set indicating that PLL clock is DoclD 18540 Rev 1 365 634 Reset and clock control RCC UM1061 19 2 6 10 RCC_PLLI2SConfig 19 2 6 11 366 634 Function Name Function Description Parameters Parameters Return values Notes RCC_PLLI2SCmd Function Name Function Description Parameters Return values Notes stable and can be used as system clock source e The main PLL can not be disabled if it is used as system clock source e main PLL is disabled by hardware when entering STOP and STANDBY modes void PLLI2SConfig uint32 t PLLI2SN uint32 t PLLI2SR Configures the PLLI2S clock multiplication and division factors e PLLI2SN specifies the multiplication factor for PLLI2S VCO output clock This parameter must be a number between 192 and 432 e PLLI2SR specifies the division factor for 125 clock This parameter must be a number between 2 and 7 None e PLLI2S is available only in Silicon RevisionB and RevisionY e This function must be used only when the PLLI2S is disabled e PLLI2S clock source is common with the main PLL configured in RCC PLLConfig function e You have to set the PLLI2SN parameter correctly to ensure that the VCO output frequency is between 192 and 432 MHz e You have to set the PLLI2SR pa
502. ng values DAC Channel 1 DAC Channeli selected DAC Channel 2 DAC Channel2 selected e DAC Wave specifies the wave type to enable or disable This parameter can be one of the following values DAC Wave Noise noise wave generation DAC Wave Triangle triangle wave generation e NewState new state of the selected DAC channel wave generation This parameter can be ENABLE or DISABLE Return values e None Notes e None DAC SetChannel1Data Function Name void DAC SetChannel1Data uint32 t DAC Align uint16 t Data Function Description Set the specified data holding register value for DAC channel1 Parameters e DAC Align Specifies the data alignment for DAC channel This parameter can be one of the following values DAC Align 8b 8bit right data alignment selected DAC Align 12b L 12bit left data alignment selected DAC Align 12b 12bit right data alignment selected Data Data to be loaded in the selected data holding DoclD 18540 Rev 1 UM1061 Digital to analog converter DAC register Return values None Notes None 7 2 6 9 DAC SetChannel2Data Function Name void DAC SetChannel2Data uint32 t DAC_Align uint16_t Data Function Description Set the specified data holding register value for DAC 2 Parameters DAC Align Specifies the data alignment for DAC channel2 This parameter can be one of the following values DAC Align 8b 8bit right data alignment selected
503. nges from 0 to OxFF CanRxMsg CanRxMsgis defined the stm32f2xx can h Data Fields uint32 t Stdld uint32 t Extld 8 t IDE uint8 t RTR uint8 t DLC uint8 t Data uint8 t FMI Field Documentation DocID 18540 Rev 1 95 634 Controller area network CAN UM1061 4 2 4 2 1 96 634 uint32_t CanRxMsg Stdld Specifies the standard identifier This parameter can be a value between 0 and Ox7FF uint32 t CanRxMsg Extld Specifies the extended identifier This parameter can be a value between 0 and Ox1FFFFFFF t CanRxMsg IDE Specifies the type of identifier for the message that will be received This parameter can be a value of CAN identifier type uint8 t CanRxMsg RTR Specifies the type of frame for the received message This parameter can be a value of CAN remote transmission request 8 t CanRxMsg DLC Specifies the length of the frame that will be received This parameter can be a value between 0 and 8 8 t CanRxMsg Data 8 A Contains the data to be received It ranges from 0 to OxFF 8 t CanRxMsg FMI Specifies the index of the filter the message stored the mailbox passes through This parameter can be a value between 0 and OxFF CAN Firmware driver API description The following section lists the various functions of the CAN library How to use this driver The following section lists the various functions of the CAN library 1
504. ngth must be an entire number of blocks The data are transferred in burst mode The burst length is 4 words in the AES and 2 or 4 words in the DES TDES The DMA should be configured to set an interrupt on transfer completion of the output data to indicate that the processing is finished Refer to DMA peripheral driver for more details b Enable the cryptographic processor using Cmd function Enable the DMA requests CRYP DMAReq DatalN and CRYP DataOUT using CRYP DMACmd function c Allthe transfers and processing are managed by the DMA and the cryptographic processor The DMA transfer complete interrupt indicates that the processing is complete Both FIFOs are normally empty and CRYP FLAG BUSY flag is reset Initialization and configuration This section provides functions allowing to Initialize the cryptographic Processor using CRYP_Init function Encrypt or Decrypt Mode TDES ECB TDES CBC DES ECB DES CBC AES ECB AES CBC AES CTR AES Key DataType 32 bit data 16 bit data bit data or bit string Key Size only in AES modes Configure the Encrypt or Decrypt Key using CRYP Keylnit function Configure the Initialization Vectors IV for CBC and CTR modes using CRYP_IVInit function Flushes the IN and OUT FIFOs using CRYP_FIFOFlush function Enable or disable the CRYP Processor using CRYP Cmd function Below is the list of functions used to initialize and configure the cryptographic processo
505. nished DMA_GetFIFOStatus Function Name uint32_t DMA_GetFIFOStatus Stream TypeDef DMAy_Streamx Function Description Returns the current DMAy Streamx FIFO filled level Parameters e DMAy_Streamx where be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream Return values The FIFO filling state DMA_FIFOStatus_Less1QuarterFull when FIFO is less than 1 quarter full and not empty DMA_FIFOSitatus_1QuarterFull if more than 1 quarter full DMA FiFOStatus HalfFull if more than 1 half full FlFOStatus 3QuartersFull if more than quarters full DMA Empty when FIFO is empty FliFOStatus Full when FIFO is full DoclD 18540 Rev 1 UM1061 DMA controller DMA Notes e None 10 2 7 3 GetFlagStatus Function Name FlagStatus GetFlagStatus Stream TypeDef DMAy_Streamx uint32 t DMA FLAG Function Description Checks whether the specified DMAy Streamx flag is set or not Parameters e Streamx where y be 1 or 2 select the DMA and x can be 0 to 7 to select the DMA Stream e FLAG specifies the flag to check This parameter can be one of the following values DMA_FLAG_TCIFx Streamx transfer complete flag DMA FLAG HTIFx Streamx half transfer complete flag DMA_FLAG_TEIFx Streamx transfer error flag DMA FLAG DMEIFx Streamx direct mode error flag DMA_FLAG_FEIFx Str
506. nowledged Address using the I2C_Init function 5 Optionally you can enable configure the following parameters without re initialization i e there is no need to call again 2 Init function Enable the acknowledge feature using 2 AcknowledgeConfig function Enable the dual addressing mode using I2C DualAddressCmd function Enable the general call using the 2 GeneralCallCmd function Enable the clock stretching using 2 StretchClockCmd function Enable the fast mode duty cycle using the 2 FastModeDutyCycleConfig function Configure the NACK position for Master Receiver mode in case of 2 bytes reception using the function 2 NACKPositionConfig Enable the PEC Calculation using 12C CalculatePEC function For SMBus Mode Enable the Address Resolution Protocol ARP using 2 function Configure the SMBusAlert pin using I2C_SMBusAlertConfig function 6 Enable the NVIC and the corresponding interrupt using the function I2C ITConfig if you need to use interrupt mode 7 When using the DMA mode When using DMA mode 2 interrupts can be used at the same time to control the communication flow Start Stop Ack events and errors Configure the DMA using Init function Activate the needed channel Request using 12C_DMACmd or I2C DMALastTransferCmdad function 8 Enable the 2 using the 12C_Cmd function 9 Enable the DMA using the DMA_Cmd function whe
507. ns used to manage the CAN controller events are the following CAN ITConfig CAN GetFlagStatus CAN ClearFlag CAN GetlTStatus CAN C learlTPendingBit This function has no impact CAN and IT Interrupts pending bits since there are cleared only by hardware ITConfig to enable or disable the interrupt source CAN GetlTStatus to check if Interrupt occurs ClearlTPendingBit to clear the Interrupt pending Bit corresponding Flag This function has no impact CAN CAN FMP1 Interrupts pending bits since there are cleared only by hardware CAN ITConfig CAN GetFlagStatus CAN ClearFlag CAN GetlTStatus CAN ClearlTPendingBit Initialization and configuration functions CAN Delnit Function Name void CAN Delnit CAN TypeDef CANx Function Description Deinitializes the CAN peripheral registers to their default reset values Parameters e where x be 1 or 2 to select the CAN peripheral Return values None Notes e None CAN Init Function Name uint8 t CAN Init CAN TypeDef CANx CAN InitTypeDef CAN InitStruct Function Description Initializes the CAN peripheral according to the specified DoclD 18540 Rev 1 4 UM1061 Controller area network CAN 4 2 4 3 4 2 4 4 4 2 4 5 ky Parameters Return values Notes Filterinit Function Name Function Description Parameters
508. ns where only the Data buffer needs to be reloaded data counter expressing the number of transfers is relative to the number of transfers from the Peripheral point of view ie If Memory data size is Word Peripheral data size is Half Words then the value to be configured in the data counter is the number of Half Words to be transferred from to the peripheral If the Source Destination Data Sizes are different then the value written If the Source and Destination Data Sizes are different then the value written in data counter expressing the number of transfers is relative to the number of transfers from the Peripheral point of view ie If Memory data size is Word Peripheral data size is Half Words then the value to be configured in the data counter is the number of Half Words to be transferred from to the peripheral 18540 Rev 1 191 634 DMA controller DMA UM1061 192 634 The DMA data counter can be read to indicate the number of remaining transfers for the relative DMA Stream This counter is decremented at the end of each data transfer and when the transfer is complete If Normal mode is selected the counter is set to 0 If Circular mode is selected the counter is reloaded with the initial value configured before enabling the DMA Stream The following function can be used to read the Stream data counter value uint16 t GetCurrDataCounter DMA Stream TypeDef DMAy Streamx
509. nsor Vrefint Voltage Reference internal e TempSensorVrefintCmd ADC VBATCmd Regular Channels Configuration functions This section provides functions allowing to manage the ADC s regular channels it is composed of 2 sub sections 1 Configuration and management functions for regular channels This subsection provides functions allowing to configure the ADC regular channels Please Note that the following features for regular channels are configurated using the ADC_Init function scan mode activation continuous mode activation External trigger source External trigger edge number of conversion in the regular channels group sequencer and are performing the same configuration Configure the rank in the regular group seguencer for each channel Configure the sampling time for each channel select the conversion Trigger for regular channels select the desired EOC event behavior configuration Activate the continuous Mode Activate the Discontinuous Mode 2 Get the conversion data This subsection provides an important function in the ADC peripheral since it returns the converted data of the current regular channel When the Conversion value is read the EOC Flag is automatically cleared For multi ADC mode the last ADC1 ADC2 and ADC3 regular conversions results data in the selected multi mode can be returned in the same time using ADC GetMultiModeConversionValue function Regular
510. nt32 t CRYP_IVOLeft uint32 t CRYP IVORight uint32 t CRYP_IV1Left CRYP KeyOLeft CRYP KeyORight CRYP_Key1Left CRYP_Key1Right CRYP_Key2Left CRYP_Key2Right CRYP_Key3Left CRYP_Key3Right DocID 18540 Rev 1 Cryptographic processor CRYP UM1061 130 634 uint32_t CRYP_IV1Right Field Documentation uint32 t CRYP IVInitTypeDef CRYP IVOLeft Init Vector 0 Left uint32_t CRYP IVInitTypeDef CRYP IVORight Init Vector 0 Right uint32_t CRYP IVInitTypeDef CRYP IV1Left Init Vector 1 left uint32_t CRYP_IVinitTypeDef CRYP_IV1Right Init Vector 1 Right CRYP_Context CRYP Context is defined in the stm32f2xx_cryp h Data Fields uint32_t CR_bits9to2 uint32_t CRYP_IVOLR uint32_t CRYP_IVORR uint32_t IV1LR uint32 t CRYP IV1RR uint32 t CRYP KOLR uint32 t CRYP KORR uint32 t K1LR uint32 t CRYP K1RR uint32 t CRYP K2LR uint32 t CRYP K2RR uint32 t CRYP uint32 t CRYP Field Documentation uint32 t CRYP Context bits9to2 lt Configuration KEY uint32_t CRYP_Context uint32_t CRYP_Context uint32_t CRYP_Context uint32_t CRYP_Context IN uint32_t CRYP_Context uint32_t CRYP_Context uint32_t CRYP_Context uint32_t CRYP_Context uint32_t CRYP_Context uint32_t CRYP_Context DoclD 18540 Rev 1 CRYP IVOLR CRYP IVORR CRYP IV1LR CRYP IV1RR CRYP KOLR CRYP KORR CRYP_K1LR CRYP_K1RR CRYP_K2LR CRYP_K2RR 4 UM1061 Cryptogr
511. nter to a USART ClocklnitTypeDef structure which will be initialized None None void USART Cmd USART TypeDef USARTx FunctionalState NewState Enables or disables the specified USART peripheral 26 2 11 7 USART SetPrescaler Function Name Function Description Parameters Return values Notes 600 634 USARTXx where can be 1 2 3 4 5 or 6 to select the USART or UART peripheral NewState new state of the USARTx peripheral This parameter can be ENABLE or DISABLE None None void USART SetPrescaler USART TypeDef USARTx uint8 t USART Prescaler Sets the system clock prescaler USARTx where x can be 1 2 3 4 5 or 6 to select the USART or UART peripheral USART Prescaler specifies the prescaler clock None The function is used for IrDA mode with UART4 and UART5 DoclD 18540 Rev 1 UM1061 Universal synchronous asynchronous receiver transmitter USART 26 2 11 8 USART OverSampling8Cmd Function Name void USART OverSampling8Cmd USART TypeDef USARTx FunctionalState NewState Function Description Enables or disables the USART s 8x oversampling mode Parameters e USARTx where x be 1 2 3 4 5 or 6 to select the USART or UART peripheral e NewState new state of the USART 8x oversampling mode This parameter can be ENABLE or DISABLE Return values e None Notes e This function has to be called before calling USART Init function in order to have corre
512. nterface UM1061 9 2 5 4 9 2 5 5 9 2 5 6 178 634 Notes DCMI Function Name Function Description Parameters Return values Notes DCMI CROPCmd Function Name Function Description Parameters Return values Notes None void DCMI DCMI CROPInitTypeDef DCMI CROPlnitStruct Initializes the DCMI peripheral CROP mode according to the specified parameters the DCMI_CROPInitStruct DCMI CROPlnitStruct pointer to a DCMI_CROPInitTypeDef structure that contains the configuration information for the DCMI peripheral CROP mode None This function should be called before to enable and start the DOMI interface void DCMI CROPCmd FunctionalState NewState Enables or disables the DCMI Crop feature NewState new state of the DCMI Crop feature This parameter can be ENABLE or DISABLE None This function should be called before to enable and start the DOMI interface DCMI SetEmbeddedSynchroCodes Function Name void DCMI SetEmbeddedSynchroCodes DoclD 18540 Rev 1 4 UM1061 Digital camera interface DCMI 9 2 5 7 9 2 6 9 2 6 1 3 DCMI CodeslnitTypeDef CodeslnitStruct Function Description Sets the embedded synchronization codes Parameters e CodeslnitTypeDef pointer to a CodeslnitTypeDef structure that contains the embedded synchronization codes for the DCMI peripheral Retu
513. nterface SDIO UM1061 22 2 5 4 22 2 5 5 458 634 Function Name void SDIO Structlnit SDIO InitTypeDef SDIO_InitStruct Function Description Fills each SDIO InitStruct member with its default value Parameters e 500 InitStruct pointer to an SDIO InitTypeDef structure which will be initialized Return values e None Notes e None SDIO ClockCmd Function Name void SDIO ClockCmd FunctionalState NewState Function Description Enables or disables the SDIO Clock Parameters e NevwState new state of the SDIO Clock This parameter be ENABLE or DISABLE Return values e None Notes e None SDIO SetPowerState Function Name void SDIO SetPowerState uint32 t SDIO PowerState Function Description Sets the power status of the controller Parameters e SDIO PowerState new state of the Power state This parameter can be one of the following values SDIO PowerState SDIO Power OFF SDIO PowerState SDIO Power ON Return values e None Notes DoclD 18540 Rev 1 4 UM1061 Secure digital input output interface SDIO 22 2 5 6 22 2 6 22 2 6 1 22 2 6 2 SDIO GetPowerState Function Name Function Description Parameters Return values Notes uint32 t SDIO GetPowerState void Gets the power status of the controller e None Power status of the controller The returned value can be one of the following values 0x00 Power OFF 0x02 P
514. nters the bus off state The bus off state is entered on TEC overflow greater than 255 This Flag is cleared only by hardware FLAG LEC Last error code Flag set If a message has been transferred reception or transmission with error and the error code is hold Interrupts The 14 interrupts can be divided on 4 groups Transmit interrupt IT Transmit mailbox empty Interrupt if enabled this interrupt source is pending when no transmit request are pending for Tx mailboxes e Receive Interrupts CAN_IT_FMP1 FIFO 0 and FIFO1 message pending Interrupts if enabled these interrupt Sources are pending when messages are pending in the receive FIFO The corresponding interrupt pending bits are cleared only by hardware CAN_IT_FFO CAN IT FF1 FIFO 0 and FIFO1 full Interrupts if enabled these interrupt sources are pending when three messages are stored in the selected FIFO FOVO CAN_IT_FOV1 FIFO 0 and FIFO1 overrun Interrupts if enabled these interrupt sources are pending when a new message has been received and passed the filter while the FIFO was full e Operating Mode Interrupts Wake up Interrupt if enabled this interrupt source is pending when a SOF bit has been detected while the CAN hardware was in Sleep mode CAN IT SLK Sleep acknowledge Interrupt if enabled this interrupt source is pending when the CAN has entered Sleep Mode
515. nts The user should identify which mode will be used in his application to manage the RNG controller events Polling mode or Interrupt mode DocID 18540 Rev 1 LY UM1061 Random number generator RNG 20 2 5 20 2 5 1 20 2 5 2 e Inthe Polling Mode it is advised to use the following functions RNG_FLAG_DRDY can not be cleared by RNG_ClearFlag it is cleared only by reading the Random number data RNG_GetFlagStatus to check if flags events occur RNG _ClearFlag to clear the flags events In the Interrupt Mode it is advised to use the following functions RNG to enable or disable the interrupt source RNG_GetITStatus to check if Interrupt occurs RNG_ClearlTPendingBit to clear the Interrupt pending Bit corresponding Flag Below is the list of functions to manage RNG controller event RNG_ITConfig RNG_GetFlagStatus RNG_ClearFlag RNG_GetITStatus RNG ClearlTPendingBit Initialization and configuration functions RNG Delnit Function Name void RNG Delnit void Function Description Deinitializes the RNG peripheral registers to their default reset values Parameters e None Return values Notes None RNG Cmd Function Name void RNG Cmd FunctionalState NewState Function Description Enables or disables the RNG peripheral Parameters NewState new state of the RNG peripheral This parameter can be ENABLE or DISABLE Retu
516. nual is structured as follows e Document conventions rules architecture and overview of the Library package e How to use and customize the Library step by step e Detailed description of each peripheral driver configuration structure functions and how to use the provided API to build your application The STM32F2xx Standard Peripheral Library will be referred to as Library throughout the document unless otherwise specified COMPLIANT face Standard December 2011 DociD 18540 Rev 1 1 634 www st com Contents UM1061 Contents 1 STM32F2xx Standard Peripheral Library 18 1 1 Coding rules and conventions 18 1 1 1 ACONYM SEO RE 18 1 1 2 Naming 19 1 1 3 emm mi 20 1 1 4 e au nei ee 22 1 1 5 Run time 23 1 1 6 MISRA C 2004 compliance 0 0 25 1 2 Architecture S c 27 1 3 Package description Be ROUES t 28 1 3 1 Library folder structure 29 1 3 2 Projectfolder iii ie eni ice teen Ledger and deni 32 1 3 3 Utilities folder ec 33 1 4 Supported devices and development tools 35 1 4 1 Supported 5 35 1 4 2 Supported development tools and compilers 36
517. o be enabled or disabled This parameter can be one of the following values ADC_IT_EOC End of conversion interrupt mask ADC IT Analog watchdog interrupt mask IT End of injected conversion interrupt mask A ADC IT Overrun interrupt enable NewState new state of the specified ADC interrupts This parameter can be ENABLE or DISABLE None None Function Name FlagStatus ADC GetFlagStatus ADC TypeDef ADCx uint8 t ADC FLAG Function Description Checks whether the specified ADC flag is set or not Parameters ADCx where x be 1 2 3 to select the ADC peripheral ADC FLAG specifies the flag to check This parameter can DocID 18540 Rev 1 UM1061 Analog to digital converter ADC be one of the following values ADC FLAG AWD Analog watchdog flag ADC FLAG EOC End of conversion flag ADC FLAG JEOC End of injected group conversion flag ADC FLAG JSTHT Start of injected group conversion flag ADC FLAG STRT Start of regular group conversion flag ADC FLAG Overrun flag Return values The new state of ADC FLAG SET or RESET Notes e None 3 2 10 3 ADC ClearFlag Function Name void ADC ClearFlag ADC_TypeDef ADCx uint8 t ADC FLAG Function Description Clears the ADCx s pending flags Parameters e ADCx where x can be 1 2 or 3 to select the ADC peripheral e ADC FLAG specifies the flag to clear This parameter
518. o correct communication status Advanced state monitoring Using the function 2 GetLastEvent It makes use of the function 2 GetLastEvent which returns the image of both status registers in a single word uint32 t Status Register 2 value is shifted left by 16 bits and concatenated to Status Register 1 This function is suitable for the same applications as above but it allows to overcome the mentioned limitation of I2C_GetFlagStatus function The returned value could be compared to events already defined in the library stm32f2xx i2c h or to custom values defined by user This function is suitable when multiple flags are monitored at the same time At the opposite of 2 CheckEvent function this function allows user to choose when an event is accepted when all events flags are set and no other flags are set or just when the needed flags are set like 12C_CheckEvent function Limitations User may need to define his own events The same comment concerning the error management is applicable for this function if the user decides to check only regular communication flags and ignores error flags Flag based state monitoring Using the function 12C_GetFlagStatus It makes use of the function 2 GetFlagStatus which simply returns the status of one single flag ie I2C FLAG RXNE This function could be used for specific applications or in debug phase It is suitable when only one flag checking is needed most I2C e
519. ode CAN_ModeStatus_Success CAN Succeed entering the specific mode Notes None DociD 18540 Rev 1 105 634 Controller area network CAN UM1061 4 2 7 2 4 2 7 3 4 2 8 4 2 8 1 106 634 CAN Sleep Function Name Function Description Parameters Return values Notes CAN WakeUp Function Name Function Description Parameters Return values Notes uint8_t CAN Sleep CAN_TypeDef Enters the Sleep low power mode e CANx where x can be 1 or 2 to select the CAN peripheral CAN Sleep if sleep entered CAN Sleep Failed otherwise None uint8 t CAN WakeUp CAN TypeDef CANx Wakes up the CAN peripheral from sleep mode CANx where x be 1 or 2 to select the CAN peripheral CAN WakeUp Ok if sleep mode left CAN WakeUp Failed otherwise None CAN Bus Error management functions CAN GetLastErrorCode Function Name Function Description Parameters Return values uint8_t CAN GetLastErrorCode CAN TypeDef CANx Returns the CANx s last error code LEC where x be 1 or 2 to select the CAN peripheral Error code CAN_ERRORCODE_NoErr Error CAN_ERRORCODE_StuffErr Stuff Error CAN_ERRORCODE_FormErr Form Error ERRORCODE ACKErr Acknowledgment Error DocID 18540 Rev 1 UM1061 Controller area network CAN 4 2 8 2 4 2 8 3 4 ERRORCODE BitRecessiveErr Bit Recessive
520. ode This parameter can be one of the following values MODE ENCRYPT Encryption MODE DECRYPT Decryption Key Key used for TDES algorithm llength length of the Input buffer must be a multiple of 8 Input pointer to the Input buffer Output pointer to the returned buffer Return values An ErrorStatus enumeration value SUCCESS Operation done ERROR Operation failed Notes None DocID 18540 Rev 1 143 634 Cryptographic processor CRYP UM1061 6 2 11 2 6 2 12 6 2 12 1 144 634 CRYP_TDES CBC Function Name ErrorStatus CRYP TDES CBC 8 Mode uint8 t Key uint8 t InitVectors uint8 Input uint32 t llength uint8 Output Function Description Encrypt and decrypt using TDES in CBC Mode Parameters e Mode encryption or decryption Mode This parameter can be one of the following values MODE ENCRYPT Encryption MODE DECRYPT Decryption Key Key used for TDES algorithm InitVectors Initialisation Vectors used for TDES algorithm Input pointer to the Input buffer llength length of the Input buffer must be a multiple of 8 Output pointer to the returned buffer Return values An ErrorStatus enumeration value SUCCESS Operation done ERROR Operation failed Notes None High Level DES functions CRYP DES ECB Function Name ErrorStatus CRYP DES ECB uint8_t Mode uint8 t Key uint8 t Input uint32_t llength uint8 t Output Function Desc
521. ode will be used in his application to manage the HASH controller events Polling mode or Interrupt mode In the Polling Mode it is advised to use the following functions HASH GetFlagStatus to check if flags events occur HASH ClearFlag to clear the flags events In the Interrupt Mode it is advised to use the following functions fnc to enable or disable the interrupt source HASH GetlTStatus to check if Interrupt occurs HASH_ClearlTPendingBit to clear the Interrupt pending Bit corresponding Flag fnc HASH GetFlagStatus HASH ClearFlag HASH GetlTStatus HASH_ClearlTPendingBit High level functions High Level SHA1 functions 1 SHAT High Level MD5 functions e HASH_MD5 HMAC_MD5 Initialization and configuration functions HASH_Delnit Function Name void HASH_Delnit void Function Description Deinitializes the HASH peripheral registers to their default reset values Parameters None Return values None Notes None DoclD 18540 Rev 1 297 634 Hash processor HASH UM1061 15 2 8 2 15 2 8 3 15 2 8 4 298 634 HASH Init Function Name Function Description Parameters Return values Notes HASH Structlnit Function Name Function Description Parameters Return values Notes HASH Reset Function Name Function Description void HASH Init HASH InitTypeDef HASH InitStruct Initializes the HASH peripheral a
522. omatieS Ex wIeEBuse Speed DocID 18540 Rev 1 ENABLE UANI EPO AE USA PinATCoOmrig 2 10 EPIO Us IO SEIS P Rx alternate function GPIO Pin 5 GPIO Pin 6 Moose Amr GPO Seri 4 UM1061 General purpose Os GPIO CLO Ove EER TORON PERRE GPIO GPIO PURE GPIO lue UP GPIO GPLOD SE SE DIETE IDE p DocID 18540 Rev 1 291 634 Hash processor HASH UM1061 15 15 1 15 1 1 15 1 2 292 634 Hash processor HASH HASH Firmware driver registers structures HASH_TypeDef HASH TypeDef is defined in the stm32f2xx h file and contains the HASH registers definition Data Fields lO uint32 t CR uint32 t DIN 10 uint32 t STR IO uint32 t HR lO uint32 t IMR lO uint32 t SR uint32 t RESERVED lO uint32 t CSR Field Documentation e _ 2 t HASH_TypeDef CR HASH control register Address offset 0x00 e 2 t HASH_TypeDef DIN HASH data input register Address offset 0 04 e _ JOuint32_t HASH_TypeDef STR HASH start register Address offset 0 08 e _ JO uint32_t HASH_TypeDef HR 5 HASH digest registers Address offset 0 0 0 1 e _ lOuint32 t HASH_TypeDef IMR HASH interrupt enable register Address offset 0x2
523. ome message on the LCD and finally toggles two LEDs in an infinite loop To achieve this goal you have to proceed as described below 1 Download and unzip the STM32F2xx StdPeriph Lib VX Y Z zip in the folder of your choice 2 Power up the STM322xG EVAL board 3 Connect your JTAG probe to the JTAG connector CN14 of the EVAL board and to the USB port of your PC The STM322xG EVAL features a build in ST Link V2 debugger and programmer which makes the external hardware debuggers useless to load and debug your program Simply select ST Link V2 as your debugger in your DocID 18540 Rev 1 41 634 How to use and customize the library UM1061 Development Tool configuration menu and connect the CN21 to your host PC through an USB cable Refer to your development tool documentation to know if it supports the ST Link V2 debugger 4 Run the template example go to STM32F2xx_SidPeriph_Lib_VX Y Z Project STM32F2xx_StdPeriph_Template folder and proceed as follows depending on the development tool you are using a EWARM a Open the EWARM Project eww workspace b Rebuild all files Project gt Rebuild all c Load project image Project gt Debug d Run program Debug gt Go F5 MDK ARM a Open the MDK ARM Project uvproj project b Rebuild all files Project gt Rebuild all target files c Load project image Debug gt Start Stop Debug Session d Run program Debug gt Run F5 TrueSTUDIO a Open the TrueSTUDIO development tool
524. on This parameter can be ENABLE or DISABLE None None DociD 18540 Rev 1 315 634 Inter integrated circuit interface 12 UM1061 16 2 7 6 16 2 7 7 16 2 7 8 316 634 I2C GenerateSTOP Function Name void I2C_GenerateSTOP 2C_TypeDef 12 FunctionalState NewState Function Description Generates I2Cx communication STOP condition Parameters e 2 where x be 1 2 3 to select the 12C peripheral e NewState new state of the 2 STOP condition generation This parameter can be ENABLE or DISABLE Return values Notes e None I2C_Send7bitAddress Function Name void 12C_Send7bitAddress 2C_TypeDef 2 uint8 t Address uint8 t12C Direction Function Description Transmits the address byte to select the slave device Parameters e 2 where x be 1 2 3 to select the 12C peripheral e Address specifies the slave address which will be transmitted e 2 Direction specifies whether the 2 device will be a Transmitter or a Receiver This parameter can be one of the following values 2C Direction Transmitter Transmitter mode 2C Direction Receiver Receiver mode Return values e None Notes e None I2C_AcknowledgeConfig Function Name void 12C_AcknowledgeConfig 2C TypeDef I2Cx FunctionalState NewState Function Description Enables or disables the specified 2 acknowledge feature DoclD 18540 Rev 1 4 UM1061 Inter int
525. on unit Select Input Trigger Select Output Trigger Select Master Slave Mode Configuration when used as external trigger TIM specific interface management this group includes all needed functions to use the specific TIM interface Encoder Interface Configuration Select Hall Sensor TIM specific remapping management includes the Remapping configuration of specific timers Output Compare management This section explains how to use the TIM Driver in Output Compare Mode To use the Timer in Output Compare mode the following steps are mandatory 1 2 Enable TIM clock using RCC_APBxPeriphClockCmd RCC_APBxPeriph_TIMx ENABLE function Configure the TIM pins by configuring the corresponding GPIO pins 2 Configure the Time base unit as described in the first part of this driver if needed else the Timer will run with the default configuration Autoreload value OxFFFF Prescaler value 0x0000 Counter mode Up counting Clock Division CKD DIV1 Fill the OCinitStruct with the desired parameters including TIM Output Compare mode OCMode Output State TIM OutputState TIM Pulse value TIM Pulse Output Compare Polarity OCPolarity DocID 18540 Rev 1 523 634 General purpose timers TIM UM1061 524 634 4 5 Call TIM OCxlnit TIMx amp TIM_OCInitStruct to configure the desired channel with the corresponding configuration C
526. onalState ADC_ScanConvMode FunctionalState ADC_ContinuousConvMode uint32_t ADC_ExternalTrigConvEdge uint32_t ADC_ExternalTrigConv uint32_t ADC_DataAlign uint8_t ADC_NbrOfConversion Field Documentation uint32_t ADC_InitTypeDef ADC_Resolution Configures the ADC resolution dual mode This parameter can be a value of ADC resolution FunctionalState ADC_InitTypeDef ADC_ScanConvMode Specifies whether the conversion is performed in Scan multichannels or Single one channel mode This parameter can be set to ENABLE or DISABLE FunctionalState ADC_InitTypeDef ADC_ContinuousConvMode Specifies whether the conversion is performed in Continuous or Single mode This parameter can be set to ENABLE or DISABLE uint32_t ADC_InitTypeDef ADC_ExternalTrigConvEdge Select the external trigger edge and enable the trigger of a regular group This parameter can be a value of ADC_external_trigger_edge_for_regular_channels_conversion uint32_t ADC_InitTypeDef ADC_ExternalTrigConv Select the external event used to trigger the start of conversion of a regular group This parameter can be a value of ADC_extrenal_trigger_sources_for_regular_channels_conversion uint32_t ADC_InitTypeDef ADC_DataAlign Specifies whether the ADC data alignment is left or right This parameter can be a value of ADC_data_align uint8_t ADC_InitTypeDef ADC_NbrOfConversion Specifies the number of ADC conversions that will be done using the seguencer for r
527. onfig Function Name void SDIO ITConfig uint32 t SDIO IT FunctionalState NewState Function Description Enables or disables the SDIO interrupts Parameters SDIO specifies the SDIO interrupt sources to be enabled or disabled This parameter can be one or a combination of the following values SDIO IT CCRCFAIL Command response received CRC check failed interrupt SDIO IT DCRCFAIL Data block sent received CRC check failed interrupt SDIO IT CTIMEOUT Command response timeout interrupt SDIO IT DTIMEOUT Data timeout interrupt SDIO IT TXUNDERR Transmit FIFO underrun error interrupt SDIO IT RXOVERR Received FIFO overrun error interrupt SDIO IT CMDREND Command response received CRC check passed interrupt SDIO IT CMDSENT Command sent no response required interrupt SDIO IT DATAEND Data end data counter SDIDCOUNT is zero interrupt SDIO IT STBITERR Start bit not detected on all data signals in wide bus mode interrupt SDIO IT DBCKEND Data block sent received CRC check passed interrupt SDIO IT CMDACT Command transfer in progress interrupt SDIO IT TXACT Data transmit in progress interrupt A SDIO IT RXACT Data receive in progress interrupt SDIO IT TXFIFOHE Transmit FIFO Half Empty DocID 18540 Rev 1 Ly UM1061 Secure digital input output interface SDIO 22 2 11 2 SDIO GetFlagStatus 4 Return values Not
528. onfiguration controller SYSCFG 510 24 1 SYSCFG Firmware driver registers structures 510 12 634 DoclD 18540 Rev 1 Ly UM1061 Contents 24 1 1 510 24 2 SYSCFG Firmware driver API description 510 24241 gt AE 511 24 3 SYSCFG Firmware driver 4 513 25 General purpose timers 517 25 1 Firmware driver registers 517 25 11 517 25 1 2 519 25 13 520 25 14 ICInitTypeDef 521 25 1 5 TIM BDThInitTypeDetf 521 25 2 Firmware driver 522 25 2 1 How to use this 522 25 2 2 Output Compare 523 25 23 Input Capture 525 25 2 4 Advanced control timers TIM1 and TIM8 specific features 526 25 2 5 Interrupts DMA and flags 526 25 2 6 Clocks
529. ons misc UM1061 28 2 2 4 28 2 2 5 28 3 28 3 1 628 634 NVIC SystemLPConfig Function Name void NVIC SystemLPConfig uint8 t LowPowerMode FunctionalState NewState Function Description Selects the condition for the system to enter low power mode Parameters e LowPowerMode Specifies the new mode for the system to enter low power mode This parameter can be one of the following values LP SEVONPEND Low Power SEV on Pend SLEEPDEEP Low Power DEEPSLEEP request LP SLEEPONEXIT Low Power Sleep on Exit e NewState new state LP condition This parameter can be ENABLE or DISABLE Return values e None Notes None SysTick_CLKSourceConfig Function Name void SysTick CLKSourceConfig uint32 t SysTick CLKSource Function Description Configures the SysTick clock source Parameters e SysTick CLKSource specifies the SysTick clock source This parameter can be one of the following values SysTick CLKSource HCLK 8 AHB clock divided by 8 selected as SysTick clock source SysTick CLKSource HCLK AHB clock selected as SysTick clock source Return values e None Notes None MISC Firmware driver defines MISC Firmware driver defines MISC DoclD 18540 Rev 1 4 UM1061 Miscellaneous add on to CMSIS functions misc 28 4 4 MISC Preemption Priority Group e NVIC PriorityGroup O uint32 t 0x700 0 bits for pre emption prior
530. or RESET Notes None 9 2 7 5 DCMI_ClearlTPendingBit Function Name void DCMI_ClearlTPendingBit uint16 t IT Function Description Clears the DCMI s interrupt pending bits Parameters e IT specifies the DCMI interrupt pending bit to clear This parameter can be any combination of the following values DCMI IT FRAME Frame capture complete interrupt mask A DCMI IT OVF Overflow interrupt mask 182 634 DoclD 18540 Rev 1 Gr UM1061 Digital camera interface DCMI IT ERR Synchronization error interrupt mask DCMI IT VSYNC VSYNC interrupt mask A DCMI IT LINE Line interrupt mask Return values None Notes None 9 3 DCMI Firmware driver defines 9 3 1 DCMI Firmware driver defines 3 Mode e define DCMI CaptureMode Continuous uint16 1 0x0000 The received data are transferred continuously into the destination memory through the DMA e define DCMI CaptureMode SnapShot uint16 1 0x0002 Once activated the interface waits for the start of frame and then transfers a single frame through the DMA DCMI Capture Hate e define DCMI All Frame uint16 1 0x0000 All frames are captured e define DCMI CaptureRHate 10f2 Frame uint16 1 0x0100 Every alternate frame captured e idefine DCMI 1of4 Frame uint16 1 0x0200 One frame in 4 frames captured DCMI Extended Data Mode e de
531. or disables the wait state insertion via wait signal valid for Flash memory access in burst mode This parameter can be a value of FSMC Wait Signal uint32 t FSMC NORSRAMInitTypeDef FSMC ExtendedMode Enables or disables the extended mode This parameter can be a value of FSMC_Extended_Mode uint32 t FSMC_NORSRAMInitTypeDef FSMC_WriteBurst Enables or disables the write burst operation This parameter can be a value of FSMC Write Burst FSMC_NORSRAMTimingInitTypeDef FSMC NORSRAMInitTypeDef FSMC ReadWriteTimingStruct Timing Parameters for write and read access if the ExtendedMode is not used FSMC_NORSRAMTimingInitTypeDef FSMC_NORSRAMI6InitTypeDef FSMC_WriteTimingStruct Timing Parameters for write access if the ExtendedMode is used DoclD 18540 Rev 1 4 UM1061 Flexible static memory controller FSMC 13 1 8 FSMC_NAND_PCCARDTiminglnitTypeDef FSMC NAND PCCARDTiminglnitTypeDef is defined in the stm32f2xx_fsmc h file and contains the NAND PCCARD timing initialization parameters Data Fields e Uuint32 t FSMC SetupTime e uint32 t FSMC WaitSetupTime e uint32 t FSMC HoldSetupTime e uint32 t FSMC HiZSetupTime Field Documentation e uint32 t FSMC PCCARDTiminglnitTypeDef FSMC SetupTime Defines the number of HCLK cycles to setup address before the command assertion for NAND Flash read or write access to common Attribute or I O memory space depending on the memory space timing to be configured This para
532. or embedded systems However when it comes to developing code for safety critical applications this language has many drawbacks There are several unspecified implementation defined and undefined aspects of the C language that make it unsuited for developing safety critical systems The Motor Industry Software Reliability Association s Guidelines for the use of the C language in critical systems MISRA C 2004 1 describe a subset of the C language well suited for developing safety critical systems The STMS2F2xx standard peripheral drivers STM32F2xx StdPeriph Driver have been developed to be MISRA C 2004 compliant The following section describes how the StdPeriph Driver complies with MISRA C 2004 as described in section 4 4 Claiming compliance of the standard 1 e A compliance matrix has been completed which shows how compliance has been enforced e The whole STM32F2xx StdPeriph Driver C code is compliant with MISRA C 2004 rules Deviations are documented e A list of all instances of rules not being followed is being maintained and for each instance there is an appropriately signed off deviation e All the issues listed in section 4 2 The programming language and coding context of the standard 1 that need to be checked during the firmware development phase have been addressed during the development of the STM32F2xx standard peripherals driver and appropriate measures have been taken Compliance matrix The complia
533. ority Specifies the subpriority level for the IRQ channel specified in NVIC_IRQChannel This parameter can be a value between 0 and 15 as described in the table MISC_NVIC_Priority_Table A lower priority value indicates a higher priority FunctionalState NVIC InitTypeDef NVIC IRQChannelCmd Specifies whether the IRQ channel defined in NVIC_IRQChannel will be enabled or disabled This parameter can be set either to ENABLE or DISABLE 28 2 MISC Firmware driver API description The following section lists the various functions of the MISC library 28 2 1 How to configure Interrupts using driver 3 This section provide functions allowing to configure the NVIC interrupts IRQ The Cortex exceptions are managed by CMSIS functions DocID 18540 Rev 1 625 634 Miscellaneous add on to CMSIS functions misc UM1061 28 2 2 28 2 2 1 28 2 2 2 626 634 1 2 Configure the NVIC Priority Grouping using NVIC_PriorityGroupConfig function according to the following table The table below gives the allowed values of the pre emption priority and subpriority according to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function NVIC_PriorityGroup NVIC_IRQChannel PreemptionPriority NVIC_IRQChannel SubPriority Description NVIC_PriorityGroup_0 0 0 15 0 bits for pre emption priority 4 bits for subpriority NVIC_PriorityGroup_1 0 1 0 7 1 bits for pre emption priority 3 bits for subpriority NVIC_PriorityGroup_2 0
534. ot Parameters e SPlx To select the SPIx I2Sx peripheral where x can be 1 2 or 3 in SPI mode or 2 or 3 in 125 mode e 5 125 FLAG specifies the SPI flag to check This parameter can be one of the following values SPI 125 FLAG Transmit buffer empty flag SPI 128 FLAG RXNE Receive buffer not empty flag SPI 125 FLAG BSY Busy flag SPI 128 FLAG OVR Overrun flag SPI FLAG MODF Mode Fault flag SPI FLAG CRCERR CRC Error flag SPI 125 FLAG TIFRFE Format Error 125 FLAG Underrun Error flag 125 FLAG CHSIDE Channel Side flag Return values The new state SPI 125 FLAG SET or RESET Notes e None 23 2 11 3 SPI I2S ClearFlag Function Name void SPI 125 ClearFlag SP TypeDef uint16_t SPI_I2S_FLAG Function Description Clears the SPIx CRC Error CRCERR flag Parameters e To select the SPIx I2Sx peripheral where x be 1 2 or 3 in SPI mode or 2 3 in 125 mode SPI 125 FLAG specifies the SPI flag to clear This function clears only CRCERR flag SPI FLAG CRCERR CRC Error flag Return values e None Notes e OverRun error flag is cleared by software sequence a read operation to SPI DR register SPI 125 ReceiveData followed by a read operation to SPI SR register SPI 125 GetFlagStatus e UDR UnderRun error flag is cleared by a read operation to SPI SR register SPI 125 GetFlagStatus e MODF Mode Fault
535. ource the RTC cannot be used in STOP and STANDBY modes The maximum input clock frequency for RTC is 1MHz when using HSE as RTC clock source DocID 18540 Rev 1 4 UM1061 Reset and clock control RCC Function Name void RTCCLKCmd FunctionalState NewState Function Description Enables or disables the RTC clock Parameters e NewState new state of the RTC clock This parameter can be ENABLE or DISABLE Return values e None Notes e This function must be used only after the RTC clock source was selected using the RCC_RTCCLKConfig function 19 2 8 3 RCC BackupResetCmd Function Name void RCC BackupResetCmd FunctionalState NewState Function Description Forces or releases the Backup domain reset Parameters e NewState new state of the Backup domain reset This parameter can be ENABLE or DISABLE Return values e None Notes e This function resets the RTC peripheral including the backup registers and the RTC clock source selection in RCC CSR register e The BKPSRAM is not affected by this reset 19 2 8 4 RCC 25 3 Function Name Function Description Parameters Return values Notes void RCC_I2SCLKConfig uint32 t RCC_I2SCLKSource Configures the 125 clock source I2SCLK e RCC_1I2SCLKSource specifies the 125 clock source This parameter can be one of the following values RCC_I2S2CLKSource_PLLI2S PLLI2S clock used as 125 clock source I2S2CLKSource Ext
536. ow uint16 t CAN FilterFIFOAssignment uint8 t CAN FilterNumber uint8 t CAN FilterMode uint8 t CAN FilterScale FunctionalState CAN FilterActivation Field Documentation uint16 t CAN FilterlnitTypeDef CAN FilterldHigh Specifies the filter identification number MSBs for a 32 bit configuration first one for a 16 bit configuration This parameter can be a value between 0x0000 and OxFFFF uint16 t CAN FilterlnitTypeDef CAN FilterldLow Specifies the filter identification number LSBs for a 32 bit configuration second one for a 16 bit configuration This parameter be a value between 0x0000 and OxFFFF uint16 t CAN FilterlnitTypeDef CAN FilterMaskldHigh Specifies the filter mask number or identification number according to the mode MSBs for a 32 bit configuration first one for a 16 bit configuration This parameter can be a value between 0x0000 and OxFFFF uint16 t CAN FilterlnitTypeDef CAN FilterMaskldLow Specifies the filter mask number or identification number according to the mode LSBs for a 32 bit configuration second one for a 16 bit configuration This parameter can be a value between 0x0000 and OxFFFF uint16 t CAN FilterlnitTypeDef CAN FilterFIFOAssignment Specifies the FIFO 0 1 which will be assigned to the filter This parameter can be a value of CAN_filter_FIFO uint8 t CAN FilterlnitTypeDef CAN FilterNumber Specifies the filter which will initialized lt ranges from 0 to 13
537. ower UP 0x03 Power ON Command path state machine CPSM management functions SDIO SendCommand Function Name Function Description Parameters Return values Notes SDIO_CmdStructlnit Function Name Function Description Parameters void SDIO SendCommand SDIO CmdlnitTypeDef SDIO CmdlnitStruct Initializes the SDIO Command according to the specified parameters in the SDIO CmdlnitStruct and send the command e 5010 CmdlnitStruct pointer to a SDIO CmalnitTypeDef structure that contains the configuration information for the SDIO command None None void SDIO CmdStructlnit SDIO SDIO CmdlnitStruct Fills each SDIO CmalnitStruct member with its default value e SDIO CmdlnitStruct pointer to an SDIO CmalnitTypeDef DoclD 18540 Rev 1 459 634 Secure digital input output interface SDIO UM1061 22 2 6 3 22 2 6 4 460 634 structure which will be initialized Return values None Notes None SDIO GetCommandResponse Function Name uint8_t SDIO_GetCommandResponse void Function Description Returns command index of last command for which response received Parameters None Return values Returns the command index of the last command response received Notes e None SDIO_GetResponse Function Name uint32_t SDIO_GetResponse uint32_t SDIO_RESP Function Description Returns response received from the card for the last com
538. p acknowledge Flag e define CAN FLAG EWG uint32 1 0 10 00001 Error Warning Flag e define CAN FLAG EPV uint32 t 0x10F00002 Error Passive Flag e define CAN FLAG BOF uint32 t JOx10F00004 Bus Off Flag DocID 18540 Rev 1 113 634 Controller area network CAN UM1061 114 634 e define CAN FLAG LEC uint32 t Ox30F00070 Last error code Flag CAN identifier type e define CAN Id Standard uint32 90 00000000 Standard Id e define CAN Id Extended uint32 1 0x00000004 Extended Id e didefine CAN ID STDCAN Standard e iidefine CAN ID Id Extended CAN IniiStatus e didefine CAN InitStatus Failed uint8 1 0 00 CAN initialization failed e define CAN InitStatus Success uint8 t 0x01 CAN initialization OK e iidefine CANINITFAILEDCAN InitStatus Failed e didefine CANINITOKCAN InitStatus Success CAN interrupts e define CAN IT TME uint32 1 0x00000001 Transmit mailbox empty Interrupt e define CAN IT 2 1 0x00000002 FIFO 0 message pending Interrupt DocID 18540 Rev 1 4 UM1061 Controller area network CAN 3 e define IT FFO uint32 1 0x00000004 FIFO 0 full Interrupt e define CAN IT FOVO uint32 1 0 00000008 FIFO 0 overrun Interrupt e define CAN IT FMP1 uint32 t 0x00000010 FIFO 1 message pending Interrupt e define IT 2 t 0x00000020 1 full Interrupt e defin
539. penDrain RTC Output PC13 is configured in Open Drain mode OutputType PushPull RTC Output PC13 is configured in Push Pull mode Return values e None Notes e None 21 2 11 21 2 11 1 426 634 Interrupt and flag management functions RTC ITConfig Function Name void RTC uint32 t RTC IT FunctionalState NewState Function Description Enables or disables the specified RTC interrupts Parameters e RTC specifies the RTC interrupt sources to be enabled or disabled This parameter can be any combination of the following values IT TS Time Stamp interrupt mask IT WakeUp Timer interrupt mask IT ALRB Alarm B interrupt mask ALRA Alarm A interrupt mask IT TAMP Tamper event interrupt mask e NewState new state of the specified RTC interrupts This parameter can be ENABLE or DISABLE Return values e None Notes e None DoclD 18540 Rev 1 4 UM1061 Real time clock RTC 21 2 11 2 RTC GetFlagStatus 21 2 11 3 Function Name Function Description Parameters Return values Notes RTC ClearFlag Function Name Function Description Parameters Return values FlagStatus RTC GetFlagStatus uint32 t RTC FLAG Checks whether the specified RTC flag is set or not RTC FLAG specifies the flag to check This parameter can be one of the following values FLAG TAMP1F Tamper 1 event fla
540. ph specifies the low power mode This parameter can be any combination of the following values DBGMCU SLEEP Keep debugger connection during SLEEP mode DBGMCU STOP Keep debugger connection during STOP mode DBGMCU STANDBY Keep debugger connection during STANDBY mode e NewState new state of the specified low power mode in Debug mode This parameter can be ENABLE or DISABLE None None DoclD 18540 Rev 1 UM1061 Debug support DBGMCU 8 2 1 4 DBGMCU_APB1PeriphConfig Function Name void DBGMCU APB1PeriphConfig uint32 t DBGMCU Periph FunctionalState NewState Function Description Configures APB1 peripheral behavior when the MCU is in Debug mode Parameters e DBGMCU Beriph specifies the APB1 peripheral This parameter can be any combination of the following values DBGMCU TIM2 STOP counter stopped when Core is halted DBGMCU STOP TIM3 counter stopped when Core is halted DBGMCU 4 STOP TIM4 counter stopped when Core is halted DBGMCU TIM5 STOP TIM5 counter stopped when Core is halted DBGMCU TIM6 STOP TIM6 counter stopped when Core is halted DBGMCU STOP counter stopped when Core is halted DBGMCU TIM12 STOP TIM12 counter stopped when Core is halted DBGMCU TIM13 STOP TIM13 counter stopped when Core is halted DBGMCU 14 STOP TIM14 counter stopped when Core is halted DBGMCU RTC STOP
541. phClockCmd RCC_APB2Periph_ADCx ENABLE 2 ADC pins configuration a Enable the clock for the ADC GPIOs using the following function RCC_AHB1PeriphClockCmd RCC_AHB1Periph_GPIOx ENABLE b Configure these ADC pins in analog mode using GPIO_Init 3 Configure the ADC Prescaler conversion resolution and data alignment using the ADC_Init function 4 Activate the ADC peripheral using ADC_Cmd function e Regular channels group configuration To configure the ADC regular channels group features use ADC_Init and ADC RegularChannelConfig functions To activate the continuous mode use the ADC_continuousModeCmd function To configurate and activate the Discontinuous mode use the ADC DiscModeChannelCountConfig and ADC DiscModeCmd functions read the ADC converted values use the ADC GetConversionValue function e Multi mode ADCs Regular channels configuration Refer to Regular channels group configuration description to configure the ADC1 ADC2 and ADC3 regular channels Select the Multi mode ADC regular channels features dual or triple mode using ADC Commonlnit function and configure the DMA mode using ADC MultiModeDMARequestAfterLastTransferCmd functions DoclD 18540 Rev 1 53 634 Analog to digital converter ADC UM1061 3 2 2 54 634 A Read the ADCs converted values using the ADC GetMultiModeConversionValue function DMA for Regular channels group features configuration
542. phase and DMA GetlTStatus function into interrupt routines in communication phase Optionally if Circular mode and Double Buffer mode are enabled you can modify the Memory Addresses using the function DMA MemoryTargetConfig Make sure that the Memory Address to be modified is not the one currently in use by DMA Stream This condition can be monitored using the function DMA GetCurrentMemoryTarget Optionally Pause Resume operations may be performed The Cmd function may be used to perform Pause Resume operation When a transfer is ongoing calling this function to disable the Stream will cause the transfer to be paused All configuration registers and the number of remaining data will be preserved When calling again this function to re enable the Stream the transfer will be resumed from the point where it was paused the Peripheral registers In this mode Circular mode and Double Buffer mode are Memory to Memory transfer is possible by setting the address of the memory into not allowed The FIFO is used to reduce bus usage allow data 190 634 packing unpacking it is possible to set different Data Sizes for the Peripheral and the Memory ie you can set Half Word data size for the peripheral to access its data register and set Word data size for the Memory to gain in access time Each two Half words will be packed and written in a single access to a Word in the Memory DocID 18540 Rev
543. ption Clears the I2Cx s interrupt pending bits Parameters e Return values Notes 328 634 I2Cx where x be 1 2 or 3 to select the 2 peripheral I2C specifies the interrupt pending bit to clear This parameter can be any combination of the following values 2C_IT_SMBALERT SMBus Alert interrupt 2C TIMEOUT Timeout or error interrupt 2C IT PECERR PEC error in reception interrupt 2C IT Overrun Underrun interrupt Slave mode 12 IT Acknowledge failure interrupt 2C IT ARLO Arbitration lost interrupt Master mode IC IT Bus error interrupt None STOPF STOP detection is cleared by software sequence a read operation to I2C SR1 register 2 GetlTStatus followed by a write operation to 2 register I2C_Cmd 0 18540 Rev 1 971 UM1061 Inter integrated circuit interface I2C 16 3 16 3 1 3 to re enable the 12C peripheral e ADD10 10 bit header sent is cleared by software sequence a read operation to 2 SR1 I2C GetlTStatus followed by writing the second byte of the address in 2 DR register e BTF Byte Transfer Finished is cleared by software sequence a read operation to I2C SH1 register 2 GetlTStatus followed by a read write to 2 DR register 2 SendData Address sent is cleared by software sequence read operation to 12C SR1 register 12
544. r DoclD 18540 Rev 1 UM1061 Cryptographic processor CRYP e CRYP_Delnit e CRYP Init e CRYP Siructinit Keylnit CRYP_KeyStructinit CRYP e IVStructinit CRYP_FIFOFlush CRYP_Cmd CRYP Data processing functions This section provides functions allowing the encryption and decryption operations Enter data to be treated the IN FIFO using CRYP_Dataln function e Get the data result from the OUT FIFO using CRYP_DataOut function The data processing functions are the following CRYP e CRYP_DataOut Context swapping functions This section provides functions allowing to save and store CRYP Context It is possible to interrupt an encryption decryption key generation process to perform another processing with a higher priority and to complete the interrupted process later on when the higher priority task is complete To do so the context of the interrupted task must be saved from the CRYP registers to memory and then be restored from memory to the CRYP registers 1 save the current context use CRYP_SaveContext function 2 Torestore the saved context use CRYP_RestoreContext function e CRYP SaveContexl CHYP RestoreContext CRYP DMA interface Configuration function This section provides functions allowing to configure the DMA interface for CRYP data input and output transfer When the DMA mode is enabled using the CRYP_DMACmd
545. r e define DAC Trigger T2 TRGO uint32 1 0 00000024 TIM2 TRGO selected as external conversion trigger for DAC channel e define DAC Trigger T4 TRGO uint32 t 0x0000002C TIM4 TRGO selected as external conversion trigger for DAC channel e define DAC Trigger T5 TRGO uint32 1 0x0000001 C TIM5 TRGO selected as external conversion trigger for DAC channel e define DAC Trigger T6 TRGO uint32 1 0 00000004 TIM6 TRGO selected as external conversion trigger for DAC channel DocID 18540 Rev 1 4 UM1061 Digital to analog converter DAC 7 4 3 e define DAC_Trigger_T7_TRGO uint32_t 0x00000014 TIM7 TRGO selected as external conversion trigger for DAC channel e define DAC Trigger T8 TRGO uint32 t 0x0000000C TIM8 TRGO selected as external conversion trigger for DAC channel e DAC Trigger Ext IT9 uint32 1 0 00000034 EXTI Line9 event selected as external conversion trigger for DAC channel e idefine DAC Trigger Software uint32 1 0 0000003 Conversion started by software trigger for DAC channel DAC wave generation e define DAC WaveGeneration None uint32 1 0 00000000 e didefine DAC WaveGeneration Noise uint32 1 0 00000040 e define DAC WaveGeneration Triangle uint32 1 0 00000080 e define DAC Wave Noise uint32 t 0x00000040 e define DAC Wave Triangle uint32 1 0 00000080 DAC Programming Example The example below explains how to generate Triangle wave using t
546. rMode CenterAligned2 uint16 1 0x0040 CounterMode CenterAlignedS3 uint16 1 0x0060 TIM DMA Base address e define e define e define e define e define e define e define DMABase CHi uint16 t 0x0000 DMABase CH2 uint16 t 0x0001 DMABase SMChR uint16 1 0 0002 DMABase DIER uint16 1 0 0003 DMABase ShR uint16 1 0 0004 DMABase EGh uint16 1 0x0005 DMABase CCMR 1 uint16 1 0x0006 DocID 18540 Rev 1 4 UM1061 General purpose timers TIM 3 define define define define define define define define define define define define TIM DMABase CCMR2 uint16 1 0x0007 TIM DMABase CCER uint16 t 0x0008 DMABase CNT uint16 1 0 0009 DMABase PSC uint16 1 0x000A DMABase 6 1 0x000B DMABase RCh uint16 1 0x000C DMABase CCH uint16 1 0 0000 DMABase CCR2 uint16 1 0 000 DMABase CCR3 uint16 1 0 000 DMABase CCR4 uint16 t 0x0010 DMABase BDThR uint16 1 0x001 1 DMABase DCh uint16 1 0x0012 DocID 18540 Rev 1 571 634 General purpose timers TIM UM1061 572 634 e define TIM_DMABase_OR uint16_t 0x0013 TIM DMA Burst Length e define e define e define e define e define e define e define e define e define e define e
547. ral to hash data using HMAC SHA 1 Algorithm For more examples about HASH configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Projects TM32F2xx StdPeriph Examples HASHN f 3Ximeluees sss aaaeeaaa anma ca ccce s finclude stm32f2xx h DoclD 18540 Rev 1 307 634 Hash processor HASH UM1061 clefime define INPUT TAB SIZE uint32_t 40 define KEY SIZE Quae 92 ic 210 Preivate variablas 5 308 634 uint8 t pBuff INPUT TAB SIZE 0x54 0x68 0x65 0x20 0x68 0x61 0x73 0x608 055220 O70 0 7 2 05205167 05263 O65 03 7 57 QS E 02 5 0x20 O69 05573 O20 Ox61 02220 0667 0x175 0 00 0 0 O20 0x637 0 uint8 t pKey KEY TAB SIZE pur Private functions 10x547 0x687 0x657 0x207 0x687 Wi 71026977 O20 07O 0572 05012 055653 05059 0573 xa 020 069r 020r 0207 0667 0x75 06e Oe O79 020r c 6 OxGel Ox7 0 Ox6e Ox 59 7 Ox ge 7 4b O20 brief Main program param None retval None 2 int main void WASH uox RCC AHB2PeriphClockCmd RCC AHB2Periph HASH ENABLE
548. rameter correctly to not exceed 192 MHz on the 126 clock frequency void RCC PLLI2SCmd FunctionalState NewState Enables or disables the PLLI2S e NewState new state of the PLLI2S This parameter can be ENABLE or DISABLE None e PLLI2S is available only RevisionB and RevisionY e The PLLI2S is disabled by hardware when entering STOP DocID 18540 Rev 1 Gr UM1061 Reset and clock control RCC and STANDBY modes 19 2 6 12 RCC ClockSecuritySystemCmd 19 2 613 RCC_MCO1Config 4 Function Name Function Description Parameters Return values Notes Function Name Function Description Parameters void RCC ClockSecuritySystemCmd FunctionalState NewState Enables or disables the Clock Security System NewState new state of the Clock Security System This parameter can be ENABLE or DISABLE None If a failure is detected on the HSE oscillator clock this oscillator is automatically disabled and an interrupt is generated to inform the software about the failure Clock Security System Interrupt CSSI allowing the MCU to perform rescue operations The CSSI is linked to the Cortex M3 NMI Non Maskable Interrupt exception vector void RCC MCO1Config uint32 t RCC MCO1Source uint32 t RCC MCOn1Div Selects the clock source to output on MCO1 pin PA8 MCO1Source specifies the clock source to output This parameter can be one of the following values MCO1Source
549. rameters Return values Notes None An ErrorStatus enumeration value SUCCESS HSE oscillator is stable and ready to use ERROR HSE oscillator not yet ready This functions waits on HSERDY flag to be set and return SUCCESS if this flag is set otherwise returns ERROR if the timeout is reached and this flag is not set The timeout value is defined by the constant HSE_STARTUP_TIMEOUT in stm32f2xx h file You can tailor it depending on the HSE crystal used in your application RCC AdgjustHSICalibrationValue Function Name void RCC_AdjustHS CalibrationValue uint8 t HSICalibrationValue Function Description Adjusts the Internal High Speed oscillator HSI calibration value DoclD 18540 Rev 1 UM1061 Reset and clock control RCC Parameters Return values Notes 19 2 6 5 RCC_HSICmd Function Name Function Description Parameters Return values Notes 19 2 6 6 RCC LSEConfig Function Name Function Description Parameters e HSiCalibrationValue specifies the calibration trimming value This parameter must be a number between 0 and Ox1F None e Thecalibration is used to compensate for the variations in voltage and temperature that influence the frequency of the internal HSI RC void RCC HSICmd FunctionalState NewState Enables or disables the Internal High Speed oscillator HSI e NewState new state of the HSI This parameter can be ENABLE or DISABLE None
550. rameters e ADCx where x be 1 2 or 3 to select the ADC peripheral Return values e None Notes e None 3 2 7 3 ADC_GetSoftwareStartConvStatus Function Name FlagStatus ADC_GetSoftwareStartConvStatus ADC_TypeDef ADCx Function Description Gets the selected ADC Software start regular conversion Status Parameters e ADCx where x be 1 2 or 3 to select the ADC peripheral Return values The new state ADC software start conversion SET RESET Notes e None 3 2 7 4 ADC_EOCOnEachRegularChannelCmd Function Name void ADC_EOCOnEachRegularChannelCmd ADC_TypeDef ADCx FunctionalState NewState Function Description Enables or disables the EOC on each regular channel conversion Parameters e ADCx where x can be 1 2 or 3 to select the ADC peripheral e NewState new state of the selected ADC EOC flag rising This parameter can be ENABLE or DISABLE Return values e None 64 634 DocID 18540 Rev 1 4 UM1061 Analog to digital converter ADC Notes None 3 2 7 5 ADC_ContinuousModeCmd Function Name void ADC_ContinuousModeCmd ADC_TypeDef ADCx FunctionalState NewState Function Description Enables or disables the ADC continuous conversion mode Parameters e Return values Notes ADCx where x can be 1 2 or 3 to select the ADC peripheral NewState new state of the selected ADC continuous conversion mode This parameter can be ENABLE or DISABLE None None 3 2 7 6 ADC Dis
551. ration Reset RTC StoreOperation Set None Output pin Configuration function RTC OutputConfig Function Name Function Description Parameters Return values Notes void RTC OutputConfig uint32 t RTC Output uint32 t RTC OutputPolarity Configures the RTC output source AFO ALARM RTC Output Specifies which signal will be routed to the RTC output This parameter can be one of the following values Output Disable No output selected Output AlarmA signal of AlarmA mapped to output Output AlarmB signal of AlarmB mapped to output Output WakeUp signal of WakeUp mapped to output RTC OutputPolarity Specifies the polarity of the output signal This parameter can be one of the following RTC OultputPolarity High The output pin is high when the ALRAF ALRBF WUTF is high depending on OSEL OultputPolarity Low The output pin is low when the ALRAF ALRBF WUTF is high depending on OSEL None None Coarse Calibration configuration functions RTC CoarseCalibConfig Function Name ErrorStatus RTC_CoarseCalibConfig uint32 t DocID 18540 Rev 1 UM1061 Real time clock RTC RTC CalibSign uint32 t Value Function Description Configures the Coarse calibration parameters Parameters e RTC CalibSign specifies the sign of the coarse calibration value This parameter can be one of the following values CalibSign Pos
552. rding to the specified parameters in the e TIMx where x be 1 2 3 4 5 8 9 or 12 to select the TIM peripheral e TIM OCiInitStruct pointer to OCInitTypeDef structure that contains the configuration information for the specified TIM peripheral None None void TIM_OC3lnit TypeDef TIM_OCInitTypeDef OCInitStruct Initializes the Channel3 according to the specified parameters in the e where x be 1 2 3 4 5 or 8 to select the TIM peripheral e TIM OCiInitStruct pointer to a OCInitTypeDef structure that contains the configuration information for the specified TIM peripheral None None void _ 41 TypeDef TIM_OCInitTypeDef OCInitStruct Initializes the TIMx Channel4 according to the specified parameters in the e where x be 1 2 3 4 5 or 8 to select the TIM peripheral e OCInitStruct pointer to a OCInitTypeDef structure that contains the configuration information for the DocID 18540 Rev 1 UM1061 General purpose timers TIM specified TIM peripheral Return values None Notes None 25 2 10 5 Function Name void OCStructinit OClInitTypeDef OCInitStruct Function Des
553. re is currently processing a block of data or a key preparation for AES decryption This Flag is cleared only by hardware To clear it the CRYP core must be disabled and the last processing has completed Interrupts e CRYP IT INI The input FIFO service interrupt is asserted when there are less than 4 words in the input FIFO This interrupt is associated to CRYP FLAG INRIS flag This interrupt is cleared by performing write operations to the input FIFO until it holds 4 or more words The input FIFO service interrupt INMIS is enabled with the CRYP enable bit Consequently when CRYP is disabled the INMIS signal is low even if the input FIFO is empty CRYP_IT_OUTI The output FIFO service interrupt is asserted when there is one or more 32 bit word data items in the output FIFO This interrupt is associated to CRYP_FLAG_OUTRIS flag This interrupt is cleared by reading data from the output FIFO until there is no valid 32 bit word left that is the interrupt follows the state of the OFNE output FIFO not empty flag Managing the CRYP controller events The user should identify which mode will be used in his application to manage the CRYP controller events Polling mode or Interrupt mode In the Polling Mode it is advised to use the CRYP_GetFlagStatus function to check if flags events occurred The CRYPT flags do not need to be cleared since they are cleared as soon as the associated event are reset In the Interrupt Mode it is
554. re management 4 To use the Timer in Input Capture mode the following steps are mandatory 1 2 3 Enable TIM clock using RCC APBxPeriphClockCmd RCC APBxPeriph TIMx ENABLE function Configure the TIM pins by configuring the corresponding GPIO pins Configure the Time base unit as described in the first part of this driver if needed else the Timer will run with the default configuration Autoreload value OxFFFF Prescaler value 0x0000 Counter mode Up counting Clock Division CKD DIV1 Fill the TIM_ICInitStruct with the desired parameters including Channel Channel Input Capture polarity TIM ICPolarity Input Capture selection ICSelection Input Capture Prescaler ICPrescaler TIM Input CApture filter value TIM ICFilter Call ICInit TIMx ICInitStruct to configure the desired channel with the corresponding configuration and to measure only frequency or duty cycle of the input signal or call TIM PWMIConfig TIMx amp TIM IClInitStruct to configure the desired channels with the corresponding configuration and to measure the frequency and the duty cycle of the input signal Enable the NVIC or the DMA to read the measured frequency Enable the corresponding interrupt or DMA request to read the Captured value using the function ITConfig TIMx IT or Call the TI
555. recent received data by the 2 peripheral Parameters e 2 where x be 1 2 3 to select the 12C peripheral Return values The value of the received data Notes e None 16 2 9 PEC management functions 16 2 9 1 2 TransmitPEC Function Name void 2 TransmitPEC 2C TypeDef 2 FunctionalState NewState Function Description Enables or disables the specified 2 PEC transfer Parameters e 2 where x can be 1 2 or 3 to select the 12C peripheral e NewState new state of the 2 PEC transmission This parameter can be ENABLE or DISABLE Return values None Notes None 16 2 9 2 12C PECPositionConfig Gr DoclD 18540 Rev 1 321 634 Inter integrated circuit interface 12C UM1061 16 2 9 3 16 2 9 4 322 634 Function Name Function Description Parameters Return values Notes I2C_CalculatePEC Function Name Function Description Parameters Return values Notes 2 Description Parameters void I2C PECPositionConfig 2C_TypeDef I2Cx uint16_t I2C_PECPosition Selects the specified 12C PEC position I2Cx where x be 1 2 or 3 to select the 12C peripheral I2C_PECPosition specifies the PEC position This parameter can be one of the following values 2C_PECPosition_Next indicates that the next byte is PEC 2C PECPosition Current indicates that current
556. red with PSIZE bits or by a fixed offset equal to 4 32 bit aligned addresses Parameters e DMAy Streamx where y can be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream specifies the Peripheral increment offset size This parameter can be one of the following values DMA PINCOS Psize Peripheral address increment is done accordingly to PSIZE parameter DMA PINCOS WordAligned Peripheral address increment offset is fixed to 4 32 bit aligned addresses Return values e None Notes e This function has no effect if the Peripheral Increment mode is disabled 10 2 4 6 FlowControllerConfig Function Name void DMA FlowControllerConfig DVA Stream TypeDef Streamx uint32 t FlowCtrl Function Description Configures when the DMAy Streamx is disabled the flow controller for the next transactions Peripheral or Memory Parameters e DMAy Streamx where y can be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream e FlowCtrl specifies the DMA flow controller This parameter can be one of the following values DMA FlowCtrl Memory DMAy Streamx transactions flow controller is the DMA controller DMA FlowCtrl Peripheral DMAy Streamx transactions flow controller is the peripheral Return values e None Notes e Before enabling this feature check if the used peripheral supports the Flow Controller mode or not 196 634 18
557. reload Function Description Enables or disables the TIMx peripheral Preload register on CCR4 Parameters TIMx where x be 1 2 3 4 5 or 8 to select the peripheral TIM_OCPreload new state of the TIMx peripheral Preload register This parameter can be one of the following values TIM OCPreload Enable TIM OCPreload Disable Return values e None Notes e None 25 2 10 19 OC1FastConfig Function Name void OC1FastConfig TIM_TypeDef TIMx uint16 t TIM OCFast Function Description Configures the TIMx Output Compare 1 Fast feature Parameters TIMx where x can be 1 to 14 except 7 to select the TIM peripheral e OCFast new state of the Output Compare Fast Enable Bit This parameter can be one of the following values TIM OCFast Enable TIM output compare fast enable TIM OCFast Disable TIM output compare fast disable Return values e None Notes e None 25 2 10 20 TIM OC2FastConfig Ly 18540 Rev 1 541 634 General purpose timers TIM UM1061 Function Name void TIM OC2FastConfig TypeDef TIMx uint16 t TIM OCFast Function Description Configures the TIMx Output Compare 2 Fast feature Parameters e TIMx where x can be 1 2 3 4 5 8 9 or 12 to select the TIM peripheral e TIM OCFast new state of the Output Compare Fast Enable Bit This parameter can be one of the following values TIM Enable TIM output compare
558. res the analog watchdog guarded single channel ADCx where x can be 1 2 or 3 to select the ADC peripheral e ADC Channel the ADC channel to configure for the analog watchdog This parameter can be one of the following values Function Description Parameters e Return values Notes ADC Channel 0 Channel 1 ADC Channel 2 ADC Channel 3 Channel 4 ADC Channel 5 ADC Channel 6 ADC Channel 7 ADC Channel 8 ADC Channel 9 ADC Channel 10 Channel 11 ADC Channel 12 ADC Channel 13 Channel 14 ADC Channel 15 Channel 16 ADC Channel 17 Channel 18 DociD 18540 Rev 1 ADC Channel0 selected ADC Channel1 selected ADC Channel selected ADC Channel3 selected ADC Channel4 selected ADC Channel5 selected ADC Channel6 selected ADC Channel7 selected ADC Channel8 selected ADC Channel9 selected ADC Channel10 selected ADC Channel11 selected ADC Channel12 selected ADC Channel13 selected ADC Channel14 selected ADC Channel15 selected ADC Channel16 selected ADC Channel17 selected ADC Channel18 selected Analog to digital converter ADC UM1061 3 2 6 Temperature Sensor Vrefint Voltage Reference internal 3 2 6 1 ADC_TempSensorVrefintCmd Function Name void ADC_TempSensorVrefintCmd FunctionalState NewSiate Function Description Enables or disables the temperature sensor and Vrefint chan
559. ress offset 0x14 JO uint32 t RCC_TypeDef AHB3RSTR RCC peripheral reset register Address offset 0x18 uint32 t RCC_TypeDef RESERVEDO Reserved 0x1C JO uint32 t RCC_TypeDef APB1RSTR RCC 1 peripheral reset register Address offset 0 20 JO uint32 t RCC_TypeDef APB2RSTR RCC APB2 peripheral reset register Address offset 0x24 uint32 t RCC_TypeDef RESERVED1 2 Reserved 0x28 0x2C IO uint32 t RCC_TypeDef AHB1ENR peripheral clock register Address offset 0x30 JO uint32 t RCC_TypeDef AHB2ENR 2 peripheral clock register Address offset 0x34 JO uint32 t RCC RCC peripheral clock register Address offset 0x38 uint32 t RCC_TypeDef RESERVED2 Reserved 0x3C IO uint32 t RCC_TypeDef APB1ENR 1 peripheral clock enable register Address offset 0x40 JO uint32 t RCC_TypeDef APB2ENR RCC APB2 peripheral clock enable register Address offset 0x44 uint32 t RCC TypeDef RESERVED3 2 Reserved 0x48 0x4C JO uint32 t RCC_TypeDef AHB1LPENR AHB1 peripheral clock enable in low power mode register Address offset 0x50 __10 uint32 t RCC_TypeDef AHB2LPENR 2 peripheral clock enable in low power mode register Address offset 0x54 JO uint32_t RCC_TypeDef AHB3LPENR RCC peripheral clock enable low power mode register Address offset 0x58 uin
560. ription Encrypt and decrypt using DES in ECB Mode Parameters e Mode encryption or decryption Mode This parameter can be one of the following values MODE ENCRYPT Encryption MODE DECRYPT Decryption e Key Key used for DES algorithm e length length of the Input buffer must be a multiple of 8 e Input pointer to the Input buffer e Output pointer to the returned buffer Return values An ErrorStatus enumeration value DoclD 18540 Rev 1 4 UM1061 Cryptographic processor CRYP Notes 6 2 12 2 CRYP DES CBC Function Name Function Description Parameters Return values Notes SUCCESS Operation done ERROR Operation failed None ErrorStatus CRYP DES CBC uint8_t Mode uint8_t Key uint8 t InitVectors uint8 t Input uint32 t length uint8 t Output Encrypt and decrypt using DES in CBC Mode e Mode encryption or decryption Mode This parameter can be one of the following values MODE ENCRYPT Encryption MODE DECRYPT Decryption Key Key used for DES algorithm InitVectors Initialisation Vectors used for DES algorithm llength length of the Input buffer must be a multiple of 8 Input pointer to the Input buffer Output pointer to the returned buffer An ErrorStatus enumeration value SUCCESS Operation done ERROR Operation failed None 6 3 CRYP Firmware driver defines 6 3 1 CRYP Firmware driver defines CRYP CRYP Algorithm Direction e
561. rn values Notes void NVIC_PriorityGroupConfig uint32 t NVIC PriorityGroup Configures the priority grouping pre emption priority and subpriority NVIC SetVectorTable Function Name Function Description Parameters Return values Notes NVIC PriorityGroup specifies the priority grouping bits length This parameter can be one of the following values PriorityGroup 0 0 bits for pre emption priority 4 bits for subpriority PriorityGroup 1 1 bits for pre emption priority bits for subpriority PriorityGroup 2 2 bits for pre emption priority 2 bits for subpriority PriorityGroup 3 bits for pre emption priority 1 bits for subpriority PriorityGroup 4 4 bits for pre emption priority 0 bits for subpriority None When the NVIC PriorityGroup 0 is selected IRQ pre emption is no more possible The pending IRQ priority will be managed only by the subpriority void NVIC SetVectorTable uint32 t NVIC VectTab uint32 t Offset Sets the vector table location and Offset NVIC VectTab specifies if the vector table is in RAM or FLASH memory This parameter can be one of the following values VectTab RAM Vector Table in internal SRAM NVIC VectTab FLASH Vector Table in internal FLASH Offset Vector Table base offset field This value must be a multiple of 0x200 None None DoclD 18540 Rev 1 627 634 Miscellaneous add on to CMSIS functi
562. rn values None Notes None 18540 Rev 1 405 634 Random number generator RNG UM1061 20 2 6 20 2 6 1 20 2 7 20 2 7 1 406 634 Get 32 bit Random number function RNG_GetRandomNumber Function Name uint32_t RNG_GetRandomNumber void Function Description Returns a 32 bit random number Parameters Return values Notes None 32 bit random number Before to call this function you have to wait till DRDY data ready flag is set using RNG_GetFlagStatus RNG_FLAG_DRDY function Each time the the Random number data is read using RNG GetRandomNumber function the RNG FLAG DRDY flag is automatically cleared In the case of a seed error the generation of random numbers is interrupted for as long as the SECS bit is 1 If a number is available in the RNG DR register it must not be used because it may not have enough entropy In this case it is recommended to clear the SEIS bit using ClearFlag RNG SECS function then disable and enable the RNG peripheral using RNG_Cmd function to reinitialize and restart the RNG In the case of a clock error the RNG is no more able to generate random numbers because the PLL48CLK clock is not correct User have to check that the clock controller is correctly configured to provide the RNG clock and clear the CEIS bit using ClearFlag RNG FLAG CECS function The clock error has no impact on the previously generated random numb
563. rn values None Notes None DCMI JPEGCmd Function Name void DCMI JPEGCmd FunctionalState NewState Function Description Enables or disables the DCMI JPEG format Parameters e NewState new state of the DCMI JPEG format This parameter can be ENABLE or DISABLE Return values None Notes The Crop and Embedded Synchronization features cannot be used in this mode Image capture functions DCMI Cmd Function Name void DCMI Cmd FunctionalState NewState Function Description Enables or disables the DOMI interface Parameters NevwState new state of the DOMI interface This parameter can be ENABLE or DISABLE Return values e None Notes e None DoclD 18540 Rev 1 179 634 Digital camera interface UM1061 9 2 6 2 9 2 6 3 9 2 7 9 2 7 1 180 634 DCMI_CaptureCmd Function Name Function Description Parameters Return values Notes DCMI_ReadData Function Name Function Description Parameters Return values Notes void DCMI CaptureCmd FunctionalState NewState Enables or disables the DCMI Capture e NewState new state of the DCMI capture This parameter can be ENABLE or DISABLE None None uint32_t DCMI ReadData void Reads the data stored in the DR register e None Data register value None Interrupt and flag management functions Function Name Function Description Parameters void
564. rs Return values Notes Function Name Function Description Parameters void TIM OC1NPolarityConfig T M_TypeDef TIMx uint16 t TIM OCNPolarity Configures the TIMx Channel 1N polarity TIMx where x can be 1 or 8 to select the TIM peripheral TIM OCNPolarity specifies the OC1N Polarity This parameter can be one of the following values TIM OCNPolarity High Output Compare active high TIM OCNPolarity Low Output Compare active low None None void TIM OC2PolarityConfig TypeDef TIMx uint16 t TIM OCPolarity Configures the TIMx channel 2 polarity TIMx where can be 1 2 3 4 5 8 9 12 to select the TIM peripheral TIM OCPolarity specifies the OC2 Polarity This parameter can be one of the following values DoclD 18540 Rev 1 545 634 General purpose timers TIM UM1061 TIM OCPolarity High Output Compare active high TIM OCPolarity Low Output Compare active low Return values None Notes None 25 2 10 30 TIM_OC2NPolarityConfig 25 2 10 31 546 634 Function void TIM OC2NPolarityConfig TypeDef TIMx uint16 t TIM OCNPolarity Function Description Configures the TIMx Channel 2N polarity Parameters e TIMx where x can be 1 or 8 to select the TIM peripheral e TIM OCNPolarity specifies the OC2N Polarity This parameter can be one of the following values TIM OCNPolarity High Output Compare active high TIM OCNPolarity Low
565. ry also enters power down mode when the device enters Stop mode When the Flash memory is in power down mode an additional startup delay is incurred when waking up from Stop mode e PWR_FlashPowerDownCmd Low Power modes configuration functions The devices feature 3 low power modes e Sleep mode Cortex M3 core stopped peripherals kept running e Stop mode all clocks are stopped regulator running regulator in low power mode e Standby mode 1 2V domain powered off Sleep mode e Entry The Sleep mode is entered by using the __WFI or WFE functions e Exit Any peripheral interrupt acknowledged by the nested vectored interrupt controller NVIC can wake up the device from Sleep mode Stop mode In Stop mode all clocks in the 1 2V domain are stopped the PLL the HSI and the HSE RC oscillators are disabled Internal SRAM and register contents are preserved The voltage regulator can be configured either in normal or low power mode To minimize the consumption In Stop mode FLASH can be powered off before entering the Stop mode It DoclD 18540 Rev 1 345 634 Power control PWR UM1061 346 634 can be switched on again by software after exiting the Stop mode using the PWR_FlashPowerDownCmd function Entry The Stop mode is entered using the PWR_EnterSTOPMode PWR_Regulator_LowPower function with regulator in LowPower or with Regulator ON e Exit Any EXTI Line Internal or External configured in Interrupt Ev
566. ry controller FLASH Flash memory GPIO General purpose 1 0 HASH Hash processor Fe Inter integrated circuit 25 Inter integrated sound IWDG Independent watchdog NVIC Nested vectored interrupt controller PWR Power control RCC Reset and clock controller RNG Random number generator RTC Real time clock SDIO SDIO interface SPI Serial peripheral interface SysTick System tick timer TIM Advanced control general purpose or basic timer USART Universal synchronous asynchronous receiver transmitter DocID 18540 Rev 1 3 UM1061 STM32F2xx Standard Peripheral Library Acronym Peripheral unit WWDG Window watchdog 1 1 2 Naming conventions 3 The following naming conventions are used in the library PPP refers to any peripheral acronym for example ADC See Section 1 1 Coding rules and conventions for more information System and source header file names are preceded by stm32f2xx_ for example stm32f2xx_conf h Constants used in one file are defined within this file A constant used in more than one file is defined in a header file All constants are written in upper case except for peripheral driver function parameters typedef variable names should be suffixed with TypeDef Registers are considered as constants In most cases their name is in upper case and uses the same acronyms as in the STM32F2xx reference manual document Peripheral registers are declared in the PPP_TypeDef structure e g
567. s 167 8 1 1 DBGMOU TypebDetf 167 8 2 DBGMCU Firmware driver description 167 8 2 1 Sa TA KAA EEUU 167 8 3 DBGMCU Firmware driver defines 170 9 Digital camera interface DCMI 173 9 1 DCMI Firmware driver registers structures 173 9 1 1 173 9 1 2 etes 174 9 1 3 DCMI 174 9 1 4 175 9 2 DCMI Firmware driver description 175 9 2 1 How to use this driver 175 9 2 2 Initialization and configuration 2 176 9 2 3 image capture AA 176 9 2 4 Interrupt and flag 176 9 2 5 Initialization and configuration 177 9 2 6 Image capture functions 179 9 2 7 Interrupt and flag management 180 9 3 DCMI Firmware driver 5 183 9 3 1 DCMI Firmware driver 2 183 9 4 DCMI Programming 186 10 DMA controller DMA
568. s uint8 t ICAN ModeSitatus Failed DocID 18540 Rev 1 4 UM1061 Controller area network CAN 3 entering the specific mode Succeed CAN receive FIFO number constants e define CAN 8 t 0x00 0 used to receive e define CAN 8 1 0x01 CAN FIFO 1 used to receive CAN remote transmission request e define CAN Data uint32 1 0 00000000 Data frame e define CAN Remote uint32 1 0x00000002 Remote frame e iidefine CAN RTR DATACAN Data e idefine REMOTECAN RTR Remote CAN sleep constants e define CAN Sleep Failed uint8 1 0 00 CAN did not enter the sleep mode e define CAN Sleep Ok uint8 t 0x01 CAN entered the sleep mode define CANSLEEPFAILEDCAN Sleep Failed e define CANSLEEPOKCAN Sleep Ok CAN synchronisation jump width DoclID 18540 Rev 1 117 634 Controller area network CAN UM1061 e define CAN_SJW_1tq uint8_t 0x00 1 time quantum e define CAN SJW 2tq uint8 t 0x01 2 time quantum e define SJW Stq uint8 1 0 02 3 time quantum e define CAN SJW 4tq uint8 t 0x03 4 time quantum CAN time quantum in bit segment 1 e define CAN BS1 Ttq uint8 t 0x00 1 time quantum e define CAN BS1 21 8 1 0 01 2 time quantum e define BS1 8 1 0 02 3 time quantum e define CAN BS1 4tq uint8 1 0 03
569. s Multiplexing e didefine FSMC DataAddressMux Disable uint32 1 0 00000000 e define FSMC DataAddressMux Enable uint32 1 0 00000002 FSMC Data Width e define FSMC MemoryDataWidth 8b uint32 1 0 00000000 DocID 18540 Rev 1 4 UM1061 Flexible static memory controller FSMC 3 e define FSMC MemoryDataWidth 16b uint32 1 0x00000010 FSMC ECC ECC Disable uint32 1 0 00000000 e define FSMC ECC Enable uint32 t 0x00000040 FSMC ECC Page Size e define FSMC ECCPageSize 256Bytes uint32 1 0x00000000 e define FSMC ECCPageSize 512Bytes uint32 1 0x00020000 e define FSMC ECCPageSize 1024Bytes uint32 1 0 00040000 e define FSMC ECCPageSize 2048Bytes uint32 1 0x00060000 e define FSMC ECCPageSize 4096Bytes uint32 1 0x00080000 e define FSMC ECCPageSize 8192Bytes uint32 1 0x000A0000 FSMC Extended Mode e didefine FSMC ExtendedMode Disable uint32 t 0x00000000 e define FSMC ExtendedMode Enable uint32 t 0x00004000 DocID 18540 Rev 1 269 634 Flerible static memory controller FSMC UM1061 270 634 FSMC Flags e define FSMC_FLAG_RisingEdge uint32_t 0x00000001 e define FSMC_FLAG_Level uint32_t O0x00000002 e define FSMC FLAG FallingEdge uint32 t 0x00000004 e FLAG FEMPT uint32 t 0x00000040 FSMC Interrupt sources e define FSMC IT RisingEdge uint32 t 0x00000008 e FSMC IT Level uint32 1 0
570. s have been correctly copied into the RTC_TR and RTC_DR shadow DoclD 18540 Rev 1 423 634 Real time clock RTC UM1061 21 2 8 8 21 2 9 21 2 9 1 21 2 9 2 424 634 registers RTC_RefClockCmd Function Name ErrorStatus RTC_RefClockCmd FunctionalState NewState Function Description Enables or disables the RTC reference clock detection Parameters e NewState new state of the RTC reference clock This parameter can be ENABLE or DISABLE Return values ErrorStatus enumeration value SUCCESS HTC reference clock detection is enabled ERROR HTC reference clock detection is disabled Notes None Backup Data registers configuration functions RTC WriteBackupRegister Function Name void RTC WriteBackupRegister uint32_t RTC BKP DR uint32_t Data Function Description Writes a data in a specified RTC Backup data register Parameters e RTC RTC Backup data Register number This parameter can be RTC_BKP_DRx where x can be from 0 to 19 to specify the register e Data Data to be written in the specified RTC Backup data register Return values None Notes None RTC ReadBackupRegister DociD 18540 Rev 1 4 UM1061 Real time clock RTC Function Name uint32 t RTC_ReadBackupRegister uint32 t RTC DR Function Description Reads data from the specified RTC Backup data Register Parameters e RTC_BKP_DR RTC Backup data Register number This parameter can be RTC_BKP_DRx wh
571. s mode SDIO FLAG DBCKEND Data block sent received CRC check passed SDIO FLAG CMDACT Command transfer in progress SDIO FLAG TXACT Data transmit in progress DocID 18540 Rev 1 467 634 Secure digital input output interface SDIO UM1061 22 2 11 3 468 634 Return values Notes SDIO ClearFlag Function Name Function Description Parameters Return values SDIO_FLAG_RXACT Data receive in progress SDIO_FLAG_TXFIFOHE Transmit FIFO Half Empty SDIO_FLAG_RXFIFOHF Receive FIFO Half Full SDIO_FLAG_TXFIFOF Transmit FIFO full SDIO FLAG RXFIFOF Receive FIFO full SDIO FLAG TXFIFOE Transmit FIFO empty SDIO FLAG RXFIFOE Receive FIFO empty SDIO FLAG TXDAVL Deta available in transmit FIFO SDIO FLAG RXDAVL Data available in receive FIFO SDIO FLAG SDIOIT SD VO interrupt received SDIO FLAG CEATAEND CE ATA command completion signal received for CMD61 The new state of SDIO FLAG SET or RESET None void SDIO ClearFlag uint32 t SDIO FLAG Clears the SDIO s pending flags SDIO FLAG specifies the flag to clear This parameter can be one or a combination of the following values SDIO FLAG Command response received CRC check failed SDIO FLAG DCRCFAIL Data block sent received CRC check failed SDIO FLAG CTIMEOUT Command response timeout SDIO FLAG DTIMEOUT Data timeout SDIO FLAG TXUNDERR Transmit FIFO underrun error SDIO FLAG RXOVERR Received FIFO overrun
572. s parameter can be EXTI PinSourcex where x can be 0 15 except for EXTI_PortSourceGPIOI x can be 0 11 Return values Notes None 24 21 4 SYSCFG ETH MedialnterfaceConfig Function Name void SYSCFG_ETH_MedialnterfaceConfig uint32_t SYSCFG_ETH_Medialnterface Function Description Selects the ETHERNET media interface Parameters e SYSCFG_ETH_Medialnterface specifies the Media Interface mode This parameter can be one of the following values SYSCFG ETH Medialnterface MII mode selected SYSCFG ETH Medialnterface RMII mode selected Return values None Notes None 24 21 5 SYSCFG_CompensationCellCmd 512 634 DociD 18540 Rev 1 4 UM1061 System configuration controller SYSCFG 24 2 1 6 24 3 3 Function Name void SYSCFG_CompensationCellCmd FunctionalState NewSiate Function Description Enables or disables the 1 0 Compensation Cell Parameters NewState new state of the I O Compensation Cell This parameter can be one of the following values ENABLE I O compensation cell enabled DISABLE I O compensation cell power down mode Return values None Notes e The I O compensation cell be used only when the device supply voltage ranges from 2 4 to 3 6 V SYSCFG_GetCompensationCellStatus Function Name FlagStatus SYSCFG_GetCompensationCellStatus void Function Description Checks whether the I O Compensation Cell ready flag is set or not
573. sage displayed on the LCD when running the template example STM3 2 F2XX Device running on STM322xG EVAL 2 4 3 Run a peripheral example Only the source files of the library peripheral examples are provided You can tailor the project template provided to run the selected example with your development tool As an example the following sequence is required to run the ADC3_DMA example 1 all source files from Project STM32F2xx_StdPeriph_Examples ADC ADC3_DMaA to the template folder under Project STM32F2xx_StdPeriph_Template see Figure 7 How to run a peripheral example 2 Open your preferred development tool and proceed as described in section Section 2 4 2 Run your first example 3 Ifthe example use additional source files which are not included the template project add manually the files to the project source list Refer to the readme txt file of your example for more details Figure 7 How to run a peripheral example 5 32 2 StdPeriph Template FreeCommander File Edit Folder View Extras Help aiCa manos e C Local Disk oo Project STM32F 2xx_StdPeriph_Examples ADC ADC3_DMA stm32f2xx conf h E stm32f2xx it h 4 Release Notes html stm32f2xx conf h E stm32f2xx it c source files with ADC3 DMA stm32f2xx it h example sources system_stm32f2xx c Overwrite the template 12 Object s 47kB Free 6 22 GB Doc
574. se the template files as follow e main c first move the template main c file to another location to backup the template for future use then create a new empty C file and rename it to main c This file will be used to implement the program code as described in the section below e Stm32f2xx it c use this template file to add the code required to manage the EXTI LineO interrupt e Stm32f2xx it h use this template file to add the EXTI LineO interrupt prototype e Stm32f2xx conf h use this template file without any change e system stm32f2xx c use the template file without any change Follow the steps described in Section 2 5 STM32F2xx programming model using the library to develop your application Library configuration parameters To configure the library for your application use the library default parameters as defined in Table 7 Library configuration parameters system stm32f2xx c This file contains the Systemlnit function that configures the system clock system clock source PLL Multiplier and Divider factors AHB APBx prescalers and Flash settings This function is called at startup just after reset and before branch to main program This call is made inside the startup stm32f2xx s file The clock configuration tool STM32f2xx Clock Configuration xls is used to generate system stm32f2xx c file that configures the device as follow The table below shows the default configuration of system stm32f2xx c provided within t
575. selected data type to be received The parameters that should be filled are Data TimeOut Data Length Data Block size Data Transfer direction should be to card To CARD Data Transfer mode DocID 18540 Rev 1 455 634 Secure digital input output interface SDIO UM1061 22 2 2 22 2 3 456 634 DPSM Status Enable or Disable 2 Configure the SDIO resources to send the data to the card according to selected transfer mode Refer to Step 8 9 and 10 3 Send the selected Write command refer to step 11 4 Use the SDIO flags interrupts to check the transfer status linitialization and configuration Section 22 2 5 1 SDIO_Delnit Section 22 2 5 2 SDIO Init Section 22 2 5 3 SDIO Structlnit Section 22 2 5 4 SDIO_ClockCma Section 22 2 5 6 SDIO GetPowerState Section 22 2 5 5 SDIO_SetPowerState Command path state machine CPSM management This section provide functions allowing to program and read the Command path state machine CPSM SDIO_SendCommand SDIO_CmdStructinit SDIO_GetCommandResponse SDIO_GetResponse Data path state machine DPSM management functions This section provide functions allowing to program and read the Data path state machine DPSM SDIO DataConfig SDIO DataStructlnit SDIO_GetDataCounier SDIO_ReadData SDIO WriteData SDIO GetFlFOCount SDIO IO Cards mode management functions This section provide functions allowing to progra
576. ssage pointer to a structure which contains CAN ld CAN DLC and CAN data Return values The number of the mailbox that is used for transmission or CAN TxStatus NoMailBox if there is no empty mailbox Notes e None 4 2 5 2 CAN TransmitStatus Function Name uint8 t CAN TransmitStatus CAN TypeDef uint8 t 4 TransmitMailbox Function Description Checks the transmission status of a CAN Frame Parameters e e Return values e Notes where x be 1 or 2 to select the CAN peripheral TransmitMailbox the number of the mailbox that is used for transmission CAN_TxStatus_Ok if the CAN driver transmits the message CAN TxStatus Failed an other case None DoclID 18540 Rev 1 103 634 Controller area network CAN UM1061 4 2 5 3 CAN CancelTransmit Function Name Function Description Parameters void CancelTransmit CAN_TypeDef uint8_t Mailbox Cancels a transmit request e CANx where x be 1 or 2 to select the CAN peripheral e Mailbox Mailbox number Return values e None Notes e None 4 2 6 CAN Frames Reception functions 4 2 6 1 CAN_Receive Function Name Function Description Parameters Return values Notes 4 2 6 2 CAN_FIFORelease Function Name Function Description 104 634 void CAN Receive CAN TypeDef uint8 t FlFONumber CanRxMsg RxMessage Receives a correct CAN frame e CANx where x can
577. st be a 128 192 or 256 Input pointer to the Input buffer llength length of the Input buffer must be a multiple of 16 Output pointer to the returned buffer An ErrorStatus enumeration value SUCCESS Operation done ERROR Operation failed None DocID 18540 Rev 1 4 UM1061 Cryptographic processor CRYP 6 2 10 3 CRYP_AES CTR Function Name ErrorStatus CRYP_AES uint8 t Mode uint8_t InitVectors uint8_t Key uint16 t Keysize uint8_t Input uint32 t llength uint8 t Output Function Description Encrypt and decrypt using AES in CTR Mode Parameters e Mode encryption or decryption Mode This parameter can be one of the following values ENCRYPT Encryption MODE DECRYPT Decryption e lnitVectors Initialisation Vectors used for AES algorithm e Key Key used for AES algorithm e Keysize length of the Key must be a 128 192 or 256 e Input pointer to the Input buffer e length length of the Input buffer must be a multiple of 16 e Output pointer to the returned buffer Return values ErrorStatus enumeration value SUCCESS Operation done ERROR Operation failed Notes e None 6 2 11 High Level TDES functions 6 2 111 CRYP TDES ECB 4 Function Name ErrorStatus CRYP TDES ECB uint8 t Mode uint8 t Key uint8 t Input uint32 t llength uint8 t Output Function Description Encrypt and decrypt using TDES in ECB Mode Parameters e Mode encryption or decryption M
578. st mode uint16 112 InitTypeDef I2C OwnAddress1 Specifies the first device own address This parameter be a 7 bit or 10 bit address uint16_t I2C InitTypeDef I2C Enables or disables the acknowledgement This parameter can be a value of 2 acknowledgement uint16 112 InitTypeDef I2C AcknowledgedAddress DoclD 18540 Rev 1 UM1061 Inter integrated circuit interface 2 Specifies if 7 or 10 bit address is acknowledged This parameter can be value of I2C acknowledged address 16 2 I2C Firmware driver API description The following section lists the various functions of the 2 library 16 2 1 How to use this driver 1 Enable peripheral clock using RCC_APB1PeriphClockCmd RCC_APB1Periph_l2Cx ENABLE function for 12C1 2 2 or 1263 2 Enable SDA SCL and SMBA when used GPIO clocks using RCC AHBPeriphClockCmda function 3 Peripherals alternate function Connect the pin to the desired peripheral Alternate Function AF using GPIO_PinAFConfig function Configure the desired pin in alternate function by GPIO_InitStruct gt GPIO_Mode GPIO_Mode_AF Select the type pull up pull down and output speed via GPIO PuPd GPIO OType and GPIO Speed members GPIO_Init function Recommended configuration is Push Pull Pull up Open Drain Add an external pull up if necessary typically 4 7 KOhm 4 Program the Mode duty cycle Own address Ack Speed and Ack
579. t GPIO_ReadOutputData GPIO_SetBits GPIO_ResetBits GPIO_WriteBit GPIO Write GPIO ToggleBits GPIO Alternate functions configuration e GPIO PinAFConfig Initialization and configuration functions GPIO Delnit Function Name void GPIO Delnit GPIO_TypeDef GPIOx Function Description Deinitializes the GPIOx peripheral registers to their default reset values DoclD 18540 Rev 1 UM1061 General purpose Os GPIO 14 2 5 2 14 2 5 3 14 2 5 4 Parameters Return values Notes GPIO_Init Function Name Function Description Parameters Return values Notes GPIO Structlnit Function Name Function Description Parameters Return values Notes GPIOx where x can be A l to select the GPIO peripheral None By default The GPIO pins are configured in input floating mode except JTAG pins void GPIO Init TypeDef GPIOx GPIO InitTypeDef GPIO InitStruct Initializes the GPIOx peripheral according to the specified parameters in the GPIO_InitStruct GPIOx where x can be A l to select the GPIO peripheral GPIO InitStruct pointer to a GPIO InitTypeDef structure that contains the configuration information for the specified GPIO peripheral None None void GPIO Structlnit GP O_InitTypeDef GPIO InitStruct Fills each GPIO InitStruct member with its default value GPIO PinLockConfig GPIO_InitStruct pointer to a GPIO InitTypeDef
580. t Ure SEDXIPIL Trigger EXIL Trigger Falling ure EXTI LineCmd ENABLE 5 lineO Interrupt to the lowest priority ure NVIC TROChannel BXTT0 1 Os NIC Tnit trocture AVIC IROChannelsuorrioricy 020E NVIC_InitStructure NVIC_IRQChannelCmd ENABLE NVIC Init amp NVIC_InitStructure Gr Gr Gr e il Gr wr Gi 5 Insert the code below to use the evaluation board HAL to drive the LEDs zal Initialize LED1 and LED2 mounted on STM322xG EVAL board STM EVAL LEDInit LED1 STM EVAL LEDInit LED2 while 1 Toggle LD1 STM EVAL LEDToggle LEDI Insert some delay Delay OXFFFFF brief Inserts a delay time param nCount specifies the delay time length Gretval None void Delay TO wobsES2 mCowmir 18540 Rev 1 4 UM1061 How to use and customize the library 2 6 5 4 korl mount le Of nCoumt p stm32f2xx_it c stm32f22xx_it c file can be used to implement the EXTI LineO interrupt service routine ISR in which LED2 toggles each time the ISR is executed 1 In STM32F2xx Peripherals Interrupt Handlers section add the following code BK HK KK KK I IK I I I I
581. t USART Clock e uint16 t USART CPOL e uint16 t USART e uint16 t USART LasiBit Field Documentation e uint16 t USARHT ClocklnitTypeDef USART Clock Specifies whether the USART clock is enabled or disabled This parameter can be a value of USART Clock e uint16 t USAHT ClocklnitTypeDef USART CPOL Specifies the steady state of the serial clock This parameter can be a value of USART Clock Polarity e 16 tUSART ClocklnitTypeDef USART Specifies the clock transition on which the bit capture is made This parameter can be a value of USART Clock Phase e uint16 t USART_ClockinitTypeDef USART_LastBit Specifies whether the clock pulse corresponding to the last transmitted data bit MSB has to be output on the SCLK pin in synchronous mode This parameter can be a value of USART_Last_Bit 26 2 USART Firmware driver API description The following section lists the various functions of the USART library 26 2 1 How to use this driver 3 1 Enable peripheral clock using the follwoing functions RCC_APB2PeriphClockCmd RCC_APB2Periph_USARTx ENABLE for USART1 and USART6 RCC_APB1PeriphClockCmd RCC_APB1Periph_USARTx ENABLE for USART2 USART3 UART4 UART5 2 According to the USART mode enable the GPIO clocks using RCC_AHB1PeriphClockCmd function The I O be TX RX CTS or and SCLK 3 5 alternate function Connect the pin to the desired peripherals Alternate Function AF us
582. t is issued to the DMA controller feature DISABLED Requests can continue to be generated feature ENABLED ADC_DMACmd DMARequestAfterLastTransferCmd ADC MultiModeDMARequestAfterLastTransferCmd Injected channels Configuration functions This section provide functions allowing to configure the ADC Injected channels it is composed of 2 sub sections 1 Configuration functions for Injected channels This subsection provides functions allowing to configure the ADC injected channels Configure the rank in the injected group sequencer for each channel Configure the sampling time for each channel Activate the Auto injected Mode Activate the Discontinuous Mode scan mode activation External software trigger source External trigger edge injected channels sequencer 2 Get the Specified Injected channel conversion data This subsection provides an important function in the ADC peripheral since it returns the converted data of the specific injected channel ADC InjectedChannelConfig ADC InjectedSequencerLengthConfig ADC SetlnjectedOffset ADC_ExternalTriginjectedConvConfig ADC_ExternalTriginjectedConvEdgeConfig ADC_SoftwareSiartinjectedConv ADC_GetSoftwareSiartinjectedConvCmdSiatus AutolnjectedConvCmd ADC InjectedDiscModeCmd ADC GetlnjectedConversion Value Interrupt and flag management This section provides functions allowing to configure the ADC Interrupts and to get the
583. t line 19 Connected to the Ethernet Wakeup event e define EXTI Line20 uint32 t 0x00100000 External interrupt line 20 Connected to the USB OTG HS configured in FS Wakeup event e define EXTI Line21 uint32 1 0x00200000 External interrupt line 21 Connected to the RTC Tamper and Time Stamp events e define Line22 uint32 t 0x00400000 External interrupt line 22 Connected to the RTC Wakeup event DocID 18540 Rev 1 223 634 External interrupt event controller EKTI UM1061 11 4 224 634 EXTI Programming Example The example below shows how to configure PAO pin to be used as LineO For more examples about EXTI configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project S TM32F2xx_StdPeriph_Examples EXTI Enab RCC_AHB1 RCC 2 tTypeDef tTypeDef e GPIOA s A PeriphClock PeriphClock Sie Mime Siew HB interface Cmd RCC_AHB1 Enable SYSCFG s APB interfac Cmd RCC_APB2 ucture ucture Clock f Configure PAO pin in input mode GPIO Ini GPIO Ini GPIO Imi Ima Connect SYSCFG CUS e t GPIOA Configure 1 GPIO Pin e0 to PAO
584. t tool Compiler ARM C C compiler TASKING VX toolset for ARM Cortex M3 development tool Compiler Tasking VX C C Raisonance IDE RIDE7 RIDE development tool Compiler GNU C C Atollic TrueSTUDIO STM32 TrueSTUDIO development tool Compiler GNU C C Refer to the library release notes to know about the supported development tool version DocID 18540 Rev 1 4 UM1061 How to use and customize the library 2 How to use and customize the library The following sections explain all the steps required to configure customize run your first example and develop your application based on the library 2 1 Library configuration parameters The configuration interface allows customizing the library for your application It is not mandatory to modify this configuration and you can use the default configuration without any modification To configure these parameters you should enable disable or modify some options by uncommenting commenting or modifying the values of the related define statements as described in the table below Table 7 Library configuration parameters Parameter File Description STM32F2KK stm32f2xx h Default status enabled Defines the root number of STM32F2xx devices This define statement can be used at application level to configure the application firmware for STM32F2xx USE STDPERIPH DRIVER stm32f2xx h Default status disabled When disabl
585. t16 1 0 0200 I2C IT ERR uint16 1 0 0100 2 SMBALERT uint32 t 0x01008000 2 IT TIMEOUT uint32 1 0 01004000 DocID 18540 Rev 1 333 634 Inter integrated circuit interface 12C UM1061 334 634 define define define define define define define define define define define define 2 PECERR uint32 t 0x01001000 I2C IT OVR uint32 1 0 01000800 I2C IT AF uint32 1 0 01000400 I2C IT ARLO uint32 1 0x01000200 I2C IT BERR uint32 1 0x01000100 2 IT TXE uint32 1 0 06000080 2 IT RXNE uint32 t 0x06000040 2 IT STOPF uint32 1 0x02000010 2 IT ADD10 uint32 t 0x02000008 2 IT BTF uint32 1 0x02000004 I2C ADDR uint32 1 0 02000002 I2C IT SB uint32 t 0x02000001 DocID 18540 Rev 1 4 UM1061 Inter integrated circuit interface 12C 3 I2C mode e define 2 Mode lI2C uint16 t 0x0000 e define I2C Mode SMBusDevice uint16 1 0x0002 e define 2 Mode SMBusHost uint16 1 0x000A I2C NACK position e didefine I2C NACKPosition Next uint16 1 0x0800 e define I2C NACKPosition Current uint16 t OXxF7FF 2 position e define I2C PECPosition Next uint16 1 0x0800 e define I2C PECPosition Current uint16 t OxF7FF 2 registers e define I2C Register CH1 uint8 1 0 00 e define I2C Register CH2 uint8 1 0 04 e define 2 Register OART
586. t18 t 0x0040 5 LSE uint16 1 0 0080 DocID 18540 Rev 1 4 UM1061 General purpose timers TIM 3 e define TIMS_RTC uint16_t Ox00CO e TIM11 GPlO uint16 1 0x0000 e define TIM11 HSE uint16 t 0x0002 TIM_Slave_Mode e define SlaveMode Reset uint16 t 0x0004 e define SlaveMode Gated uint16 1 0x0005 e define TIM SlaveMode Trigger uint16 t 0x0006 e define SlaveMode External t uint16 t 0x0007 External Clock Source e didefine TIxExternalCLK1Source Tl 1 uint16 t 0x0050 e didefine TIxExternalCLK Source 2 16 t 0x0060 e TIxExternalCLK1Source TI1ED uint16 t 0x0040 TIM Trigger Output Source e define TIM TRGOSource Reset uint16 1 0x0000 DocID 18540 Rev 1 585 634 General purpose timers TIM UM1061 25 4 586 634 e define TRGOSource Enable uint16 1 0x0010 e define TRGOSource Update uint16 1 0x0020 e define TIM TRGOSource 1 16 1 0x0030 e didefine TIM_TRGOSource_OC1Ref uint16_t 0x0040 e didefine TIM TRGOSource OC2hef uint16 1 0x0050 e didefine TIM TRGOSource 6 1 0x0060 e define TIM TRGOSource OC4Ref uint16 1 0x0070 TIM Update Source e TIM UpdateSource Global uint16 1 0x0000 Source of update is the counter overflow underflow or the setting of UG bit or an update
587. t32 t RCC_TypeDef RESERVED4 Reserved 0 5 10 uint32 t RCC_TypeDef APB1LPENR RCC APB 1 peripheral clock enable in low power mode register Address offset 0x60 JO uint32 t RCC TypeDef APB2LPENR RCC 2 peripheral clock enable in low power mode register Address offset 0x64 uint32 t RCC_TypeDef RESERVED5 2 Reserved 0x68 0x6C JO uint32 t RCC TypeDet BDCR RCC Backup domain control register Address offset 0 70 JO uint32 t RCC TypeDef CSR RCC clock control amp status register Address offset 0x74 DocID 18540 Rev 1 4 UM1061 Reset and clock control RCC e uint32_t RCC_TypeDef RESERVED6 2 Reserved 0x78 0x7C e _ lOuint32 t RCC_TypeDef SSCGR RCC spread spectrum generation register Address offset 0 80 e 2 t RCC TypeDef PLLIOSCFGR RCC PLLI2S configuration register Address offset 0x84 19 1 2 RCC_ClocksTypeDef RCC_ClocksTypeDef is defined in the stm32f2xx_rcc h file and will hold the clocks frequencies Data Fields e uint32_t SYSCLK Frequency e uint32_t HCLK Frequency e uint32_t PCLK1 Frequency e uint32_t PCLK2 Frequency Field Documentation e Uuint32 t RCC ClocksTypeDef SYSCLK Frequency SYSCLK clock frequency expressed in Hz e uint32 t RCC_ClocksTypeDef HCLK_Frequency HCLK clock frequency expressed Hz e uint32 t RCC_ClocksTypeDef PCLK1_Frequency PCLK1 clock frequency expressed Hz e Uuint32 t RCC ClocksType
588. t32 t TR lO uint32 t DR lO uint32 t CR lO uint32 t ISR lO uint32 t PRER uint32_t WUTR lO uint32 t CALIBR JO uint32 t ALRMAR IO uint32 t ALRMBR lO uint32 t WPR uint32 t RESERVED1 uint32 t RESERVED2 10 uint32 t TSTR lO uint32 t TSDR uint32 t RESERVED3 uint32 t RESERVED4 lO uint32 t TAFCR uint32 t RESERVED5 uint32 t RESERVED6 uint32 t RESERVED7 lO uint32 t BKPOR lO uint32 t BKP1R lO uint32 t BKP2R lO uint32 t BKP3R JO uint32 t lO uint32 t BKP5R lO uint32 t BKP6R lO uint32 t BKP7R lO uint32 t BKP8R uint32 t BKP9R lO uint32 t BKP10R lO uint32 t BKP11R lO uint32 t BKP12R lO uint32 t BKP13R lO uint32 t BKP14R lO uint32 t BKP15R lO uint32 t BKP16R lO uint32 t BKP17R lO uint32 t BKP18R JO uint32 t BKP19R 410 634 DocID 18540 Rev 1 3 UM1061 Real time clock RTC Field Documentation _ JOuint32_t RTC_TypeDef TR time register Address offset 0 00 e JOuint32_t RTC_TypeDef DR RTC date register Address offset 0x04 e JOuint32_t RTC_TypeDef CR RTC control register Address offset 0 08 _ JOuint32_t RTC_TypeDef ISR RTC initialization and status register Address offset e _ JOuint32_t RTC_TypeDef PRER RTC prescaler register Address offset 0x10 e _ JOuint32_t RTC_TypeDef WUTR RTC wakeup timer register Address offset 0 14 e lOuint32 t RTC_TypeDef CALIBR RTC calibration reg
589. tStruct pointer to CRYP_IVInitTypeDef structure that contains the configuration information for the CRYP Initialization Vectors IV Return values e None Notes None 6 2 5 7 CRYP Function void CRYP_IVSiructInit CRYP_IVinitTypeDef CRYP Function Description Fills each CRYP_IVInitStruct member with its default value Parameters CRYP lVInitStruct pointer to CRYP_IVinitTypeDef Initialization Vectors IV structure which will be initialized Return values None Notes None 6 2 5 8 CRYP_FIFOFlush Function Name void CRYP_FIFOFlush void Function Description Flushes the IN and OUT FIFOs that is read and write pointers of the FIFOs are reset Parameters None Return values None Notes e The FIFOs must be flushed only when BUSY flag is reset ky 18540 Rev 1 137 634 Cryptographic processor CRYP UM1061 6 2 5 9 6 2 6 6 2 6 1 6 2 6 2 138 634 CRYP_Cmd Function Name void CRYP_Cmd FunctionalState NewState Function Description Enables or disables the CRYP peripheral Parameters e NewSiate new state of the CRYP peripheral This parameter can be ENABLE or DISABLE Return values e None Notes e None CRYP Data processing functions CRYP_Dataln Function Name void CRYP_Dataln uint32_t Data Function Description Writes data in the Data Input register DIN Parameters e Data data to write in Data Input register Return val
590. tate as in Run mode When exiting Stop mode by issuing an interrupt or a wakeup event the HSI RC oscillator is selected as system clock When the voltage regulator operates in low power mode an additional startup delay is incurred when waking up from Stop mode By keeping the internal regulator ON during Stop mode the consumption is higher although the startup time is reduced PWR EnterSTANDBYMode Function Name void PWR EnterSTANDBYMode void Function Description Enters STANDBY mode Parameters e Return values Notes None None In Standby mode all I O pins are high impedance except for A Reset pad still available pin PC13 if configured for tamper time stamp RTC Alarm out or RTC clock calibration out AF2 pin PI8 if configured for tamper or time DoclD 18540 Rev 1 UM1061 Power control PWR 18 2 9 18 2 9 1 18 2 9 2 4 stamp WKUP pin 1 PAO if enabled Flags management functions PWR GetFlagStatus Function Name FlagStatus PWR GetFlagStatus uint32 t PWR FLAG Function Description Checks whether the specified PWR flag is set or not Parameters e PWR_FLAG specifies the flag to check This parameter be one of the following values PWR FLAG WU Wake Up flag This flag indicates that a wakeup event was received from the WKUP pin or from the RTC alarm Alarm A or Alarm B RTC Tamper event RTC TimeStamp event or RTC Wake
591. te new state of the 2 General call This parameter can be ENABLE or DISABLE Return values None Notes None I2C SoftwareResetCmd Function Name void I2C_SoftwareResetCmd 2C_TypeDef 12 FunctionalState NewState Function Description Enables or disables the specified 12C software reset Parameters e 12 where x can be 1 2 or 3 to select the 12C peripheral NewState new state of the 2 software reset This parameter can be ENABLE or DISABLE Return values None Notes e When software reset is enabled the 12 1 are released this can be useful to recover from bus errors I2C_StretchClockCmd Function Name void I2C_StretchClockCmd 2C_TypeDef 12 FunctionalState NewState Function Description Enables or disables the specified 12C Clock stretching Parameters e 2 where x be 1 2 3 to select the 12C peripheral e NewState new state of the I2Cx Clock stretching This parameter can be ENABLE or DISABLE Return values None Notes None DociD 18540 Rev 1 UM1061 Inter integrated circuit interface I2C 16 2 7 14 16 2 7 15 4 I2C FastModeDutyCycleConfig Function Name void I2C_FastModeDutyCycleConfig 2C_TypeDef I2Cx uint16_t12C_DutyCycle Function Description Selects the specified 12C fast mode duty cycle Parameters e 12 where x can be 1 2 or 3 to select the 2 peripheral e 2C DutyCycle specifies the fast mod
592. ter Address offset 0 10 e 2 t FLASH TypeDef OPTCR FLASH option control register Address offset 0 14 12 2 FLASH Firmware driver API description The following section lists the various functions of the FLASH library 12 2 1 How to use this driver 3 This driver provides functions to configure and program the FLASH memory of all STM32F2xx devices These functions are split in 4 groups FLASH Interface configuration functions this group includes the management of the following features Setthe latency Enable Disable the prefetch buffer Enable Disable the Instruction cache and the Data cache DocID 18540 Rev 1 225 634 FLASH Memory FLASH UM1061 Reset the Instruction cache the Data cache e FLASH Memory Programming functions this group includes all needed functions to erase and program the main memory Lock and Unlock the FLASH interface Erase function Erase sector erase all sectors Program functions byte half word word and double word Option Bytes Programming functions this group includes all needed functions to manage the Option Bytes Set Reset the write protection Set the Read protection Level Set the BOR level Program the user Option Bytes Launch the Option Bytes loader Interrupts and flags management functions this group includes all needed functions to Enable Disable the FLASH interrupt sources Get flags status Cle
593. ter calling this function user can restart the processing from the point where it has been interrupted 15 2 11 HASH DMA interface Configuration function 15 2 111 HASH DMACmd 4 DociD 18540 Rev 1 301 634 Hash processor HASH UM1061 15 2 12 15 2 12 1 15 2 12 2 302 634 Function Name Function Description Parameters Return values Notes void HASH DMACmd FunctionalState NewState Enables or disables the HASH DMA interface NewState new state of the selected HASH DMA transfer request This parameter can be ENABLE or DISABLE None The DMA is disabled by hardware after the end of transfer Interrupt and flag management functions HASH Function Name Function Description Parameters Return values Notes void HASH uint8 t HASH IT FunctionalState NewState Enables or disables the specified HASH interrupts HASH GetFlagStatus Function Name Function Description Parameters HASH IT specifies the HASH interrupt source to be enabled or disabled This parameter can be any combination of the following values HASH IT DINI Data Input interrupt HASH IT DCI Digest Calculation Completion Interrupt NewState new state of the specified HASH interrupt This parameter can be ENABLE or DISABLE None None FlagStatus HASH GetFlagStatus uint16_t HASH FLAG Checks whether the specified HASH flag is set or not HASH FLAG specif
594. terrupt IT WUT WakeUp Timer interrupt IT ALRB Alarm B interrupt RTC IT ALRA Alarm A interrupt 1 Tamper 1 event interrupt Return values The new state of RTC IT SET or RESET Notes None RTC_ClearlTPendingBit Function Name void RTC_ClearlTPendingBit uint32 t RTC Function Description Clears the RTC s interrupt pending bits Parameters e specifies the RTC interrupt pending bit to clear This parameter can be any combination of the following values 5 Time Stamp interrupt WakeUp Timer interrupt ALRB Alarm B interrupt RTC ALRA Alarm A interrupt IT 1 Tamper 1 event interrupt Return values None Notes None DociD 18540 Rev 1 4 UM1061 Real time clock RTC 21 2 12 21 2 12 1 21 2 12 2 21 2 12 3 3 Time Date configuration functions RTC_SetTime Function Name Function Description Parameters Return values Notes TimeStructlnit Function Function Description Parameters Return values Notes RTC_GetTime Function Name ErrorStatus RTC_SetTime uint32_t RTC_Format RTC_TimeTypeDef RTC_TimeStruct Set the RTC current time RTC Format specifies the format of the entered parameters This parameter can be one of the following values RTC Format BIN Binary data format
595. th this error se Hrror occurred while Flash write User can add here some code to deal with this error Lock the Flash to disable the flash control register access recommended to protect the FLASH memory against possible unwanted operation FLASH Lock wh chec ile 1 brief note ked param param param This function writes a data buffer in flash data are 32 bit aligned After writing data buffer the flash content is FlashAddress start address for writing data buffer Data pointer on data buffer DataLength length of data buffer unit is 32 bit word retval 0 Data successfully written to Flash memory 1 Error occurred while writing data in Flash memory 2 Written Data in flash memory is different from expected one WIMES2 FLASH Jur Write vuinto2 1c PlasihAckicess Wei it Dete uintl6 t DataLength vinto t 1 OF for i 248 634 0 i lt DataLength itt 18540 Rev 1 4 UM1061 FLASH Memory FLASH DocID 18540 Rev 1 249 634 Flerible static memory controller FSMC UM1061 13 13 1 13 1 1 13 1 2 13 1 3 250 634 Flexible static memory controller FSMC FSMC Firmware driver registers structures FSMC_Bank1_TypeDef FSMC_Bank1_TypeDet is defined in the stm32f2xx h file and contains the FSMC Banki configuration registers definition
596. the RKNE flags instead In this Mode it is advised to use the following functions FlagStatus SPI 125 GetFlagStatus SPI TypeDef SPIx uint16 t SPI 125 FLAG e void SPI 125 ClearFlag SPI TypeDef SPIx uint6 t SPI 125 FLAG DocID 18540 Rev 1 487 634 Serial peripheral interface SPI UM1061 23 2 7 23 2 7 1 488 634 Interrupt Mode In Interrupt Mode the SPI communication can be managed by 3 interrupt sources and 7 pending bits Pending Bits SPI 125 to indicate the status of the transmit buffer register SPI 126 RXNE to indicate the status of the receive buffer register CRCERR to indicate if a CRC Calculation error occur available SPI mode only SPI IT MODF to indicate if a Mode Fault error occur available SPI mode only SPI 125 IT OVR to indicate if an Overrun error occur 125 IT UDR to indicate an Underrun Error occurs available in 125 mode only 125 FLAG TIFRFE to indicate a Frame Format error occurs available mode only Interrupt Source SPI 125 TXE specifies the interrupt source for the Tx buffer empty interrupt SPI 125 RXNE specifies the interrupt source for the Rx buffer not empty interrupt SPI 126 IT ERR specifies the interrupt source for the errors interrupt In this Mode it is advised to use the following functions void SPI 125 ITConfig SPI TypeDef SPIx uint8 t SPI 125 IT Fu
597. the same line This parameter can be a value between 0x00 and Ox3FFF 9 1 4 DCMI CodeslnitTypeDef DCMI CodeslnitTypeDef is defined in the stm32f2xx dcmi h file and contains the DCMI s embedded synchronization codes initialization parameters Data Fields e 8 t DCMI FrameStartCode e uint8 t DCMI LineStartCode e uint8 t DCMI LineEndCode e 8 t DCMI FrameEndCode Field Documentation e 8 t DCMI CodeslnitTypeDef DCMI FrameStartCode Specifies the code of the frame start delimiter e 8 t DCMI CodeslnitTypeDef DCMI LineStartCode Specifies the code of the line start delimiter e uint8 t DCMI CodeslnitTypeDef DCMI LineEndCode Specifies the code of the line end delimiter e uint8 t DCMI CodeslnitTypeDef DCMI FrameEndCode Specifies the code of the frame end delimiter 9 2 DCMI Firmware driver API description The following section lists the various functions of the DCMI library 9 2 1 How to use this driver DocID 18540 Rev 1 175 634 Digital camera interface UM1061 9 2 2 9 2 3 9 2 4 176 634 The sequence below describes how to use this driver to capture image from a camera module connected to the DCMI Interface This sequence does not take into account the configuration of the camera module which should be made before to configure and enable the DCMI to capture images 1 OND Enable the clock for the DCMI and associated using the following functions RCC
598. the DMA interrupt sources to be enabled or disabled This parameter can be any combination of the following values DMA Transfer complete interrupt mask DMA IT Half transfer complete interrupt mask DMA IT Transfer error interrupt mask DMA IT FIFO error interrupt mask NewState new state of the specified DMA interrupts This parameter can be ENABLE or DISABLE None None ITStatus DMA GetlTStatus Stream TypeDef DMAy_Streamx uint32 t Checks whether the specified DMAy Streamx interrupt has occurred or not DMAy Streamx where y can be 1 or 2 to select the DMA and x can be 0 to 7 to select the DMA Stream specifies the DMA interrupt source to check This parameter can be one of the following values DMA IT TCIFx Stream transfer complete interrupt HTIFx Streamx half transfer complete interrupt TEIFx Streamx transfer error interrupt DMEIFx Streamx direct mode error interrupt 0 18540 Rev 1 971 UM1061 DMA controller DMA FEIFx Streamx FIFO error interrupt Where x can be 0 to 7 to select the DMA Stream Return values e The new state SET or RESET Notes e None 10 2 7 7 ClearlTPendingBit Function Name void DMA_ClearlTPendingBit DMA_Stream_TypeDef DMAy_Streamx uint32_t DMA_IT Function Description Clears the Streamx s int
599. the LCD Log firmware functions It allows to automatically set a header and footer on any application using the LCD display and to dump user debug and error messages by using the following macros LCD ErrLog LCD UsrLog and LCD DbgLog fonts c Provides text fonts for STM32xx EVAL LCD driver 1 4 Supported devices and development tools 1 4 1 Supported devices The library supports all STM32F205xx STM32F207xx STM32F215xx and STM32F217xx microcontroller memory and peripherals By using this library moving the application firmware from one STM32F2xx device to another becomes straightforward The device part number is defined as follows in stm32f2xx h file dif defined STM32F2XX define STM32F2XX endif This define statement can be used at application level to configure the application firmware for STM32F2xx devices DocID 18540 Rev 1 35 634 STM32F2xx Standard Peripheral Library UM1061 1 4 2 36 634 Supported development tools and compilers STM32F2xx devices are supported by a full range of development solutions from lead suppliers that deliver start to finish control of application development from a single integrated development environment The library is supported by all major tool providers A template project is available for each development tool IAR Embedded Workbench for ARM EWARM development tool Compiler IAR s C C RealView Microcontroller Development Kit MDK ARM developmen
600. the USART CR2 register SCEN and IREN bits in the USART_CR3 register DocID 18540 Rev 1 UM1061 Universal synchronous asynchronous receiver transmitter USART USART_HalfDuplexCmd 26 2 7 Smartcard mode This subsection provides a set of functions allowing to manage the USART Smartcard communication The Smartcard interface is designed to support asynchronous protocol Smartcards as defined in the ISO 7816 3 standard The USART can provide a clock to the smartcard through the SCLK output In smartcard mode SCLK is not associated to the communication but is simply derived from the internal peripheral input clock through a 5 bit prescaler Smartcard communication is possible through the following procedure 1 2 3 8 Configures the Smartcard Prescaler using the USART_SetPrescaler function Configures the Smartcard Guard Time using the USART_SetGuardTime function Program the USART clock using the USART Clocklnit function as following USART Clock enabled USART CPOL Low USART on first edge USART Last Bit Clock Enabled Program the Smartcard interface using the USART Init function as following Word Length 9 Bits 1 5 Stop Bit Even parity BaudRate 12096 baud Hardware flow control disabled RTS and CTS signals Tx and Rx enabled Optionally you can enable the parity error interrupt using the USART_ITConfig function Enable the USART using the
601. the internal external clocks PLLs CSS and MCO pins HSI high speed internal 16 MHz factory trimmed RC used directly or through the PLL as System clock source LSI low speed internal 32 KHz low consumption RC used as IWDG and or RTC clock source HSE high speed external 4 to 26 MHz crystal oscillator used directly or through the PLL as System clock source Can be used also as RTC clock source LSE low speed external 32 KHz oscillator used as RTC clock source PLL clocked by HSI or HSE featuring two different output clocks The first output is used to generate the high speed system clock up to 120 MHz The second output is used to generate the clock for the USB OTG FS 48 MHz the random analog generator lt 48 MHz and the SDIO lt 48 MHz PLLI2S clocked by HSI or HSE used to generate an accurate clock to achieve high quality audio performance on the 125 interface CSS Clock security system once enable and if a HSE clock failure occurs HSE used directly or through PLL as System clock source the System clock is automatically switched to HSI and an interrupt is generated if enabled The interrupt is linked to the Cortex M3 NMI Non Maskable Interrupt exception vector microcontroller clock output used to output HSI LSE HSE or PLL clock through a configurable prescaler 9 2 microcontroller clock output used to output HSE PLL SYSCLK or PLLI2S clock through a config
602. tion Stops the SD I O Read Wait operation Parameters e NewState new state of the Stop SDIO Read Wait operation This parameter can be ENABLE or DISABLE Return values e None Notes e None SDIO SetSDIOReadWaitMode Function Name void SDIO SetSDIOReadWaitMode uint32 t SDIO ReadWaitMode Function Description Sets one of the two options of inserting read wait interval Parameters e SDIO ReadWaitMode SD I O Read Wait operation mode This parameter can be SDIO ReadWaitMode Read Wait control by stopping SDIOCLK SDIO ReadWaitMode DATA2 Read Wait control DoclD 18540 Rev 1 463 634 Secure digital input output interface SDIO UM1061 using SDIO_DATA2 Return values e None Notes e None 22 2 8 4 SDIO_SetSDIOOperation Function Name void SDIO SetSDlOOperation FunctionalState NewState Function Description Enables or disables the SD I O Mode Operation Parameters NevwState new state of SDIO specific operation This parameter can be ENABLE or DISABLE Return values e None Notes e None 22 2 8 5 SDIO SendSDlOSuspendCmd Function Name void SDIO SendSDlOSuspendCmd FunctionalState NewState Function Description Enables or disables the SD I O Mode suspend command sending Parameters e NevwState new state of the SD I O Mode suspend command This parameter can be ENABLE or DISABLE Return values e None Notes e None 22 2 9 CE ATA mode management functions 22 2 9 SDIO CommandCompletionCmd Functio
603. tion before compiling the firmware library drivers When enabled the assert param macro is expanded in the library drivers code Run time detection can be used for user application development and debugging It adds an overhead which can be removed from the final application code to minimize code size and maximize execution speed 125 EXTERNAL CLOCK VAL stm32f2xx_conf h Default value 12288000 Hz Default status disabled If an external clock source is used to drive the 125 clock this value must be set to the value of the external clock source otherwise keep this define statement commented Peripheral header file inclusion stm32f2xx_conf h This file allows to enable disable the inclusion of the peripheral driver header files By default all header files are included 7125 elem sims Cea im include Viini CTEM im lucde Vai CTD 194 461032122000 Clave mn include Comet m imeluce 21605 Cemi n sS Cuen imelucde Gin include flash m include Vuai temem include siemS2i hasin ln Viini Goio M imelucde 2297 60032222020 35919 n inelude include include 1600 rnem WIZ include sonia sebo include 7225 Spi m 2220 sek in IMCIUCS Vu
604. tions The WakeUp pin is used to wakeup the system from Standby mode This pin is forced in input pull down configuration and is active on rising edges There is only one WakeUp pin WakeUp Pin 1 on PA 00 e PWR WakeUpPinCmdad Backup Regulator configuration functions The backup domain includes 4 Kbytes of backup SRAM accessible only from the CPU and address in 32 bit 16 bit or 8 bit mode Its content is retained even in Standby or VBAT mode when the low power backup regulator is enabled It can be considered as an internal EEPROM when VBAT is always present You can use the PWR_BackupRegulatorCmd function to enable the low power backup regulator and use the PWR GetFlagStatus PWR FLAG BRR to check if it is ready or not When the backup domain is supplied by VDD analog switch connected to VDD the backup SRAM is powered from VDD which replaces the VBAT power supply to save battery life The backup SRAM is not mass erased by an tamper event It is read protected to prevent confidential data such as cryptographic private key from being accessed The backup SRAM can be erased only through the Flash interface when a protection level change from level 1 to level 0 is requested Refer to the description of Read protection RDP in the Flash programming manual e PWR BackupHegulatorCmd FLASH Power Down configuration functions By setting the FPDS bit in the PWR CR register by using the PWR_FlashPowerDownCmd function the Flash memo
605. ture compare4 selected ADC ExternalTriglInjecConv T5 TRGO Timer5 TRGO event selected ADC ExternalTriglnjecConv T8 CC2 Timer8 capture compare2 selected ADC ExternalTriglInjecConv T8 Timer8 capture compare3 selected ADC ExternalTriglInjecConv T8 CC4 Timer8 capture compare4 selected ADC ExternalTriglnjecConv Ext IT15 External interrupt line 15 event selected None None ADC ExternalTrigInjectedConvEdgeConfig Function Name Function Description Parameters void ADC ExternalTriglInjectedConvEdgeConfig ADC TypeDef ADCx uint32 t ADC ExternalTriglInjecConvEdge Configures the ADCx external trigger edge for injected channels conversion ADCx where x can be 1 2 or 3 to select the ADC peripheral ADC ExternalTriglnjecConvEdge specifies the ADC external trigger edge to start injected conversion This parameter can be one of the following values ADC ExternalTriglnjecConvEdge None external trigger disabled for injected conversion ADC ExternalTriglInjecConvEdge Rising detection on rising edge ADC ExternalTriglnjecConvEdge Falling detection on falling edge ADC ExternalTriglInjecConvEdge RisingFalling DoclD 18540 Rev 1 71 634 Analog to digital converter ADC UM1061 3 2 9 6 3 2 9 7 3 2 9 8 72 634 detection on both rising and falling edge Return values e None Notes None ADC SoftwareStartlnjectedConv Function Name void ADC SoftwareStartinjectedConv ADC_Type
606. tus Failed uint8 t 0x00 CAN transmission failed e define CAN TxStatus Ok uint8 1 0 01 CAN transmission succeeded e define CAN TxStatus Pending uint8 1 0x02 CAN transmission pending e didefine CAN TxStatus NoMailBox uint8 t 0x04 CAN cell did not provide an empty mailbox e define CANTXFAILEDCAN TxStatus Failed e didefine CANTXOKCAN TxsStatus Ok e define CANTXPENDINGCAN TxsStatus Pending DocID 18540 Rev 1 UM1061 Controller area network CAN 44 4 e define CAN_NO_MBCAN_TxStatus_NoMailBox CAN wake constants e define CAN WakeUp Failed uint8 1 0x00 CAN did not leave the sleep mode e define CAN WakeUp Ok uint8 1 0 01 CAN leaved the sleep mode define CANWAKEUPFAILEDCAN WakeUp Failed iidefine CANWAKEUPOKCAN WakeUp CAN Programming Example The example below provides a typical configuration of the CAN peripheral For more examples about CAN configuration and usage please refer to the SPI examples provided within the STM32F2xx Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples CAN GPIO Im UNE GPIO CAN CAN CAN 25 CAN Ie GPTOs configuration Fe ee Ua Lal I I I I kx Enable GPIOD clock AHBlPeriphClockCmd RCC GPIOD ENABL
607. ucture that contains the configuration information for the RTC peripheral An ErrorStatus enumeration value SUCCESS RTC registers are initialized ERROR RTC registers are not initialized e The RTC Prescaler register is write protected and can be written in initialization mode only DoclID 18540 Rev 1 421 634 Real time clock RTC UM1061 21 2 8 3 21 2 8 4 21 2 8 5 422 634 RTC Structinit Function Name void RTC Structlnit RTC_InitTypeDef RTC_InitStruct Function Description Fills each RTC_InitStruct member with its default value Parameters e InitStruct pointer to InitTypeDef structure which will be initialized Return values e None Notes e None RTC WriteProtectionCmd Function Name void RTC WriteProtectionCmd FunctionalState NewState Function Description Enables or disables the RTC registers write protection Parameters NewState new state of the write protection This parameter can be ENABLE or DISABLE Return values e None Notes e All the RTC registers are write protected except for ISR 13 8 RTC TAFCR and BKPxR e Writing a wrong key reactivates the write protection e The protection mechanism is not affected by system reset RTC EnterlnitMode Function Name ErrorStatus EnterlnitMode void Function Description Enters the RTC Initialization mode Parameters e None Return values An ErrorStatus enumeration value DociD 18540 Rev
608. ue of RTC_AlarmDateWeekDay_Definitions e uint8 t RTC_AlarmTypeDef RTC_AlarmDateWeekDay Specifies the RTC Alarm Date WeekDay If the Alarm Date is selected this parameter must be set to a value in the 1 31 range If the Alarm WeekDay is selected this parameter can be a value of RTC WeekDay Definitions RTC Firmware driver API description The following section lists the various functions of the RTC library Backup Domain operating conditions DocID 18540 Rev 1 4 UM1061 Real time clock RTC The real time clock RTC the RTC backup registers and the backup SRAM BKP SRAM can be powered from the VBAT voltage when the main VDD supply is powered off To retain the content of the RTC backup registers backup SRAM and supply the RTC when VDD is turned off VBAT pin can be connected to an optional standby voltage supplied by a battery or by another source To allow the RTC to operate even when the main digital supply VDD is turned off the VBAT pin powers the following blocks The RTC e The LSE oscillator e The backup SRAM when the low power backup regulator is enabled e 1 to PC15 I Os plus PI8 I O when available When the backup domain is supplied by VDD analog switch connected to VDD the following functions are available e PC14 and PC15 can be used as either GPIO or LSE pins e PC13 can be used as a GPIO or as the RTC_AF1 pin PI8 can be used as a GPIO or as the RTC AF2 pin When the backup domain
609. ues e None Notes After the DIN register has been read once or several times the FIFO must be flushed using CRYP_FIFOFlush function CRYP_DataOut Function Name uint32_t CRYP_DataOut void Function Description Returns the last data entered into the output FIFO Parameters e None Return values Last data entered into the output FIFO Notes e None DoclD 18540 Rev 1 4 UM1061 Cryptographic processor CRYP 6 2 7 6 2 7 1 6 2 7 2 4 Context swapping functions CRYP SaveContext Function Name ErrorStatus CRYP SaveContext CRYP_Context CRYP ContextSave CRYP KeylnitTypeDef CRYP KeylnitStruct Function Description Saves the CRYP peripheral Context Parameters e CRYP ContextSave pointer to a CRYP Context structure that contains the repository for current context e CRYP KeylnitStruct pointer to a CRYP KeylnitTypeDef structure that contains the configuration information for the CRYP Keys Return values e None Notes e This function stops DMA transfer before to save the context After restoring the context you have to enable the DMA again if the DMA was previously used CRYP RestoreContext Function Name void CRYP RestoreContext CRYP Context CRYP ContextRestore Function Description Restores the CRYP peripheral Context Parameters e ContextRestore pointer to a CRYP Context structure that contains the repository for saved context Return values e None
610. uint16_t 0x0525 USART IT IDLE uint16 1 0x0424 USART IT LBD uint16 t 0x0846 USART IT CTS uint16 t 0x096A USART ERR uint16 1 0x0060 USART IT ORE uint16 1 0 0360 USART IT NE uint16 1 0x0260 USART IT FE uint16 1 0 0160 USART IrDA Low Power e didefine e didefine USART_IrDAMode_LowPower uint16_t 0x0004 USART IrDAMode Normal uint16 1 0x0000 USART Last Bit e didefine USART LastBit Disable uint16 t 0x0000 DoclD 18540 Rev 1 4 UM1061 Universal synchronous asynchronous receiver transmitter USART 3 e define USART_LastBit_Enable uint16_t 0x0100 USART_LIN_Break_Detection_Length e define USART LINBreakDetectLength 10b uint16 1 0x0000 e ddefine USART_LINBreakDetectLength_11b uint16_t O0x0020 USART Mode e define USART Mode Rx uint16 t 0x0004 e USART Mode Tx uint16 1 0x0008 USART_Parity e define USART Parity No uint16 t 0x0000 e USART Even uint16 1 0x0400 e define USART Parity Odd uint16 1 0 0600 USART Stop Bits e define USART StopBits 1 16 t 0x0000 define USART StopBits 0 5 uint16 1 0 1000 e define USART StopBits 2 uint16 t 0x2000 DoclD 18540 Rev 1 615 634 Universal synchronous asynchronous receiver UM1061 transmitter USART 26 4 616 634 e define USART StopBits 1 5 16 1 0x3000 USART WakeUp methods e define USART WakeUp IdleLin
611. uint32 t RNG_TypeDef CR RNG control register Address offset 0x00 _ lOuint32 t RNG_TypeDef SR RNG status register Address offset 0 04 e t RNG TypeDef DR RNG data register Address offset 0 08 20 2 RNG Firmware driver API description The following section lists the various functions of the RNG library 20 2 1 How to use this driver 1 Enable The RNG controller clock using RCC_AHB2PeriphClockCmd RCC_AHB2Periph_RNG ENABLE function 2 Activate the RNG peripheral using RNG_Cmd function 3 Wait until the 32 bit Random number Generator contains a valid random data using polling interrupt mode For more details refer to Section 20 2 4 Interrupt and flag management module description 4 Get the 32 bit Random number using RNG_GetRandomNumber function 5 To get another 32 bit Random number go to step 20 2 2 Initialization and configuration 4 This section provides functions allowing to e Initialize the RNG peripheral e Enable or disable the RNG peripheral Below is list of functions to initialiez and configure RNG DoclD 18540 Rev 1 403 634 Random number generator RNG UM1061 20 2 3 20 2 4 404 634 fnc RNG Cmd Getting 32 bit Random number This section provides a function allowing to get the 32 bit Random number Before to call this function you have to wait till DRDY flag is set using RNG_GetFlagStatus RNG_FLAG_DRDY function RNG_GetRandomNu
612. uint8 1 0x00 I2S2CLKSource Ext uint8 1 0 01 Interrupt Source e define e define e define e define e define e define e define RCC LSIRDY uint8 1 0 01 LSERDY uint8 1 0 02 RCC_IT_HSIRDY uint8_t 0x04 IT HSERDY uint8 1 0x08 RCC IT PLLRDY uint8 1 0 10 RCC IT PLLI2SRDY uint8 1 0x20 RCC IT CSS uint8 1 0 80 RCC LSE Configuration e didefine e didefine RCC LSE OFF uint8 1 0 00 RCC LSE ON uint8 t 0x01 DoclID 18540 Rev 1 395 634 Reset and clock control RCC UM1061 396 634 e define RCC_LSE_Bypass uint8_t 0x04 RCC_MCO1_Clock_Source_Prescaler e define 15 HSl uint32 0 00000000 e define 15 LSE uint32 0 00200000 e define RCC_MCO1Source_HSE uint32_t 0x00400000 e define MCO1Source PLLCLK uint32 1 0 00600000 e dtdefine RCC MCO1Div 1 uint32 1 0 00000000 e define RCC MCO1Div 2 uint32 1 0 04000000 e define RCC_MCO1Div_3 uint32_t 0x05000000 e define RCC_MCO1Div_4 uint32_t Ox06000000 e RCC_MCO1Div_5 uint32_t 0x07000000 RCC_MCO2_Clock_Source_Prescaler e define MCO2Source SYSCLK uint32 t 0x00000000 e define RCC MCO2Source PLLI2SCLK uint32 1 0 40000000 DocID 18540 Rev 1 4 UM1061 Reset and clock control RCC e define e define e define e define e define
613. uint8 1 0x08 e define I2C Register OAR2 uint8 1 OxOC DoclD 18540 Rev 1 335 634 Inter integrated circuit interface 12 UM1061 16 4 336 634 e define 2 8 1 0 10 e define 2 Register 5 1 8 t 0x14 e define 2 Register SR2 uint8 1 0 18 e define 2 Register CCR uint8 t 0x1C e 2 Register 8 t 0x20 I2C SMBus alert level e I2C SMBusAlert Low uint16 t 0x2000 e iidefine I2C SMBusAlert High uint18 t OXDFFF I2C transfer direction e didefine I2C Direction Transmitter uint8 1 0x00 e define 2C Direction 8 1 0 01 2 Programming Example The example below provides a typical configuration of the 12C peripheral For more examples about 2 configuration and usage please refer to the examples provided within the STM32F2 Standard Peripheral Library package under Project STM32F2xx_StdPeriph_Examples l2C DocID 18540 Rev 1 4 UM1061 Inter integrated circuit interface 12C 4 To use the 2 at 400 KHz 2 peripheral input define FAST I2C MODE ifdef FAST MODI define 12 5 else define 2 define 2 5 tendif FAST derine I2 DW WCC 12C MO Isl clock 340000 100000 LAC DwieyCyele DE
614. uint8_t CAN FilterinitTypeDef CAN FilterMode Specifies the filter mode to be initialized This parameter can be a value CAN_filter_mode uint8_t CAN_FilterinitTypeDef CAN_FilterScale Specifies the filter scale This parameter can be a value of CAN filter scale FunctionalState CAN FilterlnitTypeDef CAN FilterActivation Enable or disable the filter This parameter be set either to ENABLE or DISABLE DocID 18540 Rev 1 UM1061 Controller area network CAN 4 1 7 3 CanTxMsg CanTxMsgis defined in the stm32f2xx_can h Data Fields uint32_t Stdld uint32_t Extld uint8_t IDE uint8_t RTR uint8_t DLC uint8 t Data Field Documentation uint32 t CanTxMsg Stdld Specifies the standard identifier This parameter can be a value between 0 and Ox7FF uint32 t CanTxMsg Extld Specifies the extended identifier This parameter can be a value between 0 and Ox1FFFFFFF 8 t CanTxMsg IDE Specifies the type of identifier for the message that will be transmitted This parameter can be a value of CAN identifier type uint8 t CanTxMsg RTR Specifies the type of frame for the message that will be transmitted This parameter can be a value of CAN remote transmission request 8 t CanTxMsg DLC Specifies the length of the frame that will be transmitted This parameter can be a value between 0 and 8 8 t CanTxMsg Data 8 Contains the data to be transmitted It ra
615. uleSpaceTimingStruct FSMC Attribute Space Timing FSMC PCCARDTiminglnitTypeDef FSMC PCCARDInitTypeDef FSMC lOSpaceTimingStruct FSMC IO Space Timing FSMC Firmware driver API description The following section lists the various functions of the FSMC library NOR SRAM controller The following seguence should be followed to configure the FSMC to interface with SRAM PSRAM NOR or OneNAND memory connected to the NOR SRAM Bank 1 Enable the clock for the FSMC and associated GPIOs using the following functions RCC_AHB3PeriphClockCmd RCC_AHB3Periph_FSMC ENABLE RCC_AHB1PeriphClockCmd RCC_AHB1Periph_GPIOx ENABLE FSMC pins configuration Connect the involved FSMC pins to AF12 using the following function GPIO PinAFConfig GPIOx PinSourcex GPIO AF FSMCO Configure these FSMC pins in alternate function mode by calling the function GPIO Declare a FSMC_NORSRAMInitTypeDef structure for example FSMC_NORSRAMInitTypeDef FSMC NORSRAMInitStructure and fill the FSMC NORSRAMInitStructure variable with the allowed values of the structure member Initialize the NOR SRAM Controller by calling the function FSMC NORSRAMInit amp FSMC NORSRAMInitStructure Then enable the NOR SRAM Bank for example FSMC_NORSRAMCmd FSMC_Bank1_NORSRAM2 ENABLE At this stage you can read write from to the memory connected to the NOR SRAM Bank The NOR SRAM Controller functions are the following FSMC NORSRAMDelnit FSMC_NO
616. unction Description Returns the last ADC1 ADC2 and ADC3 regular conversions results data in the selected multi mode Parameters None Return values The Data conversion value Notes In dual mode the value returned by this function is as following Data 15 0 these bits contain the regular data of ADC1 Data 31 16 these bits contain the regular data of ADC2 e In triple mode the value returned by this function is as following Data 15 0 these bits contain alternatively the DocID 18540 Rev 1 Ly UM1061 Analog to digital converter ADC 3 2 8 3 2 8 1 3 2 8 2 4 regular data of ADC1 ADC3 and ADC2 Data 31 16 these bits contain alternatively the regular data of ADC2 ADC1 and ADC3 Regular Channels DMA Configuration functions ADC DMACmd Function Name Function Description Parameters Return values Notes void ADC DMACmd ADC TypeDef ADCx FunctionalState NewState Enables or disables the specified ADC DMA request ADCx where x can be 1 2 or 3 to select the ADC peripheral NewState new state of the selected ADC DMA transfer This parameter can be ENABLE or DISABLE None None ADC_DMARequestAfterLastTransferCmd Function Name Function Description Parameters Return values Notes void DMARequestAfterLastTransferCmd ADC_TypeDef ADCx FunctionalState NewState Enables or disables the ADC DMA request after last transfer Single ADC mode ADCx w
617. unication Polling mode Interrupt mode or DMA mode Polling Mode In Polling Mode the communication can be managed by 10 flags 1 USART_FLAG_TXE to indicate the status of the transmit buffer register 2 USART_FLAG_RXNE to indicate the status of the receive buffer register 3 USART_FLAG_TC to indicate the status of the transmit operation 4 USART FLAG IDLE to indicate the status of the Idle Line 5 USART FLAG CTS to indicate the status of the nCTS input 6 USART FLAG LBD to indicate the status of the LIN break detection 7 USART FLAG indicate if a noise error occur 8 USART FLAG FE to indicate if a frame error occur 9 USART FLAG PE to indicate if a parity error occur 10 USART FLAG ORE to indicate if an Overrun error occur In this Mode it is advised to use the following functions A FlagStatus USART GetFlagStatus USART TypeDef USARTx uint16 t USART FLAG J void USART_ClearFlag USART_TypeDef USARTx uint16 t USART FLAG Interrupt Mode In Interrupt Mode the USART communication can be managed by 10 pending bits and 8 interrupt sources e Pending Bits USART_IT_TXE to indicate the status of the transmit buffer register USART_IT_RXNE to indicate the status of the receive buffer register USART_IT_TC to indicate the status of the transmit operation USART_IT_IDLE to indicate the status of the Idle Line USART_IT_CTS to indicate the status of the nCTS input USART IT LBD to indicate the status
618. unter Mode to be used This parameter can be one of the following values CounterMode TIM Up Counting Mode CounterMode Down Down Counting Mode CounterMode CenterAlignedt TIM Center Aligned Mode1 TIM CounterMode CenterAligned2 TIM Center Aligned Mode2 CounterMode CenterAligned3 TIM Center Aligned Mode3 None None void TIM SetCounter TIM TypeDef TIMx uint32 t Counter Sets the TIMx Counter Register value TIMx where x can be 1 to 14 to select the TIM peripheral Counter specifies the Counter register new value None None DoclD 18540 Rev 1 529 634 General purpose timers TIM UM1061 25 2 9 7 25 2 9 8 25 2 9 9 530 634 TIM SetAutoreload Function Name Function Description Parameters Return values Notes TIM GetCounter Function Name Function Description Parameters Return values Notes TIM GetPrescaler Function Name Function Description Parameters Return values Notes void TIM_SetAutoreload T M_TypeDef TIMx uint32_t Autoreload Sets the TIMx Autoreload Register value TIMx where x can be 1 to 14 to select the TIM peripheral Autoreload specifies the Autoreload register new value None None uint32 t TIM GetCounter TIM TypeDef TIMx Gets the TIMx Counter value TIMx where x can be 1 to 14 to select the TIM peripheral Counter Register value None uint16 t GetPres
619. up An additional wakeup event is detected if the WKUP pin is enabled by setting the EWUP bit when the WKUP pin level is already high PWR FLAG SB StandBy flag This flag indicates that the system was resumed from StandBy mode PWR FLAG PVDO PVD Output This flag is valid only if PVD is enabled by the PWR_PVDCmd function The PVD is stopped by Standby mode For this reason this bit is equal to 0 after Standby or reset until the PVDE bit is set PWR FLAG BRR Backup regulator ready flag This bit is not reset when the device wakes up from Standby mode or by a system reset or power reset Return values e The new state of PWR FLAG SET or RESET Notes None PWR ClearFlag Function Name void PWR ClearFlag uint32 t PWR FLAG Function Description Clears the PWR s pending flags Parameters PWR FLAG specifies the flag to clear This parameter can be one of the following values FLAG WU Wake Up flag DoclD 18540 Rev 1 351 634 Power control PWR UM1061 18 3 18 3 1 352 634 PWR_FLAG_SB StandBy flag Return values None Notes None PWR Firmware driver defines PWR Firmware driver defines PWR PWR_Flag e define PWR_FLAG_WUPWR_CSR_WUF e define PWR_FLAG_SBPWR_CSR_SBF e define PWR_FLAG_PVDOPWR_CSR_PVDO e define PWR FLAG BRRPWR PWR PVD detection level e define PWR PVDLevel CR PLS LEVO e iidefine PVDLevel 1PWR CR PLS LEV1 e
620. upt event controller EKTI UM1061 11 2 1 11 2 2 11 2 3 218 634 Specifies the EXTI lines to be enabled or disabled This parameter can be any combination value of EXTI_Lines e EXTIMode_TypeDef EXTI InitTypeDef EXTI Mode Specifies the mode for the EXTI lines This parameter can be a value of EXTIMode TypeDef e EXTITrigger TypeDef InitTypeDef EXTI Trigger Specifies the trigger signal active edge for the EXTI lines This parameter can be a value of EXTITrigger TypeDef FunctionalState EXTI InitTypeDef EXTI LineCmd Specifies the new state of the selected EXTI lines This parameter can be set either to ENABLE or DISABLE EXTI Firmware driver API description The following section lists the various functions of the EXTI library EXTI features External interrupt event lines are mapped as following e available GPIO pins are connected to the 16 external interrupt event lines from EXTIO to EXTI15 EXTI line 16 is connected to the PVD Output EXTI line 17 is connected to the RTC Alarm event EXTI line 18 is connected to the USB OTG FS Wakeup from suspend event EXTI line 19 is connected to the Ethernet Wakeup event EXTI line 20 is connected to the USB OTG HS configured in FS Wakeup event EXTI line 21 is connected to the RTC Tamper and Time Stamp events EXTI line 22 is connected to the RTC Wakeup event How to use this driver In order to use an I O pin as an external interrupt source follow steps
621. urable prescaler 9 pin Below is the list of functions used to configure the internal and external clocks PLLs CSS and MCO pins RCC Delnit RCC_HSEConfig RCC_WaitForHSEStartUp RCC_AdjustHS CalibrationValue RCC_HSICmd RCC LSEConfig RCC LSICmd RCC PLLConfig RCC PLLCmda RCC PLLI2SConfig RCC PLLI2SCmd ClockSecuritySystemCmd RCC_MCO1Config RCC_MCO2Config DocID 18540 Rev 1 4 UM1061 Reset and clock control RCC 19 2 3 System AHB and APB busses clocks configuration This section provides functions allowing to configure the System AHB 1 and 2 busses clocks Several clock sources can be used to drive the System clock SYSCLK HSI HSE and PLL The AHB clock 1 is derived from System clock through configurable prescaler and used to clock the CPU memory and peripherals mapped on AHB bus GPIO APB1 PCLK1 and APB2 PCLK2 clocks are derived from AHB clock through configurable prescalers and used to clock the peripherals mapped on these busses You can use RCC GetClocksFreq function to retrieve the frequencies of these clocks All the peripheral clocks are derived from the System clock SYSCLK except e 12S the 125 clock can be derived either from a specific PLL PLLI2S or from an external clock mapped on the 125 CKIN pin You have to use I2SCLKConfig function to configure this clock e RTC the RT
622. urce This parameter can be one or more of the following values TIM EventSource Update Timer update Event source TIM EventSource CCT Timer Capture Compare 1 Event source TIM EventSource 2 Timer Capture Compare 2 Event source EventSource Timer Capture Compare Event source EventSource 4 Timer Capture Compare 4 Event source TIM EventSource Timer COM event source EventSource Trigger Timer Trigger Event source TIM EventSource Break Timer Break event source Return values Notes and can only generate an update event e TIM EventSource and EventSource Break are used only with TIM1 and 8 25 2 13 3 GetFlagStatus Function Name FlagStatus TIM GetFlagStatus T M_TypeDef TIMx uint16_t TIM_FLAG Function Description Checks whether the specified TIM flag is set or not Parameters e TIMx where x can be 1 to 14 to select the TIM peripheral 556 634 DoclD 18540 Rev 1 ITA UM1061 General purpose timers TIM 25 2 13 4 ClearFlag 3 Return values Notes Function Name Function Description Parameters FLAG specifies the flag to check This parameter can be one of the following values TIM FLAG Update TIM update Flag TIM FLAG CCT TIM Capture Compare 1 Flag TIM FLAG 2 TIM Capture Compare 2 Flag TIM FLAG TIM Capture Compare 3 Flag TIM
623. urces Flags The 15 flags can be divided into 4 groups e Transmit Flags CAN FLAG CAN_FLAG_RQCP1 CAN FLAG 2 Request completed MailBoxes 0 1 and 2 Flags Set when when the last request transmit or abort has been performed e Receive Flags FLAG CAN_FLAG_FMP1 FIFO 0 and 1 Message Pending Flags set to signal that messages are pending in the receive FIFO These Flags are cleared only by hardware FLAG FFO0 CAN_FLAG_FF1 FIFO 0 and 1 Full Flags set when three messages are stored in the selected FIFO DocID 18540 Rev 1 UM1061 Controller area network CAN CAN_FLAG_FOVO CAN_FLAG_FOV1 FIFO 0 and 1 Overrun Flags set when new message has been received and passed the filter while the FIFO was full e Operating modes Flags CAN FLAG WKU Wake up Flag set to signal that a SOF bit has been detected while the CAN hardware was in Sleep mode CAN_FLAG_SLAK Sleep acknowledge Flag Set to signal that the CAN has entered Sleep Mode e Error Flags CAN_FLAG_EWG Error Warning Flag Set when the warning limit has been reached Receive Error Counter or Transmit Error Counter greater than 96 This Flag is cleared only by hardware CAN FLAG EPV Error Passive Flag Set when the Error Passive limit has been reached Receive Error Counter or Transmit Error Counter greater than 127 This Flag is cleared only by hardware FLAG BOF Bus Off Flag set when CAN e
624. us of the following values None None FLASH ERR FLASH Error Interrupt FLASH FLASH end of operation Interrupt FlagStatus FLASH_GetFlagStatus uint32 t FLASH FLAG Checks whether the specified FLASH flag is set or not FLASH FLAG specifies the FLASH flag to check This parameter can be one of the following values FLASH FLAG EOP FLASH End of Operation flag FLASH FLAG OPERR FLASH operation Error flag FLASH FLAG WRPERR error flag FLASH FLAG PGAERR Alignment error flag FLASH FLAG PGPERR Parallelism error flag FLASH FLAG PGSERR Sequence error flag FLASH Write protected FLASH Programming FLASH Programming FLASH Programming FLASH FLAG BSY FLASH Busy flag The new state of FLASH FLAG SET or RESET None void FLASH ClearFlag uint32 t FLASH FLAG Clears the FLASH s pending flags FLASH FLAG specifies the FLASH flags to clear This parameter can be any combination of the following values FLASH FLAG EOP FLASH End of Operation flag FLASH FLAG OPERR FLASH operation Error flag FLASH FLAG WRPERRHR FLASH Write protected error flag DoclD 18540 Rev 1 ky UM1061 FLASH Memory FLASH FLASH FLAG PGAERR FLASH Programming Alignment error flag FLASH FLAG PGPERR FLASH Programming Parallelism error flag FLASH FLAG PGSERR FLASH Programming Sequence error flag Return values None Notes e None 12 2 9 4 FLASH GetStatus Function Name FLASH
625. us receiver UM1061 transmitter USART 26 2 11 26 2 11 1 26 2 11 2 598 634 In this Mode it is advised to use the function void USART_DMACmd USART_TypeDef USARTx 6 t USART DMAReq FunctionalState NewState a USART DMAReq Tx specifies the Tx buffer DMA transfer request b USART DMAReq Rx specifies the Rx buffer DMA transfer request USART ITConfig USART GetFlagStatus USART ClearFlag USART GetlTStatus USART_ClearlTPendingBit Initialization and configuration functions USART_Delnit Function Name void USART_Delnit USART_TypeDef USARTx Function Description Deinitializes the USARTx peripheral registers to their default reset values Parameters e USARTx where x be 1 2 3 4 5 or 6 to select the USART or UART peripheral Return values e None Notes None USART Init Function Name void USART_Init USART_TypeDef USARTx USART_InitTypeDef USART_InitStruct Function Description Initializes the USARTx peripheral according to the specified parameters in the USART_InitStruct Parameters USARTx where x can be 1 2 3 4 5 6 to select the USART or UART peripheral e USART_InitStruct pointer to a USART_InitTypeDef structure that contains the configuration information for the specified USART peripheral Return values None Notes None DociD 18540 Rev 1 4 UM1061 Universal synchronous asynchronous receiver transmitter USART 26 2 11 3
626. values Channel 0 ADC ChannelO selected Channel 1 ADC Channel selected Channel 2 ADC Channel selected Channel 3 ADC Channels selected ADC Channel 4 ADC Channel4 selected Channel 5 ADC Channel5 selected Channel 6 ADC Channel6 selected Channel 7 ADC Channel7 selected ADC Channel 8 ADC Channel8 selected Channel 9 ADC Channel9 selected ADC Channel 10 ADC Channel10 selected ADC Channel 11 ADC Channel11 selected 68 634 DocID 18540 Rev 1 Gr UM1061 Analog to digital converter ADC 3 2 9 2 4 Return values e Notes Channel 12 ADC Channel12 selected Channel 13 ADC Channel13 selected Channel 14 ADC Channel14 selected Channel 15 ADC Channel15 selected Channel 16 ADC Channel16 selected Channel 17 ADC Channel17 selected Channel 18 ADC Channel18 selected Rank The rank the injected group seguencer This parameter must be between 1 and 4 ADC_SampleTime The sample time value to be set for the selected channel This parameter can be one of the following values ADC_SampleTime_3Cycles Sample time equal to cycles SampleTime 15Cycles Sample time equal to 15 cycles SampleTime 28Cycles Sample time equal to 28 cycles SampleTime 56Cycles Sample time equal to 56 cycles SampleTime 84Cycles Samp
627. values Notes void TIM_TIxExternalClockConfig TIM TypeDef TIMx uint16_t TIM_TIxExternalCLKSource uint16_t ICPolarity uint16_t ICFilter Configures the TIMx Trigger as External Clock TIMx where x can be 1 2 3 4 5 8 9 10 11 12 13 or 14 to select the TIM peripheral TIM_TIxExternalCLKSource Trigger source This parameter can be one of the following values TlixExternalCLK1Source TITED TI1 Edge Detector TixExternalCLK1Source 1 Filtered Timer Input 1 TixExternalCLK1Source TI2 Filtered Timer Input 2 TIM ICPolarity specifies the TIx Polarity This parameter can be one of the following values ICPolarity Rising ICPolarity Falling ICFilter specifies the filter value This parameter must be a value between 0 0 and OxF None None 25 2 14 4 ETRClockModet1 Config 562 634 Function Name Function Description Parameters void ETRClockMode1Config TypeDef TIMx uint 6 t TIM ExtTRGPrescaler uint16 t ExtTRGPolarity uint16 t ExtTRGFilter Configures the External clock Model TIMx where x can be 1 2 3 4 5 or 8 to select the TIM peripheral TIM ExtTRGPrescaler The external Trigger Prescaler This parameter can be one of the following values TIM ExtTRGPSC OFF ETRP Prescaler OFF 5 DIV2 frequency divided by 2 TIM ExtTRGPSC DIV4 ETRP frequency
628. vents are monitored through multiple flags Limitations When calling this function the Status register is accessed Some flags are cleared when the status register is accessed So checking the status of one Flag may clear other ones This function may need to be called twice or more in order to monitor one single event For detailed description of Events please refer to section 2 Events stm32f2xx i2c h file 2 ReadRegister DoclD 18540 Rev 1 313 634 Inter integrated circuit interface 12C UM1061 16 2 7 16 2 7 1 16 2 7 2 16 2 7 3 314 634 2 ITConfig I2C CheckEvent 2 2 GetFlagStatus I2C ClearFlag I2C GetlTStatus 2 ClearlTPendingBit Initialization and configuration functions 2 Delnit Function Name Function Description Parameters Return values Notes I2C Init Function Name Function Description Parameters Return values Notes I2C Structlnit void I2C Delnit 2C TypeDef I2Cx Deinitialize the 2 peripheral registers to their default reset values e 2 where x can be 1 2 3 to select the 12C peripheral e None None void I2C_Init 2 TypeDef I2Cx 2 InitTypeDef I2C_InitStruct Initializes the 2 peripheral according to the specified parameters in the I2C InitStruct e 2 where x be 1 2 3 to select the 12C peripheral e 2 In
629. void FSMC_ClearlTPendingBit uint32 t FSMC Bank uint32 t FSMC IT Function Description Clears the FSMC s interrupt pending bits Parameters Return values Notes FSMC Bank specifies the FSMC Bank to be used This parameter can be one of the following values FSMC 2 FSMC Bank2 FSMC Bank3 FSMC Bank3 FSMC Bank4 PCCARD FSMC 4 PCCARD FSMC specifies the interrupt pending bit to clear This parameter can be any combination of the following values FSMC RisingEdge Rising edge detection interrupt A FSMC IT Level Level edge detection interrupt FSMC IT FallingEdge Falling edge detection interrupt None None FSMC Firmware driver defines FSMC Firmware driver defines FSMC FSMC Access Mode DocID 18540 Rev 1 267 634 Flerible static memory controller FSMC UM1061 268 634 e define FSMC AccessMode A uint32 t 0x00000000 e didefine FSMC AccessMode B uint32 t 0x10000000 e didefine FSMC AccessMode C uint32 t 0x20000000 e define FSMC AccessMode D uint32 t 0x30000000 FSMC Asynchronous Wait e define FSMC AsynchronousWait Disable uint32 t 0x00000000 e define AsynchronousWait Enable uint32 1 0x00008000 Burst Access Mode e define FSMC BurstAccessMode Disable uint32 t 0x00000000 e didefine FSMC BurstAccessMode Enable uint32 t 0x00000100 FSMC Data Address Bu
630. ware flow control disabled RTS and CTS signals Receive and transmit enabled z Malem SATIS RCC_APB1PeriphClockCmd APBlPeriph USART USART InitStru JL SEED ure USART BaudRate 115200 tar wControl None USART3 amp USART InitStructure Enable USART3 USART Cmd USART3 ENABLE Enable USART3 Receive interrupt 3 sat ete pra USAR Mocks USARI ie USART ITConfig USART3 USART IT RKNE ENABLE ENA BLE ure USART WordLength USART Wordl ure USART StopBits USART Stop Ure USART Perity USART Parity Nop ure USART HardwareFlowControl Bi Length 8b ite 15 USART MOGE Declare a global variable IO uint8 t RxData and copy the code below to stm32f2xx it c file brief This function handles USART3 global interrupt request param None retval None i void USART3 IROHandler void if USART GetITStatus USART3 USART IT RXNE ES ET Read one byte from the receive data register DoclD 18540 Rev 1 631 634 Miscellaneous add on to CMSIS functions misc UM1061 RxData USART ReceiveData USART3 632 634 18540 Rev 1 4 UM1061 Revision history 29 Revision history Table 14 Revision history Date Revision Chan
631. x00000010 e define FSMC IT FallingEdge uint32 1 0x00000020 FSMC Memory Type e idefine FSMC MemoryType SRAM uint32 t 0x00000000 e define MemoryType PSRAM uint32 1 0 00000004 e define FSMC MemoryType NOR uint32 1 0x00000008 FSMC NAND Bank e define FSMC Bank2 NAND uint32 t 0x00000010 DocID 18540 Rev 1 4 UM1061 Flexible static memory controller FSMC e define FSMC_Bank3_NAND uint32_t 0x00000100 FSMC_NORSRAM_Bank e define FSMC_Bank1_NORSRAM1 uint32_t 0x00000000 e define FSMC_Bank1_NORSRAM2 uint32_t 0x00000002 e define FSMC_Bank1_NORSRAM3 uint32_t 0x00000004 e define FSMC_Bank1_NORSRAM4 uint32_t 0x00000006 FSMC_PCCARD_Bank e define FSMC_Bank4_PCCARD uint32_t 0x00001000 FSMC_Wait_feature e define FSMC Waitfeature Disable uint32 t 0x00000000 e didefine FSMC Waitfeature Enable uint32 0 00000002 FSMC Wait Signal e define FSMC WaitSignal Disable uint32 1 0x00000000 e define FSMC WaitSignal Enable uint32 1 0x00002000 DocID 18540 Rev 1 271 634 3 Flerible static memory controller FSMC UM1061 272 634 FSMC_Wait_Signal_Polarity e define FSMC WaitSignalPolarity Low uint32 1 0x00000000 e define FSMC WaitSignalPolarity High uint32 t 0x00000200 FSMC Wait Timing e define FSMC WaitSignalActive BeforeWaitState uint32 t 0x00000000 e define FSMC WaitSignalActive DuringWaitState uint32 0 00000800 FSMC
632. xx_rtc h file and contains the date configuration parameters Data Fields e uint32_t RTC_WeekDay uint32_t RTC Month uint8 t RTC Date uint8 tRTC Year Field Documentation DocID 18540 Rev 1 413 634 Real time clock RTC UM1061 21 1 5 21 2 21 2 1 414 634 e uint32 t RTC DateTypeDef RTC WeekDay Specifies the RTC Date WeekDay This parameter can be a value of RTC_WeekDay_Definitions e 32 t RTC_DateTypeDef RTC_Month Specifies the RTC Date Month This parameter can be a value of RTC Month Date Definitions e uini8 t RTC DateTypeDef RTC Date Specifies the RTC Date This parameter must be set to a value in the 1 31 range e Uuint8 t RTC DateTypeDef RTC Year Specifies the RTC Date Year This parameter must be set to a value in the 0 99 range RTC AlarmTypeDef RTC AlarmTypeDef is defined in the stm32f2xx_rtc h file and contains the alarm configuration parameters Data Fields e RTC TimeTypeDef RTC AlarmTime e uint32 t RTC AlarmMask e uint32 t RTC AlarmDateWeekDaySel e uint8 t RTC AlarmDateWeekDay Field Documentation e HTC TimeTypeDef RTC AlarmTypeDef RTC AlarmTime Specifies the RTC Alarm Time members e uint32 t RTC AlarmTypeDef RTC AlarmMask Specifies the RTC Alarm Masks This parameter can be a value of RTC AlarmMask Definitions e 32 AlarmTypeDef RTC AlarmDateWeekDaySel Specifies the RTC Alarm is on Date or WeekDay This parameter can be a val

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