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1. 65 O O PTG7 PTGS 33 c1 0000 VDD lo o GND O OSOBBADGE MCU I O Port connector provides all digital 1 O Analog or PTB I O Port connector provides analog inputs or PTB I O Supplied with DB9 Serial Cable Documentation CD 9S08Badge 9S08 BADGE 08 08 03 GETTING STARTED The 9S08Badge single board computer is a fully assembled fully functional development board for the Motorola MC9S08GB60 microcontroller Provided with 2 AA batteries and serial cable Support software for this development board is provided for Windows 95 98 NT 2000 XP operating systems Development board users should also be familiar with the hardware and software operation of the target HCS08 device refer to the provided Motorola User Manual for the device and the HCS08 Reference Manual for details The demonstration board purpose is to promote the features of the 9S08GB60 device or to assist the user in quickly developing an application with a known working environment Users should be familiar with memory mapping memory types and embedded software design for the quickest successful application development Application development may be performed by applying the embedded serial interface monitor or by applying a compatible HCS08 BDM cable with supporting host software The monitor provides an effective and low cost debug method Note that when a BDM cable is appl2. HCS08 SCI and SCl2 peripherals Refer to the COM_EN options for enabling the HCS08 signals applied to these ports The SCI1 port is applied by default with the Debug Monitor The HCS08 TxD1 2 and RxD1 2 signals are converted to RS232 levels by U3 and provided to the DB9 serial connectors Following is the DB9S connection reference SCI1 and SCI2 1 1 X Female DB9 connector that interfaces to the HCS08 internal TXD1 2 6 6 SCI1 serial port via the U3 RS232 transceiver It applies simple RXD1 3 7 7 2 wire asynchronous serial without flow controls 414 8 8 1 4 6 connected and 7 8 connected GND 5 9 9 LED 1 5 Indicators LED Indicators 1 5 are enabled to HCS08 I O ports by the LED_EN option bank The LED indicators will light with a logic low signal applied from the respective HCS08 I O port if the option is installed The Badge board user should be familiar with the input and output application so that port conflicts do not occur Following is the LED connection reference table Position CONNECTOR 3_ pins 5 6 LED 3 PTF2 4_ pins 7 8 LED 4 PTF3 5 pins 9 10 LED 5 PTDO TPMI1CHO Note LED indicators are active logic low 11 9S08 BADGE 08 08 03 VRH_SEL and 1 8V Reference A 1 8 Volt reference circuit U2 is provided for demonstration program application and user application if wanted The VRH_SEL option bank selects the input and output configuration of the 1 8V reference circuit Caution should be applied when selecting the VRH_SEL
3. This port connector provides access to all the 9SO8GB60 I O ports except PTB PTAG KBD6 PTA4 KBD4 PTA2 KBD2 PTAO KBDO VDD PTC6 PTC4 CLKOUT PTC2 SDA PTCO TXD2 VDD PTD6 TPM2CH3 PTD4 TPM2CH1 PTD2 TPM1CH2 PTDO TPM1CHO VDD PTE6 PTE4 MOSI PTE2 SS PTEO TXD1 VDD PTF6 PTF4 PTF2 PTFO VDD PTG6 PTG4 PTG2 EXTAL PTGO BGND MS RESET PTA7 KBD7 PTA5 KBD5 PTA3 KBD3 PTA1 KBD1 PTC4 PTC3 SCL PTC1 RXD2 GND PTD7 TPM2CH4 PTD5 TPM2CH2 PTD3 TPM2CHO PTD1 TPM1CH1 PTE5 SPSCK PTE3 MISO PTE1 RXD1 GND PTF7 PTF5 PTF3 PTF1 PTG1 XTAL IRQ 14 Notes PTA6 7 also provide Push Switch SW1 2 PTEO 1 provide SCI1 O to SCI1 Port if enabled PTCO 1 provide SCI2 I O to SCI2 port if enabled PTDO provides LED5 output if enabled PTG1 2 are the Y1 XTAL and EXTAL signals by default R3 and R4 isolate the MCU PORT XPG1 and XPG2 pins to prevent crystal operation interference PTGO is the BGND signal if a BDM is connected PTFO F3 provide LED1 4 output if enabled
4. 2 Timer 3 channel TPM 1 Timer 8 Channel 10 BIT A D SPI and IIC Serial Ports 2 x SCI Serial Ports Key Board Wake up Ports BDM DEBUG Port Clock generator w FLL up to 40Mhz operation 32Khz Crystal Regulated 3 3V power supply SCI1 Serial Port w RS232 DB9 S Connector SCI Serial Port SCl2 Serial Port w RS232 DB9 S Connector SCI2 Serial Port Power ON OFF switch User Components Provided 5 LED Indicators PTFO 3 PTDO 4 Push Switches PTA6 7 IRQ RESET Digital to Analog PTD2 PTB1 1 8Volt reference 2 x AA Battery Holder o o and Batteries Specifications Board Size 3 0 x 3 8 8ldO O 98 pa 1 S A5 OJO PTA7 c15 ore aN O PTAS A OO O O PTA3 z z ES AQ O O PTAL s 5 GND LE Qu pr O ON ll C6 O O PTC7 oo 1 No Ol3 PTCA O O PTUS pall O PTC3 o o 9 O O PTCA DD O O END DB O O PTD7 D4 O O PTD5 7 o S 5086860 AL lil om BB PTF2 O O PTF3 anufacturing an CO D2 O O PTD3 PTDO O O PTD4 O GND PTE6 O O PTE7 E4 O O PTES E2 O O PTE3 PTEO O O PTE1 O END PTF6 O O PTF7 Ri4 PTF4 O O PTF5 CI O VU MERA S Ss PTFO O O PTF1 m VDD O O END
5. options so that supply or port conflicts do not occur VRH SEL VRH_SEL INPUT SIGNAL OUTPUT SIGNAL OPERATION POSITION I O PORT 1 pins1 2 VDDAD G 3V U2 Input Supply U2 is poweredon 3 pins 5 6 Notes 1 VRH_SEL jumper positions 1 pins 1 2 and 2 pins 3 4 must not be installed at the same time 2 VRH_SEL jumper positions 4 pins 7 8 and 5 pins 9 10 must not be installed at the same time J P2 VREFL JP2 is default closed by circuit trace jumper that provides a VREFL connection to Ground potential The user should not need to modify this connection JP3 U1 9508GB60 VDD JP3 is default installed at all times JP3 is provided to allow the actual current being consumed by the GB60 device to be measured SW1 and SW2 Push Switches The push switches provide momentary active low input for user applications The switches provide input to HCS08 ports PTA6 and PTA7 Input ports PTA6 and PTA7 provide KBD6 and KBD7 interrupt input capability also The switches also provide the Demo program selection during Reset or power on condition if the demo program is installed in the flash memory Refer to 9SO8Badge STARTUP SW2 on HCS08 PTA7 also provides the force debug monitor active operation Holding SW2 down during power up will force the debug monitor active if it is still resident in the flash memory IRQ Switch Pressing the IRQ switch provides an IRQ active signal to the GB60 device 12 9S08 BAD
6. 9S08Badge Demonstration Board for Motorola MC9SO8GB60 Axiom Manufacturing e 2813 Industrial Lane e Garland TX 75041 Email Sales Caxman com Web http www axman com 9S08 BADGE 08 08 03 CONTENTS CAUTIONARY NOTES ivisisciscosisvicsonsscseceasessessesesseccosevascosesceisssessdecteccobestecsssestesosbesbaoesiecissesbessosssscasesseseessvseasodessaseosesdeosssessoes s 3 TERMINOLOGY murenen ar AA EN TAE TENO A EAS ENE EOS EEN EA SEN sess odinces cosesesseness 3 AAA O 4 GEETING STARTED wiasscccscccsedsasccviccssesseucoceevevesstccesccssevesedsedssscsshevecesstsseecssuseeseseesdoscuvesossaseeacgevssdevevebeess oucccbeosessseasnaessevscassessece 5 REFERENCE DOCUMENTATION trio amp cch25s de Ses cet dos ceake Sick AA A eats Re tea ees Rete S 9SOSBADGE STARTUP iii dida EO eaves 6 What Do the Demo Programs DO icccsccciestsscsotiesecseussisassdasisessnciasessigaverdbcssiseadesuisestestasugsevadersaepoivesdecbescbectascssusebsesbussioasvaes 6 Applying the DEMO Prog rains aii is dost gus cess des ii att 7 Selecting th Demo POROS 20d a a a i ec Das eg Wes E te sae eels a a ees a e Tae dee 7 TABLE A gt Demo Program Selection iras 7 TABLE2 Demo Program Option Selections c ccccsccescesscesecseenseessessecseeeseesseesseeeeeesecesecesecusecsaecsaecaaecsaseseesseeseeeeeeeneseseenaes amp DEBUG MONITOR OPERATION siscssesdsccsssscssdsesedetevesssscssaccsvesvssasseasesodetecesedessseecusaseoseaeeesoucpedeosusseassasccdesosssssssacccevesssa
7. EE RA CR A 13 MCW T OiRORT CONNECTORS dit tie aba tete tai nea ea cosets TE A ee A ee o ate Al 14 9S08 BADGE 08 08 03 Cautionary Notes 1 Electrostatic Discharge ESD prevention measures should be applied whenever handling this product ESD damage is not a warranty repair item 2 Axiom Manufacturing does not assume any liability arising out of the application or use of any product or circuit described herein neither does it convey any license under patent rights or the rights of others 3 EMC Information on the 9S08Badge board a This product as shipped from the factory with associated cables has been verified to meet with requirements of CE and the FCC as a CLASS A product o This product is designed and intended for use as a development platform for hardware or software in an educational or professional laboratory c In a domestic environment this product may cause radio interference in which case the user may be required to take adequate prevention measures 2 Attaching additional wiring to this product or modifying the products operation from the factory default as shipped may effect its performance and also cause interference with other apparatus in the immediate vicinity If such interference is detected suitable mitigating measures should be taken Terminology This development board applies option selection jumpers Terminology for application of the option jumpers is as follows Jumper on in or install
8. GE 08 08 03 RESET Switch Pressing the RESET switch provides a RESET active signal to the GB60 device JP1 PWM DAC JP1 options enable a PWM signal filter on HCS08 port PTD2 TPM1CH2 to provide a digital to analog conversion into HCS08 PTB1 ATD1 analog input This circuit is for demonstration of analog signal generation with a PWM timer output The PTB1 ATD1 connection provides for measuring the analog signal value generated in the circuit JP1 Jumper Installation 1 2 Notes 1 JP1 position 1 2 connects PTD2 TPM1CH2 to the R C filter input 2 JP1 position 3 4 connects PTB1 ATD1 to the R C filter output 3 4 9S08Badge I O PORT CONNECTORS ANALOG and PTB I O Port Connector This port connector provides access to the Port B I O or Analog input signals PTBO ADO 1 2 PTB1 AD1 Notes PTB2 AD2 3 4 PTB3 AD3 i PTB4 AD4 5 6 PTB5 AD5 1 PTBO provides 1 8V reference input if enabled VRH_SEL PTB6 AD6 7 8 PTB7 AD7 2 PTB1 provides DAC filter input if enabled JP1 VREFH 9 10 VREFL 3 VREFH is optioned by VRH_SEL The Debug or BDM port is a 6 pin header compatible with a Motorola Background Debug Mode BDM Pod This allows the connection of a background debugger for software development programming and debugging in real time without using HCS08 I O resources BGND PTGO GND See the HCS08 Reference Manual for complete RESET documentation of the BDM 3 3V 13 9SO8BADGE MCU I O Port Connector 08 08 03
9. al computer PC the debug monitor enables users to program FLASH and debug their programs The remainder of the demo programs offer examples of some simple uses of the Badge board The Low power stop3 demo illustrates the low power capability of the MC9SO8GB60 microcontroller operating in stop3 mode The ATD timer demo shows two timers set up as pulse width modulators PWM One of the PWM outputs drives an integrator DAC The other PWM output drives an LED The ATD reads the voltage output from the integrator and modulates the intensity of the LED What Do the Demo Programs Do The Stop3 demo program is the default program executed at power up if no pushbuttons are held down This program demonstrates operation of the microcontroller in low power stop3 mode The program uses the real time interrupt RTI to recover from stop3 mode In stop3 mode clocks are halted and only IRQ KBI LVI and RTI interrupts can occur For this reason when using the serial debugger you can not trace through the demo code once you have reached a stop instruction If you are using the serial debugger and you press the go button on the debugger and test 1 is entered No buttons pressed you will no longer be able to halt or trace the demo code This is because there are no clocks to the serial communications module If you observe LED1 located at the bottom left corner of the Badge board it will quickly flash once approximately twice a second The LED is o
10. ault to isolate the sensitive crystal oscillator connections from the MCU_PORT XPG2 and XPG1 locations The user may connect the PTG1 PTG2 to the XPG1 XPG2 locations by installing a 0805 size O ohm resistor or wire jumper across the R4 R3 component locations respectfully SCH and SCI2 Ports The COM_EN option jumper block provides HCS08 SCI I O ports to the SCI1 and SCI2 communication port connections on the Badge board This allows the user to apply the provided communication transceiver or to apply the associated l O to other purposes Options are also provided to power off or low power the RS232 transceiver The option jumper positions should be reviewed first if any operational problems are encountered with the SCI1 or SCI2 ports 10 9SO8BADGE 08 08 03 COM_EN Position Connector 1 qpins1 2 RS232 Transceiver VDD Enable U3 __ 2 pins 3 4 3 pins 5 6 4 pins 7 8 5__ pins 9 10 41 Notes 1 COM_EN position 1 will power off the RS232 transceiver U3 when open 2 COM_EN position 6 allows IRQ interrupt wake up from a HCSO8 low power mode when a character is received 3 COM_EN position 7 allows shutdown control of the RS232 transceiver A serial character may be received during shutdown to allow wake up No RS232 transmission is possible in shutdown mode Shut down is active with a low level signal SC 1 and SC I2 Connection The SCI1 and SCI2 ports provide standard 9 pin connection with RS232 type interface to the
11. e installed in a different configuration Demo programs are selected at powerup from the state of two of the pushbutton switches SW1 and SW2 located on the bottom left edge of the Badge board If you want to test the stop3 mode for lowest power consumption refer to Table 2 and install the option jumpers on the Badge board per Column A In this configuration no power is applied to the RS 232 level shifter The other demo program applies the option jumper configuration of Column B If it is not important how much current the Badge board draws from the batteries during the stop3 mode demo program install the option jumpers per Column B of Table 1 Installing jumpers as per Column B extra current will be consumed by the RS 232 level shifter circuit To use the monitor program connect a straight through DB 9 serial cable between the COM port on the PC and the SCI1 connector on the Badge board Selecting the Demo Programs Two pushbutton switches are used by the Badge board s software to select the demo programs The switches are SW1 and SW2 The switches are read at power on or Reset Hold down the pushbutton of choice while applying power Apply power to the Badge PC board by sliding the ON_OFF switch located on the top center of the Badge board toward the top of the board After the ON_OFF switch is moved to the on position you can release the pushbutton SWx The actions of the switches are shown in Table 1 TABLE 1 Demo Program Selecti
12. ed jumper is a plastic shunt that fits across 2 pins and the shunt is installed so that the 2 pins are connected with the shunt Jumper off out or idle jumper or shunt is installed so that only 1 pin holds the shunt no 2 pins are connected or jumper is removed It is recommended that the jumpers be idled by installing on 1 pin so they will not be lost This development board applies hardwired option selection for JP2 VREFL This option selection applies a circuit trace between the option pads to complete a default connection This type connection places an equivalent Jumper Installed type option The circuit trace between the option pads may be cut with a razor blade or similar type knife to isolate the default connection provided Applying the default connection again can be performed by installing the option post pins and shunt jumper or by applying a wire between the option pads 9SO8BADGE FEATURES The 9S08Badge is an evaluation or microcontroller Development of applications is quick and easy with the included DB9 serial cable sample software tools examples and debug monitor The prototyping area provides space to apply the MCU I O to your needs The DEBUG port is provided for development tool demonstration board 08 08 03 for the MC9S08GB60 application and is compatible with HCSO8 BDM interface cables and software Features MC9S08GB60 CPU 60K Byte Flash 4K Bytes Ram 56 I O lines 64 pins 5 channel TPM
13. ied to the DEBUG Port for debugging the BDM pod should be powered from an external supply The serial debug monitor is provided in the development board HCS08 device internal flash memory and applies some HCS08 resources for operation See the AN2140 application note from Motorola for complete details User applications operated under monitor control may be configured for dedicated operation by applying the User Reset Vector OxFBFE F and programming the application into the device flash The monitor will remain in protected flash memory for future use if needed Reference Documentation Reference documents are provided on the support CD in Acrobat Reader format AN2140 HCS08 Serial Monitor application note 9S08GB_GT60UM pdf 9SO8GB60 user manual HCSO08RM pdf HCS08 core user manual with instruction set 9508Badge_SCH_A paf 9SO8Badge board schematics 9S08 BADGE 08 08 03 9S08Badge STARTUP If the BADGE board is supplied with batteries pre installed option jumper JP4 must be installed on both pins to enable battery power Default example applications are programmed into the 9S08Badge board Updated examples and additional information is provided at the www futureerc com sO8badge web site The default programs are 1 Debug monitor 2 Low power stop3 demo 3 ATD timer demo The Debug Monitor is the most important program loaded into the MCU residing on the Badge board In conjunction with a program running on a host person
14. n for about 600 microseconds While the LED is off the MCU is in low power stop3 mode and will remain in stop3 for approximately one half second until the next RTI 9S08 BADGE 08 08 03 The ATD timer demo program is executed when SW1 is held down at power up or Reset Timer 1 channel 2 is set up as a PWM output and is connected to a resistor capacitor filter network composing a digital to analog converter DAC The output from the DAC is fed into the input to the ATD channel 1 Timer 1 channel 0 is connected to LED5 Timer 1 channel 0 is also set up as a PWM output The Debug Monitor program is executed when SW2 is held down at power up or Reset The serial debugger when applied with a host PC and associated debug interface program enables a user to erase device FLASH memory program FLASH memory load application programs and debug the application programs The debug monitor dedicates SCI1 as its connection to the host PC and does not use the traditional background debug mode thus eliminating the necessity for a background debug mode cable Free software is available for execution on a PC as an interface to the monitor Refer to application note AN2140 for a full explanation for using the debugger The debugger is enabled when SW2 is held down at system power up Applying the Demo Programs Before you can run the demo programs jumpers must be installed on the Badge board Depending on which programs you plan to run jumpers will b
15. on Switch SWx No Switch held down Stop3 demo swi CAT timer demo 9S08 BADGE 08 08 03 NOTES 1 When power is applied to the Badge board if none of the switches are held down the low power stop3 demo program will execute as the default 2 When power is applied to the Badge board and SW3 is held down the ATD timer demo program will execute 3 When power is applied to the Badge board and SW4 is held down the serial Debug Monitor program will execute A host serial debug program must be executed on your PC to use the monitor program To use the monitor program connect a straight through DB 9 serial cable between COM port on the personal computer and SCI1 on the Badge board TABLE2 Demo Program Option Selections Jumper Name Column A Column B A gt a Low Power Mode Only All MES Modes P DEBUG MONITOR OPERATION See the AN2140 application note on the monitor for complete details of operation Basic operation is provided in this manual The monitor occupies 1K bytes of flash memory and about to 50 bytes of stack space It provides a binary command set via the SCI1 port COMMUNICATION The monitor provides 115 2K baud serial communication on the SCI1 interface port POWER ON or RESET PROMPT The monitor will provide a binary prompt to the Badge board serial SCI1 port 9S08 BADGE 08 08 03 COMMANDS No user commands can be applied with a keyboard with software such as HyperTerminal or AxIDE The monit
16. on should be observed so that the HCS08 I O port pin applied to an on board feature is not also applied to external components by the user POWER SUPPLY Input power is supplied directly from the on board batteries The input supply is enabled with option jumper JP4 ON_OFF switch operation will enable battery supply to the badge board circuits 9S08 BADGE 08 08 03 ON_OFF Switch The ON_OFF slide switch provides board power on and off control With the switch in the ON position battery supply is enabled to the Badge board circuits Batteries The Badge board provides for two AAA type batteries to be installed Note the polarity indications in the battery holder when installing batteries The batteries will provide a nominal 3V supply when applied J P4 Option The JP4 option enables the input supply to the Badge board circuits prior to the ON OFF switch The JP4 option pins can be applied to measure total battery current consumption to the Badge board circuits Y1 Crystal Crystal Y1 provides a 32 768Khz base operating frequency to the HCS08 device The user should refer to the HCSO8 device user manual for information on frequency selection User should also note that the HCSO8 PTG1 and PTG2 I O pins provide the oscillator connection and these I O pins are not provided to the MCU_PORT by default See the R3 and R4 option for changing this configuration R3 XPG2 and R4 XPG1 Options R3 and R4 component locations are open by def
17. or commands are binary and not compatible with keyboard ASCII entry or display Host based software should interface with the monitor on the serial communication port to provide development support INTERRUPT SERVICE SUPPORT The monitor enables automatic hardware vector relocation in the 9508GB60 so user interrupt vectors appear from OxFBCC to OxFBFF User will not have access to the SCl1 SWI and RESET vectors while the monitor is operating Programming the user Reset vector will cause the monitor to execute the user program on Reset See the AN2140 application note for user interrupt application MONITOR MEMORY MAP 0x0000 9508GB60 Direct Page Register Space 0x007F See the 9508GB60 User Manual for details 0x0080 9508GB60 ram memory space 0x107F Initial Monitor Stack Pointer 0x107F 0x1080 Lower flash block User application memory 0x17FF 0x1800 9508GB60 High Page Register block 0x182B 0x182C User Application Flash Memory OxFBCB OxFBCC User Interrupt Vectors OxFBFF See AN2140 for details on application OXFCOO Monitor Flash Memory Space Protected OxFFFF 9S08Badge Board Operation The 9508Badge board provides input and output features to assist in application development These features may be isolated from the applied HCS08 I O ports by the option jumpers This allows alternate use of the HCS08 I O ports for other application and connection on the I O port connectors Cauti
18. seessess 8 MONTOR MEMORY MAPS 2255 20i2ice detec oivcetance shacvaoe vaokte dav etows a deca 9 DSOSBADGE BOARD OPERATION ccssssccssssccsssscccssssscccsssccssssscccesssccccsseccsessceesessacescsssaccscsscsscessacecesssacccesscascessacsccsssees 9 POWER SUBPLY gt A ra boleta 9 ONOQER AE E AEE a E a A 10 OTLETIOS todo aio 10 TPA ODUON A AS E A A Sos aes tes A Seat ee 10 NAMCRY SPAL A E E E E EE EEE Feo a ea wie Bene EE 10 RI XPG2 and REA XP GIJ OOH ONS ise shaken eect a he A ASN ERR ei 10 SCIVAND SCP PORTS idad 10 COMEN a Ed A e A A a a e a O e 11 SCi and SCR Connection cccccccccccccccccccccccscscecsccecesecececececececesecesecesecesesesecesecesecesecececesecesesesecssssesesesesesesesesesesesesesesesesesesens 11 TEED IES INDICATORS 0 focees EE OEE OEO EE O EAEE OE EASE 11 VRA SP ANO SV REFERENCE a E EES 12 VRA SE E AAEE EA Ee ee 12 IPR MRE E EE E E A A A A E E N E A E A 12 SJP3 ULSISOSGBOO VDD E EE EA cen 12 SWI AND 5W2 PUSH SWITCHES e a nec 12 IRO SWITCH nod ai A Ai He da EA E A EA ES 12 RESETS WITCH 2s 2 6553 208 en a e a A A Mice a a Rede Bacay bes he E AE AN 13 JRE HS PWM TDA E A os 13 9SOSBADGE I O PORT CONNECTORS cssscccsssscesssscccssssccccssscccesssccccsssscccessccccscnsccscsssacccesssaccecsscsccssnaccsessnaccccssceceeses 13 ANALOG AND PTB T O PORT CONNECTOR ievscsissssesescesecessessesecsicavcessedescecssceevesueseneeciccveessuntendeeedeavuesugedteacdeveevedeedeteevdseveceeuede 13 DEBUG PORT ro Rr RP e R
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