Home

User Manual for the GPS + 7-Channel Serial I/O and

1. 01010000 Joeomn atoc FROG Prone jane 0101 1000 BtoC FtoG B to CF a G 0101 1010 SME F 0101 1100 Dto E E none 0110 0000 ER A to D F to G 0110 1000 EA BtoD FtoG E E B to D F 0110 1010 E H C to D F 0110 1011 E E E E E E 0111 0000 H Hm tos mn CSCS CT He CSC CO paron ez He ja pora rior ja JE 0111 1110 Tre Aton asia ooor none A A Full Moden B to D 1111 1000 none fBto 11111001 one gt gt 2 ton A a G cto FE D tor H Dto E H 111 1101 none E H A to D F to G none E none Table 3 S6 Codes for the 8 Channel Serial l O Adapter 3 13 Signal Ground Configuration DIP Switch S5 DIP Switch S5 is only found on the 8 Channel Serial I O Adapter It is used to make the RS 232 signal ground available offboard but is multiplexed with some Channel H RS 485 signals None of S5 1 to S5 4 should be closed ON when Channel H is set to RS 485 mode refer to Paragraph 3 1 1 The mapping of DIP Switch S5 to the Pn4 rear I O pins is given in Table 4 In each case a switch in the ON position indicates that a connection to signal ground is made on the corresponding Pn4 pin CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 11 of 19 Switch ON Pin on Pn4 Connected to Ground Pin 19 Aux3 5 2 Pin 20 Aux4 5 3 Pin 47 Aux7 5 4 Pin 48 Aux8 Table 4 Switch S5 RS 232 Ground Connections 3 14 RS 485 Termination DIP Switches S1 to S4 DIP Switches S1 through S4 are use
2. The CPLD control logic can be customised should that be required for the application Please contact Support for further information GPS module The GPS module on the GPS 7 Channel Serial I O Adapter is the u blox LEA 4S Integrated GPS module It features a 4 Hz position update rate with a 157 dBm receiver sensitivity It also supports the reception of Differential GPS DGPS correction data An external backup battery can be connected for faster GPS lock on during system restart so called warm start Dedicated active antenna short circuit protection and open circuit detection circuitry is integrated onto the Serial I O Adapter A Pulse Per Second PPS output from the GPS module is available offboard as either an RS 232 or RS 485 signal as well as being connected to a hardware counter on the PCI UART device itself An overview of the GPS unit s operation and interface is given in Paragraph 5 For detailed information please refer to the LEA 4S Datasheet 2 1 4 GPS Antenna Connector A straight female MMCX antenna connector is installed on the component side of the Serial I O Adapter A mating right angle male MMCX connector can swivel towards either one of two slots in the adapter s PCB providing two distinct routing options for taking the antenna cable offboard A single 300 mm length male MMCX to female SMA pigtail cable is provided with the adapter refer to Annexure A It is suggested that only original Samtec mat
3. The PMC interface consists of a 32 bit PCI bus interface and a number of bus mode signals Bus mode signalling is implemented using dedicated logic ICs Bus mode signalling prevents the Serial I O Adapter from CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 5 of 19 3 3 operating when plugged into a non PMC slot and also allows the host to sense the presence of a Serial I O Adapter in a PMC slot The Serial I O Adapter supports only 32 bit PCI communications The PCI interface is implemented using a PCI based eight channel UART and supports PCI bus speeds of 33 MHz PCI 8 Channel UART This device is an octal PCI bus Universal Asynchronous Receiver and Transmitter UART with support for universal PCI bus I O voltage levels making it suitable for use in a wide range of 3 3 V and 5 0 V PCI hosts A global interrupt source register provides complete interrupt status indication for all 8 channels to speed up interrupt parsing Each UART has its own 16C550 compatible configuration register set and features the following transmit and receive FIFOs of 64 bytes each fully programmable transmit and receive FIFO trigger levels transmit and receive FIFO level counters automatic RTS CTS or DTR DSR hardware flow control with programmable hysteresis levels automatic software Xon Xoff flow control a 16 bit general purpose timer counter support for RS 485 multidrop mode For a detailed description of the PCI UART register inte
4. CT Systems CCII Systems Pty Ltd Registration No 1990 005058 07 Communications Computer Intelligence g Integration g User Manual for the GPS 7 Channel Serial I O Adapter and 8 Channel Serial I O Adapter C 1 Systems Document No CCII LCP 6 MAN 007 Document Issue 1 1 Issue Date 2009 07 08 Print Date 2009 07 08 File Name W LCP TECH MAN CLCMANO7 wpd Distribution List No C4 Systems The copyright of this document is the property of C2l Systems The document is issued for the sole purpose for which it is supplied on the express terms that it may not be copied in whole or part used by or disclosed to others except as authorised in writing by Cl Systems Document prepared by and for CI Systems Cape Town Signature Sheet 20O 097 O Completed by Project Engineer Board Level Products C 1 Systems Accepted by Lo 95 Cm Project Manager Board Level Products C2 Systems Accepted by A a X Keuges Quality Ass jance 2009 01 08 C212 Systems CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page ii of vi Amendment History Improve document naming consistency 2009 07 08 CCII LCP 6 ECP 017 CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMAN07 wpd Page iii of vi Contents 1 Introduction and Scope wes sata S rt A renee 1 1 1 SCOOPS AET E acarne O EN acme ee ete ante eee adda aad 1 1 2 TO UCA ir Sau ere Beane Bae Mathie ee ee Pad ep ee Reheat ae ee ee ad 1 2
5. Cooled PMC approved 2001 08 31 CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 2 of 19 3 Architecture 3 1 System Overview The serial I O interface of the Serial I O Adapter is routed externally via the 64 pin PMC rear I O connector Pn4 Having eight serial channels this gives an I O allocation of eight I O lines per serial channel 3 1 1 GPS 7 Channel Serial I O Adapter On the GPS 7 Channel Serial I O Adapter Channel H of the PCI UART is dedicated to communication with the onboard GPS module The GPS unit supports the reception of Differential GPS DGPS correction data via the Channel H external serial I O interface This external interface is configurable in either RS 232 or RS 485 modes of operation and is controlled by the Channel H mode setting The GPS unit has a dedicated programmable Pulse Per Second PPS output available offboard to the user via the Channel H external interface as either an RS 232 or RS 485 signal This PPS signal is connected to a hardware counter on the PCI UART device as well which could in turn be configured to generate an interrupt after a user specified amount of PPS ticks A permanent external signal ground connection is made via Pin 47 on Pn4 which is the ground reference for offboard RS 232 signalling as well as being the common ground connection used by the optional external GPS backup battery refer to Table 7 The onboard GPS module connects to an external active GPS an
6. to0O E D to E D to E D to D to D to D to D to D to D to P lt gt lt gt 1 1 uy H XI X 1 1 ta ta 5 1 a A A G r G F G r y X G fy Mos Il CTH XT Il Il oj OC Of Cf O o ty Mea X gt XJ gt lt Il C to D F H X 1 A to D Pto G A full am 0 oF Hel T Il F CES ti T x ll j ta I x lt Il xj X x Il SO Of Of Of Cf O ta Mes T gt x lt Il O x Il lt P gt lt 1 1 il XI X UE 1 TH X men Of OC OL Cf OF O OI O OL x gt lt ll Table 2 S6 Codes for the GPS 7 Channel Serial l O Adapter 3 12 2 8 Channel Serial I O Adapter On the 8 Channel Serial I O Adapter the Channel H line drivers RS 232 and RS 485 are connected to Channel H of the PCI UART The Channel H line level serial I O signals are routed to the Aux port on Pn4 as shown in Table 6 The Switch S6 configuration codes for the 8 Channel Serial I O Adapter are given in Table 3 CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 10 of 19 S6 1 to S6 8 RS 485 RS 485 RS 485 Multidrop with Flow Control A none A 6 E A js 2 0010 1001 none Ato B 6 ahne jane 5 A e 0011 1001 E 0011 1010 none 0100 0000 D to F H A toC G BtoC G A jan 0100 100 B to C a tee gt nome gt 0100 1011 none a teoae jane
7. Applicable and Reference Documents 00 cece eee eee 2 2 1 Applicable Documents tii ate et ea be aid se eke Hae Dee awe ea SES dks 2 2 2 Reference Documents nr cece anne 2 2 3 Specifications e e reveled ied 38 Sie EIST ARK Oh Goat es Patel els Bin aly te Pe 2 de JAKCHMCCIURG aa er Potten ile a it di Pata e einer 3 3 1 System OVEIVIE Wan che te Meee ae Vem bee wait eee agus a wee Pes 3 3 1 1 GPS 7 Channel Serial O Adapter oooocccccocooocncc nn 3 3 1 2 8 Channel Serial I O Adapter solo tte eee 4 3 2 PMS BUS sheet ate natasha 2 a RA Ce aay Sack eaten TEA 5 3 3 PGIS ChannellUAR A TI 6 3 4 Configuration Space aii a SER EP ea KESTI DN NN a ia EA 7 3 5 PCI Interrupts eiii E a QS ES MR ete 7 3 6 Configuration EEPROM ss n 7 3 7 Complex Programmable Logic Device CPLD sos n 8 3 8 GRS MOQUIE vico tati ja ka ee a ee je at he valan ee Reel Ls sin Siena Re eae siht 8 3 9 GPS Antenna Connector aori fan osia poistaa dan Grea yaw ards Su dee a ea hein tan Je AN hae 8 3 10 AS 232 Transceivers ayi san singed Td Saw nla ga Vad sleg de yee A a Bead ee Bet 8 Sl RS 485 Transceivers mesias cease in dia a Paw Sita Yam Sede A Ea A ee 9 3 12 Serial Channel Configuration DIP Switch S6 1 2 n 9 3 12 1 GPS 7 Channel Serial O Adapter 00000 nn 9 3 12 2 8 Channel Serial I O Adapter sos tt teen eee 10 3 13 Signal Ground Configuration DIP Switch S5 skn 11 3 14 RS 485 Term
8. PORTE3 41 PORTES 43 PORTE7 45 AUX5 47 AUX7 49 PORTF1 51 PORTF3 53 PORTF5 55 PORTF7 57 PORTG1 59 PORTG3 61 PORTG5 63 PORTG7 Table 6 Pn4 Pin Assignments for the 8 Channel Serial l O Adapter CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 13 of 19 Pin Name RS485 RS 232 RS 232 _ RS485_ PinName Table 7 Pn4 Pin Assignments for the GPS 7 Channel Serial I O Adapter Note Pn4 Signals are configured such that the Serial I O Adapter channels function as Data Terminal Equipment DTE This specifies the I O direction of the signals as follows TxD is an output RxD is an input e RTS is an output e CTS is an input DTR is an output e DSR is an input e Rlisaninput e CD is an input CCII LCP 6 MAN 007 2009 07 08 CLCMANO7 wpd Issue 1 1 Page 14 of 19 4 1 4 2 4 3 Serial Interfaces Overview The Serial I O Adapter has eight asynchronous RS 232 or RS 485 selectable serial channels Programming registers for these channels are compatible with the industry standard 16C550 UART Channels are configured by a DIP switch located on the Serial I O Adapter The serial I O signals are available at Pn4 as detailed in Tables 6 and 7 Line Driver Selection Switch S6 is used to configure the serial I O channels as a mix and match of RS 232 and RS 485 channels Any number of zero to eight different serial I O channels can be set to either mode of opera
9. Switch S5 RS 232 Ground Connections son 12 S1 to S4 RS 485 Termination Resistor Selection sms 12 Pn4 Pin Assignments for the 8 Channel Serial I O Adapter sos nn 13 Pn4 Pin Assignments for the GPS 7 Channel Serial l O Adapter sossun nen 14 GPS Module Specifications 0 0 N 16 List of Figures Functional Block Diagram of the GPS 7 Channel Serial I O Adapter sssusa nn 3 Functional Block Diagram of the 8 Channel Serial I O Adapter sssusa 4 8 Channel Serial I O Adapter lose 5 GPS 7 Channel Serial I O Adapter solo nn 5 GPS Receiver Block Diagram retir tein em n A Pete ae mat KY Poth KIKKA gate e 16 SAMTEC Custom Cable Assembly 0000 cee tt ete eee tees 18 8 Channel Serial I O Adapter on PMC Host Carrier Card 2 sossun sn tenes 19 GPS 7 Channel Serial I O Adapter on PMC Host Carrier Card 00 00 cee eee 19 CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMAN07 wpd Page v of vi Abbreviations and Acronyms BIST Built In Self Test CC Conduction Cooled CCPMC Conduction Cooled PMC CD Carrier Detect CEP Circular Error Probability CPLD Complex Programmable Logic Device CS Chip Select CTS Clear to Send DGPS Differential GPS DIP Dual In line Package DSR Data Set Ready DTR Data Terminal Ready EEPROM Electrically Erasable and Programmable Read Only Memory GPS Global Positioning System HCC Host Carrier Card I O Input Output INT Interrupt IRQ Interrupt Request LSB Le
10. an be programmed to generate an interrupt on reception of the Pulse Per Second Signal GPS Module The Serial I O Adapter uses a LEA 4S GPS module For further information please refer to the LEA 4S Datasheet 2 1 4 CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 17 of 19 Annexure A SAMTEC MMCX to SMA Cable Assembly A 1 SAMTEC Cable Assembly Description Figure 6 SAMTEC Custom Cable Assembly A 2 Ordering Information J1 the GPS antenna connector on the Serial I O Adapter is a straight female MMCX connector that mates with a right angle male MMCX connector To ensure a secure fit and also maintain the PMC specification s overall hight restriction it is recommended that only the following SAMTEC mating connector and cable assembly be used RF316 03RP1 01BJ1 0300 CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMAN07 wpd Page 18 of 19 Annexure B Installation Instructions B 1 Installation Photos Figure 7 8 Channel Serial l O Adapter on PMC Host Carrier Card TTT any Hamm POO DANAA Figure 8 GPS 7 Channel Serial I O Adapter on PMC Host Carrier Card CCII LCP 6 MAN 007 2009 07 08 CLCMAN07 wpd
11. ast Significant Bit MHz MegaHertz MSB Most Significant Bit NMEA National Marine Electronics Association PCB Printed Circuit Board PCI Peripheral Component Interconnect PMC PCI Mezzanine Card PPS Pulse Per Second RI Ring Indicator RS 232 Electronics Industries Association Recommended Standard 232 or EIA 232 RS 485 Electronics Industries Association Recommended Standard 485 or EIA 485 RTCM Radio Technical Commission for Maritime Services RTS Request To Send Rx Receive SA Selective Availability TX Transmit UART Universal Asynchronous Receiver Transmitter VHDL VHSIC Hardware Description Language VHSIC Very High Speed Integrated Circuit CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMAN07 wpd Page vi of vi Introduction and Scope Scope This document serves as a user manual for the GPS 7 Channel Serial I O Adapter and 8 Channel Serial I O Adapter Introduction This Serial l O Adapter incorporates a PCI to 8 Channel Serial UART Device and is available in either one of two configurations Seven serial I O channels with an integrated GPS module e Eight serial I O channels without GPS module Each serial channel s external interface is user configurable in either RS 232 or RS 485 modes of operation Onboard programmable logic controls the adapter s external serial interfaces Serial channel configuration RS 232 or RS 485 electrical modes RS 485 Multidrop mode and RS 485 Flow Control mode is set by e
12. d to connect disconnect the 100 Q line termination resistors for each RS 485 differential signal pair Switch assignments are shown in Table 5 Individual switch assignments are also printed on the Serial I O Adapter s primary side silkscreen for quick reference Switch On Signal Pair Being Terminated S1 1 A RxD A RxD 1 2 A_TxD A_TxD 1 3 A_CTS A_CTS 1 4 A_RTS A_RTS 1 5 B_RxD B_RxD 1 6 B_TxD B_TxD S1 7 B_CTS B_CTS 1 8 B_RTS B_RTS 2 1 C_RxD C_RxD 2 2 C_TxD C_TxD 2 3 C_CTS C_CTS S2 4 C_RTS C_RTS E CTS E CTS F CTS F CTS Table 5 S1 to S4 RS 485 Termination Resistor Selection Note It is crucial that these termination resistors not be switched in for any serial I O channels that have been set to RS 232 operation CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 12 of 19 3 15 PMC Connectors The Serial I O Adapter has two connectors Pn1 and Pn2 which implement the 32 bit 33 MHz PMC interface Connector Pn4 connects the adapter to the host backplane to route the serial signals externally 3 15 1 PMC Pn4 Rear I O Pin Assignments Pn4 rear I O pin assignments are shown in Tables 6 and 7 for the two respective versions of the Serial I O Adapter Pin Name 1 PORTA1 3 PORTA3 5 PORTA5 7 PORTA7 9 PORTB1 11 PORTB3 13 PORTB5 15 PORTB7 17 AUXI 19 AUX3 21 PORTC1 23 PORTC3 25 PORTC5 27 PORTC7 29 PORTD1 31 PORTD3 33 PORTD5 35 PORTD7 37 PORTE1 39
13. gnal ground connection shared by all RS 232 channels taking up four pins on the Channel H external I O interface The RS 232 signal ground lines are manually connected disconnected using DIP Switch S5 This is different from the configuration found on the GPS 7 Channel Serial I O Adapter where a single permanent external ground connection is made via Pin 47 on connector Pn4 Care should be taken not to engage the S5 signal ground connections if Channel H is configured in RS 485 mode for the reason that these signal ground connections and the Channel H RS 485 signals share the same Pn4 rear I O pins refer to Table 6 In RS 485 mode Tx Rx CTS and RTS signals are available on all of Channels A through H If at least one channel is configured in RS 232 mode an external signal ground connection is required and will have to be made via DIP Switch S5 Due to the fact that these signal ground lines are multiplexed with the Channel H RS 485 signal I O lines RS 485 signalling will thus no longer be possible on Channel H once these signal ground connections have been made This implies that Channel H can only be configured in RS 485 mode if none of Channels A to G are configured in RS 232 mode either and thus no external signal ground connection is required Conversely should any one of Channels A to G be configured in RS 232 mode then Channel H should also be configured in RS 232 mode and the external signal ground connections should be made avai
14. ieve data stored on the EEPROM through a special PCI device configuration register For such applications the adapter can be specially ordered with the EEPROM installed Contact Support for further information CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 7 of 19 3 7 3 8 3 9 3 10 Complex Programmable Logic Device CPLD The electrical configuration of the adapter s I O interface is controlled by programmable logic implemented in a CPLD Tables 2 and 3 refer to Paragraph 3 12 lists all available modes of operation for both versions of the adapter Each listed mode of operation has an associated binary code which can be entered into configuration DIP Switch S6 to specify the adapter s serial I O configuration or mode Each serial channel is user configurable in either RS 232 or RS 485 modes of operation The PCI UART device also supports RS 485 multidrop mode with user specifiable transmit receive turn around delays Multidrop mode is available on all RS 485 channels The Channel A to D RS 485 Channels can be extended to include the DSR and DTR flow control signals in addition to the standard CTS and RTS signals Channel A can be extended even further in RS 485 mode to additionally make available the CD and RI signals as well Extending Channels A to D as described above however comes at the cost of sacrificing other serial I O channels due to the limited overall number of rear I O pins available on Pn4
15. ination DIP Switches S1 to S4 2 0 nn 12 34154 PMC GONMCCIOIS s trans ad raras Rouse weir eat dt edad 13 3 15 1 PMC Pn4 Rear I O Pin Assignments 00 ccc nn 13 4 Serial Interfaces nier vid a si Ns a alge Poen Panu 15 4 1 OVEIVIOW ari A a eii 15 4 2 Line Driver Selection move ii iii A a KESK ia alta ds 15 4 3 Universal Asynchronous Receiver Transmitter UART sos tee 15 5 MEPS AMIGHACE st pata An ane TE e BAU ARA bees D KIA 16 5 1 Overview of the GPS Interface 0 cnet ete eee 16 5 2 GPS Module Specifications ss 16 5 3 Architecture of GPS module mme 16 5 4 Default Configuration sos 17 5 5 Configuration ssania an ot ta tet beet eich ak edge eye fan even ead dee peck oa cated eat 17 5 6 External Backup Battery kskee 17 5 7 Pulse Per Second Signal sms 17 5 8 GPS Mod le aia dg sa tet siet i st AA AA Sima wedi Ti simit 17 Annexure amma ANNAN 18 SAMTEC MMCX to SMA Cable Assembly ooooccccccc nn 18 ah eee RRA 19 Installation Instructions Mt A a E a ed AA hi eevee 19 CCII LCP 6 MAN 007 2009 07 08 CLCMANO7 wpd Table 1 Table 2 Table 3 Table 4 Table 5 Table 6 Table 7 Table 8 Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 List of Tables PCI Configuration Space sms 7 S6 Codes for the GPS 7 Channel Serial I O Adapter oss nnen 10 S6 Codes for the 8 Channel Serial I O Adapter sossun nn 11
16. ing MMCX connectors be used to ensure a secure fit and conformance to the I O area height restriction of the ANSI VITA 20 2001 standard 2 3 4 For appropriate GPS active antenna selection please refer to the u blox AG LEA 4S Datasheet 2 1 4 RS 232 Transceivers The eight onboard RS 232 transceivers are individually enabled disabled under control of the CPLD Each can transmit receive serial data at rates of up to 1 Mbit s which is the maximum data rate supported by the RS 232 transceivers over distances of up to ten metres The PCI UART device can however be configured to communicate at much faster data rates up to 6 25 Mbit s per channel Care should thus be taken to ensure that user software limits RS 232 data rates to a maximum of 1 Mbit s CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 8 of 19 3 12 3 12 1 RS 485 Transceivers The sixteen onboard RS 485 transceivers two per serial channel are also individually controlled by the CPLD control logic Each can transmit receive serial data up to the maximum UART data rate of 6 25 Mbit s over distances of up to one hundred metres Transmission distances of up to one kilometre are possible at lower data rates Serial Channel Configuration DIP Switch S6 DIP Switch S6 is used as input to the CPLD to specify the serial channel configuration Tables 2 and 3 list all the available modes of operation for both versions of the adapter specifying the binary code fo
17. lable via the rear I O connector It follows that when assigning RS 232 Channels Channel H should be the first Channel to elect for that role Block diagram of the 8 Channel Serial I O Adapter is shown in Figure 2 PMC Bus N TEN Termination 14 7456 MHz Serial Mode Termination DIP Switches Clock DIP Switch S6 Resistors S1 to S4 I Enable Lines RS 485 CPLD mu Transceivers Ch A to G POI RS 232 mm Transceivers PCI Channels A to H Ch A to G 8 Channel UART RS 485 Transceivers Ch H Rear I O Connector RS 232 Transceiver Bus l fen Mode Decoding EEPROM Logic optional RS 232 Ground DIP Switch S5 Figure 2 Functional Block Diagram of the 8 Channel Serial I O Adapter CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 4 of 19 Depicted below are photographs of both adapter configurations aos 3 i ja eres Sat bio FLOU Sis Sio OO i Pia 1111 o o FIS as E e DRIAN UHM 3 Figure 3 8 Channel Serial I O Adapter Figure 4 GPS 7 Channel Serial I O Adapter Typical installation photos are shown in Annexure B 3 2 PMC Bus The Serial I O Adapter can be installed on any Host Carrier Card HCC conforming to the PMC specification and which supports Universal PCI signalling either 3 3 V or 5 0 V
18. nel H serial mode setting The GPS antenna is connected to the MMCX connector J1 and routed externally through one of two slots in the adapter s PCB 5 2 GPS Module Specifications The GPS module incorporated into the design is the u blox AG LEA 4S The table below summarises the specifications of the GPS module Receiver Type L1 frequency C A Code 16 Channel GPS Data Format NMEA DGPS Correction Data Format Max Update Rate 4 Hz Accuracy Position 2 5 m CEP SA Off Accuracy Position lt 2 0 m CEP DGPS Accuracy off Table 8 GPS Module Specifications 5 3 Architecture of GPS module The Figure 5 below shows a block diagram of the LEA 4S GPS module Reset N O D 1 8 V EXTINTO RxD TxD USB GPIO Pins or gt sP GPSMODE Pins Figure 5 GPS Receiver Block Diagram CCII LCP 6 MAN 007 2009 07 08 CLCMANO7 wpd 5 4 5 5 5 6 5 7 5 8 Default Configuration The GPS module has the following default configuration Data read is in the NMEA format The following sentences are generated by default GLL GGA RMC VTG GSV GSA Position fixes are generated at the maximum update rate Differential Configuration Data received from the DGPS Channel is according to the RTCM SC 104 standard Transfer protocol is 9 600 baud 8 data bits no parity 1 stop bi
19. ntering a binary code on a configuration DIP switch Each serial channel has bus termination resistors which can be selectively switched in for proper RS 485 line termination This is done by asserting the appropriate DIP Switches for individual RS 485 differential signal pairs CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 1 of 19 2 1 2 1 1 2 2 2 3 2 3 1 2 3 2 2 3 3 2 3 4 Applicable and Reference Documents Applicable Documents EXAR Corporation Datasheet EXAR XR17D158 Universal 3 3V and 5V PCI Bus Octal UART Revision 1 2 2 dated August 2005 MAXIM Semiconductors Datasheet MAX3080E MAX3089E 15kVESD Protected Fail Safe High Speed 10Mbps Slew Rate Limited RS 485 RS 422 Transceivers Revision 1 dated May 2006 Texas Instruments Datasheet SN65C3243 SN75C 3243 3 V to 5 5 V Multichannel RS 232 Compatible Line Driver Receiver Revision SLLS353G dated November 2004 u blox AG LEA 4A LEA 4H LEA 4M LEA 4P LEA 4R LEA 4S LEA 4T Antaris 4 GPS Modules Data Sheet Revision 1 dated 2007 05 25 Reference Documents None Specifications PCI Special Interest Group PCI Local Bus Specification Rev 2 3 dated 2002 03 29 IEEE Standard Physical and Environmental Layers for PCI Mezzanine Cards PMC PMC P1386 1 2001 dated 2001 06 14 IEEE Standard for a Common Mezzanine Card CMC Family CMC P1386 2001 dated 2001 06 14 ANSI VITA 20 2001 American National Standard for Conduction
20. r each configuration Switch S6 uses Active Low signalling thus a 0 in Tables 2 and 3 equates to the ON position and a 1 equates to the OFF position A binary code of 10000001 is thus keyed into Switch S6 as OFF ON ON ON ON ON ON OFF GPS 7 Channel Serial I O Adapter On the GPS 7 Channel Serial I O Adapter the Channel H line drivers RS 232 and RS 485 are connected to the GPS module s external serial interface DGPS and PPS signals These line level serial I O signals are routed to the Aux port on Pn4 as shown in Table 7 The Switch S6 configuration codes for the GPS 7 Channel Serial I O Adapter are given in Table 2 Note that on the GPS 7 Channel Serial I O Adapter Switch S6 1 denoted by an X in Table 2 is used to control the Channel H configuration independently from Channels A to G In each case setting Switch S6 1 to O ON would set Channel H to RS 232 mode and setting Switch S6 1 to 1 OFF would set Channel H to RS 485 mode CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 9 of 19 S6 1 to S6 8 RS 485 RS 485 RS 48445 Multidrop With Flow Control ss 0 G T pS Il Il oj Cf Cf Of Of Cf Cf Of Of Cf Cf Of Of OC A Cf CO T gt lt E 1 X x I ll X 1 1 Il ina e AS OI olol OI OQ WI WI WI w otet tk th oh op p c c opojojojojojojojo pS Il A to C G H X 1 B toc 6 mAN CCT B to C m XT rae 10 xj x D to E D
21. rface and its operation please refer to the XR17D158 UART Datasheet 2 1 1 CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 6 of 19 3 4 3 5 3 6 Configuration Space The PCI interface defines a standard programming model for the configuration of PCI devices This interface is defined as the Configuration Space Table 1 below shows the Configuration Space as defined by the PCI bus specification sa mau a CI van Memory Base Address Register BAR Unimplemented Base Address Register Table 1 PCI Configuration Space The location of the configuration registers is defined by the HCC at startup PCI Interrupts The PMC Adapter supports interrupts on the INTA pin only This is reflected in the nterrupt Pin Register of the Configuration Space as defined in Table 1 Configuration EEPROM The PCI UART supports an optional EEPROM device to store the vendor and sub vendor ID and adapter model numbers This information is only used during plug and play auto configuration of the PCI local bus where this data would facilitate automatic hardware installation onto the PCI bus The EEPROM interface consists of four signals EEDI EEDO EECS and EECK The EEPROM is however not needed when auto configuration is not reguired in the end application and is thus omitted from the default build However should the user application reguire non volatile memory for other purposes it is possible to store and retr
22. t Configuration The GPS module is connected to Channel H of the UART Hence Channel H should be configured with the same parameters ie baud rate number of stop bits parity etc as the GPS module The GPS module communicates using the NMEA protocol consult the NMEA 0183 Interface Standard DGPS Correction Data is received using the RTCM protocol consult the RTCM SC 104 Standard External Backup Battery Use of an external backup battery is recommended to reduce the acquisition time of the GPS module If an external backup battery is connected the module keeps the internal Real Time Clock running and holds the SRAM data ephemeris and almanac during power supply interruption This enables warm and hot start However under good visibility conditions cold and warm start times do not differ significantly Connection of an external backup battery is made via the rear panel connector Pn4 Pin 45 Aux5 The external backup battery must be capable of providing 1 5 V to 3 6 V with a typical current consumption of 5 pA at 3 3 V Should an external backup battery not be connected the user must ensure that this supply pin is grounded on Pn4 Pulse Per Second Signal The GPS module outputs the Pulse Per Second signal at a precise time interval of one second It is available as an RS 232 signal on the rear panel connector Pn4 and the front panel connector JP2 This signal has a pulse width of no more than 100 ms Furthermore the UART c
23. tenna via a supplied pigtail cable assembly Two slots in the adapter s PCB provide maximum flexibility for routing the antenna cable offboard An optional external backup battery can be connected to the GPS unit via the Pn4 rear I O connector which would aid the GPS module in achieving faster GPS fixes after a system restart Block diagram of the GPS 7 Channel Serial I O adapter is shown in Figure 1 PMC Bus 14 7456 MHz Serial Mode Termination is Clock DIP Switch S6 Resistors S1 to S4 Enable Lines RS 485 CPLD ma Transceivers Ch A to G PCI RS 232 PCI a mu Transceivers annels A to z 8 Channel CSSA 2 UART 3 Ch H Gps DGPS PPS RS 485 E Transceivers 8 pps DGPS PPS o 3 RS 232 E Transceiver DGPS PP Bus l DARRIES Mode Decoding EEPROM GPS backup battery Logic optional GPS Antenna Connector Figure 1 Functional Block Diagram of the GPS 7 Channel Serial I O Adapter CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMAN07 wpd Page 3 of 19 3 1 2 8 Channel Serial I O Adapter On the 8 Channel Serial I O Adapter Channels A to G each provide the eight standard modem signals Tx Rx CTS RTS DSR DTR RI and CD in RS 232 mode Channel H has a reduced number of signals in RS 232 mode only Tx Rx CTS and RTS due to the external si
24. tion The user can also selectively configure any number of zero to eight RS 485 Channels in multidrop mode This mode is supported by the PCI UART device through a register specified transmitter turn around delay for each RS 485 channel In addition Channels A to D have special RS 485 modes in which they can be extended to have additional flow control signals DSR and DTR Channel A can be extended even further to provide the full compliment of modem signals in RS 485 mode Rx Tx RTS CTS DSR DTR CD and RI Extending the capabilities of selected channels in this manner is at the expense of certain other serial I O signals due to the limited number of I O lines available on Connector Pn4 Universal Asynchronous Receiver Transmitter UART The Serial I O Adapter uses an XR17D158 8 Channel UART This UART is register compatible with the industry standard 16C550 UART For further information please refer to the XR17D158 UART Datasheet 2 1 1 CCII LCP 6 MAN 007 2009 07 08 Issue 1 1 CLCMANO7 wpd Page 15 of 19 5 GPS Interface 5 1 Overview of the GPS Interface On the GPS 7 Channel Serial I O Adapter Channel H of the PCI UART is dedicated to communication with the GPS module The Channel H external serial interface is connected to the GPS module s DGPS and PPS signals The DGPS and PPS I O signals are available at Pn4 These signals are user settable to either RS 232 or RS 485 modes by way of the Chan

User Manual for the GPS + 7-Channel Serial I/O and

Contents

Download Pdf Manuals

Related Search

Related Contents