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ALFAT user manual

1. Value Description 00 Command successful 01 Unknown command 02 Incorrect parameters 03 Operation failed This error code is returned also if the user attempted to write to write protected card 04 Reached the end of the file folder list This is not an error 10 Media does not initialize 11 Initialize media failed This error code can be returned if the card detect signal is high or floating check the Card Detect and Write Protect signals section for details Makes sure there is media in the device see the section J Read Register before using the initialize command I 12 Insufficient free space on storage media 20 File folder doesn t exist 21 Failed to open the file 22 Seek only runs on files open for read 23 Seek value can only be within the file size 24 File name can t be zero 25 File name has forbidden character 26 File folder name already exists 30 Invalid handle 31 Handle source does not open 32 Handle destination does not open 33 Handle source requires file open for read mode 34 Handle destination requires file open for write or append mode 35 No more handle available 36 Handle does not open 37 Handle is already in use 38 Open file mode invalid 39 Handle requires write or append mode 3A Handle requires read mode 40 The system is busy 41 Command is supported with SPI interface only Man Rev 2 16 Page 66 o
2. err 63 11 Performante deserit M M E 64 11 1 Selecting the Right Storage Media eere T ee ree reer ere rere Quibus disi TETP 64 12 FIG ACCESS Speed RE 64 11 3 Senal Interface Speed Overhead sssri esas enix rte ri tr pr un e e I YR ee En nous casas KANEN NEE EAE STEDENE 65 12 Result Codos sscan ehe ea dedo pee xata antea du e AD Eu cie dagkebantxa petu aca n ns bNU eR DM AM prE Sed ped 66 jS MID ee n j ce rcr ER 68 Man Rev 2 16 Page 4 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 1 Introduction 1 1 ALFAT System on a Chip Soc Overview Creating embedded systems that access FAT file systems require precious resources to host the needed libraries developers need to spend significant amount of time writing and testing the libraries Add to that the hardware costs both physical parts and circuit complexity to interface the FAT file system library with the storage media In the end investment costs of product development becomes prohibitive With the ALFAT SoC any system can quickly and easily access files on SD cards and USB memory devices ALFAT uses simple serial commands over UART SPI or I2C to manage and access FAT formatted SD Cards and USB storage devices The ALFAT SoC processor is capable of accessing two USB mass storage devices and one SD memory card simultaneously ALFAT s USB driver also supports USB Keyboards USB Mass Storage Device 1 UA
3. N File Handle 0 through F Hrr lt LF gt ssssssss the new position of the file s index pointer hexadecimal rr the Result code Example P lt sP gt 1 gt 10 lt LF gt Change the file pointer of file handle 1 to 100 lt LF gt start of file plus 10 rr the Result code This command changes the current byte position in a file relative to the start of the file index 0 For files that were opened for read mode R valid values range from 0 start of file to the file size first byte past the last data byte Subsequent Read commands will return data from this index as the starting point For files opened with write mode W the only valid value for seeking is 0 Subsequent writes will e overwrite any data already present in the range of 0 to the size of the data written e may extend the size of the file and e leaves the index 1 past the last byte written The virtual file handles Z K0 and Y K1 are not allowed in this command See also the Tell command Y Man Rev 2 16 Page 48 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 20 Y File Tell Format Y lt sp gt N lt F gt N File Handle O through F Hrr lt LF gt ssssssss the current value of the file ssssssss lt LF gt pointer index in hexadecimal notation Hrr lt LF gt rr the Result code Example Y lt sP gt 1 lt LF gt The file pointer of file handle 1 is at position
4. J se R r R is the register number to read rr lt LF gt S is the register s value s lt LF gt rr the Result code I rr lt LF gt Example J lt LF gt 100 lt LF gt 11 lt LF gt Indicating Card Detect pin is high and 100 lt LF gt USB1 is in High Speed mode J lt sp gt 1 lt LF gt 100 lt LF gt 0101E r File handles 0 and 8 are in use opened 100 lt LF gt It is permissible to leave the register number out of the command In this case the J command defaults to register number 0 Device Status Register ALFAT supports a number of status registers State values are defined by bits in the registers Registers are not all the same size Register bit numbers are defined with O being the right most bit Register Number Name and Size 0 Device Status Register S one byte Bits showing media device status and modes 1 File Status Register SS two bytes Bits flags showing usage of file handles 2 Auxiliary Device Status Register SS two bytes Man Rev 2 16 Page 38 of 68 www ghielectronics com GHI Electronics Bit Definitions Device Status Register 0 ALFAT SoC Processor 7 6 4 3 20 0 U1 D U1 UO U1 U1 UO M WP M CD 0 in Host Mode 0 not attached 0 not attached 0 Full Speed 0 not mounted 0 not mounted O R W 0 no 1 in SD Reader Mode 1 attached 1 attached 1 High 1 mounted
5. rr the Result code T lt sP gt B lt LF gt Backup Mode The RTC clocks using the 100 lt LF gt external 32 768 kHz crystal and runs VBAT power 1 65V to 3 6V backup coin battery This ensures that the RTC keeps clocking even if ALFAT main power is down It is important to use this command before setting the time 7 4 5 S Set Current Time and Date Format S se ddadtttt r ddddtttt time and date 32bit structure rr lt LF gt rr the Result code Example S lt sp gt 34210000 lt F gt Set 1 1 2006 00 00 00 100 lt LF gt Time and Date structure is a 32 bits standard structure used in FAT system Bits s Field Description 31 25 Year1980 Years since 1980 24 21 Month 1 12 20 16 Day 1 31 15 11 Hour 0 23 10 5 Minute 0 59 4 0 Second2 Seconds divided by 2 0 30 For example 0x34212002 is 01 01 2006 04 00 04 The I command should be used before setting the Date and Time Man Rev 2 16 Page 33 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 6 G Get Current Time and Date Format G lt sp gt D lt LF gt MM DD YYYY lt F gt rr lt LF gt Get current date rr the Result code MM month 01 12 DD day 01 31 YYYY year G lt sp gt T lt LF gt Get current time HH MM SS lt LF gt HH hour 01 24 Hrr lt LF gt MM minutes SS seconds 7 4 7
6. whatever fits the project best 5 1 Commands All communications between the Master and ALFAT use a well defined serial protocol which is compact and easy to implement The Master writes commands to ALFAT and reads data ALFAT follows every Command with a Result code for success error type or helpful information Other than the raw data read or written to files Commands and their results are in human readable ASCII This allows for easier development and troubleshooting The simplicity of commands can be seen with this example to flush data written to a file the file was opened with an associated file handle of 3 the Master sends ALFAT the command F 3 ar ALFAT returns the string 100 lt LF gt the Result code of 00 indicates the file was flushed with no error During development this entire command sequence could be executed from a terminal program running on a PC 5 2 FAT File System Engine The file system engine interprets media formatted to FAT file system standards It has been optimized for high performance and reliability Here are some of the capabilities of this engine e supports FAT16 FAT32 standards e Long File name support LFN e Simultaneous access to 16 opened files There are no limits on how many files can be opened and closed e full directory folder support e some examples of supported I O functions include read write append seek tell find delete e No limits on media size f
7. 1 mounted 1 R 1 detect Speed for not mounted either no command has occurred for the device or the device was mounted and then the media was removed WARNING do not remove mounted media without first closing all open file handles File Status Register 1 F E D C B A 9 8 0 closed 0 closed 0 closed 0 closed 0 closed 0 closed 0 closed 0 closed 1 opened 1 opened 1 opened 1 opened 1 opened 1 opened 1 opened 1 opened 7 6 5 4 3 2 1 0 0 closed 0 closed 0 closed 0 closed 0 closed 0 closed 0 closed 0 closed 1 opened 1 opened 1 opened 1 opened 1 opened 1 opened 1 opened 1 opened Each bit in this register corresponds to a file handle If the bit is 1 the handle is in use otherwise it is free Counting the number of 1 or 0 valued bits yields the number of open or closed files respectively WARNING do not remove mounted media without first closing all open file handles Auxiliary Device Status Register 2 15 14 13 12 11 10 9 8 reserved reserved reserved reserved reserved reserved reserved reserved 7 6 5 4 3 2 1 0 reserved reserved reserved reserved K1 Filtering KO Filtering U1 or K1 UO or KO 0 ASCII 0 ASCII 0 U1 0 UO 1 Raw 1 Raw 1 Kt 1 KO Bits 0 and 1 indicate whether an command was performed to initialize a USB interface as a USB Keyboard Host or
8. 5 ALFAT OEM board socket X4 Pin 5 E ei gp nann m Connect cable s RXD to ALFAT s UART TX ALFAT CPU Pin 42 eiusd rire ALFAT SD board 4 socket X4 Pin 3 ALFAT OEM board socket X4 Pin 3 ALFAT OEM board socket JP2 Pin 8 It is recommended to use this USB to serial cable from FTDI TTL 232R 3V3 r Step3 Power up the board Select the COM Porti associated with the serial cable Click on the connect button DALAT Firmware Updater o we Len ALFAT About Step 2 Select the firmware file G Data Code ALFAT Project Source Code AFLAT_Firmware backt Browser Step 3 Click Update button Log Serial port connected COM32 Device will be updated automatically DO NOT disconnect or tum off the device Fees vut HS bove beet ipid ncc Check version number Man Rev 2 16 Page 55 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 8 4 Bootloader Commands Command Description R Run ALFAT firmware E Erase ALFAT firmware X Update ALFAT firmware the firmware file is transferred using XMODEM 1K V Returns the loader version and current ALFAT firmware version Note The bootloader is entirely separate program that loads the ALFAT firmware The version number of the bootloader may not match the ALFAT firmware version number The bootloader can t be updated 8 5 Updating the Firmware Using a Terminal Console We re
9. B Set UART Baud Rate Format B lt sP gt SSSSSSSS lt LF gt ssssssss The standard baud rate value in rr lt LF gt HEX H rr lt LF gt rr the Result code Example B lt sp gt 1C200 lt LF gt Set the baud rate to 115200 00 lt LF gt command parsed and is correct 100 lt LF gt lt send success after changing rate The first Result string refers to correct parsing of the command including error checking of the baud rate value The second Result string is sent after the baud rate has changed Under default conditions the UART interface has a baud rate of 115200 The default value can be changed by pulling SCK SPI low during booting reset in this case the baud rate will be 9600 Man Rev 2 16 Page 34 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 8 l Initialize and Configure Devices Format _ I lt sp gt X H K lt Lr gt X is a Drive name one of Hrr lt LF gt M Memory Card drive UO USB drive 0 Full Speed U1 USB drive 1 Full Speed D USB1 SD Reader Mode KO USB drive 0 as Keyboard Reader K1 USB drive 1 as Keyboard Reader H for U1 and D only use High Speed K Keyboard filter mode rr the Result code Example sP M r Initialize memory card with the default 100 lt LF gt clock frequency I lt sp gt U0 lt LF gt Initialize USBO at Full Speed mode 100 lt LF gt I lt sp gt U1 lt LF gt Initia
10. HR Pad h pepe eee 41 41 gt O Openmtle for ead Witte OP Ap Peri dica roe ote te tro ag roe beares ere rest etaed EPa ORAE 42 T4114 Re Read MOM FE scietis dpi aa yield dues acta I b ened unk ahead 43 Dp LER NUTS CO EU m e aa eee case ca Saeed cata ieh Ge aed vAcaky E eae 45 1316 Le Fast Write to File SPI mode Ohly escort rtr EPIS E R UE Fe EE 46 TATE ICI cce T 47 TATS NS OOS FIE Er 47 Vm EM areal ESI RE TIE TEL emm 48 TA20 Gd wp E 49 7 4 21 D Delete File OF Foldet iere rere or depen niora AEEA NEA EPEE teas ON EENS REE aE 49 pg sco rods No ROI LT LU UL LI D EE 50 T3229 Ms CGopy From Pile OANSET og itia Eris detur E FR dn tas x onda Xo e dp EIPUIARRI ame wee PO ena 51 235 24 A SISODame flossen aaan aaas Pan cu amino abebrapan Cepap dep dec dba E Pub CE ine ture des N pU ER d beu aet 52 13 25 E lt Test Media Speedi ran eU RE HI IER T me didis mi 52 DE AO E TE A E EA EEE LETS 52 2427 SLFS No Op ration NOP seii terne ctacptitu e atti aa MM e Ie M ILIAD 53 WHE BOOUOAGEN ceris eut bte Peer etate teta URN tala ENNAN OR 54 Oe A Serie DVS SCM UOM e I cece Minia area nihres pias ated ec aassts dees eatatel tied 54 Man Rev 2 16 Page 3 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 82 Connecthg and OGontrollmgitlie BODIIDBU EL aiia e doa RIS stay das HP RE ERPRIA CN CR PEE SREUE Pudet S AA 54 Rs iq Updater aver Te qio ae nnnm 54 om mss eecis gie IIo EET 56 8 5 Updating the Firmware
11. LF gt path MATEST TMP This command establishes internal variables needed for retrieving all directory entries for a given path It is a required initialization that must take place before using the N command described below No command other than N may be sent after or N will not work Man Rev 2 16 Page 40 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 12 N Get Next Directory Entry Format Nar NNNNN variable length file I rr lt LF gt name NNNNN EEE lt tF gt EEE File Extension if any AA lt LF gt AA File Attributes ssssssss lt LF gt ssssssss size of file in bytes Hrr lt LF gt rr the Result code Example lt sp gt M TEST TMP lt tr gt 100 lt LF gt Retrieves all two file names N lt LF gt in the folder M TEST TMP 100 lt LF gt TEST0001 TXT lt LF gt 00 lt LF gt 0000FE23 Fr 00 lt LF gt N lt LF gt 100 lt LF gt TEST0002 TXT lt LF gt 20 lt LF gt 00001234 lt LF gt 100 lt LF gt N lt LF gt 104 lt LF gt File Attributes are a byte of bit flags defined as the Standard Attribute Structure in FAT systems as shown below 7 6 5 4 3 2 1 0 Reserved Archive Folder Volume System Hidden Read ID Only File names returned by this command do not include the path The Q command described above must be called before using this command Each time
12. a character value from 0 to F e must be free not in use from another O command e The virtual file handles Z K0 and Y K1 are not allowed in this command M the access mode is one of e R Open for read requires the file to exist at the specified path e W Open for write will create a new file and give write privileges to it If the file already exists it will be erased and re written e A Open for append the default position for subsequent writes is the end of the file If the file does not exist it will be created ALFAT has 16 available file handles Each file once opened is associated with a handle That file handle is no longer free and can not be used in another Open command without first using a Close command C to free up the file handle It is easy to use an unlimited number of files by closing one file to open another NOTES e before opening a file the Initialize command I must have been used on the device with the file e This command may not be used with the USB Keyboards K1 KO virtual file handles Y and Z Man Rev 2 16 Page 42 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 14 R Read from File Format R lt sp gt N F gt ssssssss lt tr gt N file handle rr lt LF gt dddddd F the Filler Byte aaaaaaaa ar I rr lt LF gt ssssssss required number of return bytes dddddd the return str
13. as a Mass Storage Host Bit 2 is only defined if Bit O has value 1 Bit 3 is only defined if Bit 1 has value 1 Man Rev 2 16 Page 39 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 10 K Get Free Size Format K lt sp gt X lt r gt X is the Drive name one of Hrr lt LF gt M Memory Card drive SSSSSSSSSSSSSSSS lt LF gt U0 USB Flash drive 0 I rr lt LF gt U1 USB Flash drive 1 KO USB Keyboard 0 K1 USB Keyboard 1 SSSSSSSSSSSSSSSS e For Keyboards this is the number of bytes available from ALFAT e For all other drives this is the number of free bytes on the drive rr the Result code Example K sP U1 r There are 1904148480 free bytes 100 lt LF gt available on USB Flash drive 1 00000000717F0000 r 100 lt LF gt Returns the m edia s remaining free size Note this command may take several seconds for calculations to finish depending on the media size and type For Keyboards this is the number of bytes available from ALFAT Note for file system drives the drive must be initialized I Initialize and Configure Devices 7 4 11 Q Initialize Files and Folders List Format Q sP full path lt LF gt full path identifies the folder who s I rr lt LF gt directory entries will be read using the N command rr the Result code Example lt sp gt M TEST TMP lt F gt Prepare to list all files and folders in the 100 lt
14. example a command is sent to initialize the directory list M TEST T For demonstration purposes the command is sent using two frames one frame or more than two frames will work as well This is also the case for the Return string 00 lt LF gt where two frames are read a single frame will work just as well p 10 0 elte wl iv fot ce fos plo 2 00 T oxoa 1 u 01 RFB RFB RFB RFB RFB RFB RFB RFB RFB 2 U 01 RFB RFB RFB SPI Bus frames in p 0o 0 o 0 o p 2l o o o Order F1 F2 F3 F4 3 ylo o r v 02 01 00 0x0A RFB Ready for Byte U undefined 6 4 2 1 Write Frames Frame Type 16 bit Transaction Payload Size N 0x01 Size LSB Size MSB Byte 1 Byte 2 n Byte N Synchronous Return Data Ignore RFB RFB RFB RFB m RFB RFB Ready for Byte Frame Type 0x1 Write The frame consists of two parts a header and payload 1 The header consists of three bytes the first byte is the frame type the second and the third bytes are the 16 bit transaction size Not including the header bytes 2 Payload This is the data being sent to ALFAT The payload section size must match the transaction size value from the header Man Rev 2 16 Page 20 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Proces
15. file byte index Man Rev 2 16 Page 43 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor F the Filler byte when the device does not have enough data to return the requested size after the final file data is sent enough filler bytes are sent to make the byte stream have a length that matches the requested bytes ssssssss aaaaaaaa the number of actual bytes the count of bytes in the return data dddddd that are not filler bytes This number will be less than or equal to SSSSSSSS This command is used to read data from a device associated with the specified handle For file system based devices the file must have been opened with Read access mode In order ALFAT 1 2 sends back data from the file while incrementing its internal file pointer if the the file pointer reaches the end of the file ALFAT returns the Filler byte until it reaches the total size required in the command sends the actual number of bytes read from the file WARNING for I2C only the Filler byte can not be OxFF or 0x00 See the 12C interface section for more details For UART we advise that the Master s input buffer for processing data from ALFAT be as large or larger than the largest size of data requested by any read command The DATAREADY pin can be used with the Read command when the Master to ALFAT interface mode is either I2C or SPI interfaces when using a UART interface ALFAT sends the dat
16. gt AA a set of bit flags the target s Attributes Represented in hexadecimal hh mm ss is the last time the target was modified Hours are from 0 23 1 00 P M 13 00 mm dd yyyy month day year is the last date the target was modified rr the Result code Example lt sP gt M TEST TXT lt LF gt The target TEST TXT has been 100 lt LF gt found on the SD Reader Its size is 00000F34 lt LF gt 3892 bytes The Attributes indicate 00 lt LF gt the target is a file it is visible it can 12 00 00 lt sP gt 01 24 2011 lt LF gt be written 100 lt LF gt The last modification time and date is 12 00 00 on 1 24 2011 This command searches for a specific file or folder the Target If the target exists Result code of 00 ALFAT returns the file size a set of attributes for the target and the time and date of the target s last modification The Attributes are defined as the Standard Attribute Structure in the FAT file system T bit meanings are 7 6 5 4 3 2 1 0 Reserved Archive Folder Volume System Hidden Read ID Only Man Rev 2 16 Page 50 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 23 M Copy From File to Another Format M lt sp gt S lt sp gt I lt sp gt D lt sp gt LLLLLLLL lt r gt S file handle of source Hrr lt LF gt XXXXXXXX lt LF gt file offset to use as the rr l
17. of losing data or corrupting the file system especially if the storage media was removed or if there was a power loss The virtual file handles Z K0 and Y K1 are not allowed in this command 7 4 17 F Flush File Data Format F lt sp gt n lt r gt N file handle one of 0 1 2 3 4 5 6 7 8 rr lt LF gt 9 A B C D E or F rr the Result code Example F lt sP gt 0 lt LF gt Flush File handle 0 100 lt LF gt This command flushes commits any buffered data to the specified open file This command physically saves all data to the media Note the Close command will flush the file before closing the file The virtual file handles Z K0 and Y K1 are not allowed in this command 7 4 18 C Close File Format C lt sP gt n lt LF gt n file handle can be lH rr lt LF gt 0 1 2 3 4 5 6 7 8 9 A B C D E or F rr the Result code Example C lt sP gt 0 lt LF gt Close File handle 0 100 lt LF gt This command cause ALFAT to first perform a flush file command F After all buffers have been written ALFAT releases the file handle and associated resources The file handle is now free and can be used in an Open command The virtual file handles Z K0 and Y K1 are not allowed in this command Man Rev 2 16 Page 47 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 19 P File Seek Format P sP N ssssssss ar
18. shelf OEM boards that uses the ALFAT SoC processor These boards expose all the needed signals to interface with ALFAT over UART SPI or I2C and provide convenient connectors like SD or USB connectors The boards are easily mountable on existing or new product 10 1 OEM Board Pin outs All OEM boards expose the same signals through a 1x18 pin mount If the desired interface is UART all signals required are exposed through a secondary 2x5 pin mount 1x18 pin mount Pin Name Pin Name 1 UART TX U1 CONNECT 10 DATAREADY 2 UART RX SPI BUSY 11 Reserved I2C BUSY 3 2C SCL U1 CONNECT 12 VBAT 4 2C SDA 13 Internal 3 3V Do not connect 5 SPI SCK 14 RESET not 5V tolerant 6 SPI MISO UART BUSY 15 GND 7 SPI MOSI 16 Not connected 8 SPI SSEL 17 Not connected 9 WAKE 18 5 Volts The ALFAT SD Pin out uses a 1x16 pin mount Pins 1 through 16 are the same as described in the above table The ALFAT SDR board exposes the the USBO data pins Pin 16 is data minus Pin 17 is data plus 2x5 pin mount Pin Name Pin Name 1 Internal 3 3V Do not 2 5V connect 3 UART TX U1 CONNECT 4 SPI MOSI UART RX SPI BUSY I2C 6 SPI MISO UART BUSY BUSY 7 Reserved 8 VBAT 9 GND 10 RESET not 5V tolerant Man Rev 2 16 Page 61 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 10 2 ALFAT OEM Board
19. 0x03 100 lt LF gt 00000003 r 100 lt LF gt Gets the current byte index in a file This will be a value from O start of file to file size end of file The virtual file handles Z K0 and Y K1 are not allowed in this command 7 4 21 D Delete File or Folder Format D lt sp gt Name lt LF gt Name The absolute non relative rr lt LF gt name of the object to be deleted rr the Result code Example D lt sp gt M TMP TEST TXT lt F gt Remove the file with name TEST TXT 100 lt LF gt in the TMP folder on the SD memory card This will not delete the TMP folder D lt sp gt M TMP lt trF gt Remove the FOLDER with name TMP 100 lt LF gt on the memory card The folder must be empty Deletes a file or a folder A name that is a folder directory must be appended with the backslash for files there should be no e The target file or folder must exist e Ifa folder is being deleted it must be empty e lf the path contains a file name the file must be closed Man Rev 2 16 Page 49 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 22 Find File or Folder Format sP Namej ar Name The absolute non relative Hrr lt LF gt name of the target to be located SSSSSSSS lt LF gt AA lt LF gt ssssssss size of the target in bytes hh mm ss lt sp gt mm dd yyyy lt tF gt as a hexadecimal number Hrr lt LF
20. 115200 baud The baud rate can be changed at run time using the B command 6 4 SPI Interface Mode With the SPI interface ALFAT is a slave device It uses four hardware signals qo SPI SSEL ALFAT Chip Select 2 SPI MOSI ALFAT Data in 3 4 SPI BUSY This can be monitored while sending data to ALFAT When it is high no SPI MISO ALFAT Data out more data should be exchanged with ALFAT until it goes low The maximum baud rate is 3 Mbits s 6 4 1 SPI Bus Configurations The maximum SPI clock is 24 MHz SPI clock Idle state is Low Sampling is at the rising edge Data chunks representing numbers greater than one byte are sent most significant byte MSB first ALFAT is the slave in the SPI bus SPI SSEL should be active low with transfer single and multiple bytes are allowed A minimum of 4pS delay is required between each byte This requirement is not needed with Fast Write to File command L Command that uses a SPI DMA receive channel Man Rev 2 16 Page 19 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 6 4 2 SPI Frames ALFAT SPI data is exchanged through frames e Frames are a stream of bytes e Frames are classified as either a Write Master data to ALFAT or a Read ALFAT data to Master e The classification of a frame declares and defines its contents e All frames start out with a three byte header e Frame sizes are primarily based on the designer s needs In this
21. FFALFAT SoC Processor Detecting Busy With RFB Ready For Byte With this method for every byte transmitted the Master reads a byte from ALFAT which determines if ALFAT is ready for the next byte This is the Ready for Byte RFB flag To use this method a SPI write frame can not have a payload greater than 4 KB In the hardware layout SPI BUSY does not have to be connected to the Master During the sending of header bytes 1 the frame s Type byte is written Write Frame based on RFB Send Head 0 Get Rx 0 ignore Send Head 1 LSB Get Rx 1 RFB Send MSB and Payload 2 the LSB byte is sent If the RFB corresponding to the LSB is 0 ALFAT is not ready for a byte and the entire frame must be restarted When the RFB is 1 ALFAT is ready the MSB and the payload may be sent Man Rev 2 16 Page 22 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 6 4 2 2 Read Request Frames Frame Type Requested Filler Bytes The length of this byte stream is Transaction A bytes 16 bit Size R 0x02 LSB_R MSB_R Byte 1 Byte 2 ix Byte A 0x00 0x00 0x00 Synchronous Return Data The Read Response Ignore LSBA MSB A Byte 1 Byte 2 xi Byte A The Read Response is described in the next section Read Request frames are sent by the Master to retrieve data from ALFAT they consist of two parts a header and filler bytes 1 The header c
22. I Electronics FFALFAT SoC Processor 6 5 12C Interface Mode I2C interface uses three hardware signals 1 I2C_SCL I2C clock signal 2 I2C SDA I2C data signal 3 I2C BUSY While sending data to ALFAT if this is high data transmission should stop until it goes low 6 5 1 12C Bus Configuration e ALFAT I2C slave address is 0xA4 This is a fixed address and can not be changed e Bit zero is the RW bit O Write 1 Read e The maximum allowed I2C clock is 400 kHz e Thecircuit must provide pull up resistors usually they are 2 2K on the bus as specified in the I2C specifications Transmitting and receiving data to and from ALFAT is preformed through standard I2C transactions e Transmitting ALFAT s I2C address with R W bit set to zero is sent followed by the stream of bytes ALFAT processes the assembled payload bytes sequentially as the command or the command s data if any e Receiving The Master starts by transmitting ALFAT I2C address with R W bit set to 1 followed by reading of one or more bytes When a read request is sent to ALFAT and no data is available a No Data token 0x0 is returned This presents a problem when raw data such as file contents contains 0x00 A two byte sequence is used When 0x00 is encountered OxFF is transmitted before 0x00 OxFF is an escape token To resolve the same problem of differentiating OXFF data byte vs escape for 0x0 if OXFF occurs as data it is used to escape itself The f
23. Pl RENNES Se T sands wv wwnwwn HH 20 6 4 2 1 Write Frames EIER H e canbe cabas acide a SEN I cade iste ies bra ber ee ead ede pedes p nada 20 612 2 Read Regue St ETaITIBS aio es eiaa patio ect EE E ERS EEA a lap Seabees 23 65 IAC menace Mode usto ea A AAAA e a A 25 RCM MERI lis Uo m 25 ALEAT GORIEISBO Sel i spei at ld Se REOHEHIE EHE UE RATE EE HE EE OFT UP e ERO EORR LOIRE XE HF PE CRT Ze vex aee olento ere mn 27 7 2 Terminology and Syntax of Command DeflhitlOFHS ruota itr roo rr ri et ror rr uiua tees rp E xb avrei ka P ees 27 1 9 Summary OrAll Available Commands cscri dang testi eme tu ee thee Madde eripere bte dri caveicasabeciaieesdeieten E 30 TA Full S yitex and Defiritton bt CONTITERUS 0 0 ruat ton N oben eabuxanbasasees AERE pence io Pneu R M ARUPuSUE 30 po s EXC m c calde 30 FEN Zudem rra TEM a TA Zs ALFAT OUI LE pipeesgneeepeaesiesearswenees 31 TAA Ta initialize Rea TME COCK rS 33 Too eser cumsnt ime ana DSTI rore irati qr EPI ENS aPI M ana ak nO ME S M dope EE D eee 33 TAG Gi Set Current TME and Dale m nnn 34 TAT BeserART Bald alb eau aia nien mid rt eee IU NES 34 FAS edullialize and Omg une DG VCS niei pisa iaid ireti ea eN oie IA ESTERIORE 39 2 4 9 sJafsosd Segel ittis NER dM tM CM LLLA M SM d a MD Ro oce ssnedee de 38 DE EON SNC dado e E 40 PE SMEs durer ES 40 312 We Get Next Dirgelary EE uo EH court css cette EOS EG See ROI
24. RT SPI or I2C interface Host MCU 4 USB Mass Storage a Device 2 SD SDHC MMC ALFAT includes two modes of operation default and SD Reader modes They are covered in detail in the Operating Modes section ALFAT developers can take advantage of the ALFAT Evaluation Kit a 100 complete set of components for investigating ALFAT The Kit includes a number of ALFAT Off the shelf Circuit Boards The included software ALFAT Explorer controls the working ALFAT directly from a Windows PC Source code of the ALFAT Explorer is shipped with the Kit Within ten minutes the hardware can be assembled into a fully functional ALFAT Man Rev 2 16 Page 5 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 1 2 1 3 Example applications High speed Data loggers Automated Machinery Digital picture viewer Consumer products Key Features Built in 2 port USB Host controller FAT16 and FAT32 File system No limits on media size file size or file folder count LFN Long File name Friendly user interface through UART SPI or I2C Programmable UART baud rate Up to 16 simultaneous file accesses SD SDHC card support no 2GB limit MMC card support SD Reader mode a USB connection to a PC where the PC detects ALFAT as a USB Card reader support for USB HID Keyboard Clients Built in 2x USB 2 0 FS PHY USB 12mbps One USB port is capable of High Speed 480mbps thro
25. The ALFAT OEM Board exposes all of ALFAT SoC s processor features This board offers a seamless way to access files on SDHC SD and MMC cards plus devices supporting the USB UMC protocol such as thumb drives ALFAT OEM includes 1 SD MMC Connector with push spring 2 Dual USB connector Type A with e Full Speed USB 2 0 port e High Speed USB 2 0 port 3 The board includes pads for a RTC 32 768 kHz crystal The crystal is not included USBO is the lower socket USB1 the upper 10 3 ALFAT SD Board ALFAT SD board is an OEM board using the ALFAT SoC processor This board offers a seamless way to access files on SD SDHC and MMC cards A standard SD MMC connector with a push spring is included The board includes pads for RTC 32 768 kHz crystal the crystal is not included The other OEM boards use an 18 pin mount the ALFAT SD Pin out uses 16 pins pins 1 16 have identical corresponding signals as the 18 pin mount 10 4 ALFAT USB Board ALFAT USB Board is an OEM board exposing all of ALFAT SoC s features This board offers a seamless way to access files on USB MSC Clients such as thumb drives The board includes pads for RTC 32 768 kHz crystal The crystal is not included ALFAT USB includes a Full Speed USB 2 0 port Man Rev 2 16 Page 62 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 10 5 ALFAT SDR Board ALFAT SDR Board is an OEM board for designs which take advantag
26. Using a Terminal CONSO Gis ausi ocior tn et pes cotta ap Foto paio aE ANARE R AA SEUNEU Aia 56 9 Hardware integration QUIE cia peroabekis tlduidus d pM Deb lM Ge ea d UR DRE A TR CRURA o E 59 S UL OPONWSESON GB cena uice orae e DOSE LIES REME E E A E P RcUD ah EEE E E O AR Fea ES FUTE N E ETE ATE 59 Bo GBT eee eee per ree cere gee itu nti UN UE RAI DS I AU MEI Ife cde ui M errr IE 59 99 Gard Detect and Wite Protect SiG lS tas tsp cetakc ba rdi aer iac dip dede cd bd Sp Id bb bibi aos ioc Rex cA M Pe xE Le Eb IRA EdUR CUR 59 9 4 Pule Speed 7 High S peel wit WF PED scent acin oci ruth ooh etae p cube ex Tuo aber ou Ene tune tu cu ht Puro lands REESE DRSE RO bep cA Ep Pap IAE 60 9 5 Real TME COCK EET ONO BOOUOAS BE ACCESS oa 25 scares 9 7 Electrical characteristics n i T 10 ALPAF COM Wiss iil Circuit DOSES carana a apleet actagesetgqeangueash entries 61 10 1 OEM Board PIBieults utr inrteits C EET ntu iM HE 61 I0 2 ADEAT OEM BONA a i ip et aS ete cs cubes satay au Ra T EX EA AE Ded ai 62 10 3 ALFAT SD Board P P MG 62 10 4 Ny Wl oe Deeper rere ey eee cre e a a a rer cree rrr e rete yrrrert y rrrerrer er ay rete 62 10 5 EAT OE BOSE 2 55 case ca baat dS apices austen DOR ing Sa Eta Dd bd rv s tut etu M tad te SER La ades ioi asa seio ie 63 10 6 ALFAT Evaluation Kit 2
27. V N5 Erasing Window Help ating for file transfer through XMODEM 1K CCCCCCCCCCCCCCCCCCCCCCCCE Choose to send a file using XMODEM with 1K option then choose ALFAT GHI The filename on the GHI website will reflect the version number e x ALFAT 2 2 0 GHI The firmware file is downloaded from GHI Electronics website click on the Support tab then the File System button follow the firmware link GHlelectronics com Support gt File System Man Rev 2 16 Page 57 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor ans fed d Tera Term J Tera Term XMODEM Send 02 Pem Date mo 1 ALFAT GHI 3 12 201 r Filename ALFATGHI Files of type AI X Cancel Option Checksum After the file has been transferred the bootloader will send a message similar to Firmware has been updated successfully Version 2 0 0 After that release the bootloader mode and reset the chip or use the run R command to run the new firmware E 3 File Edit Setup Control Window Help rasing and updating the firmware Confirm V N5 rasing lating for file transfer through XMODEM iK CCCC CCCCCCCCCCCCCCCCCCCCCCCC CCCCCCCCCCCCCCCCCCCCCCC ile transfer completed successfully erifying ene has been updated successfully Version 1 8 2 GHI Electronics LLC ALFAT SoC Processor t00 Man Rev 2 16 Page 58 of 68 www ghielectronics
28. a N command successfully finishes ALFAT retrieves a directory entry from the path specified in the command It increments a pointer so that the next N command will get the next directory entry When the pointer reaches the end of the list and N is called again ALFAT returns a Result code of 04 If during this iterative process any command other than N is sent subsequent N commands will fail The command can be called to re initialize the list system the list pointer will be reset to the first directory entry Man Rev 2 16 Page 41 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 13 O Open File for Read Write or Append Format Ox lt sp gt N M gt file name lt tr gt File name an absolute file rr lt LF gt specification that will be opened including the device name N the file handle that will refer to the open file M the access mode for subsequent file operations rr the Result code Example O sP 1R M TESTWOLTAGE LOG r Open file VOLTAGE LOG 100 lt LF gt with file handle 1 and read access mode This file is located in the TEST folder on the SD memory card O lt sp gt 0W gt U0 DAT CURRENT LOG lt tF gt Open file CURRENT LOG 100 lt LF gt on USBO using file handle 0 The file handle can be used in the W command Write File If folder DAT is not available it will be created automatically N the file handle e mustbe
29. a when it is available Use of DATAREADY state DATAREADY will be high while ALFAT is parsing and evaluating a command string The transfer of data during a read command is processed from the media in chunks 1024 bytes Each time a chunk has been processed by ALFAT and is ready for the Master to retrieve ALFAT sets the pin high when data is not ready the pin will be low For a block of less than 1024 bytes ALFAT set the pin high when it places the last byte from the media into the buffer For I2C and SPI the Master must perform read s until the current buffer is empty No new commands may be sent by the Master until the entire read command transaction is finished the Master has read the final Result string Man Rev 2 16 Page 44 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 15 W Write to File Format WW lt sp gt N gt ssssssss lt _r gt N File Handle rr lt LF gt dddddd ssssssss the number of bytes to write aaaaaaaa ar Hrr lt LF gt dddddd a stream of raw data bytes exactly ssssssss bytes long aaaaaaaa number of bytes actually written to the file rr the Result code Example W lt sp gt 1 gt 10 lt F gt Write 16 bytes to the file associated with 100 lt LF gt handle 1 1234567890abcdef 00000010 lt LF gt 100 lt LF gt e N the file handle o must be a numeric value from 0 to F must be associated with a file from Open command e ssssssss th
30. above 3 After the interface selection pins are set the RESET pin is set high allowing ALFAT to boot Note that the RESET pin is NOT 5V tolerant 4 Master delays 50ys allowing ALFAT to initialize 5 ALFAT sends the Master a banner string which must be read to synchronize with ALFAT BOOL ClearBanner int timeout ms while timeout ms amp amp ALCAM ReadByte delay 1 1ms timeout ms while timeout ms amp amp ALCAM ReadByte 0 delay 1 1ims timeout ms while timeout ms amp amp ALCAM ReadByte 0 delay 1 1ims timeout ms while timeout ms amp amp ALCAM ReadByte n 1 delay 1 1ms timeout ms if timeout_ms gt return TRUE return FALSE 6 3 UART Interface Mode The UART interface uses four hardware signals UART TX data sent from ALFAT to the Master UART RX data sent from the Master to ALFAT UART BUSY signal The Master should only send data when this signal is low DATAREADY signal ALFAT has data that can be read by the Master a Be I9 Man Rev 2 16 Page 18 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 6 3 1 UART Configuration The defaults are baud rate 115200 o Data bits 8 o Parity None Stop bit 1 At boot time the SPI SCK pin is internally pulled high If this pin is pulled set low externally during reset or power up the UART baud rate will default to 9600 instead of
31. code I rr lt LF gt Example V lt F gt The version number is 2 0 0 v2 0 0 lt LF gt 100 lt LF gt Notes e The version is not the same or related to the version number of the bootloader e Thereturn data is sent before the Result string that is normally present after command parsing and argument checking Prints the version number of the ALFAT SoC firmware Man Rev 2 16 Page 30 of 68 www ghielectronics com GHI Electronics 7 4 2 Enable Echo ALFAT SoC Processor Format lt sp gt n lt LF gt n 0 Disable echo H rr lt LF gt n 1 Enable echo rr the Result code Example lt sP gt 1 lt LF gt Enable echo 100 lt LF gt Primarily for debugging enabling echo makes ALFAT send back the data it receives over UART Echo is disabled by default 7 4 3 Z ALFAT Control Format Z lt sP gt n gt 0 lt LF gt n Control mode number H rr lt LF gt o 0 Off 1 On values 2 F are reserved rr the Result code Example Z lt sP gt 0 lt LF gt Put ALFAT in Standby mode After waking up from Standby mode program execution restarts in the same way as after a Reset Example2 Z lt sP gt 1 lt LF gt Put ALFAT in Stop mode 100 lt LF gt The Result string will be returned after ALFAT wakes up by setting WAKEUP pin low Example3 Z lt sP gt 2 gt 1 lt LF gt ALFAT uses WAKEUP EFC as 100 lt LF gt Emergency Flush and Close Control mode number 0 Standby Mo
32. com GHI Electronics ALFAT SoC Processor 9 Hardware integration guide Reference schematics for the ALFAT Soc processor are found under its Catalog entry on GHI Electronics website click on the Resources tab and find the link to ALFAT s schematic 9 1 Power Source Power sources are the cause of many problems ALFAT is capable of running at lower voltage or somewhat noisy voltage source However the media devices may or may not work on an unstable power source Make sure that the power source to the storage media is reliable and there is a large enough capacitor as close as possible to the media power pins We recommend adding O 1uF and 22uF capacitors If 5V is connected to pin 18 there is no need 3 3V on pin 13 If 3 3V is connect on pin 13 then 5V is not strictly necessary on pin 18 however USB will not work USB requires 5V on this pin 9 2 Crystals ALFAT s main clock is provided through a 12 MHz Crystal with 500PPM or less and a load capacitance around 18pF Real Time Clock crystal s value should be 32 768 kHz and the load capacitance is 12 5pF 9 3 Card Detect and Write Protect signals When the SD memory card interface is being initialized I command ALFAT samples the card detect input CD pin 25 If CD is Low ALFAT will initialize the card otherwise ALFAT will reject the command Consequently if the card detect signal is not implemented in the hardware design the CD pin must be connected to GND When
33. commend using the provided firmware updater application described in previous session But here is an example that uses a terminal console like TeraTerm to update the firmware instead Put ALFAT in the bootloader mode SPI SSEL low and SPI MOSI high reset Open the relative COM port and set the baud rate to 115200 and set the New line receive to LF EL Tera Term disconnected V File Edit Setup Tera Term New connection T 2 TCP IP Host 192 168 1 3 History Service Telnet TCP portit 22 SSH SSH version SSH2 Other Protocol UNSPEC Serial Port OK Cancel Help Man Rev 2 16 Page 56 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor Tes Term Seal pore Baud rate 15200 Data Bbit Flow control mone Transmit delay 0 msec char 0 msec line Tera Term Terminal setup Terminal size Newline 90 x 35 Receive LF 4 Term size win size Transmit Cancel j Auto window resize Terminal ID T100 7 Local echo Answerback _ Auto switch T lt gt TEK Kanji receive Kanji transmit Tcr Kanji in bit katakana 7bit katakana Kanji out locale american CodePage 65001 Use X command and follow the instructions LJ COMI3 Tera Term VT File Edit Setup Boot Loader 1 8 Firmware ux x x FF Boot Loader 1 8 Firmware ux x x FF Erasing and updating the firmware Confirm
34. complete FAT file system overhead Such speeds are achieved when using the copy command But when using other commands like read or write commands the serial connection with the Master adds a major delay overhead When one of the serial interfaces is used to exchange the data with a Master some command response overhead is introduced There is also a maximum clock and other restrictions on the interfaces On an average file access speed is about 230 KBytes sec when using UART or SPI and about 25 KBytes sec when using I2C That is about the same when using SD USB FS or USB HS To achieve higher writing speed ALFAT command set includes L Command Fast Write to File command Available for SPI interface only this command is very similar to the W Command but with L Command it uses internal DMA to reach faster receiving rates The average speed with this command is 1400 KBytes sec with SD cards 1200 KBytes sec with USB HS and 750 KBytes sec with USB FS Man Rev 2 16 Page 65 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 12 Result codes Result codes are always strings with 2 characters The 2 characters are always from the set of hexadecimal digits 0 to F So the string may be interpreted as a one byte hexadecimal value ranging from decimal 0 to 255 For example Result code 3F as produced in the data stream from ALFAT to the Master will be the two ASCII bytes with values of 0x33 and 0x46
35. ctronics com GHI Electronics ALFAT SoC Processor Important Notes e If ULPI PHY is implemented in the design which includes the ALFAT OEM board then USB1 must be initialized with the High Speed parameter H This is true even if the attached USB Client does not support High Speed mode e WP pin Write Protect Signal must be connected to ground if it is not used in the hardware design e CD pin Card Detect Signal must be connected to ground if it is not used in the hardware design e lfadrive has not been initialized by this command any use of other file related commands that reference that drive name will fail ALFAT in SD Reader Mode In this configuration the SD Card M is presented as an external file system to the PC or other USB Host connected to U1 When the command is successfully finished the U CONNECT pin goes high When the PC has successfully connected with U1 the pin is pulled low it stays that way until a disconnect occurs or another command is issued that takes ALFAT out of SD Reader mode This is not real time nor is it the same for all device connections The pin can stay low for few milliseconds after a lost connection it can take even longer to go from high to low when the physical connection is established This is due to differences between device speeds at either end of the USB bus and the speed of the USB bus The physical U1 CONNECT pin is different depending on the Master to ALFAT interfac
36. current time and date To keep track of time ALFAT uses the internal real time clock There are two options for implementing the RTC The first option is Shared mode where the RTC runs off the ALFAT processor s clock and power With this option no external components are required VBAT should be connected to VCC With this option the Master would normally set the time and date with every reset power up The second option is Backup mode where The RTC clock uses an external 32 768 kHz crystal and runs off VBAT power commonly provided by a 1 65 to 3 6V coin battery Using a battery ensures that the RTC keeps operating even if the system is powered off Using this mode the RTC consumes about 1 uA To ensure that VBAT get powered from the backup battery only when the main power is off two diodes should be placed in the circuit 9 6 Bootloader Access The current ALFAT firmware is very stable Periodically we may release minor updates and or major upgrades We highly recommend using a design that supports installing firmware This includes maintaining access to the following pins UART RX UART TX loader and RESET 9 7 Electrical characteristics ALFAT SoC is based on STM32F205RBT6 Consult with STM32F205RBT6 datasheet for electrical characteristics if needed Man Rev 2 16 Page 60 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 10 ALFAT Off the shelf Circuit Boards GHI Electronics offers off the
37. de On or Off control is not allowed 1 Stop Mode On or Off control is not allowed 2 If On OFF flag is 1 WAKEUP becomes EFC If On Off flag is 0 WAKEUP has its default functionality If the optional argument is not present J 2 lt LF gt the use of the pin as EFC is disabled SmE Reserved This command controls a number of run level or processor states of ALFAT Man Rev 2 16 Page 31 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor ALFAT supports two low power modes 1s 2 Standby Mode This mode will completely turn off the processor e Exiting Standby mode ALFAT exits Standby Mode by resetting the processor RESET pin or by a rising edge on WAKEUP pin After waking up from standby mode the system is in reset It is important for users to make sure that all the files are closed before setting this mode e Typical Power Consumption 3 3 pA TA 25 C e Maximum Power Consumption 12 4 uA TA 25 C 20 5pA TA 85 C Stop Mode With this mode the system will maintain its state but will stop execution e Exiting Stop Mode ALFAT exits Stop Mode by a rising edge on WAKEUP pin After waking up from Stop Mode program execution resumes from where it stopped e Typical Power Consumption 0 5 mA Ta 25 C e Maximum Power Consumption 1 2 mA TA 25 C 11 mA TA 85 C ALFAT can change the purpose of the power control pin when the Mast
38. e Host MCU USB Client i Optional A j High Speed gt rT Mane INN NU 4 Bit SETTERS SD SDHC Interface 3 1 Default Mode In this mode ALFAT accepts two USB Clients and an SD card A high level serial interface is used by the Master to manage open read write delete files and directories on the media ALFAT handles all the tedious low level details such as implementing drivers for the USB and SD Card ports reading writing directory tables buffering and flushing file contents Etc The Master s I O interface becomes a minor piece of development allowing programmers to concentrate on other aspects of their devices Man Rev 2 16 Page 8 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 3 2 SD Reader Mode With a single Command from the Master ALFAT enters SD Reader Mode Where one of the USB ports is configured as a USB Client The SD SDHC interface is virtually connected to the USB Client port simulating an SD card reader This allows a PC to access the files on the SD card right through ALFAT The Master can command ALFAT to virtually disconnect the SD card from the USB Client interface allowing file access through commands similar to the default mode This mode gives developers the flexibility of managing data on SD cards internally and externally An example can be a data logger device where this device run stand alone saving data to the internal SD card Data is collected by the
39. e if the contents of the file associated with handle 5 is the single byte B the data string sent back by ALFAT for the file contents is BW 00000001 r e Optional portions in command syntax are enclosed in square brackets For amp example in the command J sP H r lt sp gt H is optional e The term Result string is a four byte string sent from ALFAT to the Master with the form rris E Where the substring rr is a Result code either OO for success or some other value that is either an error indicator or is informational For example Master to ALFAT M lt LF gt ALFAT to Master 11 lt LF gt in the Result string the Result code rr is 11 Result codes are listed in a table at the end of this manual e The phrase command parsed means that ALFAT has read and evaluated the command string and its arguments After a command is parsed ALFAT sends back the Result string If ALFAT returns additional data parameters they will be followed by a Result string e lf the Result code represents an error the transaction should be terminated Examples 1 Read command Master to ALFAT R 1F gt 5 lt tr gt ALFAT to Master 30 handle ALFAT will not send back any bytes for the rest of the dialog ALFAT will reset its state to ready and waiting for command Man Rev 2 16 Page 28 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 2 Write command Mast
40. e method When interfaced using UART or SPI the UT CONNECT pin is I2C SCL when using I2C the pin is UART TX Initializing the Memory Card Device with a Different Clock Frequency Format lt sp gt M gt d lt LF gt d SD bus clock frequency mode rr lt LF gt 0 24 MHz 1 16 MHz 2 12 MHz the default value 3 9 6 MHz 4 8 MHz rr the Result code Example lt sp gt M gt 0 lt rF gt Initialize memory card with 24 MHz 100 lt LF gt clock frequency The default SD bus clock frequency is 12 MHZ This frequency works on the majority of the memory cards Some cards can work with higher frequencies Higher frequencies will enhance the access speed Man Rev 2 16 Page 37 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor Notes related to the physical SD Card e Some SD cards work at 24 MHz but not the majority Cards that do not work with this high frequency may initialize without error Despite the successful mounting there is about a 2096 chance that low level write sector requests will fail It is highly recommended to use the default frequency if the final application should work with the majority of the cards e Ifthe SD card is rated by the manufacturer with a high Class number this does not mean that it will work with higher clock frequencies e If ALFAT is in SD Reader mode M uses the default value of 12 MHz 7 4 9 J Read Register Format
41. e number of bytes to be written e aaaaaaaa the number of actual bytes This command is used to write data to a file associated with the specified handle All sizes lengths in the command are in hexadecimal format The file must have been opened with write or append access mode e The data stream dddddd should not be sent until the Master has parsed the command and returned the first Result string indicating success e Ifthe first Result code is an error not 00 the Master must terminate the write command and send no more bytes All commands issued before using the Write command must be completed including the read of the final Result string The command FIFO buffer must be empty when Write is sent Man Rev 2 16 Page 45 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor If an error occurs while ALFAT is receiving the data stream ALFAT will continue to read bytes until the required number has been sent by the Master Then ALFAT returns the error in the second Result string To make sure that the data is physically written to a file the file must be flushed F command or closed C command Otherwise there is a risk of losing data or corrupting the file system when the storage media is removed there is a power loss or a reset 7 4 16 L Fast Write to File SPI mode only Flow d Flow L lt sp gt n gt ssssssss lt F gt SPI Read Frame ord the data size to be 100 lt LF gt aaaaaaaa
42. e of ALFAT SoC s SD Reader mode This board has a micro USB socket for USB1 which is connected to an external PHY supporting High Speed as well as a full SD Card reader 10 6 ALFAT Evaluation Kit The ALFAT Evaluation Kit is designed to make the mastering of ALFAT s capabilities quick and easy It works with any of the boards described in this chapter This kit is an invaluable guide for engineers new to ALFAT Evaluation begins by 1 connecting the Kit s hardware 2 installing the provided software on a Windows PC and 3 using the GUI to run some examples The above procedure takes less than ten minutes and is explained step by step in the Quick Start Guide The kit includes e a hosting board ALFAT EVAL provides the necessary circuitry to boot and interact with an ALFAT board e an integral USB port connects the EVAL assembly to a standard Windows PC e afriendly point and click program ALFAT Explorer is hosted on the PC It controls the attached ALFAT e the source code for the Explorer program is provided so you can see the simplicity of ALFAT s API e The Evaluation Kit includes both an ALFAT OEM Board and an ALFAT SDR Board e Test media SD Card and USB Flash memory The Kit is powered by the USB cable In summary the ALFAT Evaluation Kit contains every necessary component to exercise ALFAT s capabilities right down to the USB cable SD Card and USB flash storage Full details can be found on GHI Electro
43. eam of data exactly ssssssss bytes aaaaaaaa is the number of actual bytes in the returned stream that were available in the file less than or up to ssssssss bytes rr the Result code Example Given a file opened with handle 2 it contains 8 bytes ABCDEFGH R sP 2 5 r Read 5 bytes from file handle 2 with a 100 lt LF gt Filler byte of the Master requests 5 ABCDE 00000005 r bytes ALFAT returns 5 significant bytes 100 lt LF gt ABCDE The Master then uses the R R lt sP gt 2Z gt 5 lt LF gt command to request 5 more bytes with 100 lt LF gt a Filler byte Z ALFAT returns the last 3 FGHZZ 00000003 lt F gt bytes of the file FGH and 2 filler bytes 100 lt LF gt ZZ The number of significant bytes that were returned was 3 e N the file handle o for files on media devices with file systems card reader USB drives a must be a value from O to F must be associated with a file the Open command associates a filename with a file handle o For virtual handles associated with USB Keyboards must be Z K0 or Y K1 e ssssssss the number of bytes the Master requests ALFAT to read Even if the device does not contain enough data to satisfy the request ALFAT will return all available bytes and then it sends the Filler byte as many times as needed to return a byte count equal to ssssssss Data available from file system based devices is based on the current position in the
44. electronics ALFAT SoC Processor Man Rev 2 16 Date November 30 2015 User Manual A high performance FAT file system SoC processor with dual USB Host interfaces USB Client interface SD Reader Mode and 4 bit SD interface Controlled through UART SPI or I2C Document Information Description Abstract ALFAT SoC processor concept pin out specifications commands hardware integration guide and full information needed to implement a solution using this processor Firmware Covers Version 2 Releases GHI Electronics 2014 www ghielectronics com GHI Electronics FFALFAT SoC Processor Document Revision History Modification Rev 2 16 11 30 15 Updated product images A o lt Z o Rev 2 15 10 29 15 Clarified NOP and removed a note about a resistor Rev 2 14 01 07 15 Simpler banner pseudo code Rev 2 13 12 03 14 Flow chart cross references fixed OEM Module pinout clarification Date mans 079715 orana bera cenar orana osa soar Rev 2 01 03 25 14 More work on SPI interface Rev 2 00 03 10 14 Preliminary document for Beta firmware 2 0 0 Man Rev 2 16 Page 2 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 4 5 7 8 Table of Contents Na i e 0 i cy Thal a e INTE CSDL 5 1 1 AEFAT System on a Crilp Soc OVOIVIGW 5 ert ren ERI Eos ddp EL per ea bise b tre eee oobi 5 MERS ie eiee eelte 2 2 2 0 irn E tct E sabe ctus etl epa editt E E Esci
45. er is not going to use low power it may use WAKEUP as an Emergency Flush and Close trigger EFC itis an interrupt pin that triggers on low to high edge transition when triggered o ALFAT does a graceful internal shutdown as quickly as possible by flushing and closing all open files o Any command in process will be terminated o The internal FIFO buffer will be flushed if enabled and a Z command for power state control is sent by the Master then EFC is disabled and the pin is reconfigured for WAKEUP after an EFC event interrupt has occurred ALFAT should be reset If it is not reset then if a UART interface is active 60 lt LF gt will be sent to the Master for SPI or I2C interfaces ALFAT will send 60 r as the Result string of the first command sent to it Communication of data in SD Reader devices is controlled by the PC associated with the SD Reader If ALFAT is in SD Reader Mode the triggering of EFC will not affect in any way the current state of transactions between the USB Host and ALFAT Best practice suggestions for EFC use in power fail circuit or other similar external event use before a reset when the Master detects internal can not happen errors asserts Man Rev 2 16 Page 32 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 4 T Initialize Real Time Clock Format T lt sP gt S lt LF gt Shared Mode The RTC runs off the same rr lt LF gt processor clock
46. er to ALFAT W 1 5 r ALFAT to Master 30 The Master terminates it s Command processing in this case it must not send the data portion of the write command to ALFAT e If the command has a return value independent of any data stream the value will be proceeded by a dollar sign For example if the Master issues a read command for 5 bytes from a file opened with handle A a filler value of ASCII P and there were only 4 more bytes in the file ABCD then the dialog for a successful read would be HOST ALFAT R AP 5 r ALFAT HOST 100a r ALFAT HOST ABCDP 00000004 r ALFAT HOST 00 r e ALFAT stores each command in a FIFO buffer This means that the Master can send a byte stream for one command followed by another When the buffer is full ALFAT will signal using BUSY The return stream s ordering will match the FIFO processing ordering of the commands e The total length of an individual command may not exceed 200 bytes e ALFAT s storage device ports are identified by Drive Names M Memory Card drive U0 USB Flash drive 0 U1 USB Flash drive 1 K0 USB Client attached to USBO is a Keyboard K1 UBS Client attached to USB1 is a Keyboard D refers to a combination of 2 devices for SD Reader mode e When a command requires a file name it must be absolute non relative and must include the drive name For example if a file named ghi exists in the folder rootisubd
47. eu epar sat Sese cta cue esaet 6 1 9 BY BSIUEOS emer ee eerie eer eee asset re Lira rer TTE TTE a6 HST aul qe Te 3 ee a E A Operating MOOOS ci erit ttes m 8 oe As emt ROG te T T 8 3 2 SD Resder Mode muss onn Seen Tee rT PT eee IDE ELEM M IE Tero TE EE TO salts 22 9 WE oe eflec o MNT 10 PCF INR NS e M E career A A IE LE E AE A A A N AE EN E tected 11 5 1 COmimislieds 45 ostiis O er Erebi bb d S a E E de Ge 11 5 2 FAT File System EI NIO assu ise ia e aeaee EXER RE A ERRARE BAR FARNE dA eer TREE EEEE 11 5 3 Memory Card Access SDHC SD or MM tired obra eth other RH Ere t e Dr PES IE MEPI a d dee SERRA Cs ds is sE NE Od 12 544 USB Host CODTIBellOTis oerte err HH na TREES IP ATREA O EET FEE FUE EH REEEEEEE SERIE EPUM YE CEA PEU Eee EPA UE DEUS 12 3 0 BONOAN OR 25a oda fau cuit ttut n niu Pit Dt EIL ANAND EE LIIS da 12 5 Package sid PM OUE ai bacis pU ud ped qd rp EM A a EE M 13 Selecting the ALFAT Access Interface Reset Booting esses 17 CAMS AGS WOES SIS miel RE EE EO C Doo L0 0L DELL 17 6 2 BOOT RESET PROC e 18 6 3 UART Interlace MOG e EUER 18 031 UART C ONNGURA DOIN aicut casio elenco sara e rrerer renee re AE RE EERE errr ccrrerse ercerrrercer pee tub te eas sth tet reer rere 19 03 SPHnterteoe WOME astitit eris stetee a EU i aera aires sats aa A 19 ST a Mire od Eee 19 2 5S
48. f 68 www ghielectronics com GHI Electronics ALFAT SoC Processor Value Description 70 When initializing SD Reader mode no SD Card in Socket Use J to detect before 1 71 For I K0 or I K1 no USB keyboard found 72 Read or Write command R W for file handle Z K0 or Y K1 when not initialized FF bootloader indication code Man Rev 2 16 Page 67 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 13 DISCLAIMER IN NO EVENT SHALL GHI ELECTRONICS LLC OR ITS PARTNERS BE LIABLE FOR ANY DIRECT INDIRECT INCIDENTAL SPECIAL EXEMPLARY OR CONSEQUENTIAL DAMAGES INCLUDING BUT NOT LIMITED TO PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES LOSS OF USE DATA OR PROFITS OR BUSINESS INTERRUPTION HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY WHETHER IN CONTRACT STRICT LIABILITY OR TORT INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY OUT OF THE USE OF THIS PRODUCT EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT ANY NOTICE PRICES ARE SUBJECT TO CHANGE WITHOUT ANY NOTICE ALFAT SOC PROCESSOR AND ITS LINE OF OEM BOARDS ARE NOT DESIGNED FOR LIFE SUPPORT APPLICATIONS ALFAT is a Trademark of GHI Electronics LLC Other Trademarks and Registered Trademarks are Owned by their Respective Companies Copyright GHI Electronics LLC 2014 Man Rev 2 16 Page 68 of 68 www ghielectronics com
49. hm resistor in 2 series 46 NC Should not be connected 47 NVCAP 2 Connect to a 2 2uF to ground 48 VDD3 Power 3 3V 49 NC Should not be connected SSEL SPI interface 5V tolerant By default this pin is internally pulled down Note this pin is oY ont OE read during ALFAT bootup to select communication interface type DO 4 bit SD Bus Add a 47K resistor between Su SEDE this pin and VDD D1 4 bit SD Bus Add a 47K resistor between S 20 D3 this pin and VDD 53 SD CLK CLK 4 bit SD Bus CMD 4 bit SD Bus Add a 47K resistor between AD OMD this pin and VDD SCK SPI interface 5V tolerant This pin is internally pulled high If this pin is pulled low oy Sen during reset or power up the UART baud rate will be 9600 The default rate is 115200 baud 56 NC Should not be connected 57 USB1 ULPI D7 USB High Speed PHY signal Add a 10K resistor x to VDD 58 2C SCL U1 CONNECT SCL I2C Interface signal If SD Reader mode is initialized I sP D H LF2 and communication to ALFAT is UART or SPI this pin gives the Man Rev 2 16 Page 15 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor Pin Name Description connection status of the USB1 Client to the USB Host 59 2C SDA SDA I2C Interface 60 B00TD puc n 61 NC Should not be connected 62 NC Should not be connected 63 VSS2 Ground 64 VDD4 Power 3 3V When the SD Reader mode is active this pin U1 CONNECT signals the state of a c
50. ile size or file folder count other than those mandated by the FAT standard Man Rev 2 16 Page 11 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 5 3 Memory Card Access SDHC SD or MMC ALFAT processors include a memory card driver that supports SD SDHC and MMC cards This gives ALFAT the ability to accessa wide range of memory cards such as standard or high capacity SD MSD cards or multimedia cards There is no limit on the card capacity Unlike typical solutions that access card readers through a SPI based interface ALFAT s hardware uses a 4 bit SD bus interface for higher performance 5 4 USB Host Connections ALFAT is capable of accessing FAT file system files on USB mass storage clients The hardware provides two standard Full Speed USB 2 0 compatible Host interfaces USBO and USB1 that use the internal USB PHY Only 22ohm resistors and USB Host connector is needed USB1 interface is also capable of running in USB 2 0 High Speed mode by adding a ULPI High Speed PHY chips like FUSB2805 This option quadruples the file system access speed EFull Speed USB 2 0 is 12mbps 2 High Speed USB 2 0 is 480mbps 5 5 Bootloader The bootloader is a small application that e initializes the ALFAT processor e itverifies and launches the ALFAT firmware and e itgives the Master an interface for firmware updates The bootloader can only be accessed through the UART port and it use
51. irectory on USBO then any command referencing ghi dat must use U0 root subdirectory ghi dat e A pin protocol for when to send commands or read data is simple BUSY and DATAREAD can be monitored by the Master and interpreted as o new commands may be sent when BUSY and DATAREADY are both low o ALFAT may be read when BUSY is low and DATAREADY is high Any exceptions to the above are noted in the individual command definitions Man Rev 2 16 Page 29 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 3 Summary of All Available Commands Command Description Command Description Test media Delete file or folder Get free size Find file or folder Initialize directory list Copy From File to Another Get next directory entry Rename file V Get version number l Initialize Interfaces Devices Z ALFAT Control O Open file to a free handle T Initialize Real Time Clock W Write to a file S Set current time and date R Read from a file G Get current time and date F Flush file B Change Baud rate C Close file Enable echo P File seek J Read Register Y File tell E D K M N A Q L Format Fast Write to file SPI only lt LF gt No Operation NOP 7 4 Full Syntax and Definition of Commands 7 4 1 V Get Version Number Format V lt LF gt X X X numeric version Vv x x X lt LF gt rr the Result
52. ke a long time to finish The first Result string is sent before formatting starts The second Result string is sent when formatting is done using the Bootloader Firmware Updates 7 4 27 lt LF gt No Operation NOP Format lt LF gt rr lt LF gt No operation rr the Result code Sending ALFAT lt LF gt by itself not proceeded by any other characters always returns a Result string with a Result code of 00 indicating success Whenever ALFAT is reset powered up it sends the Master a banner string It is important that this banner be read by the Master See also the section Boot Reset Protocol Man Rev 2 16 Page 53 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 8 The Bootloader 8 1 General Description The bootloader is the software that runs when the ALFAT SoC is reset or powered up It has two primary functions 1 Boots initializes the state of the hardware verifies and launches starts execution of the ALFAT firmware 2 GHI Electronics maintains ALFAT firmware with improvements and bug fixes The bootloader provides the Master or development system an interface for ALFAT firmware installation 8 2 Connecting and Controlling the Bootloader When the ALFAT SoC is reset or powered up if SPI SSEL is low and SPI MOSI is high the bootloader supports a small set of commands transmitted over UART There is no support for other ports Unless firmware update
53. lize USB1 at Full Speed mode 100 lt LF gt I sP U1 H r Initialize USB1 at High Speed mode 00 lt LF gt I lt sp gt D H lt LF gt Establish High Speed SD Reader Mode 100 lt LF gt 1 When ALFAT is in SD Reader Mode both USB1 and the Memory Card drive are used 2 The optional parameter H indicates that the USB1 device should be initialized as High Speed the default is Full Speed H is not supported for K1 3 When initializing either USBO or USB1 as a Keyboard host 1 an optional argument indicates whether the R command Read passes back the raw unfiltered key code or a filtered code Filtered key codes take the raw key codes and map most of the printable key codes to their ASCII value Possible values for K are e A return filtered ASCII characters e R return raw key codes 2 Fora consistent I O model a mapping is provided to refer to the USB keyboard using virtual file handles for commands where file handles are required e Virtual file handles are implicitly opened by the I command e KO is given handle Z K1 is assigned handle Y e Virtual file handles can be read get keys and written e g set LED e Other commands for Keyboard Clients include K get size J read register 4 When using the memory Card device M an optional argument is supported to set the bus speed of the SD Reader described further below Man Rev 2 16 Page 35 of 68 www ghielectronics c
54. lose EFC By default this pin is internally pulled low Signal is Low to High 15 NC Should not be connected 16 NC Should not be connected USB High Speed PHY signal Do not connect if ud Soe nies PHY is not used 18 VSS1 Ground 19 VDD1 Power 3 3V Man Rev 2 16 Page 13 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor Pin Name Description Indicates the status of the buffer used to hold data that may be read by the Master When ee DATAREADY high the buffer is contains data that may be read USB High Speed PHY signal Not connected if Ae ASE VEREER PHY is not used 22 SPI MISO UART BUSY MISO when using SPI interface otherwise BUSY pin for UART interface 5 V tolerant MOSI SPI interface 5V tolerant By default this pin is internally pulled down Note this pin is oo eI MI read during ALFAT bootup to select communication interface type SD Write protection signal input Low card not 24 WP protected Connect to ground if Write protection signal is not used in the hardware design Memory Card Detect signal input Low card 25 CD60 detected Connect to ground if Card Detect signal is not used in the hardware design USB High Speed PHY signal Do not connect if 26 USB1 ULPI D1 PHY is not used USB High Speed PHY signal Do not connect if 27 USB1 ULPI D2 PHY is not used 28 BOOT1 Add a 10K resistor to ground USB High Speed PHY signal Do not con
55. ltage source to the media is reliable and there is a large enough capacitor placed as close as possible to the media connector We recommend adding 0 1uF and 22uF 11 2 File Access Speed There are many factors that affects file access speeds Some storage media devices have internal buffering others have high speed rating But even on the exact same media speeds might differ between different tests Here are some factors that affect the speed on the same media fragmentation media life and voltage Fragmented storage runs slower because the system needs to spend more time or even read more sectors from the FAT table to find the needed cluster Formatting the media should take care of this fragmentation Also storage access speed decreases when the storage get closer to the end of life The time needed to erase sectors increases while the device is maturing Some sectors may even start failing at some point which causes more delays Finally while some devices can run on a range of voltages the lower the voltage the slower the device usually runs Noisy power source may cause errors while accessing the media that slows the speed down Man Rev 2 16 Page 64 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 11 3 Serial Interface Speed Overhead The actual speed of a specific media can be easily determined using the E command which range from 1000 KBytes sec to 4000 KBytes sec This is the internal speed with
56. master written ALFAT storing it on the SD card At some point to obtain the logged data the logger is connected to a PC The Master detects the PC connection through ALFAT and switches the SD to be virtually connected to the USB Client simulating an SD reader Once the file transfer is complete the Master can command ALFAT to virtually disconnect the SD card from the USB Client interface and then to continue logging data Man Rev 2 16 Page 9 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 4 USB Keyboard Access There are projects that would benefit from the ability to support USB keyboards ALFAT is mainly designed and optimized for file system needs however ALFAT can also be used to read keystrokes on USB keyboards Details on how to read USB keyboards are covered in the command section namely the Get Free Size command K and the Read from File command R Man Rev 2 16 Page 10 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 5 Architecture ALFAT SoC s processor is an ARM Cortex M3 that runs a robust file system engine with SD and USB Host Client drivers The processor accesses storage media though its 4 bit SD interface and two USB Host 2 0 interfaces One of the USB ports is also capable of running at High Speed 480 Mbs with an external ULPI HS PHY chip Methods for interfacing ALFAT with the Master are flexible a standard bus UART SPI or I2C can be used
57. nect if 29 USB1 ULPI D3 PHY is not used USB High Speed PHY signal Do not connect if 30 USB1 ULPI D4 PHY is not used 31 VCAP 1 Connect to a 2 2uF to ground 32 VDD1 Power 3 3V USB High Speed PHY signal Do not connect if 33 USB1 ULPI D5 PHY is not used USB High Speed PHY signal Do not connect if 34 USB1_ULPI_D6 PHY is not used Data Minus USB port 1 NC if HS PHY is used po KABA DM If FS is used add 22ohm resistor in series Data Plus USB port 1 NC if HS PHY is used 99 eT Dr If FS is used add 22ohm resistor in series 37 NC Should not be connected 38 NC Should not be connected DO 4 bit SD Bus Add a 47K resistor between oa DH this pin and VDD Man Rev 2 16 Page 14 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor Pin Name Description D1 4 bit SD Bus Add a 47K resistor between E this pin and VDD This pin generates 19 2 MHz clock It is usually d a used to clock the USB High Speed PHY UART transmit bus line 5V tolerant If the SD Reader Mode is initialized I sP D H F and 42 UART TX U1 CONNECT communication to ALFAT is I2C this pin gives the connection status of the USB1 device to the PC 43 UART RX SPI BUSY I2C BUSY UART bus receive line BUSY pin for SPI and I2C 5V tolerant Add a 10K resistor between this pin and VDD Data Minus USB port 0 Add 22ohm resistor in 44 USBO DM Senne 45 USBO DP Data Plus USB port 0 Add a 22o
58. nics web site www ghielectronics com Man Rev 2 16 Page 63 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 11 Performance 11 1 Selecting the Right Storage Media The current storage media market is flooded with low grade devices These devices may work on a PC but that doesn t mean the device follows standards and will work with ALFAT Also other devices may have advanced features not suitable for embedded devices For example some USB memory drives have a built in USB hub We make our best effort to support a wide range of storage media that follow published standards But GHI Electronics does not guarantee that ALFAT will be able to access all storage media For products using ALFAT SoC processors it is important to test different media devices Then maintain a list of supported media for a product GHI Electronics does not recommend any specific brand but always recommends selecting a well known source If media is not supported a failure most often occurs at initialization I command Less often rarely the media will initialize but then have problems with reading and or writing If the media mounts with no errors in most cases it is safe to assume it will function normally As discussed in the integration section power source can be a big source of problems ALFAT is capable of running at lower voltage or with low levels of noise However in those cases the media may or may not work Make sure the vo
59. ollowing table covers these cases Actual Data coming from File Data transmitted from ALFAT I2C bus 0x00 OxFF followed by 0x00 OxFF OxFF followed by another OxFF 0x01 OXFE Data is sent as is Important e Atthe I2C level the number of bytes transmitted may not match the actual size of the file contents For example If a file has one byte and this byte value is zero ALFAT will actually send 2 bytes a OxFF followed by 0x00 The I2C interface processing code in the Master should remove the escape bytes so higher level application code does not have to be aware of this problem e WARNING the R command read from file handle uses a filler byte to pad the return stream For I2C only the filler byte can not be OxFF or 0x00 Man Rev 2 16 Page 25 of 68 www ghielectronics com GHI Electronics This pseudo code outlines one possibility of a receive function FFALFAT SoC Processor UINT8 I2C GetDataFromALFAT UINT8 b do wait for data 0x00 no data I2C_SendAddress OxA4 READ BIT b I2C Read while b if b OxFF I2C_SendAddress xA4 READ BIT b I2C Read if b 0x00 8 amp b Oxff Panic This should never happen b now equals the actual value 0x00 or OxFF return b Man Rev 2 16 Page 26 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 ALFAT Command Set 7 1 Introduction The commands written from Master
60. om GHI Electronics ALFAT SoC Processor This command controls functions related to the hardware interfaces for file storage devices such as e initializing the hardware and software interfaces to a file system device and mounting its file system e Setting ALFAT to SD Reader Mode Mass Storage Client e changing the bus speed of the memory SD card interface If I returns 11 or 70 at the Result code the program should check for the presence of media with the J command before using I If the command is executed for any device that is currently mounted that is it has previously appeared in an command then all open files on that device are flushed and closed the device and internal data structures are all re initialized as though this were the first command for the device Example I M lt LF gt various files are opened on M some have been written No files have been closed I M lt LF gt all files associated with M are flushed and closed their file handles are free This holds true for D SD Reader mode For example see J command below assuming a card is in M and is write enabled U1 is not connected and UO holds no device I D ar 00 lt LF gt J LF 00 lt LF gt 81 lt LF gt 00 lt LF gt a USB Flash Drive is plugged into U1 before the following I U1 lt LF gt 100 lt LF gt J lt LF gt 49 lt LF gt 00 lt LF gt Man Rev 2 16 Page 36 of 68 www ghiele
61. onnection between the USB Client and a PC See the I command for details All pins have internal weak pull up or pull down resistors leaving them unconnected is safe Man Rev 2 16 Page 16 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 6 Selecting the ALFAT Access Interface Reset Booting 6 1 Interface Mode Selection The Master circuit can be connected to ALFAT using one of the following interfaces 1 UART 2 SPI or 3 12C During initialization after reset or power up ALFAT detects which interface to use by reading SPI SSEL and SPI MOSI SPI SSEL SPI MOSI Interface low low UART low high Bootloader high low I2C high high SPI this interface has two affects the ALFAT is placed in bootloader mode and also the interface is UART The bootloader is primarily used for firmware updates and can only be accessed using UART The Bootloader chapter explains this in greater detail SPI SSEL and SPI MOSI have internal pull down resistors Example code for interfacing to ALFAT is available on the GHI Electronics website go to the Catalog entry for ALFAT and click on Resources Man Rev 2 16 Page 17 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 6 2 Boot Reset Protocol 1 The Master holds ALFAT s RESET pin low until the power is stable 2 The Master establishes SPI SSEL and SPI MOSI to indicate which bus is chosen as shown in the table
62. onsists of three bytes i the frame type 0x2 for Read ii the least significant byte of the total bytes LSB AR the Master is requesting from ALFAT the most significant byte of the total bytes MSB_R the Master is requesting from ALFAT R LSB R MSB R 8 2 Filler bytes A bytes with value 0x00 These written by the Master to receive the data from ALFAT The length of this byte stream is not known until the Master receives the actual size A from ALFAT Read Response Data Response Number of bytes Payload Stream to frame available in ALFAT A bytes long type buffer Ignore LSBA MSB A Byte 1 Byte 2 ee Byte A The Read Response consists of two parts a header and payload 1 The header consists of three bytes i Ignored ii The least significant byte of A iii The most significant byte of A A LSB_A MSB_ABI lt lt 8 If A is 0x00 the Master will not send any Filler bytes the SPI Read Request frame processing is complete If A is less than R it does not mean that ALFAT is done with processing the current Command Commands are fully discussed in the ALFAT Command Set chapter Man Rev 2 16 Page 23 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor Read Processing lt gt Send Read Request for P bytes Read Response of P bytes SIG bytes of actual data Man Rev 2 16 Page 24 of 68 www ghielectronics com GH
63. s followed by one or more characters representing arguments LF A place holder for the byte 0x10 On many compilation systems this is identified as the character n SP A place holder for the byte Ox20 the space character Result string Any data returned to the Master in response to a Command will be followed by a 4 character Result string that provides an indication of success or failure The Result string includes a Result code An example Result string 01 lt LF gt the Result code is 01 Result code The two characters following the exclamation mark in the Result string OO indicates success any other value is either an error number or informational Result codes are listed at the end of the manual Man Rev 2 16 Page 7 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 3 Operating Modes ALFAT includes two modes of operation Developers need to decide which mode suits their needs and connect ALFAT accordingly The following sections highlight the differences Long Filename Je fa Vil Mic de SII eee Ch 11 UART SPI I2C FAT FAT32 Command ETIILI File System Engine PITIIILA USB Host Channel 2 Host MCU Optional High Speed PHY 4 Bit TURE SD SDHC Interface A orl m T f voador Fata f 191v A UART SPI I2C FAT FAT32 ebblllLd USB Host Command ETITIDA File System Engine Long Filenam
64. s XMODEM 1K to transfer the firmware file to ALFAT The The Bootloader chapter explains this in greater detail Man Rev 2 16 Page 12 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 5 6 Package and Pin Out The ALFAT SoC package is standard 10x10mm LQFP64 The following Table is a description of ALFAT s pins Pin Name Description Power source for the internal Real Time Clock RTC Connect to 3V battery or VCC Always 4 VBAT use 2 diodes to connect a battery and VCC in case the battery runs out of power VBAT works from 1 65V to 3 6V If RTC is not needed connect to VCC 2 NC Should not be connected Pin 1 for the 32 768 kHz crystal for the RTC 3 OSC32 IN Optional Pin 2 for the 32 768 kHz crystal for the RTC 4 OSC32 OUT Optional Pin 1 for parallel cut 12 MHz system crystal T OSG IN 10pF to 20pF is recommended 6 OSC_OUT Pin 2 for 12 MHz system crystal Reset signal Active Low a RESET THIS PIN IS NOT 5 VOLT TOLERANT 8 USB1 ULPI STP USB High Speed PHY signal Do not connect if PHY is not used 9 NC Should not be connected USB High Speed PHY signal Do not connect if 10 USB1 ULPI DIR PHY is not used USB High Speed PHY signal Do not connect if 11 USB1 ULPI NXT PHY is not used 12 VSSA Ground 13 VDDA 3 3V Power source Controlled by the Z command By default a wake up signal alternatively use as emergency 14 WAKEUPEFC flush and c
65. s will never be done hardware designs must support UART TX and UART RX pins Use of UART by the bootloader is not related to the Interface SPI I2C or UART used for communication with the firmware See the section Selecting the ALFAT Access Interface Mode Firmware transfer to ALFAT uses the XMODEM protocol with 1 KB packets and CRC 8 3 Firmware Updater Application An updater application is provided by GHI Electronics for updating the firmware from development computers Users may also wish to implement this functionality right into the Master so an update can be performed by the Master To connect ALFAT or one of the ALFAT OEM boards to a PC for update a TTL serial connection is needed If using a regular PC serial port then a RS232 to TTL level converter is required between ALFAT s UART interface and the PC s serial port We recommend using an USB TTL serial cable Here is a part number for a FTDI cable TTL 232R 3V3 from FTDI The USB side of the cable is recognized the PC as a virtual serial port COM port and it provides TTL 3 3V levels at its pin connector side that can be connected directly to ALFAT s UART interface Man Rev 2 16 Page 54 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor New Connection r Step 1 r Step 2 Select Bootloader mode Connect TTL UART interface Connect cable s TXD to ALFAT s UART_RX oe ae ALFAT CPU Pin 43 eet PRA ALFAT SD board 4 socket X4 Pin
66. sent any commands that requires write access to the memory card for example W Q A ALFAT checks the write protection input pin 24 WP If WP is low then ALFAT proceeds with the command If a write protection signal is not implemented in the hardware design then the WP pin must be connected to GND Man Rev 2 16 Page 59 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 9 4 Full Speed High Speed with ULPI PHY To use USB s Full Speed mode 12Mbps two 22ohm resistors must be connected in serial with the data DP and data DM signals of each of ALFAT s USB interfaces USB1 can be operated in High Speed mode 480 Mbps though the use of an external ULPI PHY for example a Fairchild FUSB2805 High Speed This PHY requires 19 2 MHz clock source To save the cost of an additional crystal ALFAT generates a 19 2 MHz clock at pin 41 that can be used with the PHY Notes e IfULPI PHY is used the two 22o0hm resistors are recommended in serial with the data DP and data DM lines There have been reports that with the ULPI PHY and 22ohm resistors some USB Flash Thumb drives do not work e If ULPI PHY is implemented when initializing USB1 I command with U1 the High Speed attribute must be used U1 H This is still true even if the physical device does not support High Speed mode This applies to the ALFAT OEM board 9 5 Real Time Clock ALFAT tags modified or created files with the
67. sor As bytes are sent if ALFAT becomes busy it may signal the Master to stop sending bytes The Master can check for the busy signal in two ways 1 by checking the SPI BUSY pin or 2 checking the SPI response bytes sent by ALFAT Ready for Byte RFB Note regardless of the method chosen to detect busy if the frame sent to ALFAT has a payload of 4 KB or less it can be sent with no checking A significant speedup may be possible if large payload data those greater than 4Kb is divided into 4 KB chunks Using SPI BUSY This signal is sampled before sending new frames New frames can be sent if SPI BUSY is low SPI BUSY must also be checked during payload transmission after each byte is sent If SPI BUSY goes high e during the header portion of the write ALFAT resets its command processor to a ready state The Master must terminate the frame send no more bytes Then when SPI BUSY goes low the write frame including header may be sent again e while sending the payload SPI BUSY is sampled after each byte if it is high transmitting pauses until it returns to low Write Frame based on BUSY pin Payload Processing Send Byte increment pointer Send Head 0 1 Get Rx 0 ignore Send Head 1 LSB More to send Get Rx 1 RFB Busy Pin a gt Busy Pin Low Yes Payload_Length lt 4Kb es Header Processing Man Rev 2 16 Page 21 of 68 www ghielectronics com GHI Electronics
68. st Media Speed Format _Ex lt sp gt X gt ssssssss lt F gt X Drive name one of rr lt LF gt M Memory Card drive aaaaaaaa ar U0 USB Flash drive 0 bbbbbbbb r U1 USB Flash drive 1 I rr lt LF gt ssssssss number of bytes of data that will be tested It should divide evenly by 1024 aaaaaaaa total millisecond for writing hexadecimal bbbbbbbb total milliseconds for reading hexadecimal rr the Result code Example E lt sp gt M gt 6400000 lt LF gt Test write and read of 100MB on 00 lt LF gt the Memory Card 00005D14 r It takes 23828 milliseconds for 000039FB r writing and 14843 milliseconds for 100 lt LF gt reading A drive must be initialized and mounted before using the E command see the section Initialize and Configure Devices This command may take a few seconds to minutes for calculations to finish depending on the test size and the media There must be at least two free handles available for this command to use internally Man Rev 2 16 Page 52 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 26 Q Format Format Q lt sp gt CONFIRM FORMAT lt sp gt X lt LF gt rr lt LF gt rr lt LF gt X is drive name one of M Memory card U0 USB flash drive 0 U1 USB flash drive 1 rr the Result code Note Depending on the media size and access speed this command may ta
69. t LF gt starting point of the data to be copied from S D file handle of the file which is the destination for the data LLLLLLLL number of bytes to be copied in hexadecimal XXXxxxxx the number of bytes actually transferred rr the Result code Example M lt sp gt 0 lt sp gt 0 lt sp gt 1 lt sp gt 64 lt LF gt A successful 100 byte copy 100 lt LF gt from the file opened with file 00000064 lt LF gt handle 0 starting from the 100 lt LF gt beginning of the file The file opened with1 receives the data This command copies data from one file to another Files may be located on different devices for instance one on USB1 and the other on USBO This command supports copying a specific piece of the source file to the destination using the combination of INDEX and LENGTH Man Rev 2 16 Page 51 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor 7 4 24 A Rename file Format A sP OLD NAME NEW FILE NAME OLD NAME the absolute lt LF gt non relative name of the file Hrr lt LF gt to rename OLD_NAME must exist NEW FILE NAME The new name of the file Do not include the path to the file this is just the filename rr the Result code Example A lt sp gt U0 GHI ALFAT TXT gt ALFAT001 TXT Rename ALFAT TXT on ion USBO in the directory GHI PERSE to ALFATOO TXT The new file s full absolute name is U0 GHI ALFAT001 TXT 7 4 25 E Te
70. the number of bytes Host sends data with No actually written framing SPI Read Frame aaaaaaaa LF 100 lt LF gt At a high level this command works exactly as a Write command W It is only available when using the SPI interface in this case ALFAT uses internal DMA to achieve higher data receive rates average 1 4 MByte s than with the regular W command Additional information on data throughput is available in the Serial Interface Speed Overhead section Algorithm for command 1 Using normal SPI write frames the Master initiates the L command by sending Lssr n ssssssss r y 2 ALFAT accepts the request and sends the acknowledgment using normal SPI Read framing 3 ALFAT opens its SPI DMA channel 4 Master checks SPI BUSY If it is not busy then it sends 8192 bytes or less of the data Data is streamed with no framing Normally when using SPI there is a minimum delay of 2uS required between each byte With this command the entire 8192 bytes or less are sent without delay between bytes 5 The Master repeats step 4 until all ssssssss bytes of data are sent 6 The Master checks SPI BUSY If it is not busy it reads the Result string with normal Read frames Man Rev 2 16 Page 46 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor To make sure that the data is written to a file the file must be flushed F command or closed C command Otherwise there is a risk
71. to ALFAT and responses data read from ALFAT intentionally use 8 bit readable printable ASCII characters Debugging can be performed using terminal programs running on development machines Commands are typed in and readable responses come back When testing we recommend that any raw data stream associated with commands as well as any Filler bytes for the Read command defined below should be readable digits Many examples presented below use the command Read from File The full syntax defined below as well as the dialog data flow between ALFAT and the Master for the command is Master to ALFAT R sP hMf cccccccc r ALFAT to Master 00 lt tF gt ALFAT to Master stream of cccccccc bytes aaaaaaaa r ALFAT to Master 00 r The command string is always the first item sent to ALFAT in the above the command is R lt sp gt h f gt cccccccc lt LF gt where h is a file handle f is the filler byte cccccccc is the requested read size in bytes and aaaaaaaa is the actual number of bytes returned The definitions of these components are presented as necessary 7 2 Terminology and Syntax of Command Definitions Any exceptions to the following are noted in the individual command definitions e lt LF gt is the ASCII line feed byte value 0x0A ALFAT will accept the carriage return value OxOD in place of 0x04 e sP specifies the ASCII value for a space 0x20 ALFAT is white space sensiti
72. ugh external ULPI PHY High speed 4 bit SD card interface Single Pin trigger for automatic emergency flush and close of all open files Up to 4000 KBytes sec file internal access speed on SD cards Up to 4000 KBytes sec file internal access speed on USB High Speed Up to 1000 KBytes sec file internal access speed on USB Full Speed RTC Real Clock Time with separate power domain All I O pins are 5 Volt tolerant EXCEPT RESET PIN Small surface mount package LQFP 64 pin Single 3 3V power source Low power consumption 38 mA fully operational and 5 mA in hibernate 40 C to 85 C operational temperature RoHS Compliant Lead free Man Rev 2 16 Page 6 of 68 www ghielectronics com GHI Electronics FFALFAT SoC Processor 2 Terminology In this manual any data written to ALFAT from the Master are colored black data returned by ALFAT are colored red Definition of words and phrases used throughout this manual Word Meaning Synonyms Master The micro controller MCU or other device system that communicates with and controls ALFAT This could be a PC connected to ALFAT via a UART based cable or USB to Serial cable useful for debugging and experimenting USB1 ALFAT s USB port 1 By itself this does not define whether that port is configured as a Host or Client Also for USB2 Command A printable ASCII string signifying a request from Master to ALFAT the first character of the Command i
73. ve extra spaces will cause an error e In this document any characters sent to ALFAT from the Master are colored black and characters by the Master are red e All numbers are written as strings of hexadecimal digits The digits are encoded using ASCII For example to send the decimal number 16 to ALFAT the string would be 10 which is byte value 0x31 ASCII for 1 followed by 0x30 ASCII for O Hexadecimal digits A to F must be upper case Man Rev 2 16 Page 27 of 68 www ghielectronics com GHI Electronics ALFAT SoC Processor e In syntax definitions substitutable changeable tokens are enclosed with curly brackets The number of digits between the curly brackets is the number of bytes that should be transmitted For example ssssssss would signify that the token will be transmitted as eight characters For numeric values being sent to ALFAT leading zeros may be omitted Numeric values read from ALFAT will always have leading zeros If the item being read by the Master ALFAT can change then curly brackets are used for that item For example using the Read command and some of its associated dialog 1 Syntax of the command R sP hMf ccccccec r An example of the command string R 5W 00000002 followed by a line feed The string R 5W gt 2 is equivalent to R 5W gt 00000002 2 Syntax of returned file contents stream of cccccccc bytes aaaaaaaa lt LF gt For the Read command abov

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