EDK2239 User Manual
Contents
1. OOO PRXD nm 5 po x HITACHI 3 A 5 gt ms DRXD gt Microprocessor Switch Switch D o RXDISn w 1 B DCTS E DRTS 4 p SRAM D ej o c 9 Way QO o TU 3 O 2 4 5 N D Type O o Umm ci 2 i CJ4 NOS cj DASEIN qm N T 3 6 9 10 12 1 I 12 3 12 3 1 2 3 1 2 3 Jumper Jumper Jumper Jumper D 1 2 3 1 2 3 1 123 123 FIGURE 5 1 JUMPER CONFIGURATION The following tables define each jumper and its settings 5 2 UsER MODE SETTINGS CJ5 CJ5 is used to set the operating mode of the microcontroller These jumpers must be fitted at all times to ensure correct operation of the EDK Jumper Function Setting 1 2 Setting 2 3 CJ 5 A J Default 2 3 User Mode Setting Bit 0 pulled High pulled Low CJ 5 B Default 1 2 User Mode Setting Bit 1 MDI pulled High MDI pulled Low CJ 5 Default 2 3 User Mode Setting Bit 2 MD2 pulled High MD2 pulled Low eren User Mode Setting Bit 3 MD3 pulled High MD3 pulled Low Default 1 2 pulled mig TABLE 5 1 USER MODE JUMPER SETTINGS DEFAULT SETTINGS2. or provide an external clock source When providing an oscillator module or external source it is highly recommended that the load capacitors for the AT crystal are removed from the PCB These are physically placed within the PCB outline of the oscillator module for easy location and to ensure they are removed when using this option When changing the crystal frequency the pre loaded debugging monitor will not function In this situation the user is responsible for providing code to evaluate the device away from the default operating speed 4 2 3 REMOVABLE COMPONENT INFORMATION This information is provided to allow the replacement of components removed from the board as described in section 4 2 2 Component Cct Ref Value Rating Manufacturer Load Resistor X2 R8 IMQ 0805 1 Welwyn WCR Series Load Resistor X3 R7 IMQ 0805 1 Welwyn WCR Series Load capacitors X2 2 22 0603 10 25 0603 3 220 Load capacitors X3 C3 C4 15 0603 10 25 AVX 06033 150 TABLE 4 3 REMOVABLE COMPONENT INFORMATION Care must be taken not to damage the tracking around these components Only use soldering equipment designed for surface mount assembly and rework 4 3 SRAM Provision has been made for a 4MBit SRAM device on the board allowing 256kx16 operation Please refer to the schematic for details of the components to be fitted for external SRAM functionality SCI2 used as the
3. BOLD The default settings indicated in bold text place the microcontroller into Mode 6 5 3 EDK OPTIONS CJ4 The EDK options provide access to commonly used features of the EDK range These jumpers must be fitted at all times to ensure correct operation of the EDK Jumper Function Setting 1 2 Setting 2 3 Default 2 3 Source CJ 4 A Serial Receive Disables the RS232 receive signal to enable the use of the Flash Programming Header Enables the RS232 receive signal The Flash Programming Header must not be used in this state Disables the Flash write hardware Enables the Flash write hardware CJ 4 B E min protection protection Default 2 3 od The flash can be overwritten in The flash cannot be overwritten in User Mode User Mode CJ 4 C Chip select Connect CSn of the SRAM to PG3 Isolate and pull high CSn of the Default 2 3 Enable of the H8S 2239 SRAM CJ 4 D Not Fitted Not Used See section 5 5 TABLE 5 2 BOARD OPTION JUMPER SETTINGS DEFAULT SETTINGS IN BOLD The following table lists the connections to each jumper pin Pin Net Name Description 1 UVCC Microcontroller Supply Voltage 2 RXDISn Disable Flash Header functions Pulled low Enables RX232 3 No Connection No Connection 4 UVCC Microcontroller Supply Voltage 2 UPM CPLD Controlled option to set Flash Write FW Pulled low 6 No Connection No Connection
4. EDK2239 USER MANUAL FOR 85 2239 ON CHIP FLASH MICROCONTROLLER Cautions 1 This document may be wholly or partially subject to change without notice 2 All rights reserved No one is permitted to reproduce or duplicate in any form a part or this entire document without Hitachi Micro Systems Europe Limited s written permission Trademarks General All brand or product names used in this manual are trademarks or registered trademarks of their respective companies or organisations Specific Microsoft MS and MS DOS are registered trademarks and Windows and Windows NT trademarks of Microsoft Corporation Document Information Product Code 0004183_11 Version 1 0 Date 20 11 2002 Copyright O Hitachi Micro Systems Europe Ltd 1995 2002 All rights reserved Global http Awww hitachisemiconductor com Europe http Avww hmse com 21 2 2 2 3 3 1 4 1 4 2 4 3 4 4 4 5 4 6 5 1 5 2 5 3 5 4 5 5 5 6 6 1 6 2 7 1 7 2 TABLE OF CONTENTS TABLE OF CONTENTS je G 3 START UP INSTRUCTIONS 4 INSTALLING THE EVALUATION DEVELOPMENT KIT 4 SERIAL CONNECTION L ettet mme et erue caia mutet re eed ut de edad 4 POWER SUPP Y atteint eet me tatit idt aig eed ote ent 4 EDK BOARD LAYOUT MED
5. 7 PG3 Port G3 of the H8S 2239 CS1 8 CSn Chip select of the SRAM and a 4K7 pull up 9 No Connection No Connection 10 No Connection No Connection 11 No Connection No Connection 12 No Connection No Connection 10 5 4 SERIAL PORT SELECTION The programming serial port is connected to the RS232 connector by default This allows direct programming of the EDK using the supplied software tools A secondary serial port is available on the microcontroller and can be connected to the RS232 connector by changing some board option links The additional port option allows the user to write messages or connect to other devices via the serial port while programming support is provided by the Flash programming header The following surface mount zero ohm link settings are fitted by default and connect the RS232 header to the programming serial port of the microcontroller Zero ohm Default Function Microcontroller Link ID Port Pin CR20 Fitted Transmit data from EDK PAI CR23 Fitted Receive data to EDK PA2 CRI9 Not Fitted Alternate Transmit data from EDK P30 CR22 Not Fitted Alternate Receive data to EDK P31 TABLE 5 3 OPTION LINKS DEFAULT SETTINGS To enable the use of this alternate port the user must change the settings to those in the following table Zero ohm Default Function Microcontroller Link ID Port Pin CR20 Not Fitted Transmit data from EDK PAI CR23 Not Fitte
6. 5 EDK BLOCK DIAGRAM deter er e Ui wa rc a AE rete c e EP pen 5 Nslw ome E 6 USER INTERFACE te c gea reta d be d b ri nt 6 SERIAL INTERFACE teet rre redo dicenda aab eo e n ente d cn peto 6 SRAM 7 MEMORY e esee te evt e ett ende a d edu ore nga 8 SRAM ACCESS TIMING 2 rti tr te rtt Pu tero sides edle ve td tp ba inet trn cR edat 8 aaa teta mto tdeo a eau dde een aa mui cS EE E 8 piu rre 9 JUMPER INKS S ote be tete qtti iato taa led nd i tede 9 USER MODE SETTINGS CJS ctt ctn tt a dt dte tt tdt ecd 10 EDICOPTIONS CA eset dante eee men ne dade dete dera 10 SERIAL PORT SEEECTION ctor ee macte mite ni 11 FLASH PROGRAMMING HEADER I nn tentent 11 BOOT CONTROL a eter erc eden t een etin te de ti te red dene 12 MICROCONTROLLER HEADER CONNECTIONS eene sn seta tensa sensato 13 HEADER c aga tec th Dag teen 13 HEADER J2 d eet n dede i Dedi ia te t e 14 GODE DEVELOPMENT D 15 AMON e 15 2 START UP INSTRUCTIONS 2 1 INSTALLING THE EVALUATION DEV
7. Symbol Device No pin No pin 1 STBY STBYn 61 2 UVCC 62 3 RES RESn 59 4 NMI NMIn 60 5 OSC2 CON_OSC2 57 6 OSCI CON OSCI 58 7 55 8 MDI MDI 56 9 Vref CON Vref 53 10 AVCC CON AVCC 54 11 P41 AN1 41 51 12 40 0 40 52 13 P43 AN3 P43 49 14 P42 AN2 42 50 15 45 5 45 47 16 P44 AN4 P44 48 17 P47 AN7 P47 45 18 P46 AN6 P46 46 19 P97 DA1 P97 43 20 P96 DAO P96 44 21 P17 TIOCB2 TCLKD P17 41 22 AVSS CON AVSS 42 23 PIS TIOCBI TCLKC DRTS 39 24 P16 TIOCA2 IRQI P16 40 25 P13 TIOCDO TCLKB 37 26 P14 TIOCA1 IRQO DCTS 38 A23 27 PII TIOCBO DACKI ULED2 35 28 P12 TIOCCO TCLKA A P12 36 21 22 29 PA3 A19 SCK2 PSCK 33 30 P10 TIOCA0 DACKO A_ ULEDI 34 20 31 PA1 A17 TxD2 PTXD 31 32 PA2 A18 RxD2 PRXD 32 33 7 15 5 PB7 29 34 0 16 0 30 35 5 13 4 5 27 36 6 14 5 6 28 37 PB3 A11 TIOCD3 PB3 25 38 PB4 A12 TIOCA4 PB4 26 39 PB1 A9 TIOCB3 23 40 2 10 2 24 41 7 7 7 21 42 0 8 0 22 43 5 5 5 19 44 PC6 A6 PC6 20 45 PC3 A3 PC3 17 46 PC4 A4 18 47 1 15 48 2 2 2 16 49 0 13 50 VSS Ground 14 13 6 2 HEADER J2 J2 Pin Function EDK Symbol Device Pin Function EDK Symbol Device No pin No pin 1 XTAL CON XTAL 63
8. default serial port for the EDK shares the upper two address lines 17 amp A18 These may be isolated from the SRAM by not fitting OR links R20 amp R23 and pulling up the address lines on the SRAM using 4K7 resistors R21 amp R22 This allows for a 64k x 16 configuration Alternatively the device may be programmed using SCI2 but configured to use the debug serial port SCIO as detailed in section 5 4 for access to the full address range 256k x 16 The SRAM when fitted is connected to Chip Select 1 651 which can address the range H200000 H27FFFF The usable address range without modifying the board jumpers mentioned is H 200000 H 21FFFF 4 4 MEMORY Table 4 4 illustrates the EDK memory map for mode 6 Section Start Section Allocation Section End 0000 0000 0005 0006 0000 RESERVED H 001F FFFF 0020 0000 SRAM A1 A18 Area 1 controlled by CS1 H 0027 FFFF H 0028 0000 RESERVED 6FFF 7000 EFBF EFCO RESERVED H FFFF F7FF H FFFF F800 Internal I O Registers H FFFF FF3F H FFFF FF40 RESERVED H FFFF FF5F H FFFF FF60 Internal I O Registers H FFFF FFBF H FFFF FFCO On Chip RAM H FFFF FFFF TABLE 4 4 MEMORY MAP DEFAULT MODE 2 4 5 SRAM ACCESS TIMING External access timing is defined by several registers
9. t SRAM Programming amp Comms 07777777 Microprocessor LEDs User1 Power amp amp User2 Boot FIGURE 3 2 EDK BLOCK DIAGRAM 4 EDK OPERATION 4 1 USER INTERFACE The EDK provides three buttons for influencing the operation of the board The purpose of each button is clearly marked next to it Refer to the board layout for positions Section 3 1 Reset Switch This button provides the microcontroller with a timed reset pulse of at least 250mS 2 BootSwitch This button toggles the operating mode of the microcontroller A complete description of this function is given in section 5 6 3 NMI Switch This button provides a de bounced signal to the microcontroller for each operation of the button There is no minimum or maximum activation time for this button 4 2 SERIAL INTERFACE The serial interface on the EDK board has several functions The serial port on the microcontroller directly supports three wire serial interfaces Options are provided on the board for the user to write handshaking routines using standard port pins Other board option links allow users to control the entry and exit from boot mode using the same handshaking signals Refer to section 5 for details on setting serial interface options 4 2 1 CONNECTOR PIN DEFINITIONS The EDK RS232 interface conforms to Data Communication Equipment DCE format allowing the use of 1 1 cables when connected to D
10. 2 VSS Ground 64 3 EXTAL CON EXTAL 65 4 FWE FW 66 5 MD2 MD2 67 6 PF7 o PF7 68 7 PF6 AS PF6 69 8 PF5 RD 5 70 9 PFA HWR 4 71 10 PF3 LWR IRQ3 ADTR PF3 72 G 11 PF2 WAIT PF2 73 12 PFI BACK BUZZ 1 74 13 PFO BREQ IRQ2 75 14 P30 TxDO DTxD 76 15 P31 RxDO DRxD 77 16 P32 SCKO SDAl IRQ4 P32 78 17 P33 TxD1 SCL1 P33 79 18 P34 RxD1 SDA0 P34 80 19 P35 SCKl SCLO RQ P35 81 20 P36 P36 82 5 21 P77 TxD3 P77 83 22 P76 RxD3 P76 84 23 P75 TMO3 SCK3 P75 85 24 P74 TMO2 MRES P74 86 25 P73 TMOI TENDI C P73 87 26 P72 TMOO TENDO CS6 P72 88 S7 27 P7I TMRD3 TMCD3 71 89 28 P70 TMRIO1 TMCIO1 D P70 90 DREQ1 CS5 REQO CS4 29 PGO IRQ6 PGO 91 30 PG1 CS3 IRQ7 PGI 92 31 PG2 CS2 PG2 93 32 PG3 CSI PG3 94 33 PG4 CSO PG4 95 34 PE0 D0 PE0 96 35 PEI DI PEI 97 36 PE2 D2 PE2 98 37 PE3 D3 PE3 99 38 PE4 D4 PE4 100 39 5 05 5 1 40 PE6 D6 PE6 2 4l PE7 D7 PE7 3 42 D8 PDO PDO 4 43 D9 PDI PDI 5 44 D10 PD2 PD2 6 45 D11 PD3 PD3 7 46 D12 PD4 PD4 8 47 D13 PD5 5 9 48 D14 PD6 PD6 10 49 D15 PD7 PD7 11 50 NC12 12 14 7 DEVELOPMENT 7 1 HMON 7 1 1 MopE SUPPORT The HMON library is built to support Advanced Expanded Mode only The Device supports Modes 6 and 7 7 1 2 BREAKPOINT SUPPORT The monitor utilises the PC Break Controller for code located in ROM allowing a single breakpoint to be set in the code Code located in RAM may have multiple breakpoints limited only by the size of the On Chip RAM 7 1 2 1 CODE LOCATED IN FL
11. 5 6 Note These setting pairs are exclusive If CR12 and are fitted CR16 and CR13 must not be fitted If CR16 and CR13 are fitted CR12 and must not be fitted 5 5 FLASH PROGRAMMING HEADER The Flash Programming header is used with the Hitachi Flash Debug Board FDB The FDB is a USB based programming tool for control and programming of Hitachi microcontrollers available separately from Hitachi This header provides direct access for the FDB to control the EDK microcontroller To utilise this header the user must make the following changes to the board configuration 1 Disable the RX232 signal from the RS232 transceiver Jumper link CJ4 A is provided for this purpose Please refer to section5 3 2 Disable User Program Mode using jumper CJ4 B Please refer to section5 3 Caution Do not operate the board with the user mode jumpers removed and the FDB disconnected as the microcontroller mode pins will float to an indeterminate state This may damage the microcontroller device 5 6 Boot CONTROL The method for placing the microcontroller device in to Boot mode for reprogramming has been incorporated into a complex programmable logic device CPLD This is not necessary for most user designs but allows a measure of increased flexibility for the EDK designs Mode transitions including boot mode transitions only require the reset to be held active while the mode settings are presented On releasing reset the microcontr
12. ASH ROM Double clicking in the breakpoint column in the code sets the breakpoint Adding a further breakpoint elsewhere in the code removes the previous one 7 1 2 2 CODE LOCATED IN RAM Double clicking in the breakpoint column in the code sets the breakpoint Breakpoints will remain unless they are double clicked to remove them 7 1 3 CODE SIZE HMON is built along with the debug code Certain elements of the HMON code must remain at a fixed location in memory The following table details the HMON components and their size and location in memory For more information refer to the map file when building code Section Description Start Location Size H bytes RESET VECTOR HMON Reset Vector Vector 0 000000000 4 Required for Startup of HMON TRAP VECTORS Trap Vectors Vector 8 9 10 11 H 00000020 10 Required by HMON to create Trap Breakpoints in RAM HW BREAK VECTORS HMON Break Controller Vector 27 0000006 4 Required by HMON to create Breakpoints in SCI VECTORS HMON Serial Port Vectors Vector 88 89 90 H 00000160 C Used by HMON when EDK is configured to connect to the default serial port PHMON HMON Code 00003000 24CE CHMON HMON Constant Data 000054CE 148 BHMON HMON Uninitialised data 00 000 20 FDTInit FDT User Mode Kernel 00001000 This is at a fixed location and must not be moved Should the kernel need to be mov
13. Actual ERR BRR Actual ERR BRR Actual ERR BRR Actual ERR Baud setting Rate setting Rate 90 setting Rate setting Rate 110 invalid invalid invalid invalid invalid invalid invalid 64 110 77 300 Jinvalid invalid invalid invalid invalid invalid 300 0 00 300 1200 invalid invalid 1200 0 00 1200 000 5 1200 2400 2400 0 00 2400 0 00 2400 000 2400 4800 4800 0 00 4800 000 15 4800 0 00 3600 9600 9600 0 00 9600 0 00 2 9600 0 00 invalid Invalid 19200 19200 0 00 19200 0 00 1 14400 2500 invalid Invalid 38400 38400 0 00 38400 0 00 invalid invalid invalid invalid invalid 57600 57600 0 00 57600 0 00 invalid invalid invalid invalid invalid 115200 115200 0 00 115200 0 00 invalid invalid invalid invalid invalid 230400 230400 0 00 invalid invalid invalid invalid invalid invalid invalid 460800 460800 0 00 invalid invalid invalid invalid invalid invalid invalid TABLE 4 2 CRYSTAL FREQUENCIES FOR RS232 COMMUNICATION Note The device used to convert the RS232 serial information to logic signals for the microcontroller is limited to 120kBaud The rates above this level can only be utilised if the user provides direct logic level communications The user may replace the HC49 U surface mounted AT cut crystal with another of similar type within the operating frequency of the microcontroller device Please refer to the hardware manual for the microcontroller for the valid operating range Alternatively the user may fit an oscillator module
14. ELOPMENT Kir EDK Please refer to the quick start guide provided for initial installation of the EDK A copy of the quick start guide and other information relating to this EDK at http www hmse com products edk support Installing the EDK requires power and serial connection to a host computer 2 2 SERIAL CONNECTION The serial communications cable for connecting the EDK to a host computer is supplied The serial cable has 1 1 connectivity Figure 2 1 shows how to connect the EDK to a PC or notebook computer equipped with a nine pin D connector HOST PC EDK lt 3 3 lt 2 2 gt 5 5 FIGURE 2 1 SERIAL CONNECTION TO PC NOTEBOOK WITH DB 9 CONNECTOR SUPPLIED 2 3 POWER SUPPLY The EDK hardware requires a power supply of 5V Since total power consumption can vary widely due to external connections port states and memory configuration use a power supply capable of providing at least 500mA at 5V DC 5 The design is specified for evaluation of the microcontroller and so does not include circuitry for supply filtering noise reduction under voltage protection over current protection or reversed polarity protection Caution should be used when selecting and using a power supply The power connector on the EDK is a 2 5mm Barrel connector The center pin is the positive connection OV e 5 FIGURE 2 2 POWER SUPPLY CONNECTION Caution Existi
15. allowing different types of devices to be addressed The registers for the selection of wait states and signal extensions are given below with recommended values for the EDK Register Address Recommended Function Setting for EDK ABWCR FFFEDO H FD Enables 16 bit access to area 1 ASTCR FFFEDI H FF 3 State access WCRH FFFED2 H FF 3 Wait state access WCRL FFFED3 H FF 3 Wait state access PFCR FFFDEB H 09 Enables A16 to used when SCI2 is used PFCR FFFDEB Enables A18 to used when SCI2 is not used TABLE 4 5 SRAM ACCESS CONTROL REGISTERS Please refer to the hardware manual for the microcontroller for more information on these register settings 4 6 LEDs The EDK has four red LEDs The function of each LED is clearly marked on the silk screen of the PCB Please refer to the board layout diagram for position information Section 3 When the board is connected to a power source the Power PWR led will illuminate The Boot mode indication LED will illuminate when the microcontroller has been placed into Boot mode Please see section 2 for more details of this function There are two LEDs dedicated for user control these are marked USR1 and USR2 Each LED will illuminate when the port pin is in a logical high state The user LEDs are connected to the following ports LED Port Microcontroller Pin Functions on Port Pin Identifier Pin Pin USRI P10 34 P10 TIOCA0 DACK0
16. ata Terminal Equipment DTE such as an IBM PC The cable used to connect to the EDK will affect the available board options A fully wired cable can allow handshaking between the microcontroller and the host PC subject to setting the board options and the availability of suitable host software Handshaking is not supported as standard on the microcontroller so for normal use a minimal three wire cable can be used The minimum connections are unshaded in the following table EDK DB9 Signal Host DB9 Connector Pin Connector Pin No Connection EDK Tx Host Rx EDK Rx Host Tx No Connection Ground No Connection EDK CTS Host RTS EDK RTS Host CTS No Connection S WO CO NID MN S o TABLE 4 1 RS232 INTERFACE CONNECTIONS These are not connected on the EDK by default See section 5 4 for more details i e 95 o o o o je 09 amp Oo FIGURE 4 1 EDK SERIAL PoRT PIN NUMBERING 4 2 2 CRYSTAL CHOICE The operating crystal frequency has been chosen to support the fastest operation with the fastest serial operating speeds The value of the crystal is 14 745 2 The following table shows the baud rates and Baud Rate Register BRR setting required for each communication rate using the above default operating speed It also confirms the resultant baud rate and the bit error rate that can be expected Setting BRR
17. d Receive data to EDK PA2 CRI9 Fitted Alternate Transmit data from EDK P30 CR22 Fitted Alternate Receive data to EDK P31 TABLE 5 4 OPTION LINKS ALTERNATE SERIAL PORT The user may implement a handshaking protocol on the EDK This is not supported with the software tools supplied To support this option two spare port pins have been allocated on the microcontroller Using these port pins the CTS and RTS lines of the host serial interface can be controlled The user may also control the operation of the board via the same handshaking lines This is not supported with the software tools supplied but may be written by the user Using the CTS line the user may simulate pressing the boot button see section 5 6 This will cause the EDK to swap into and out of Boot mode on each low level activation of CTS Feedback of the current mode is provided on the RTS line A high level indicates boot mode and a low level indicates user mode The following settings are made by default and ensure that there are no conflicts on unnecessary microcontroller pins Zero ohm Default Function Microcontroller Link ID Port Pin 12 Not Fitted Mode State out from EDK N A From CPLD CR7 Not Fitted Change Mode request to EDK N A From CPLD CRI6 Not Fitted Alternate RTS232 Ready to send from EDK 15 CR13 Not Fitted Alternate CTS232 Clear to send to EDK P14 TABLE 5 5 OPTION LINKS SERIAL PORT CONTROL See section
18. e relevant control input in the active state When released the timer will extend the reset for approximately 500mS The states are split into two functions one for User mode and one for Boot mode The first state of each is used to hold the reset line active When the timer expires then the second state is used to hold the device in the selected mode and wait for an external control signal to either move back into the user reset state or into the boot reset state 5 6 2 STATE DIAGRAM Boot Mode Controller Positive Logic a Y M CTS BootSw Res 2 wait iting n KA X N 8 mL A Boot N N p DITE Res al Reset Timer N P S lt o a Res Res 7 E uf Clocked Transitions IRes Reset y 27 UR Res usingNES55 gt 7 4 Al solid transition 4 lines 7 N 27 4 Pa Z lt _ v 4 BootSW ResSw CTS BootWaiting sss IRes Ses A Ns E FIGURE 5 2 CPLD STATE DIAGRAM 6 MICROCONTROLLER HEADER CONNECTIONS The following table lists the connections to each or the headers on the board 6 1 HEADER J1 J1 Pin Function EDK Symbol Device Pin Function EDK
19. ed it must be re compiled FDTUserModeMicroKernel FDT User Mode Kernel 0005F600 80A This is at a fixed location and must not be moved Should the kernel need to be moved it must be re compiled CUser Vectors Pointer used by HMON to point to the start of user code H 00002000 4 This is at a fixed location and must not be moved for the Reset CPU and Go Reset commands to function 15 MEMORY H 00000000 H 00001000 H 00001119 H 00002000 H 00002003 H 00003000 H 00005615 H 0005F600 H 0005FE09 H 0005FFFF H 00200000 H 0027FFFF H OOFF7000 H OOFFBOOO H OOFFB20E H OOFFEDBO H OOFFEFAF H OOFFEFBF H OOFFF800 H OOFFFF40 H OOFFFF60 H OOFFFFCO H OOFFFFFF Vectors FDTInit CUser Vectors PHMON CHMON On Chip FLASH ROM FDTUserModeMicr oKernel when fitted On Chip RAM BHMON Stack Internal I O REGISTERS Internal I O REGISTERS On Chip RAM RESET Vector TRAP Vectors HW Break Vector SCI Vectors H 00000000 H 00000003 H 00000020 H 0000002F H 0000006C H 0000006F H 00000160 H 0000016B 16 7 1 5 BAUD RATE SETTING HMON has initially set to connect at 115200Baud Should the user wish to change this the value for the BRR in HMONserialconfiguser c will need to be changed and the project re built Please refer to the HMON User Manual f
20. n A20 USR2 Pll 35 P11TIOCB DACK1 A21 TABLE 4 6 LED PORT CONNECTIONS 5 BOARD OPTIONS The EDK has a number of configuration settings set by jumpers CJ4 B C D CJ5 B C D and zero ohm links Common EDK functions can be set using the jumpers as described in sections 5 3 and 5 2 The additional zero ohm links provide additional features that may be required to interface with other systems All the Jumper link settings are three pin options There are four sets of options on each header The headers are numbered from 1 to 12 with pin 1 marked on the PCB by an arrow pointing to the pin The diagram below shows the numbering of these jumper links and indicates jumpers fitted 1 2 for each three pin jumper 5 1 JUMPER LINKS MD4 FLASH 9 NKIEEEFEEEFEFEFEFEFEFEFEFEEEEEEEEFEEEEEEEEDP Programming s o0000000CO0OCOCOCOCOO00CCOOCO0OCO00CCOCO0000 Power 3v3 O UVcc O GND O RESn NMI Switch mM Num o 5 ULEDI 8 c BOOT LED 5 sd Power LED 1 9 PEN User1 LED
21. ng customers using E6000 products note that the polarity of this board is opposite to that for the E6000 Use of the E6000 power supply with this board will damage both board and power supply 3 EDK LAYOUT The diagram shows a general layout of the EDK board NMI Switch 5 BOOT LED Power LED Ej User LED User2LED RESET Switch 9 Way D Type INE 3 1 O MD4 FLASH J1 000000000000000000000000000000000000 Programming 5 000000000000000000000000000000000000 O 3V3 O UVcc O GND Testpoints O O RESn o Fw O 9 o ULED1 ULED2 I ol o PTXD ooo o PRxD O RX232 O DTXD x BOOT o DRXD o Microprocessor B o DCTS O DRTS HB SRAM 5 9 ol mp2 a o csn J2 000000000000000000000000000000000000 000000000000000000000000000000000000 FIGURE 3 1 EDK BOARD LAYOUT EDK BLock DIAGRAM The diagram shows the connectivity of the components on the EDK board L L L 5V PSU Reset Boot NMI switches 5V Supply Control Logic amp 3V3 Regulator EDK specific A et RS232
22. oller will be in the required mode The logic design detects a power up event and provides a timed reset pulse to guarantee the reset of the device At the end of the rest pulse the processor will be placed in user mode and any code in the device will execute During user mode the NMI button can be pressed at any time This will provide a single de bounced NMI interrupt to the device Pressing the boot button will cause the boot mode controller to reset the device and during the reset period present the required mode settings to start the device in boot mode At the end of the reset period the boot mode settings will have been latched into the device which will then be ready to accept a boot mode connection via the RS232 interface or the flash programming header Pressing the boot button during a normal reset will not cause the EDK to enter boot mode The boot mode settings are fixed at mode 2 The required mode settings are made using a tri state capable buffer Note boot control device is programmed to support all possible EDK products For this reason the reset pulse is over 500ms Repetitive activation of either the Boot or Reset buttons will restart the reset timer and extend the reset period Pressing the boot button within the 500mS period of a reset will not cause the board to enter boot mode 5 6 1 CPLD The code is based upon a four state machine providing a guaranteed reset period which can be extended by holding th
23. or further information 7 1 6 INTERRUPT MASK SECTIONS HMON has an interrupt priority of 6 The serial port has an interrupt priority of 7 Modules using interrupts should be set to lower than this value 6 or below so that serial communications and debugging capability is maintained 7 2 ADDITIONAL INFORMATION For details on how to use Hitachi Embedded Workshop HEW with HMON refer to the HEW manual available on the CD or from the web site For information about the H8S 2239 series microcontrollers refer to the H8S 2239 Series Hardware Manual For information about the H8S 2239 assembly language refer to the H8S Series Programming Manual Further information available for this product can be found on the HMSE web site at http www hmse com products support htm General information on Hitachi Microcontrollers can be found at the following URLs Global www hitachisemiconductor com Europe www hmse com
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