HOT-557 Version 1.32 - Chebucto Community Net
Contents
1. er User s Manual 11 Pipeline Burst Type Cache Size Selection JP29 JP30 HOT 557 mainboard supports 256KB or 512KB pipeline burst cache If the HOT 557 15 ordered with no cache installed the cache can be field upgraded by installing a primary 256KB pipeline burst cache module into the CELP socket If factory option on HOT 557 mainboard integrate 256KB pipeline burst cache onboard already the cache size can be field upgraded to 512KB by installing a secondary 256KB pipeline burst cache module into the CELP socket 1 2 3 256 29 On mainboard integrate 256KB pipeline burst cache mounted or a primary 256KB pipeline burst cache module in the CELP socket 1203 512 JP29 JP30 On mainboard integrate 256KB pipeline burst cache mounted and a secondary 256KB pipeline burst cache module in the CELP socket Note There are some technical difference between the primary 256KB pipeline burst cache module and secondary one if 512KB cache memory are required please contact your supplier for help User s Manual 12 Flash EPROM Jumper JP19 HOT 557 mainboard supports two types of flash EPROM 5 volt and 12 volt By setting up jumper JP19 you can update both types of flash EPROM with new system BIOS files as they come available JP19 Pin 2 3 Close for 5V Pin 12. 34 User s Manual 3 Preface HOT 557 mainboard is a highly integrated IBM PC AT compatible system board The design will accept Intel Pentium Cyrix IBM 6x86 L and AMD K5 processors and also features high performance pipeline burst secondary cache memory support with size of 256KB and 512KB The memory subsystem is designed to support up to 128 MB of EDO RAM Standard Fast Page DRAM and SDRAM in standard 72 pin SIMM socket and 168 pin 3 3 V DIMM socket A type 7 Pentium processor socket provides access to future processor enhancements HOT 557 provides a new level of I O integration Intel s 82430VX PCIset chipset provides increased integration and improved performance over other chipset designs The 82430V X PCIset chipset provides an integrated Bus Mastering IDE controller with two high performance IDE interfaces for up to four IDE devices The onboard Super I O controller provides the standard PC I O functions floppy interface two FIFO serial ports an IrDA device port and a SPP EPP ECP capable parallel port Up to four PCI local bus slots provide a high bandwidth data path for data movement intensive functions such as graphics and up to three ISA slots complete the I O function The HOT 557 provides the foundation for cost effective high performance highly expandable platforms which deliver the latest in Pentium processor and I O standard User s Manual 4 Chapter 1 Introduction
3. s est User s Manual 7 iH CPU Clock Speed Selection HOT 557 mainboard features a clock generator to provide adjustable system clock frequency JP36 is a 6 pin jumper that determine the system clock frequency from 50 MHz to 66 MHz HOT 557 mainboard also provides Jumpers JP23 and JP24 to figure the CPU core clock multiplier By inserting or removing jumper caps on JP23 and JP24 the user can change the Host Bus Clock CPU Core Clock ratio from 1 1 5 to 1 3 Intel Pentium Processor 66 MHz qus JP36 150 MHz 60 MH es JP23 JP24 Em 00 00 JP36 ARN N JP36 p je gt JP36 00 133 MHz 66 MHz p JP24 N P36 0 Ca 236 00 100 MHz 66 MHz 2 JP23 JP24 90 MHz 60 MHz 1 5 X e 81 23 24 75 MHz 50 MHz M 1 5 X e 557 Version 1 32 supports 55 Pentium with MMX 166 MHz 1 Systemclock and Clock Multiplier like P54C 166 MHz 2 Dual voltage configuration Vcore 2 8V Vio 3 3V 3 Bios 55XWUQ O07 or higher JP23 JP24 15x JP36 im it User s Manual 8 AMD K5 Processor System Clock Clock Multiplier CPU Type JP36 JP23 JP24 PR166 JP23 JP24 116 7 MHz 86 MHz 1 75 x PR150 105 MHz 90 MHz PR133 100 MHz PR120 90 MHz PR100 100 MHz 868 MHz PR90 90 MHz P36 0 gt JP23 JP24 ISX JP36 e e ARN N 16 gt JP23 JP24 JP23 JP24 1 5 x
4. o o e I I N JP36 e e Ca JP23 JP24 1 5 x JP36 JU aA Pn JP23 JP24 1 5 x N JP36 e e JP23 JP24 o e e I I 2 1 5 x 6 N Cyrix IBM 6x86 6x86L System Clock Clock Multiplier JP36 JP23 JP24 9l 75 no CPU Type P166 JP23 JP24 133 MHz 88 MHz 2 mme P1504 JP23 JP24 120 MHz 60 MHz 2x wel 3736 N P1 JP23 JP24 55 MHz 2x Ime fl CN RI 120 JP23 JP24 100 MHz 0 MHz re ae DT User s Manual 9 Onboard Regulator Output J100 J101 J102 J107 HOT 557 mainboard is designed with dual onboard voltage regulator to provide single 3 3V voltage V i102 Vcons for Intel Pentium P54C 3 5V for Cyrix IBM 6x86 and AMD KS processors and also provide dual 3 3 2 8V voltage Vio Vcore separated for Intel P55C Cyrix IBM 6x86L and AMD future processors Note Jumper J107 is factory reserved for future usage and default to open Single Voltage Output Voltage no 3 4 3 4 3 4 1 2 1 2 35 5 3 4 3 4 3 4 m sger User s Manual 10 Dual Voltage Output Vio Vcore separated Vio Vcore 101 102 Output 210 Output 3 2 V 5 2 5 V 5 3 3 V 5 2 7 V 5 2 8 V 5 2 4 2 9 V 5 3 45 V 5 1 3 3 5 V 5 f 3 6 V 5 3 0 V 5 3 8 V 5 3 2 V 5 u
5. This booklet is available from the U S Government Printing Office Washington DC 20402 Stock 004 000 00345 4 FCC Warning The user is cautioned that changes or modifications not expressly approved by the manufacturer could void the user s authority to operate this equipment Note In order for an installation of this product to maintain compliance with the limits for a Class B device shielded cables and power cord must be used CE Notice Following standards were applied to this product in order to achieve compliance with the electromagnetic compatibility Immunity in accordance with EN 50082 1 1992 Emmitions in accordance with EN 55022 1987 Class B NOTICE Copyright 1997 All Right Reserved Manual Ver 1 4 All information documentation and specifications contained in this manual are subject to change without prior notification by the manufacturer The author assumes no responsibility for any errors or omissions which may appear in this document nor does it make a commitment to update the information contained herein TRADEMARKS Intel is a registered trademark of Intel Corporation Pentium Processor is a registered trademark of Intel Corporation PC AT is a registered trademark of International Business Machine Corporation PS 2 is a registered trademark of IBM Corporation All other brand and product names referred to in this manual are trademarks or registered trademarks of their respective holders TA
6. pin DIMM sockets that make it possible to install up to 128MB of RAM The SIMM socket support 4MB 8MB 16MB and 32MB SV single or double side fast page or EDO DRAM modules and DIMM socket support 8MB 16MB 3 3V single or double side SDRAM fast page or EDO modules Caution The user should not populate both 5V SIMM modules amp 3 3V DIMM modules at the same time The four SIMM sockets are arranged in two banks of two sockets each the two DIMM socket are also arranged in two banks of one socket each Each bank provides a 64 72 bit wide data path Both SIMMs in a bank must be of the same memory size and type although the different types of memory may differ between banks It is possible to have 70 ns fast page DRAM in one bank and 60 ns EDO DRAM in the other The memory configuration tables on next two pages liste the SIMMs and DIMMs memory configuration 1 User s Manual 15 Table 3 1 Memory Configuration Table For SIMMs User s Manual 16 Table 3 2 Memory Configuration Table For DIMMs 1 User s Manual 17 EE Award BIOS Setup HOT 557 BIOS ROM has a built in Setup program that allows users to modify the basic system configuration This type of information is stored in battery backed RAM so that it retains the Setup information when the power is turned off Entering Setup Power on the computer and press Del immediately will allow you to e
7. system OS Select For DRAM 64MB This item allows you to access the memory that over 64 MB in OS 2 Video BIOS Shadow XXXXX XXXXX Shadow These items determine whether Video BIOS or optional ROM will be copied to RAM User s Manual 24 Chipset Features Setup ROM PCI ISA BIOS 2659GH21 CHIPSET FEATURES SETUP AWARD SOFTWARE INC Auto Configuration Enabled Delayed Transaction Disabled DRAM Timing 70 ns DRAM RAS Precharge Time DRAM R W Leadoff Timing Fast RAS To CAS Delay DRAM Read Burst EDO FP x2227x333 DRAM Write Burst Timing x333 Fast MA to RAS Delay CLK 1 Fast EDO Path Select Disabled Refresh RAS Assertion 5 Clks ISA Bus Clock PCICLK 4 SDRAM CAS Lat RAS to CAS 3 3 System BIOS Cacheable Disabled Video BIOS Cacheable Disabled 8 Bit 1 0 Recovery Time 3 Quit 19 Select Item 16 1 0 Recovery Time 2 Help PU PD Modify Memory Hole At 15M 16M Disabled Old Values Shift F2 Color Peer Concurrency Enabled Load BIOS Defaults Passiue Release Enabled Load Setup Defaults Auto Configuration This item auto configure the following items DRAM RAS Precharge time DRAM R W Leadoff Timing Fast RAS to CAS Delay DRAM Read Burst DRAM Write Burst Timing Fast MA to RAS Delay CLK Fast EDO Path Select Refresh RAS Assertion and ISA Bus Clock by different system clock DRAM Timing This item set the DRAM Read Write timings that the system
8. that Drive A will function as Drive B and Drive B as Drive A Boot Up Floppy Seek During POST BIOS will determine if the floppy disk drive installed is 40 or 80 tracks User s Manual 23 Boot Up NumLock Status When this option enables BIOS turns on Num Lock when system is powered on so the end user can use the arrow keys on both the numeric keypad and the keyboard Boot Up System Speed This option sets the speed of the CPU at system boot time The settings are High or Low Gate A20 Option When this item sets to Normal the A20 signal is controlled by keyboard controller When this item sets to Fast the A20 signal is controlled by post 92 or chipset specific method Security Option This item allows you to limit access to the system and Setup or just to Setup When System is selected the system will not boot and access to Setup will be denied if the correct password is not entered at the prompt When Setup is selected the system will boot but access to Setup will be denied if the correct password is not entered at the prompt PS 2 Mouse Control Function This item to set the PS 2 mouse be used or not If there a PS 2 mouse attached to your system this item must be enabled if not please disabled this item to release IRQ12 for PCI device PCI VGA Palette Snoop This item must be set to enabled if there is a MPEG ISA card installed in the system and disabled if there is no MPEG ISA card installed in the
9. 2 Close for 12V BIOS UPGRADES Flash memory makes distributing BIOS upgrades easy A new version of the BIOS can be installed from a diskette Please note the following when making the BIOS updates Flash utility can t work under protected virtual mode Memory manager like QEMM 386 EMM386 should not be loaded or Simply bypass all config sys and autoexec bat on system boot up Flash utility supports both 5V and 12V Flash EEPROM Clear CMOS JP21 HOT 557 mainboard supports jumper JP21 for discharging mainboard s CMOS memory The CMOS memory retains the system configuration information in the component of R T C You should short this jumper for a moment when you wish to clear CMOS memory and then make sure open this jumper for normal operation to retain your new CMOS data Note Clear CMOS amp R T C function is available only when DS12887A DS12B887 is in use There are different ways to discharge CMOS memory between DS12887A and DS12B887 DS12887A Turn off power close jumper JP21 for 2 to 3 seconds then release and CMOS will be discharged DS12B887 Close jumper JP21 turn on power for 2 to 3 seconds then release JP21 and turn off power CMOS will be discharged m sger User s Manual 13 Clear Password JP9 Allows system password to be cleared by shorting jumper JP9 and turning the system on Password is cleared by jumper JCP message will be show
10. BLE OF CONTENTS luy le e e 4 CHAPTER INTRODUCTION ERE Xe VM SEMEN EYE ERE 5 M T iS 5 CHAPTER 2 HARDWARE CONFIGURATION sescssessssoessssesessessssesccsescssooees 7 Mp C oho cack cara rn 7 CPU Clock Speed Selection nie hin ee 8 Onboard Regulators Output J100 J101 J102 J107 _ 10 Pipeline Burst Type Cache Size Selection JP29 12 Flash EPROM Juniper S 13 Clear CMOS IP21 Ui eps a Prou edd 13 Cleat Password JPI 14 Connectors K So KETS ete Aa ede be Fea 14 CHAPTER 3 MEMORY CONFIGURATION eese esee een seen natns asta naso 15 CHAPTER 4 A WARD BIOS eene 18 The Main ote te etel rm edo mand 19 Standard C MOS Set p e Endet ids 21 BIOS Peatires Setup obti t bito ce E 23 Chipset Features Setup vedete reiner 25 Power Management Hd 28 PCI Configuration Sep Dra re ee ee E PH eate 30 Integrated Per Petals 5 rtis te 32 Password Setting
11. Ds IRQS LPT 2 OFF IRQ6 Floppy Disk OFF Doze Mode Disable IRQ LPT 1 OFF Standby Mode Disable IRQ8 CRTC Alarm OFF Suspend Mode Disable 1899 CIRQ2 Redir OFF HDD Power Doun Disable 180919 Reserved OFF IRQ11 Reserved OFF Wake Up Events In Doze amp Standby IRQ12 PS72 Mouse OFF IRQ3 Wake Up Event ON IRQ13 Coprocessor OFF IRQ4 Wake Up Event ON IRQ14 Hard Disk OFF IRQ8 Wake Up Event ON IRQ15 Reserved OFF IRQ12 Wake Up Event ON ESC Quit 11 gt Select Item Fl Help PU PD Modify F5 Old Values Shift F2 Color F6 Load BIOS Defaults Load Setup Defaults Power Management This item determines the options of the power management function Default value is Disable The following pages tell you the options of each item amp describe the meanings of each options Disabled Global Power Management will be disabled User Define Users can configure their own power management Min Saving Predefined timer values are used such that all tim ers are in their maximum value Max Saving Predefined timer values are used such that all timers minimum value PM Control by APM If this item set to No system BIOS will ignore and APM calls when the power is managed the system If this item setup to Yes system BIOS will wait for APM s prompt before it enter any PM mode e g DOZE STANDBY or SUSPEND Video Off Method Blank Screen
12. Enter the information directly from the keyboard and press Enter Those information should be provided in the documentation from your hard disk vendor or the system manufacturer m sger User s Manual 21 The user may also set those items to AUTO to auto configure hard disk drives parameter when system power on If a hard disk drive has not been installed select NONE and press Enter Drive A type Drive B type This item specifies the types of floppy disk drive A or drive B that has been installed in the system Video This item selects the type of adapter used for the primary system monitor that must matches your video display card and monitor Although secondary monitors are supported you do not have to select the type in Setup Error halt This item determines if the system will stop when an error is detected during power up Mem ory This item is display only It is automatically detected by POST Power On Self Test of the BIOS Base Memory The POST of the BIOS will determine the amount of base or conven tional memory installed in the system The value of the base memory is typically 512K for systems with 512K memory installed on the mainboard or 640K for systems with 640K or more memory installed on the mainboard Extended Memory The BIOS determines how much extended memory is present during the POST This is the amount of memory located above 1 MB in CPU s memory address m
13. HOT 557 Version 1 32 Pentium processor Based PCI MAIN BOARD User s Manual u er User s Manual 1 iH FCC Notice This equipment has been tested and found to comply with the limits for a Class B digital device pursuant to Part 15 of FCC Rules These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy If not installed and used properly in strict accordance with the manufacturer s instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation If this equipment does cause interference to radio or television reception which can be determined by turning the equipment off and on the user is encouraged to try to correct the interference by one or more of the following measures Reorient or relocate the receiving antenna Increase the separation between the equipment and receiver Connect the equipment into an outlet on a circuit different from that to which the receiver is connected Consult the dealer or an experienced radio television technician for help and for additional suggestions The user may find the following booklet prepared by the Federal Communications Commission helpful How to Identify and Resolve Radio TV Interference Problems
14. Hardware Configuration Jumpers JP7 Display Type Swaen EGA CGA JP9 Clear Password Open Monochrome Close Jumper during Power on JP21 CMOS Clear Close Clear CMOS Open Normal JP19 Flash EPROM 5 Select 19 z 5v 2 3 1 5 El E 12V 1 2 System Clock Select JP36 7 50MHz 1 2 3 4 5 6 5 55MHz 1 2 3 4 1 60MHz 1 2 5 6 66MHz 3 4 5 6 75MHz 1 2 o ele g CPU Voltage Select 1 mor z p fE VIO VCORE J102 3 4 Close TAWI L L L L J101 3 2V 1 2 3 4 Close 3 3V 3 4 Close 3 45V 2 4 Close TIGL ot 35V 1 2 Close E BI 3 6V 1 3 Close gi an 3 8V All Open 5 zi v RE Ro CPU Voltage Select 2 e 3 Vio Vcore Separate J102 1 2 Close Vio J101 The same with J101 table on CPU Volatage Select 1 Vcore J100 2 5V 1 2 3 4 Close 2 7V 3 4 Close 2 8V 2 4 Close 29V 1 2 Close 3 0V 1 3 Close 3 2V All Open JP JPlS 23 22 me ne me use e sooo RS EPM GED 1 SPK 1 KEYLOCK IDEKD 2X 3X CPU Clock Multiplier Select Pipelined Burst Cache Size Select JP23 24 1 1 5 Open Open JP29 JP30 T 2 Close Open 256KB 1 2Close 2 3 Close 1 3 Open Close 512KB 2 3Close 1 2 Close 1 2 5 Close Close RA
15. Specification CPU Function Pentium processors 75 200MHz Cyrix 6x86 processors P120 P166 AMD KS processors PR75 PR166 Chipset Intel PCIset 82437V X 82438V X and 82371SB Memory Supports two banks of EDO Fast Page Mode DRAM or 3 3V Sync DRAM ranging from 8MB to 128MB Supports 4MB 8MB 16MB 32MB 72 pins SIMMs or 8MB 16MB 32MB 168 pin DIMMs Cache Memory Integrated L2 write back cache controller 256KB or 512KB Direct Mapped Pipeline Burst Cache Power Management Function Provides four power management modes Full on Doze Standby and Suspend Supports Microsoft APM Provides EPMI External Power Management Interrupt pin User s Manual 5 Expansions 32 bit PCI bus slot x 4 16 bit ISA bus slot x 3 2 channel PCI IDE port Support up to 4 IDE devices PIO Mode 4 DMA Mode 2 transfers up to 22 MB sec Integrated 8 x 32 bit buffer for PCI IDE burst transfers One floppy port One parallel port Supports SPP PS 2 compatible bidirectional Parallel Port EPP Enhanced Parallel Port and ECP Extended Capabilities Port high performance parallel port Two serial ports Supports 16C550 compatible UARTS Supports IrDA Infra red communication One PS 2 mouse port Two USB Universal Serial Bus ports Board Design Dimension 220mm x 280mm u s ese rj User s Manual 6 TER
16. TUP AWARD SOFTWARE INC Date mm dd yy Tue Jul 23 1996 Time hh mm ss 15 58 6 HARD DISKS TYPE SIZE CYLS HEAD PRECOMP LANDZ SECTOR Primary Master Auto 8 8 8 Primary Slave fiuto B 8 6 Secondary Master Auto B 8 6 Secondary Slave Auto B 8 6 Drive A 1 44M 3 5 in Drive B None Base Memory 646K Extended Memory 31744K Video EGA UGA Other Memory 384K Halt On 11 Errors Total Memory 32768 ESC Quit Select Item PU PD Modify F1 Help Ghift F2 Change Color Date The date format is day month date year Press F3 to show the calendar Time The time format is hour minute second The time is calculated base on the 24 hour military time clock For example 5 p m is 17 00 00 Drive C type Drive D type This item identify the types of hard disk drive C and drive D that has been installed in the computer There are 46 predefined types and a user definable type Press PgUp or PgDn to select a numbered hard disk type or type the number and press Enter Note that the specifications of your drive must match with the drive table The hard disk will not work properly if you enter improper information for this item If your hard disk drive type is not matched or listed you can use Type User to define your own drive type manually If you select Type User related information is asked to be entered to the following items
17. The system BIOS will only blanks off the screen when disabling video V H SYN In addition to Blank Screen BIOS will also turn Blank off the V SYNC amp H SYNC signals VGA cards to monitor User s Manual 28 DPMS This function is enabled for only the VGA card supporting DPM Doze Mode 1Min 1Hr Defines the continuous idle time before the sys tem enters DOZE mode Disable System will never enter DOZE mode Standby Mode 1Min 1Hr Defines the continues idle time before the sys tem enters STANDBY mode Disable System will never enter STANDBY mode Suspend Mode 1 Min 1 Hr Defines the continuous idle time before the sys tem enters SUSPEND mode Disable System will never enter SUSPEND mode HDD Power Down 1 15Min Defines the continuous HDD idle time before the HDD enters power saving mode motor off Suspend BIOS will turn the HDD s motor off when system is in SUSPEND mode Disable HDD s motor will not be turn off IRQ3 5 8 12 Wake Up Events In Doze amp Standby If these items set to Off the IRQ3 5 8 or 12 event s activity will not reactivates the system from Doze and Standby mode If these items set to On the IRQ3 5 8 or 12 event s activity will reactivate system from Doze and Standby mode Power Down amp Resume Events If this items sets to Off the event s activity will not be monitored to entering power management If this items sets to On the event s activity will be monitor
18. ap User s Manual 22 BIOS Features Setup ROM PCIZISA BIOS 26859GH2B BIOS FERTURES SETUP AWARD SOFTWARE INC CPU Internal Cache Enabled Video BIOS Shadow Enabled External Cache Enabled C888B8 CBFFF Shadow Disabled Quick Power On Self Test Disabled CCBBB CFFFF Shadow Disabled Boot Sequence t ALC DGGHG D3FFF Shadow Disabled Swap Floppy Drive Disabled D4888 D 7FFF Shadow Disabled Boot Up Floppy Seek Enabled D8888 DBFFF Shadow Disabled Boot Up NumLock Status On DCBBB DFFFF Shadow Disabled Boot Up System Speed High Gate AZ Option Fast Security Option Setup PS 2 mouse function control Disabled PCI UGR Palette Snoop Disabled OS Select For DRAM gt 64MB Non 0S2 gt Quit Select Item Help PU PD Modify Old Values Shift F2 Color Load BIOS Defaults Load Setup Defaults CPU Internal Cache This item enables CPU internal cache to speed up memory access External Cache This item enables the external cache to speed up memory access Quick Power On Self Test This item speeds up Power On Self Test POST after you power on the computer If it is set to Enabled BIOS will shorten or skip some check items during POST Boot Sequence This item determines which drive computer searches first for the disk operating system Default value is A C Swap Floppy Drive When this item enables the BIOS will swap floppy drive assignments so
19. boot and Plug and Play compatible devices However this capability means absolutely nothing unless you are using a Plug and Play operating system as Windows 95 Reset Configuration Data This item allows you to determine reset the configuration data or not IRQ 3 4 5 7 9 10 11 12 14 15 assigned to These items allow you to determine the IRQ assigned to the ISA bus and is not available to any PCI slot Choices are Legacy ISA and PCI ISA PnP DMA 0 1 3 5 6 7 assigned to These items allow you to determine the DMA assigned to the ISA bus and is not available to any PCI slot Choices are Legacy 184 and PCI ISA PnP m sger User s Manual 30 PCI IRQ Activated by This items sets the method by which the PCI bus recognize that an IRQ service is being requested by a device Under all circumstances you should not change the default configuration unless advised otherwise by your system s manufacturer Choices are Level default and Edge PCI IDE IRQ Map to This items allows you to configure your system to the type of IDE disk controller in use By default Setup assumes that your controller is an ISA device rather than a PCI controller If you have equipped your system with a PCI controller changing this allows you to specify which slot has the controller and which PCI interrupt A B C or D 15 associated with the connected hard drives Remember that this setting refers to the hard disk drive itself rat
20. dary Master PIO In this item there are five modes defined in manual mode and one automatic mode There are 0 1 2 3 4 and AUTO The default settings for on board Primary Secondary Master PIO timing is Auto IDE Primary Secondary Slave PIO In this item there are five modes defined in manual mode and one automatic mode There are 0 1 2 3 4 and AUTO The default settings for on board Primary Secondary Slave PIO timing is Auto On Chip Primary PCI IDE This item is used to defined on chip Primary PCI IDE controller is Enable or Disable setting On Chip Secondary PCI IDE This item is used to defined on chip Secondary PCI IDE controller is Enable or Disable setting User s Manual 32 PCI Slot IDE 2nd channel This item is used to defined add on PCI IDE secondary controller is Enable or Disable setting Onboard FDC Control This item specifies onboard floppy disk drive controller This setting allows you to connect your floppy disk drives to the onboard floppy connector Choose the Disabled settings if you have a separate control card Onboard Serial Port 1 Port 2 This item is used to define onboard serial port 1 Port2 COMI 3F8H COM2 2F8H COM3 3E8H COM4 2E8H Disabled Infra Red IR Function HOT 557 main board support IIDA HPSIR and Amplitudes Shift Keyed IR ASKIR infrared through COM 2 port This item specifies onboard Infra Red mode to HPSIR ASKIR or Disabled IR Transfer Mod
21. de or EDO burst mode on a per bank basis The options x4444 x3333 and x2222 Fast MA to RAS Delay CLK This item is used to set Fast MA Memory Address to RAS Delay which control DRAM Row Miss timings Fast EDO Path Select This item is used to defined fast path is selected for CPU to DRAM read cycles for the leadoff the options are Enable or Disable Refresh RAS Assertion This item is used to set the number of clocks RAS is asserted for Refresh cycles SDRAM CAS Lat RAS to CAS This item is used to set CAS Latency and RAS to CAS clock for SDRAM If SDRAMs absent this item will not show up ISA Clock This item allows the user to set ISA clock that divide from PCI clock by 3 or by 4 For example if 166MHz Pentium processor is used PCI clock will be 33MHz ISA Clock will be 8 25MHz when PCI clock divided by 4 and 11MHz when PCI clock divided by 3 Mn User s Manual 26 System BIOS Cacheable This item allows the user to set whether the system BIOS F000 FFFF areas are cacheable or non cacheable Video BIOS Cacheable This item allows the user to set whether the video BIOS areas are cacheable or non cacheable 8 Bit Recovery Time The recovery time is the length of time measured in CPU clocks which the system will delay after the completion of an input output request This delay takes place because the CPU is operating so muc
22. e This item specifies onboard infrared transfer mode to full duplex or half duplex Onboard Parallel Port This item specifies onboard parallel port address to 378H 278H 3BCH or Disabled Onboard Printer Mode This item specifies onboard parallel port mode The options are SPP Standard Parallel Port EPP Enhanced Parallel Port ECP Extended Capabilities Port and EPP ECP ECP Mode Use DMA This item specifies DMA Direct Memory Access channel when ECP device is in use The options are J and DMA 3 This item will not show up when SPP and EPP printer mode is selected m sger User s Manual 33 Password Setting This section describes the two access modes that can be set using the options found on the Supervisor Password and User Password ROM PCI ISA BIOS 2659GH2B CMOS SETUP UTILITY AWARD SOFTWARE INC STANDARD CMOS SETUP INTEGRATED PERIPHERALS BIOS FEATURES SETUP IDE HDD AUTO DETECTION CHIPSET FEATURES SETUP SUPERVISOR PASSWORD POWER MANAGEMENT SETUP USER PASSWORD PNP PCI CONFIGURATION SAVE amp EXIT SETUP LOAD BIOS DEFAULTS Enter Password UT SAVING LOAD SETUP DEFAULTS Esc Quit Three Select Item 18 Save Exit Setup GGhift F2 Change Color Change Set Disable Password Supervisor Password and User Password The options on the Password screen menu make it possible to restrict access to the Setup program by enabling you to set passwords for two differe
23. ed to entering power management COM Post Accessed LPT Ports Accessed Drive Ports Accessed IRQ 3 COM 2 IRQ 4 COMI IRQ 5 LPT 2 IRQ 6 Floppy Disk IRQ 7 LPT 1 IRQ 8 Alarm IRQ 9 2 Redir IRQ 10 Reserved IRQ 11 Reserved IRQ 12 PS 2 Mouse IRQ 13 IRQ 14 Hard Disk IRQ 15 Reserved User s Manual 29 PCI Configuration Setup ROM PCI ISA BIOS 26859GH2B PNP PCI CONFIGURATION AWARD SOFTWARE INC Resources Controlled By Manual PCI IRQ Actived By Level Reset Configuration Data Disabled PCI IDE IRQ Map To PCI AUTO Primary IDE INTS A Legacy ISA Secondary IDE INT IRQ 3 IRQ 4 assigned to Legacy ISA IRQ 5 assigned to PCI VISA PnP IRQ assigned to PCI ISA PnP IRQ 9 assigned to PCI ZISA PnP IRQ 18 assigned to PCI ISA PnP IRQ 11 assigned to PCI ISA PnP IRQ 12 assigned to PCI ISA PnP IRQ 14 assigned to PCI ISA PnP IRQ 15 assigned to PCI ISA PnP DMA assigned to PCI ISA PnP DMA 1 assigned to PCI ISA PnP DMA 3 assigned to PCI ISA PnP DMA S assigned to PCI ISA PnP DMA 6 assigned to PCI ISA PnP assigned to PCI ISA PnP assigned ESC Quit Tlee Select Item F1 Help PU PD Modify F5 Old Values Shift F2 Color F6 Load BIOS Defaults Load Setup Defaults Resources Controlled By The Award Plug and Play BIOS has the capability to automatically configure all of the
24. h after than the input output bus that the CPU must be delayed to allow for the completion of the I O This item allows you to determine the recovery time allowed for 8 bit Choices are from 1 to 8 CPU clocks 16 Bit Recovery Time This item allows you to determine the recovery time allowed for 16 bit I O Choices are from NA 1 to 4 CPU clocks Memory Hole At 15M 16M In order to improve performance certain space in memory can be reserved for ISA cards This memory must be mapped into the memory space below 16 MB Peer Concurrency Peer concurrency means that more than one PCI device can be active at a time Enabled this item allows multiple PCI devices can be active Passive Release When enabled the chipset provides a programmable passive release mechanism to meet the required ISA master latencies Delayed Transaction Since the 2 1 revision of the PCI specification requires much tighter controls on target and master latency PCI cycles to or from ISA typically take longer When enabled the chipset provides a programmable delayed completion mechanism to meet the required target latencies User s Manual 27 Power Management Setup ROM PCI ISA BIOS 26859GH2B MANAGEMENT SETUP AWARD SOFTWARE INC Power Management Disable Power Down 4 Resume Events PM Control by APM Yes IRQ3 COM 2 ON Video Off Method SYNC Blank IRQ4 1 ON MODEM Use IRQ
25. her than individual partitions Since each IDE controller supports two separate hard disk drivers you can select the INT for each Again you will note that the primary has a lower interrupt than the secondary as described in Slot x Using above Selecting PCI Auto allows the system to automatically determine how your IDE disk system is configured User s Manual 31 Integrated Peripherals ROM PCI ISA BIOS 26859GH2B INTEGRATED PERIPHERALS AWARD SOFTWARE INC IDE HDD Block Mode Enabled IDE Primary Master PIO Auto IDE Primary Slave PIO Auto IDE Secondary Master PIO Auto IDE Secondary Slave PIO Auto On Chip Primary PCI IDE Enabled On Chip Secondary PCI IDE Enabled PCI Slot IDE 2nd Channel Enabled USB Controller Disabled Onboard FDD Controller Enabled Onboard Serial Port 1 COM1 3F8 Onboard Serial Port 2 COMZ 2F8 Infra Red IR Function Disabled IR Transfer Mode Half Dup Onboard Parallel Port 378H IRQ Quit 11 gt Select Item Onboard Parallel Mode SPP Help PU PD Modify Old Values Shift F2 Color Load BIOS Defaults Load Setup Defaults IDE HDD Block Mode This item is used to set IDE HDD Block Mode If your IDE Hard Disk supports block mode then you can enable this function to speed up the HDD access time If not please disable this function to avoid HDD access error IDE Primary Secon
26. l the items of Award special enhanced features Chipset features setup This setup page includes all the items of chipset features Power Management Setup This setup page includes all the items of Power Management features PCI Configuration setup This item specifies the value in units of PCI bus blocks of the latency timer for the PCI bus master and the IRQ level for PCI device Power on with BIOS defaults Load BIOS Defaults BIOS defaults loads the values required by the system for the maximum performance However you may change the parameter through each Setup Menu User s Manual 19 Load Setup Defaults Setup defaults loads the values required by the system for the O K performance However you may change the parameter through each Setup Menu Integrated Peripherals This setup page includes all the items of peripheral features IDE HDD auto detection Automatically configure IDE hard disk drive parameters Supervisor Password Change set or disable supervisor password It allows you to limit access to the system and Setup or just to Setup User Password Change set or disable user password It allows you to limit access to the system and Setup or just to Setup Save amp Exit setup Save CMOS value change to CMOS and exit setup Exit without saving Abandon all CMOS value changes and exit setup 1 User s Manual 20 Standard CMOS Setup ROM PCI ISA BIOS 26859GH2B STANDARD CMOS SE
27. n on power on screen The system should then be turned off and the jumper JP9 should be returned to OPEN to restore normal operation The procedure should only be done if the user password has been forgotten This function is not available when AMD K5 or Cyrix 6x86 CPU is in use Connectors amp Sockets Connectors amp Sockets ITEM FUNCTION J2 J3 45 On board SIMM sockets DIM1 DIM2 On board 3 3V DIMM sockets J23 J17 718 On board PCI Slots J19 J20 J21 J22 ISA Slots J6 On board PCI Primary IDE Connector J7 On board PCI Secondary IDE Connector On board Floppy Controller Connector CN4 On board Parallel Port Connector CN2 On board Serial port 1 Connector CN3 On board Serial Port 2 Connector J99 On board PS 2 Mouse Port Connector J14 Power LED and Keylock Connector J12 PC Speaker Connector JP12 Hardware Reset Switch Connector JP33 Green LED JP15 EPMI Connector On board Enhanced IDE R W LED JP22 Connector J10 J11 Universal Serial Bus USB Connectors Infra red Communication Port Connector 1 2 4 5 JP3 VCC VCC IRIA GND IROA JP3 i 3 JP1 Cooling Fan Connector gt m e e GND 12V GND Display type Color Mono Switcher JP7 Open for Monochrome Close for EGA CGA VGA display card don t care User s Manual 14 n Memory Configuration The HOT 557 mainboard provides four 72 pin SIMM sockets and two 168
28. nt access modes Supervisor mode and User mode In general Supervisor mode has full access to the Setup options whereas User mode has restricted access to the options Thus by setting separate Supervisor and User password a system supervisor can limit who can change critical Setup values Enter Password Type the password up to eight characters and press lt Enter gt The password typed now will clear any previously entered password from CMOS memory You will be asked to confirm the password Type the password again and press lt Enter gt You may also press lt Esc gt to abort the selection and not enter a password To disable password just press lt Enter gt when you are prompted to enter password A message will confirm the password being disabled Once the password is disabled the system will boot and you can enter Setup freely m sger User s Manual 34 Password Disable If you select System at Security Option of BIOS Features Setup Menu you will be prompted for the password every time the system is rebooted or any time you try to enter Setup If you select Setup at Security Option of BIOS Features Setup Menu you will be prompted only when you try to enter Setup Warning Retain a safe record of your password If you ve forgotten or loosed the password the only way to access the system is to clear CMOS memory please refer to Clear CMOS or Clear Password section 1 User s Manual 35
29. nter Setup The other way to enter Setup is to power on the computer when the below message appear briefly at the bottom of the screen during the POST Power On Self Test press Del key or simultaneously press lt Ctrl gt lt Alt gt and Esc keys TO ENTER SETUP BEFORE BOOT PRESS CTRL ALT ESC OR DEL KEY If the message disappears before you respond and you still wish to enter Setup restart the system to try again by turning it OFF the ON or pressing the RESET button on the system case You may also restart by simultaneously press Ctrl Alt and Delete keys If you do not press the keys at the correct time and the system does not boot an error message will be displayed and you will again be asked to PRESS F1 TO CONTINUE CTRL ALT ESC OR DEL TO ENTER SETUP User s Manual 18 The Main Menu ROM PCI ISR BIOS 26859GH2B CMOS SETUP UTILITY AWARD SOFTWARE INC STANDARD CMOS SETUP INTEGRATED PERIPHERALS BIOS FEATURES SETUP IDE HDD AUTO DETECTION CHIPSET FEATURES SETUP SUPERVISOR PASSWORD POWER MANAGEMENT SETUP USER PASSWORD PNP PCI CONFIGURATION SAVE amp EXIT SETUP LOAD BIOS DEFAULTS EXIT WITHOUT SAVING LOAD SETUP DEFAULTS Esc Quit Select Item 18 Save amp Exit Setup GGhift F2 Change Color Time Date Hard Disk Type Standard CMOS setup This setup page includes all the items in a standard compatible BIOS BIOS features setup This setup page includes al
30. uses When item of Auto Configuration is disabled this item will not show up DRAM RAS Precharge Time DRAM must continually be refreshed or it will lose its data Normally DRAM is refreshed entirely as the result of a single request This option allows you to determine the number of CPU clocks allocated for Row Address Strobe to accumulate its charge before the DRAM is refreshed If insufficient time is allowed refresh may be incomplete and data lost This item sets the DRAM RAS Precharge Timing The options are 4 and 3 CLKs DRAM R W Leadoff Timing This item sets the number of CPU clocks allowed before reads and writes to DRAM are performed User s Manual 25 7 6 Seven clocks leadoff for reads and six clocks leadoff for writes 6 5 Six clocks leadoff for reads and five clocks leadoff for writes Fast RAS To CAS Delay When DRAM is refreshed both rows and columns are address separately This setup item allows you to determine the timing of the transition from Row Address Strobe RAS to Column Address Strobe CAS The options are 3 and 2 CLKs DRAM Read Burst EDO FP This item set the EDO FP DRAM Read Burst Timing The timing used depends on the type of DRAM EDO burst mode or standard fast page mode on a per bank basis The options x222 x333 x333 x444 and 444 444 DRAM Write Burst Timing This item set the DRAM Write Burst Timing The timing used depends on the type of DRAM standard page mo
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