High Speed Counter (HSC) Self
Contents
1. Set Point 1 HW SUP0776 02 26 JAN 2005 PAGE 9 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 AQ Data Note A key is attached to this table that explains conventions used in the HSC register tables Register Option 1 Option 2 7 Option 3 Option 4 96AQ1 Cntr 1 Load Value or Cntr 1 Load Value LW Low Set Point 1 LW Cntr 1 Low Set Point 1 Freq Time Base LW 96AQ2 Cntr 1 Load Valueor Cntr 1 Load Value HW Low Set Point 1 HW 1 High Set Point 1 Freq Time Base HW 96AQ3 Cntr 2 Load Value or Cntr 2 Load Value LW High Set Point 1 LW 1 Low Set Point 2 Freq Time Base LW AQ4 Cntr 2 Load Value or Cntr 2 Load Value HW High Set Point 1 HW 1 High Set Point 2 Freq Time Base HW 96AQ5 Cntr 1 PWM Cycle Cntr 1 ON Low Set Point 2 LW 1 Low Set Point 3 Time Set Point 1 LW 96AQ6 Cntr 1 PWM Cntr 1 ON Low Set Point 2 HW 1 High Set Point 3 Pulse On Time Set Point 1 HW 96AQ7 Cntr 2 PWM Cycle Cntr 1 OFF High Set Point 2 LW 1 Low Set Point 4 Time Set Point 1 LW 96AQB8 Cntr 2 PWM Cntr 1 OFF High Set Point 2 HW Cntr 1 High Set Point 4 Pulse On Time Set Point 1 HW 96AQ9 Cntr 1 ON Low Set Point 3 LW Cntr 2 Low Set Point 1 Set Point 2 LW 96AQ10 Cntr 1 ON Low Set Point 3 HW Cntr 2 High Set Point 1 Set Point 2 HW 96AQ1 1 Cntr 1 OFF High Set Point 3 LW Cntr 2 Low Set Point 2 Not Applicable to Set Point 2 LW 96AQ12 Option Cntr 1 OFF High Set Point 3 HW Cntr 2 High Set Point 22. sssssssss 19 Types of Control Signals Options 1 2 and 7 only 19 Technical SUpport sss 21 Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC PAGE 2 26 JAN 2005 SUP0776 02 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 NOTES Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC SUP0776 02 26 JAN 2005 PAGE 3 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 What High Speed Counter Option do choose Note The Selection Guide below refers to chapters found in the HSC Supplement SUP0265 See Technical Support at the end of this document to locate and download the supplement from the web High Speed Counter Option Selection Guide Primary Function Choose Option Functionality Read Chapters in SUP0265 Dual 16 bit PWM Pulse Outputs 1 2 3 Frequency Pulse Counters Counts Time Base Single Dual 32 bit N Count Latch Pre load Register and Two ON and OFF Event Counters 1 2 4 Dual 32 bit Y Outputs per Counter N Qty 8 Combinable s Y Electronic CAM 3 ON and OFF Single 24 bit Outputs Electronic CAM Dual 16 bit Dual qty 4 He Combinable ON 1 2 6 and OFF Outputs PWM Pulse Dual Frequency Y Outputs 1 Pulse Counters 123 Dual 16 bit
3. The phase relationship of Channel A and Channel B determines the count direction Refers to Control 1 Control 2 See Types of Control Signals in this guide page Error Bookmark not defined Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC PAGE 6 26 JAN 2005 SUP0776 02 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 Al Data Note A key is attached to this table that explains conventions used in the HSC register tables Register Option 1 Option 2 7 Option 3 Option 4 Al1 Option Number Option Number Option Number Option Number AI2 Cntr 1 Value or Cntr 1 Value LW Cntr 1 Value LW Cntr 1 Value Freq LW AI3 Cntr 1 Value or Cntr 1 Value HW Cntr 1 Value HW Cntr 2 Value Freq HW AI4 Cntr 2 Value or Cntr 2 Value LW Freq LW AI5 Cntr 2 Value or Cnir 2 Value HW Freq HW AI6B Cntr 1 Latch Cntr 1 Latch Value LW Value LW Not Applicable to Not Applicable to AI7 Cntr 1 Latch Option Option Value HW Value HW 96AI8 Cntr 2 Latch Cntr 2 Latch Value LW Value LW AIY Cntr 2 Latch Cntr 2 Latch Not Applicable to Value HW Value HW Key For Register Tables These tables serve as a general reference for the starting location of the registers To determine the Option actual starting location of the various registers it is necessary to consult the I O Map screen in the Cscape Software after co
4. Laich2 n lath2 A A This table is continued on next page Key For Register Tables Reserved AF 9601 8 User Outputs if not assigned to another function CNTR 1 2 Refers to Counter 1 Counter 2 SP1 2 Refers to Setpoint 1 Setpoint 2 Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC PAGE 8 26 JAN 2005 SUP0776 02 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 Q Data continued Register Option 1 Option 2 7 Option 3 Option 4 Q33 Q34 Q35 Q36 Q37 Q38 Q39 Reserved Q40 Reserved Q41 Q42 AF CT Q43 E AF Q44 EE EE ee ees Q45 Q46 Q47 Q48 Not Applicable Not Applicable to Q49 AF to Option Option Q50 AF Q51 AF 96Q52 AF Not Applicable to Q53 Reserved Option Q54 Reserved Q55 Reserved Q56 Reserved Key For Register Tables Reserved Registers are set to 0 AF See manual refers to Advanced Functions covered in the HSC Supplement SUP0265 Not Applicable to These tables serve as a general reference for the starting location of the registers To determine the Option actual starting location of the various registers it is necessary to consult the I O Map screen in the Cscape Software after configuration Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC
5. Al6 7 Al4 5 Counter 2 count use Latch and AI8 9 Option 3 Al2 3 Count value no latch available use CAM Image Option 4 AI2 Counter 1 count no latch available read accumulator directly AI3 Counter 2 count no latch available read accumulator directly Option 7 Al2 3 Counter 1 count use Latch and Al6 7 Al4 5 Counter 2 count use Latch and AI8 9 Types of Control Signals Options 1 2 and 7 only Note The following definitions are taken from the HSC Supplement SUP0265 See Technical Support at the end of this document to locate and download the supplement from the web Each counter if enabled is controlled by the following control signals LOAD Setting the Load signal to Logic 1 forces the count to the Load Value The Count remains at the Load value until the Load signal is reset to Logic 0 The count then starts from that value and increments or decrements depending on the direction of the count ENABLE Setting the Enable signal to Logic 1 allows the Counter to count When the Enable signal of an option 1 or 2 counter is set to Logic 0 counting is inhibited When the Enable signal of an option 7 counter is set to Logic 0 counting continues Use the Clear signal to stop counting CLEAR Setting the Clear signal to Logic 1 clears the counter to zero and the count remains at zero until the Clear signal is reset to Logic 0 LATCH The current counter value is latched into the counter s Latch register on the ri
6. Cscape uses an external file to specify the counter 1 2 7 function Custom Function This option is intended for hardware testing Diagnostic Tool Option 7 is Similar to Option 2 except edge triggered enable and one shot on clear See Chapter 4 in the HSC Supplement SUP0265 for details Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC PAGE 4 26 JAN 2005 SUP0776 02 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 NOTES Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC SUP0776 02 26 JAN 2005 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 PAGE 5 Which OCS Registers are used with the High Speed Counter High Speed Counter Cscape I O Summary Note The summary below refers to chapters found in the HSC Supplement SUP0265 See Technical Support at the end of this document to locate and download the supplement from the web l Data Registers Note A key is attached to this table that explains conventions used in the HSC register tables Register Option 1 Option 2 7 Option 3 Option 4 9el1 I1 CLK 1 I1 CLK 1 11 Encoder A 11 Encoder A1 l2 I2 DIR 1 I2 DIR 1 I2 Encoder B I2 Encoder B1 I3 I3 CNTRL 1 I3 CNTRL 1 I3 Encoder M I3 Encoder M1 96l4 14 CNTRL 1 14 CNTRL 1 14 Enc
7. M Disable 14 Enc M1 Disable 9615 I5 CLK 2 I5 CLK 2 I5 I5 Encoder A2 96l6 l6 DIR 2 l6 DIR 2 l6 l6 Encoder B2 96l7 I7 CNTRL 2 I7 CNTRL 2 I7 I7 Encoder M2 96l8 l8 CNTRL 2 l8 CNTRL 2 18 18 Enc M2 Disable 9ol9 Gate for Freq Q1 Image 96110 PWM 1 9e Q2 Image 9611 PWM 2 Q3 Image 95112 Reserved Not Applicable to Q4 Image Not Applicable to 963 Reserved Option 96Q5 Image Option 96114 Reserved Q6 Image 96115 Reserved Q7 Image 96116 Reserved Q8 Image Key For Register Tables Reserved Registers are set to 0 Not Applicable to Option These tables serve as a general reference for the starting location of the registers To determine the actual starting location of the various registers it is necessary to consult the I O Map screen in the Cscape Software affer configuration 2611 8 CLK1 2 DIR 1 2 CNTRL 1 2 User Inputs if not assigned to another function Refers to Clock 1 Clock 2 The Counter counts on each positive Clock edge Refers to Direction 1 Direction 2 The Clock Direction input if used causes an up count when the input is a logic high and a down count when the input is a logic low Note The Quadrature Mode of Option 1 2 and 7 counters operates much the same as the Count Direction Mode but it operates with the Clock and Direction inputs conditioned as Encoder Channel A and Channel B The normal Clock input becomes Channel A and the normal Direction input becomes Channel B
8. SUP0776 02 26 JAN 2005 KEEP WITH USER MANUAL IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 HORNER APG High Speed Counter HSC Self Help Guide This guide covers HE800HSC600 601 and HE820HSC600 601 SmartStack modules HE5000CS033 063 and HE5000CS034 064 MiniOCS modules HE500RCS063 and HE500RCS064 MiniRCS modules This guide also covers HSC products starting with IC300 NOTE Examples in this guide refer to SmartStack modules but information applies to other products listed above Topic Page What High Speed Counter Option do choose 3 High Speed Counter Option Selection Guide sesusssse 3 Which OCS Registers are used with the High Speed Srl lade 5 High Speed Counter Cscape VO Summary ass cscocseoes tus tesstutetan etas ust aruis 5 VOERBTCNICLIICGOMMNEM 5 TaN PAU A EE E EE E EE 6 VAOR DE i BERRE 7 AQ DA a 9 How do get started 11 High Speed Counter Quick Start Examples ssesssssss 11 Example 1 Using the Diagnostic Tool Option 6 sssss 11 Example 2 Using an Event Counter sess 15 What Additional Information Is Important To Know 19 Data Consistency Issue During Counter Accumulator Register Access Accumulator Register is not Latched
9. Set Point 2 HW 96AQ13 Cntr 2 ON Low Set Point 4 LW Cntr 2 Low Set Point 3 Set Point 1 LW 96AQ14 Cntr 2 ON Low Set Point 4 HW Cntr 2 High Set Point 3 This table is continued on next page Not Applicable Key For Register Tables PWM Cycle Time and On Time are in 100ns 0 1us increments from 40us to 3 2767ms Special use for 1 and 0 A value of 1 in AQ5 or AQ7 causes the PWM output to remain OFF A value of 0 sets the cycle time to its maximum value of 6 5535ms These tables serve as a general reference for the starting location of the registers To determine the actual to Option starting location of the various registers it is necessary to consult the I O Map screen in the Cscape Software affer configuration LW Low Word of DINT HW High Word of DINT CNTR 1 2 Refers to Counter 1 Counter 2 Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC PAGE 10 26 JAN 2005 SUP0776 02 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 AQ Data Registers continued Register Option 1 Option 2 7 Option 3 Option 4 96AQ15 Cntr 2 OFF High Set Point 4 LW Cntr 2 Low Set Point 4 Set Point 1 LW 96AQ16 Cntr 2 OFF High Set Point 4 HW Cntr 2 High Set Point 4 Set Point 1 HW 96AQ17 Cntr 2 ON Low Set Point 5 LW Cntr 1 Cnts per Set Point 2 LW Revolution 96AQ18 Cntr 2 ON Low Set Point 5 H
10. W Cntr 2 Cnts per Set Point 2 HW Revolution 96AQ19 Cntr 2 OFF High Set Point 5 LW Set Point 2 LW 96AQ20 Cntr 2 OFF High Set Point 5 HW Set Point 2 HW AQ21 Not Applicable to Low Set Point 6 LW 96AQ22 Option Low Set Point 6 HW AQ23 High Set Point 6 LW 96AQ24 High Set Point 6 HW AQ25 Low Set Point 7 LW Not Applicable to 96AQ26 Low Set Point 7 HW Option 96AQ27 Not Applicable High Set Point 7 LW 96AQ28 to Option High Set Point 7 HW 96AQ29 Low Set Point 8 LW 96AQ30 Low Set Point 8 HW AQ31 High Set Point 8 LW 96AQ32 High Set Point 8 HW AQ33 per Revolution LW AQ34 per Revolution HW PWM Cycle Time and On Time are in 100ns 0 1us increments from 40us to 3 2767ms Special use for 1 and 0 A value of 1 in AQ5 or AQ7 causes the PWM output to remain OFF A value of 0 sets the cycle time to its maximum value of 6 5535ms Key For Register Tables Not Applicable These tables serve as a general reference for the starting location of the registers To determine the actual to Option starting location of the various registers it is necessary to consult the I O Map screen in the Cscape Software affer configuration LW Low Word of DINT HW High Word of DINT CNTR 1 2 Refers to Counter 1 Counter 2 Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC SUP0776 02 26 JAN 2005 PAGE 11 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 How do
11. ch untitled1 c sj 7 File 4 0002 400034 OFF Print Add Running Figure 4 Example 2 Data Watch Window Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC SUP0776 02 26 JAN 2005 PAGE 19 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 What Additional Information Is Important To Know Data Consistency Issue During Counter Accumulator Register Access Accumulator Register is not Latched Applications required to read the counter accumulator registers during counter operation need to employ the latched values Latched values are not required for display purposes Types of Control Signals are discussed later in this section Issue The accumulator registers of option 1 2 3 and 7 counters contain Double Integer values That is they are 24 or 32 bit registers If a count occurs coincident with the controller s access to the accumulator register erroneous data can result This is not an issue for the option 4 accumulator registers because they are Integer values They are 16 bit registers The registers in question are as follows assuming that the module s Al registers begin at AT See AI Register Table for more details on page 6 in this guide Option 1 Al2 3 Counter 1 count or frequency use Latch and Al6 7 Al4 5 Counter 2 count or frequency use Latch and AI8 9 Option 2 Al2 3 Counter 1 count use Latch and
12. d Courter din ord d neg out Typa Deng Ending Number of Rogster Ragkkr Peysa 1 36 16 pot 35 it 1 3 NONE Figure 5 Example 1 I O Map for Option 6 The I O Map shows the actual starting location of various registers for the configured HSC600 located in slot 1 Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC SUP0776 02 26 JAN 2005 PAGE 13 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 Click OK and then download the configuration to the OCS RCS No ladder program is needed for this example 7 What if the HSC module had been placed in slot 2 instead of slot 1 How would it affect the I O Map and the actual starting location of various registers Let us assume that there is a mixed digital I O module in the first position and that the HSC is the second module on the stack After configuration you check the I O Map for the HSC module Figure 7 Modute Configuration t3 Modde Modest HEBODHS CS Desoiption High Speed Counter 6 in and reg cot Type Stating Endro Number ol Register Regster Reastemr E 3 24 fa za S Fa NE XAJ 1 3 3 XAD NONE NONE n Figure 6 Example 1 I O Map for HSC in Second Slot Notice that the HSC digital I O starts at register address 9 and the analog inputs start at 1 Any reference to the digital I O on the High Speed Counter needs to be offset by the starting register address
13. eference to the digital I O on the HSC needs to be offset by the starting register address minus one e g l1 on the HSC is located at l9 in the Cscape register map l1 9 1 9619 Click OK and then download the configuration to the OCS RCS No ladder program is needed for this example Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC PAGE 18 26 JAN 2005 SUP0776 02 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 Viewing Data Watch Window HSC Option 1 5 Now go to the Data Watch Window Select the Controller pull down menu in Cscape and click Data Watch Display AI2 as a DINT Double Integer You will see 0 in the counter To allow the counter to count turn on the enable bit located at Q34 this is the 26 bit in the HSC register map With the HSC starting at 9 as shown in the I O Map of Figure 3 turn on Q34 Q26 9 1 Q34 You will see the free running counter clocked by the 10MHz oscillator Now turn off Q34 Q26 9 1 Q34 the Enable bit The counter stops counting and you can see the count value in 96AI2 3 Note If Option 7 had been selected the counter continues to count with the Enable bit turned off because enable is latched Turning on the Clear bit the 27 bit in the HSC register map turns off the Enable and clears the counter to 0 To clear the counter to 0 turn on the Clear bit at Q35 Q27 9 1 Q35 C1 Wat
14. er E c Uses Counter 1 and 2 c Input Signal Conditioning Outputs Input Yoltage 24 Volts T 5i ja Ext Input 3 Ext Input 7 Ext Input 4 Ext Input 8 Input Filter PWM 1 PWM 2 500 KHz c Enable Enable El m Cancel Figure 2 Example 2 Option 1 Configuration SUP0776 02 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 You are now looking at your configuration choices on the screen as shown in Figure 2 To complete the configuration press OK You are now looking at the screen in Figure 1 Press the I O Map tab at the top of the screen Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC SUP0776 02 26 JAN 2005 PAGE 17 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 Viewing the I O Map 4 The following screen appears Module Configuration Module Model HESO0HSC600 Description High Speed Counter 8 in and 8 neg out Type Starting Ending Number of Register Register Reaisters ae FO ee mes Ea ws Ea ee 1133 Cancel Figure 3 Example 2 High Speed Counter I O Map with Option 1 Selected Look at the I O Map as shown in Figure 3 In this example the High Speed Counter is the second module on the stack and there is a mixed digital O module in the first position Therefore the HSC digital I O starts at register address 9 and the analog I O starts at 1 Any r
15. g Option 1 1 Install the HSC SmartStack module and start the initial configuration page 11 and perform steps 1 3 In this Example 2 it is assumed that the first slot contains a mixed digital module and the HSC is placed in the second I O slot Module Configuration 1 0 Map Module Setup Choose an option best suited for your Application e Option 1 Two 16 bit PM channels Two 32 bit Counters 7 Option 2 Two 32 bit Counters with latch and setpoints 7 Option 3 One 24 bit 8 Cam Encoder 7 Option 4 Two 16 bit 4 Cam Encoders 7 Option 5 Custom Option 6 Diagnostic Tool Option 7 C Similar to Option 2 edge triggered enable and one shot on clear OK Cancel ppl Figure 1 Example 2 Option 1 Selected 2 Select Option 1 Then click the Configure button Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC PAGE 16 26 JAN 2005 Configuring HSC Using Option 1 3 The HSC Configuration screen for Option 1 appears Click the check boxes for 1 Enable Counter 1 2 Under Mode select 10 MHz Osc 3 Latch Load Clear and Enable from Ladder High Speed Counter Configuration Option 1 Ver 1 51 Counters Cou Counter 2 Enable Mode Mode C Count Dir C Quadrature E 4 C Up Down 10MHz sc Ko 5 Latch Load Clear amp Enable a from Ladder J Use Ext Input 2 for Direction jz Up C Down e C r Frequency Count
16. get started High Speed Counter Quick Start Examples Example 1 Using the Diagnostic Tool Option 6 Note This product has a detailed supplement SUP0265 See Technical Support at the end of this document to locate and download the supplement from the web Initial Configuration Selecting HSC Counter 1 For this example physically install the HSC600 SmartStack module in the first I O slot of the controller You can use the HSC601 instead 2 In Cscape double click on the first slot or click on the Config button to its right A screen appears click Other tab and then another screen appears Select HEB00HSC600 and click OK The following screen appears showing the HSC in the first slot Now click on the Config button to its right 1 Cerca Figure 1 Example 1 HSC is Shown in First Slot Note Ensure that the proper controller is selected If it is not selected double click on the controller and select the desired controller from the pull down menu or press the Config button to its right Press OK 3 The following screen appears Module Configeration VO Map Mode Song Hooks Moda HERHECEDU Descriptor Hoh Speed Couer 3 n end Eno out Typs Siete Ensio Nube Regie ME NONE 2 None NONE Al MONE VE saa ROME wow Figure 2 Example 1 Module Configuration Screen You need to select an HSC option so click the Module Setup tab Note The I O slot position that is selected affects the actua
17. l starting location of various registers It is necessary to consult this O Map screen in the Cscape Software after configuration Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC PAGE 12 26 JAN 2005 SUP0776 02 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 Configuring HSC using Option 6 4 The following screen appears Module Configuration VO Map Modile Setup it Qhoose an option bes salad for your Appl eation r Opto Two 1 amp bl Puh channa Twa 22 bt Counter r Opio Two 32bit Counbars with lich and selpoinis pio 3 One 2L Ek 8 Com Encoder Opion 4 Two 16bit 4 Cam Encoders r Opton 5 Caton s U pim b Disroslic Tool Option 7 7 Sinik to Option 2 edge tigaered enable ard cos abet on cea Corlgure gt gt gt cert e Figure 3 Example 1 Option 6 Selected 5 Click Option 6 Press Configure button The following screen appears High Speed Counter Configuration Option 6 Ver 1 00 Fpu Signe Conditioning hpt Fiter Input Voltege 24 vots xj Dk Figure 4 Example 1 Configuring Option 6 In this example no configuration selections are needed Simply press OK The screen in Figure 3 appears again press the O Map tab at the top of the screen Viewing I O Map 6 The following screen appears Module Configuration VO Mag Module Satup Module Model FEODOHSCEOG Desonpton High Spee
18. minus one e g l1 on the HSC is located at l9 in the Cscape register map l1 9 1 9619 Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC PAGE 14 26 JAN 2005 SUP0776 02 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 Viewing Data Watch Window HSC Option 6 8 Finally go to the Data Watch Window and display Al2 as an integer You will see the free running counter clocked by the 10MHz oscillator To show some control over the counter turn on Q23 Q15 9 1 Q23 which is the mask bit and then turn on Q21 Q13 9 1 Q21 which is the Aux1 bit The counter stops counting as a direct result of turning Q21 on and is cleared to 0 Turn off Q21 and the counter resumes counting G Watch untitled1 c m E Memoy Vale Type ZAl0002 2b114 200023 OFF 400021 OFF Figure 7 Example 1 Data Watch Window Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC SUP0776 02 26 JAN 2005 PAGE 15 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 Example 2 Using an Event Counter When configuring an Event Counter use Option 1 or 2 or 7 depending on your application In Example 2 Option 1 is used Note The HSC has a detailed supplement SUP0265 See Technical Support at the end of this document to locate and download the supplement from the web Selectin
19. nfiguration LW Low Word of DINT HW High Word of DINT CNTR 1 2 Refers to Counter 1 Counter 2 Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC SUP0776 02 26 JAN 2005 PAGE 7 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 Q Data Note A key is attached to this table that explains conventions used in the HSC register tables Register Option 1 Option 2 7 Option 3 Option 4 96Q1 Q1 PWM 1 Q1 Cntr 1 SP 1 Q1 CAM 1 Q1 CAM 1 1 Q2 Q2 Q2 Cntr 1 SP 2 Q2 CAM 2 Q2 CAM 2 1 9e Q3 Q3 Q3 Q3 CAM 3 Q3 CAM 3 1 Q4 Q4 Q4 Q4 CAM 4 Q4 CAM 4 1 Q5 Q5 PWM 2 Q5 Cntr 2 SP 1 Q5 CAM5 Q5 CAM 1 2 Q6 Q6 Q6 Cntr 2 SP 2 Q6 CAM 6 Q6 CAM 2 2 Q7 Q7 Q7 Q7 CAM 7 Q7 CAM 3 2 Q8 Q8 Q8 AF CAM 8 AF CAM 4 2 Q9 AR AF ee TT Q10 AF CT AF Q11 AF AF a Q12 AF AF AF Q13 AF AF AF Q14 AF AF AF Q15 AF AF AF Q16 AF Reserved Q17 AF Reserved AF Q18 AF Reserved AF Q19 AF Q20 Reserved Reset Reset 1 Q21 Reserved Reserved AF Q22 Reserved Reserved AF Q23 Reserved Reserved Reserved AF Q24 Q25 loads load p o Ape s58R Q26 Enble i X Endlet AF _ A Q27 Cleart Oleat O AF A Q28 Latchi batchi A Q29 Lod2 Load2 OA A Q30 Enable2 Endle2 ARE A Q31 Clear2 Clear 2A A Q32
20. sing edge of the Latch signal The counting function is not disturbed by the latch The register data is not reloaded until the following Latch signal s rising edge appears Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC PAGE 20 26 JAN 2005 SUP0776 02 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 NOTES Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC SUP0776 02 26 JAN 2005 PAGE 21 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 Technical Support For assistance and manual updates contact Technical Support at the following locations North America 817 916 4274 www heapg com email techsppt heapg com Europe 353 21 4321 266 www horner apg com Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC PAGE 22 26 JAN 2005 SUP0776 02 IMPORTANT INFORMATION PLEASE READ BEFORE USING HSC600 HSC601 NOTES Information subject to change without notice Cscape and SmartStack are trademarks of Horner APG LLC
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