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SWL Release Note: CalmSHINE16 V1.56i Release History

1. Property of Samsung Electronics Co Ltd 21
2. Fixed 2 When Some long variable is used optimizer crashed New 1 Error handling for option mismatch between calmcc16 and calmopt16 was added New 2 Refinement of push registers list at interrupt function New 3 A10 register is not excepted for dead code elimination New 4 Added the interrupt function detecting method Fixed In optimization level 2 some instructions that access array with constant index were removed incorrectly Fixed When user used a function name longer than 49 characters user might get an assembly error New 1 Frame size is added in debug information New 2 Building logo is added in only Dos Version Fixed 1 Spilled local variable case made incorrect debug information Fixed 2 When Calmopt16 optimizes an input file there was some crash The reason there was a problem in register coalescing Internal version Internal version Comments FIX Size of parsing buffer increased FIX Debug directive fe generated for include files with end directive New Option t is supported to avoid printing of date and time in object file 18 Property of Samsung Electronics Co Ltd ELECTRONICS System LSI Division Semiconductor Business V1 56S Oct 28 2005 J ust version name is changed 35 Oct 21 2005 External symbols with expressions supported in equ directive V1 Internal version Limitation of number of include paths h
3. SWL Release Note CalmSHINE16 V1 56i Release History RN SWL AIT CalmSHINE16 Release History 090703 Title Release Note CalmSHINE16 V1 56i Keywords CalmSHINE16 V1 56i Abstract This document is the release note of CalmSHINE16 V1 56i ELECTRONICS System LSI Division Semiconductor Business Copyright 2009 Samsung Electronics Co Ltd All Rights Reserved Though every care has been taken to ensure the accuracy of this document Samsung Electronics Co Ltd cannot accept responsibility for any errors or omissions or for any loss occasioned to any person whether legal or natural from acting or refraining from action as a result of the information contained herein Information in this document is subject to change at any time without obligation to notify any person of such changes Samsung Electronics Co Ltd may have patents or patent pending applications trademarks copyrights or other intellectual property rights covering subject matter in this document The furnishing of this document does not give the recipient or reader any license to these patents trademarks copyrights or other intellectual property rights No part of this document may be communicated distributed reproduced or transmitted in any form or by any means electronic or mechanical or otherwise for any purpose without the prior written permission of Samsung Electronics Co Ltd The document is subject to revision without further notic
4. wrong codes are generated New Error directive produces error message that includes the specified sequence of preprocessing tokens at compiler time When error directives are encountered compilation terminates Fixed When casting between code pointer and non code pointer compiler generate error Fixed When accessing generic pointer wrong codes are generated 1 optimize the performance in switch statement change the addpXx library call to add instruction replace the library call that performs signed add with the add instruction that does unsigned add about which signed add is unnecessary 2 change path that temporary files generated t m array t t m charr t from current working directory to debug one 3 fix the mistake checking type When assign a pointer to non const memory to a pointer to const volatile memory error occurs 4 fix problem that the following error message is generated for valid code code data and non code data cannot be located in same pragma 5 modify debugging information for viewing variables located at the code memory in debugging 6 fix problem that error is generated when variables defined by at are initialized by const expression The code generated by the switch statement is optimized Instead of the library call which calculates the entry address of each case the add instruction is generated except that the case includes the goto
5. Instead of compiler linker will do it Fixed RO reg is not pushed poped in optimization level 0 in using it Ex gt void foo void When initializing local array RO reg is used So RO reg should be pushed and popped in function prolog and epilog char c 2 0x11 0x22 Fixed Cast not applied when a pointer variable is casted void to generic int Ex generic char myptr void foo void Because myptr casted to final type generic int the library call that dereferences a generic pointer should be generated int x generic int void myptr Fixed Executed as a 16 bit operation when shift 4 bytes variable in both left right directions Ex gt unsigned char ptr struct APPLE unsigned int weight ptr2 void foo void the shift left should be executed as a 32 bit operation ptr 2 ptr unsigned long ptr2 gt weight 2 Property of Samsung Electronics Co Ltd 15 ELECTRONICS System LSI Division Semiconductor Business Fixed change how to restore A9 register in the interrupt handler from LD A9 IMAGE IDATA BASE amp 0x3ffff to LD A9 IMAGE IDATA BASE LD R9 0 Fixed change library __genuread4romp_x to __genuread4p_x because both is exactly same Fixed assertion occurs when changing pointer to code to pointer to generic Fixed When casting from unsigned long to code unsigned char
6. statement 1 Remove the function of overlay in at 2 Modify the error handling in at 3 Fix the error which is generated due to wrong processing for very long line 1 Generate stack frame size in sm directive 1 When a variable is defined by at it is allocated at wrong address unsigned int A 8 at 0x200000 unsigned long Example 100 at 0x00200080 When apply global optimization variable Example is allocated at wrong address 2 Added pragma functionzinterrupt for SmartCard device This pragma makes irq interrupt handler without vector setting 16 Property of Samsung Electronics Co Ltd ELECTRONICS System LSI Division Semiconductor Business Const expression admission in at syntax in previous version type specifier variable name at address eeprom new syntax type specifier variable name at address eeprom in address field const expressions is supported int i0 at 0x200 ok intil at 0x200 ok int i2 at 0x200 40x10 1 ok crash when compiling below code unsigned int i j unsigned char k i z iHJ k Internal version Fallacy in checking type extern const int i const int i Even if the above code is correct the following error is generated error redeclaration of i previously declared at corresponding filename Incorrect optimization of long type LD A12 NVM var1 LD R4 R12 LD R5 E12 SUB R4 gt 0x80000 SBC R5 lt
7. adding pointer with a value that exceeds the range of signed integer its result is different from the expected value because of the 16 signed addition Ex include lt stdio h gt void main void unsigned char p unsigned char 0x80000 unsigned char a 0x80 unsigned char b 0x00 unsigned int i 0x00ff unsigned long 0x10000 0x80000 0x00ff 0x8ff00 if p 2 unsigned char Ox8ff00 printf fail n 0x80000 unsigned int 0x10000 gt gt 1 0x88000 if p unsigned int I221 unsigned char 0x88000 printf fail n 0x80000 OxOOff Oxff00 Ox8ffff if p i Oxff00 unsigned char Ox8ffff printf fail n 0x80000 Ox00ff 0xff 00 Ox8ffff if p i 0xff00 2 unsigned char Ox8ffff printf fail n i Oxff00 0x80000 Oxff00 amp Oxf 000 0x8f 000 if p i amp Oxf000 z unsigned char Ox8f000 printf fail n EXT Inside function s body the definition of variable with the keyword code should be not permitted Ex gt void foo void code int i 20x23 not permitted the error should be generated Fixed In release mode when using inline assembly function __asm the following error is generated Error message error syntax error invalid inline assembly Ex gt void foo void int i i 1 asm nop EXT Support the function placed the variable with the keyword code at the absolute address of ROM u
8. in the disassembly window Fixed6 Find in Memory window appeared if data memory 4 is clicked Fixed7 Project open error with displaying This project is not CalmRISC project Fixed8 Unsupported functions by OPENice c3200 for example timer and trace was enabled Fixed9 The values displayed incorrectly in the Watch Variable window Fixed 1 Data breakpoint error at Go Setup Fixed 3 swi instruct is added for line branch instruction New 1 Seach function in dvm mem file in case of Hex debugging Fixed 1 Path search error of profiling function in the simulator mode Fixed 2 Redownload error caused by unclosing the opened file if an error occurred when downloading image Fixed 3 Memory leakage problem Fixed 4 Data breakpoint error at Go Setup Property of Samsung Electronics Co Ltd 5 ELECTRONICS System LSI Division Semiconductor Business Fixed 1 Skip to cursor bug the actions in disassembly and c source modes are different Fixed 2 In specific case Global Project option when using source path Fixed 3 File size limitation error if the size was big Fixed 4 HW B P setting error in case of OPENice c3200 Fixed 5 The delay is added if the retry is failed after the image download fail to the flash memory New 1 Internal A flag is added for making a merge hex file and the option is added to project file New 2 Scroll speed of code memory view is enhanced Fixed 1 C3200 MDS was worked s
9. obj ect files gt In case of specifying MD file in GUI please use 7 option Please refer CalmSHINE16 user manual Chapter CalmLink16 section 9 Memory description file for more details 3 2 Assembler from 1 56aS New option t supported to avoid printing of date and time in object file By default assembler prints date and time information in the object file so that CalmLib16 can use it 3 3 Linker from 1 56bS Following points are updated in linker New directive zinit table flash supported to keep initialization table in Flash memory New option SMPorder supported to change linking order in SMP file With this option symbols in the SMP file are searched after library files Odd address warning is generated only for ABS CDATA PM sections Property of Samsung Electronics Co Ltd 3 ELECTRONICS System LSI Division Semiconductor Business 3 4 S3FC9AC S3FC9AE S3EC9A1 eva chip 3 4 1 Firmware f you are S3ECAI chip user you should use latest version of firmware Please check your emulator Firmware File Name Release Date Location Version ANFirmware directory C1600 v1 46 C1600 1 46 090430 b Apr 30 2009 or http www yicsystem com C3200 v1 03d Firmware directory C3200 1 03e 90n CalmFlash 20090616 bin Jun 16 2009 or http www yicsystem com If you have any problem when using them contact to YIC System s Customer Support Team or regional FAE YIC Syst
10. static unsigned long gl1 21 gl2 22 gl3 23 gl4 24 gl5 25 gl6 26 gl7 7 static unsigned long I1 static void spill void unsigned long 1129l1 1229l 2 132913 142914 157915 167916 1727917 unsigned int i 11 The lower word of unsigned long ss pi should be passed as parameter func 0x2200 unsigned long ss gt pi gt gt 16 unsigned int unsigned long ss pi amp Oxffff 124134144154164 L7 H5 void main void spill Property of Samsung Electronics Co Ltd 11 ELECTRONICS System LSI Division Semiconductor Business Fixed The offset calculation for the address optimization is made incorrectly The variable defined after function s definition should be excluded from the target of the address optimization It occurs only over the optimization level 1 Ex include lt stdio h gt int i0 char c0 void foo void void main void id 1 c0 2 foo The offset value of the variable cO for the address optimization is changed by the variable i1 defined after function s definition So the variable defined after function s definition should be excluded from the address optimization if c0 22 printf fail n int i1 void foo void i1 0x1122 12 Property of Samsung Electronics Co Ltd ELECTRONICS System LSI Division Semiconductor Business Fixed The addition of pointer is calculated as signed integer even if the type is unsigned So when
11. 0x80000 LDW ISP 2 A12 arg long Above instead of a12 the value r4 and r5 is loaded in stack So LDW ISP 2 A12 should be replaced with LDW ISP 2 R5 arg high LDW SP 4 RA arg low 4 2 3 Optimizer Calmopt16 dll Version Released date Comments Fixed Push Pop A8 instruction added at prolog and epillog in the interrupt routine Fixed There was some assertion error num of spill var 2 0 during register allocation New Support call with absolute address Fixed At a copy propagation optimization there was incorrect processing for CMPU instruction J ust version name is changed Fixed For function with pragma functionzinterrupt swi withbody num pattern optimizer modified to treat as normal function prolog This means that kinds of interrupt handler function doesn t have push pop for temporary register as general function Fixed Modified to make SWI call instruction into fully normal function call New From this version optimizer assumes that C level SWI interrupt handler routine can have return value Fixed Constant propagation and copy propagation bug fix Property of Samsung Electronics Co Ltd 17 Syst ELECTRONICS em LSI Division Semiconductor Business Fixed At BSRD optimization there was problem in instruction counting for inline assembly J ust version name is changed Fixed Because of internal incorrect wri
12. 16 d L input s 3 1 3 Linker 3 1 3 1 EEPORM library from V1 54f5S Following linker option is supported 9 lt elib gt Where elib is a library file Modules from this file will be placed in EEPROM area if requested from EEPROM code Linker supports two kinds of library files 4ib Option to link with normal library files 9 elib Option to link with EEPROM libraries Where the library has been built using b or d assembler option A library module requested form CODE section ROM area is searched in library files mentioned in 4ib option If the requested module is not found then it is searched in library files mentioned in 9 elib option The requested module is then kept in ROM area A library module requested form ECODE section EEPROM area is searched in library files mentioned in 9 lt elib gt option If the requested module is not found then it is searched in library files mentioned in 4ib option The requested module is then kept in EEPRROM area If same library module is requested from CODE and ECODE section then it is searched in library files mentioned in l 4ib option and then in 9 elib option The requested module is then kept in ROM area gt CalmLink16 calm16 1 lib I calm16 2 lib 9 eep lib1 lib 9 eep lib2 lib other options input object files 2 Property of Samsung Electronics Co Ltd ELECTRONICS System LSI Division Semiconductor Business 3 1 3 2 Memory Descrip
13. _swi 5 extern void inter1 int i test 1 inter1 3 can be changed SWI 5 Fixed When literal includes the character or the warning was generated Ex char p 9 warning string literal contains non portable characters Fixed When the option ms Global variable optimization under 64K offset in IDE isn t used interrupt handler did not initialize R9 even if R9 is used in the interrupt handler Property of Samsung Electronics Co Ltd 9 ELECTRONICS System LSI Division Semiconductor Business Fixed The definition of variable with at in local area generated infinite errors Ex void main void inti at 0x201000 generated infinite errors Fixed crash when you use the reserved keyword for example int align code and so on following pragma Ex oragma align crashed gt generates warning unknown pragma oragma code crashed gt generates warning unknown pragma Fixed When variable is defined by keyword at and the corresponing source line is across internal buffer used in compiling the compiler error is generated for correct code because of mishandling buffer Fixed Changed wrong debug information for stack depth in case of main function Ext support the pragma that makes the fig irq handler without vector setting Syntax pragma functionzinterrupt fiq novector pragma function inter
14. as been removed Branch to different section but same file is supported T option supported for profiling Error checking added for LDB AND XOR TST OR and MUL instructions Internal version NOP insertion for Profiling instructions l Error checking added for DM CDATA section 2 Error handling added for BNZD instruction 3 Relocatable symbols supported in BLOCK directives Relocatable symbols in equ directive are supported Alignment at the beginning of a section is supported New mnemonics EFZ EFS EFST and EFZT supported for MAC2424 for EFZ16 EFS16 EFS16T and EFZ16T Global symbols supported in token pasting Obit offset allowed in BNZD instruction Operand checking added in BSRD BRT D BRF D instructions Token pasting operator supported Source file path has been added in the include dir list ADD SUB LD instruction with label bug solved Argument length in c filename is changed to MAX PATH from 100 Bug solved in WARNING directive Bug solved in parsing of BITR S C T instructions NF I Un Ae GJ hNJ ERIN eN 4 2 5 Linker Calmlink16 dll Version Released date Comments New Hex dump is generated in hex and hxd files rom and eep are not generated New Option summary supported to print used unused areas in the memory New Error generated if no space in data memory for stack New Output files hex hxd map etc deleted in case of
15. brary by d in Assembly Option User Input Please use 9 User Library Name option in Linker Option User Input And Build the Application Project And the Command Line User should follow below Guide line 3 1 2 Assembler from V1 54e1S Following assembler options are supported b This option inserts a NOP between a specific sequence of code LDW An G Ai4x LDB Ry An z OR LDW Ay An z Property of Samsung Electronics Co Ltd 1 ELECTRONICS System LSI Division Semiconductor Business In the above pattern first instruction must be a load to An from Ai and the next instruction must be wither LDB or LDW with An as source register Destination of first LDW must be same as source of next LDB LDW The NOP is inserted after first LDW if this pattern is found in EEPROM are ECODE section eSecl SECTION ECODE eSecl Id a9 xyz Idw a10 G a942 Idb r2 al0 2 add r2 2 In above case a10 is destination in first LDW and source in next LDB and these instructions are placed in ECODE section thus a NOP is inserted after first LDW gt CalmAsm16 b input s d Same as b but NOP is inserted regardless of the section type i e NOP is inserted if sequence is found in any code section CODE and ECODE This option is useful to build a library file As mentioned earlier a NOP is inserted in all code sections CODE and ECODE so that during linking time any of the CODE section can be placed in EEPROM area gt CalmAsm
16. e All brand names and product names mentioned in this document are trademarks or registered trademarks of their respective owners Contact Address Samsung Electronics Co Ltd San 24 Nongseo Ri Giheung Eup Yongin City Gyeonggi do Korea 449 711 Tel 82 031 209 3197 Home Page http www samsung com CalmSDK Contact us CalmSupport samsung com S W Solution SOC Development System LSI Division Semiconductor Business Samsung Electronics Co Ltd Il Property of Samsung Electronics Co Ltd ELECTRONICS System LSI Division Semiconductor Business Revision History Date Version Author Approver Amendment March 14 2007 0 9 Minja Han Created base on 1 56d release note May 8 2009 GUI 1 56i Yong oo Kwon Minja Han beta6 July 3 2009 1 56i Yongjoo Kwon Create document for CalmSHINE16 V1 56i Install package Property of Samsung Electronics Co Ltd Ml ELECTRONICS System LSI Division Semiconductor Business Contents 1 How toget V1 56i Install Package ccc ccc er e E Rex REM IER DOR EG EE EN IR M EM E PRIME 1 2 Release History Of Vl SGi r errre ernennen erre ede eode A ae E Fees Hpoe ERE ES 1 3 Matters that Require Attention isssssssssssssssssse nee eee hehehe nnne nnn 1 3 1 User s Guide for inserting NOP instruction in Command Line And IDE in Some Devices from 1 56 GalimsHINETO sere m pe RM SEMEN MIR 1 3 1 1 Related Device Lists roo ob oec E
17. ee eee dn bebida ds ed dbs eA Ad a Peri 1 3 1 2 Assembler from V1 5400S ciis eee rte ceo mor Kase cue nes crabe y saspe eR eee UU beeen Pee 1 e a NC a T a lt eh Hm ehe emen hen n nena naa an ka sa ade aaa aaa aa nnn nnn 2 3 2 Ass mbler trom 1 5608 zie un eee etre a decade nee bowtie wade SPI IRI ash ieadiwnd cated Un E EC eee beam un 3 3 3 Linker from 1 56DS ies pcan bigis scettr cue ix erepr DIR Uer UE DOM DEER UK RAE AE EAE 3 3 4 DE S3ECO9AE SSEC9AT eva CRIP rebum ette ebore Ere ete de dial re benbIA E cee RE we DRE EE betas 4 3 4 ince LETS 4 3 4 Linker usage from 1 56mS 0 cece eee nn eee meme eene 4 4 E History after releasing V1 54 cece eee nnn 5 MEE CIO Seis LUUD 5 MA Language Tool CONS EN EEE EEE ET EAEE EEE 7 4 2 1 Preprocessor Cprep16 dll sess e e EE AAEE enn 7 A2 2 Compiler CaM CI adl sosta costano stus eost Menon ere osatidtunssntutuesestdep n NE AAN 7 4 2 3 Optimizer Calmopt16 dll i i eice riter ceterae tee rrr rr red ER Idee d red e a n repr Rr M RIPE E 17 4 2 4 X Assembler Calmasm16 dll cccc cece cece cece eee e cece ensue esseeeeseeeceseueeeesurensneuauseesseeesenens 18 4 2 5 Linker CalMlinkl6 dll c ccc cece cece cece cece cent IH hm meme nhe annis 19 4 2 6 Librarian Calmlib16 dll cesses m hh e hehe rena nnns 20 VENE Ul nim ME M hua dhs ohed detin nde E T E T O 21 IV Property of Samsung Electronics Co Ltd ELECTRONICS System LSI Division Semico
18. em s homepage http www yicsystem com 3 4 2 Linker usage from 1 56mS We added some options of Linker because of flash memory read write restriction of S3ECA1 V Generate Hex dump The dump is generated in hex and hxd file x lt len gt Specify record length Default is 32 max is 255 C fill byte Fill value for HEX 00 FF A fill byte Fill value for HXD 00 FF skip fill rec With this option hex hxd records with only fill data are not printed in the output file Example gt CalmLink16 v x128 AFF CFF skip fill rec other options object files Or input the options at linker option as below Debug Y example cs PR General Project Compiler Assembler Linker Post Build Output Files Merged List MapFile Program Image Entry Point e Other Program Memory Address Base hex Size hex Not Case Sensitive iv Go to definition reference Link relocatable sections with source file order User Input S 128 AFF CFF Soc x128 AFF CFF skip fill rec Property of Samsung Electronics Co Ltd ELECTRONICS System LSI Division Semiconductor Business 4 Revision History after releasing V1 54 4 1 GUI CalmSHINE16 Version Released date Comments FIX Dual monitor doesn t be supported NEW S3EC9A1 device supported NEW Host firmware for C3200 C1600 updated FIX Bug fix for breakpoint icon FIX Bug f
19. error New Option flashcode updated to keep IDATALOAD in flash even for default sections Non MD file sections Internal version New Option flashcode updated to keep IDATALOAD in flash memory New New option FlashCode added to convert CODE and CDATA to ECODE and EDATA respectively New Linker now allows odd sized EDATA sections It also aligns a load region if it contains a code section New New directive Zinit table flash supported New New option SMPorder supported to change linking order in SMP file Fixed Odd address warning is generated only for ABS CDATA PM sections Memory description file supported J ust version name is changed Segment given in L seg option can be defined in group and normal segments in MEM file Stack setting done properly even when any one of T U or W option is given Error message changed to display memory segment name and absolute Property of Samsung Electronics Co Ltd 19 ELECTRONICS System LSI Division Semiconductor Business address of a section if section cannot be allocated in given memory area 5 Bug solved in flexible memory segment processing Default entry point set to main Linker now tries to avoid IDATA ZDATA region split warning by allocating IDATA ZDATA section contiguously in DM 1 Bug removed in overlay section allocation Now relocatable section does not interfere w
20. ew product S3FC9UB debugging Fixed 1 In project file view a wrong display of each file option page Fixed 2 Ctrl 4F key string display bug which current cursor exist Fixed 3 executed Rebuild all even though press Make Fixed 4 GUI did not parse comment indicator in a mem file Fixed 5 In disassemble mode Timer amp Trace flag was set a wrong line Fixed In option a user input value and a predefined value are duplicated Fixed The default C startup file always is added instead of the user file Fixed 3 in V1 54d We notice when the project made by old version before 1 54 is opened on this version all files have to be re compiled ONCE because from 1 54 version tool changed the information generation part So If the user want to make new hex file using make tool will rebuild all ONCE but after successfully passing the compile stage of all files then the tool will only execute the linking when make button clicked 6 Property of Samsung Electronics Co Ltd ELECTRONICS System LSI Division Semiconductor Business 4 2 Language tools 4 2 1 Preprocessor Cprep16 dll Version Released date Comments 1 56 J ul 24 0t Option t supported to hide errors if invoked by make utility Bug in multi line comment processing has been removed Internal version Supported Un terminated string or char constants in Zerror directive Token sequence xy
21. ith overlay sections 2 MEM file specification for overlapped segment has been changed Alignment for sections in group is supported l Alignment at the beginning of a section is supported 2 Library function realloc error has been removed Default section initialization has been done before any access to it is made Sections with odd size had been taken care in the new syntax of MEM file New option 9 elib 4ibfile has been added to link with EEPROM libraries Fixed The problem occurred when linker tries to process IDATA section in EEP area 1 Placement of sections with L seg changed No IDATALOAD is created form EEP section 2 New option fvlist file or 6 lt file gt has been supported to print function and variable information in lt file gt 3 Use of tmpfile library function has been removed because of ClearCase dynamic view problem 4 Un limited number of memory segment names in a MEM file is supported 5 New syntax group with overlay keyword has been supported in MEM file 6 Overlay keyword with flexible memory segments and supported in MEM file 7 Maximum stack depth has been printed at the end of MAP file 8 New option sort 8 option supported to sort map file symbols on address 9 Crash removed during MEM file parsing 10 Change in MEM file error message format New Motorola S28 record file generation supported with S28 or 5 co
22. ix for register modifying value in register view FIX C3200 firmware update FIX Bug fix for Find in files error FIX Bug fix for Trace view New1 Add disassembly view scroll up New2 Add Add button in option gt Set Source Path If user presses add button and adds file path list file Tool will parse this line and then show each file path in set source path dialog New3 Add new Function which let user know either Flash chip erased or not in tool New4 Add register doing typing directly in watch register window Fixed1 When user single step at assemble debugging mode STOP instruction can t be operated Fixed2 Flash Area Download Error Fixed3 When download data in area that is not DVM Area display message so that user knows Fixed4 When customer want to display the source in the MDS trace window the scroll down is unacceptably slow simple trace New1 download or download after merging option is added for the flash device when you select Debug Download data New2 Option J TAG clock setup menu is added for OPENice C3200 Fixed1 Downloading error to EEPROM and flash memory Fixed2 Step In error in Conditional Statement block Fixed3 Project was closed if you do the following sequence Open a file Open a project click Cancel after selecting File Close Proj ect Fixed4 Disassembly window showed incorrect code after setting a breakpoint Fixed5 Data was shown incorrectly
23. ixed bug fixed with ms and igcode iggeneric option Fixed bug fixed with ms and igcode iggeneric option Fixed block copy bug fixed for generic and code keyword 8 Property of Samsung Electronics Co Ltd ELECTRONICS System LSI Division Semiconductor Business Ext support SWI function call Ex pragma function interrupt swi 5 extern void inter1 int i test 1 inter1 3 can be changed SWI 5 Fixed Nswi option have some problem in optimization level0 If local variable is usded in the SWI function body in the levelO then SSR_SWI value does not restored properly Ext Nswi option added for SWI function When this option is enabled push pop SSR SWI Fixed Over the optimization level 1 Idw Idb instruction is used in access to 3 dimension array with code keyword Ex include lt stdio h gt code int arr 2 2 2 1 2 8 49 65 6 7 8 void main void if arr 1 0 0 5 should be accessed by Idc instruction printf fail n 24 Fixed interrupt function not declared with extern has some problem Fixed when address optimization compiler crashed Fixed function pointer bug fixed Ex unsigned char void CmdTbI 0 amp Oxffffff Fixed block copy bug fixed for generic and code keyword Ext support SWI function call Ex ipragma function interrupt
24. lue of local variable that has float and double is stored in some tables and so under option code tables of initial value should be located in ROM and be initialized by accessing Idc instruction It is same for local variable of char array too Ex gt include lt stdio h gt void main void float f 1 0 initial value is placed in ROM and when initializing f initial value should be accessed by Idc instruction char arr 2 abc if int f 2 1 printf fail n 14 Property of Samsung Electronics Co Ltd ELECTRONICS System LSI Division Semiconductor Business Fixed When using option ar the address calculation for switch statement is incorrect Fixed If the function located in EEPROM area is declared without pragma of eep seg like the following example the redefinition error is generated Ex void eepFunc void pragma memory eep_seg void eepFunc void Redefinition error should not be generated oragma memory default Ext When accessing the element of multi dimensioned array the calculation of the access address is executed by a 16 bit operation so improving the code density and performance Ext The option bigoffset is newly added It makes 32 bit operation instead of 16 bit operation when calculating access address of array s element Ext Remove setting the entry point as main for the starting location of debugging
25. mmand line options New 1 X option supported to generate ROM in b and EEP in bdt New 2 Supported cmd txt for all command line arguments New 3 Call tree and stack depth view added in MAP file New 4 MAP file is generated even in case of error New 5 A value option supported to fill HXD file New 6 Supported str addr end addr to dump EEPROM in epp file New 7 Motorola hex file generation supported with S38 option 1 Option v changed to generate rom and epp files Supported 9 cmd txt gt for all command line arguments 2 3 Supports file paths with spaces and quote if given in f file l Proper error generated for missing MEM attribute for a section 1 X option supported to generate ROM in b and EEP in bdt b option remains as it is 4 2 6 Librarian Calmlib16 dll Version Released date Comments 20 Property of Samsung Electronics Co Ltd 4 2 ELECTRONICS 7 Library System LSI Division Semiconductor Business Library file supported as one of the input files Librarian reads the input object files from given library file New version for SmartCard created Just version name is changed Multiple option processing supported VL 56 Version Released Comments Fixed Setjmp longijmp were wrong with const regarded as code option New add library compiled with optimization level2
26. nductor Business 1 How to get V1 56i Install Package http www samsung com CalmSDK You can download CalmSHINE16 V1 56i in CalmSHINE16 Board 2 Release History of V1 56i Each tool version according to Packages V1 56f V1 56h 1 56i Tools Ver June 05 2008 Oct 14 2008 Dec 22 2008 July 3 2009 GUI amp Debugger CalmSHINE exe V1 56f V1 56h V1 56i Preprocessor Cprep16 dll V1 56c V1 56c V1 56c Compiler CalmCC16 dll V1 560 V1 56p V1 56r V1 56r Optimizer CalmOpt16 dll V1 56g V1 56g V1 56g Assembler Calmasm16 dll V1 56bS V1 56bS V1 56bS Linker Calmlink16 dll V1 56jS V1 56jS V1 56mS Librarian Calmlibl6 dll V1 56S V1 56aS V1 56aS 3 Matters that Require Attention 3 1 User s Guide for inserting NOP instruction in Command Line And IDE in Some Devices from 1 56 CalmSHINE16 3 1 1 Related Device Lists When the user use below Devices there is the matters that require Attention S3EC9E1 S3CC9E4 S3CCO9E8 S3EC9G1 S3CC9G4 S3C9G8 S3EC9G0 S3CC9GC S3CC9GW S3EC9Q0 S3CC9EB S3CC9EF S3CC9NC S3CC9NW S3CC9NA S3CC9TC S3CC9TW S3CC9TF These Devices run incorrectly when the some code combination exist in EEPROM The IDE support automatically forcing below options for standard Library so all users of above Devices should just Rebuild All EEPROM Project BUT when the User library is made by IDE allocated EEPROM After rebuilding the User Li
27. o slowly Fixed 1 Flash memory write error when wrting a data to the odd addresses Fixed 2 The dll handle is closed in case of abnormal program termination Fixed 3 New watch function added Fixed 4 compiler assembler option was not applied immediately New 1 External program memory download is supported New 2 fram related items are added to the emum in the device name that supports the device containing fram instead of eepm New 3 Three memory views are added Fixed 1 Download retry error when an error is returned during downloading Emulator OS which cause no response Fixed 2 Register view tab style is back to the original Fixed 1 Register RO recovery bug at a specific computer that used a serial communication Fixed 2 Display a hidden option likes a mem option Fixed 3 A Hardware board reset detect by current PC mismatch case Fixed 4 Include lib file path that project option menu can a relative path Fixed 5 GUI support a mem file parsing for a new linker option Fixed 6 No more used mc option in compiler option Fixed 7 Bug in local variables view in some map file project Fixed 1 Register RO recovery bug Fixed 2 Assembler error message counter option bug Fixed 3 project include path using from debug mode in case of release mode bug Fixed 1 break point set in S3FC9UB Fixed 2 Download problem in S3CC9E4 Fixed 3 Header file dependency bug in make menu New Modified to support a n
28. pport at and overlay keyword Ex int i 2 _at_ 0x20000 overlay Property of Samsung Electronics Co Ltd 7 ELECTRONICS System LSI Division Semiconductor Business Fixed Wrong implicit conversion for arithmetic expression for variables that have unsigned char type Ex gt include lt stdio h gt unsigned short a 2 1 2 unsigned short p amp a 1 void main void unsigned char n 1 m 2 pt n m The expression n m should be dealt with int type even if they is unsigned char type if p a 0 printf fail n Fixed Warning is generated about static variable that is referenced over optimization level 1 Ex gt static int i void foo void i 1 warning generated static int i is not referenced Fixed parameter passing is incorrect when calling function pointer with variable argument Ex gt void var_para const char void fpt const char void foo void fpt var_para fpt dafdkf 1 All parameters should be passed by stack instead of register Fixed Crush occurs when calling absolute address Ex void foo void 1 void int Ox10 1 Fixed LDW Rn An mm imm odd number ADD An mm LDW Rn An Fixed expression 0x3E 3 has compile error Fixed If compile error occur then delete output z file Fixed bug fixed with ms and igcode iggeneric option F
29. rupt_irq_novector Ex making the fig handler without vector oragma functionzinterrupt fiq novector void fiq handler void Fixed When variable s definition follows the definition of function and there is the function s declaration sorting variables for the address optimization is incorrect It occurs only over the optimization level 1 Ex include lt stdio h gt int a0 char c4 void foo void void main void declaration void main void body of function defined before the definition of variables a2 a0 1 c4 2 foo a2 0 if c4 2 printf fail n int a2 When a variable s definition follows the definition of function and there is the function s declaration sorting variables for the address optimization is incorrect void foo void 10 Property of Samsung Electronics Co Ltd ELECTRONICS System LSI Division Semiconductor Business Fixed In the expression that a variable which has the long type is masked with the value Oxffff its result takes incorrectly the value of higher word instead of lower word only when the corresponding temporary register has been spilled due to the absence of allocable register It occurs only over the optimization level 1 Ex include lt stdio h gt typedef struct char c static SS ssArr 1 int 0x81100 static SS ss amp ssArr static void func unsigned int i unsigned int j if j 12 0x1100 printf fail n
30. sing the keyword _at Ex gt code int arr 10 2 _at_ 0x10000 0x10000 is the address of ROM Property of Samsung Electronics Co Ltd 13 ELECTRONICS System LSI Division Semiconductor Business Fixed When some initialized and un initialized variables are defined together within the same data seg of pragma the section of the variables is generated incorrectly Ex pragma memory data_seg DATASEC int uninitialized_data0 should have zdata section attribute int initialized_data 7 should have idata section attribute int uninitialized datal should have zdata section attribute All variables defined with pragma should be initialized additionally in cstartup oragma memory default Fixed When over optimization level 1 accessing a global variable it is accessed through the wrong calculated address It occurs only when 1byte structure is set as the base for global variable access Ex include lt stdio h gt typedef struct char bit0 BITFIELD_ONESIZE typedef struct char c STRUCT ONESIZE BITFIELD ONESIZE bf amp bf 0x200058 STRUCT ONESIZE st amp st 0x200059 int i amp I 0x20005A void main void st c 0 st isset as base for global variable access i 0x1122 but I is accessed by wrong calculated address amp st 42 if i 2 0x1122 printf fail n Fixed The operation of option code is wrong A initial va
31. tion file MD file from V1 56aS The linker combines input sections from one or more object and library files to create executable image HEX and HXD files The generated output file can be viewed as group of regions with every region having different or same load and run address MD file mechanism enables user to specify memory map of an image to the linker It gives complete control over grouping and placement of regions MD file can be used for complex memory maps where code and data must be placed into different areas of memory It can be used when device has different types of memories Image regions are placed in the system memory map at load time Before you can execute the image you might have to move some of its regions to their execution addresses For example initialized RW data IDATA might have to be copied from its load address in ROM ILOAD to its execution address in RAM MD file can be provided to linker with md lt file gt or 7 file options Invocation gt Calmlink16 md filename other options lt object files Where filename is name of the MD file which is an ASCII text file Option md and the filename must be separated by a space or tab But alternative 7 can be specified without space or a tab Following invocations are valid gt Calmlink16 7 filename other options object files gt Calmlink16 7 filename other options obj ect files gt Calmlink16 md filename other options
32. tten register information of code Library gen2 a push operation was missed for some register Fixed 1 When the pointer type variable is used also as integer type through explicit type casting and the variable is spilled incorrect code was generated for accessing the spilled An register in release mode Fixed 2 Optimizer parsing error was occurred in release mode Fixed At Optimize Level 2 Incorrect optimization was applied For the spilled local variable The loading from stack before each operation for the variable was eliminated incorrectly Fixed It could be a crash at optimizing time when z contains the long input line more than 280 characters New There was some redundant copy without being optimized at the following pattern From this version following 2 register move can be removed LD Ra Eb D Eb Ra gt this copy can be removed Just version name is changed Fixed The program is compiled at optimize level 1 works incorrectly works well at level 0 Access instructions for long type ROM data were incorrect Fixed There is a crash at optimizing An assertion error occurred at spilling a register Fixed The program is compiled at optimize level 1 works incorrectly works well at level 0 Access instructions for long type ROM data were incorrect Fixed 1 Optimizer has removed A8 initialization as base control register at even interrupt pragma routine
33. z in string concatenation is supported Version number changed for release Build message is properly printed on DOS console Modified error directive ignored by the CPP New Macros with null arguments have been supported Fixed Bug in send message to UI function has been removed New 1 If EOF is inside multi line comment then only generate error If it is inside single line comment then no error or warning New 2 Change in Hine format HineNUM gt Aine NUM New 3 Supported CALM8 dCALM16 and__CALM32__ pre defined macros New 4 Changed maximum number of include paths to 255 Fixed Do not print Hine for multi line comment if multi line comment is on single line 1 Maximum number of include paths to 255 2 Maximum number of arguments in f file option to 259 1 Argument length in f filename is changed to MAX PATH from 100 2 Change in Hine format HineNUM gt Hine NUM 3 Supported CALM8 dCALM16 and CALM32 pre defined macros J ust build the CPP with appropriate defined for that target 4 2 2 Compiler CalmCC16 dll Released date Version Comments Fixed fixed stack overflow problem Fixed fixed crashing problem with generic keyword Fixed fixed switch case bug when case value is negative Fixed fixed crashing problem when address optimization is performed the value which is declared as extern is declared after function definition New Su

SWL Release Note: CalmSHINE16 V1.56i Release History

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