(V850E/IA3, V850E/IA4, V850ES/IK1, V850ES/IE2) AN
Contents
1. NEC Manual for Using Sample Program Functions Clock Generator V850E IA3 V850E IA4 V850ES IK1 V850ES IE2 This manual explains the sample program functions of the clock generator for the V850E IA4 microcontroller The explanations are based on usage with the V850E IA4 microcontroller Refer to this manual when using the V850E IA3 V850ES IK1 and V850ES IE2 microcontrollers Caution This sample program is provided for reference purposes only and operations are therefore not subject to guarantee by NEC Electronics Corporation When using this sample program customers are kindly advised to sufficiently evaluate this product based on their system before usage Document No U18242EJ1VOANOO 1st edition Date Published November 2006 N CP K NEC Electronics Corporation 2006 NOTES FOR CMOS DEVICES VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction If the input of the CMOS device stays in the area between Vit MAX and Vis MIN due to noise etc the device may malfunction Take care to prevent chattering noise from entering the device when the input level is fixed and also in the transition period when the input level passes through the area between Vi MAX and Vin MIN HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction If an input pin is unconnected it is possible that an internal input level may be generated due2. Manual for Using Sample Program Functions Timer P V850E IA3 V850E IA4 U18238E V850ES IK1 V850ES IE2 Application Note Manual for Using Sample Program Functions Timer Q V850E IA3 V850E IA4 U18239E V850ES IK1 V850ES IE2 Application Note Manual for Using Sample Program Functions Timer ENC V850E IA3 V850E IA4 U18240E Application Note Manual for Using Sample Program Functions Port Functions V850E IA3 V850E IA4 U18241E V850ES IK1 V850ES IE2 Application Note Manual for Using Sample Program Functions Clock Generator V850E IA3 V850E IA4 This manual V850ES IK1 V850ES IE2 Application Note Manual for Using Sample Program Functions Standby Functions V850E IA3 V850E IA4 U18243E V850ES IK1 V850ES IE2 Application Note Manual for Using Sample Program Functions Interrupt Functions V850E IA3 V850E IA4 U18244E V850ES IK1 V850ES IE2 Application Note Manual for Using Sample Program Functions A D Converters 0 and 1 V850E IA3 U18245E V850E IA4 V850ES IK1 V850ES IE2 Application Note Manual for Using Sample Program Functions A D Converter 2 V850E IA3 V850E IA4 U18246E Application Note 5 Application Note U18242EJ1VOAN Clock generator CONTENTS PE LS ueta AAE 7 Clock generator Glock monitormode a EE tete at EE a a i e atarie 11 6 Application Note U18242EJ1VOAN Clock generator PLL mode Function Function name Argument Processing content Starting method SFR used call functions
3. connectable external clock input prohibited Fixed to multiplication by eight fxx 20 to 32 MHz Application Note U18242EJ1VOAN 2 5 MHz resonator connectable external clock input prohibited Fixed to multiplication by eight fxx 20 MHz Related Documents The related documents indicated in this publication may include preliminary versions However preliminary versions are not marked as such Documents related to V850E IA3 V850E IA4 V850ES IK1 and V850ES IE2 V850ES IE2 Hardware User s Manual U17716E U17338bE U17324E Inverter Control by V850 Series Vector Control by Hole Sensor Application Note Inverter Control by V850 Series Vector Control by Encoder Application Note Inverter Control by V850 Series 120 Excitation Method Control by Zero Cross Detection U17209E Application Note Manual for Using Sample Program Functions Serial Communication UARTA U18233E V850E IA3 V850E IA4 V850ES IK1 V850ES IE2 Application Note Manual for Using Sample Program Functions Serial Communication CSIB V850E IA3 U18234E V850E IA4 V850ES IK1 V850ES IE2 Application Note Manual for Using Sample Program Functions DMA Functions V850E IA3 V850E IA4 U18235E Application Note Manual for Using Sample Program Functions Timer M V850E IA3 V850E IA4 U18236E V850ES IK1 V850ES IE2 Application Note Manual for Using Sample Program Functions Watchdog Timer V850E IA3 V850E IA4 U18237E V850ES IK1 V850ES IE2 Application Note
4. ON devices with reset functions have not yet been initialized Hence power on does not guarantee output pin levels I O settings or contents of registers A device is not initialized until the reset signal is received A reset operation must be executed immediately after power on for devices with reset functions POWER ON OFF SEQUENCE In the case of a device that uses different power supplies for the internal operation and external interface as a rule switch on the external power supply after switching on the internal power supply When switching the power supply off as a rule switch off the external power supply and then the internal power supply Use of the reverse power on off sequences may result in the application of an overvoltage to the internal elements of the device causing malfunction and degradation of internal elements due to the passage of an abnormal current The correct power on off sequence must be judged separately for each device and according to related specifications governing the device INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I O pull up power supply while the device is not powered The current injection that results from input of such a signal or I O pull up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements Input of signals during the power off state must be judged separately for each device and accordin
5. Variable Interrupt Interrupt source File name Caution Function name Processing content SFR used call function Variable File name Caution Sets the clock frequency by setting the CPU operation clock PLL mode and the PCC register which is a special register pll main None Calls the PLL setting function by stopping all DMAs in use None None clock pll mode clock pcc mode None None None clock generator1 c Note that if the pll main function is called the maskable interrupt request will not be enabled El clock pll mode Sets to PLL mode by the PLLCTL register PLLCTL 0x03 Sets to PLL mode None None clock generator1 c None 7 Application Note U18242EJ1VOAN Function name clock pcc mode Processing content Sets the PCC register by forcibly terminating DMA transfer SFRs used DCHCO TCO DMAO transfer status bit DCHCO E00 1 Enables DMAO transfer DCHCO INITO 1 Forcibly terminates DMAO transfer DCHC1 TC1 DMAt transfer status bit DCHC1 E11 1 Enables DMA1 transfer DCHC1 INIT1 1 Forcibly terminates DMAT transfer DCHC2 TC2 DMA2 transfer status bit DCHC2 E22 1 Enables DMA transfer DCHC2 INIT2 1 Forcibly terminates DMA transfer DCHC3 TC3 DMAS transfer status bit DCHC3 E33 1 Enables DMAS transfer DCHC3 INIT3 1 Forcibly terminates DMAS transfer PRCMD 0x00 Writes to command register used when writing to a special register PCC 0x0
6. communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots Special Transportation equipment automobiles trains ships etc traffic control systems anti disaster systems anti crime systems safety equipment and medical equipment not specifically designed for life support Specific Aircraft aerospace equipment submersible repeaters nuclear reactor control systems life support systems and medical equipment for life support etc The quality grade of NEC Electronics products is Standard unless otherwise expressly specified in NEC Electronics data sheets or data books etc If customers wish to use NEC Electronics products in applications not intended by NEC Electronics they must contact an NEC Electronics sales representative in advance to determine NEC Electronics willingness to support a given application Note 1 NEC Electronics as used in this statement means NEC Electronics Corporation and also includes its majority owned subsidiaries 2 NEC Electronics products means any product developed or manufactured by or for NEC Electronics as defined above MOE 02 11 1 3 Application Note U18242EJ1VOAN Cautions 1 Download the program used INTRODUCTION in this manual http www necel com from the NEC Electronics Website 2 When using this sample program reference
7. to noise etc causing malfunction CMOS devices behave differently than Bipolar or NMOS devices Input levels of CMOS devices must be fixed high or low by using pull up or pull down circuitry Each unused pin should be connected to Voo or GND via a resistor if there is a possibility that it will be an output pin All handling related to unused pins must be judged separately for each device and according to related specifications governing the device PRECAUTION AGAINST ESD A strong electric field when exposed to a MOS device can cause destruction of the gate oxide and ultimately degrade the device operation Steps must be taken to stop generation of static electricity as much as possible and quickly dissipate it when it has occurred Environmental control must be adequate When it is dry a humidifier should be used It is recommended to avoid using insulators that easily build up static electricity Semiconductor devices must be stored and transported in an anti static container static shielding bag or conductive material All test and measurement tools including work benches and floors should be grounded The operator should be grounded using a wrist strap Semiconductor devices must not be touched with bare hands Similar precautions need to be taken for PW boards with mounted semiconductor devices STATUS BEFORE INITIALIZATION Power on does not necessarily define the initial status of a MOS device Immediately after the power source is turned
8. 0 Selects clock as fxx call function None Variable None File name clock generator1 c Caution e DMA transfer is forcibly terminated in this sample program because all DMA transfers must be terminated before performing data setting to the special register e Set the PCC register after switching to the PLL mode The PCC register is a special register and can therefore only be written in a combination of specific sequences 8 Application Note U18242EJ1VOAN Clock generator PLL mode 1 2 pll main Disables maskable interrupt request clock pll mode PLL mode setting function clock pcc mode PCC register setting function PRERR 1 Checks protection error flag 9 Application Note U18242EJ1VOAN PLL mode setting function clock pll mode PLLCTL 0x03 ret Sets CPU operation clock to PLL mode Clock generator PLL mode 2 2 PCC register setting function clock pcc mode TCO 0 amp amp E00 INITO 1 TC1 0 amp amp E11 Checks DMAO transfer Forcibly terminates DMAO Checks DMA1 transfer Forcibly terminates DMA1 TC2 0 amp amp E22 INIT2 1 TC3 0 amp amp E33 1 Checks DMA2 transfer Forcibly terminates DMA2 Checks DMAS transfer Forcibly terminates DMA3 PRCMD 0x00 Writes to command register PCC 0x00 Selects clock as fxx NOP instruction x 5 Inserts five NOP instructions ret 10 Ap
9. ation in this document are provided for illustrative purposes in semiconductor product operation and application examples The incorporation of these circuits software and information in the design of a customer s equipment shall be done under the full responsibility of the customer NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits software and information e While NEC Electronics endeavors to enhance the quality reliability and safety of NEC Electronics products customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely To minimize risks of damage to property or injury including death to persons arising from defects in NEC Electronics products customers must incorporate sufficient safety measures in their design such as redundancy fire containment and anti failure features e NEC Electronics products are classified into the following three quality grades Standard Special and Specific The Specific quality grade applies only to NEC Electronics products developed based on a customer designated quality assurance program for a specific application The recommended applications of an NEC Electronics product depend on its quality grade as indicated below Customers must check the quality grade of each NEC Electronics product before using it in a particular application Standard Computers office equipment
10. g to related specifications governing the device 2 Application Note U18242EJ1VOAN These commodities technology or software must be exported in accordance with the export administration regulations of the exporting country Diversion contrary to the law of that country is prohibited The information in this document is current as of July 2006 The information is subject to change without notice For actual design in refer to the latest publications of NEC Electronics data sheets or data books etc for the most up to date specifications of NEC Electronics products Not all products and or types are available in every country Please check with an NEC Electronics sales representative for availability and additional information No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics NEC Electronics assumes no responsibility for any errors that may appear in this document NEC Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products No license express implied or otherwise is granted under any patents copyrights or other intellectual property rights of NEC Electronics or others e Descriptions of circuits software and other related inform
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12. plication Note U18242EJ1VOAN Clock generator Clock monitor mode Function Function name Argument Processing content Starting method SFR used call function Variable Interrupt Interrupt source File name Caution Performs clock monitor operation clock monitor main None Enables operation of the clock monitor mode by calling the clock monitor mode function None None clock monitor mode None None None clock generator2 c Note that if the clock monitor main function is called the maskable interrupt request will not be enabled El Application Note U18242EJ1VOAN 11 Function name Processing content SFRs used call function Variable File name Cautions clock monitor mode Sets the operation mode of the clock monitor via the CLM register by forcibly terminating DMA transfer DCHCO TCO DCHCO E00 DCHCO INITO DCHC1 TC1 DCHC1 E11 DCHCt1 INIT1 DCHC2 TC2 DCHC2 E22 DCHC2 INIT2 DCHC3 TC3 DCHC3 E33 DCHC3 INIT3 PRCMD CLM None None DMAO transfer status bit 1 Enables DMAO transfer 1 Forcibly terminates DMAO transfer DMAt transfer status bit 1 Enables DMAt transfer 1 Forcibly terminates DMA1 transfer DMA 2 transfer status bit 1 Enables DMA transfer 1 Forcibly terminates DMA transfer DMAS transfer status bit 1 Enables DMAS transfer 1 Forcibly terminates DMAS transfer 0x01 W
13. rites to command register used when writing to a special register 0x01 Sets to operation enable clock generator2 c e DMA transfer is forcibly terminated in this sample program because all DMA transfers must be terminated before performing data setting to the special register e The CLM register is a special register and can therefore only be written in a combination of specific sequences 12 Application Note U18242EJ1VOAN Clock generator Clock monitor mode 1 2 clock monitor main Disables maskable interrupt request Clock monitor mode setting clock monitor mode PRERR 1 Checks protection error flag 13 Application Note U18242EJ1VOAN Clock generator Clock monitor mode 2 2 Clock monitor mode setting clock monitor mode No TCO 0 amp amp E00 INITO 1 TC1 0 amp amp E11 1 INIT1 1 TC2 0 amp amp E22 Checks DMAO transfer Forcibly terminates DMAO No Checks DMAt transfer Forcibly terminates DMA1 No Checks DMA2 transfer Yes INIT2 1 Forcibly terminates DMA2 No TC3 0 amp amp E33 INIT3 1 PRCMD 0x01 Writes to command register CLM 0x01 Enables clock monitor operation NOP instruction x 5 Inserts five NOP instructions Checks DMAS transfer Forcibly terminates DMA3 14 Application Note U18242EJ1VOAN For further information please contact NEC Electronics Corporation 1753 Shimonumabe Na
14. the following startup file and link directive file and adjust them if as necessary e Startup file e Link directive file Conventions Hardware name Function Function name Argument Processing content Starting method SFR s used call function s Variable s Interrupt s Interrupt source s File name Caution s Product Differences IA4 start s IAA link dir The function lists are structured as follows Function description Name of sample function Type and overview of argument Processing content of sample function Conditions for calling a function Register name and setting content Name and function of call function s Type name and overview of variable s used in sample function Name of function Name Name of corresponding sample program file Caution s upon function usage The differences between the V850E IA4 and the V850E IA3 V850ES IK1 and V850ES IE2 related to the clock generator are shown below V850E IA4 V850E IA3 V850ES IK1 V850ES IE2 Resonator Multiplication function by PLL clock synthesizer PLL operation specifiable by PLLSIN pin Remark Doc 4 to 8 MHz resonator connectable external clock input prohibited Fixed to multiplication by eight fxx 32 to 64 MHz System clock frequency 4 to 8 MHZ resonator connectable external clock input prohibited Fixed to multiplication by eight fxx 32 to 64 MHz 4 2 5 to 4 MHZ resonator
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