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NTAG I2C Explorer Kit user`s manual

1. NDEF_DATA_READ RO 12C_LOCKED RF_LOCKED RO Read NC_REG Write NC_REG Read SM_REG Write SM_REG SRAM_I2C_READY RO Sse ee nesses eeeenssenenasseenen rrtt a prrrrrrrerirery Ty sssssssssssssssssssessssssssssesa SRAM_RF_READY RO EEPROM_WR_ERR EEPROM_WR_BUSY RO RF_FIELD_PRESENT RO Read All Figure 54 Session register Read I2C STR Read NS_REG Write NS_REG 4 4 3 Session register details Table 3 provides an explanation of the session register name abbreviations Table 3 Session register details NC REG OxEE 0 IZEsRSTZONIORE PAR RUSONEO EE FD_OFF FD_ON SRAM_MIRROR_ON_ OFF NTAG Configuration Register located at block OxFE byte O When checked enables soft reset through 1 C repeated start Used to allow combined read write operations without releasing the bus and in this way guaranteeing that the data transfer is not interrupted When this feature is enabled if the microcontroller does not issue a STOP condition between two START conditions this situation will trigger a reset of the C interface and hence may hamper communication via the 12C interface Note that the NTAG Explorer software does not issue a STOP condition between two START conditions so enabling this feature will automatically trigger a reset when the software attempts to communicate with the NTAG device When checked enab
2. 10 References 45 10 1 NTAG I C datasheet 45 10 2 NXP NTAG Antenna Design Guide Application Note 45 10 3 NDEF 45 10 4 I C Serial Bus Specification 45 10 5 Microcontrollers 46 11 About NXP 46 12 Legal 47 4 1 Definitions 1 1 Nomenclature and acronyms For convenience sake the following shortcut names and acronyms are used in the document gt Explorer Board NXP NTAG I C Explorer Board see 2 1 1 gt Reader Board USB based PN544 NFC transceiver board see 2 1 1 gt Peek and Poke NTAG C Explorer Peek and Poke see 2 1 2 1 2 Antenna classes defined The ISO IEC standard describes six antenna classes Class 1 through Class 6 which refer to their form factor and size For an NFC tag NXP recommends using Class 3 through Class 6 The following describes these recommended form factors sizes For more information see the NTAG Antenna Design Guide Application Note AN11276 1 2 1 Class 3 antennas A Class 3 antenna shall meet the requirements of being located within a zone defined as see Figure 2 gt An external rectangle of 50 x 40 mm gt An internal rectangle of 35 x 24 mm centered in the external rectangle with 3 mm corner radii OR gt An external circle with diameter of 50 mm gt An internal circle with diameter of 32 mm concentric with the external circle 50mm 32mm R 3mm PICC antenna zone PICC antenna zone Figure 2 Class 3 antenna specified zones 1 2 2 Class 4
3. antennas A Class 4 antenna shall meet the requirements of being located within a zone defined as see Figure 3 gt An external rectangle of 50 x 27 mm gt An internal rectangle of 35 x 13 mm centered in the external rectangle with 3 mm corner radii OR gt An external circle with diameter of 41 mm gt An internal circle with diameter of 24 mm concentric with the external circle NXP NTAG I C Explorer Kit user s manual 41mm 24mm R 3mm PICC antenna zone PICC antenna zone Figure 3 Class 4 antenna specified zones 1 2 3 Class 5 antennas A Class 5 antenna shall meet the requirements of being located within a zone defined as see Figure 4 gt An external rectangle of 40 5 x 24 5 mm gt An internal rectangle of 25 x 10 mm centered in the external rectangle with 3 mm corner radii OR gt An external circle with diameter of 35 mm gt An internal circle with diameter of 18 mm concentric with the external circle 35mm s 18mm R 3mm PICC antenna zone PICC antenna zone Figure 4 Class 5 antenna specified zones 1 2 4 Class 6 antennas A Class 6 antenna shall meet the requirements of being located within a zone defined as either a rectangle of dimensions 25 x 20 mm or a circle of 25 mm diameter see Figure 5 25mm gt 25mm gt Figure 5 Class 6 antenna specified zones NXP NTAG I C Explorer Kit user s manual 2 NXP NTAG C Expl
4. NT3H1101 18 HAK 2C Address 012345678 9ABCDEF i 0X230 User memory R W i Ox240 User memory RAN L 0x250 User memory RAW 0x260 User memory R W 0x270 User memory R W Ox280 User memory R W iu 0X290 User memory R V i X2A0 User memory RAW i 0x250 User memory R W OX2C0 User memory RAW 0x200 User memory R W 0x20 User memory RAW Ox2F0 User memory RAW 0300 User memory RAW iu 0x310 User memory RW 0320 User memory RAN 0x330 User memory RAW L 0x340 User memory RAW 0350 User memory R W 04360 User memory RAW 0370 User memory R W a 0x380 User memory og 0x340 Configuration RAW L OMFAQ SRAM RAN 0xFBO SRAM R W 4 OxFEO Session registers S S8 amp 8 8 amp 8 8 amp 6 amp amp 5 82888 8 amp amp amp 8 Bin EF GHtIiJa4 88883888888888 s ss23883883888u 3 8883838888888833 s 38388388888 al 8888888888888 8Hs28s888888 8 SY RBREREBRESRBESRREREBR s 2 8 8 83 8 88 83 8 3 88 s 23 3 3 3 33 3 sie 88888888888 siss s8388 83888muH ssssssesBlsessegseee8 ssssssssssseseesHsesssssses8eu sss LJ Session Configuration Registers Registers E USB Logging Disabled Clear C oa S 3383888888888 8BJssse3s8888 8ni eS eS amp amp 8888888888 8 ssssessssesesssHsssssssesesou a ateteteteleteleteleieieteme EU HID LE hardware detected Flag Detect low j NTAG selected address ACF
5. ED OFRE Pull down menu to select definition of when the Field Detect pin output stays high gt OOb in the event no RF field is present gt 01b in the event no RF field is present or the NTAG has been set to the HALT state gt 10b in the event no RF field is present or the last page of the NDEF message has been read as defined in LAST_NDEF_BLOCK register gt 11b in the event no RF field is present or if the last data has been read by the I C interface where pass through mode is in the RF gt I C direction or if the last data has been written by the 12C interface where pass through mode is in the I C gt RF direction FD ON Pull down menu to select event for which the Field Detect pin will be brought low gt OOb in the event an RF field is present gt 01b in the event an RF field is present AND the first valid Start of Frame SoF has been received gt 10b in the event an RF field is present AND the tag has been selected gt 11b when in pass through mode in the RF interface gt I C interface direction and data is ready for reading at the I C interface OR when in pass through mode in the C interface gt RF interface direction and data is read by the RF interface SRAM_MIRROR_ON_ When checked enables SRAM mirror mode OFF NXP NTAG I C Explorer Kit user s manual 36 Pi RUDI Defines the data flow direction for pass through mode If pass through has been enabled PTHRU_ON_OFF 1 gt Ob from the C int
6. I C Explorer Kit user s manual 16 2 Touch one of the Board Configuration buttons Red Blue or Green on your mobile device under the LED tab on the home screen The NTAG Icon will change color indicating the color selection Figure 20 Figure 21 and Figure 22 and the NTAG I C Explorer board LED will illuminate in the chosen color Red LED Green LED Figure 22 Green LED board configuration selection 3 3 2 Reading board input to demonstrate I C to RF communication The three colored and numbered buttons Red 1 Green 2 and Blue 3 on the Explorer board demonstrate information from the board being transferred from the microprocessor through the I C serial bus to the NTAG I C tag chip which then sends it via the RF field to the mobile device for display When pressed each colored and numbered button on the Explorer board will cause a corresponding numbered box on the mobile device to display in the appropriate color NXP NTAG I C Explorer Kit user s manual 17 Board configuration Red J s ah Figure 23 Reading board input red button Figure 24 Reading board input green button Board configuration ee F ra E Board input Tomperatura 24 61 C 78 237 Energy Harvesting Voltage Figure 25 Reading board input blue button 3 3 3 Temperature sensor The Explorer board displays ambient temperature unless one touches the temperature sensor Hold a fin
7. NFC USB Reader board comes with firmware loaded into the microprocessor If newer versions are available they will be located in the Explorer kit page under www nxp rfid com ntag i2c To load the firmware 1 Locate your USB cable Connect the micro USB cable connector end to the Reader board and the USB end to your PC Simultaneously hold down the SW1 RESET and SW2 ISP buttons on the Explorer board Release the RESET first Release the ISP second The Reader board will now appear as a disk named CRP DISABLED on your computer Click Open the folder to view files on the CRP DISABLED disk and delete the current firmware bin Drag and copy the new file to the CRP DISABLED file directory Eject the CRP DISABLED disk Reconnect the USB cable to the PC The software will install and the board should be ready to operate Oo eS S Verify that the new firmware version has been loaded correctly by starting the NTAG I C Demo application and placing the Explorer Board antenna on the NFC USB Reader board antenna If operational the Explorer board will harvest energy from the mobile device and NTAG I C Explorer will display on the LCD screen 2 2 8 Download NTAG FC demo GUI for PC software In order for the NFC USB Reader to emulate the Android phone you must download the NTAG_I2C_Binaries folder available in the Explorer kit page under www nxp rfid ntag i2c Ensure that you have downloaded the latest firmware version to the NFC USB Reader board s
8. Speed test EEPROM configuration 3 6 Config tab The Config Tab allows the user to read tag memory reset tag memory to its default read session registers and read from or write to configuration registers For explanation of the tag memory configuration reference the data sheet For more information about the session and configuration registers please see Sections 4 4 3 and 4 4 5 Selecting the Config tab will bring up the landing screen shown in Figure 33 From this screen the user may select to Read Tag Memory Reset Tag Memory Read Session Registers or Read Write Config Registers a AA nt LETITI Read tag memory Reset tag memory lite Af 1 e a oy Read Write Config Registers Figure 33 Config tab landing screen NXP NTAG I C Explorer Kit user s manual 23 3 6 1 Reading tag memory To read the tag memory 1 Select Read Tag Memory from the Config Tab Landing screen A screen similar to that shown in Figure 34 will display 2 Tap the mobile device to the tag antenna 3 The two note tone indicating NFC communication will sound and the screen will display the entire memory contents See Figure 35 The user should tap the mobile device to the NTAG I C tag chip for some time about 2 to 3 seconds to read the memory content Tap tag to read configuration registers Figure 34 Tap to read screen Figure 35 Read tag memory selection results 3 6 2 Resetting tag memory The reset
9. a Bluetooth pairing type message it is important to remember that the MAC address shall be 6 bytes in hexadecimal therefore 12 characters from 0 to F To NDEF format the NTAG I C tag chip or write new data 1 Remove the mobile device from the antenna 2 Select Write NDEF from the tab on the right of the mobile device screen 3 Type a message into the NDEF message area Or alternatively touch Write default NDEF message on your screen which uses Text type as default and will enter the words NTAG I C EXPLORER in the text window see Figure 27 4 Lay the mobile device onto the antenna 5 When you hear the two note tone indicating NFC communication check the screen A proper write will result in a message on the mobile device indicating write tag successfully done NXP NTAG I C Explorer Kit user s manual 19 Leo NOEF M_M A Ez Ee Tap tag to wrie NDEF message o Toxt URI STPair NTAG I2C EXPLORER Text window Touch to fill text window with default words NTAG I2C EXPLORER Figure 27 Default NDEF entry option Select Write NDEF Tap tag to wrie NDEF message Text URI 8TPair tenereet NTAG I2C EXPLORER I La d La R S u Type NDEF message Arce aeta NOEF message Figure 28 Writing NDEF data to NTAG I C tag chip 3 4 2 Reading NDEF data To read an NDEF formatted NTAG C tag chip 1 Rem
10. be available to the application until the demonstration has executed at least once Note that the NTAG logo is grey and Choose option is displayed The explorer board LCD will be blank and the LED will be dark At this point there is no power to the Explorer board Touch the i to verify version installed Grey logo indicates Blank LCD indicates no option selected no power Tap tag to read configuration CLASS 4 REV C Figure 18 Default Explorer and mobile phone app home screens NXP NTAG I C Explorer Kit user s manual 15 To begin the demonstration lay your mobile device onto the antenna If properly communicating and sound on your mobile device is turned on you will hear a two note tone indicating NFC communication The NTAG device board will harvest power from the RF field and deliver it to the Explorer board to power up the microprocessor which illuminates the LCD with the text NTAG I2C Explorer on the first line and the harvested voltage and temperature readings on the second line Figure 19 iT Green t ET hy Board in Tap beg iLE feed eoediguration ee i Figure 19 Explorer board receiving power from NTAG I C via power harvest function 3 3 LED tab The LED Demo shows in an intuitive way the Energy harvesting and Pass through mode features of the NTAG I C device The Energy harvesting functionality allows the NTAG I C tag chip to power up the microcontroller with
11. difficult case HTC The HTC phone antenna is harder to couple to for three reasons its small size its location surrounding the camera lens and because it is behind metal see Figure 65 where the orange shape indicates the antenna form factor In this case using the smaller NTAG I C Class 6 antenna see Figure 66 which approximates the shape of the HTC phone s antenna results in the best coupling and communication If you would like to experiment try using the NTAG I C Class 4 antenna board and note the more inefficient coupling this selection provides NXP NTAG I C Explorer Kit user s manual 42 Note slit in metal case to pass NFC signal Antenna NFC antenna location Back of the HTC phone Inside back cover Figure 65 HTC NFC antenna location NFC antenna location CLASS 6 REV C NTAG I C Explorer Board with Class 6 antenna See through view of HTC phone Figure 66 NTAG I C Class 6 antenna coupled to an HTC phone NXP NTAG I C Explorer Kit user s manual 9 Appendix B Application processing details 9 1 LED application As the LEDs display and GUI require updating the process performs iteratively several times in a second At each iteration 1 The application writes the appropriate information into the SRAM of the NTAG It writes which LED color should be shown 61 0x01 red color 0x03 green color 1 NDEF displayed 2 The microcontroller reads the SRAM updating the LE
12. easy case and a more difficult one The easier case Samsung Galaxy 5 The Samsung Galaxy 5 has a large antenna located in the battery pack The orange shape shown in Figure 63 illustrates the approximate antenna form factor The best coupling results when using a similarly sized NTAG I C antenna which in this case would be the Class 4 version If using a Class 4 antenna is not feasible try to line up at least two sides of the antenna when using the Class 5 or Class 6 options see Figure 63 where the green shape indicates a Class 5 antenna form factor NXP NTAG I C Explorer Kit user s manual Note Near Field Communication Class 5 antenna form factor Class 4 antenna form factor Figure 63 Samsung Galaxy 5 antenna location back cover removed Figure 64 shows use of the NFC RF detector board as described in Using the NFC RF Detector Board step 2 to locate the best point of coupling for the Samsung Galaxy 5 where one makes a note of how the LED lines up with the phone display and begins with the same orientation when using the NTAG I C board p NFC RF Detector gt gt ii _____ Board LED aligns Boema men en above Board input nn ee ees Board input Tap tag to read configuration eo ale NTAG I C tag chip on antenna board in approximate position as LED Figure 64 Samsung Galaxy 5 optimal coupling antenna location The more
13. function resets the memory of the NTAG I C tag chip to the original content programmed in it during production sets the fifth page of the EEPROM memory to a known value the capability container and the rest of the memory to zero 1 Select Reset Tag Memory from the Config Tab Landing screen A screen similar to that shown in Figure 34 will display 2 Tap the mobile device to the tag antenna The user should tap the NTAG I C device for some time about 2 to 3 seconds to reset the memory content A dialog is displayed on the screen as long as the operation goes on 3 Upon successful reset a banner indicating completion will display along the bottom of the screen see Figure 36 If not successful remove the mobile device from the antenna and try again NXP NTAG I C Explorer Kit user s manual 24 Figure 36 Reset tag memory window 3 6 3 Reading session registers Session registers are used to configure or monitor the registers values of the current communication session Session register values can be modified within a particular communication session However after Power On Reset these values return to the default configuration values Session register values can be read in Pages F8h to F9h sector 3 via RF or block FEh via the I C serial bus However they can only be written via the I C serial bus For further information about the session registers bytes please consult the NTAG I C tag chip datasheet To read the tag
14. low cost development tool platform for the LPC MCUs such as the LPC 11U24 including a target board with integrated m debug probe plus debug ribbon cable and supported by an Eclipse based AMO integrated development environment NXP NTAG I C Explorer Kit user s manual 3 Contents NFC communication NTAG I C Explorer Kit contents 1 Definitions 1 1 Nomenclature and acronyms 1 2 Antenna classes defined 1 2 2 Class 4 antennas 1 2 3 Class 5 antennas 1 2 4 Class 6 antennas 2 NXP NTAG I C Explorer Kit Contents and Setup 2 1 Kit contents 2 1 1 Kit hardware 2 1 1 1 Explorer board 2 1 1 2 NFC antennas 2 1 1 3 NFC USB Reader board 2 1 1 4 NFC RF detector board 2 1 1 5 USB to micro USB cable 2 1 1 6 LPC Link2 debug board 2 1 2 Kit software 2 2 System requirements and setup 2 2 1 NFC phone compatibility 2 2 2 PC details 2 2 3 Enabling NFC on Android device 2 2 4 Location of NFC antenna 2 2 5 NFC enabled phone APK 2 2 6 NTAG C Explorer board firmware load 2 2 8 Download NTAG I C demo GUI for PC software 3 NTAG I C Demoboard Android phone application 3 1 Splash window 3 2 Default home screens and power harvesting 3 3 LED tab 3 3 1 Configuring board to demonstrate RF to I C communication 3 3 2 Reading board input to demonstrate I C to RF communication 3 3 3 Temperature sensor 3 4 NDEF tab 3 4 1 Writing NDEF data 3 4 2 Reading NDEF data 3 4 3 Displaying NDEF on the Explorer board LCD 3 5 Speed tab 3
15. 03 00 FE 00 CO 0 Q Atk Gf FD_ON 000 o Ob or 10b if the field amp switched off 1D Ow AONAIR VAA COSI INE OO FCT NE OU OOb by feki or Otte by frst vad Start of Frame Ga by selection of the tag lt Lik nas hh ce gt TAC if the data is ready to be read from the 20 interface Pass though mode 120 gt RF if the data is read by the RF interface SRAM_MIRROR_ON_OFF Enables SRAM mirror mode PTHRU_DIR Defines the data fow for the Pass through mode Ob From L2C to RF interface 1b From RF to 20 interface os j cen Dre pass Coes mode u mt ambled Ob No WRITE access from the RF ade T2C_CLOCK_STR Ow3a 5 7 Write Config 7 120_CLOCK_STR Enabled Read Config Tose Figure 56 Session and configuration register help screens NXP NTAG I C Explorer Kit user s manual 37 5 USB NFC Reader Use the USB NFC Reader when an NFC enabled mobile device is not available or when you require more power than a mobile device can provide To start the demo Ensure that you ve loaded all of the latest firmware and software required see Sections 2 2 6 through 2 2 9 Connect the Reader board to the PC using the USB cable Navigate to where you have installed the PC GUI software NTAG_I C_Demo and double click on it A window emulating an Android device screen should appear on your monitor see Figure 57 w YS Board configuration Green Choose option F Display NDEF message Board input Temperature 25 50 C 7
16. 4 I C Serial Bus Specification To understand more about the I C serial bus protocol please see gt I C Serial Bus and User Manual Application Note from NXP http www nxp com documents user_manual UM10204 pdf NXP NTAG I C Explorer Kit user s manual 45 10 5 Microcontrollers To learn more about the Explorer kit s microcontrollers and their use as a development tool please visit gt LPCXpresso development tool platform www nxp com lpcxpresso gt Software and support for NXP MCUs http www lpcware com gt LPC Link2 debug probe http www pcware com Ipclink2 11 About NXP NXP Semiconductors NASDAQ NXPI a global semiconductor company with operations in more than 25 countries is a key supplier of LF HF NFC and UHF RFID solutions as well as a provider of High Performance Mixed Signal products For more information visit www nxp rfid com or to contact NXP see nxp rfid com contact NXP NTAG I C Explorer Kit user s manual 46 12 Legal Disclaimers Limited warranty and liability Information in this document is believed to be accurate and reliable However NXP Semiconductors does not give any representations or warranties expressed or implied as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information In no event shall NXP Semiconductors be liable for any indirect incidental punitive special or consequential damages including without limitatio
17. 5 1 SRAM board configuration 3 5 2 EEPROM configuration 3 6 Config tab 3 6 1 Reading tag memory 3 6 2 Resetting tag memory NXP NTAG I C Explorer Kit user s manual gt Oo oun OW N CON NNN 10 10 11 11 11 12 12 12 13 13 14 15 15 15 16 16 17 18 19 19 20 21 21 22 22 23 24 24 3 6 3 Reading session registers 25 3 6 4 Reading writing configuration registers 26 4 NTAG C Explorer Peek and Poke GUI 27 4 1 Peek and Poke GUI software installation 27 4 2 NTAG I C Explorer Peek and Poke GUI overview 28 4 3 GUI top control bar details 29 4 3 1 Device selection 29 4 3 2 Memory block selection 29 4 3 3 Read and write controls 30 4 3 4 C device address and scanning 30 4 3 5 IC clock frequency 31 4 3 6 Changing NTAG I C tag chip memory contents 31 4 4 NTAG C Explorer lower left screen controls 32 4 4 1 USB data logging 32 4 4 2 Session register 33 4 4 3 Session register details 34 4 4 4 Configuration registers 35 4 4 5 Configuration register details 36 4 4 6 Help screens for session and configuration registers 37 5 USB NFC Reader 38 6 LPC Link2 debug board 39 7 Summary 39 8 Appendix A Optimal NFC phone placement 40 8 1 Using the NFC RF Detector Board 40 8 2 Selecting an NTAG I C antenna board 41 The easier case Samsung Galaxy 5 41 The more difficult case HTC 42 9 Appendix B Application processing details 44 9 1 LED application 44 9 2 Speed test process 44 9 2 1 SRAM 44 9 2 2 EEPROM 45
18. 7 90 F Voltage 2 78 mV Tap tag to read session a 2 3 registers X nj Android back arrow emulation Figure 57 NFC USB reader gui start up screen Figure 58 Tap screen with browser back arrow After launching your NTAG_I C_Demo GUI the operation is almost identical to that of the Android application discussed in Section 3 The GUI will indicate when to tap the reader to the Explorer board see Figure 58 In reality you can just pick up the Explorer board Antenna pair and lay it back down so that the Explorer antenna lies over the Reader board antenna Note also the back arrow on the GUI that emulates the same function on an Android mobile device Note Sometimes the Demo UI application fails to detect the reader and indicates No Reader Found when launched First try unplugging the USB cable from the PC and reinserting it If that does not work try rebooting your computer Then relaunch the demo GUI NXP NTAG I C Explorer Kit user s manual 38 6 LPC Link2 debug board NXP offers LPCXpresso a low cost development tool platform that provides a quick way to develop advanced applications using NXP s highly efficient and low power LPC microcontrollers such as the LPC 11U24 used in the Explorer tools Its low cost target board the LPC Link2 is an extensible stand alone debug adapter that can be connected to virtually any development board and which supports a broad variety of development tools and integr
19. Ds and displays accordingly 3 For buttons pressed on the Explorer board the microcontroller writes the corresponding content to the SRAM 62 Isb red button pushed third Isb blue button pushed 5057 voltage value voltage at sensor 4 Finally the application reads that information and updates the GUI The application also sends back the temperature and voltage previously received from the board because the computing power of a smartphone or PC is much higher than that of the Explorer board microprocessor Therefore the board sends directly the values obtained from the voltage and temperature sensors to the application and the application calculates the actual values of the temperature and voltage and sends them back in ASCII to the board This way it sends back the temperature in Celsius in bytes 40 to 43 the temperature in Fahrenheit in bytes 45 to 49 and the voltage in bytes 56 and 57 9 2 Speed test process 9 2 1 SRAM The Speed Test begins as soon as the user taps the NTAG I C tag antenna At this point the application writes a message in the SRAM indicating to the microcontroller that it will start the SRAM Speed Test and waits until the microcontroller indicates that is ready through the session registers of the NTAG I C The application then begins to write 64 byte blocks with all bytes set to zero to the SRAM memory as many times as indicated by the user After each time it writes to the SRAM it recalculates the CRC32 wit
20. Figure 51 USB data logging control When a read or write message transmits over USB the contents of the message displays in the console below the checkbox see Figure 52 Report Output Report ID Total Bytes Transaction identifier Session identifier HIO I2C Request I2C txLength noth we p I2C rxiengtn options I2C Address OxX63 OXEF Oxe Figure 52 USB data logging NXP NTAG I C Explorer Kit user s manual 32 The USB HID message totals 65 bytes in length 1 Report ID byte and 64 data bytes Although 65 bytes are sent received in every USB transaction the logging report only shows the data used by the USB I C hardware The following data is displayed Total Bytes the number of actual data bytes used for the message 0x19 or 25d Transaction identifier value is not critical and is not used Session identifier value is not critical and is not used HID I C Request use 0x05 which is an I C serial bus write read request IC txLength number of data bytes to write to the I C serial bus IC rxLength number of data bytes to read from the I C serial bus Options Ox00 No special options required I C Address displays the I C serial bus address of the NTAG I C tag chip Note that this is a 7 bit address with the read write bit appended I C Subaddress displays the memory block address of the NTAG I C tag chip gt I C Data O Data 15 there are always 16 data bytes provided whenever data is sen
21. NTAG l C Explorer Kit TIn aE NFC communication Near Field Communication NFC is a short range intuitive wireless connectivity specifically designed and engineered to provide zero power operation and maximize privacy at very low cost Because they function as wireless dual port memories NFC connected tags packaged NFC devices that include a hardwired bus interface are useful in any application that can take advantage of data transfer between an embedded system and an external reader writer e g an NFC enabled mobile device In fact NFC connected tags enable exciting new capabilities for applications ranging from home automation to home appliances health care tracking to utility monitoring zero power electronic product configuration to zero effort consumable goods replenishment the long touted Internet of Things actually come to life but with greater privacy protection and lower cost than other approaches NTAG I C connected tag chip The NTAG I C tag chip the first connected product of NXP s NTAG family offers both contactless NFC Forum compliant and contact I C serial bus interfaces see Figure 1 If it has an external power supply or by using its embedded energy harvesting feature to power itself the NTAG I C device can communicate with a microcontroller or other C compatible device via its IC serial bus The NTAG I C device contains two memory types gt EEPROM memory compliant with the NFC Forum Type 2 Tag impleme
22. NXP NTAG I C Explorer Software Installation to C Program Files x86 NXP Semiconductors NXP NTAG I2C Figure 41 Select destination folder location NXP NTAG I C Explorer Kit user s manual 27 After the installation process has completed a shortcut icon will be available on the Windows desktop see Figure 42 ue NTAG IC Explorer Figure 42 NTAG I C Explorer icon Start the software by double clicking on the shortcut icon Alternatively locate the program under All Programs or by navigating to the destination folder location chosen and double clicking on the executable 4 2 NTAG I C Explorer Peek and Poke GUI overview Upon software start up the GUI shown in Figure 43 will display on the PC screen The top bar see Figure 43A contains most of the GUI controls which are described in the paragraphs below The left column lists the NTAG memory locations by hexadecimal address with each line representing 16 bytes of data for example the highlighted row covers addresses from 0x2CO through Ox2CF see Figure 43B The center column displays the contents of those addresses in hexadecimal format with one entry for each two bytes The right column displays the ASCII representation of the data listed in the center column As an example in Figure 43 the hexadecimal numbers 45 through 4A have been entered into the addresses corresponding to 0x2C9 though Ox2CE respectively Glancing at the right column one can see that this r
23. Q Pe Watchdog time out 20 000ms pene REG_LOCK 0x3A 6 presence SRAM_MIRROR_ON_OFF 12C_LOCKED V PTHRU_DIR RF_LOCKED T2C_CLOCK_STR 0x3A 5 Write Config 12C_CLOCK_STR Enabled Read Config Close Figure 55 Configuration register 4 4 5 Configuration register details Table 4 provides a more detailed explanation of the configuration registers Table 4 Configuration register details NC_REG 0x3A 0 or Ox7A 0 NTAG Configuration Register located at 0x3A 0 for the NT3H1101 and 0x7A 0 for the NT3H1201 2C RSI ONT OFE When checked enables soft reset through 1 C repeated start Used to allow combined read write operations without releasing the bus and in this way guaranteeing that the data transfer is not interrupted When this feature is enabled if the microcontroller does not issue a STOP condition between two START conditions this situation will trigger a reset of the I C interface and hence may hamper communication via the 12C interface Note that the NTAG Explorer software does not issue a STOP condition between two START conditions so enabling this feature will automatically trigger a reset when the software attempts to communicate with the NTAG device PTARUZONTORE When checked enables the pass through mode of the NTAG chip where data passes from the RF interface through the SRAM to the I C serial bus interface and vice versa to avoid affecting the write cycle limitations of the NTAG EEPROM
24. as well as the item s described herein may be subject to export control regulations Export might require a prior authorization from competent authorities Trademarks Notice All referenced brands product names service names and trademarks are property of their respective owners NXP NTAG I C Explorer Kit user s manual 47 www nxp com 2014 NXP BV All rights reserved Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner The Date of release September 2014 information presented in this document does not form part of any quotation or contract is believed to be accurate and reliable and Published in the USA may be changed without notice No liability will be accepted by the publisher for any consequence of its use Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights
25. ated design environments via downloadable firmware images The LPC Link2 includes a standard 10 pin JTAG SWD connector a 20 pin JTAG SWD ETM connector and analog digital and serial expansion headers making it a highly extensible platform For more information about this platform visit www nxp com lpcxpresso Using the provided ribbon cable developers can download code through the JTAG SWD interface on the Explorer board to its LPC 11U24 microcontroller With this available debug adapter the Explorer board becomes a development platform for NTAG I C device applications JTAG Serial Analog digital LPC LI N K2 LPC4380 target connector connector EE Dubugging target JP2 Open Target is self powered Closed Target powered by LPC Link2 LPCXpresso JTAG target header O MM Dubugging LPC4370 JP1 Open Boot from USB DFU Closed Boot from SPI Flash JTAG SWD Trace for Digital for target target connector Figure 59 LPC Link2 debug board 7_ Summary The NTAG I C Explorer demonstration kit facilitates understanding of the many features of the NXP NTAG I C tag chip and its potential for application in a wide variety of products With the purchase of the optional LPC Link2 debug board the demonstration kit additionally provides a development platform for application designers NXP NTAG I C Explorer Kit user s manual 39 8 Appendix A Optimal NFC phone placement It sometimes take
26. bles SRAM mirror mode NXP NTAG I C Explorer Kit user s manual 34 PTHRU_DIR LAST_NDEF_BLOCK OxFE 1 SRAM_MIRROR_BLOCK OxEEZ WDT OxFE 4 and OxFE 3 2C CLOCK STR 0xFES NS REG 0XFE 6 NDEF_DATA_READ 2C LOCKED RE LOCKED SRAM_RF_READY SRAM_I2C_READY EEPROM_WR_ERR EEPROM_WR_BUSY RES PlIELDSPRESENT Defines the data flow direction for pass through mode If pass through has been enabled PTHRU_ON_OFF 1 gt Ob from the I C interface gt the RF interface gt 1b from the RF interface gt the I C interface If pass through has not been enabled PTHRU_ON_OFF 0 gt Ob No write access from the RF side Allows input of the address for the last page of the NDEF message SRAM mirror lower page address in 4 page granularity gt 1h is page 4h first page of User Memory gt 2h is page 8h 3h is page Ch gt gt 74h is 1DOh Watchdog Timer Because it is possible that the host can keep the I C serial bus locked for a longer period it is possible to program a watchdog timer to unlock the 1 C host from the tag so that the RF reader can access the tag The host itself will not be notified of this event directly but the NS_REG register see Session Register descriptions is updated accordingly the register bit I2C_LOCKED will be cleared The default value is set to 20 ms 848h but the user can set the watchdog timer from 0001h 9 43 us up to FFFFh 617 995 ms The timer starts ticking when the commu
27. ect More Settings 3 Under Wireless and Network scroll down to the NFC option and make sure this feature is on swipe button to the right until it illuminates green io Wireless and networks Meteori Airplane mode Mobile networks Tethering and portable hotspot char ur che yi Ss mobile dal wn vee USB W or Bluetooth Networks Pie Filetdaia traveler NEC Make sure NFC Allow data exchange when W data exchange ee is enabled Figure 15 Enabling NFC on mobile phone 2 2 4 Location of NFC antenna The location of the NFC antenna varies from phone to phone It s helpful both in using the tool and in debugging to know exactly where the location is for the phone you are using For example in the Samsung Galaxy IIl phone the NFC antenna is located in the battery By lining up two sides of the battery with two sides of the NFC antenna traces more successful NFC communication is possible see Figure 16 With these two edges I SAMSUNG Line up these two edges Note mobile phone shown upside down flip phone over when attempting communication CLASS 4 REV C Figure 16 Best placement for successful NFC communication with Samsung Galaxy IIl mobile phone NXP NTAG I C Explorer Kit user s manual 12 Note For details about where to locate the NFC antenna for other phones see Appendix A Or alternatively use the supplied RF detector see Section 2 1 1 4 to find the strongest RF source location on your
28. ee 2 2 7 Ensure that you have successfully installed the Vcom Drivers see 2 2 8 Download the NTAG_I C_Binaries folder to a PC subdirectory of your choice Unzip it Locate the NTAG_I C Demo exe file and double click on it When properly launched you should see a small window that emulates a mobile device screen oO ge ee i a NXP NTAG I C Explorer Kit user s manual 14 3 NTAG I C Demoboard Android phone application The Android application is intended to operate on devices running Android version 4 0 and beyond The application has been optimized for a correct visioning of the graphical elements in smartphones featuring different resolutions 3 1 Splash window The Splash window see Figure 17 is the first activity to be displayed when the application is launched This window will automatically close after 2 seconds Figure 17 Splash window 3 2 Default home screens and power harvesting After the Splash window closes the screen shown in Figure 18 will appear This screen allows the user to launch the LED demo NDEF demo Speed Test Demo and access the configuration functionalities supported by the application Ensure that you have the latest copy of Explorer board firmware installed by touching the information circle at the upper right of the home screen Note because the board microprocessor shares the firmware version of the board with the application when performing the LED demonstration see 3 3 this information will not
29. egisters from the Config Tab Landing screen A screen similar to that shown in Figure 34 will display Upon successful read a screen similar to that shown in Figure 38 will display Note the blue Read Config banner at the top of the screen This indicates the active selection To write to the configuration registers remove the mobile device from the antenna and touch Write Config The screen shown in Figure 39A will display Register contents are controlled either via dropdown menus Figure 39B direct input e g number pad see Figure 39C or by slider controls where grey indicates off and blue indicates on Figure 39D PP NTAG 12C Demo IC Product NXP NTAG 12C 2K User memory 1904 Byles gt FIELD DETECTION Y PASS THROUGH Functionality ts OFF Direction FAF tone Write fom AF is Y SRAM MEMORY SETTINGS Last NDEF Page is SRAM Mirror is SRAM Meror block is Y 12C SETTINGS WD_LS Timer is WO_MS Timer is 12C Clock stretch is PY NTAG 126 Demo Y GENERAL CHIP INFORMATION IC Product User memory FIELD DETECTION FOLOFF is 006 field seatched off b field switched off Dib field switched off of sei to HALT 10b field switched off of LAST_HOEF_PAGE Vib field switthed off of Dara is read write Y i2c SETTINGS WOLS Temer ts WO_MES Tirner is 26 Check sirach is NXP NTAG I C Explorer Kit user s manual MP NTAG 12C Demo Y GENERAL CHIP INFORMATION IC Froduci User me
30. energy obtained from the RF interface Using this energy the microcontroller executes its code and switches on the LEDs using zero external consumption as long as the NFC mobile device is in close proximity The Pass through mode allows fast bidirectional communication between the NFC mobile device and the NTAG I C Explorer board On one side the Android board configuration application transmits the user selected color red blue or green to the NTAG I C Explorer microcontroller On the other side the NTAG I C Explorer microcontroller transmits the voltage and temperature measured in its sensors and the identifiers of the buttons pressed color and number to the Android device The Android application displays this information in the Board Input section of the LED tab screen 3 3 1 Configuring board to demonstrate RF to fC communication The board configuration part of the demonstration shows how the NTAG I C tag chip passes a command from the RF input through the I C serial bus interface output to the microprocessor which in turns acts upon the command and lights the appropriate LED 1 Lay your mobile device on the antenna When properly placed the two note NFC communication tone will sound the LCD will display the NTAG IC Explorer text the harvested voltage and it will also indicate the temperature sensed by the board in this case ambient The mobile device displays the same information with one digit more resolution NXP NTAG
31. epresents the letters E through J Location 0x2F has the hexadecimal value 61 entered see Figure 43C and it highlights in blue as it is the currently active location Note that the corresponding entry in the right column shows the ASCII character a see Figure 43D and highlights in grey The bottom bar of the GUI also lists the active selected address see Figure 43E The bar at the bottom of the GUI indicates presence or absence of any connected NTAG I C hardware In this case the Explorer board is present and the software detects it notifying the user with HID_I2C hardware detected see Figure 43F NXP NTAG I C Explorer Kit user s manual 28 we NTAG C Explorer Pla i 04210 User memory RW Hu 220 User memory R W 0x230 User memory RW 0x240 User memory RAW 0x250 User memory RANN 0x260 User memory RAN Ox 70 User memory RAN i Ox280 User memory R W 0x290 User memory RAW OxZA0 User memory RAN m s A Write All Read All Write Block Read Block Sata ve 8 888w g 28888888 8888 00 00 00 00 00 00 00 O 00 00 00 00 00 00 E FGOHIJa oo oO oo oO a oo l oo oo oo oo oo g0 oo oo 00 oo g oo 00 00 o User memory E 0x3A0 Configuration R W i OXFBO SRAM R W i OXF90 SRAM R W i OXFAQ SRAM RAA OXFBO SRAM R W H OxFEO Session registers 00 oo 00 oo oo 00 oo g oo 00 00 00 00 oo o0 00 00 S
32. erface gt the RF interface gt 1b from the RF interface gt the I C interface If pass through has not been enabled PTHRU_ON_OFF 0 gt Ob No write access from the RF side SRAM_MIRROR_BLOCK SRAM mirror lower page address in 4 page granularity Ox3A 2 or Ox7A 2 gt 1h is page 4h first page of User Memory gt 2h is page 8h gt 3h is page Ch gt a gt 74h is 1DOh I2C_CLOCK_STR 0x3A 5 or When checked lsb set to 1 this register enables IC clock stretching see C serial bus Ox7A 5 specification for clock stretching details 4 4 6 Help screens for session and configuration registers For quick explanations for any of the registers listed under the session and configuration register screens click on the small blue question mark see Figure 56A This action will bring up a help screen describing the register in a bit more detail see Figure 56B 12C_RST_ON_OPT Enables soft reset through 120 repeated start PTHRU_ON_OFF Enables data transfer use of SRAM FD_OFF defines the evenit upon which the sgnal ouput on the FD pin it brought up O Wate an Read Al Seset OOD if the Seld is switched off Data Data Oli if Gre etd ie enticed off or the tng is ont to ihe HALT siala 1 10b if the feld is switched off or the last page of the NOEF message has been read defined in oa 2 3 a 5 f GSi ON oo a B 11i FO GN gt pa po ofer F ee oe Er RF gt 12C or last data is written by 12C in Pass through mode 12C O01
33. ession Configuration Registers Registers ssesesesss SSES S888 8 amp 8 8 F8 01 00 00 HID_I2C hardware detected Flag Detect low o 00 oo i 00 00 00 00 00 oo 00 00 s 00 00 00 i oo 00 00 00 00 00 00 00 01 00 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 33 34 35 36 37 36 3A F8 S Figure 43 NTAG I C Explorer initial screen 4 3 GUI top control bar details 4 3 1 Device selection There are two versions of the NTAG I C tag chip supported by the software From the drop down menu see Figure 44 select either the NT3H1101 or NT3H1201 The difference between the two devices is the amount of user memory available the NT3H1101 contains 1kB of user memory while the NT3H1201 contains 2kB of user memory f Device Type NT3H1201 2 kB ka Figure 44 Device selection 4 3 2 Memory block selection The memory in the NTAG I C tag chip is configured in 16 byte data blocks The software displays the memory block organization by hexadecimal address on the left side of the user interface To examine the contents of a memory block the user can click on that memory block in the left column For example in Figure 45 the memory in block 0x000 contains the I C Address the serial number Internal Data Lock Bytes and the Capability Container With the exception of the IC address these names refer to the static memory structure required of an NFC Forum Type 2 Tag such a
34. ger on the sensor and watch the temperature display immediately indicate the rising temperature over ambient The temperature displays both in the LCD and also on the mobile device under Board Input This operation demonstrates the NTAG I C tag chip operating in pass through mode where data passes through its SRAM It is also another demonstration of passing data from the microprocessor through the C serial bus to the NTAG I C tag chip which in turn sends the data through the RF interface for display on the mobile device NXP NTAG I C Explorer Kit user s manual 18 LEG DEF SEG Board configuration a Pta ji A P ba ragi aie f l p E 4 a i I i gt ie Board input Temperature 30 68 C 87 38 F Energy Harvesting Volaga 28V a a Figure 26 Temperature sensor demonstrates SRAM pass through mode 3 4 NDEF tab The NDEF tab demonstrates reading and writing of NDEF content to the NTAG I C tag chip 3 4 1 Writing NDEF data In the Write NDEF mode the application allows the user to write a Text type URI type or Bluetooth pairing type NDEF message URI type NDEF messages allow NFC tags to trigger actions on an NFC device usually a smartphone such as opening a webpage or sending an SMS message Bluetooth pairing NDEF messages contain information about a Bluetooth device that allow the smartphone to pair with that Bluetooth device by just tapping the tag In the case of writing
35. h the new data sent and if the Polling Mode is active it waits until the microcontroller has finished reading the SRAM At the end in the last block the application sends a message indicating that it is the last one and it also sends the CRC32 calculated in the last 4 bytes The NXP NTAG I C Explorer Kit user s manual 44 microcontroller checks the integrity of the data by comparing the CRC32 received with the one calculated from the data received Once this first phase has finished the microcontroller begins writing 64 byte blocks all zeros again to the SRAM In Polling Mode the application waits for the microcontroller to finish writing while in Fast Mode it reads as fast as it can In the last block the microcontroller sends the CRC32 calculated in the last four bytes The application checks the integrity of the data by comparing this CRC32 with the one calculated from the data received Once the test has finished both the application and the microcontroller indicate whether the integrity check was successful through a green LED at the microcontroller and the application shows the time mean speed and data transferred for both directions 9 2 2 EEPROM The application creates the NDEF message to be written by creating a string that contains the content from the textbox as many times as indicated and adding the appropriate header The application then writes the created NDEF message to the EEPROM memory by sending as many NFC F
36. ip is OxAA The user can change the I C serial bus address by writing to memory location 0x000 The software locks the value of the I C serial bus address to OxAA unless it is unlocked by pressing the lock icon shown in Figure 47 Note The software does not use the value shown at memory location 0x000 in the data grid when programming block 0 The value in the edit box overrides the value in the grid This approach ensures that the user does not accidentally change the value NXP NTAG I C Explorer Kit user s manual 30 Br 12C Address aa Scan Figure 47 NTAG C tag chip address To determine which I C serial bus address has been programmed into the NTAG I C tag chip use the Scan button to find a device on the bus After pressing the Scan button the software will begin looking for an acknowledgement on the I C serial bus When it detects an acknowledgement the scanning process will stop and software will display the detected address as shown in Figure 48 Place this address in the I C Address box as shown in Figure 47 DC Device found at address OxAA Figure 48 I C serial bus address scanning 4 3 5 IC clock frequency Change the IC serial bus clock frequency by selecting a data rate from the drop down box as shown in Figure 49 The maximum data rate supported by the NTAG I C tag chip is 400kHz favo tte le Figure 49 I C serial bus clock selection 4 3 6 Changing NTAG IC tag chip memory contents Change the contents
37. les the pass through mode of the NTAG chip where data passes from the RF interface through the SRAM to the I C serial bus interface and vice versa to avoid affecting the write cycle limitations of the NTAG EEPROM Pull down menu used to select definition of when the Field Detect FD pin output stays high gt OOb in the event no RF field is present 01b in the event no RF field is present or the NTAG has been set to the HALT state gt 10b in the event no RF field is present or the last page of the NDEF message has been read as defined in LAST_NDEF_BLOCK register gt 11b in the event no RF field is present or if the last data has been read by the I C interface where pass through mode is in the RF gt I C direction or if the last data has been written by the I C interface where pass through mode is in the C gt RF direction Pull down menu used to select the event for which the Field Detect FD pin will be brought low gt OOb in the event an RF field is present gt 01b in the event an RF field is present AND the first valid Start of Frame SoF has been received gt 10b in the event an RF field is present AND the tag has been selected gt 11b when in pass through mode in the RF interface gt C interface direction and data is ready for reading at the C interface OR when in pass through mode in the C interface gt RF interface direction and data is read by the RF interface When checked ena
38. loped the NTAG I C Explorer Kit an all in one demonstration development resource for NFC connected tag chips By including a full complement of hardware and software tools users can not only investigate the capabilities of the chip through the various demonstrations but also develop and test their own applications with purchase of the optional LPC Link2 debug probe NXP s NTAG I C Explorer Kit supports interactive demonstrations and enables exploration of all NTAG I C tag chip capabilities for both the hardware designer and the application developer Optionally the addition of the LPC Link2 Debugger probe kit allows easy debugging of code ported directly in the NTAG I C Explorer Board facilitating custom applications Table 1 NTAG I C Explorer Kit components NFC Antennas NTAG I C tag chips mounted on a variety of different antenna types Class 4 5 and 6 FR4 PCB based with separate antenna pads for custom antenna use as well as a Class 6 Flex board based tag for easier product insertion testing and with built in I C serial bus interface connectors NTAG 26 Demo NXP NTAG I C Explorer Kit user s manual 2 Table 1 NTAG I C Explorer Kit components NTAG I C packaged samples NFC RF Detector Board An RF detector with visual LED output to facilitate location of the optimum RF field or to ensure that NFC has been enabled USB micro USB cable Optional LPC Link2 debug probe The LPC Link2 debug probe is a
39. mar FIELD DETECTION gt PASS THROUGH SRAM MEMORY SETTINGS Last MIDEF Page is SRAM himor ix SRAM Miror block 0 26 4 NTAG I C Explorer Peek and Poke GUI The Peek and Poke software enables users to examine and control NTAG I C register contents The USB hardware uses the HID class so no additional drivers need to be installed to use the software allowing plug and play functionality 4 1 Peek and Poke GUI software installation To begin the software installation process double click on the NXP NTAG I C Explorer Software Installation zip file The installer see Figure 40 will guide you through the installation process JE NXP NTAG C Explorer Software Installation InstallShield Wizard Welcome to the Install Wizard for NXP NTAG T C Explorer Software Installation a n The Install Wizard will install NXP NTAG I2C Exploter Software Installation on your computer To continue dick Next A f y WARNING This program is protected by copyrightlawand international treaties 7 P a yf Figure 40 NTAG I C Explorer installation screen The installation file defaults to the directory C Program Files x86 NXP Semiconductors NXP NTAG I7C If you prefer some other location enter it when asked see Figure 41 J8 NXP NTAG C Explorer Software Installation InstallShield Wizard Destination Folder Click Next to install to this folder or dick Change to install to a di t Install
40. n lost profits lost savings business interruption costs related to the removal or replacement of any products or rework charges whether or not such damages are based on tort including negligence warranty breach of contract or any other legal theory Notwithstanding any damages that customer might incur for any reason whatsoever NXP Semiconductors aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document including without limitation specifications and product descriptions at any time and without notice This document supersedes and replaces all information supplied prior to the publication hereof Suitability for use NXP Semiconductors products are not designed authorized or warranted to be suitable for use in life support life critical or safety critical systems or equipment nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury death or severe property or environmental damage NXP Semiconductors accepts no liability for inclusion and or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and or use is at the customer s own risk Applications Applica
41. nication between the NTAG C and the I C interface starts If the communication with the C is still going on after the watchdog timer expires the communication will continue until it completes Then the status register I2C_ LOCKED will be immediately cleared When checked Isb set to 1 this register enables C clock stretching see I C serial bus specification for clock stretching details NTAG Session Register located at block OxFE byte 6 Indicates that all data bytes have been read from the address specified in LAST_NDEF_BLOCK Disables access to the configuration registers from the I C serial bus interface Disables access to the configuration registers from the RF interface Indicates that data is ready in the SRAM for the RF interface to read Indicates that data is read in the SRAM for the I C interface to read HV voltage error during EPP cycle via I C host Indicates whether or not the EEPROM is active gt 1b EEPROM write cycle is active access to the EEPROM is disabled Ob access to EEPROM for write cycle is possible RF field is detected Edit the contents of the Configuration Registers see Figure 55 by pressing the Configuration Registers button refer to Figure 53 at the bottom left of the screen or by clicking in the grid on memory block 0x3A for the NT3H1101 and Ox7A for the NT3H1201 NXP NTAG I C Explorer Kit user s manual J5 ID Configuration Registers NC_REG 0x3A 0 A WDT 0x3A 4 3
42. ntation gt 64 byte SRAM memory which is mapped within the EEPROM memory and powered externally Without an external power supply the NTAG I C tag chip can communicate via its RF interface as a passive NFC tag and because it contains EEPROM store data for later retrieval via the I C serial bus Under power the SRAM memory supports a Pass Through mode that allows fast download and upload of data from the RF interface to the I C interface and vice versa without affecting the EEPROM access limitations essentially creating a wireless RF to connected IC serial bus bridge The NTAG I C device can also use its energy harvesting feature to supply power to external low power devices such as microcontrollers for zero external power operation A separate configurable Field Detection pin provides an external trigger depending on the activities at the RF interface avoiding processor cycle consuming polling schemes and delivering additional application flexibility tagrc E iC Lops ofs fe Energy harvesting Data Field detection Data Energy Energy Figure 1 NTAG I C tag chip contact and contactless interfaces NXP offers the NTAG I C product in two different versions the NTAG I C 1K version with 888 bytes freely available in the user memory and the NTAG C 2K version with 1904 bytes freely available in the user memory NTAG I C Explorer Kit contents To demonstrate the unique properties of the NTAG I C tag chip NXP deve
43. oard controlled by an NXP LPC11U24 microprocessor to enable using a PC for the NFC tag read write functionality uy 7 az 108 77 Ti NX USB EXPLORER REV A Figure 11 PN544 NFC transceiver board NXP NTAG I C Explorer Kit user s manual 9 2 1 1 4 NFC RF detector board An RF detector with visual LED output to facilitate location of the optimum RF field or to ensure that NFC has been enabled Illumination of LED indicates presence kee me of RF field A Ni NFC RF DETECTOR Figure 12 NFC RF detector board 2 1 1 5 USB to micro USB cable Cable to use with the NTAG C Explorer board when using supporting Peek and Poke software see 2 1 2 or to use with the transceiver board for the simulated mobile device graphical user interface Figure 13 USB to micro USB cable 2 1 1 6 LPC Link2 debug board An optional low cost development tool platform for the LPC MCUs such as the LPC 11U24 including a target board see Figure 14 with integrated debug probe plus debug ribbon cable and supported by an Eclipse based integrated development environment NXP NTAG I C Explorer Kit user s manual 10 Figure 14 LPC Link2 debug board 2 1 2 Kit software Supporting software also comes with the NTAG I C Explorer Kit This software consists of the following components gt NTAG I C Demoboard An Android mobile phone application to enable use of an NFC enabled mobile phone as an NFC transceiver for the dem
44. of the NTAG I C tag chip memory by entering hexadecimal values in the middle of the grid or alternatively by entering ASCii characters in the right side see Figure 50 Changing the values in one side of the grid will automatically change those values in the other side Note The software does not automatically send data to the NTAG C tag chip memory when the data in the grids change The user must click the Send Data button to update the memory o a 2 3 4 5 6 7 8 9 a 8 c p e 6 o 2 2 3 4 5 6 7 s 9 a elc plelF 00 04 SE AA 14 00 00 00 00 44 00 OA o oc o OF Lill m2 9 D ae ax Ol 01 03 00 FE 00 00 00 00 00 00 00 00 00 00 00 00 00 L 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 00 01 02 03 04 05 06 07 08 09 OA OB OC OD OE OF a tlsl l lelg 29 AX 04 50 20 53 65 6D 69 63 GF GE 64 75 63 74 GF NXP Semiconducto 05 72 73 20 4 54 41 47 2D 49 32 43 OD 00 00 00 00 rs NTAG 12C Figure 50 NTAG I C tag chip memory display NXP NTAG I C Explorer Kit user s manual 31 4 4 NTAG I C Explorer lower left screen controls 4 4 1 USB data logging To determine what data is actually being transmitted over the USB connection select the USB Logging Enabled checkbox at the bottom left of the main GUI screen see Figure 51A for the checkbox location Note USB Data Logging does affect the amount of time required to Write All or Read All so if speed is important disable Logging me NTAG FC Explorer i Device Type nran 3
45. onstration development kit The Android application is intended to operate on devices running Android version 4 0 and beyond The application has been optimized for a correct visioning of the graphical elements in smartphones featuring different resolutions and is available from the Google Play Store gt NTAG I C Demo GUI A PC based GUI application to emulate the Android phone screen for users of the NFC USB Reader board gt NTAG I C Explorer Board Firmware Firmware for the NTAG C Explorer board microprocessor which supports the demonstration functionality of the hardware gt NTAG I C Explorer Peek and Poke A PC based software tool which developers can use to view the EEPROM SRAM contents in an NXP Semiconductors NT3H1101 1 Kbyte or NT3H1201 2 Kbyte NTAG 1 C tag chip This software allows users to read from and write to the memory in the NTAG C tag chip via the I C serial bus interface as well as control the Session and Configuration registers Because developers can also read from or write to the NTAG I C tag chip memory via the RF interface for example by using an NFC enabled mobile phone the tool supports bidirectional communication verification between the I C serial bus and RF interfaces This capability is very useful for debug purposes when developing independent applications that must communicate through the NTAG I C tag chip For example software running on a microcontroller embedded in a printed circuit board I C
46. orer Kit Contents and Setup 2 1 Kit contents The NXP NTAG C Explorer is a hardware software tool developers can use to understand the NXP NTAG I C tag chip functionality and demonstrate its potential for other applications The kit includes Table 2 NTAG I C Explorer Kit contents NTAG I C Explorer development demo board with Class 4 antenna Px Mellel Android mobile app downloadable from Google Playstore NTAG IC sample ICs NFC RF detector board 2c Windows based GUI app for users without an NFC mobile device 2 1 1 Kit hardware 2 1 1 1 Explorer board NXP NTAG I C Explorer board LCD mounted above a small PCB populated with an NXP LPC11U24 microprocessor NTAG I C tag chip interface connector JTAG SWD debug connector RGB LED NXP PCT2075 temperature sensor micro USB connector and five push button controls JTAG SWD connector lt NTAG PC connection MicroUSB f l s EISIITIT RGB LED ie i 4 alts f J a ba f s oF r L J it 1 i Lt 3 j ie l P Pi iL i 4 n ka E a ra kis 3 b m i i i l r i i Caa a Temperature Red Green Blue Reset ISP sensor control control control Figure 6 Explorer Board components NXP NTAG I C Explorer Kit user s manual 7 2 1 1 2 NFC antennas Class 4 antenna Class 4 FR4 antenna board NTAG I C integrated circuit IC mounted with a Class 4 NFC antenna and a connector for the NTAG C IC connections of FD Field Detect Vo
47. orum standard type 2 tag Write commands as necessary and measuring the time it takes to do so Once it has finished writing it reads the NDEF message by sending as many NFC Forum type 2 tag Read commands as necessary Here it is important to note that because the Write command writes bytes 4 by 4 and the Read command reads 16 by 16 usually the read bytes are more than the written bytes see NFC Forum Type 2 Tag Operation Specification 10 References 10 1 NTAG I C datasheet gt http www nxp com documents data_sheet NT3H1101_1201 pdf 10 2 NXP NTAG Antenna Design Guide Application Note gt NTAG Antenna Design Guide Application Note AN11276 10 3 NDEF In order to understand more about the different types of NDEF messages and their structures please refer to the following NFC Forum specifications gt NFC Data Exchange Format NDEF Technical Specifications gt NFC Record Type Definition RTD Technical Specification gt NFC Text RTD Technical Specification gt NFC URI RTD Technical Specification gt NFC Forum Connection Handover Technical Specification gt Bluetooth Secure Simple Pairing Using NFC These specifications can be found by visiting gt http nfc forum org our work specifications and application documents specifications nfc forum technical specifications gt http nfc forum org our work specifications and application documents application documents 10
48. ove the mobile device from the antenna Select Read NDEF from the tab on the right of the mobile device screen 2 3 Lay the mobile device onto the antenna 4 When you hear the two note tone indicating NFC communication check the screen A proper read will result in a message on the mobile device indicating read tag successfully done See Figure 29 If the tag chip has not been NDEF formatted placing the mobile device on the antenna will result in a message NTAG I C product is not NDEF formatted NXP NTAG I C Explorer Kit user s manual 20 Tap tag to read NDEF content Hello Work NFC Explorer NDEF Msg Type Text Figure 29 Reading NDEF formatted NTAG I C tag chip 3 4 3 Displaying NDEF on the Explorer board LCD Select Read NDEF NDEF data appears in window You can also display the NDEF data on the Explorer board LCD To do so 1 Select the LED tab on your mobile device 2 Touch the Display NDEF Message selection box to enable LCD message display see Figure 30 3 Lay your mobile device on the antenna The stored NDEF data will scroll through the LCD as long as the selection box has been checked Temperaiure 25 60 C 77 80 F Ereengy Harwasting Wothage 2 by z at Nw Figure 30 Displaying NDEF on Explorer LCD 3 5 Speed tab The Speed demonstration measures the transfer bit rate when communicating with the NFC Explorer board in differen
49. phone 2 2 5 NFC enabled phone APK In order to use your Android NFC enabled phone as the demonstration GUI you must download the NXP NTAG I C Demoboard application from the Google Play Store Ensure that any previous versions have been uninstalled before initiating a new download Open the Google Play Store app Search for NXP I C Demoboard Touch Install a a SS Touch Accept after reviewing the permissions You can also download the software over the Internet from www nxp rfid com ntag i2c 1 Ensure that any previous versions have been uninstalled before initiating a new download 2 Navigate to the demonstration software download links in the Explorer page located under www nxp rfid com ntag i2c 3 Download ntagi2cdemoboard apk 4 After downloading the apk locate it on your phone e g under Settings Storage Downloads 5 Select the NTAG I C Explorer application and follow the directions for installing Note Although you can set your phone to appear as a drive on a PC and copy apk software to the appropriate location and then eject your phone from the PC you may not be able to locate the software on your phone using this approach even if you have loaded an application manager If you encounter this problem use one of the other two download approaches 2 2 6 NTAG I C Explorer board firmware load The NTAG 12C Explorer kit comes with firmware loaded into the microprocessor If newer versions are available they will be loca
50. s a bit of experimentation to determine the optimal coupling between an NFC enabled phone antenna and one of the NTAG I C antenna boards For this reason NXP has included an NFC RF detector board NFC antenna with an LED indicator light with the NTAG I C Explorer Kit This board is useful in determining whether or not a phone is NFC enabled and if so where is the optimal placement of an external NFC antenna in order to achieve the best RF communication 8 1 Using the NFC RF Detector Board 1 If you are not certain that you have an NFC enabled phone lay the phone on the NFC RF detector board and move it around If the LED lights up then the phone is NFC enabled Depending on the phone type antenna sizes and placement differ so you may need to experiment with and adjust the placement of the phone versus the NFC RF detector board in order to find the optimal position Note in some cases as in the Samsung phones NFC antennas are located inside the battery case If your phone battery has been replaced with an after market version you may no longer have NFC capability Look for the words Near Field Communication under the Samsung logo to make sure you have an NFC enabled phone Figure 60 Some NFC antennas are located inside the battery case as indicated by the words Near Field Communication 2 The NFC RF Detector board has a similar LED to antenna orientation as the NTAG I C board does between the NTAG I C tag chip and the an
51. s checked by appending a CRC32 value in the last block The CRC32 is calculated for the whole message that has been transferred If the CRC32 from the message received by the application is correct the application will display an Integrity of the data OK message If the CRC32 from the message received by the board is correct it will turn on the green LED at the end of the Speed Test 3 5 2 EEPROM configuration In the EEPROM configuration see Figure 32 the Android application operates via the EEPROM memory and thus there is no communication with the NTAG I C Explorer Board Pass through mode not used The content is stored in the form of an NDEF text type message and the payload is calculated as the data present in the EEPROM field repeated as many times as the user indicates in the Block Multiplier field When the transmission completes successfully the Android application displays the number of bytes mean speed and time for both the reading and writing process measured for this particular communication The user can also check the content of the memory to ensure that the NDEF message has been written appropriately NXP NTAG I C Explorer Kit user s manual 22 NTAG 12C Demo LED DEMO SPEED TEST Board configuration Block multiplier 20 times Memory SRAM EEPROM NTAG 12C Board input Test finished Speed 1 70B 447 ms 380 B s Read bytes 172 E Speed 170 B 41 ms 4195 B s Figure 32
52. s may be found at the top of the initial screen as shown in Figure 43A gt The Write Block button writes data input into the grid to the active 16 byte memory block see the Memory Block Selection paragraph for the definition of an active block gt The Read Block button reads from the 16 byte active memory block and displays it on the grid gt The Write All Data button writes the contents of the grid to the NTAG I C tag chip except for the Session Register The user can only edit the contents of the Session Register by pressing the Session Register button or by selecting a cell in memory block OxFE in the grid When the Session register button is pressed or when the user clicks in memory block OxFE the software will display the Session register dialog shown in Figure 54 gt The Read All Data button reads the contents of the NTAG IC tag chip with the exception of the Session registers located in memory block OxFE and then displays the contents of the NTAG I C tag chip memory in the grids gt The Reset button loads the grids with the default contents of the NTAG I C tag chip It does not write the contents into the NTAG I C tag chip memory The Write All Data button must be used to load the Reset values into memory SSS SSS eS Se a a Write Block Read Block Data Data Reset q Figure 46 Read and write control buttons 4 3 4 PC device address and scanning The default IC serial bus address of the NTAG I C tag ch
53. s the NTAG I C tag chip The I C address is stored in a location reserved for internal data bytes NXP NTAG I C Explorer Kit user s manual 29 reserved by the specification for manufacturing use For more information about the required memory NFC tag chip format visit nfc forum org and download a specification Clicking on an item in the left column for example the Capability Container in Figure 45 highlights the actual contents of the memory in the grid The grid locations highlight in green if the memory is Read Write R W and in gray if it is Read Only R The software considers the highlighted 16 byte memory block to be the active block In Figure 45 the active memory block is 0x000 The software uses the active block in conjunction with the Write Block or Read Block buttons see Read and Write Controls 0x000 Configuration Daia a a ae ee ee ee eee ee eee 0x000 12C Address W J a 00 AA 00 00 00 00 00 00 00 00 00 00 00 0x00 1 Serial Number R 10 EA 00 0x007 Internal Data R 01 03 00 FE 00 00 00 00 00 00 00 00 00 00 00 00 00 fe Ox00A Lock bytes R W 102 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 OD fa 0x00C Capability Container RAW 0x010 U VRM 03 00 00 00 00 00 00 00 00 00 00 00 OO 00 00 00 00 Figure 45 Memory block selection 4 3 3 Read and write controls Figure 46 illustrates the buttons used to read from and write to the NTAG I C tag chip via the USB I C interface These button
54. session registers 1 Select Read Session Registers from the Config Tab Landing screen A screen similar to that shown in Figure 34 will display 2 Tap the mobile device to the tag antenna 3 Upon successful read the screen similar to that shown in Figure 37A will display Tapping on any of the right facing arrows will bring up more details as shown in Figure 37B For on off selections a blue checkmark indicates on or selected see Figure 37C NXP NTAG I C Explorer Kit user s manual 25 Figure 37 Read session registers screen DP NTAG I2C Demo Y GENERAL CHIP INFORMATION iE Prachi User memenry E NTAG CONFIGURATION FIELD DETECTION P PASS THROUGH P SRAM MEMORY SETTINGS 20 SETTINGS EP NTAG IPC Demo Y GENERAL CHIP INFORMATION iG Product HEP NTAG IC 28 Liser mermory 1904 Bytes F NTAG CONFIGURATION I2C RST on sion is Y FIELD DETECTION FO OFF i FD_OW ia Last MDEF Page is MDEF Data Rend ix RF feld present ie Y PASS THROUGH Pass Through is ot locked i AP locked ik SRAM AC realy be SARAM AF nead ia 3 6 4 Reading writing configuration registers To read the tag configuration registers 1 Figure 39 Write configuration registers Tap the mobile device to the tag antenna F GENERAL CHIP INFORMATION if Tole HEP HTAG IPC FE PEREDES FIELD DETECTION E PASS THROUGH gt SRAM MEMORY SETTINGS i 120 SETTINGS Figure 38 Read configuration registers screen Select Read Write Config R
55. side which must work in conjunction with software running on an independent NFC reader RF side 2 2 System requirements and setup This section details which phones are compatible with the NXP NTAG I C Explorer minimal PC requirements for the Peek and Poke software to work correctly how to enable NFC operation on your Android device how to load the NTAG I C Demoboard application on your mobile device and how to update firmware on the Explorer board if necessary 2 2 1 NFC phone compatibility The demo application is intended to operate on devices running Android version 4 0 and beyond and has been tested and confirmed to perform well with Google Android reference devices Performance with various phones varies from one make and model to another as several factors impact performance such as the size and power output of the NFC mobile device s antenna and how the phone s operating system handles the NFC stack with different revisions of Android NXP NTAG I C Explorer Kit user s manual 11 2 2 2 PC details gt The NTAG C Explorer Peek and Poke software requires an IBM PC compatible computer running a 32 bit or 64 bit Windows operating system XP through Windows 8 compatible 2 2 3 Enabling NFC on Android device NFC data exchange must be enabled on your Android device in order for the demonstration kit to work To enable NFC data exchange 1 Navigate to the Settings application on your home screen 2 Under Settings sel
56. t configurations NXP NTAG I C Explorer Kit user s manual 3 5 1 SRAM board configuration In SRAM configuration the Android application operates in Pass through mode for the transmission and reception of data when communicating with the NTAG I C Explorer board Data to be transmitted for the transfer bit rate calculation is the number of 64 byte blocks defined by the user in the block multiplier field see Figure 31 This test indicates the performance of the communication in Pass through mode from the application to the microcontroller and from the microcontroller to the application LED DER SPEED TEST Board configuration Block multiplier 20 x BA bytes Memory sram EEPRDH FastMode Polling Made Board input Test finished Figure 31 Speed test SRAM configuration The SRAM mode defines two methods for the data transfer Fast Mode and Polling Mode In Fast Mode the data is transmitted as soon as it is ready in the application while in the polling mode the application checks to verify that the transferred data has been read by the Explorer board microcontroller via information obtained from the Session Registers before transferring a new block It also checks if the Explorer microcontroller has written new information before reading the SRAM block Therefore the Fast Mode method will always return higher bit rates than the Polling Mode method The integrity of the data transferred in both directions i
57. t to the NTAG I C tag chip except when programming the Session Register v v yv yY yY WTF VF WH 4 4 2 Session register If the user clicks the Session Register address OxFE or the Session Registers button see Figure 53 the GUI displays the Session Register details see Figure 54 Note Individual bit definitions are listed most significant bit to least significant bit A check in a box representing a single bit indicates that bit will be set to a 1 on a write or a 1 has been read back from the register No check in a box representing a single bit indicates that bit will be set to a 0 on a write or a 0 has been read from the register Unless otherwise noted if the full 8 bits of a register are not used the control populates lsb first for example I C clock stretching controlled by register OxFE5 is enabled if the least significant bit of OxFE5 has been set to 1 0x110 User memory R W Peet Whe Ile marmar fm AAN 4 TTT Session Configuration Registers Registers Figure 53 Session registers and configuration registers buttons NXP NTAG I C Explorer Kit user s manual 33 msb of OxFEO FD_OFF FD_ON Isb of OxFEO ve Session Register Configuration NC_REG OxFE 0 12C_RST_ON_OFF o PTHRU_ON_OFF 00 Field switched off v 00 Field presence SRAM_MIRROR_ON_OFF 12C block address F3 PTHRU_DIR Watchdog time out 20 000 ms Read NDEF Write NDEF Read WDT Write WDT
58. ted on the Explorer kit page under www nxp rfid com ntag i2c To load the firmware 1 Locate your USB cable Connect the micro USB cable connector end to the Explorer board and the USB end to your PC Simultaneously hold down the RESET and ISP buttons on the Explorer board Release the RESET first Release the ISP second The Explorer board will now appear as a disk named CRP DISABLED on your computer Click Open the folder to view files on the CRP DISABLED disk and delete the current firmware bin The new firmware image you are installing will be named NTAG_I2C_Explorer_VXX bin where XX is the or et a oe e firmware revision For example if XX 20 then the firmware revision is 2 0 8 Drag and copy the new file to the CRP DISABLED file directory 9 Eject the CRP DISABLED disk Verify that the new firmware version has been loaded correctly by starting the NTAG I C Demoboard application and placing the phone on the antenna If operational the board will harvest energy from the mobile device and NTAG lC Explorer will display on the LCD screen see 3 2 NXP NTAG I C Explorer Kit user s manual 13 Note The Explorer board will not allow communication with the NFC enabled mobile device if it is still connected via USB cable to the PC and there is any activity on the USB bus In that case users are expected to be utilizing the Peek and Poke functionality see Section 4 2 2 7 NFC USB Reader board firmware load The
59. tenna After you have ascertained that your phone is NFC enabled and determined the position of optimal reception make a note of where on the phone GUI display the LED lines up Because the NTAG I C chip is also centered on the PCB chances are the NTAG I C antenna board will work best in a similar location See examples for the popular Moto X and Samsung GII phones in Figure 61 and Figure 62 respectively where the LED lines up near the words Board input on the GUI display and the optimal NTAG C antenna board placement is in a similar location NXP NTAG I C Explorer Kit user s manual 40 r i Board configuration gt Board input Tap tag to raad configuration ie ao j Tap tag to raad configuration Board LED aligns with Board input alaa ie NFC RF Detector F Board input NTAG I C tag chip on antenna board in approximate position as LED NFC RF Detector p gt Board LED aligns above Board input Board input Tap tag to read configuration F pu Tap tag to read configuration Figure 62 Samsung Galaxy III optimal antenna coupling location NTAG I C tag chip on antenna board in approximate position as LED 8 2 Selecting an NTAG C antenna board Matching an NTAG I C antenna to the form factor of an NFC enabled phone antenna helps in obtaining the optimal coupling for the best communication To illustrate let s examine both an
60. tions that are described herein for any of these products are for illustrative purposes only NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products and NXP Semiconductors accepts no liability for any assistance with applications or customer product design It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned as well as for the planned application and use of customer s third party customer s Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products NXP Semiconductors does not accept any liability related to any default damage costs or problem which is based on any weakness or default in the customer s applications or products or the application or use by customer s third party customer s Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer s third party customer s NXP does not accept any liability in this respect Export control This document
61. ut Power harvesting output SCL IC bus clock line SDA I C bus data line VSS Ground VCC Power v v v v vw Ww NTAG I C ty tag chip NFC antenna structure CLASS 4 REV C Figure 7 Class 4 antenna board Class 5 antenna Class 5 FR4 antenna board same as Class 4 board except with a Class 5 antenna structure Note also the additional connection pads near the NTAG I C chip These pads may be used to connect a custom antenna if desired by cutting the traces to the on board antenna structure and replacing with a custom coil structure Where C1 is not populated see Figure 8 add a custom capacitor to adjust tuning or add to replace existing capacitor on populated boards see Figure 9 Custom antenna connection pads Cut traces between antenna and capacitor connecion points to use custom coil CLASS 5 REV C Figure 8 Class 5 antenna board NXP NTAG I C Explorer Kit user s manual Class 6 Antenna Class 6 FR4 antenna board same as Class 4 board except with a Class 6 antenna structure Replace or add to existing capacitor for custom tuning CLASS 6 REV C Figure 9 Class 6 antenna board Flex Class 6 antenna Class 6 flex board same architecture as Class 6 board except mounted on flex material and with extended traces to the connector so that it can be inserted into products more easily LIIL Figure 10 Class 6 flex antenna 2 1 1 3 NFC USB Reader board USB based PN544 NFC transceiver b

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