EIPC-3 - ELTEC Elektronik AG
Contents
1. 2 1 Location Serial 2 3 Location Ethernet Port 2 5 Location Keyboard Mouse Port 2 6 Location VGA Port 2 8 Installation Diagram 3 2 Activity LEDs S a AOA 3 5 Speaker Reset 3 5 USBADA i denses A a 3 11 Location of 4 1 Watchdog Trigger Register 6 5 EIPC 3 Users Manual Specification 1 Specification 1 1 Main Features o Fully AT compatible industrial PC e Socket 370 CPU for Celeron Pentium III CPU up to 850 MHz 66 100 MHz FSB PICMG compatible board design with PCI and ISA slot connectors 2 DIMM sockets for up to 512 MB SDRAM e 256 KB on chip second level cache depending on CPU e PCI local bus 32 bit 33MHz e USB IrDA port Option e AGP Graphics controller with 2MB video RAM supports simultaneous CRT and flatpanel display e PCI UltraWide SCSI controller supports up to 40MB sec UltraWide SCSI e Integrated EIDE hard disk controller supports 2 independent IDE channels e PCI 10 100 Mb s Ethernet controller 10BaseT 100BaseTX optional Boot ROM PCI PCI Bridge support up to 4 external PCI Busmaster on PICMG compatible bac2. 6 2 6 1 6 128KB BIOS e does 6 2 EIPC 3 Users Manual Table of Contents 6 1 7 512MB Local DRAM 6 3 6 1 8 ISA Compatible and Power Management Registeel S as 6 3 6 1 9 Local 6 4 6 1 10 ELTEC specific I O 6 5 6 1 11 Watchdog 6 5 Appenix Reference EIPC 3 V Table of Contents Users Manual List of Tables Table 2 1 Table 2 2 Table 2 3 Table 2 4 Table 2 5 Table 2 6 Table 2 7 Table 2 8 Table 2 9 Table 3 1 Table 3 3 Table 3 4 Table 3 5 Table 3 6 Table 3 7 Table 3 8 Table 3 9 Table 4 1 VI Pinout Parallel Port LPT1 2 2 Pinout Serial Port COM1 and 2 2 4 Pinout Ethernet Connector 2 5 Pinout Keyboard Connector 2 7 Pinout Mouse 2 7 Pinout VGA 2 9 Pinout Flatpanel Connector 2 10 Operating Temperature 2 16 Thermal Resistance Heat Sinks 2 16 Pinout LED Connector 3 5 Pinout Speaker Reset Connector 3
3. 5 3 6 EIPC 3 Users Manual Installation 3 3 6 Floppy Disk The floppy cable is connected between floppy drive and this connector The power supplv cable for the drive must be connected directly to the power supplv Table 3 3 Pinout Floppv Connector Pin Name Name Pin 1 Gnd DRVDENO 2 3 nc 4 5 Gnd DRVDEN1 6 7 Gnd 8 9 Gnd MTRO 10 11 Gnd DS1 12 c 13 Gnd DS0 14 o 15 Gnd MTR1 16 17 Gnd DIR 18 19 Gnd STEP 20 S 21 Gnd ANDATA 22 e 23 Gnd AWGATE 24 25 ITRKO 26 27 Gnd AWRTPRT 28 29 RDATA 30 31 Gnd HDSEL 32 33 DSKCHG 34 3 3 7 5 D FI 5 Installation Users Manual 3 3 7 EIDE Like the floppv disk drive an IDE drive is connected with its flat cable to these connectors The power supplv cable of the IDE device must be directly connected to the power supply Up to two IDE drives harddisk CD ROM can be connected to each connector Cable length should not exceed 40 cm to avoid instable operation Table 3 4 Pinout EIDE Connectors Pin Name Name Pin 1 RST GND 2 3 07 D8 4 5 06 09 6 7 05 010 8 9 04 011 10 11 D3 D12 12 13 2 D13 14 15 01 014 16 17 00 015 18 19 GND nc 20 21 REQ GN
4. o 9 5 Specification User s Manual 1 3 4 Firmware The BIOS is stored in a Boot Block Flash EPROM which enables easy BIOS updates Boot from floppy IDE SCSI CD LS 120 is supported net boot can be installed on a socket 1 3 5 Graphics Interface The graphics interface of the EIPC 3 is a AGP based graphics controller C amp T 69000 which achieves superior performance through the 32 bit interface to the AGP CRT monitors and flat panel display technologies including plasma EL LCD are supported The resolution ranges up to 1280 x 1024 pixels at 256 colors and 75 Hz TFT LCD panel are supported With resolutions of up to 1280 x 1024 pixels simultaneous displays of CRT and flat panels are possible The graphics controller provides logic for power saving functions for flat panels The graphic interface is fully compatible with the VGA standard at the hardware register and BIOS level Mode initialization is supported at the BIOS and register levels ensuring compatibility with all application software 1 3 6 Floppy Disk types of common 3 5 and 5 25 Floppy drives are supported 1 8 EIPC 3 Users Specification 1 3 7 Hard Disks Hard Disks supported by the PCl based EIDE port with Ultra DMA 33 transfer and the Ultra wide SCSI port with 40 MB sec transfer rate The IDE interface Integrated Device Electronics is part of the Intel chipset That means
5. 0 23 depends the graphic controller settings See Chapter for LCD settings Attention Cable length above 40 cm 15 cause picture disturbance 2 10 EIPC 3 Users Interface Connectors 2 2 Definition of Board Parameters 2 2 1 AGP Bus CPU to Graphic Accelerator Max 528 MB s peak Bus Clock S LI 2 Connectors 66 6 MHz PCI x2 2 2 2 PCI Local Bus CPU to PCI Transfer Options Write post buffer Max 120 MB s peak PCI to Memory Transfer Options Max 120 MB s peak Clock Speed 33 3 MHz at 66 6 MHz CPU bus frequency IRQs Four PCI interrupts rerouted to selectable ISA interrupts EIPC 3 2 11 5 2 29 OD o o Interface Connectors Users Manual 2 2 3 ISA Bus Bus Clock 8 33 MHz at 33 3 MHz PCI frequency Interrupt Capabilities IRQ 3 7 9 12 14 15 DMA Channel Capabilities DMA slave or master mode DMA 0 3 5 6 7 2 2 4 Network 10BaseT 100BaseTx twisted pair Transfer Speed max 10 100 Mbit s 2 2 5 SCSI SCSI I and II Ultra 8 16 bit Transfer Speed asynchronous transfer 5 MB s synchronous transfer 20 MB s 8 bit synchronous transfer 40 MB s 16 bit 2 12 EIPC 3 Users 2 2 6 Serial I O 2 Channels Full duplex asynchronous 50 b s 115 2 KB s RS232 level 2 2 7 USB One port 1 5 12 Mb s Supply current for external devices 500 mA 2 2 8 IrDA One port alte
6. 433 24 35 2 X The given values were calculated using the formula Ta Ra P with P CPU power dissipation see table Rca Thermal restistant heatsink see table Thermal restistant glue pad 0 35 k W CPU case temperature 85 TA Air temperature Table 2 9 Thermal Resistance Heat Sinks Air Flow Heat Sink Heat Sink with Fan m s K W K W site 2 8 2 1 75 3 1 2 2 16 EIPC 3 Users Manual Interface Connectors The maximum air temperature using a CPU fan mainlv depends on the long life term of the used fan The CPU case temperature not exceed 85 2 2 15 Maximum Operating Humiditv 8590 relative higher value on request 2 2 16 Power Requirements Total Power Requirements without PCI or ISA extensions 10 0 max 7 5 typ 5 VDC 5 850 MHz 100 mA max 30 mA typ 12 VDC 1090 100 mA max 0 mA typ 12 VDC 10 Battery Type CR 1 3 N 170 mAh 3 0 V Approx 5 years life term EIPC 3 must 2 17 S LI 2 Connectors Interface Connectors Users Manual 9 53 a OD Se 2 18 EIPC 3 Users Manual Installation 3 Installation 3 1 Introduction Do alwavs observe precautions for handling electrostatic devices when unplugging boards from the rack or otherwise handling boards Avoid touching integrated circuits except in an electrostatic free environment E
7. ME End of Mainmemory EIPC 3 6 1 5 Programmers Reference User s Manual 6 1 2 128KB VGA Video Memorv The VGA graphics memorv occupies segment A and B of the first 1 MB address range The CPU accesses the video memorv in standard videos modes VGA CGA If high resolution video modes are used video drivers usually access the video memory above the main memory on a 2 MB boundary The video memory there is accessible in a linear fashion The complete 1 MB memory is accessible At power up the AWARD BIOS maps the video memory above the main memory on the next 2 MB boundary 6 1 3 32KB Video BIOS EPROM The lower part of the C segment is reserved for the video BIOS 6 1 4 16KB SCSI BIOS If a SCSI device is detected and enabled in the BIOS setup menu the SCSI BIOS is unpacked and placed in this area If the SCSI controller is disabled the optional TFT boot BIOS is placed here 6 1 5 64KB Network EPROM The D segment is used by the network boot EPROMs 6 1 6 128KB BIOS The E and F segments are exclusively used by the AWARD BIOS and the SCSI extension BIOS 6 2 EIPC 3 Users Manual Programmers Reference 6 1 7 512MB Local DRAM The DRAM resides above the first 1 MB Depending on how much memory is installed up to 511 MB DRAM are accessible 6 1 8 ISA Compatible and Power Management Registers The 5 bridge contains the ISA compatible registers wh
8. Users Manual Programmers Reference 6 1 10 ELTEC specific Register EIPC 3 contains programmable watchdog trigger following register is used for start and trigger of the watchdog Table 6 4 ELTEC Specific Register Address Device 0400 041F Watchdog trigger register 6 1 11 Watchdog watchdog circuitrv is disabled after System reset power up The first write cvcle to the watchdog trigger register enables the watchdog If no further write cvcle to this register takes place the watchdog performs a reset and a new svstem boot takes place There is no mechanism to detect a watchdog reset after the svstem is loaded again The watchdog trigger must be performed within 200 ms for proper operation 07C0 W RE RO Figure 6 1 Watchdog Trigger Register EIPC 3 6 5 p 26 E E S de Do or Programmers Reference Users Manual h 5 6 6 EIPC 3 Users Manual Appenix Appenix Reference 1 PCI ISA Card Edge Connector Proposal for single Board Computer SBC Rev 2 0 1994 PCI Industrial Computer Manufacturers Group PICMG 2 82371AB PCI TO ISA IDE Xcalerator PIX INTEL CORPORATION 1997 Order Number 290562 001 EIPC 3 A Users Manual B EIPC 3 Support Request Form EIPC 3 Revision 3 version Hardware revi
9. 6 Pinout Floppy 3 7 Pinout EIDE Connectors 3 8 Pinout SCSI Connector 3 10 Pinout USB IrDA 3411 Certified CPU Versions 3 12 CPU Fan 3 13 Jumper J501 ua 4 2 EIPC 3 Users Manual Table of Contents Table 4 2 Jumper 901 903 4 2 Table 4 3 Jumper J1006 J1008 4 3 Table 4 4 Jumper J1004 sese 4 4 Table 4 5 Jumper JIOO5 nn 4 4 Table 4 6 Jumper J1208 4 5 Table 6 1 Memory Address 6 Table 6 2 ISA Compatible and Power Management 6 3 Table 6 3 Local I O Registers 6 4 Table 6 4 ELTEC Specific I O Register 6 5 EIPC 3 VII Table of Contents Users Manual List of Figures Figure 1 1 Figure 2 1 Figure 2 2 Figure 2 3 Figure 2 4 Figure 2 5 Figure 3 1 Figure 3 2 Figure 3 3 Figure 3 4 Figure 4 1 Figure 6 1 VIII Block Diagram a 1 3 Location Parallel Port
10. Installation 34 3 1 Introduction 34 3 2 DIMM Installation 3 3 3 3 Board Installation 3 3 Graphics A a 3 3 3 3 2 Keyboard 3 4 3 3 3 MOUSE age ak 3 4 3 3 4 Parallel nn 3 4 3 3 5 Network za ei 3 5 3 3 6 Floppy Disk 3 7 3 9 eet aecenas 3 8 EIPC 3 Ill Table of Contents Users Manual 3 3 8 3 9 9 0 9 l Onan nn Pepe Rod os 3 11 3 4 Replacing the CPU pp 3 12 A JUMpPELS i Rens 4 1 4 1 1 CMOS 4 2 4 1 2 SCSI Termination 4 2 4 1 3 External PCI Interrupts 4 3 4 1 4 External DMA Routing 4 4 4 1 5 LGD Panel ID ss 4 5 5 BIOS Setup v c ili 5 1 5 1 Testing the Installation 5 1 6 Programmers Referencoes 6 1 6 1 Memory Address 6 1 6 1 1 640KB Local 6 6 1 2 128KB VGA Video 6 2 6 1 3 32KB Video BIOS 6 2 6 1 4 16KB SCSI BIOS 6 2 6 1 5 64KB Network EPROM
11. J1008 Function 1 2 Use IRQ D instead of IRQ C 2 3 default EIPC 3 4 3 Jumpers Users Manual 4 1 4 External DMA Routing If the EIPC 3 comes without a PCI PCI bridge these jumper configure the routing between internal and external DMA channels Without a PCI PCI bridge there a two external DMA channels availiable Settings may depend on the type of the PICMG backplane Please refer to backplane documentation before change settings Table 4 4 Jumper J1004 Jumper J1202 Function open Channel routed to external DMA Channel 0 default 1 2 Channel routed to external DMA Channel 1 3 4 Channel routed to external DMA Channel 2 1 2 3 4 Channel routed to external DMA Channel 3 Table 4 5 Jumper J1005 Jumper 41202 Function open Channel routed to external DMA Channel 0 1 2 Channel routed to external DMA Channel 1 default 3 4 Channel routed to external DMA Channel 2 1 2 3 4 Channel routed to external DMA Channel 3 Note Same setting for both DMA Channels cause svstem malefunktion 4 4 EIPC 3 Users Manual Jumpers 4 1 5 LCD Panel ID Table 4 6 Jumper J1203 Jumper 41203 Dotclock 1 2 Panel 1 1024 x 768 DSTN 65 MHz 3 4 Panel 2 1280 x 1024 TFT 108 MHz 1 2 3 4 Panel 3 640 x 480 DSTN 50 MHz 5 6 Panel 4 800 x 600 DSTN 63 MHz 1 2 5 6 Panel 5 640 x 480 TFT Sharp Displa
12. The 21152 has sufficient clock and arbitration pins to support four PCI bus master devices directly on its secondary interface The 21152 allows the two PCI buses to operate concurrently This means that a master and a target on the same PCI bus can communicate while the other PCI bus is busy This traffic isolation may increase system performance in some special applications 1 3 11 CE Conformity All I O signals routed to the front panel are filtered by special filters to meet EMC requirements class A 1 3 12 Watchdog The EIPC 3 has an on board watchdog for operator less environments EIPC 3 1 11 S 2 o o o 8 9 5 Specification User s Manual 1 3 13 Operating Systems The software support for the EIPC 3 includes all standard software such as Windows 98 Windows NT DOS Support for additional operating systems is in preparation 1 3 14 Compatibility The EIPC 3 is compatible to the EIPC with the following exceptions CPU kernel incl memory changed SCSI and Ethernet changed and USB added 1 12 EIPC 3 Users Manual Specification 1 4 Temperature Power Specifications 1 4 1 Environmental Conditions 2 o o e Storage Temperature 0 C 70 C e Operating Temperature 0 45 C 2m s forced air cooling Cooling requirements for different environments and CPU frequencies should be discussed with E
13. is capable of detecting the used network data rate 10 100 Mbit or can be configurated to operated at a fixed rate The network is connected via a twisted pair connector 10BaseT 100BaseTx at the frontpanel A set of LED are provided to show the state of the network If desired a net boot EPROM can be used for diskless stations All other PC compatible I O devices reside on the ISA bus of the EIPC 3 Two serial channels with hardware handshake COMI 2 and one bidirectional parallel port LPT1 are available at EIPC 3 1 5 S 2 o o o 5 9 5 Specification Users Manual the front panel The serial port devices compatible to NS16450 and NS16550 and have internal FIFOs for high speed modem support The parallel port is Centronics compatible but supports also EPP and ECP mode The kevboard controller features an AT compatible kevboard interface PS 2 compatible mice are supported via a separate connector at the frontpanel The Eltec IPC is equipped with a floppy controller which supports the 5 and 3 disk sizes Floppy disks with up to 2 88 MB density can be used The BIOS Flash EPROM has a size of 256KByte It contains the main BIOS and the BIOS extension for SCSI und Graphics It is incircuit programmable for BIOS updates The Eltec IPC is equipped with one integrated DC DC converter for CPU core voltage automaticaly detzeczed and all circuitries
14. requiring 3 3 V or 2 5 V voltage Because the voltages are generated from 5 V no special power supply has to be provided by the customer The PICMG compatible PCI ISA card edge connector allow the use of PICMG backplane to increase the functionality of the EIPC 3 1 6 EIPC 3 Users Manual Specification 1 3 Technical Details 1 3 1 CPU Socket 370 processors with 66 or 100 MHz FSB supported bv the EIPC 3 Therefore it is possible to scale the svstem depending on requested performance Equipped with a 850 100 MHz Pentium processor you obtain maximum performance with an performance index of 164 SYSmark2000 For comparison Celeron 366 66 MHz 72 SYSmark200 1 3 2 Chipset The 3 is based on the Intel 440BX PCI chip set the reference for Pentium III and Celeron chip sets Also availability for longer periods than what is common in the PC market is guaranteed The BX chipset consists off two chips First the Northbridge 82443 which contains CPU AGP and PCI Interface and second the Southbridge containing PCI ISA Bridge IDE Interface Realtime Clock and CMOS Memory 1 3 3 Memory Configuration The 64 bit wide memory allows configurations from 32 MBytes to 256 and more t b d using two DIMMs with 66 MHz or 100 MHz SDRAMSs 100 MHz SDRAM are required for processors with 100 MHz FSB The memory size is detected automatically EIPC 3 1 7 o
15. that the IDE controller is directly connected to the PCI bus achieving higher data rates than with ISA based controllers Up to four IDE devices can be connected The SCSI interface is built with a 53C875 controller chip from LSI Logic former Svmbios Logic It is directly connected between PCI and SCSI bus A PCI bus master DMA channel and an internal SCRIPT processor leaves the processor free from doing time expensive data transfers DMA transfers operate in burst mode on the PCI bus for best performance SCSI I and II protocol is supported With 16 bit SCSI bus size a data transfer rate of either 20 MB sec in asvnchronous or 40 MB sec in svnchronous mode UltraWideSCSI can be achieved The BIOS contains special firmware to support boot and BIOS routines After the operating system was booted a SCSI harddisk behaves like an IDE harddisk Up to fifteen SCSI devices can be connected to the bus 1 3 8 Ethernet Interface The network interface uses the network controller Intel 82259 for 10 100 Mb connectivity with 10BaseT twisted pair or 100Base TX connectivity 82259 has an integrated IEEE 802 3 10 5 and 100BASE TX compatible transmitter for reducing system cost A set of LEDs are provided to show the state of the network see Fig 2 1 EIPC 3 1 9 o o 8 9 5 Specification Users Manual 1 3 9 I O Features Two asvnchronous 16550 compatible serial ch
16. D 22 23 OW GND 24 25 GND 26 27 IORDV nc 28 29 GND 30 31 IRQ14 nc 32 33 1 nc 34 35 0 A2 36 37 CS1 CS3 38 39 ACT GND 40 3 8 EIPC 3 Users Manual Installation 3 3 8 SCSI SCSI is only available on board versions with SCSI option The SCSI cable is plugged into the appropriate connector on board All SCSI devices must be cabled in a bus like fashion i e the cable goes from one device to the next one The cable end must be terminated to ensure proper operation An active terminator is recommended The onboard active terminator has the capability to detect wether onboard termination is neccesary or not Nevertheless it is possible to select manual termination 2 S 5 n 3 3 9 5 FI 5 Installation Table 3 5 Pinout SCSI Connector Pin Name Pin 1 GND D12 2 3 GND D13 4 5 GND D14 6 7 GND D15 8 9 GND PD1 10 11 GND DO 12 13 GND D1 14 15 GND D2 16 17 GND D3 18 19 GND D4 20 21 GND 05 22 23 GND D6 24 25 GND D7 26 27 GND PDO 28 29 GND nc 30 31 GND nc 32 33 JTERMPWR TERMPWR 34 35 TERMPWR TERMPWR 36 37 nc nc 38 39 nc GND 40 41 nc ATN 42 43 GND 44 45 GND BSY 46 44 GND 48 49 GND RST 50 51 MSG 52 53 G
17. EIPC 3 ELTEC Industrial PC Hardware Manual Revision 1A elektronik mainz a Revision Historv Revision Changes Date 1A First Edition 25 06 01 ar valid for Hardware revision 3A WARNING This equipment generates and can radiate radio frequencies If not installed in accordance with the instruction manual it may cause interference to radio communications The equipment has not been tested for compliance with the limits for class A computing devices pursuant to subpart J of part 15 of FCC rules which are designed to provide reasonable protection against such interference but temporary usage is permitted as per regulations Operation of this equipment in a residential area is likely to cause interference in which case the user at his own expense is required to take whatever measures may be required to shield the interference DISCLAIMER The information in this document has been carefully checked and is believed to be entirely reliable However no responsibility is assumed for inaccuracies ELTEC reserves the right to make changes to any products to improve reliability function or design ELTEC does not assume any liability arising out of the application or use of any product or circuit described in this manual neither does it convey any license under its patent rights nor the rights of others ELTEC products are not authorized for use as components in life support devices or systems intended for surgical impla
18. LTEC e Maximum Operating Humidity 85 relative 1 4 2 Power Requirements without AGP PCI or ISA extensions max 7A typ at 5 VDC 5 for the 850 MHz version 200mA max 160mA typ at 12VDC 10 96 100mA max 30mA typ at 12VDC 10 Values e hrs computed after MIL HDBK 217E Operating Temperature 0 C 459 C EIPC 3 1 13 o 5 9 9 5 Specification Users Manual Ordering Information Hardware Pentium III 600 MHz Graphics EIDE SCSI 10BaseT 100BaseTX Related Products DSIN Adapter for Sharp LM80c312 B EIPC 800A e Hardware Documentation e BIOS Documentation 1 14 EIPC 3 Users Interface Connectors 2 Interface Conn ectors 2 1 1 PICMG Connector The PICMG connector consist of a PCI and a ISA connector Please refer to 1 for more details about PICMG Specification 2 1 2 Parallel Port The bidirectional parallel port supports IEEE 1284 ECP EPP The parallel port connector is part of the the additional frontpanel coming with the EIPC 3 It is also possible to mount these connector into a appropriated hole in the PC housing Figure 2 1 Location Parallel Port EIPC 3 2 1 S LI 2 Connectors O 5 5 4 o 5 5 p Interface Connectors Table 2 1 Pinout Parallel Port LPT1 P
19. MM is not properly connected 3 3 Board Installation The EIPC 3 itself fits into a PICMG CPU slot Depending on the mounting of the parallel and or seriell connector the EIPC 3 requires up to 3 slots After the board was plugged into the PICMG backplane connectors the screw on the front panel can be fixed with the rack Depending on the housing there may be additional screws and mechanics for fixing the board Make sure that the power supply within the rack meets the power requirements specified in Section Power Requirements Also the operating requirements must meet the values specified in Section Environmental Conditions 3 3 1 Graphics If a CRT monitor is used a standard VGA cable 15 pins is connected between the monitor and the VGA connector Make sure that your monitor is capable of displaying higher video resolutions If a video mode generates horizontal frequencies much higher than EIPC 3 3 3 2 S 5 r 5 D FI 5 Installation Users Manual the maximum value of your monitor the monitor may be destroyed If your monitor is not able to displav a mode switch off or disconnect the monitor in advance and select an appropriate video mode for the monitor If a flatpanel displav should be connected make sure that the correct displav mode is selected in the video BIOS Check also the connection between the flatpanel connector on the board and the flatpanel displav Please cont
20. ND SEL 54 55 D 56 57 GND REQ 58 59 60 61 GND 08 62 63 D9 64 65 GND D10 66 67 GND 011 68 3 10 3 Users Users Manual Installation 3 3 9 1 0 This connector contains the one USB and the IrDA Interface Figure 3 4 USB IrDA USB support depends on the operating svstem Please contact ELTEC for information about IrDA and USB support 5 Table 3 6 Pinout USB IrDA Pin Name Function Function Name Pin 2 1 Vcc USB Power reserved res 2 ma 3 USBPO USB Data Vcc IrDA 4 5 USBP0 USB Data IrDA receive IrDARx 6 7 GND USB Power IrDA transmit IrDATx 8 CS CO 10 EIPC 3 3 11 5 D FI 5 Installation Users Manual 3 4 Replacing the CPU This section contains information on certified CPU versions for the EIPC 3 Carefully read this section before you are going to replace the CPU on the EIPC 3 The following information shows CPU versions which have been certified by ELTEC for the different board versions of the 3 Using CPU versions which have not been certified by ELTEC for the appropriate EIPC 3 board versions as here displayed may result in damage of both the CPU and the EIPC 3 board ELTEC takes no responsibility if CPUs are installed in a different way as described here Misuse will result in loss of warranty ELTEC ships
21. Systems 1 12 1 3 14 Compatibility eene 1 12 Table of Contents Users Manual 1 4 Temperature Power Specifications 1 13 1 4 1 Environmental Conditions 1 13 1 4 2 Power Requirements without AGP PCI or ISA extensions 1 13 2 Interface Connectors 2 1 2 1 1 PICMG Connector 2 1 2 1 2 Parallel Port 2 1 2 1 9 i2 e E ies 2 3 2 1 4 Ethernet aaa aa 2 5 2 1 5 Keyboard Mouse 2 6 2 1 6 VGA Connector 2 8 2 2 Definition of Board Parameters 2 11 2 2 A AGP BUS 2 11 2 2 2 PCI Local Bus 2 11 2 2 3 dia 2 12 2 2 4 Network una a 2 12 2 25 SCS laden age Rara 2 12 2 2 6 Serial VO 2 13 22 PAW SB P 2 13 2 28 IDA 5 cit en etate cen ae eae 2 13 Users Manual Table of Contents 2 2 9 Keyboard L 2 13 2 210 ii etienne 2 14 2 2 11 Parallel O is t ee 2 14 2 212 Video ei 2 15 2 2 13 MTBF Values esee 2 15 2 2 14 Environmental Conditions 2 16 2 2 15 Maximum Operating Humidity 2 17 2 2 16 Power Requirements 2 17 3
22. act ELTEC for further information on supported panel displavs and cabling information 3 3 2 Kevboard A standard PS 2 kevboard can be connected to kevboard connector 3 3 3 Mouse A standard PS 2 mouse can be connected to mouse connector 3 3 4 Parallel Port A printer with Centronics interface can be connected to the parallel port via the front panel Other devices with ECC or ECP interface such as a CD ROM can be connected here as well 3 4 EIPC 3 Users Manual Installation 3 3 5 Network A Network can be connect using 10BaseT or 100BaseTX 3 3 5 1 External LEDs These pins can be used to connect external LEDs for HDD and Network activitv HDD Network 2 Figure 3 2 Activity LEDs s 6 Table 3 1 Pinout LED Connector Function Function Name Pin HDD ACT HDD Activity Power 2 3 LAN Network Activity Vcc 4 5 10Mbit 10Mbit Link Power Vcc 16 9 100 100Mit Link Power vc o 3 3 5 2 Loudspeaker Reset These pins can be used to connect a speaker and a reset switch Reset Speaker oolooog Figure 3 3 Speaker Reset Connector EIPC 3 3 5 Installation Users Manual Table 3 2 Pinout Speaker Reset Connector Pin Function 1 Speaker Speaker GND GND iir Reset Reset Switch Reset TH 5 FI
23. all board versions with either a heat sink or a cooling fan If a CPU is replaced by the same type same frequency the same cooling technique must be applied to the replaced CPU If a heat sink is used a new glue foil must be used for proper thermal connection between CPU body and heat sink If a cooling fan is used the fan must be installed on the CPU the same way as before If the CPU was replaced by a version with higher frequency e g from 366 MHz to 433 MHz the cooling technique used currently may not meet the cooling requirements of the installed CPU In that case ELTEC should be contacted for further information on appropriate cooling techniques Notice that an inappropriate cooling reduces the reliability of the CPU and may destroy the CPU Normally overclocking of the Celeron or Pentium III processor is not possible Table 3 7 Certified CPU Versions Frequency MHz Intel Order Number CPU Type 300 FV80524RX300128 Celeron 366 FV80524RX366 128 433 FV80524RX433128 600 RB80526PY600256 Pentium 850 RB80526PY850256 3 12 EIPC 3 Users Manual Installation Table 3 8 CPU Fan Connector Pin Signal Function 1 GND Ground 2 5V Vcc 3 Pulse Fan Pulse Input c 2 5 S G 5 7 c EIPC 3 3 13 Installation Users Manual 5 7 D D ze 2 3 14 EIPC 3 Users Manual Jumpers 4 Jumpers This section contains a
24. annels with up to 115 kbaud transfer rate and 16 bvte FIFO with RS232 levels are available Printers can be connected to a fullv bidirectional parallel port supporting IEEE 1284 enhanced modes EPP and ECP PS 2 compatible kevboard and mouse interface are provided A USB port is available for connecting to kevboard mouse scanners etc For IrDA Application one serial port of the EIPC 3 can be set to support this feature There is IrDA Hardware IR Transmitter on the board Please contact ELTEC for USB and IrDA support 1 10 EIPC 3 Users Manual Specification 1 3 10 Extended PCI Capabilities The EIPC 3 contains two PCI busses which are connected through the PCI PCI bridge The first PCI bus called internal PCI bus 0 connects the onboard PCI devices Ethernet SCSI PCI ISA bridge and PCI PCl Bridge to the Host Bridge The second one called external PCI bus 1 connects the devices on the PICMG backplane to the internal PCI bus The connection between the internal and external PCI bus is established bv a 21152 PCI PCI Bridge from Intel It provides a complete secondarv PCI bus interface without the need for additional components To increase performance the 21152 has separate posted write read data and delayed transaction queues with significantly more buffering capability than first generation bridges In addition the 21152 supports buffering of simultaneous multiple posted write and delayed transactions in both directions
25. for more information Table 6 3 Local I O Registers I O Address 0060 0064 Device Keyboard controller 0170 0177 IDE secondary command block 01F0 01F7 IDE primary command block 0278 027F Parallel port LPTC 02E8 02EF Serial channel 1 2 COM4 02F8 02FF Serial channel 1 2 COM2 0374 0377 IDE secondary control block 0378 037F Parallel port LPTB 0398 0399 03B4 03B5 SIO configuration registers 6845 compatible video controller 03B8 03BA Monochrome register 03BC 03BF Parallel port LPTA 03C0 03CF VGA compatible register 03D4 03DA Color mode register 03E8 03EF Serial channel 1 2 COM3 03F0 03F7 Floppy disk controller 03F4 03F7 IDE primary control block 03F8 03FF Serial channel 1 2 COM1 83D0 83D3 BitBlt offset 87D0 87D3 BitBlt pattern 8BD0 8BD3 BitBlt background color 8FDO0 8FD3 BitBlt foreground color 93D0 93D3 BitBlt control register 97D0 97D3 BitBlt source 9BD0 9BD3 BitBlt destination 9FDO 9FD3 BitBlt command register A3D0 A3D3 Cursor control A7D0 A7D3 Cursor color 0 1 ABDO ABD3 Cursor color 2 3 B3D0 B3D3 Cursor base address B7D0 B7D3 VGA reserved BBD0 BBD3 VGA reserved BFD0 BFD3 VGA reserved EIPC 3
26. ich are used for ISA DMA interrupt and timer functions Additionally the bridge contains circuitry for power management Two registers for generation of PCI configuration cycles are placed within the chipset All these registers are mainly used by BIOS and device drivers Please refer to additional PC literature and 2 for details Table 6 2 ISA Compatible and Power Management Registers I O Address Device 0000 000F DMA channel 1 0020 0021 Interrupt controller 1 0040 0043 Timer counter 1 0060 0061 NMI control registers 0070 0071 CMOS RAM and NMI mask registers 0080 008F DMA page registers 00A0 00A1 Interrupt controller 2 00B2 00B3 Advanced power management controller 00C0 00DF DMA channel 2 00F0 00F0 Coprocessor Error 04D0 04D1 Interrupt edge level control 0CF8 Configuration address register 0CF9 Reset control 0 Configuration register p 26 E E Do or EIPC 3 6 3 h o 5 Programmers Reference User s Manual 6 1 9 Local Registers This list contains a summarv of PC related registers which are used for standard I O purposes like serial parallel I O IDE floppy disk graphics controller and keyboard controller Typically these registers are accessed via BIOS and device drivers Please refer to additional PC literature
27. igure 2 5 Location Port 2 8 EIPC 3 Users Interface Connectors Table 2 6 Pinout VGA Connector Pin Name Function 1 RED Red channel 2 Green 3 BLUE Blue channel 4 not connected 5 GND Ground digital 6 GND Ground red 7 GND Ground green 8 GND Ground blue 9 nc _not connected 10 GND Ground digital 11 nc not connected 12 DDC DATA Monitor data 13 HSYNC Digital HSync 14 VSYNC Digital VSync 15 DDC CLK Monitor data EIPC 3 S LI 2 Connectors Interface Connectors Users Manual Table 2 7 Pinout Flatpanel Connector Pin Signal Signal Pin 1 GND FP 14 2 3 GND 4 5 GND GND 6 7 P 0 8 9 FLM 1 10 os 11 GND FP 2 12 3 13 GND GND 14 28 15 GND FP 3 16 17 16 4 18 19 run 5 20 21 FP 18 FP 6 22 23 JGND ENAB 24 25 FP 19 26 27 FP 20 VDD 3 3 5V 28 29 VDD 3 3 5V 30 31 FP 22 FP 23 32 33 GND ENA_VDD 34 35 GND GND 36 37 FP 8 15 38 39 17 40 41 FP 10 reserved 42 43 GND 44 45 reserved 46 47 FP 12 48 49 FP 13 12V 50 Note Function of
28. in Signal Function 1 STROBE Strobe 2 D0 Data bit 0 3 D1 Data bit 1 4 D2 Data bit 2 5 D3 Data bit 3 6 D4 Data bit 4 7 D5 Data bit 5 8 D6 Data bit 6 9 07 Data bit 7 10 JACK Acknowledge 11 BUSV Busv 12 PE Paper end 13 SELECT Select 14 AFD Auto feed 15 ERROR Error 16 INIT Initialize 17 SELECTIN Select input 18 GND Ground 19 GND Ground 20 GND Ground 21 GND Ground 22 GND Ground 23 GND Ground 24 GND Ground 25 GND Ground 2 2 EIPC 3 User s Manual Users 2 1 3 Serial Interface Connectors EIPC 3 Supports two serial ports accessible via seperate frontpanel Like the parallel port vou can mount these connectors into the PC housing COM1 COM2 Figure 2 2 Location Serial Port EIPC 3 S LI 2 Connectors Interface Connectors Users Manual Table 2 2 Pinout Serial Port COM1 and COM2 COMI 9 pin SUB D COM2 25 pin SUB D Pin Signal Function Pin Signal Function 1 DCD Data Carrier Detect 2 TXD Transmit Data 2 RXD Receive Data 3 Receive Data 3 TXD Transmit Data 4 RTS Ready to Send Oo 4 DTR Data Terminal Ready 5 CTS Clear to Send os 5 Ground 6 DSR Data Set Ready 2 a 6 DSR Data Set Ready 7 GND Ground 7 RTS Readv to Send 8 DCD Data Carrier Detect 8 cTs Clearto Send 20 Data Terminal Ready 9 9 RI Ring Indicator 22 Ri
29. kplane e Two serial channels with hardware handshake e Bi directional parallel printer port EPP ECP e Keyboard and mouse interface with PS 2 style connectors e Watchdog timer can be enabled after system boot EIPC 3 1 1 Specification Users Manual e Power saving functions ESD and EMC protection for all front panel I O meeting the CE requirements o 9 9 5 1 2 EIPC 3 Specification Users Manual 1 11152 110215192 1 2 General Description VSI 194 pueoqhay pieoqAex 29112 28 IOd l9d VSI19d Xggttyz8 28955 S EIN Ot ISOS MA jouediej4 Addoj4 IS9S MN eoepelul I9d d5V 19 041u02 Figure 1 1 Block Diagram EIPC 3 o 5 9 5 Specification Users Manual The EIPC 3 is a fully AT compatible PC for industrial application The standardized PCI slot CPU format PICMG permits intallation in a industrial PC housing Equipped with an Pentium processor it meets the performance requirements of modern software Unlike off the shelf PCs the EIPC 3 is designed for rugged environments Special care has been taken to achieve a maximum use of extendability for customized applications Different types of frequencies and processors are supported by the EIPC 3 The clock frequency ranges from 300 to 850 MHz and more In contrast to EIPC 2
30. le e g from Windows file manager EIPC 3 5 1 2 m 5 Setup Users Manual 9 p 5 2 EIPC 3 Users Manual Programmers Reference 6 Programmers Reference 6 7 Memorv Address Table 6 1 Memorv Address Address Range Device Comment 0000 0000 640 Local DRAM 640 KB lower DRAM 0009 FFFF 000A 0000 128 VGA Video Used for standard VGA 000B FFFF modes 000C 0000 32 KB Video BIOS EPROM Video BIOS 000C 7FFF 000C 8000 16 KB SCSI BIOS fthe SCSI controller is 000C BFFF disabled via BIOS setup this range is used by the optional TFT boot BIOS 000C C000 16 KB BIOS Extension 000C FFFF PCMCIA 000D 0000 64 KB PCMCIA Network Reserved for these functions 000D FFFF EPROM 000E 0000 128 KB BIOS Used by Award BIOS and 000F FFFF SCSI 0010 0000 511 MB Local DRAM max 512 MB DRAM 1FFF FFFF ME 256 B SCSI SCSI PCI space ME 0000 00FF ME 0080 0000 8 MB VGA VGA linear video memory ME 00FF FFFF On power up reset the BIOS is mapped to the address range of 4 GB to 4 GB 512 KB to read the CPU instruction codes The BIOS EPROM is not accessible with later cycles at this position 6 1 1 640KB Local DRAM This is the lower 640 KB of the complete DRAM This range is always accessible by the CPU o0 Ec Go de
31. lectrostatic discharge can damage circuits or shorten their lifetime e Carefully remove the board from the shipping carton e Save the original shipping container and packing material for storing or reshipping the board e Inspect the board for any shipping damage If undamaged the module can be prepared for system installation e Set all jumpers to the desired position refer to Section 2 3 Jumpers EIPC 3 3 1 2 S Lad r Installation Users Manual OB Mouse Keyboard LED Primary IDE vO Serial2 Flatpanel Serial1 Secondary Connector IDE o 2 5 5 Parallel lt 2 A 5 3 D TI 2 Reset 2 Floppy o 2 m UW SCSI l Figure 3 1 Installation 3 2 EIPC 3 Users Manual Installation 3 2 DIMM Installation If the EIPC 3 is not shipped with DRAM DIMMs the user must insert own DIMMs on the board The EIPC 3 is not able to run without DRAM DIMM installation can be done easily The board has two DIMM sockets X401 and X402 representing DRAM bank 0 and bank 1 The BIOS software detects automatically which bank is populated Also the size of the DIMMs is detected automatically Also all used DIMMs must have the same speed selection either 60 or 70 ns access time The DIMM is simply plugged into the socket it fits only in one orientation The two latches on each socket must hold the DIMM Otherwise the DI
32. list of jumpers which can be set by the user Default settings are showing J1203 LCD PanellD J501 CC JI CMOS Battery 902 2 1901 2 SCSl Termination J1006 J1007 Figure 4 1 Location of Jumpers EIPC 3 4 1 Jumpers Users Manual 4 1 1 CMOS Battery Table 4 1 Jumper J501 Jumper 4501 Function not allowed 1 2 clear 5 2 3 normal operation default 4 1 2 SCSl Termination Table 4 2 Jumper J901 J903 Jumper J901 J902 J903 Function 1 2 1 2 Automatic Mode default 1 2 2 3 Automatic LowByte Termination Enable HighByte Termination 1 2 Automatic LowByte Termination Disable HighByte Termination 1 2 1 2 2 3 Enable Termination 1 2 1 2 Enable LowByte Termination Disable HighByte Termination Disable Termination all other not allowed 4 2 EIPC 3 User s Manual Jumpers 4 1 3 External PCI Interrupts There is only one PCI interrupt available for exclusive use on the external bus Therefore you can select one slot for this interrupt If your PCl Device can share ist interrupt with other devices There is no need changing the default setting Table 4 3 Jumper J1006 J1008 Jumper J1006 Function 1 2 Use IRQ D instead of IRQ A 2 3 default Jumper 41007 Function 1 2 Use IRQ D instead of IRQ B 2 3 default Jumper
33. ng Indicator 23 25 Not connected 2 4 EIPC 3 Users Interface Connectors 2 1 4 Ethernet The ethernet connector resides on the EIPC 3 frontpanel S LI 2 Connectors Figure 2 3 Location Ethernet Port Table 2 3 Pinout Ethernet Connector Pin Signal Function 1 TD Transmit data positive 2 TD Transmit data negative 3 RD Receive data positive 4 not connected 5 not connected 6 RD Receive data negative 7 not connected 8 1 not connected EIPC 3 2 5 Dl 52 29 oD o Interface Connectors Users Manual 2 1 5 Keyboard Mouse Like the EIPC the EIPC 3 has different PS 2 connectors for mouseand kevboard Mouse Kevboard Figure 2 4 Location Kevboard Mouse Port 2 6 EIPC 3 Users Manual Interface Connectors Table 2 4 Pinout Kevboard Connector Pin Signal Function 1 KBDAT Keyboard Data 2 nc Not connected 3 GND Ground 4 5V Vcc 5 KBCLK Keyboard Clock 6 Not connected Table 2 5 Pinout Mouse Connector Pin Signal Function 1 MSDAT Mouse Data 2 nc Not connected 3 GND Ground 4 5V Vcc 5 MSCLK Mouse Clock 6 Not connected EIPC 3 S LI 2 Connectors Interface Connectors Users Manual 2 1 6 VGA Connector Dl 52 29 oD o F
34. nt into the body or intended to support or sustain life Buyer agrees to notify ELTEC of any such intended end use whereupon ELTEC shall determine availability and suitability of its product or products for the use intended ELTEC points out that there is no legal obligation to document internal relationships between any functional modules realized in either hardware or software of a delivered entity This document contains copyrighted information All rights including those of translation reprint broadcasting photomechanical similar reproduction and storage or processing in computer systems in whole or in part are reserved 2001 ELTEC Elektronik AG Mainz Users Manual Table of Contents Table of Contents T initial pile 1 1 1 1 Main Features iii ie aus antenne 1 1 General Descrption i 1 3 1 3 Technical Details u l 1 7 ds 1 7 1 9 2 Chipset ua iaia ai lina 1 7 1 3 3 Memory Configuration 1 7 1 3 4 Firmware eee etos 1 8 1 3 5 Graphics Interface 1 8 1 3 6 Floppy Disk 1 8 1 3 7 Hard Diski i ecce 1 9 1 3 8 Ethernet Interface 1 9 1 8 9 O Features edere 1 10 1 3 10 Extended PCI Capabilities 1 11 1 3 11 CE Conformity 2 1 11 1 3 12 1 11 1 3 13 Operating
35. put the graphics controller is connected to the AGP bus It does not only feature the older VGA graphics standards but also provides high resolution screens With 2 MB of video RAM highest possible screen resolutions are 1024 x 768 pixels with 64k simultaneously displayed color Smaller resolutions can be used in true color mode To achieve higher data rates the video memory can be addressed in a linear mode in spite of the commonly used memory mapping techniques A Windows accelerator provides additional performance in Windows application The video outputs support both CRT and flat panel displays A wide range of display types can be adapted to the Eltec IPC Displays can be connected using unbuffered TTL signal level The EIPC 3 supports up to 4 IDE devices 2 ports with up to 33 MB sec UltraDMA 33 as well as an 16 bit SCSI I and II interface at the PCI local bus where up to 15 devices can be connected The controller support UltraSCSI with transfer rates up to 40 MB sec if supported by the devices To achieve maximum flexibility and performance the Eltec IPC has equipped with a PCI PCI bridge DEC 21152 to support up to 4 PCI Busmaster on a external PICMG compatible backplane The bridge is fully compilant with PCI Local Bus Specfication 2 1 It provides full support for delayed transactions which enables the buffering of memory read I O and configuration transactions The network interface consists of a Intel 82559 PCI The controller
36. rnate use for COM2 IrDA 1 0 115 2 kbps lm feet IrDA 1 1 4Mbps 1m 3feet 2 2 9 Keyboard MF2 AT mode PS 2 mode EIPC 3 Interface Connectors 2 13 S LI 2 Connectors O 5 5 5 5 p Interface Connectors User s Manual 2 2 10 Mouse PS 2 mode Serial mouse at channel 1 or channel 2 2 2 11 Parallel I O Centronics bidirectional unbuffered TTL Transfer Rate max 2 MB s 2 14 EIPC 3 Users Manual Interface Connectors 2 2 12 Video I O Dotclock max 135 MHz CLUT 4 8 16 24 bit pixel 16 256 32 K 64 K 16 M colors depending on screen resolution Video Resolution 320 x 200 1280 x 1024 Horizontal Frequencies max 80 kHz Vertical Frequencies max 85 Hz 2 2 13 MTBF Values 8356 h computed after MTL HDBK 217E 111970 h realistic value from industry standard experience ESD Values 2 kV Human body method EIPC 3 2 15 S LI 2 Connectors O 5 5 o w 5 5 p Interface Connectors User s Manual 2 2 14 Environmental Conditions Storage Temperature 0 70 C Table 2 8 Operating Temperature CPU CPU Power Air Air Flow Heat Sink Heat Sink Frequency Dissipation Temperature m s with Fan MHz W 2 300 17 5 x 300 17 5 48 2 x 366 21 4 X 366 21 4 40 2 x 433 24 X
37. sion Serial number BSP revision Memorv size EIPC 3 IP address Host IP address User Ftp password Boot file Host Configuration 3 Configuration Ethernet IP address VxWorks boot file Tornado development tool revision API software revision Operating svstem and revision Error Description What must be done to reproduce the error Listing of config h file the completed form to ELTEC Elektronik AG Support Mainz Germany Phone 49 6131 918 520 Fax 449 6131 918 196 E Mail support eltec de Web http www eltec com Germanv ELTEC Elektronik AG Galileo Galilei StraBe 11 Postfach 42 13 63 D 55071 Mainz Phone 449 6131 918 0 Fax 449 6131 918 195 France ELTEC International SARL 1 All e des Garavs F 91872 Palaiseau Cedex Phone 33 1 64 47 18 77 33 1 64 47 09 33 Great Britain ELTEC International PLC 84a High Street Stonv Stratfort GB Milton Kevnes 111 Phone 44 1908 56 22 88 Fax 44 1908 56 39 91 USA American ELTEC Inc 101 College Road East Princeton Forrestal Center USA Princeton NJ 08540 6601 Phone 1 609 4 52 15 55 1 609 4 52 73 74
38. the EIPC 3 support Celeron Pentium III processor with 100 MHz Front Side Bus to archieve the maxium performance of the chipset Up to 512 MB of DRAM are available for large application software and data Standard 168 pin DIMM modules are used To reduce system costs the customer can select the right amount of memory needed for the application Updates of memory resources are possible if required The backbone of the EIPC 3 is the synchronous 32 bit PCI local bus It runs at halfthird the CPU bus frequency typically 33 MHz Although data and addresses are multiplexed a maximum data transfer rate of 133 MB sec can be achieved during bursts The CPU communicates with all I O devices via PCI To reduce the load on the PCI the CPU use the AGP bus to communicate with the graphic controller I O devices which require a high data throughput to the CPU or main memory are placed directly on the PCI bus I O devices which are less time critical are connected to the commonly used ISA bus A single chip bridge links PCI and ISA bus together The bridge contains a posted write buffer for PCI initiated memory write cycles to the ISA bus to relieve the PCI bus from waiting for the end of an ISA write cycle A similar functionality is provided with an ISA to PCI buffer which collects both write and read cycles from ISA masters and DMA channels 1 4 EIPC 3 Users Manual Specification Because today s graphics applications require high data through
39. y 50 MHz 3 4 5 6 Panel 6 640 x 480 TFT 18 Bit 50 MHz 1 2 3 4 5 6 Panel 7 1024 x 768 TFT 53 MHz 7 8 Panel 8 800 x 600 TFT 50 MHz 1 2 7 8 Panel 9 800 x 600 TFT 40 MHz 3 4 7 8 Panel 10 800 x 600 TFT 50 MHz 1 2 3 4 7 8 Panel 11 800 x 600 DSTN 40 MHz 5 6 7 8 Panel 12 800 x 600 DSTN 40 MHz 1 2 5 6 7 8 Panel 13 1024 x 768 TFT 65 MHz 3 4 5 6 7 8 Panel 14 1280 x 1024 DSTN 60 MHz 1 2 3 4 5 6 7 8 Panel 15 1024 x 600 DSTN 40 MHz Panel 16 1024 x 600 TFT 50 MHz EIPC 3 4 5 Jumpers Users Manual 4 6 EIPC 3 Users Manual 5 Setup 5 BIOS Setup 3 is delivered with an AWARD BIOS BIOS includes a setup menu to configure basic settings ELTEC ships the EIPC 3 with optimized BIOS settings If desired most of the BIOS settings can be changed some settings are hardwired Also if the battery for the CMOS RAM is weak the RAM may loose its contents making a new setting of the setup necessary Caution should be taken because some changes of settings may cause an erroneous system behavior 5 1 Testing the Installation After power is switched on the BIOS displays a message on the CRT screen It takes some time before the BIOS is ready to display After system boot from harddisk or floppy drive the keyboard should work The driver software for the mouse should detect the mouse device If a network is installed other network devices if existent should be accessib
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