MC10P01B User Manual V1.3
Contents
1. MC20P04 User Manual V1 2 Be 19 01 EB F 1 5 Block Diagram of pins PI OPTION 6 gt Programming High Voltage OPTION 3 gt Reset E MV Data Bus RD i PU Pull up Enable gt Output Enable I2 A Data Bus e D 0 A WR QB V V gt d Shanghai SinoMCU Microelectronics Co Ltd Page 8 of 40 5II1 II1CLI eim MC20P04 User Manual V1 2 PUD Pull up Enable Output Enable Pin Data Bus Q oe WR x MVX A RD Pull down Enable PUDC Pull up Enable Output Enable Comp Enable 5 Comparator Y Data Bus e r y WR 08 H 4 V MUX RD Pull down Enable i gt Shanghai SinoMCU Microelectronics Co Ltd Page 9 of 40 5II1 I11CLI 9 2 MC20P04 User Manual V1 2 PIO OSC bl gt JL2. Characteristics Pin Condition Min Symbol External Oscillator Frequency Fosc 400K 8M Hz 1 2 1 Fira amr 1 4 1 MHz I 1 8 1 2 2 2 T 40 C 85 C Fhrc2 VDD 5V 2 4 2 MHz i 2 8 2 Internal RC Frequency 1 596 2 1 596 Fhrcs eons 15 4 15 MHz 077 15 8 15 __ 2 5 2 2 5 Fhrca sy 25 4 2 5 MHz 25 8 2 5 T 25 C WDT Oscillator Frequency Fwat 20 64 20 KHz Oscillator Start Time 20 ms 10 4 Comparator Electrical Characteristics VDD 5V 25 Characteristics Pin Condition Min Symbol Operating Voltage VDD 3 0 5 5 V After software calibrate 2 mV Input Offset Voltage Vos Before software calibrate 15 mV Common Mode Input Voltage VCM 0 VDD 1 4 V Response Time input voltage difference gt 10mV 2 us Shanghai SinoMCU Microelectronics Co Ltd Page 30 of 40 5II1 II1CLI 9 2 MC20P04 User Manual V1 2 11 Dimension of Package DIP20 MILLIMETER I NR A 360 380 400 1 0 51 Los eC A2 310 330 350 A A3 142 152 162 b 0 44 0
3. 1 L BASE METAL S WITH PLATING SECTION B B SYMBOL MILLIMETER MIN NOM MAX A 3 60 3 80 4 00 1 0 51 2 3 10 3 30 3 50 142 1 52 1 62 b 0 44 0 53 1 0 43 0 46 0 48 1 1 5285C C 0 25 E 0 31 cl 0 24 0 25 0 26 D 18 90 19 10 19 30 El 6 15 6 35 6 55 e 2 54BSC eA 7 62BSC eB 7 62 9 50 0 8 0 94 L 3 00 SYMBOL MILLIMETER MIN NOM MAX A 8 1 77 Al 0 08 0 18 0 28 A2 1 20 1 40 1 60 A3 0 55 0 65 0 75 b 0 39 gt 0 48 1 0 38 0 41 0 43 C 0 21 0 26 C1 0 19 0 20 0 21 D 845 8 65 8 85 E 5 80 6 00 6 20 E1 3 70 3 90 4 10 e 1 27BSC L 0 50 0 65 0 80 L1 1 05BSC 0 0 8 Shanghai SinoMCU Microelectronics Co Ltd Page 34 of 40 siInsmcu MC20P04 User Manual V1 2 19 fax EB DIP8 MILLIMETER SYMBOL MIN NOM MAX A 3 60 3 80 4 00 Al 0 51 N 310 330 3 50 3 1 50 1 60 1 70 0 44 0 53 1 0 43 0 46 0 48 B1 1 52BSC bl c 0 25 031 BASE METAL cl c cl 0 24 0 25 0 26 D 9 05 9 25 9 45 WITH PLATING SRETTON B B 1 6 15 6 35 6 55 e 2 54BSC eA 7 62BSC eB 7 62 9 50 eC 0 L 0 94 L 3 00 SOP8 MILLI
4. P21 P20 R W R W R W Initial Value 0 0 BIT 1 0 P2n P2 Data register n 1 0 01 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 DDR0 DDR07 DDR06 DDR05 DDR04 DDR03 DDR02 DDR01 DDR00 R W R W R W R W R W R W R W R W R W 0 0 0 0 0 0 0 0 Value BIT 7 0 DDROn Direction Register 7 0 0 Configured to input Shanghai SinoMCU Microelectronics Co 1 Page 17 of 40 siInsSmcu 9 9 MC20P04 User Manual V1 2 1 Configured to output 05 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 DDH1 DDR16 DDR15 DDR14 DDR13 DDR12 DDR11 DDR10 R W R W R W R W R W R W R W R W Initial Value 0 0 0 0 0 0 0 BIT 6 0 DDRin LI Direction Register n 6 0 0 Configured to input 1 Configured to output 09 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 DDR2 DDR21 DDR20 R W R W R W Initial Value 0 0 5III1 0 DDR2n F2 Direction Register n 1 0 0 Configured to input 1 Configured to output 0D Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 MCR KBIE KBIC WDTE WDTC WDTF WDTM USEL R W R W R W R W R W R W R W R W Initial Value 0 0 0 0 0 0 0 BIT 1 USEL System clock output enable bit 0 P21 is a GPIO port 1 System clock Fosc output at P21 P21 is configured to output port
5. A 5 lt gt Pin Data Bus e D Ss 0 48 7 WR CLK QB V 4 MVX 2 OSC Circuit RD Shanghai SinoMCU Microelectronics Co Ltd Page 10 of 40 5II1 II1CLI 9 MC20P04 User Manual V1 2 2 CPU 2 1 Instruction Set MC20P04 uses HC05 compatible instruction set For detail information about instruction set please refer to the HC05 instruction Set provided by SinoMCU Note MC20P04 does not support MUL instruct 2 2 Address Space 0000 0011 Control Register 0012 007F Reserved 0080 00FF RAM share by Stack 0100 0FFF Reserved 1000 1FFF OTP ROM 2 3 Program Memory ROM Program memory of MC20P04 which is an OTP ROM with size of 4K bytes 8 bit to store instructions The address 1FE0 1FFF of program memory is reset interrupt vector area Refer to 8 1 2 4 Data Memory RAM Data memory of MC20P04 has 128 bytes 8 bits which are shared with stack For more information about stack please refer to the datasheet 05 Instruction Set 2 5 Configuration Bit OPBIT Configuration Bit OPBIT is a special bit in OTP It is used as configuring system functions OPBIT can be programmed by SinoMCU programmer The OPBIT of MC20P04 is defined as follows Bit 7 Bite Bit5 Bit4 Bit3 Bit 2 Bit 1 Bit 0 OPBIT ENCR RESE LVRE LVRS RSTE WDTEO OSCS1 OSCSO BIT 7 ENCR Program memory protection bit 0 Prote
6. u 2 3 Program Memory 2 4 Data Memory ES 2 5 Configuration Bit OPBIT Hk ss 2 6 Control Registers V 3 System DEN 3 1 External Oscillator 0 cece ee ee ee k 3 2 Internal High accuracy RC ME 3 3 Oscillator ec ees 4 NEER MMM eee eee eens 4 1 Description oe oo oe oe 4 2 Power on Reset Mi 4 3 External rest MESES 4 4 45 Reset DW 5 I 0 5 1 IO 5 2 Up WStor Co
7. timer interrupt TMI WDT overflow interrupt and software interrupt SWI INTO TMI and WDTI can be masked by I bit which is in CPU status control register CCR but SWI cannot be masked Furthermore SWI is also an instruction For details about SWI please refer to the data sheet HC05 Instruction Set The process of interrupt service is lt gt While interrupt request occurring CPU pushes all the relative registers 5 bytes altogether to stack set I bit to 1 and mask all the other interrupts Differently from system reset hardware interrupt does not terminate current instruction execution but suspends itself until current instruction finished While responding interrupt firstly CPU fetches the address of the interrupt service subroutine from the corresponding interrupt vector then jumps to the subroutine and executes Each interrupts service subroutine needs an RTI instruction When executing RTI CPU pops all the relative registers from stack and executes the instruction exactly after the interrupt happened The interrupt vectors are shown below The priority is decreased from bottom to top in the list INT Vector Address Interrupt 1FEO 1FF1 Reserved 1FF2 1FF3 WDTI 1FF4 1FF5 KBI 1FF6 1FF7 TMI 1FF8 1FF9 INT1 1FFA 1FFB INTO 1FFC 1FFD SWI 1FFE 1FFF RESET 8 2 External Interrupt POO and 601 of 20 04 b
8. ca MN co co cok oe oh ack doe dk oh ob oe VE SH UDG 8 1 General Descriptio i mp 8 2 External Interrupt a wht Baan pac we 8 23 Keyboard Lnterr pt be 85 WDT lt V 9 System working mode u uq ed va Saba d oras 9 7 babi _ _ C lt ____ __ _ _ _ __ _ _ _ __ 3 10 Electrical Specification serari ritan nude iy Shanghai SinoMCU Microelectronics Co Ltd Page 2 of 40 5I I1 IIICLI 9 MC20P04 User Manual V1 2 10 1 Absolute Maximum Rating 22 22 22 222 Gu su 29 10 2 DC Electrical Characteristics osc ec Jadot ak RESO EASDEM 29 10 3 AG Electrical 1561
9. MC20PO4 has two kinds of Low power consumption mode STOP mode and WAIT mode 9 1 STOP Mode The instruction STOP makes system enter STOP mode which has several effects bellow lt System oscillator stops Clear I bit in CCR and enable interrupt request RAM data hold All states of GPIO remain All the internal operation stops If any condition is happened as below system will exit from STOP mode External interrupt INTO request occurs KBI request occurs Timer overflow interrupt TMI when timer clock source is pin TCC request occurs WDT overflow cause WDTI interrupt request occurs Any type of system reset occurs While system works in STOP mode almost all the operations stop so the power consumption is very low 9 2 WAIT Mode The instruction WAIT makes system enter WAIT mode which has several effects bellow gt CPU clock stops CPU and internal bus activities terminate TIMER keep working Clear I bit in CCR and enable interrupt request RAM data hold All states of GPIO remain All states of registers remain If one of the following things happens CPU clock will restarts and system will exit WAIT mode P Any type of interrupt request occur Any type of system reset occurs While system works in WAIT mode CPU stop but the system oscillator still works so the power consumption is lower than normal mode Shanghai SinoMCU Microelectr
10. 5 ck sal el Reb xe IARE RTI 30 10 4 Comparator Electrical Characteristics 30 11 Dimension of erect aree xara bau d eut abus 3l 12 App ndi x silii d debe huahua eee dec ed 36 12 1 Characteristics Graph of Internal 36 12 2 Characteristics Graph of IO Port Driving Ability 3T 12 3 Characteristics Graph of WAIT mode Operating 38 12 4 Characteristics Graph of Dynamic Supply Current 39 22 00 12 02 20 22 RD dores pred idu eddie brides ie 40 Shanghai SinoMCU Microelectronics Co Ltd Page 3 of 40 sirn mcu 9 2 MC20P04 User Manual V1 2 MC20P04 User Manual V1 2 1 Introduction MC20P04 is a high performance 8 bit Microcontroller It has an internal high accuracy RC oscillator circuit two comparators The high anti interference performance of the product can provide good solutions for many kinds of small household appliances 1 1 Product characteristics lt gt gt gt gt gt 8 bit CPU with CISC architecture AK 8 bits OTP ROM 128 bytes RAM Three groups of IO port 17 GPIOs at most and one input port Two comparators offset can b
11. Iwarr uA lt E 2 Je 5 2 0 25 3 5 f 4 5 5 0 5 5 VDD Value V Shanghai SinoMCU Microelectronics Co Ltd Page 38 of 40 siInsSmcu ER eim MC20P04 User Manual V1 2 12 4 Characteristics Graph of Dynamic Supply Current IDD vs Supply Voltage External Vibration Mode VDD Value V Shanghai SinoMCU Microelectronics Co Ltd Page 39 of 40 sinSmcu MC20P04 User Manual V1 2 13 Revision History 1 0 2012 3 26 First edition issued 11 2013 8 22 86 1 change the description of 1 2 2013 9 18 86 1 change the description of WDTC Shanghai SinoMCU Microelectronics Co Ltd Page 40 of 40
12. No WDT reset occurred 1 WDT reset occurred Write 0 to clear flag write 1 invalid BIT 2 LVRRF LVR reset flag Shanghai SinoMCU Microelectronics Co Ltd Page 14 of 40 5II1 II1CLI seem MC20P04 User Manual V1 2 0 No LVR reset occurred 1 LVR reset occurred Write 0 to clear flag write 1 invalid BIT 1 RSTRF External Port reset flag 0 No External Port reset occurred 1 External Port reset occurred Write 0 to clear flag write 1 invalid BIT 0 PORRF power on reset flag 0 No Power on reset occurred 1 Power on reset occurred Write 0 to clear flag write 1 invalid 4 2 Powet on Reset Power on reset circuit of MC20P04 can adapt to the fast or slow supply voltage rising and make the system reset when supply voltage jitter occurs The steps of Power on reset as follow 1 Waiting for voltage higher than and keep stability 2 Waiting for the reset pin voltage higher than Vu when the external port reset functions is enabled 3 Reset PC pointer and initialize all registers 4 System clock oscillator start and waits for 4096 clock period 5 System executes instruction 4 3 External test Whether the external reset is enabled can be configured by the RSTE in the OPBIT And RESE can select to enable the internal pull up resistor of the pin refer to 2 5 The external reset pin is Schmidt structure low level effective 4 4 LVR Reset The LVR
13. and work in the internal RC oscillation mode 5 2 Pull up Resistor Whether PO and LI pull up resistor enabled is determined by PDCON and PUCON approximately 25KQ Pull up resistor is enabled when the port is configured to input state Configured to output port is not affected even though pull up resistor enabled The pull up pull down resistor of PO can be enabled at the same time The pull up resistor of P17 port approximately 50 can be enabled by RESE in OPBIT refer to 2 5 502 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 POHCON 7 PH06 5 PH04 PH03 PH02 PH01 PH00 R W R W R W R W R W R W R W R W R W Initial Value 0 0 0 0 0 0 0 0 BIT 7 0 PHOn PO port pull up selection 7 0 0 Pull up disable 1 Pull up enable Shanghai SinoMCU Microelectronics Co Ltd Page 18 of 40 5II1 I11CLI MC20P04 User Manual V1 2 FR 03 158 05 Bit7 Bite Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 1 16 PH15 PH4 PH13 PH12 11 PH10 R W RW R W R W R W RW R W R W Initial Value 0 0 0 0 0 0 0 BIT 6 0 1 Pull up enable 5 3 Pull down Resistor PHin LI port pull up selection 6 0 0 Pull up disable Whether PO pull down resistor enabled is determined by PDCON and PUCON Capproximately 25K Q Pull down resistor is enabled when the port is configured to input state Configured to
14. 0 24 0 25 0 26 D 11 25 11 45 11 65 10 10 10 30 10 50 o aca El 7 30 7 50 7 70 6 1 27BSC L 070 0 85 1 00 L1 1 40BSC 9 0 8 Shanghai SinoMCU Microelectronics Co Ltd Page 32 of 40 siInsSmcu MC20P04 User Manual V1 2 EB F DIP16 MILLIMETER SYMBOL MIN NOM MAX A 360 380 4 00 1 0 51 A2 3 10 3 30 3 50 A3 142 1 52 1 62 0 44 0 53 b1 0 43 0 46 0 48 B1 1 52BSC 4 0 25 F 0 31 bl cl 0 24 025 026 LH D 18 90 19 10 19 30 BASE METAL 1 615 6 35 6 55 WITH PLATING e 2 54BSC SECTION B B eA 7 62BSC eB 7 62 1 9 50 eC 0 0 94 L 3 00 SOP16 D MILLIMETER SYMBOL MIN NOM MAX ai A 177 I M d T Al 0 08 0 18 0 28 A2 1 20 1 40 1 60 A3 0 55 0 65 075 b 039 0 48 b1 0 38 0 41 0 43 gt C 0 21 0 26 c1 019 020 0 21 BASE METAL D 970 990 10 10 WITH PLATING E 5 80 6 00 6 20 SECTION B B El 370 390 410 e 1 27BSC 0 50 0 65 0 80 L1 1 05BSC 0 0 8 Shanghai SinoMCU Microelectronics Co Ltd Page 33 of 40 sirn mcu P 19 EB MC20P04 User Manual V1 2 b bi BASE METAL cl WITH PLATING SECTION B B SOP14 AS 1 m Al 0 L
15. 10 P21 P20 and input port P17 Each bi directional IO port is controlled by the corresponding Data Register PO Pl P2 and direction reg ister DDRO DDR1 DDR2 The function of data register and direction register is listed below R W DDR Function w 0 IO port is input port Data is written to the output data register 1 IO port is output port Data is written to the output register and output to the port R 0 IO port is input port Data is read from ports R 1 IO port is Output port Data is read from the output data register When system is conf igured to the external crystal oscillator mode P20 and P21 cannot be used as IO port the corresponding register control bit is invalid The master clock is output at P21 when USEL 1 in MCR and P21 set as output port 00 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 PO 07 P05 P04 P03 P02 P01 P00 R W R W R W R W R W R W R W R W R W Initial Value 0 0 0 0 0 0 0 0 BIT 7 0 POn PO Data register n 7 0 04 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 P1 P17 P16 P15 P14 P13 P12 11 10 R W R R W R W R W R W R R W R W Initial Value X 0 0 0 0 0 0 0 BIT 7 0 Pin LI Data register n 7 0 08 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 P2
16. sirnn mcu Be 19 EB 7 Comparator MC20P04 includes two comparators When COEN 1 MC20P04 User Manual V1 2 COMP and COMPI the function of COMPO is turn on The positive input and negative input of comparators joined to P02 and L03 the GPIO function of the two pins will be disabled automatically the output of the comparator can be read by bit COVO Similarly when CIEN 1 the function of is turn on The positive input and negative input of comparators joined to P06 and P07 the GPIO function of the two pins will be disabled automatically The input offset is adjustable 1 Set CnOFM to enter offset calibrate mode S3 is closed 2 Setting CnCRS to select offset calibrate port Sl or S2 is closed the output of the comparator can be read by bit CIVO The calibration steps as following 0 7 0 cPnP Xx 3 Change CnOF 5 0 until output CnVO status is changed 4 Clear CnOFM 0 to exit offset calibrate mode Here are the relative registers 0F Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 CMPC C1VO C1EN C0V0 R W R RAN R RAN Initial Value 0 0 0 0 BIT 3 C1VO Comparator COMP1 output positive logic read only bit BIT 2 C1EN Comparator enable bit 0 COMP1 disable 1 COMP1 enable the GPIO function of P06 and 607 is disabled automatically BIT 1 COVO Comp
17. the counter decrements to zero the timer interrupt flag TIF bit in TCR is set Once the interrupt flag is set an interrupt is generated to CPU when TIM bit in TCR is set and I bit in CCR is cleared For more information about interrupt please refer to 8 4 The counter TDR may be read at any time without disturbing the counting If writing a new value to TDR the counter will count from the new value immediately The prescaler cannot writable and readable however it can be cleared by two conditions as below 1 PTA 0 The prescaler is assigned to TIMER TDR is written 2 PTA 1 The prescaler is assigned to WDT WDTC in MCR register is cleared Here are the relative registers of TIMER 0A Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 TDR r TDR6 TDR5 TDR4 TDR3 TDR2 TDR1 TDRO R W R W R W R W R W R W R W R W R W Initial Value X X X X X X X X Shanghai SinoMCU Microelectronics Co Ltd Page 20 of 40 sin sSmcu 9 9 2 MC20P04 User Manual V1 2 BIT 7 0 TDR 7 0 TDR is a read write register which contains the current value of TDR 0B Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 TCH TIF TIM PR2 PR1 PRO PTA PTS PTE R W R W R W R W R W R W R W R W R W NAME 0 1 0 1 1 0 0 0 BIT 7 TIF Overflow flag 0 TIMER overflows un occur 1 TIMER overflows occur Write 0 clears TIF Wri
18. voltage of MC20P04 has two levels 2 1V 3 6V LVR function is configured by VBORS in OPBIT refer to 2 5 The low voltage detection circuit has hysteretic characteristics usually the hysteretic voltage is about 0 05V In this case if 3 6V voltage selectable LVR reset action while the supply voltage low to 3 6V and the reset is released while the voltage up to 65V Note D LVR voltage 2 1V and 3 6V used as design reference only error obviously cannot be used as accurate voltage detection Note 2 0 05V is theoretical value Shanghai SinoMCU Microelectronics Co Ltd Page 15 of 40 sin sSmcu Be 19 EB 4 5 WDT Reset MC20P04 User Manual V1 2 WDT reset is the protection mechanism for normal operation of the system Usually user will clear the WDT timer to zero regularly the timer will not be overflow If the system is out of the conditions exceptionally WDT timer will be overflow and reset system then the system initial and return to controlled state WDT has an independent internal RC oscillator WDT reset will be occurs when the system clock oscillator is stopped the time range of WDT overflow is 32ms 4096ms with different division About the WDT watchdog timer details refer to 6 2 Shanghai SinoMCU Microelectronics Co Ltd Page 16 of 40 5II1 II1CLI Be 19 EB 5 I 0 5 1 IO Wotking Mode MC20P04 User Manual V1 2 MC20P04 has 17 general bi directional IO port P07 P00 16
19. 53 1 0 43 0 46 0 48 B1 1 52BSC C 0 25 0 31 a c1 0 24 0 25 0 26 a D 26 03 26 23 26 43 BASE METAL 1 6 35 6 55 675 WITH PLATING e 2 54BSC SECTION B B 7 62BSC eB 7 62 9 50 eC 0 0 94 L 3 00 SOP20 SUMBOL MILLIMETER MIN NOM MAX 2 70 X Jh Al 010 020 030 2 210 230 250 0 92 102 112 0 35 I 0 44 1 0 34 0 37 0 39 C 0 26 0 31 bl c1 0 24 0 25 0 26 7 12 60 12 80 13 00 i E 10 10 10 30 10 50 WITH PLATING E1 7 30 7 50 7 70 SECTION B B 127BSC L 070 085 1 00 L1 1 4085C 0 0 8 Shanghai SinoMCU Microelectronics Co Ltd Page 31 of 40 sin mcu MC20P04 User Manual V1 2 8809 398 DIP18 MILLIMETER MIN NOM MAX A 3 60 380 400 1 0 51 2 310 3 30 3 50 3 142 1 52 1 62 0 44 0 53 1 043 046 048 1 1 52 5 C 0 25 0 31 1 0 24 025 026 BASE METAL 22 70 22 90 23 10 WITH PLATING 1 6 40 6 60 6 80 2 54BSC eA 7 62BSC eB 7 62 9 50 eC 0 0 94 L 3 00 z SOP18 ji MILLIMETER MIN NOM MAX N A 250 is I Ai 008 018 028 2 210 230 250 092 102 112 b 0 35 0 44 1 0 34 0 37 0 39 b c 0 26 0 31 1 cl
20. MC20P04 User Manual V1 2 8 Bit MCU designed by SinoMCU 2013 09 18 Note Should there be any inconsistencies between Chinese and English version the Chinese version shall prevail sinsSmcu P 05 fn F 27 L TIRAS Shanghai SinoMCU Microelectronics Co Ltd SinoMCU reserves the right to make changes without further notice to any products herein The information contained in this document may subsequently be updated or withdrawn so the customer should ensure that it has the most up to date version sinsmcu MC20P04 User Manual V1 2 Be ink EB Contents l Introduction l l Product character 1 Stics cys een te Fh heat ey ad obe Cop Cb DP Ces I l4 Descriptio eruere iPeberdcafubuevjseTuc Sapa S M SDS 1 5 Block Diagram Of DINS caricias ied a _ 9 7 7 2 2 Address Space ee db edes eld Bh et
21. METER 5VM80L 5921 MIN NOM MAX iy Le ok Jf AL 1 5 Al 0 m 1 0 08 0 18 0 28 A2 1 20 140 1 60 3 0 55 0 65 0 75 0 39 I 0 48 b 1 0 38 0 41 0 43 021 0 26 cic 0 19 020 021 D 470 490 510 WITH PLATING SECTION 8 8 E 5 80 600 620 El 370 390 410 e 1 27BSC L 0 50 0 65 0 80 1 05BSC 0 0 2 89 Shanghai SinoMCU Microelectronics Co Ltd Page 35 of 40 siInsSmcu MC20P04 User Manual V1 2 12 Appendix Note the contents of appendix is just for your reference 12 Characteristics Graph of Internal RC IRC Frequency vs Supply Voltage T 25 C HRC Frequency MHz 3 5 4 0 VDD Value V IRC Frequency vs Temperature VDD 5V HRC Frequency MHz R I o c 3 o LL ac as VDD Value V Shanghai SinoMCU Microelectronics Co Ltd Page 36 of 40 sInsSmcu ER MC20P04 User Manual V1 2 12 2 Characteristics Graph of IO Port Driving Ability Low level Driving Ability skin current VDD 5V High level Driving Ability pull current VDD 5V lt c gt Y x 17 pull current mA 1 0 VOL V VOH V Shanghai SinoMCU Microelectronics Co Ltd Page 37 of 40 s nsmcu ER etim MC20P04 User Manual V1 2 12 3 Characteristics Graph of WAIT mode Operating Current Imar vs Supply Voltage External Vibration Mode
22. P10 2 P10 16 4 53 P20 OSCI 16 P20 OSCI pi7 RstB vePE 5 5 P21 0sco 17 P21 0SCO GND 6 GND 5 VDD P00 INTO 7 P07 CP1P P00 INTO 6 P07 CP1P PO1 INT1 8 6 01 LI 7 RS P06 CP1N P02 CPON 9 05 P02 CP0N 8 P05 P03 CP0P 10 P04 P03 CP0P 9 P04 DIP20 SOP20 DIPIS SOPIS 212 1 P11 13 2 P10 P03 CPOP P02 CPON 16 20 08 P06 CP1N 5 PO1 INTl P17 RSTB VPP 4 P21 0SCO P07 CP1P E P00 INTO GND 5 gt GND PO0 INTO 6 P07 CP1P 21 05 E P17 RSTB VPP P02 CPON L 7 FS P06 CP1N P20 OSCI Am P16 TCC 8 04 P11 P14 DIP16 S0P16 P16 TCC 1 P17 RSTB VPP LI 2 GND POO INTO 4 7 1 6 H VOVPOd0ZON DIPS SOPS Shanghai SinoMCU Microelectronics Co Ltd Page 6 of 40 siInsSmcu MC20P04 User Manual V1 2 RIEF 1 4 Pin Description NO ER Roy gt 7 gt 2 Pin direction Type Functional Description 20 18 16pin 14 8pin 1 2 2 P13 I O PU GPIO pull up resistor selectable KBI function 2 8 P14 I O PU GPIO pull up resistor selectable KBI function 3 P15 I O PU GPIO pull up resistor selectable KBI function P16 GPIO pull up resistor selectable KBI fu
23. P10 X000 0000 05 DDR1 R W i DDR06 DDR15 DDR14 DDR13 DDR12 DDR11 DDR10 000 0000 06 P1HCON R W PH16 PH15 PH14 PH13 PH12 PH11 PH10 000 0000 07 KBIM R W 3 KBIM6 KBIM5 KBIM4 KBIM3 KBIM2 KBIM1 KBIMO 000 0000 08 P2 R W L i P21 20 00 09 DDR2 R W 004 21 00820 00 0A TDR R W TDR7 TDR6 TDR5 TDR4 TDR3 TDR2 TDR1 TDRO XXXX 0B TCR R W TIF TIM PR2 PR1 PRO PTA PTS PTE 0101 1000 0C INTC R W INTOE INTOM1 INTOMO INTOF INTIM1 INTIM0 INT1F 0000 0000 0D MCR R W KBIE KBIC WDTE WDTC WDTF WDTM USEL 0000 000 0E RSTFR RW i WDTRF LVRRF RSTRF PORRF 0000 R W C1VO C1EN C0V0 0000 10 CMPOA R W COOFM COCRS COOF5 COOF4 COOF3 COOF2 COOF1 COOFO 0010 0000 11 CMP1A RW C1OFM 5 C1OF5 C1OF4 C1OF2 C1OF1 C1OFO 0010 0000 Shanghai SinoMCU Microelectronics Co Ltd Page 12 of 40 5II1 II1CLI Be 19 EB 3 System Clock MC20P04 User Manual V1 2 The signal Fosc is generated by external crystal or ceramic oscillator or internal high accuracy RC oscillator The system clock Fsys is 1 2 frequency division of the signal Fosc WDT clock source is internal frequency FC oscillator 3 1 External Oscillator Crystal or ceramic oscillator is connected as following diagram when the exter
24. T 6 5 01 Rising edge trigger 10 Low level trigger 11 High level trigger INTOF INTO flag bit 0 INTO interrupt un occur BIT 4 1 INTO interrupt occur Write 0 to clear flag write INT1 enable bit 0 INTI disable 1 INTI enable INT1M 1 0 INTI trigger selection 00 Falling edge trigger is invalid BIT 3 BIT 2 1 01 Rising edge trigger 10 Low level trigger 11 High level trigger INTI flag bit 0 INTI interrupt un occur BIT O 1 INTI interrupt occur Write 0 to clear flag write 1 is invalid 8 3 Keyboard Interrupt P16 P10 of MC20P04 can be used as keyboard interrupt inputs All the keyboard interrupt inputs shared same interrupt vector To determine which port triggers the interrupt by read from GPIO s data register The function of keyboard interrupt control bit as below 1 KBIE is enable bit of KBI while KBIE 1 KBI interrupt enable While KBIE 0 KBI interrupt disable Shanghai SinoMCU Microelectronics Co Ltd Page 26 of 40 55 I9 ink EB F 2 KBIM 6 0 corresponding to P1 6 0 are mask bit of KBI while KBIMn 1 which means the KBI interrupt function of Pln is enable Otherwise KBI function is disabling 3 When the input level of 16 10 is from high level to low level the keyboard interrupt MC20P04 User Manual V1 2 request will be triggered Besides the control bit KBIC in MCR is used to clear
25. WDT is independent of the system clock So the WDT will still run even if MC20P04 User Manual V1 2 the system is in STOP mode And WDT reset or WDTI interrupt can still work normally system will be reset WDTF bit will be set WDTI interrupt request will occurs WDTC is used for clear WDT WDT will be cleared when WDTC write 1 The nominal time out period of the WDT timer is 2 Fwdt 2 Fwdt with the frequency division WDT is an 11 bits counter When counter is overflow The value of WDT cannot writable or readable ratio The Fwdt frequency value is 64KHz so the nominal time out period of WDT is 32ms 4096ms Here are the relative registers of WDT timer 0D Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 MCR KBIE KBIC WDTE WDTC WDTF WDTM USEL R W R W R W R W R W R W R W R W Initial Value 0 0 0 0 0 0 0 BIT 5 WDTE WDT timer enable bit 0 WDT disable 1 WDT enable WDTEO in OPBIT must be configured to 1 BIT 4 WDTC WDT timer clear bit WDTC always reads as zero Write 1 the WDT is cleared write 0 is invalid BIT 3 WDTF WDT TIMER overflow flag 0 WDT overflag un occurred 1 WDT overflow occurred Write 0 the flag is cleared write 1 is invalid BIT 2 WDTM WDT TIMER working mode selection 0 WDT overflow will cause system reset 1 WDT overflow will cause WDTI interrupt Shanghai SinoMCU Microelectronics Co Ltd Page 22 of 40
26. arator COMPO output positive logic read only bit BIT 0 COEN Comparator COMP1 enable bit 0 COMPO disable 1 COMPO enable the GPIO function of P02 and P03 is disabled automatically 10 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 COOFM COCRS COOF5 COOF4 COOF3 COOF2 COOF1 C00L0 R W R W R W R W R W R W R W R W R W Initial Value 0 0 1 0 0 0 0 0 BIT 7 COOFM Comparator COMPO mode 0 Comparator mode 1 Input offset calibrate mode BIT 6 COCRS Comparator COMPO offset calibrate port 0 CPON selection Shanghai SinoMCU Microelectronics Co Ltd Page 23 of 40 sirn mcu Be 19 EB 1 MC20P04 User Manual V1 2 CC IM selection BIT 5 0 COOF 5 0 Comparator COMPO calibrate data 11 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 CMP1A 1 C1CRS C1OF5 C1OF4 C1OF3 C1OF1 C1OF0 R W R W R W R W R W R W R W R W R W Initial Value 0 0 1 0 0 0 0 0 BIT 7 Comparator COMP1 mode 0 Comparator mode 1 Input offset calibrate mode BIT 6 C1CRS Comparator COMP offset calibrate port 0 CPON selection 1 CPIN selection BIT 5 0 C1OF 5 0 Comparator COMP calibrate data Shanghai SinoMCU Microelectronics Co 1 Page 24 of 40 5II1 II1CLI seem MC20P04 User Manual V1 2 8 Interrupt 8 1 General Description The interrupts of MC20P04 are external interrupt INTO INT1 keyboard interrupt
27. ction is enabled 1 Protection is disabled BIT 6 RESE P17 RSTB pull up resistor selection 0 Pull up resistor is disabled 1 Pull up resistor is enabled BIT 5 LVRE LVR enabled 0 LVR turn on 1 LVR turn off BIT 4 LVRS LVR voltage selection 0 LVR voltage 2 1V Shanghai SinoMCU Microelectronics Co Ltd Page 11 of 40 sinsmcu MC20P04 User Manual V1 2 Be ink EB 1 LVR voltage 3 6 BIT 3 RSTE P12 RSTB function selection 0 P17 RSTB pin as input port 1 P17 RSTB as external reset port BIT 2 WDTEO WDT enable 0 WDT enable bit in MCR register should be set to 1 1 WDT disable BIT 1 0 OSCS 1 0 System clock selection 00 Internal RC oscillator 2MHz Ol External 400K 8MHz crystal oscillator 10 Internal RC oscillator 4MHz 11 Internal RC oscillator 8MHz 2 6 Control Registers All the registers of MC20P04 are listed below Detail functions of these registers are described in the following contents Address Name R W Bit7 Bit 6 Bit 5 Bit4 Bit 3 Bit 2 Bit 1 BitO Initial value 00 R W P07 P06 P05 P04 03 P02 P01 P00 0000 0000 01 DDR0 R W DDR07 DDR06 DDR05 DDR04 DDR03 DDR02 DDRO1 DDROO 0000 0000 02 POHCON RW PH07 PH06 PH05 PH04 PH03 PH02 PH01 PH00 0000 0000 03 POLCON RW PLO7 PL06 PL05 PL04 PL03 PL02 PL01 PL00 0000 0000 04 P1 R W P17 P16 P15 P14 P13 P12 P11
28. e adjusted by software One 8 bit timer counter the clock source and trigger edge can be selected by software overflow interrupt can be set 7 channels keyboard interrupt KBI 2 channels external interrupt INTO INT1 rising edge failing edge high level low level trigger mode can be selected Watchdog Timer WDT with independent internal oscillator Low voltage reset LVR 2 1V 3 6V selectable 5 interrupt sources INTO WDTI Oscillator mode gt Internal RC Oscillator 2MHz 4 2 8MHz selectable accuracy lt 1 25 C operating voltage gt High frequency crystal oscillator 400K 8MHz Low power consumption lt 3mA 4MHz 5V lt 1luA STOP mode Serial programming interface circuit Programmable Code Protection Operating voltage range gt 2 0 5 5V 400K 4MHz RC Frequency gt 2 7 5 5V 400K 8MHz RC Frequency Package DIP20 SOP20 DIPI8 5018 DIP16 50 16 DIP14 5014 8 SOPS Shanghai SinoMCU Microelectronics Co Ltd Page 4 of 40 sirn mcu Be 19 EB 1 2 Block Diagram 128 8 AK 8 05 CPU as MC20P04 User Manual V1 2 Controller Generator Internal HRC Internal WDT LRC RESET LVR Controller RSTB Shanghai SinoMCU Microelectronics Co Ltd Page 5 of 40 sin sSmcu eim MC20P04 User Manual V1 2 1 3 Pin Assignment 13 1 P12 14 2 P11 212 1 P11 15 3
29. e used as external interrupt input INTO and four kinds of interrupt conditions can be responded which is rising edge falling edge high level and low level The function of external interrupt INTO control bit as below 1 INTOE is the interrupt enable bit when INTOE 0 external interrupt disable when INTOE 1 external interrupt enable 2 INTOM 1 0 is the interrupt trigger mode bit which contains falling edge trigger rising edge trigger high level trigger low level trigger Shanghai SinoMCU Microelectronics Co Ltd Page 25 of 40 5II1 II1CLI Be 19 EB 3 INTOF is the interrupt flag bit INTOF could not be cleared automatically must be cleared by software When INTOE 0 INTOF is not affected when port changing The function of external INTI control bit the same as external INTO Note If using the external interrupt INTO the port must be set to input state with DDROO O0 If using the external interrupt INTI the POI port must be set to input state with DDROI 0 Here are the relative registers MC20P04 User Manual V1 2 0B Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 INTC INTOE INTOM1 INTOMO INTOF INT1M1 INT1F R W R W R W R W R W R W R W R W R W Initial Value 0 0 0 0 0 0 0 0 BIT 7 INTOE INTO enable bit 0 INTO disable 1 INTO enable INTOM 1 0 INTO trigger selection 00 Falling edge trigger BI
30. keyboard interrupt request While the keyboard interrupt request is responded write 1 toKBIC Otherwise keyboard interrupt request will be latched That means if KBIC not write 1 continuity keyboard interrupt will be requested Here are the relative registers 0D Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 MCR KBIE KBIC WDTE WDTC WDTF WDTM USEL R W R W R W R W R W R W R W R W 0 0 0 0 0 0 0 BIT 7 KBIE keyboard interrupt enable bit 0 Keyboard interrupt disable 1 Keyboard interrupt enable BIT 6 KBIC keyboard interrupt signal latch 0 Undefined 1 Keyboard interrupt latch signal is cleared KBIC always reads as zero 07 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 KBIM KBIM6 KBIM5 KBIM4 KBIM3 KBIM2 KBIM1 KBIMO R W R W R W R W R W R W R W R W BG 0 0 0 0 0 0 0 BIT 6 0 KBIMOn Pin port keyboard interrupt mask bit 6 0 0 Mask keyboard interrupt 1 Un mask Keyboard interrupt Pln port set to input state Automatically 8 4 TIMER Interrupt The TIMER overflow will cause interrupt request TMI which controlled by mask bit and flag bit Please refer to 6 1 8 5 WDT Interrupt While WDTM 1 WDT overflow will cause interrupt request WDTI Please refer to 6 2 Shanghai SinoMCU Microelectronics Co Ltd Page 27 of 40 sirn mcu 9 2 MC20P04 User Manual V1 2 9 System working mode
31. llator is enabled is determined by WDTEO in OPBIT and WDTE in MCR Shanghai SinoMCU Microelectronics Co Ltd Page 13 of 40 5II1 II1CLI Be EB 4 Reset MC20P04 User Manual V1 2 4 1 Description MC20P04 has four mode of reset Power on reset POR External reset lt Low Voltage reset LVR reset The system will fetch reset vector address from address 1FFE 1FFF while any kinds of reset occurs all the registers will be set to initial value The system clock oscillator will be disabled by POR or LVR oscillator will be enabled after reset released Because the oscillator need enough time to establishing and stability the system will work after 4096 clocks delay External reset and WDT reset will not shut the system clock oscillator when reset is released it will start working after 2 clock cycle Below diagram describes the reset procedure POR Detect Voltage LVR Detect Voltage POR LVR Reset VDD I External Reset GND External Rest WDT Overflow I Detect Voltage WDT Overflow WDT Reset PIC I I Normal Working i I System State Na Working While reset occurs the corresponding flag bit in RSTFR will be set 10 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 RSTFR WDTRF LVRRF RSTRF PORRF R W RAN RAN R W R W Initial value 0 0 0 0 BIT 3 WDTRF WDT reset flag 0
32. nal oscillator mode is selected The oscillator frequency must be in the range of 400KHz to 8MHz The capacitor Cx is usually required It is strongly recommended to make the crystal or ceramic oscillator as short as possible to OSCI and OSCO pin because of oscillating starting and stability The following table lists some typical oscillator frequency and recommended capacitance value of Cx Osc Freq Capacitance of Cx 8MHz 15p 4MHz 15p 30p r Cx 3 64MHz 15p 30p be EE 455KHz 100p 300p Note Considering the different characteristics of different types of oscillator the capacitance value listed are merely suggested Please select the capacitor cautiously according to the characteristic of crystal or ceramic oscillator 3 2 Intetnal High accuracy RC The internal high performance RC oscillator of MC20P04 has three frequency to select 2MHz 4MHz 8MHz While selecting internal RC mode P20 and P21 can be used as GPIO Special note In the practical application it needs to connect an electrolytic capacitor with the capacitance above 10uF between the VDD and GND pin to guarantee the oscillating accuracy and stability And the distance between the capacitor and IC should as short as possible less than 5cm 3 3 WDT Oscillator MC20P04 has a low frequency oscillator frequency 64KHz The oscillator is used by the WDT only and cannot be used as a system clock Whether osci
33. nction 4 3 3 9 1 I O PU TCC TCC input P17 Input port pull up resister selectable 5 4 4 10 2 RSTB I PI External reset input VPP Programming high voltage input 6 5 5 11 3 GND P Ground POO GPIO pull up pull down resistor selectable 7 6 6 12 4 I O PUD INTO External interrupt 0 input 01 GPIO pull up pull down resistor selectable 8 7 13 I O PUD IMI1 External interrupt 1 input P02 GPIO pull up pull down resistor selectable 9 8 7 14 I O PUDC Comparator 0 negative input GPIO pull up pull down selectable 10 9 8 1 PUDC CPOP Comparator 0 positive input 11 10 9 P04 I O PUD GPIO pull up pull down resistor selectable 12 11 5 PUD GPIO pull up pull down resistor selectable P06 GPIO pull up pull down resistor selectable 13 12 10 2 5 I O PUDC CP1N Comparator 1 negative input P07 GPIO pull up pull down resistor selectable 14 13 11 3 6 I O PUDC CP1P Comparator 0 positive input 15 14 12 4 7 VDD P Power Supply P21 GPIO 16 16 13 5 I O PIO OSCO Crystal Oscillator P20 GPIO 17 16 14 6 I O PIO 5 OSCI Crystal Oscillator 18 17 15 8 P10 GPIO pull up resistor selectable function 19 18 16 7 P11 I O PU GPIO pull up resistor selectable KBI function 20 1 1 P12 I O PU GPIO pull up resistor selectable KBI function Shanghai SinoMCU Microelectronics Co Ltd Page of 40 sin Smcu
34. onics Co Ltd Page 28 of 40 siInsSmcu MC20P04 User Manual V1 2 Be 19 F 10 Electrical Specification 10 1 Absolute Maximum Rating Parameter Symbol Ratings Value Unit Operating Voltage VDD 0 3 6 5 V VSS 0 3 Input Voltage VIN V VDD 0 3 Operating Temperature TA 40 85 C Storage Temperature Tstg 65 150 10 2 DC Electrical Characteristics VDD 5V 25 Characteristics Symbol Pin Condition Min Typ Max Unit 400K AM 2 0 55 Operating Voltaee VDD 400K 8M 5 5 V Input Leakage Current V ek All input ports VIN VDD 0 1 uA Input High Level Vin All input ports 0 7VDD VDD V Input Low Level Vi All input ports 0 0 3VDD V P00 P07 Pull up Resistor 1 Rui 10 25 50 Kohm P10 P16 Pull up Resistor 2 Ru2 P17 20 50 100 Kohm Pull down Resistor Rp P00 P07 10 25 Kohm Output High Level 4 All input ports V a 7 VDD 0 7V 6 50 mA Drive Current Output Low Level L All input ports V470 7V 10 mA Drive Current Close LVR 0 5 1 uA Close WDT Power down current VDD Open WDT 10 15 Open LVR 0 5 1 VDD 5V Power supply current VDD Fosc 4MHz 3 mA no load LVR 3 6V 3 2 3 6 4 0 LVR Vie LVR 2 1V 2 0 2 1 2 2 Shanghai SinoMCU Microelectronics Co Ltd Page 29 of 40 5II1 II1CLI P 19 EB MC20P04 User Manual V1 2 103 AC Electrical Characteristics VDD 5V 25
35. output port is not affected even though pull up resistor enabled The pull up pull down resistor of PO can be enabled at the same time 03 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 POLCON PLO7 PLO6 PL05 PL04 PL03 PL02 PL01 PL00 R W R W R W R W R W R W R W R W R W Initial Value 0 0 0 0 0 0 0 0 BIT 7 0 PLOn port pull down selection n 7 0 0 Pull down disable 1 Pull down enable Shanghai SinoMCU Microelectronics Co Ltd Page 19 of 40 sirn mcu 9 eim MC20P04 User Manual V1 2 6 Timer Fosc 2 ES B TIN gt a _ TDR r PS TOV I Count down Kasi TMI 5 Counter interrupt request PTA gt PR 2 0 WDTCK Fwdt PTA The timer of MC20P04 contains an 8 bit programmable count down counter and 7 bit programmable prescaler The clock source of TDR comes from system clock Fsys Fosc 2 or other division set by PR or external pin signal rising edge failling edge is selectable The prescaler of timer is shared with WDT when PTA 0 The prescaler is assigned to 10 when PTA 1 prescaler is assigned to WDT Prescaler division is controlled by PR 2 0 TCK WDTCK PTA PR 2 0 multiple of Fsys multiple of Fwdt 0 n 2n 1 1 1 n 1 2 The counter preset value can be set and decrements towards zero with clock When
36. te 17 has no effect BIT 6 TIM interrupt mask 0 TMI Timer interrupt enable 1 TMI Timer interrupt disable TIMwill be set to 1 when system reset in this case TMI interrupt will be disabled TIM must be cleared to enable TMI interrupt TIM is used to disabled interrupt request but TIF is still valid BIT 5 3 PR 2 0 prescaler division selection The prescaler is shared by TIMER and WDT it will be set to 011 when system reset The table list below is the value of PR 2 0 and the corresponding division ratio PRO 2 PRO 1 PRO O TIMER 0 0 0 2 1 0 0 1 4 0 1 0 8 0 1 1 16 1 0 0 32 16 1 0 1 64 32 1 1 0 128 64 1 1 1 256 128 BIT 2 Frequency assign 0 Frequency is assigned to TIMER 1 Frequency is assigned to WDT BIT 1 PTS Clock source selection 0 System clock 1 TCC pin signal P16 set to input port BIT 0 PTE TCC signal edge selection 0 Counting with TCC pin rising edge 1 Counting with TCC pin failling edge 6 2 WDT please refer to 3 3 it can select if go by the prescaler Please refer to 6 1 WDT can generate WDT reset or WDTI interrupt The WDTE in MCR and WDTEO in OPBIT must be configured to 1 for WDT working WDT is driving by the internal RC oscillator Shanghai SinoMCU Microelectronics Co Ltd Page 21 of 40 5II1 III CLI I9 ink EB WDT overflow will cause WDT reset when WDTM cleared WDT overflow will cause WDTI interrupt when WDTM set The clock source of
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