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1. 601 Manual December 1986 2 4 2 System Resource Function Jumpers J3 J4 J5 J6 J7 The XVME 601 Processor Module provides all of the VMEbus utilities required for a complete system including e SYSCLK e SYSRESET g A single level arbiter A Bus Timer NOTE For the most part the system resource functions are employed as a group i e either they are all enabled or they are all disabled However the SYSRESET function can be used by itself as long as jumpers Jl and 36 are installed The following are the definitions of the system resource jumpers 2 5 601 Manual December 1986 Table 2 3 System Resource Function Jumpers This jumper enables disables the SYSCLK driver This jumper enables disables the generation of BERR following the bus timeout function This jumper enables disables the single level arbiter This jumper enables disables the SYSRESET line This jumper sets a bus timeout duration of 1615 This jumper sets bus timeout duration of 32uS This jumper sets a bus timeout duration of 64uS This jumper sets bus timeout duration of 128uS This jumper enables the IACK daisy chain driver To completely disable the on board system resource functions J3 5 J6 amp must be removed and J7B must be installed NOTE In order to fully implement the system resource functions the Bus Grant In Out and Bus Request Lines must be set to Level 3 Jumpers 718 19 and
2. EPROM installed in socket U30 should contain the even byte addresses and the EPROM installed in socket U29 should contain the odd byte addresses Table 2 7 shows how various devices can be employed to arrive at different local memory configurations and Figure 2 2 shows the XVME 601 Memory Map 2 8 601 Manual December 1986 Table 2 7 Local PROM Memory Configurations Type of Device of Devices Installed Overall Memory Size Provided 2764 EPROM 16K Bytes 27128 EPROM 32K Bytes 27256 EPROM 64K Bytes 27512 EPROM 128K Bytes 2 9 601 Manual December 1986 FFFFFFH SHORT I O 64K FF0000H 0000 PROM 128K FC0000H VME 15 25M 80000H ON BOARD DRAM SM 000000H Figure 2 2 XVME 601 Memory Map Factory Shipped Configuration 2 10 601 Manual December 1986 When devices totaling less than 128K Bytes of memory are installed in the PROM sites the unused portion of the 128K becomes a shadow image of the space occupied by the installed devices For example if two 2764 EPROMs are installed in the PROM sockets they will only occupy 16K bytes of the 128K space mapped out for them Thus the original 16K bytes will be shadowed 8 times thereby filling the 128K PROM map 26 EXTERNAL CONNECTOR The XVME 601 Processor Module provides two asynchronous serial channels A and which are configured as RS 232 DCE equi
3. 55 GND GND GND S GND LAST DESIGATION USED GND GND 12V P1C 31 12V 12V P1a 3D 12V B 3 X VME 601 Schematic Sheet 1 of 6 601 Manual December 1986 1 00 015 lt gt 1 81 5 gt 5 PROMSEL gt a 5V 5 SV SV 45V 45 SV 45 5V A A 4 R71 lt R64 SR70 S R65 lt 69 lt 66 SR68 lt 867 lt 877 10 10K 2 10k Z 10K Z 10K lt 10K lt 10K lt 10K 2 HOLD 4 ELE E D7 ERE zj RwD 4 pupa et Passus gt SFAILEN 5 3 DUARRTSEL gt ES 5 4 oursuse gt PASS 5 3 SYSFAILe gt LEVIEN 3 gt gt DUARTINT 3 3 gt gt 6 5 gt 5 gt R36 145406 s 9 crsa 3 6864 J x 7 JK1 5 RXDA MHZ 5 JK1 16 RXDB 4 JK1 14 TXDB SE Ls 3 KI 7 ey 15 GND cazi 2 JK1 24 GND SpF L 26 1 PART OF ASSEMBLY RS232 SS DRIVER RECEIVER XVME 601 Schematic Sheet 2 of 6 601 Manual December 1986 2 LEV7EN 1807 P18 24 IRQ6 18 25 1805 P1B 26 1804 P18 27 18035 P18 28 IRQ2 P1B 29 IRQI P1B 30 1 45 1 FCO 1 FC 1 FC2 2 SFAILEN 2 PBEN 2 DUARTINT 2 passe gt ACFAIL P18 5 BCLR P18 2 SYSFAIL P1C 10 2 gt t gt 1
4. Example 600MON x x gt R 0 0000011 1 00000010 2 00004C4F 3 00000000 4 00000000 00100800 5 00000000 _6 00000003 2 00100000 7 00000000 2 0 008020 2 1 00000 00100400 2 00000800 3 0010053 00100800 4 00100545 5 0010053 00100 00 6 0010054 7 0000079 600MON gt D0z0000011C 1 00000010 2 00004C4F 3 00000000 4 00100800 5 00000000 2 6 00100000 7 00000000 2 0 008020 2 1 00100 00 2 00000800 3 00100 00 4 00100545 2 5 00100 00 6 0010054 2 7 0000079 2 600MON gt 601 Manual December 1986 4 6 23 Transparent Mode TM lt port number exit character gt lt trailing character gt The TME command connects port 2 to port 1 and transmits all input output between them until the exit character is entered from the terminal attached to port 1 The default exit character is CTRL A 01 A trailing character is sent to the host after the exit character is encountered in order to remove the exit character from the host s buffer so that it will not be encountered the next time transparent mode is entered default trailing character is CTRL X 18 Default exit and trailing characters can be changed by entering the following along with the TM command TM x y where x is the new exit character and y is the new trailing character If y null then it is not sent to the host To enter a CTRL character combination t
5. Receiver Buffer A RBA input Port Change Reg Command Register A CRA Transmitter Buffer R TBA Aux Control Register Interrupt Status ISR Interrupt Mask Register IMR Current Mode Counter Timer Current MSB of Counter Upper Register Counter Mode Counter Timer Current LSB of Counter CLR Lower Register CTLR Mode Register B MR1B MH2B Status Register B SRB Mode Register B MR1B MR2B Clock Select Register B CSRB Do Not Access Receiver Buffer B RBB Command Register B Transmitter Buffer B TBB Interrupt Uector Register IUR Output Port Config OPCR Interrupt Uector Register IUR Input Port Unlatched Start Counter Command Bit Set Command Output Port Register Stop Counter Command Bit Reset Command This address location is used for factory testing of the DUART and should not be read ng this location will result in undesired effects and possible incorrect transmission or reception of characters Register contents may also be changed Address triggered commands Figure 3 2 68681 DUART Memory Map 601 Manual December 1986 33 USING THE 68681 I O PORTS The 68681 DUART has two multifunction I O ports 6 bit parallel port for input IPO IP5 and one 8 bit parallel port for output OPO OP7 These I O ports have been dedicated to specific monitor and control functions
6. Please check the jumper configuration against the diagrams and lists in this manual To install a board in the cardcage perform the following steps 1 T Make certain that the particular cardcage slot which you are going to use is clear and accessible 2 Center the board on the plastic guides in the slot so that the handle on the front panel is towards the bottom of the cardcage 3 Push the card slowly toward the rear of the chassis until the connectors engage the card should slide freely in the plastic guides 4 Apply straight forward pressure to the handle located on the front panel of the module until the connector is fully engaged and properly seated NOTE It should not be necessary to use excessive pressure or force to engage the connectors If the board does not properly connect with the backplane remove the module and inspect all connectors and guide slots for possible damage or obstructions 2 13 601 Manual December 1986 2 8 INSTALLING THE 990 2 MONITOR KIT OPTIONAL When installed the XVME 990 2 Monitor kit provides the XVME 601 Module with two 16K byte EPROMs 27128 contains X YCOM s 600MON debug Monitor Each of the two EPROM devices will be labeled on the top In the lower right corner of each label will be either a 0 or a 1 device labeled 0 must be inserted in PROM socket U30 and the device labeled 1 must be inserted in PROM socket U29 Again make sure the n
7. 1993 XYCOM INC Printed the United States of America Part Number 74601 001 B XVME 601 68000 68010 Processor Module 74601 001 B XYCOM 750 North Maple Road Saline Michigan 48176 1292 734 429 4971 phone 734 429 1010 fax REVISION RECORD Revision Description Date A Manual Released 12 86 B Incorporated PCN 120 06 93 Copyright Information This document is copyrighted by Xycom Incorporated Xycom and shall not be reproduced or copied without expressed written permission from Xycom The information contained within this documentis subjectto change withoutnotice Xycom does not guarantee the accuracy of the information and makes no commitment toward keeping it up to date Address comments concerning this manual to xycom Technical Publications Dept 750 North Maple Road Saline Michigan 48176 Part Number 7 4601 001 B 601 Manual December 1986 CHAPTER 1 O G9 EK ON Cx A C2 8 TABLE OF CONTENTS TITLE MODULE DESCRIPTION Introduction Manual Structure Module Operational Description VMEbus Master Interface The 68681 Dual Universal Asynchronous Receiver Transmitter Interrupts Status LEDs and Control Switches System Resource Functions Local DRAM 601 Processor Module Specifications XVME 601 INSTALLATION Introduction Location of Components Relevant to Installation Ju
8. 22 A16 5V 4 NZ gt 0URBUSe BUFFERS PIC DR EE no E 821 2823 822 13 AES 5V Y VA 745367 18 14 WRITE r a 18 17 99 mae RU UA 13 15 050 PS jas O OE 2050 5 FNREENe 9 P18 12 057 J20 pe 01 051 5 N OQ O O O0 02 ER 01 l 2 EET PIR Z3 I 0 0 1 y DDIR oe P a 20 IACKs 72 RLSE SLVSELP 85 opp MASTEN Dp 16 12 IVA gt BERR gt LDTACK E gt VMEAS PIA 18 5 Bj PIB 11 B630UT li PIB 9 BG2O0UT E PIB 7 BG10UT 5 6000 5 VME BUS CONTROLLER B 6 2 5 Rev 601 Schematic Sheet 4 of 6 601 Manual December 1986 5 45 R35 nis x 13K R32 OQ 23 2K LMI R38 74HC14 R16 8 H 2 2 43 E ae R39 C1 C2 ix V 1UF 1UF BCW68D R34 R33 5 928 lt L NZ 11 3K 2 61 L R4Q 3 PBRESET gt Ces 2K BCW60D 2 SYSRESET 1 12 418 C O O QQQ BGOIN P1B 4 B61IN P1B 6 B62IN P1B 8 BG31N P18 10 PALI6L8A ACK IN P12 21 4 gt gt 1 5 4 4 psa gt BCBGIN 4 4 0 1 2 74F1244 CP18 22 IackouTe 4 gt 2Y1 242 2Y2 4 5 204 U2
9. See also GT TT 4 16 601 Manual December 1986 BR NOBR Examples 600MON x x gt BR 4900 4A00 5300 5000 BREAKPOINTS 004900 004900 004A00 004A00 005300 005300 005000 005000 600MON x x gt NOBR 4A00 5000 BREAKPOINTS 004900 004900 005300 005300 600 gt NOBR BREAKPOINTS 600MON x x gt R0 4000 BREAKPOINTS 000900 R0 004900 000 00 0 004 00 000 00 0 004C00 600MON gt NOBR 00 BREAKPOINTS 000900 R0 004900 000C00 RO0 004C00 600MON x x gt 4 17 601 Manual December 1986 4 6 6 Block of Memory Search BS lt addressl gt lt address2 gt liter string BS lt addressl gt lt address2 gt lt data gt lt mask gt lt option gt The BS command has two modes 1 literal string search and 2 data search Both modes scan memory beginning at lt addressl gt through lt address2 gt looking for a match The literal string mode is initiated if a single quote follows lt address2 gt If a single quote does not follow lt address2 gt data search mode is assumed the data search mode the optional mask if used is ANDed to data The default mask is all ones The options supported are B byte word IL long word The default is byte In both modes of the BS command if the search finds matching data the data and the address es are displayed If the search is in data search mode with a mask and data is found that matches the data after the mas
10. 9 on the 3U front panel By removing the screw nut found inside the handle the entire handle assembly will separate from the 3U front panel Remove the counter sunk screw labeled 8 to separate the 3U front panel from the printed circuit board 12 Line up the plastic support brackets on the printed circuit board with the corresponding holes in the front panel ie the holes at the top and top center of the panel Install the counter sunk screw 8 in the hole near the top center of the 60 panel securing it to the lower support bracket on the printed circuit board Install the handle assembly which was taken from the 3U panel at the top of the 6U panel using the screw and nut previously attached inside the handle After securing the top handle slide the module identification plate in place Finally install the bottom handle i e the handle that accompanies the kit labeled 2 using the screw and nut 3 amp 5 provided Slide the XYCOM VMEbus LD plate 4 in place on the bottom handle module is now ready to be re installed in the backplane 2 16 601 Manual December 1986 Figure 2 5 Installation of 943 60 Front Panel 2 17 601 Manual December 1986 Chapter 3 PROGRAMMING 31 INTRODUCTION This Chapter will briefly examine the overall module memory map the 68681 DUART memory map the dedicated I O points on the 68681 DUART interrupts and initialization of
11. design and debug firmware and software for the XVME 601 module The 600MON 15 a version of Motorola s VMEbug modified to run on the XVME 601 It provides a powerful evaluation and debugging tool permitting execution of system and user developed programs under complete operator control Debugging is eased by a complement of the features found on most debuggers plus an up down load command for loading programs from a host an assembler disassembler for use in scanning and patching the code being debugged and a self test capability which verifies the integrity of the XVME 601 This chapter discusses the 600MON in the following fashion Referenced documents E System configuration and I O e Instruction set 6 User Routines Downloading 4 2 REFERENCED DOCUMENTS It is assumed that the user has access to the following documents e Motorola VMEbug Debugging Package User s Manual MVMEBUG D2 e M68000 Programmers Reference Manual M68000UM AD4 x VMEbus Specification 4 1 601 Manual December 1986 4 3 SYSTEM CONFIGURATION The minimum system configuration consists of 601 Processor Module backplane and power supply Serial Terminal Cable to interface the terminal to the XVME 601 The block diagram in Figure 4 1 illustrates the basic components required during the development phase SERIAL CRT CONSOLE POWER XV ME 601 SUPPLY VMEbus BACKPLANE NOTES 1 If the XVME 60
12. lt port number gt Use of the command PF with no specified port number n causes display of the current configuration of each port change the current configuration of a specific port the port number is specified with the PF lt port number gt command Valid port number for this command are n allows changing configuration of 600MON port 1 n 2 allows changing configuration of 600MON port 2 Examples 600MON gt 2 BAUD RATE 0B 09 BITS CHAR 08 7 PARITY 04 0 CHAR NULL 00 1 CR NULL 00 3 600MON gt PF2 BAUD RATE 09 BITS CHAR 07 PARITY 04 CHAR NULL 01 CR NULL 03 The BAUD RATE BITS CHAR and PARITY parameters are used to reconfigure serial ports on the XVME 601 The CHAR NULL and CR NULL parameters specify the number of nulls to be sent after each character and each line The following tables show the codes to use for the various port configuration Options BAUD RATES BITS CHAR PARITY 0 50 6 1200 5 5 0 1 110 7 1050 6 6 1 Odd 2 134 5 8 2400 7 7 2 0 3 200 9 4800 8 8 321 42300 A 7200 4 none 5 600 B 9600 C 38 4K 4 36 601 Manual December 1986 4 6 22 Register Modify The command allows the user to view and modify the data and address registers individually Each time the carriage return is pressed the next register is displayed and the user is given the option to change it The registers are displayed in the order DO D7 and 0 7
13. n 1 specifies 600MON port 1 n 2 specifies 600MON port 2 The offset RO is added to the load address specified in the S records before storing the data No control characters are sent by 600MON to control the transmission Any line received not beginning with an S is ignored If an error occurs causing the system to take time to print out an error message one or more lines sent during the error message may have been ignored is printed on the console when each S record is received See also DU OF VE Example 600MON gt 102 COPY FILE SS 4 CN02 COPY FILE SS CN02 4 28 601 Manual December 1986 4 6 16 Memory Display disassemble MD MD lt port number gt lt address gt lt count gt D1 MDS lt address gt lt count gt DI The MD command is used to display a portion of memory beginning at lt address gt and displaying the number of bytes given as lt count gt If lt count gt is not specified the default is 1OH bytes or if MDS is used the default number of bytes is 100H a section The display is in hex and in ASCII characters Default output is to port 1 the local display terminal Specifying MD lt port number gt allows sending the output to another port Valid port numbers for this command are none defaults to 600MON port 1 n specifies 600MON port 1 n 2 specifies 600 port 2 After the MD command is entered it will continue with the next 16 lines of output ea
14. 13 32 1 31 1 31 Signal Name and Description SYSTEM FAIL Open collector driven signal that indicates that a failure has occurred in the system It may be generated by any module on the VMEbus SYSTEM RESET Open collector driven signal which when low will cause the system to be reset WRITE Three state driven signal that specifies the data transfer cycle in progress to be either read or written A high level indicates a read operation a low level indicates a write operation 5 VDC STANDBY This line supplies 5 VDC to devices requiring battery backup 5 VDC POWER Used by system logic circuits 12 VDC POWER Used by system logic circuits 12 VDC POWER Used by system logic circuits 601 Manual December 1986 BACKPLANE CONNECTOR 1 The following table lists the Pl pin assignments by pin number order The connector consists of three rows of pins labeled rows A B and C Table A 2 P1 Pin Assignments Row A Row B Row C Pin Signal Signal Signal Number Mnemonic Mnemonic Mnemonic NO 1 ON Q 4 C2 2 SYSRESET LWORD 5 23 22 21 20 19 18 IACKIN SERCLK 1 A17 IACKOUT SERDAT 1 A16 GND 15 IRQ7 A14 IRQ6 IRQ5 IRQ4 5 STDBY 5 V A 6 601 Manual December 1986 Appendix BLOCK DIAGRAM ASSEMBLY DRAWING amp SCHEMATICS BLOCK DIAGRAM CPU CLOCK 68000 OR 68010 RS232 PORT A ven RS232 DRIVERS amp
15. D2 004910 6702 BEQ S 4914 600MON x x 600MON x x MD2 5400 2 DI output is sent to port 2 600MON x x 600MON x x MDS 5400 2 DI 005400 00000000 OR B 0 D0 600MON gt 4 30 XVME 601 Manual December 1986 4 6 17 Memory Modify Disassemble Assemble M M M address options function of the M or MM command is to change data in memory address and options are specified on the initial command line On execution one of two major modes of operation is entered the memory change mode or the disassemble assemble mode Memory Change Mode For convenient viewing and changing of object data this mode offers four variations of data updating capability These are enhanced by five options the data size options word and long word the default size is byte odd or even address access options byte size only and non verification option for write only operations Action provided by an option specified on the initial command line is utilized in all four data updating submodes and remains in force until the M command is exited The five memory change mode options are Set size word 1 two bytes L Set size to long word 1 four bytes O Set size to byte access only odd addresses SV Set size to byte access only even addresses No verification Do not read data after updating If used must be preceded by one of above options the semicolon is required betwe
16. S record serial formatted record form and sends it to the specified port The default port number is 1 the local display terminal The first record output is an SO record which will contain the characters entered in the text field on the command line if any The last record output is an S9 record Valid port numbers for this command are none defaults to 600MON port 1 n specifies 600MON port 1 n 2 specifies 600MON port 2 This command does not send control characters to start or stop peripheral devices See also LO VE Example 600MON x x DU 4000 400E 600MON TEST PHYSICAL ADDRESS 00004000 0000400F S00E00003630304E4F4E205445535411354C7 5214004000000000000000000000000000000000000 59030000 600MON gt 4 22 601 Manual December 1986 4 6 11 G 0 address The G or GO command causes the target program to execute free run in real time until a The target program encounters a breakpoint b An abnormal program sequence causes exception processing e g divide by zero or The operator intervenes through use of the RESET or ABORT The G command has the following characteristics Starts execution at a give address or address pointed to by PC Traces first instruction Sets breakpoints set by BR Does not set temporary breakpoints The registers are set up as in the Display Format command e o P NOTE The execution period will exc
17. address gt When encountered a breakpoint causes program execution to stop and control to be transferred to 600MON The BR command may be used without parameters to cause display of current breakpoint addresses BR address command sets the address into the breakpoint address table Multiple breakpoints up to eight may be specified with one call of the breakpoint command Count is decremented each time the breakpoint is encountered until count 0 thereafter execution will stop when the breakpoint is reached the range of count is a 32 bit integer While executing a GO or GT command the illegal instruction 4 15 used for the breakpoint If program control is lost and RESET is used to regain control breakpoints may be left in the user target program While executing a Trace command the breakpoint addresses are monitored 1 the illegal instruction 4AFB is not placed in memory After stopping at a breakpoint execution may be continued by typing the GO command NOBR command removes one or more breakpoints from the internal breakpoint table BR COMMAND FORMAT DESCRIPTION 600MON gt BR Display all breakpoints 600MON x x BR address Set a breakpoint 600MON gt BR lt address gt lt count gt Set a breakpoint with a count See also GT TT NOBR COMMAND FORMAT DESCRIPTION 600MON x x NOBR Clear all breakpoints 600MON x x NOBR address Clear a specific breakpoint
18. follows 4 5 601 Manual December 1986 lt gt Angular brackets enclose a symbol known as a syntactic variable that is replaced in a command line by one of a class of symbols it represents Square brackets enclose a symbol that is optional The enclosed symbol may occur zero or one time Square brackets followed by periods enclose a symbol that is optional repetitive The symbol may appear zero or more times In the examples given in the following paragraphs operator entries are shown underscored for clarity only the underscore is not to be typed Operator entries are followed by a carriage return unless otherwise specified The format of the command line is 600MON x x command parameters options where 600MON x x gt Is the 600MON prompt x x represents the displayed version number command Is the primitive command parameter Is a field containing one of the following 1 One or more expression parameters Multiple expression parameters are separated by spaces 2 One or more address parameters Multiple address parameters are separated by spaces 3 data parameter opened with space and contains lt pattern gt lt data gt lt count gt or lt text gt parameter option Is a field opened with a semicolon and containing one or more options Multiple options need not be separated by spaces 4 4 1 Expression Parameters An expression can be one or more
19. in the DUART initialization program the 68681 MRI EQU MR2 EQU CSR EQU STR EQU CR EQU THR EQU RHR EQU 01 Mode Register 1 901 Mode Register 2 03 Clock Select Register 03 Status Register 05 Command Register 07 Transmit Holding Register 07 4 Receive Holding Register 68681 DUART Initialization Program Object gt gt gt gt gt gt gt gt 00000000 00000006 0000000C 00000012 00000018 0000001 00000024 0000002 Initialize Channel 207 00 0000 MOVEA L FE0000 A0 This is Channel Address 117C00100005 MOVE B 10 0 Reset MR Pointer 117 00130001 MOVE B 13 MRI AO No Parity 8 bits char 117C00070001 MOVE B 07 MR2 A0 1 Stop Bit 117 00 0003 MOVE B s BB CSR AO 9600 Baud XMIT and RCV 117 00200005 MOVE B 20 CR A0 Reset the Receiver 117C00300005 MOVE B 30 CR A0 Reset the Transmitter 117C00050005 MOVE B 05 CR A0 Enable XMIT and RCV 3 7 601 Manual December 1986 Object To Initialize Channel B A 00000030 207C00F82010 MOVEA L FE0010 A0 This is Channel Address A 00000036 117C00100005 MOVE B 10 CR AO Reset MR Pointer A 0000003C 117 00130001 MOVE B 13 MR1 AO No Parity 8 bits char A 00000042 117C00070001 MOVE B 07 MR2 A0 1 Stop Bit A 00000048 117C00BB0003 MOVE B BB CSR A0 9600 Baud XMIT RCV A 0000004 117C00200005 MOVE B z 20 CR AO Reset the Receiver A 00000054 117C
20. numeric values separated by the arithmetic operators plus or minus Numbers are assumed to be hexadecimal except for those preceded command by an ampersand amp which are decimal and as noted for the DC 601 Manual December 1986 4 4 2 Address Parameters An address when used as a parameter must follow the syntax accepted by the assembler except for the memory indirect mode The address formats accepted are as follows FORMAT EXAMPLE DESCRIPTION Address 140 Absolute address Address offset 130 R5 Absolute address plus R5 offset value A A5 Address register indirect with index A D A6 D4 Address register indirect with index Address A 120 A3 Register indirect with displacement Address A D 110 A2 D1 Address register indirect with index plus displacement Address 100 Memory indirect not assembler accepted syntax 4 7 601 Manual December 1986 4 4 3 Offset Registers The 600MON uses eight software registers which are independent of the hardware to modify addresses contained in 600MON commands The first seven registers RO R6 are used as general purpose offsets The eighth register R7 is always zero These registers are modified by the lt register gt command see Section 4 6 1 and displayed by the Display Offsets command OF see Section 4 6 19 The offset registers are always reset to zero at power up Thus if their contents are not changed
21. on the 601 Module The input lines 0 5 are used by the CPU to monitor certain module functions and the output lines can be programmed by using bit set and reset commands to control certain module functions Table 3 1 shows how the status of each of the six input lines the 68681 DUART is interpreted on the 601 Module Table 3 1 68681 Parallel Input Status Indications The Channel A RTS input is asserted The Channel A RTS input is negated The 601 has control of the VMEbus The XVME 601 does not have control of the Bus SYSFAIL is asserted SYSFAIL is negated BCLR is asserted BCLR is negated ACFAIL is asserted ACFAIL is negated The ABORT button is pressed The ABORT button is released Input line is used to coordinate changing the bus release control output lines and OP2 refer to Table 3 2 Table 3 2 shows the functions that are controlled by setting or resetting the 68681 DUART output lines OPO OP7 Setting the output lines entails writing a bit set command byte 1 equals set 0 equals no change to the bit set command register location FEO01DH Output Bits are reset by writing a bit reset command byte 1 equals reset 0 equals no change to the bit reset command register location FEOOIFH Refer to the description of the Output Port Register the 68681 Manual for additional information on setting resetting the output lines All 68681 outputs will assu
22. refer to Section 2 4 4 of Chapter 2 for interrupt jumper information which determines whether the corresponding interrupt source is enabled The interrupt jumpers J9 J15 are factory shipped in the IN position with all interrupts enabled The SYSFAIL ABORT Button and the ACFAIL interrupts are all individually enabled disabled via the CPU through certain 68681 DUART outputs refer to Section 3 3 When these interrupts are detected they are latched and they remain latched until the respective 68681 DUART output is RESET The local special interrupts have priority over the VMEbus interrupts when both occur on the same level For example an interrupt generated by pressing the ABORT Button would have priority over an IRQ7 interrupt coming from the bus local special interrupts are auto vectored by interrupt level as defined by the Exception Vector Assignment of the MC68000 CPU The state of all local interrupts can be polled via the input lines on the 68681 DUART VMEbus interrupts are vectored on the Status I O Byte returned by the interrupting VMEbus module during the interrupt acknowledge JACK cycle The 68681 DUART interrupts can be enable disabled via internal register bits refer to the MC68681 Manual Section 4 Programming and Register Description 3 9 601 Manual December 1986 Chapter 4 XVME 600MON OPTIONAL 41 INTRODUCTION XVME 990 2 kit contains the 600MON debug monitor It allows the user to
23. 00 D2 00010004 D6 00000001 A2 00000546 A6 00000544 4 71 4 41 SS 00000C00 D3 00000000 D7 00000000 A3 00000000 A7 00000C00 NOP 55 00000 00 D3 00000000 D7 00000000 A3 00000000 A7 00000C00 NOP 55 00000 00 D3 00000000 D7 00000000 A3 00000000 A7 00000C00 NOP 601 Manual December 1986 4 6 26 Verify S Records VE VE lt port number 2 text The VE command verifies the current contents of memory with the object data in S record format received from a serial port When a mismatch between data in memory and the S record object data is found 600MON will display the differences on the port 1 terminal If display of differences occurs the record following the record displayed is lost Text following the is sent to port 2 Transmitted object data can be verified through the same port through which it was sent Valid port numbers for this command are none defaults to verify data from 600MON port 1 n specifies verifying data from 600MON port 1 n 2 specifies verifying data from 600MON port 2 See also DU LO OF Example Comment 600MON x x gt TEST1MxX Verify the file TEST1 MX 21231000 49 4 600MON x x gt The record 15 an 51 record with 23 byte count Starting at address 0010000 and there are differences in the third and fifth bytes The difference in data displayed is the data being read not the data from memory 4 42 XVME 601 Manu
24. 00000 CMP B 0 D0 004906 66F8 BNE S 4900 004908 4 75 RTS 600MON x x gt 4900 4908 BREAKPOINTS 004900 004900 004908 004908 600MON x x gt PC 004900 600MON x x gt 004906 PHYSICAL ADDRESS 00004906 PHYSICAL ADDRESS 00004900 AT BREAKPOINT 004906 5 2700 57 2 US 00001000 55 00000 04 0 00010400 1 23040444 D2 04060444 D3 00000000 4 00010031 D520000072C 6 00000004 D7200000000 A0 00FE8014 AJ FFFFFFFF 2 00000454 3 0000054 4 000131 0 A5200002704 A6200010158 7 00000 04 004906 66 8 BNE S 4900 600MON x x 4 26 601 Manual December 1986 4 6 14 HE command displays list of available commands Example 600MON x x gt HE DO D2 D4 05 06 AQ 1 2 A3 4 5 6 A7 RO R2 R3 R5 R6 R7 BF BI BM BR NOBR BS BT DC DF DU G GD GO GT HE LO MD MM MS PA NOPA PR R RM T TR VE 600MON x x gt 4 27 601 Manual December 1986 4 6 15 Load S Records LO LO lt port number gt lt options gt lt text gt The LO command receives S records from the specified port number and loads the contained object data into memory The following options are available SC Ignore checksum while loading X Echo data read from port 1 the local display terminal Text following the is sent to the port Valid port numbers for this command are none defaults to 600MON port 1
25. 00300005 MOVE B 30 CR AQ Reset the Transmitter A 0000005 117C00050005 MOVE B 05 CR AO Enable the XMIT and RCV 3 5 INTERRUPTS The 68000 CPU on the XVME 601 Processor Module can be interrupted via all seven VMEbus interrupts plus 2 local and 2 special interrupt sources The local interrupt sources include the ABORT push button and the 68681 DUART The special interrupts include ACFAIL and SYSFAIL Note that ACFAIL and SYSFAIL are considered special interrupts in this case because they must be individually enabled by the CPU through the 68681 outputs Refer to the 68681 Manual for information on the type of interrupts which the DUART itself can generate One of the outputs on the 68681 DUART is used to enable disable all interrupt capability and some are used to individually enable clear local and special interrupt capabilities Refer to Section 3 3 for information on controlling the 68681 outputs Table 3 3 shows the interrupt sources and their corresponding VMEbus interrupt levels Table 3 3 601 Processor Module Interrupts Interrupt Level VMEbus Interrupts Local Interrupts Special Interrupts ABORT Button ACFAIL SYSFAIL 68681 DUART 3 8 601 Manual December 1986 When the 68681 DUART output is RESET 68000 interrupts can be generated Output OP7 must be set in order for the CPU to receive any interrupts The VMEbus interrupts IRQ1 IRQ7 each have a corresponding jumper
26. 05010 00000000 OR B 0 D0 4 12 601 Manual December 1986 4 6 2 Block Fill BF lt addressl gt lt address2 gt lt pattern gt The BF command fills a specified block of memory with a specified binary pattern of word size word boundary even address must be given for the starting lt addressl gt and ending lt address2 gt of the block The pattern word may be expressed in hexadecimal default decimal octal or binary The following symbols are used to denote number base precedes hexadecimal value this is the default and may be omitted amp precedes decimal value precedes octal value precedes binary value If a pattern of less than word size is entered the data is right justified and leading zeros are inserted by 600MON Example 600MON x x gt MD 4900 004900 FF 00 00 FF FF 00 00 FF FF 00 04 FF FF 00 00 600MON x x gt 4900 490E 4E75 PHYSICAL ADDRESS 00004900 0000490E 600MON x x gt MD 4900 004900 4E 75 4E 75 75 AE 75 AE 75 AE 75 4E 75 4E 75 NuNuNuNuNuNuNuNu 600MON x x gt 4 13 601 Manual December 1986 4 6 3 Block Initialize BI BI lt addressl gt lt address2 gt The BI command initializes word parity in a specified block of memory lt addressl gt through lt address2 gt No data in any word is changed if parity in the word is correct If parity in a word is incorrect the characters m 6D3F are written in that word to force corr
27. 1 is used to provide the System Resource functions it must occupy Slot 1 in the VMEbus as prescribed by the VMEbus specifications 2 If modules do not occupy consecutive slots in the backplane the VMEbus backplane must be jumpered to continue both the IACKIN IACKOUT and BGxIN BGxOUT daisy chains Figure 4 1 Typical 601 System Configuration 4 2 601 Manual December 1986 4 3 1 600MON Memory Map The 600MON is burned into two 27128 EPROMs The EPROMs have a 200nSec access time The 600MON uses the XVME 601 s on board DRAM from locations 000000H to 0007 600MON uses the XVME 601 s memory as shown in Figure 4 2 4 3 601 Manual December 1986 FFFFFFH SHORT I O FF0000H FE0000H 600MON SHADOWS 128K SOCKETS x ox g U29 and U30 600MON 77 0000 80000H 07FFH Y 0000 NOTES 1 User programs should set the stack pointer s outside of the DRAM area used by 600MON 2 600MON will lock up when users try to access even addresses in the range FEO0000H FEFFFEH Figure 4 2 600MON Memory Map 4 4 XVME 601 Manual December 1986 4 3 1 1 Exception Vectors The 600MON exception handler table will reside in RAM locations 0000 through This table is initialized by the monitor upon power up and reset The user change the addresses of the handling routines Exception vectors 0 through 127 are supporte
28. 2 Sys 16 194 26 8 V 7 5V lt e 4 6ND gt VMEBERR 4 TIME BASE 815 4 VMEBBSYe gt R37 750 om 82PFD 1K BUS TIME OUT J3 e 18 16 SYSCLK 1 601 Schematic Sheet 5 of 6 7 601 Manual December 1986 RI lt gt 00 015 2 3 Bras gt RAG H5M42561 12 M5M4256L 12 81 074 lt gt 746157 27 R20 RAZ R 27 gt RAS 23 R21 7 27 R24 RAI R6 27 R26 RA2 27 R27 27 M5M4256L 12 RAG 1 gt 16848 M5M4256L 12 M5M4256L 12 4 LDTACK 4 45 1 105 1 05 3 PROMSEL 3 RAMSEL 1 CPUCLK 1 10 74HCT48103 R28 5 1K gt DTACK 1 5 5 10 14 21 WIRED ACROSS 01 016 PINS 12 45V AND 4 GND 33uF 56 601 Schematic Sheet 6 of 6 8
29. 6 A6 00000544 4E71 4 40 55 00000 00 D3 00000000 D7 00000000 A3 00000000 A7 00000C00 NOP 55 00000 00 D3 00000000 D7 00000000 A3 00000000 7 00000 00 55 00000 00 D3 00000000 D7 00000000 A3 00000000 A7 00000C00 NOP 601 Manual December 1986 4 6 25 TT lt breakpoint address gt Trace to Temporary Breakpoint TT The TT command performs the following mu Sets a temporary breakpoint at the address specified 2 Starts program execution the trace mode 3 Traces until any breakpoint with a zero count 15 encountered 4 Resets the temporary breakpoint The temporary breakpoint is not displayed by the BR command See also DF GO GT TR Example 600MON x x gt PC 5000 600MON x x gt TT 5006 PHYSICAL ADDRESS 00005006 PHYSICAL ADDRESS 00005000 PC 005002 SR 2709 D7 N C D0 00300034 D1200004D4D D4 00000F37 D5 00000000 0 000100 1 00010510 4 00002004 5 0000053 005004 SR2709 S7 N C 20 00300034 D1 00004D4D 24 00000 37 D5200000000 0 000100 1 00010510 4 00002004 5 0000053 005004 BREAKPOINT 005006 5 2709 57 20 00300034 D1 00004D4D 24 00000 37 D5 00000000 0 000100 1 00010510 4 00002004 5 0000053 600MON x x gt 600MON x x US 00001000 D2 00010004 D6 00000001 A2 00000546 A6 00000544 4E71 US 00001000 D2 00010004 D6 00000001 A2 00000546 A6 00000544 4 71 US 000010
30. 81 25 lt gt S RESET gt 1 LDS gt 6 gt LATCH ENABLE CPU INTERRUPT CONTROL LOCAL INTERRUPT 20189 5V 19 GND CPU ADDRESS DECODL DN C d ABORT 5 poss fen R7 550 N 620 10 P 416 121 7 0 9 a CK q p gt CL U 15 74HCT74 R73 5V 629 B 5 R76 10K gt 1 ILEVO 1 gt 1 ILEV2 1 gt 4 5 gt 2 R74 PBRESET 5 5V gt HELT 1 2 gt ACFAIL 2 X BCLRe 2 4 gt SYSFAIL 2 BRAG 6 DUARTSEL 2 MASO 4 RAMSEL 6 PROMSEL 2 6 SHORT IO 4 Rev A XVME 601 Schematic Sheet 3 of 6 601 Manual December 1986 1 81 825 1 00 015 De 01 02 05 04 05 06 07 08 09 016 011 012 013 014 0 5 R W FCQ FC1 FC2 1 LDS 1 UDS 5 BCLR 1 BCCLK mh 5 VMEDTACK 5 5 5 5 RESET 5 8CBGIN 5 SHORTIO 5 VMEIARCK PJ R 1 GEA P1C 3 P1C 4 1 5 1 6 1 7 0 V 74015245 1 74 1244 PIA 30 f 29 A2 L PIA 28 AS PIA 27 A4 T ens s PIR 25 R6 PIA 24 R7 88 1 PIC 29 A9 418 1 E MAT l3 7 Pic 27 11 PETG 26 82 TEA as 14 PIC 24 14 ars e PIC 23 15 T
31. Driver The XVME 601 Processor is specified as A24 A16 D16 D08 EO VMEbus Master and as an 0 7 interrupt handler 1 601 Manual December 1986 12 MANUAL STRUCTURE It is the aim of this first chapter to introduce the user to the general specifications and functional capabilities of the 601 Processor Module Successive chapters will develop the various aspects of module specification and operation in the following progression Chapter One general description of the 601 Module including complete functional and environmental specifications VMEbus compliance information and a detailed block diagram Chapter Two Module installation information covering jumpers and connector pinouts Chapter Three Includes information on the module memory map the 68681 DUART including a DUART initialization program and the interrupt structure Chapter Four Contains information on the operation and use of the optional 600MON debug monitor The appendices at the rear of this manual are designed to introduce and reinforce a variety of module related topics including backplane signal pin descriptions a block diagram and schematics and a quick reference section NOTE In order to fully document the complex versatility of the XVME 601 and the 68681 DUART device a manual kit is being shipped with the 601 Module the manual kit is referenced as Part 74601 001 This
32. FEFFFFH is mapped for the various 68681 DUART control command and data registers refer to section 3 2 32 THE 68681 DUART MEMORY As mentioned in the previous Section the 68681 DUART occupies the area of the XVME 601 memory map from FE0000H to FEFFFFH However only 16 of the total 64K bytes in the mapped area are used for the DUART These 16 bytes go from FE0001H to FEO01FH odd bytes only Most of the 16 byte locations pertaining to the DUART have dual definitions That is during a WRITE cycle a register will have one definition and during a READ cycle the same register will have another Definition Refer to Figure 3 2 or the Programming and Register Description Section of the MC68681 Manual Figure 3 2 shows the memory map for the 68681 and the definition of the registers during both a READ cycle and a WRITE cycle CAUTION The 16 bytes used for the 68681 DUART registers reside on the odd bytes onlv Any byte accesses to the even byte at these locations will not return and the processor will hang up until it is reset However word accesses are permitted _ 3 3 601 Manual December 1986 RDDRESS FEOOOTH FE00USH 05 FE0007H FEU009H FEOOOBH FE000DH FEOOTIH FEQO13H FE0015H FEGOI H 019 FEOUTDH FEOOIFH WRITE Mode Register MR1A MB2A Clock Select Register A CSRR Mode Register A MRIR MR2R Status Register fi SRA Do Not Access
33. J20 set in the D position By installing J3 J4 J5 J6 J17 A C or D J18D J19D J20D and J7A the system resource functions are enabled By removing J3 J4 J5 J6 and J7A and installing J7B the system resource functions are disabled The XVME 601 is configured at the factory with the system resource functions activated and the bus timeout duration set for 16uS 2 6 601 Manual December 1986 2 4 3 Selection Jumpers There two 28 sockets provided on the module for devices Sockets U29 and U30 are dedicated for use by the EPROM devices and they can accept 2764 27128 27256 27512 EPROMs 200 nS access The EPROMSs are installed at U29 and U30 must both be the same type of EPROM Jumpers J8 and J2 are used to select the type of EPROM to be installed at the U29 and U30 sockets Table 2 4 shows how the jumpers should be configured for the various EPROM possibilities Table 2 4 EPROM Selection Jumpers for Sockets U29 and U30 J8 J2 Device Selected 2764 27128 factory shipped config 27256 27512 2 4 4 VMEbus Interrupt Level Selection Jumpers seven VMEbus interrupts are recognized by the XVME 601 Module Table 2 5 shows which jumpers when installed will enable the various interrupt levels Table 2 5 Interrupt Selection Jumpers Interrupt Level and Signal Name LEVEL 1 IRQI LEVEL 2 IRQ2 LEVEL 3 IRQ3 LEVEL 4 IRQ4 LEVEL 5 IRQ5 LEVEL 6 IRQ6
34. LEVEL 7 IRQ7 NOTE The XVME 601 is configured at the factory with all interrupt selection jumpers installed In addition there are two local sources and two special sources which can interrupt the CPU Refer to Section 3 5 of this Manual for additional information on the local and special interrupt sources 2 7 601 Manual December 1986 2 4 5 Bus Grant and Bus Request Level Selection Jumpers Jumpers J18 J19 J20 are used to select the bus request and bus grant levels as shown in Table 2 6 Table 2 6 Bus Grant and Bus Request Level Selection Jumpers Jumper Position Jumper J18 Jumper J19 Jumper J20 Bus Grant In Bus Grant Out Bus Request BGOOUT BRO BG1OUT BRI BG20UT BR2 BG3OUT BR3 Factory Shipped Position NOTE For a given configuration J18 J19 and J20 must all be in the same position Position D is required when using the on board system resource functions order to pass the unselected Bus Grant signals around the XVME 601 the backplane jumpers should be used 2 5 INSTALLING EPROM ON THE XVME 601 PROCESSOR MODULE As was previously mentioned there are a total of two 28 pin sockets for use by EPROM devices on the 601 Module Installing EPROMs in sockets U29 and U30 is simply a matter of setting the jumpers to match the devices as shown in Table 2 4 referencing the notched ends of the chips as shown in Figure 2 1 and installing the devices
35. ORD RESERV ED SERCLK SERDAT SYSCLK Connector and Pin Number 1A 20 1 24 30 1 13 2 3 1B 21 1B 22 1 A 10 Table A VMEbus Signal Identification cont d Signal Name and Description INTERRUPT ACKNOWLEDGE Open collector or three state driven signal from any master processing an interrupt request It is routed via the backplane to slot 1 where it is looped back to become slot 1 IACKIN in order to start the interrupt acknowledge daisy chain INTERRUPT REQUEST 1 7 Open collector driven signals generated by an interrupter which carry prioritized interrupt requests Level seven is the highest priority LONGWORD Three state driven signal indicates that the current transfer is a 32 bit transfer RESERVED Signal line reserved for future VMEbus enhancements This line must not be used A reserved signal which will be used as the clock for a serial communication bus protocol which is still being finalized reserved signal which will be used as the transmission line for serial communication bus messages SYSTEM CLOCK A constant 16 MHz clock signal that is independent of processor speed or timing It is used for general system timing use 601 December 1986 Signal Mnemonic SYSFAIL WRITE 5V STDBY 5V Table 1 VMEbus Signal Identification cont d Connector and Pin Number 1 B 31 A 32 B 32 1C 32 2B 1
36. R bits 0 5 Three state driven 1B 16 17 lines that provide additional information about the 18 19 address bus such as size cycle type and or DTB 1C 14 master identification 5 1 18 ADDRESS 5 Three state driven signal that indicates a valid address is on the address bus 601 Manual December 1986 Signal Mnemonic A01 A23 A24 A31 BBSY BCLR BERR BGOIN BG3IN BGOOUT BG3OUT Table A 1 VMEbus Signal Identification cont d Connector and Pin Number 1A 24 30 1C 15 30 2B 4 11 1B 1 1B 2 1 1 B 4 6 8 10 1 5 7 9 11 Signal Description ADDRESS bits 1 23 Three state driven address lines that specify a memory address ADDRESS BUS bits 24 31 Three state driven bus expansion address lines BUS BUSY Open collector driven signal generated by the current DTB master to indicate that it is using the bus BUS CLEAR Totem pole driven signal generated by the bus arbitrator to request release by the DTB master if a higher level is requesting the bus BUS ERROR Open collector driven signal generated by a slave It indicates that an unrecoverable error has occurred and the bus cycle must be aborted BUS GRANT 0 3 IN Totem pole driven signals generated by the Arbiter or Requesters Bus Grant In and Out signals form a daisy chained bus grant The Bus Grant In signal indicates to this board that it may become the n
37. RIPTION lt addressl gt lt address2 gt lt pattern gt BI lt addressl gt lt address2 gt BM lt addressl gt lt address2 gt lt address3 gt address count address count address address BS lt addressl gt lt address2 gt lt data gt lt mask gt lt option gt lt addressi gt lt address2 gt DC expression DF DU lt port number gt lt addressl gt lt address2 gt lt text gt GD lt address gt G 0 lt address gt GT lt temp breakpoint address gt HE lt port number gt lt options gt lt text gt MD lt port number gt address count DI M address options MS lt address gt lt data gt OF PA lt port number gt port number gt PF port number gt R M port number exit character gt lt trailing character T lt count gt lt breakpoint address gt VE lt port number gt lt options gt lt text gt A0 A7 lt expression gt D0 D7 lt expression gt R0 R6 lt expression gt PC lt expression gt SR lt expression gt SS lt expression gt US lt expression gt CTRL B DEL CTRL D 3 Block fill memory Block initialize memory Block move memory Breakpoint set Breakpoint remove Block search memory Block test memory Data conversion Display registers formatted Dump memory as S records G
38. TIMER RECEIVERS 55 ADDRESS CODE RS232 PORT B Dir HOLOZINNOO REFRESH CONTROLLER CPU SWITCHES SYSTEM AND RESOURCE STATUS LEDS FUNCTIONS INTERF ACE amp INTERRUPT HANDLER INTERFACE Comes with the XVME 990 2 Monitor Debugger Kit B 1 601 Manual December 1986 ASSEMBLY DRAWING REMOVE THIS SHEET insert Schematic Sheet REMOVE THIS SHEET 601 Manual December 1986 Appendix QUICK REFERENCE GUIDE Memory Map SHORT 1 0 64K FF0000H Mm FE0000H PROM 128K FC0000H VME 15 25 80000H 7FFFFH ON BOARD DRAM 5M 000000H 601 Manual December 1986 Jumper List J1 J3 J4 J5 J6 J7 and J17 J2 J8 J9 10 11 12 13 14 15 J16 718 719 amp J20 This jumper is used to enable disable the reset switch on the front panel of the module These jumpers are used to enable disable the system resource functions These jumpers are configured to match the type and size of EPROM which is installed on the X VME 601 These jumpers are used to determine which VMEbus interrupt levels 1 7 can be used to interrupt the CPU This jumper enables disables the abort switch on the front panel of the module These jumpers are used to select the bus request and bus grant levels C 2 601 Manual December 1986 600MON Command Set COMMAND DESC
39. al December 1986 47 USING 600MON I O ROUTINES THROUGH TRAP 15 The user calls an I O routine by having the program perform the following sequence TRAP 15 Call to 600MON trap handler DC W 00xx Function being requested x function Table 4 3 gives the available I O routines and Table 4 4 give the registers used by the function 4 43 601 Manual December 1986 Table 4 3 Available User Routines FUNCTION DESCRIPTION Return to monitor Input Line Channel 1 Output Line CR LF Channel 1 Input Line Channel 2 Output Line CR LF Channel 2 Not Used Output Line Channel 1 Output Line Channel 2 Not Used Not Used Not Used Not Used Not Used Not Used Not Used Not Used 8 9 A B Input Status Input Character Without Echo Input Character With Echo Input Line Without Echo Input Line With Echo Output Character Output Line Output Line CR LF 4 44 601 Manual December 1986 Table 4 4 Registers Used by Function FUNCTION s REGISTERS USED Beginning of line A5 L A6 1 Beginning of line in A5 L end of line 1 in A6 L Beginning of line in AS L end of line 1 in A6 L Channel in DO B 1 or 2 Status DI B 00 char ready FFH char ready Channel in DO B 1 or 2 Character in D1 B Channel in DO B 1 or2 Beginning of line in AS L A6 L Beginning of line in AS L end of line 1 in A6 L Channel
40. ch time a carriage return CR is entered Any other command exits MD and enters the new command The DI option can be used to obtain source line disassembly of a specified or default number of bytes If lt count gt is specified disassembly of lt count gt bytes occurs If MDS is used disassembly of 32 bytes occurs If lt count gt is not specified or MDS is not used disassembly defaults to two or four bytes depending on the address mode of the disassembled instruction Note that invoking the DI option disables the continue on CR capability for an MD command line but not an MDS command line The DI option invokes the 600MON disassembler which transforms the bytes of machine code comprising the specified or default section of memory into lines of source code Data is evaluated in several ways depending on the context in which it is found Addresses are displayed as hex numbers Operands such as literals are displayed as decimal numbers For example the source line MOVE L 1234 5678 assembles into the following eight hex digits 21FC00001234172E disassembly of which provides this line location 21FC00001234162E MOVE L 4660 0000162E Note that the disassembled version differs from the original source line 4 29 601 Manual December 1986 Many assemblers perform range checking for the purpose of optimizing the object code Optimization occurs when an assembler given a source instruction for which two forms exist ch
41. d 4 3 2 600MON I O 600MON supports two serial channels numbered from one to two Channel one is the local console and the default channel used in commands that can specify a channel for input and or output The RS 232 terminal must be connected to channel one The serial channels are initialized at power up in the following format 9600 baud 8 bits character no parity The configuration of a channel be changed with the 600MON s command see Section 4 6 44 USING 600MON Command entry is similar to that used in many buffer organized systems characters are accumulated in the command line buffer by the input routine A command 15 processed for execution following entry of a carriage return 600MON provides limited editing capabilities for command entry The delete RUBOUT key or CTRL H can be used to delete previously entered characters CTRL X will cancel an entire line CTRL D will re display a command line During output to the console CTRL W will suspend the output until another key is pressed CTRL B will abort commands that perform console input output I O Variations in the basic function offered by many primitive commands can be obtained by entering appropriate characters in the options field of a command line Some command functions are switched off by prefixing the command with NO Commands and other I O are presented in this manual using certain symbols These symbols and their meanings are as
42. e Trace to Temporary Breakpoint Verify S Records Using 600MON I O Routines Through Trap 15 L P L P oF 8 8 O4 o 8 4d 5 Y 5 34 T D RW WWW WWW F2 WN NN me e e e e NO O0 1 ON G QA Qn OW Ne US D OV Un BWR WO OO COD Q WN 601 Manual December 1986 TABLE CONTENTS continued CHAPTER TITLE PAGE APPENDICES A YMEbus Connector Pin Description B Block Diagram Assembly Drawing and Schematics Quick Reference Guide LIST OE FIGURES FIGURE TITLE PAGE 1 1 Module Operational Block Diagram 1 3 2 1 Location of Jumpers Sockets and Connectors 2 2 2 2 601 Memory Map Factory Shipped Configuration 2 1 2 3 Connector JK1 2 11 2 4 Memory after Installing 990 Monitor 2 15 2 5 Installation of an 943 Front Panel 2 17 3 1 601 Processor Module Memory Map 3 2 3 2 68681 DUART Memory Map 3 4 4 1 Typical 601 System Configuration 4 2 4 2 600MON Memory Map 4 4 LIST OE TABLES TABLE TITLE PAGE 1 1 XVME 601 Processor Module Specifications 1 7 2 1 Jumper List 2 3 2 2 RESET ABORT 2 4 2 3 System Resource Function Jumpers 2 6 2 4 EPROM Selection Jumpers for Sockets U30 amp 029 2 7 2 5 Interrupt Selection Jumpers 2 6 2 6 Bus Grant and Bus Request Level Selection Jumpers 2 8 2 7 Local RAM PROM Memory Configurations 2 9 2 8 Connecto
43. eakpoints The registers are set up as in the Display Format command p p See also GO GT Example 600MON x x gt MD 4900 A DI 004900 1018 MOVE B A0 DO 004902 0C000000 CMP B 0 D0 004906 66 8 BNE S 4900 004908 4E75 RTS 600MON x x gt BR 4900 4908 BREAKPOINTS 004900 004900 004908 004908 600MON gt 4900 PHYSICAL ADDRESS 00004900 AT BREAKPOINT 004900 SR 2700 S7 US 000010000 55 00000 00 D0z0001040C D1 230A0444 D2 04060444 D3 00000000 D4z00010031 D5 0000072C D6 00000004 D7 00000000 0 00 8003 AI FFFFFFFF A2 00000454 3 0000054 4 000131 0 5 00002704 6 00010158 7 00000 00 004908 1018 MOVE B A0 D0 600MON gt GD 004900 PHYSICAL ADDRESS 00004900 600MON gt 4 25 601 Manual December 1986 4 6 13 Until Breakpoint GT lt temporary breakpoint address gt The GT command has the following characteristics Starts execution at address pointed to by PC Does not trace first instruction Sets breakpoints set by BR Sets indicated temporary breakpoint The registers are set up as in the Display Format command p o op When any breakpoint is encountered the temporary breakpoint is reset If the address at which execution stops is in the breakpoint table the message ERROR BRKPTS is displayed See also BR DF GD GO TR TT Example 600MON x x MD 4900 A DI 004900 1018 MOVE B AQ D0 004902 0C0
44. ect parity If the parity cannot be set in one or more words the message BUS TRAP ERROR is displayed on the console The BT Block Test command may be used to isolate the failure s NOTE Both addresses must be on word boundaries See also BT Example 600 x x gt 800000 80FFFE PHYSICAL ADDRESS 00800000 0080FFFE 600MON XVME 601 Manual December 1986 4 6 4 Block Move BM lt addressl gt lt add ress2 gt lt address3 gt The BM command 15 used to move duplicate blocks of memory from one area to another lt addressl gt beginning address of source memory block lt address2 gt ending address of source memory block lt address3 gt beginning address of destination memory block Example 600MON gt MD 4900 A DI 004900 1018 MO VE B A0 D0 004902 0C000000 0 D0 004906 67F8 BEQ S 4A00 004908 4E75 RTS 600MON x x gt MD 4A00 A DI 004A00 FFFF DC W SFFFF 004A02 0000FFFF OR B 1 D0 004A06 0020 OR B 1 A 0 600MON x x gt BM 4900 4909 4A00 PHYSICAL ADDRESS 00004900 00004909 PHYSICAL ADDRESS 00004A00 600MON gt MD 4 00 A DI 004A00 1018 MOVE B A0 D0 004402 0C000000 0 D0 004 06 67 8 BEQ S 4900 004A08 4 75 RTS 600MON x x gt X V ME 601 Manual December 1986 4 6 5 Breakpoint Set and Remove BR and NOBR BR display only BR lt address gt lt count gt lt address lt count gt NOBR lt address gt lt
45. eed that of realtime time execution 1 breakpoints with count encountered The G sequence starts by tracing one instruction setting any breakpoints and then free running COMMAND FORMAT DESCRIPTION 600MON x x gt G Begin execution at address in PC 600MON x x gt lt address gt Set PC address and begin execution at that address See also BR DF GD GT TR TT 4 23 601 Manual December 1986 Example 600MON gt MD 4900 A DI 004900 1018 MOVE B 0 004902 0C000000 CMP B 3 0 DO 004906 67F8 BEQ S 4900 600MON x x BR 4900 4908 BREAKPOINTS 004900 004900 004908 004908 600MON x x G 4900 PHYSICAL ADDRESS 00004900 AT BREAKPOINT 004908 5 2700 57 US200001000 55 00000 00 20 00010402 D12230A044 D2 04060444 D3 00000000 24 00010031 D5 0000072C D6 00000004 D7200000000 0 00 8002 AJ FFFFFFFF A2 00000454 3 0000054 4 000131 0 5 00002704 6 00010158 7 00000 00 004908 4 75 RTS 600MON x x gt 4 24 601 Manual December 1986 4 6 12 Direct Execute Program GD GD address The GD command is similar to the GO command except that GD does not set breakpoints nor does it start by tracing one instruction The GD command has the following characteristics Starts execution at a given address or address pointed to by PC Does not trace first instructions Does not set breakpoints set by BR Does not set temporary br
46. en multiple options When the memory change mode is entered on execution of the initial command line object data in the specified locations is displayed in hexadecimal format and the M command prompt 2 is presented at the right of the data data can then be changed using any of the subcommands described below If desired the action of the subcommand can be obtained without entering new data For example the contents of the preceding locations s can be viewed by typing CR alone after the prompt or the M command can be exited by typing lt data gt CR Update location and sequence forward lt data gt CR Update location and sequence backward data CR Update location and reopen same location data CR Update location and terminate 4 31 601 Manual December 1986 Disassemble Assemble Mode the DI option On execution of an initial M command line with the DI option selected the disassemble assemble mode is entered Starting from the specified location data is disassembled into a source instruction line and both object data in hexadecimal and the source line are displayed The M command prompt is displayed to the right of the disassembled source line If desired a new source instruction may be typed and assembled to replace the existing instruction The first character must be a space which is recognized as the label field delimiter by the 600MON on line assembler Asse
47. exceptions TRAP etc COMMAND FORMAT DESCRIPTION 600MON gt Trace instruction 600MON gt lt count gt Trace count instructions 600MON gt CR Carriage return CR executes next instruction 600MON x x gt Typing a period followed by a CR exits trace mode NOTE If the program counter contains an address that falls between the starting and ending addresses of the 600MON program a warning message PC within debugger will be returned Processing will continue but with unexpected if stack pointers and or registers are not handled properly See also DF GO GT TT 4 39 601 Manual December 1986 Examples 600MON gt 5000 600MON x x gt TR PHYSICAL ADDRESS 00005000 PC 005002 SR 2709 87 N C 20 09300034 D1 00004D4D D4 00000F37 D5 00000000 A0 000100CA 1 00010510 4 00002004 5 0000053 600MON gt 2 US 00001000 D2 00010004 D6 00000001 A2 00000546 A6 00000544 4E71 PHYSICAL ADDRESS 00005002 005004 SRz2709z S7 N C D0z00300034 1 00004 4 D4 00000F37 D5 00000000 0 000100 A1200010510 A4 00002004 5 0000053 005006 SR 2709 S7 N C 20 00300034 1 00004 4 D4 00000F37 D5 00000000 0 000100 1 00010510 4 00002004 5 0000053 ipii 005006 600MON x x 600MON x x US 00001000 D2 00010004 D6 00000001 A2 00000546 A6 00000544 4E71 US 00001000 D2 00010004 D6 00000001 A2 0000054
48. ext bus master BUS GRANT 0 3 OUT Totem pole driven signals generated by Requesters These signals indicate that a DTB master in the daisy chain requires access to the bus 601 Manual December 1986 Signal Mnemonic BRO BR3 DSO DS1 DTACK D00 D15 GND Connector and Pin Number 1 12 15 1 13 1 12 1 16 1 9 11 15 17 19 1 20 23 1 9 2B 2 12 22 31 Table 1 VMEbus Signal Identification cont d Signal Name and Description BUS REQUEST 0 3 Open collector driven signals generated by Requesters These signals indicate that a DTB master in the daisy chain requires access to the bus DATA STROBE 0 Three state driven signal that indicates during byte and word transfers that a data transfer will occur on data buss lines D00 D07 DATA STROBE 1 Three state driven signal that indicates during byte and word transfers that a data transfer will occur on data bus lines 20 015 DATA TRANSFER ACKNOWLEDGE Open collector driven signal generated by a DTB slave The falling edge of this signal indicates that valid data is available on the data bus during a read cycle or that data has been accepted from the data bus during a write cycle DATA BUS bits 0 15 Three state driven bi directional data lines that provide a data path between the DTB master and slave GROUND 601 Manual December 1986 Signal Mnemonic IACK IRQI IRQ7 LW
49. he CTRL key and the character key are depressed simultaneously For optimum operation the device connected to port 2 should operate at the same baud rate as the device connected to port 1 The port 2 device can operate more Slowly than the port 1 terminal but if the port 1 terminal is set slower than the port 2 device the system probably will not work Valid port numbers for this command are n 2 specifies 600 port 2 See also LO VE Example Comments 600MON x x gt Start up or reset condition 600MON x x gt Command to enter transparent mode TRANSPARENT 01 CTRL A 600MON prints this Exit 01 means that in order to exit this mode the operator must enter CTRL A User talks directly to host uses editor assembler etc CTRL A Ends the transparent mode 600MON x x gt 600MON prints its prompt and system is ready for new command 4 38 601 Manual December 1986 4 6 24 Trace TIR lt count gt The TR command executes instructions at a time beginning at the location pointed to by the program counter After execution of each instruction the MPU registers are displayed Once the trace mode is entered the prompt includes a colon ie 600 gt While in this mode typing the single character CR will cause one instruction to be traced Breakpoints and breakpoint counts are in effect during trace Trace cannot be used to step through interrupts or
50. in DO B 1 or 2 Character in DI B Channel in DO B 1 or 2 Beginning of line in AS L end of line 1 in A6 L 4 45 601 Manual December 1986 Appendix VMEbus CONNECTOR PIN DESCRIPTION The XVME 601 Processor Module is a single high VMEbus compatible board There is one 96 pin bus connector on the rear edge of the board labeled refer to Chapter 2 Figure 2 1 for the location The signals carried by connector are the standard address data and control signals required for a Pl backplane interface as defined by the VMEbus specification Table 1 identifies and defines the signals carried by the connector Table A 1 P1 VMEbus Signal Identification Connector Signal and Mnemonic Pin Number Signal Name and Description ACFAIL 1B 3 AC FAILURE Open collectors driven signal which indicates that the AC input to the power supply is no longer being provided or that the required input voltage levels are not being met IACKIN 1A 21 INTERRUPT ACKNOWLEDGE IN Totem pole driven signal IACKIN and IACKOUT signals form a daisy chained acknowledge The IACKIN signal indicates to the VME board that an acknowledge cycle is in progress IACKOUT 1 22 INTERRUPT ACKNOWLEDGE OUT Totem pole driven signal IACKIN and IACKOUT signals form a daisy chained acknowledge The IACKOUT signal indicates to the next board that an acknowledge cycle is in progress 5 1 23 ADDRESS MODIFIE
51. into hexadecimal and decimal 601 Manual December 1986 4 6 9 Display Formatted Registers DF The DF command is used to display the CPU registers and the disassembled code of the instruction pointed to by the program counter The registers display is also provided whenever the debugger gains control of the program execution i e at breakpoints and when tracing Note that any single register can be displayed with the 0 7 0 07 etc commands See the display set register command register RM and the OF command Example 600MON gt 000000 SR 2714 87 Z US 00001000 SS 00000C00 D0 00010434 D1 230A0444 D2 04060444 D3 00000000 D4 00010031 D520000072C D6 00000004 D7 00000000 0 00 8001 1 A2 00000454 3 0000054 4 000131 0 5 00002704 A6 00010158 7 00000 00 000000 FABE DC W FABE 600MON x x PC 001000 600MON x x SS 003F00 600MON x x DF PC2001000 SR 2714 S7 Z US 00001000 SS 0003F00 20 00010434 D12230A0444 D2 04060444 D3 00000000 D4 00010031 D520000072C D6 00000004 D7200000000 0 00 8001 AI FFFFFFFF A2 00000454 3 0000054 4 000131 0 5 00002704 A6200010158 7 00003 00 001000 000 DC W 00F 600MON gt 4 21 601 Manual December 1986 4 6 10 Dump Memory S Records DU DU lt port number gt lt addressi gt lt address2 gt lt text gt The DU command formats memory data in
52. k is ANDed the data from memory before applying the AND mask 1s displayed Example Comment 600MON x x MD 1 15 OOIFFO FE FE FE FE FF EE PE PE 9 002000 43 43 45 45 00 00 00 00 00 00 00 00 00 00 00 00 600MON x x BS 1 200 Successful search for literal PHYSICAL ADDRESS 00001FF0 0000200F string CC 600MON x x BS 1 0 200F 34 W Unsuccessful search for word PHYSICAL ADDRESS 00001FF0 0000200F length data with default mask 600MON x x gt BS 1 200F 03 OF Successful search for byte PHYSICAL ADDRESS 00001FF0 0000200F length data with four most 002000 43 significant bits masked 002001 43 600MON x x gt BS 1000 4AFB W Successful search for PHYSICAL ADDRESS 00001000 00003 leftover breakpoints 001000 4AFB 600MON x x gt 4 18 601 Manual December 1986 4 6 7 Block of Memory Test BT lt addressl gt lt address2 gt The BT command provides a destructive test of a block of memory A word boundary even address must be given for the starting lt addressl gt and ending lt address2 gt of the block If the test runs to completion without detecting an error all memory tested will have been set to zeros Execution of this command may take several seconds for large blocks of memory When a problem is found in a memory location the address the data stored and the data read are displayed and contro
53. kit consists of two parts a Motorola 68681 Manual referenced as XYCOM part 74601 003 and this document the X VME 601 Processor Module Manual referenced as XYCOM Part 74601 002 The 68681 Manual covers all information on the operation lay out and programming of the DUART The XVME 601 Manual covers module hardware specifics register access addresses and operational programming constraints MC68681 Dual Asynchronous Receiver Transmitter Manual Motorola Inc 1985 13 MODULE OPERATIONAL DESCRIPTION Figure 1 1 shows an operational block diagram of the 601 Processor Module 1 2 601 Manual December 1986 CPU CLOCK 68000 OR 68010 CPU Q RS232 PORT DUART RS232 ES amp DRIVERS amp 2 TIMER RECEIVERS Rs232 PORT CPU ADDRESS SS DECODE REFRESH SWITCHES SYSTEM s s zu xm NTERRUPTER AND RESOURCE INTERRUPT STATUS LEDS FUNCTIONS HANDLER INTERFACE PROM Comes with the 990 2 Monitor Debugger Kit Figure 1 1 Module Operational Block Diagram 1 3 601 Manual December 1986 1 3 1 VMEbus Master Interface The VME master interface on the XVME 601 Processor Module supports the following bus cycles 24 Address Modifier Codes 39 9 16 Address Modifier Codes 29H 2DH D16 e D8 Even or Odd Transfers e Read Modif y Write RMW Cycles D8 Even or Odd T
54. l is returned to 600MON See also BI Example 600MON x x gt 1000 PHYSICAL ADDRESS 00001000 00003 600MON gt 1000 PHYSICAL ADDRESS 001000 00003 FAILED 003200 WROTE FFFF 0000 600MON x x gt 601 Manual December 1986 4 6 8 Data Conversion DC DC lt expression gt The DC command is used to convert an expression into hexadecimal and decimal The expression may be entered in hexadecimal decimal or mixed format output will be shown both ways Default input format is hexadecimal Octal and binary values may also be converted to decimal and hexadecimal values The following symbols are used precedes hexadecimal value default may be omitted amp precedes decimal value precedes octal value precedes binary value Except for RO offset registers may not be used with the DC command This command is useful in calculating displacements such as destination of relative branch instructions or program counter relative addressing modes COMMAND FORMAT 600MON x x gt DC lt data gt 600MON x x DC amp lt data gt Example 600MON x x gt DC amp 120 78 amp 120 600MON x x DC amp 15 4 13 0 amp 0 600MON gt DC 1000 000 1000 44096 600MON gt DC amp 15 9 14 1100 6 amp 6 600MON x x gt 4 20 DESCRIPTION Convert hexadecimal data into hexadecimal and decimal Convert decimal data
55. llowing commands are the same BR 10 10 0 BR 1010 R7 Example 600MON gt 1000 offset 600MON gt R3 3300 600MON gt R4 440000 600MON x x gt R5 0 Set offset R5 600MON x x Display offsets R0200000000 R1 00001000 R2200000000 R 3200003300 R4 00440000 R5 00000000 R6 FFFFFFFF R7200000000 600MON gt 0 2000 Set offset RO 600MON gt 10 000010 0 61 Offset RO is added to the address 600MON x x gt _10 R7 R7 is always 0 so it overrides 000010 00 RO 600MON x x gt NOTE To set RO to 0 after is has been set to a nonzero value use the command RO 0 R7 The command RO 0 will not alter RO 4 34 601 Manual December 1986 4 6 20 Port Attach and Detach PA and NOPA PA port number gt NOPA The PA command allows the user to attach a poet so that information sent to the port 1 terminal will be echoed on another port Valid port numbers for this command are none defaults to 600MON port 1 nz specifies 600MON port 1 n 2 specifies 600MON port 2 A serial printer could be connected to one of the ports so data printed on the port 1 terminal will also be printed on the printer attached to one of the other ports Hard copy of a debug session can be used to communicate complex problems to Other users NOTE Only one port can be attached at a time 4 35 601 Manual December 1986 4 6 21 Port Format PF
56. mbly is initiated by typing a carriage return After assembly and updating data in the following locations is disassembled and the next source line displayed Note that the update and sequence backward and the update and reopen the same location features are not available in the disassemble assemble mode Typing CR while in this mode will also provide exit from the M command See also MD MS Example 600 gt M 5000 L 00005000 00000000 200 00005000 00000200 2 600MON x x gt 5400 W N 00005400 555 00005402 34 600MON x x gt 5000 DI 005000 48B800010406 MOVEM WD0 0406 005006 40F80406 MOVE W SR 0406 00500A 48E7FFFE MOVEM LD0 D7 A0 A6 A7 00500 4FF8095A LEA L 095A A7 00500 4FF8095A X response to incomplete 00500E 4FF8095A LEA L 095A A7 incorrect entry 005012 1600 MOVE B D0 D3 005014 04444281 SUB W 17025 D4 601 Manual December 1986 4 6 18 Memory Set MS MS lt address gt lt data gt The function of the MS command is to change data in memory Data to be written and the starting location are specified on the MS command line Existing data is overwritten Data is specified as bytes words and long words Hexadecimal data of different lengths can be intermingled on the MS command line One or more ASCII characters also may be specified as data ASCII characters are enclosed by quotation marks Data up to the capacity of the comma
57. me the RESET state when the module is reset and when the CPU enters the HALT state 3 5 601 Manual December 1986 Table 3 2 68681 Output Control Functions Output Command Function Performed Negates the Channel A CTS Output Asserts the Channel A CTS Output SEE BELOW Asserts SYSFAIL and Turns the FAIL LED On Negates SYSFAIL and Turns the FAIL LED Off Clears and disables interrupts generated by SYSFAIL Enables SYSFAIL Interrupts Clears and disables interrupts generated by ACFAIL or the ABORT Button Enables Interrupts via the ABORT Button or ACFAIL Turns Off the PASS LED Turns On the PASS LED Disables ALL Interrupts to the CPU Allows the CPU to be Interrupt and OP2 are used together to control the VMEbus release mechanism in the following fashion Bus Release Mechanism Release When Done RWD Release On Request ROR Release On BCLR Never Release the Bus 3 6 601 Manual December 1986 3 4 When changing the bus release mechanism the following sequence must be followed 1 and 2 by writing 06 to FE001FH 2 Monitor Input Line and wait for it to set to 1 3 Set desired bus release mechanism by writing to FE001DH 68681 DUART INITIALIZATION The 68000 program which follows demonstrates a general method of initialization for DUART on the XVME 601 Processor Module The following are the equates which are used
58. mpers Jumper Descriptions RESET ABORT Switch Enable Jumpers System Resource Function Jumpers EPROM RAM Type Selection Jumpers VMEbus Interrupt Level Selection Jumpers Bus Grant and Bus Request Level Selection Jumpers Installing EPROM on the XVME 601 Processor Module External Connector Module Installation Installing the XVME 990 2 Monitor RAM Kit Installing a 6U Front Panel Kit PROGRAMMING Introduction The 601 Processor Module Memory Map The 68681 DUART Memory Map Using the 68681 I O Ports 68681 DUART Initialization Interrupts 1 1 Q od Q t t t2 to P2 t2 t2 W 601 Manual December 1986 4 TABLE CONTENTS continued TITLE XVME 600MON Introduction Referenced Documents System Configuration 600MON Memory Map Exception Vectors 600Mon I O Using 600MON Expression Parameters Address Parameters Offset Registers Data Parameters Command Verification Command Set Display Set Register Block Block Initialize Block Move Breakpoint Set and Remove Block of Memory Search Block of Memory Test Data Conversion Display Formatted Registers Dump Memory S Records Execute Programs Go Direct Execute Program Go Until Breakpoint Help Load S Records Memory Display Disassemble Memory Modify Disassemble Assemble Memory Set Display Offsets Port Attach and Detach Port Format Register Modify Transparent Mode Trac
59. nd buffer can be written into sequential memory locations with a single invocation of MS Buffer capacity is 128 characters The command automatically sends a CR LF sequence to the console allowing additional characters to be specified on the next line See also MD MM Example 600MON gt MS 2000 ABC Set memory to ASCII string 600MON x x gt MS 2000 4445 Set memory to hexadecimal word data 600MON x x gt MS 2005 12345678 12 Set memory to hexadecimal long word byte data 600MON x x gt MD 1000 10 001000 00 00 3f ff 00 00 00 00 00 00 00 00 00 00 00 00 600 gt MS 1000 ABCDEFGH 600MON gt MD 1000 10 001000 41 42 43 44 45 46 47 48 00 00 00 00 00 00 00 00 600MON gt 4 33 601 Manual December 1986 4 6 19 Display Offsets OF The OF command displays the offsets used to assist with relocatability and position independent code Linked segments of code will each have different load address or offset For user convenience seven general purpose offsets RO R6 are provided Offset R7 is always zero which provides a convenient technique of entering an address without an offset If no value is assigned to one of the general purpose offsets it will have the default value of zero Unless another offset is entered each command that expects an address parameter automatically adds offset RO to the entered address that is if 0 1000 the fo
60. ns Characteristic Specifications Processor Speed Memory Capacity EPROM DRAM Serial Ports Number Compatibility Baud Rates Signals Time Base Generator Front Panel Indicators Front Panel Switches Power Requirements Temperature Operating Non operating Humidity Altitude Operating Non operating 68000 or 68010 10 MHz sockets or up to 128K bytes 512K bytes 2 RS 232 75 19 2K baud programmable Port A TxD RxD RTS CTS Port B TxD RxD 17 4uSec to 569mSec FAIL red PASS green and HALT red RESET and ABORT 5 volts 2 8A Max 2 5 A Typ 12 volts 100mA 10mA Typ 0 to 65 32 to 149 F 40 to 85 C 40 to 158 F 5 to 95 RH non condensing Extremely low humidity may require protection against static discharge Sea level to 10 000 ft 3048m Sea level to 50 000 ft 15240m 601 Manual December 1986 Table 1 1 601 Processor Module Specifications cont Characteristic Specifications Vibration Operating 5 to 2000 Hz 015 in peak to peak 2 55 max Non operating 5 to 2000 Hz 030 peak to peak 5 0g max Shock Operating 30 g peak acceleration 11 mSec duration Non operating 50 g peak acceleration 11 mSec duration VMEbus Compliance A24 A16 D16 D08 EO DTB Master RMW Capability 1 7 D08 O Interrupt Handler SGL Arbiter R 0 3 Bus Requester RWD ROR or ROBC DYN bus release ROACF sof
61. o direct execute program Go execute program Go until breakpoint Help Load S records into memory UB Memory display disassemble Memory modify Memory set Display offsets Port attach Port detach Port Format Register Modify Transparent mode Trace Temp breakpoint trace Verify memory to S records Display set address register Display set data register Display set relative offset Display set program counter Display set status register Display set s stack pointer Display set user stack pointer Abort command Delete character Redisplay line 601 Manual December 1986 600MON ERROR MESSAGES ERROR MESSAGE PRINTER NOT READY SYNTAX ERROR ERROR ILLEGAL INSTRUCTION TRAP ERROR IS NOT HEX DIGIT DATA DID NOT STORE INVALID ADDRESS WHAT NOT HEX MEANING Printer is not properly connected or cannot receive input Error in command line Error prefix Instruction used an illegal op code See Traps in MC68000 user s guide Improper character entered in a field that requires hexadecimal digit Data did not go where intended such as attempting to write ROM Too big 1 in bits 24 31 or odd for W or L 1 in bit 0 Program does not recognize user s entry Same as IS NOT HEX DIGIT FAILED AT WRITE READ X OTHER MESSAGES VMEBUG x y HELP STOP BITS CHAR NULL Read or write command failure output by BT Assembler syntax input is illegal incomplete or begin
62. ock move memory BR address count address count Breakpoint set NOBR lt address gt lt address gt Breakpoint remove BS lt addressl gt lt address2 gt lt data gt lt mask gt lt option gt Block search memory lt addressl gt lt address2 gt Block test memory DC expression Data conversion DF Display registers formatted DU port number gt lt addressl gt lt address2 gt lt text gt Dump memory as S records GD address Go direct execute program G 0 lt address gt Go execute program GT lt temp breakpoint address gt Go until breakpoint HE Help LO lt port number gt lt options gt lt text gt Load S records into memory UB MD lt port number gt address lt count DI Memory display disassemble M lt address gt lt options gt Memory modify MS lt address gt lt data gt Memory set OF Display offsets PA lt port number gt Port attach NOPA lt port number gt Port detach PF lt port number gt Port Format R M Register Modify lt port number exit character gt lt trailing Transparent mode character gt T R lt count gt Trace TT lt breakpoint address gt Temp breakpoint trace port number gt lt options gt lt text gt Verify memory to S records A0 A7 lt expression gt Display set address register D0 D7 lt expression gt Display set data register R0 R6 lt expression gt Di
63. on three LEDs can be found on the module front panel The LEDs are labeled FAIL PASS and HALT Fail is on when the CPU is asserting SYSFAIL The PASS light is controlled directly by the CPU HALT is on when the CPU enters halt state 1 3 5 System Resource Functions The following system resource functions exist the XVME 601 Processor Module e SYSCLK driver e SYSRESET driver e IACK daisy chain driver e Single level arbiter e Bus timeout The system resource functions can be enabled disabled via jumpers refer to Chapter 2 The Module is shipped from the factory with the system resource functions enabled 1 3 6 Local DRAM On board DRAM provides 512K of random access memory No wait states are required to access the DRAM except when the CPU tries to access the DRAM during a refresh cycle refresh cycle requires 3 clock periods 300nS Therefore the maximum number of wait states will be 3 No wait states will be encountered during a refresh cycle when the CPU accesses anything other than the DRAM The ram exists from address 000000H through O7FFFFH refresh circuitry is not disabled during the reset therefore the module may be reset with out effecting the contents 1 6 601 Manual December 1986 1 4 XVME 601 PROCESSOR MODULE SPECIFICATIONS Table 1 1 is a list of the operational and environmental specifications for the 601 Processor Module Table 1 1 601 Processor Module Specificatio
64. ooses the shorter form thereby shortening the execution time For example if the value of the immediate data specified for an ADDI instruction is seven or less the resident assembler will substitute an ADDQ instruction In such cases the disassembled version will differ from the original source instruction Note that the 600MON one line assembler see the Memory Modify command does not perform range checking and therefore will not cause optimization differences between original and disassembled instructions In some cases instructions having different mnemonic forms assemble into identical machine code In such cases the disassemble always chooses the same one of two mnemonics For example the resident assembler will produce the same code from the branch instructions BT branch condition true and DBF decrement and branch condition false The disassembler presents BRA when it encounters the former code and DBF when it encounters the latter code See also MM MA Example 600MON x x gt MD 4900 004900 20 00 00 43 43 24 19 D6 82 0 82 7F FF FF lt 004910 67 02 60 08 06 83 0000 00 01 60 E404 83 0000 G D 004920 00 01 60 DC 00 00 00 00 00 00 00 00 00 00 0000 qy 004930 00 00 00 00 00 00 00 00 0000 00 00 00 00 00 00 600MON x x MD 4900 12 01 004900 20300004343 MOVE L 17219 D0 004906 2419 MOVE L 1 2 004908 D682 ADD L D2 D3 00490 0C827FFFFFFF CMP L 2147483647
65. otched ends of the chips are positioned as shown in Figure 2 1 Figure 2 4 shows the Memory Map after the XVME 990 2 PROM has been installed 2 14 601 Manual December 1986 FFFFFFH SHORT I O 0000 Las FE0000H RN 600MON SHADOWS E SOCKETS m U29 and 1030 600MON Z 32K 0000 22 15 25M 80000 5M 0200H T 7 22 2 CPU EXCEPTION HANDLER TABLES Figure 2 4 Memory Map After Installing 990 2 Monitor Kit 2 15 601 Manual December 1986 29 INSTALLING FRONT PANEL KIT OPTIONAL XYCOM Model Number 943 is an optional 60 front panel kit designed to replace the existing 3U front panel on the XVME 601 60 front panel facilitates the secure installation of single high modules in those chassis which are designed to accommodate double high modules The following is a step by step procedure for installing the 60 front panel on an 601 Module refer to Figure 2 5 for a graphic depiction of the installation procedure 1 2 3 4 5 6 Disconnect the module from the bus Remove the screw and plastic collar assemblies labeled 6 and 7 from the extreme top and bottom of the existing 3U front panel 11 and install the screw assemblies in their corresponding locations on the 6U front panel Slide the module identification plate labeled 13 from the handle
66. pment Both channels have the traditional transmit TxD and receive RxD lines and in addition channel A has a modem control input RTS and a modem control output CTS The RS 232 signals are accessible via a 26 pin connector JK1 located on the module front panel Figure 2 3 shows the module front panel and how the pins are situated in the connector 26 Pin 1 601 Manual December 1986 Table 2 8 shows the module front panel and the pin designations for connector JK1 Table 2 8 Connector JK1 Pin Designations Won NU 2 7 MODULE INSTALLATION Pin Designation Signal Direction Input TxD Channel A NC RxD Channel A Output NC RTS Channel A Input NC CTS Channel A Output GND Channel A TxD Channel B NC RxD Channel B Input Output GND Channel B NC NC XYCOM XVME modules are designed to comply with all physical and electrical VMEbus backplane specifications The XVME 601 Processor Module is a single high VMEbus module and as such only requires the backplane 2 12 601 Manual December 1986 CAUTION Never attempt to install or remove any boards before turning off the power to the bus and all related external power supplies Prior to installing a module you should determine and verify all relevant jumper configurations and all connections to external devices or power supplies
67. popular data rates from 75 to 19 2K baud In addition to the standard receive and transmit lines Channel A has a modem control input RTS and output CTS All serial communication lines are accessible at the 26 pin connector labeled JK1 located on the module front panel refer to Chapter 2 for the Channel A and B pinouts 1 4 601 Manual December 1986 The 68681 contains timer counter which 15 independent from the serial channel baud rate generators The timer can be programmed from the serial channel baud rate generators The timer can be programmed from the serial channel baud rate generators timer is set up to use 3 6864 2 16 or 230 4 KHz as its time base This will allow periodic interrupts or square wave outputs ranging from 17 4uS to 569mS refer to the MC68681 Dual Asynchronous Receiver Transmitter Manual for information on programming the timer The 68681 DUART on the XVME 601 Processor Module is configured to provide 6 parallel inputs and 8 parallel outputs These I O points are used by the CPU to control and monitor a variety of module functions The input lines are used by the CPU to monitor the following the RTS line on Channel when the module has control of the VMEbus SYSFAIL BCLR and ACFAIL lines the ABORT button on the front panel The output lines are used by the CPU to control the following functions the Channel A CTS output the type of bus release mechanism to be u
68. r JK 1 Pin Designations 2 12 3 1 68681 Parallel Input Status Indications 3 5 3 2 68681 Output Control Functions 3 6 111 601 Manual December 1986 LIST TABLES continued TITLE 601 Processor Module Interrupts Offset Examples 600MON Commands Available User Routines Registers Used by Function iV 601 Manual December 1986 Chapter 1 MODULE DESCRIPTION 11 INTRODUCTION The XVME 601 Processor Module 15 single high VMEbus compatible board which uses a 68000 or 68010 CPU running at 10 MHz The module contains two byte wide memory sockets for EPROM devices These sockets allow a maximum of 128K bytes of EPROM to be installed On board DRAM chips provide 512K bytes of local RAM The CPU is capable of accessing the local DRAM and EPROM without the need for wait states XYCOM s XVME 990 2 600MON Debugger Kit is available for the 601 601 Processor Module provides two RS 232 serial ports and 16 bit programmable timer via an on board 68681 Dual Asynchronous Receiver Transmitter DUART The module also incorporates three front panel LEDs to indicate diagnostic PASS FAIL status diagnostics are included in the 601 monitor as well as CPU HALT status In addition the XVME 601 Processor Module provides all of the VMEbus utilities required for a complete system including e SYSCLK e SYSRESET e A single level arbiter e A Bus Timer e IACK Daisy Chain
69. ransfers e Interrupt Acknowledge Cycles D8 Odd Transfers Only Note that RMW cycles can use either even or odd byte transfers while IACK cycles can use only odd byte transfers The XVME 601 Module can be configured Via Jumpers to use any of the four bus arbitration levels see Chapter 2 The VMEbus is requested when the CPU executes an off board memory or JACK cycle and the XVME 601 Module does not presently have control of the bus After requesting the bus wait cycles will be inserted until the bus is acquired and the slave response with DTACK or BERR When the module has control of the VMEbus the wait states due to the acquisition phase will cease The bus release mechanism may be Release When Done R WD Release On Request release BCLR ROBC or release on ACFAIL ROACF In the last case an interrupt can be generated when ACFAIL is asserted and the CPU release the bus if desired Early BBSY release is supported when the XVME 601 Module decides to release the bus during the last master cycle 1 3 2 The 68681 Dual Universal Asynchronous Receiver Transmitter DUART A 68681 DUART is used to provide two RS 232 serial communication channels a 16 bit timer and two ports dedicated to module status and control I O two asynchronous serial channels labeled Channel A and Channel B are configured as RS 232 Data Communication Equipment DCE channels Independent baud rate generators allow most of the
70. s in the label field VMEbug prompt HE command displays all valid commands Displayed by PF command Displayed by PF command C 4 601 Manual December 1986 600MON ERROR MESSAGES cont d OTHER MESSAGES cont d C R NULL Displayed by PF command TRANSPARENT EXIT 012CTL Displayed by command SOFTWARE ABORT Displayed when abort button 15 used BREAK BREAK key has been used AT BREAKPOINT Indicates program has stopped at breakpoint PHYSICAL ADDRESS Actual address by command CHKSUM Checksum in LO or VE command DUMP DONE Memory dump to disk 15 complete within DEBUGGER Displayed by trace commands C 5 XVME 601 Manual December 1986 R60 S RS9 gt 7 5 lt 7 5 R46 5V gt BCCLK 4 16K gt 10M 6 20MHZ gt CPUCLK 6 J 09 06 015 2 4 6 m P 75 93 NEE ERG 74F113 D 45 4 vcc GND R30 5V a re Bre ja S 17 2K jl Dis v 5 A 23 2 3 4 6 3 gt 85 4 BERR gt E n ON AG 3 gt et 26 a7 3 S 23146 a9 3 gt IPL 2 810 17 5 vPae gt ATA 815 17 818 6 gt 20 a21 222 A23 FC 5 4 gt FCt 3 4 FC2 3 4 OE 5 8115812 R10 5V 10K 10K 10K 5V 5 eee ee 1 06 5 4 6 815 R W 2 3 4 6 75 R85 GND gt ASe 5 6 GND
71. sed by the module the PASS and FAIL LEDs on the module front panel clearing and enabling interrupts 1 3 3 Interrupts The Processor on the XVME 601 Processor Module can be interrupted via all seven VMEbus interrupts plus 2 local and 2 special interrupt sources The local interrupt sources include the ABORT push button and the 68681 DUART and the special interrupts include ACFAIL and SYSFAIL Note that ACFAIL and SYSFAIL are considered special interrupts in this case because they must be individually enabled by the CPU through the 68681 outputs Refer to 68681 Manual for information on the types of interrupts which the DUART itself can generate One of the outputs on the 68681 DUART is used to enable disable all interrupt capability and some are used to individually enable clear local and special interrupt capabilities Refer to Section 3 3 for information on controlling the 68681 outputs The local interrupts have priority over the VMEbus interrupts when both exist on the same level 1 5 601 Manual December 1986 1 3 4 Status LEDs Control Switches Two momentary push button switches can be found on the front panel of the module they are labeled RESET and ABORT RESET will reset the module and the VMEbus via SYSRESET The DRAM refresh logic is not disabled during reset therefore the module may be reset without effecting the contents of the DRAM ABORT generates a level 7 interrupt to the CPU In additi
72. sed to determine which VMEbus interrupt levels 1 7 can be used to interrupt the CPU J16 This jumper enables disables the abort switch on the front panel of the module 718 719 amp J20 These jumpers are used to select the bus request and bus grant levels 2 4 JUMPER DESCRIPTIONS Each of the following subsections examines the jumper options in closer detail showing specifically when and how jumpers should be configured 2 3 XVME 601 Manual December 1986 2 4 1 RESET ABORT Switch Enable Jumpers 31 amp J16 There are two momentary push button switches which can be found on the front panel of the module The switches are labeled RESET and ABORT When the RESET button is enabled by installing jumper J1 it can be used to reset the CPU and the VMEbus When the ABORT button is enabled by installing jumper J16 it can be used to generate a level 7 interrupt to the CPU Table 2 2 shows the configuration of these jumpers for enabling disabling the front panel switches Table 2 2 RESET ABORT Switch Enable Jumpers Jumper J16 RESET Switch Enabled Disabled ABORT Switch Enabled Disabled The 601 Module is configured at the factory with both RESET and ABORT activated NOTE Use of the RESET button activates the SYSRESET line if jumpers J1 and J6 are installed thereby resetting the entire backplane The RESET button cannot be used to just reset the X VME 601 board 2 4
73. splay set relative offset lt expression gt Display set program counter SR lt expression gt Display set status register SS expression Display set s stack pointer US expression Display set user stack pointer CTRL B Abort command DEL Delete character CTRL D Redisplay line 601 Manual December 1986 4 6 1 Display Set Register lt register gt lt expression gt Individual machine or offset registers can be displayed and or altered by using the following format lt register gt lt expression gt Commands with a leading period and the registers displayed altered by these commands are AQ A7 address register D0 D7 data register RO R6 relative offset register software register refer to OF command PC program counter SR status register in the MC68000 SS supervisor stack pointer US user stack pointer See also DF OF EXAMPLE COMMENT 600MON x x gt 5010 Set program counter 600 gt 7 5300 Set address register seven 600MON x x gt R5 5500 Set relative offset register five 600MON gt DF is the Display Formatted Registers command see Section 4 6 9 PC 00005010 SR FFFF TS7XNZVC US 00001000 55 00005300 0 00000000 D1 0000D1D1 D2 0000D2D2 D3 00D3D3D3 D4 D4D4D4D4 D5 000000D5 D6 00000000 D7 000000D7 0 000100 0 AI 001000A1 A2 0000A2A2 A3 000000A3 4 000100 4 5 00145555 6 000000 6 A7 00005300 lt 0
74. t hex digits count BR MD T A value expressed in up to eight hex digits text DU An ASCII string of up to the length of the command line buffer less CR character and preceding command line characters 4 9 601 Manual December 1986 45 COMMAND VERIFICATION As an aid to the user 600MON displays for most commands its interpretation of the values entered as expression and address parameters The results are displayed in a physical format For example if 000 had been typed in the parameter field of a command requiring that the contents of offset register RO 1000 say be added then the resulting display would be 0000 000 for that address parameter Some checking of the validity of entered commands is also done For example specifying an address parameter which would result in an error causes the message ADDRESS 00000000 to be displayed on the terminal connected to the serial port A table of 600MON error messages is provided in Appendix C 4 10 601 Manual December 1986 46 COMMAND This section describes the command line syntax and provides one or more examples for each command the 600MON command set Table 4 2 lists 600MON command mnemonics Table 4 2 600MON Commands COMMAND DESCRIPTION BF address1 address2 pattern Block fill memory BI lt addressl gt lt address2 gt Block initialize memory BM lt addressl gt lt address2 gt lt address3 gt Bl
75. the 68681 DUART In order to demonstrate the correct initialization sequence for the 68681 DUART a sample initialization routine with comments has been incorporated in this chapter For a complete explanation on how to program and maximize the functionality of the 68681 DUART refer to the accompanying 68681 Manual 32 THE XVME 601 PROCESSOR MODULE MEMORY Figure 3 1 shows the 601 Module memory map as it would appear with the factory configuration 3 1 601 Manual December 1986 FFFFFFH FF0000H FE0000H 128 0000 15 25 80000 OM 000000H Figure 3 1 XVME 601 Processor Module Memory Map 601 Manual December 1986 When the CPU starts running reset the first four bus cycles will be read to acquire the initial Supervisor Stack Pointer SSP and Program Counter Hardware will map these four bus cycles into address FC0000H for the SSP and address FC0004 for the PC This conven tion allows the exception vectors to reside in DRAM The area from FC0000H to FDFFFFH is dedicated for the optional installation of 2 ROM devices XYCOM s 600MON EPROMs for example If the ROM devices installed do not fully occupy the entire 128K of address space mapped out then the remaining space will contain shadow images of the occupied area ROM must be installed at U29 and U30 due to SSP and PC acquisition during power up The area from FE0000H to
76. the registers have no effect on the entered address Unless another offset is entered each command that expects an address parameter automatically adds offset RO to the entered address For example if RO 100 the following commands are the same BR 10 10 4 100 RO is added by default BR 10 RO 10 100 BR 110 R7 110 0 R7 is always zero BR 15 the Breakpoint Set command see Table 2 Note the physical address for each of these commands is 110 Offset RO is automatically added to the offset registers any time they are modified The only exception is of course when another offset register is specifically added See Table 4 1 for examples Table 4 1 Offset Examples RO 0 0 0 R1 8 0 8 Offset RO is zero is set to 8 RO 100 0 100 Offset RO added 200 RO 200 100 300 Offset RO added 100 RI R3 100 8 108 Offset R0 not added 0 R7 RO 0 0 0 RO set to zero 4 8 601 Manual December 1986 4 4 4 Data Parameters A parameter field containing an address parameter 15 always followed by data field Data field entries take one of the following forms DATA USED WITH DESCRIPTION lt pattern gt BF A binary pattern expressed in up to four hex digits lt data gt MS l An ASCII string of up to the length of the command line buffer less CR character and preceding command line characters 2 A value expressed in up to eigh
77. tware controlled bus release BTO 16 32 64 128 STAT IDCD IACK Daisy Chain driver SYSCLK and SYSRESET driver Monitors SYSFAIL ACFAIL and BCLR SINGLE 3U Form Factor 1 8 601 Manual December 1986 Chapter 2 601 INSTALLATION 21 INTRODUCTION This chapter provides the information needed to configure and install the XVME 601 Processor Module 22 LOCATION OF COMPONENTS RELEVANT TO INSTALLATION The jumpers PROM sockets and connectors on the XVME 601 Processor Module are illustrated in Figure 2 1 2 1 601 Manual December 1986 Figure 2 1 Location of Jumpers Sockets and Connectors 2 2 601 Manual December 1986 23 JUMPERS Prior to installing the 601 Processor Module it will be necessary 0 configure several jumper options The configuration of the jumpers is dependant upon which of the module capabilities are required for a given application and the type of PROM used for local memory The following table shows a list of the jumpers and a brief description of their use Table 2 1 Jumper List X VME 601 Jumpers This jumper is used to enable disable the reset switch on the front panel of the module J3 14 J5 76 J7 These jumpers are used to enable disable the system and J17 resource functions J2 J8 These jumpers are configured to match the type and size of EPROM which is installed on the XVME 601 J9 10 11 12 13 14 15 These jumpers are u

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