User Manual - Zilogic Systems
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1. Micro controller Block Diagram HIGH PERFORMANCE 8051 CPU is gt lt gt UART TXD Code Flas T RXD gt an SPICLK cs SPI wos gt MISO SS EA a KN OS P4 0 3 NA cS PRIMARY SCL 0 Aaa I2C BUS SDA 0 X1 CRYSTAL OSCILLATOR SAA SCL 1 K2 I2C BUS SDA 1 5 USB Serial The ZKit 51 has a FT232R USB to serial UART converter The FT232R has the following advanced features e The FT232R is fully compliant with the USB 2 0 specification e Single chip USB to asynchronous serial data transfer interface CEX 0 4 e Entire USB protocol handled on the chip No USB specific firmware programming required e Supports transmit and receive LED drive signals The ZKit 51 uses USB Serial UART for serial communication between PC and the P89V664 MCU This is also used to download firmware by activatiing the bootloader of P89V664 MCU This is called In System Programming ISP 5 1 In System Programming To switch the P89V664 MCU to ISP mode the following sequence has to be followed Zilogic Systems Page 6 ZKit 51 8051 Development Kit User Manual Rev 1 1 1 Apply hardware reset 2 Pull PSEN to ground 3 Release hardware reset 4 Release PSEN The ZKit 51 comes with RESET and PSEN push buttons that can be used to put the MCU into ISP In the ZKit 51 the RESET and PSEN pins are also connected to the handshaking signals DTR and RTS of the USB to serial UART Flash programming applications like Smash and Flash Mag2. 1 1 Figure 2 10 Buzzer Connection Diagram P89V664 MCU P3 4 CEX3 INTR BUZZ DIP Switch Buzzer 10 Debug LEDs The ZKit 51 has two debug LEDs connected to P1 4 and P1 5 through a non inverting buffer By driving P1 4 and P1 5 low the LEDs can be switched On Alternatively the on chip PCA Programmable Counter Array can be used to generate a PWM signal to control the LED brightness Figure 2 11 LEDs Connection Diagram VCC VCC P89V664 MCU P1 4 CEX1 P1 5 CEX2 TAHCT25 74HCT25 11 Keypad The ZKit 51 has 4 tactile push button switches connected to P2 0 to P2 3 The keypad connection details are shown in the following diagram Figure 2 12 Keypad Connection Diagram P89V664 MCU Zilogic Systems Page 9 ZKit 51 8051 Development Kit User Manual Rev 1 1 12 Interrupt Key The ZKit 51 has 1 tactile push button switch for testing interrupts The push button is hardware debounced and connected to INTR1 through a On Off dip switch When the switch is Off INTR1 is available for external usage through PORT P1 P3 header The following diagram shows the interrupt key connection details Figure 2 13 Interrupt Key Connection Diagram P89V664 MCU 0 INTRKEY P3 3 INTR1 INTR BUZZ DIP Switch Zilogic Systems Page 10 ZKit 51 8051 Development Kit User Manual Rev 1 1 Chapter 3 Jumpers and Switches 1 EXTPWR USBPWR Jumper The board can be powered from USB or an
3. PCF8563 RTC to keep track of current date and time The PCF8563 is a CMOS real time clock calendar optimized for low power consumption A programmable interrupt output and voltage low detector are also provided All addresses and data are transferred serially via a two line bidirectional PC bus The maximum bus speed is 400 kbit s The PC RTC is connected to the primary on chip PC controller of the P89V664 MCU The RTC interrupt is connected to INTO through an On Off dip switch When the switch is in Off position INTO is available for external usage through the PORT P1 P3 header The following diagram shows the RTC pin connection details Figure 2 9 RTC Connection Diagram P89V664 MCU P1 7 SDA P1 6 SCL INTR BUZZ DIP Switch 32 768 KHz 9 Piezoelectric Buzzer The ZKit 51 has a piezoeletric buzzer that can be used to provide audible indications The buzzer is connected to P 3 4 pin By rapidly switching the pin a tone can be generated on the buzzer Alternatively the on chip PCA Programmable Counter Array can be used to generate a pulse train to the buzzer Using PWM techniques both volume and tone can be controlled The buzzer is connected to P3 4 pin through a On Off dip switch When the switch is in Off position P3 4 is available for external usage through PORT P1 P3 header The following diagram shows the buzzer connection details Zilogic Systems Page 8 ZKit 51 8051 Development Kit User Manual Rev
4. external power source To select the required power source the jumper has to set as specified below USB power To power the board through USB the jumper should be on the USBPWR pin and the center pin External power For external 5V power source the jumper should be on the EXTPWR pin and the center pin Table 3 1 EXTPWR USBPWR Jumper Pins Pin Description USBPWR USB Power 5V Center To board Vcc EXTPWR External Power 5V 2 INTR BUZZ Dip Switch The INTR BUZZ dip switch is used to select the routing between external connector and on board devices to the micro controller The routing details are given in the following table Switch State Description 1 ON CEX3 P3 4 pin is connected to buzzer OFF CEX3 P3 4 pin is disconnected from buzzer 2 ON INTO is connected to RTC interrupt OFF INTO is available for external usage 3 ON INT1 is connected to INTR key OFF INT1 is available for external usage 4 ON T2EX is driven by EXTIO header OFF T2EX is disconnected from EXTIO header 3 USBSIO Dip Switch The serial interface of the micro controller can be used for 1 Flash programming through USB 2 Serial communication to PC through USB 3 Serial communication to devices through SIO To select the required functionality the USBSTO dip switch has to configured as specified below Flash Programming For flash programming through USB port switches 1 2 3 and 4 should be in ON state USB Serial Communication For serial communication thro
5. ZKit 51 8051 Development Kit User Manual 1 1 June 2011 ZILOGIC SYSTEMS ZKit 51 8051 Development Kit User Manual Rev 1 1 This work is licensed under the Creative Commons Attribution Share Alike 2 5 India License To view a copy of this license visit http creativecommons org licenses by sa 2 5 in or send a letter to Creative Commons 171 Second Street Suite 300 San Francisco California 94105 USA ZKit 51 8051 Development Kit User Manual Rev 1 1 Table of Contents Te UA AAA 1 le POIS rienda 1 Zi DOAK D DE 10 A sndinss ramen ysiotsthixeonnaie por adinsesamedndstandinmnaance e 2 PP A o vacua Des de sence 2 2 Locating O eos 1 Eee IIIA 2 Os POWER SUP aaa 4 A e CR Eo 5 SSSR WA da 6 D ee o Oo III 7 FS ee ad ee oe E tt its 7 in TE RG Wa 8 Oe FICZOCICCING UZ ZOPE 2 do 2e ee de oo Oued on 8 10 CDG EDS PE OU O E 9 Wes FSV IOC Aa 9 124 OA TREY AA 10 d Jampe S and SMIC ES ro eii 11 h EXTEN SOP WR JUDE III 11 2 INTE BUZZ DIVA debas 11 9 USBSTO DIO OWICA ems eee toe etree a a acelontosunebuceencanaceaehens 11 A ES Ia ONS CLO aa 12 oo PE lo WIKI 12 RO DLL RE aa 12 Ss PONT PO 24 Header IIIA 12 4 PROente TAMAA EXTTO dida 13 9 Phoen EMMA PUE A ee de nee aa 13 Zilogic Systems Page iii ZKit 51 8051 Development Kit User Manual Rev 1 1 Chapter 1 Introduction ZKit 51 is a 8051 micro controller development kit from Zilogic Systems ZKit 51 is designed for a easy usage rapid prototyping
6. and extensive product design 1 Features The ZKit 51 offers the following features e NXP P89V664 micro controller with 64KB Flash and 1KB RAM e 18 432MHz crystal e Power supply jumper selectable between USB External 5V supply e On board Peripherals 16x2 character LCD with backlight USB serial interface for communication and program download 2Kbit SPI EEPROM 12C RTC with battery backup Piezoelectric buzzer Four button keypad Push button with hardware de bounce interrupt input 2 debug LEDs e Connectors USB type B connector 2 1mm power supply connector 20 pin header for PO P4 20 pin header for P1 P3 10 pin header for serial communication 12C 2 pin header for powering external devices 4 pin header for external I O Zilogic Systems Page 1 ZKit 51 8051 Development Kit User Manual Chapter 2 Board Design 1 Overview Rev 1 1 A bird s eye view of the devices available on the board is shown in the following block diagram Each device connectivity is described in detail in the following sections Figure 2 1 Block Diagram EXTIO 4 Pin Port PO P4 Port P1 P3 20 Pin 20 Pin Header Header Header SPI Bus EEPROM lt gt Keypad 8051 Micro controller INT Push Button 12C Bus PWM Serial Bus SIO I2C 10 Pin Header USB to Serial 2 Locating Components Buzzer LEDs 3 USB Connector The location of the
7. components on the board are indicated in the following diagrams Zilogic Systems Page 2 ZKit 51 8051 Development Kit User Manual Rev 1 1 Figure 2 2 Front View EXTIO PWR Phoenix Terminal Phoenix Terminal SIO I2C 10 Pin Header LCD lilogic Systems INDIA Port po pa Ifaa E Es T 20 Pin Header ON ca ik JI 4 A Bee LEDCQNT E pee ee PE sr i oes iji sal hii CENZLEDL TX RX AT ASE je RLM a CENTS Power Jack shall ef Ag Ele jE EXT 5V 500mA Port P1 P3 wae ae free INS 20 Pin Header USB m Connector ARE EL USBSIO 0 LIT EXTPWR USBPWR EY2 KEYS KEYA INTR Jumper Interrupt Key INTR BUZZ USBSIO Switch Switch Zilogic Systems Page 3 ZKit 51 8051 Development Kit User Manual Rev 1 1 Figure 2 3 Back View RTC Battery INTL IS SCONNECTCD TO KEO OINTR INTI CIS AVAILABLE FOR EXT USAGE T2EX Is DR IYEN Cay EXT_FRED INPUT tu 3 Power Supply The ZKit 51 can be powered through USB or an external 5V regulated power supply The power source can be selected through USBPWR EXTPWR jumper setting Figure 2 4 Power Supply Connection Diagram USB Connector USBPWR EXTPWR Power A to Board EXT 5V 500mA O E O Caution The external power supply if used should be a 5V 500mA regulated power supply with the polarity shown in the power supply connection diagram Zilogic Systems Page 4 ZKit 51 8051 Develop
8. face signals and power supply Add on boards with different functionalities can be connected through this header to the ZKit 51 Zilogic Systems Page 12 ZKit 51 8051 Development Kit User Manual Rev 1 1 20 0 60 80 100 120 140 160 180 200 10 30 50 70 090110 130 150 170 190 Table 4 3 PORT PO P4 Header Pin Signal Pin 4 Signal 1 VES 2 PO O ADO 3 PO 1 AD1 4 P0 2 AD2 5 P0 37ADS 6 PO 4 AD4 7 PO 5 AD5 8 PO 6 AD6 9 PO 7 AD7 10 P4 0 SCK SCI 11 P4 1 MISO SDA 12 P4 2 MOSI 13 P4 3 SS 14 SCL 15 SDA 16 WR P3 6 17 RD P27 18 ALE 19 INT1 P3 3 20 GND 4 Phoenix Terminal EXTIO The Phoenix Terminal EXTIO is terminated with signals useful for external event couting and frequency measurement Table 4 4 Phoenix Terminal EXTIO Pin Signal 1 VCC 2 EXINTR Active High 3 EX FREQ IN 4 GND 5 Phoenix Terminal PWR The Phoenix Terminal PWR is a power for logic probes used for debugging Table 4 5 Phoenix Terminal PWR Pin Signal 1 VCC 2 GND Zilogic Systems Page 13
9. ic can utilize this feature to switch the device into ISP mode automatically without user intervention The following diagram shows the FT232R connection details Figure 2 6 FT232R Connection Diagram P89V664 MCU ON USB RXD Connector TXD 2 E PSEN 13 RESET USBSIO DIP Switch 6 LCD Display The ZKit 51 has a HD44780 Hitachi chipset compatible 16x2 character LCD The LCD data lines are connected to Port 0 and the control lines RS R W EN are connected to P2 4 P2 5 P2 6 respectively The following diagram shows the LCD pin connection details Figure 2 7 LCD Connection Diagram LCD P89V664 MCU PO DBO DB7 VCC Contrast Adjustment POT 7 SPI EEPROM The ZKit 51 has a Microchip 255AA020A EEPROM for data storage The Microchip 25AAO20A is a 2 Kbit Serial EEPROM The memory is accessed via a simple Serial Peripheral Interface SPI compatible Zilogic Systems Page 7 ZKit 51 8051 Development Kit User Manual Rev 1 1 serial bus The bus signals required are a clock input SCK plus separate data in Sl and data out SO lines Access to the device is controlled through a Chip Select CS input The SPI EEPROM is connected to the on chip SPI controller of the P89V664 MCU The following diagram shows the EEPROM pin connection details Figure 2 8 SPI EEPROM Connection Diagram EPROM P89V664 MCU SCK P4 0 MISO P4 1 MOSI P4 2 P2 7 8 RC RTC The ZKit 51 has an battery backed NXP
10. ment Kit User Manual Rev 1 1 4 CPU The heart of the ZKit 51 is Philips P89v664 micro controller The P89v664 is an 8 bit 80C51 5V low power micro controller with 64 kB Flash 2KB of data RAM and supports In System Programming ISP The main features of the micro controller are listed below e Dual 100 kHz byte wide C bus interfaces e 0 MHz to 40 MHz operating frequency in 12x mode 20 MHz in 6x mode e 64 kB of on chip flash user code memory with ISP and IAP e 2kB RAM e SPI Serial Peripheral Interface and enhanced UART e PCA Programmable Counter Array with PWM and Capture Compare functions e Three 16 bit timers counters e Four 8 bit I O ports one 4 bit I O port e WatchDog Timer WDT e Support for 12 clock default or 6 clock mode selection via ISP e Low EMI mode ALE inhibit e Power down mode with external interrupt wake up The micro controller crystal frequency is 18 432 MHz 8051 based processors generate their serial port timing using a combination of external crystal and internal programmable divider chains This crystal frequency has been selected in order to ensure the following 1 the timing requirements of the controller s serial interface are met 2 the CPU runs at high speed in 6 clock mode Power to the board is sourced either from the 5V external regulated power supply or the via USB power with the help of jumper selection Zilogic Systems Page 5 ZKit 51 8051 Development Kit User Manual Rev 1 1 Figure 2 5
11. ugh USB port switches 1 2 should be in ON state and 3 4 should be in OFF state SIO Serial Communication For serial communication through the SIO connector switches 1 2 3 and 4 should be in OFF state Zilogic Systems Page 11 ZKit 51 8051 Development Kit User Manual Rev 1 1 Chapter 4 External Connectors 1 S10 12C Header The S10 12C header is terminated with serial communication signals FC signals and power supply Add on boards with different functionalities can be connected through this header to the ZKit 51 20 40 6 O 8 O 100 10 3037070 20 Table 4 1 S10 12C Header Pin Signal Pin Signal 1 VCC 2 P3 0 RXD 3 P3 1 TXD 4 PL 6 7 SCli 5 P1 7 SDA 6 Pi 0 T2 7 P1 1 T2EX P1 5 CEX0 9 P3 2 INTRO 10 GND 2 PORT P1 P3 Header The PORT P1 P3 header is terminated with port P1 and P3 signals along with power supply Add on boards with different functionalities can be connected through this header to the ZKit 51 20 40 60 80 100 120 140 160 180 200 10 30 50 70 090110 130 150 170 190 Table 4 2 PORT P1 P3 Header Pin 4 Signal Pin 4 Signal 1 VCC 2 PL ONA 3 Pl 1 T2EK 4 MCL PLZ 5 CEX0 P1 3 6 CEX1 P1 4 7 CEX2 Plas 8 SCL P1 6 9 SDA P1 7 10 RXD P30 11 TXD P3 1 12 INTO Poea 13 INT 1 345 14 CEX3 10 P 344 15 CEX4 T1 P3 5 16 WR P3 6 17 RD P3 7 18 PSEN 19 RESET 20 GND 3 PORT P0 P4 Header The PORT P0 P4 header is terminated with port PO signals port P4 signals I C signals external memory inter
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