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2. LAM BUS D23 D22 D21 D3 D2 D1 LAM Status CAMAC Bus N24 N23 N22 N4 N3 N2 INI bits D28 D31 as described in 3 8 3 13 LED Status 29 0 Read Lword This function can be used to read back the information of the optional dataway display no dataway display is installed the function can be used to determine the CAMAC data and status signals of the last dataway operation The LED24 LED1 bits correspond to the write W or read data of the last CAMAC cycle Data D24 D29 used for CC32 functional tests Data D23 D22 D21 D3 D2 LED Status LED LED LED22 LED3 LED LED LED 24 23 3 2 1 Data D31 D30 D29 028 027 226 D25 D24 LED Status Q X Inhibit LAM FF Z November 00 14 00479 A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 3 14 3 15 CAMAC Cycle Tune Register N30 A2 Fx Register C for station N24 N17 Write Read Word N30 A1 Fx Register B for station N16 N9 Write Read Word N30 A0 Fx Register A for station N8 N1 Write Read Word For optimized timing it is possible to adjust the CAMAC cycle time time between begin of BUSY active to negative edge of S1 strobe signal for each individual CAMAC station Possible values are 200ns 300ns and 400ns default In addition the width of the S1 and S2 strobe signals can be
3. 3 Remove the computer outside cover and locate a free slot 4 Carefully slide the PCIADA card into the PCI slot After the card is firmly in secure it s fastening tab to the PC chassis with a screw 5 Replace the PC cover and power cord 6 Switch off the CAMAC crate and remove the power cord Plug in the CC32 on the far right slots normally slot 24 amp 25 and secure it with the front panel screw 7 Attach one end of the 50 pin cable to the CC32 connector and the other side to the PCIADA card 8 Switch on the CAMAC crate and the PC The Plug and Play Bios should automatically recognize the card 9 Install the PCIADA CC32 driver from the attached CD ROM as described within the driver manual for your operating system 10 To work with DOS based programs accessing the PCI CAMAC system add or modify the EMM386 EXE line in the CONGIG SYS shown on the CD ROM DOS PASCAL Readme txt 11 Test the installation with the software delivered on CD ROM November 00 3 00479 1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 1 5 Crate number Using more than one PCIADA cards in one PC to control multiple CAMAC crates requires to differ between the connected CC32 controllers For this purpose a crate number can be defined by jumper setting on the CC32 board Please see the location of the jumper array on the component scheme see 3 17 Attention If using multiple CC32 controllers with
4. 5 8 gt ne zo I x ers Ne 52 lt 2 E E ce 8 36 ires i es 1 199S192 a 2 8 5 son gozn zozn Zo 18 a a 5 EX 5 g 8 Zn gt 858 u 5 z s z s 8 8 R u 5 5 B dof 99612 9 lad 99612 9 12 gon 100 9021 sozn 7070 von coin zon 18 38 7255 Been 82 5 5 555 geert cece 58529 22 duc 8 5 3 5 ose e 3 358 2585 2055 2295 e258 252 2222 ziii 2292 Fees 2 iii 40 2 November 00 18 00479 1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 3 19 2 data way connector pin assignment CC32 pin assignment Normal Station Contol Station I B 1 5 7 0 1 8 9 0 1 2 3 4 5 6 18 WB 19 wi Fi A8 4 2 1 Al 2 1 1 1 1 1 1 1 1 W9 2 W7 2 WS 2 W3 2 WI 2 R23 2 W WwW OE 2 W 23 w 2 W 25 R3 26 November 00 19 00479 A1
5. 7 5 4 A2 Al AO CAMAC Function bit 16 4 2 FA 22 Fl 3 3 2 calculation The F16 bit is automatically defined by the kind of operation i e it is not considered in the NAF code calculation WRITE to CC32 defines automatically F16 1 READ from CC32 defines automatically F16 0 The different address offsets for N A and F into the 32 Kbytes memory window can be calculated as shown below Pascal shl 10 A shl 6 F AND 0 shl 2 C C define MAKE CC32 OFFSET N A F N lt lt 10 A lt lt 6 F amp 0xf lt lt 2 November 00 10 00479 A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH To reduce the time required by the software for coding the NAF address it can be helpful to define constants for these values in the user program This can increase the data rates Further it is recommended to set the F16 bit to 0 before calculating the address as shown above to avoid an overlap with the Al bit 34 2 Address map The 32 Kbytes memory window can be accessed only by word and long word calls byte calls are not processed and answered by the CC32 They are terminated by a TIME OUT signal from the PCIADA card All word and long word calls are accepted by the CC32 Please note in case of a long word Lword access to an address specified fo
6. 00 9 00479 A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 32 2 Normal Station To allow an easy test of the controller and PCIADA to CC32 connection the following test functions are implemented in the CC32 Normal Station The station number Nn corresponds to the left one of the two CAMAC slots occupied by the CAMAC controller As given in 1 4 2 the CC32 has to be plugged in into the most right slots of the CAMAC crate normally slot 24 and 25 Nn CC32 Control Station 1 Write Nn A0 F16 data lt gt 5 generate Q and X Nn A0 F16 data 5 generate X and LAM LAM 200ns active Nn Al F16 data 0 15 load test counter generate Q and X Read Nn A0 FO data 0 generate Q and X Read in Fast CAMAC Level 1 mode Nn A1 F5 data 0 decrement test counter generate X and Q only if test counter content gt 0 3 3 NAF Commands Addressing A 32 Kbytes memory window is used to access the CC32 and to perform CAMAC operations This 32 Kbytes area is mapped into the PCI address space The position e g Basic address within the PCI address space is dynamically allocated For CAMAC commands the N A and numbers are coded into the Address bits 4 4 2 Thus these bits have to be understood as NAF bits Also local calls are performed as NAF commands Only word and long word accesses are possible to the CC32 see 3 4 331 NAF bit coding 32K address CC32 A14 13 AI2 AII AIO 9 8
7. 1001 20 100 C21 E 7 100n 8 5 5 E CI 7 a _ Q 17 e wo 3 az 5 32 spose 55 55 59 Smile n 5 5 C16 b E 5 a 22 2 7 100n C23 EI 100n C24 EE 1000 gt z 3 3 92027 7 5 5 3 5 U301 iine 1204 10k 3 or ISPLSI 1024 60LJ 25 2 SS 8 l 3 0201 a 2 5 25 5 PCI9050 r e 5 3 a 2 C13 x R20 LAYER 1 2 1202 _ 0301 icu R203 93cs4681 CT2 J201 33MHz 10u 16V 10u 16V 480 not used 13 24 100n November 00 8 00479 A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 3 CC32 CONTROLLER 31 Special Features 3 1 1 FASTCAMAC basic Level 1 The CC32 CAMAC crate controller supports the FAST CAMAC see DOE SC 0002 BASIC level 1 using multiple S1 strobes to increase the data transfer speed theoretical max 7 5Mbytes s As defined within the FAST CAMAC specification the function code F 5 is used to read data from a module supporting this mode Getting the first data set in this mode the controller continues automatically to read the following one to have it available without any delay for the next data request from the computer Thus it is possible to read data with the maximum transfer rate between CC32 and PCIADA which saves about 400ns per read cycle This FAST CAMAC level 1 read via F 5 15 stopped 1f t
8. A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 1 3 Front Panel Q 1 Power Acknowledge Local Acces X Acknowledge stredched to Clear Cycle Initialise Cycle Camac Acces Inhibit LAM Flip Flop Sans Station Number zzzzz S Sub Addres gt gt gt gt M Funktion Connector to PCIADA or VC32 VMEADA Camac Data November 00 2 00479 A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 1 4 1 4 1 1 4 2 Installation PCIADA and CC32 ATTENTION Observe precautions for handling Electrostatic device Handle only at static safe work stations Do not touch electronic components or wiring e The CAMAC crate as well as the used PC have to be on the same electric potential Different potentials can result in unexpected currents between the CC32 and PCIADA which can destroy the units not plug the CC32 into a CAMAC crate under power Switch off the CAMAC crate first before inserting or removing any CAMAC module For safety reasons the crate should be disconnected from AC mains Do not plug in the PCIADA into a PC under power First switch off the computer and disconnect from AC mains Installation 1 Check the CC32 jumpers and set them according to the required functionality see 1 5 Crate number There are no user definable settings on the PCIADA card 2 Turn off the PC and any peripheral equipment Remove the power cable
9. 0 2 W November 00 16 00479 A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 3 17 Component location CC32 Control Station ESI aO E 8 8 5 1004 vOZNCOZH SHY 8018 1018 01 a 22222 800850042008 1028 THY 6013 9018 SOY ZON 1015 Rb 0203 b 0201 P 0107
10. 00479 A1 Table of contents November 00 iii 00479 A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 1 PCI CAMAC SYSTEM General description With the help of the PCI CAMAC system which consists of CAMAC crate controller CC32 and the PCI card PCIADA users of the CAMAC bus profit of the technical success which takes place in the PC development For a fast and efficient CAMAC control and data read out the system supports 16 bit and 32 bit wide data transfers A huge variety of software is available for a PC In parallel it s performance was constantly improved Modern operating systems were developed which turn the PC into a powerful workstation On the other hand the number of UNIX workstations which are equipped with PCI increases strongly The PCI CAMAC system can be used in this environment too Drivers and programming tools for PCI CAMAC are provided for different operating systems and programming languages Drivers for Windows 95 98 and Windows NT offers an easy access to CAMAC data way For C and Turbo Pascal users the Pascal and C libraries provide easy routines to operate CAMAC modules Working with the LINUX driver all advantages of UNIX multi user and multi tasking operating system can be used for CAMAC operations The PCIADA interface card supports 16 and 32 bit PCI bus slave access I
11. 2 enable 1 enable 0 disable source PCIADA Local Interrupt 2 polarity 1 active high 0 active low lys 0 Local Interrupt 2 status 1 active 0 not active 6 PCI Interrupt enable enable 0 disable source global yes yes 0 7 Software Interrupt 1 generate Interrupt ys O _____ November 00 6 00479 A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 2 4 2 User Register Reset Interrupt USERI O2 The User I O Register CNTRL is divided into two parts which are summarized in the following The register USER 1 02 1 locks CC32 during boot time to prevent any access of the Operating System 2 resets interrupt 2 if it is deleted USER Register USER I O3 monitors the status of the CAMAC crate and the cable connection i e it shows the switched on CAMAC crate and the proper cable connection CNTRL LCR Baseadr 0x50 by word access yte RD WR after Init do not modify 000100 b 6 USER 1 02 Type musalwaysbeO ws yes 7 USER 1 02 Direction must always be 1 output 7 yes yes 8 USER 1 02 output 0 disable access to CC32 1 enableaccess yes yes 09 USER 1 03 Type must alwaysbe0 dys yes USER I O3 Direction must always be 0 input 11 USER 1 03 Input 0 CC32 failed 1 CC32 OK yes 0 15 12 do not modify 0100 b Write 0x4184 for enable access to CC32 Write 0 4084 for disable access to CC32 2
12. 5 Access Timeout An Access Timeout is implemented in the PCIADA interface which is currently set to about 35 us Reaching this time out the current transaction will be terminated and an INTERRUPT 2 initiated If the CC32 is switched off or disconnected the same INTERRUPT 2 is activated 2 6 Interrupts The PCI CAMAC system can generate interrupts on the PC caused by two different interrupt sources PCIADA can activate a Timeout Interrupt which should be routed via software to the interrupt vector number 1 All CC32 generated interrupts should be routed via software to the interrupt vector number 2 CCS ip LANE November 00 7 00479 A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 27 Power Consumption 2 5W 2 8 PCIADA Layout PCIADA Ver 1 1 ARW 12 DEC 98 e S301 20 20 302 S401 402 E 100n C301 S 12 DS36C200H S s ans 2 3 5 23 58 T SHEEL 39 5 9 52 52 C18 x e 18112 Ea
13. C32 controller which can yield in an interrupt on the PCIADA card Data D23 D22 D21 D3 D2 DI DO Enable LAM from Station N24 23 N22 N4 IN NI The negative edge of the LAM signal arriving from any station is only transmitted to the LAM Flip Flop if the corresponding LAM Mask bit is active 1 LAM FF stays on the active level until a reset command 28 0 16 occurs The following status bits can be used to get a more detailed information about the LAM conditions 028 1 LAM BUS OR if at least one LAM is pending D29 1 LAM NOT OR if at least one LAM is pending from disabled stations LAM Maskbit 0 D30 1 LAM AND OR if at least one LAM is pending from enabled stations LAM Maskbit 1 D31 1 LAM Flip Flop if LAM request 00479 A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 3 10 LAM AND Status N28 A2 Fx Read Lword Dxx 1 if LAM active and LAM Maskbit 1 Data D23 D22 1021 105 2 D1 LAM status amp LMASK N24 23 N22 N4 3 2 NI bits D28 D31 as described in 3 8 3 11 LAM NOT Status N28 A3 Fx Read Lword Dxx 1 if LAM active and LAM Maskbit 0 Data D23 D22 D21 D3 D2 LAM Status amp not N24 3 N22 N4 3 2 INI bits D28 D31 as described in 3 8 3 12 LAM BUS Status N28 A4 Fx Read Lword Dxx 1 if LAM active
14. P 005 5 wos P 55858 E S Hs Ji 02 2 lt a eo z 5 Sp 0204 86 0202 86 uns 56 0106 55 1104 U102 nz 9028 su 9059 85 toen ee nz 1028 2 3 su 1069 5 8 5 WZ 8068 oer 8059 zoer T 5 3 coer z son d Hr 5 5 6053 Ea ASS u 23 oo 6059 ES 5 epres ao 00000 99 002 gt 2 3 8 t Tor 21 7 258 5 2 5 g 5 I oF 5 e 8 3 3 gi 2 m lt x l 3 1 5 5 a 20 5 23 5 8 5 5 gt 10 129 30 g 1 1795 99519 99519 Ic 9061 Jmn 4097 2 m MI 1 950 9095791 99519 6995194 corn I osn Joo Jos 2 e zenreoer Bs 28 5 ow Sa o CEAN DON Nm FN on 106938 ge Z S 2 2 52 Z 52 52 gt gt 52 Q G C G S 5 iii 380193NNO9 November 00 17 00479 1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 3 18 Component location CC32 Normal Station Meo Boston ANNAL LT 86000885 1 ale BE
15. al LAM MASK N28 A0 Fx Word FF reset LAM FF Status D15 D00 xx D00 1 LAM FF set D00 0 LAM FF not set 15 01 0 November 00 11 00479 A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 3 5 D31 D00 xx D01 INHIBIT Dataway 0 D15 D02 0 N26 A0 Fx Lword Broadcast MASK Broadcast MASK D23 D00 gt gt BMASK24 BMASKI D23 D00 lt lt BMASK24 BMASKI D24 D31 lt lt 0 N25 Ax Fx Lword Broadcast WR allN amp BMASKn Bl 3 EUR M N1 24 Ax Fx Lword CAMAC DATAWAY WRITE 1 CAMAC DATAWAY READ 1 N27 A0 Fx Word INHIBIT on INHIBIT Status 27 1 INHIBIT off D00 INHIBIT on 1 D23 D00 gt gt W24 W1 3 D23 D00 lt lt R23 R00 29 024 0 D31 D30 1 24 Word CAMAC DATAWAY WRITE 1 CAMAC DATAWAY READ vl NO A0 Fx Word CC32 STATUS NO A1 Fx Z 2 D03 D00 lt lt Q X INH LAM FF NO A2 Fx CAMAC C INHIBIT off 2 DO7 D04 lt lt Modul Number N0 A3 Fx CAMAC 7 INHIBIT on 2 D11 D08 lt lt FPGA Revision D15 D00 xx D15 D12 lt lt Modul Type 1000b Standard Access 2 Standard Access without 51 3 no W Data on Dataway when F8 bit is active 4 if test Q or X Status then use Lword Access CC32 Status N0 A0 Fx Read Word This register contains the CC32 configuration and status including the CAMAC status lines Q X I and LAM The module type ide
16. erk f r WIENER A N uklear elektronik Regel Plein amp Baus GmbH PCI CAMAC CC32 Crate Controller with PCI Interface User Manual General Remarks The only purpose of this manual is a description of the product It must not be interpreted a declaration of conformity for this product including the product and software W Ie Ne R revises this product and manual without notice Differences of the description in manual and product are possible W Ie Ne R excludes completely any liability for loss of profits loss of business loss of use or data interrupt of business or for indirect special incidental or consequential damages of any kind even if W Ie Ne R has been advises of the possibility of such damages arising from any defect or error in this manual or product Any use of the product which may influence health of human beings requires the express written permission of W Ie Ne R Products mentioned in this manual are mentioned for identification purposes only Product names appearing in this manual may or may not be registered trademarks or copyrights of their respective companies No part of this product including the product and the software may be reproduced transmitted transcribed stored in a retrieval system or translated into any language in any form by any means with the express written permission of W Ie Ne R CC32 VMEMM PCIADA and VC32 VMEADA are designed by ARW Elektronik Germany November 00 11
17. he Q response is missing The FAST level 1 cycle can be interrupted by another F command In this case the new command is executed correctly however the data which have been already buffered in the CC32 are lost 3 1 2 CAMAC Cycle Tuning For optimized timing it is possible to adjust the CAMAC cycle time time between begin of BUSY active to S1 for each individual CAMAC station C Station via software Possible values are 200ns 300ns and 400ns default In addition the width of the S1 and S2 strobe signals can be set optionally to 100ns 3 1 3 DATAWAY DISPLAY To extend the functionality of the CC32 crate controller it is equipped with an integrated CAMAC data way display This allows to monitor the activity in the CAMAC crate and is a helpful tool to locate faults in the system The internal data registers data and control bits used for this purpose can be accessed also in CC32 controllers without display The CC32 LED card which is internally plugged onto the CC32 normal station shows the following signals with color LED s e Station number 1 2 N8 and N16 e Sub address Al A2 A4 and 8 e Function F2 FA F8 and F16 e Data 1 24 shared for R1 R24 and W1 W24 e and X response e 2 Clear and Z Initialize e inhibit e Local and CAMAC cycle e LAM Look at me request from station e 6V power line Please note that the N LED is also responding on local CC32 commands November
18. m Vendor ID 0 9050 0x9050 Subsystem Device ID 0 2258 0x1167 November 00 5 00479 A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 2 4 Major LC Registers LCR According to the PCI specification the Base addresses for the LC Register and CC32 memory areas are automatically allocated during booting of the computer They can be obtained via BIOS from the PLX chip Please refer to the software section and the PCI9050 data sheet on the CD ROM see CD ROM PCIADA Chipdocu 9050 1 ds pdf There are no additional registers to be programmed by the user 2 4 4A Interrupt Control Status Register INTERRUPT 1 Interrupt requests initiated by CC32 LAM FF will set INTERRUPT 1 status bit to 1 For this purpose the interrupt request has to be enabled INTERRUPT 2 The INTERRUPT 2 status bit will be activated by local PCIADA events The following sources can cause INTERRUPT 2 1 Access without connection between CC32 and PCIADA no cable connection 2 Access to CAMAC crate which is not switched on CC32 not working 3 CC32 access has not yet been enabled The user bit I O 2 has to be set to enable the access to the CAMAC crate controller INTCSR LCR Baseadr 0x4c word access byte RD WR after Init 0 Local Interrupt 1 enable 1 enable 0 disable source CC32 0 Local Interrupt 1 polarity 1 active high 0 active low Local Interrupt 1 status 1 active 0 not active Local Interrupt
19. ntification bit 12 15 and module number bit 4 7 be used to identify the CC32 CC32 Status word read access only RD WR aem 2 X Repme yes Inn 1 State ofinhibitFlip Flop ys m o O SuteofLAM ipFlp November 00 12 00479 1 User s Manual PCI CAMAC W Ie_Ne R Plein amp Baus GmbH 3 6 3 7 3 8 3 9 November 00 13 CC32 C Z Inhibit LAM FF NO A0 Fx Clear Write Word NO A1 Fx 7 Initialize Write Word N0 A2 Fx C Inhibit off Write Word N0 A3 Fx Z Inhibit on Write Word N27 A0 Fx Inhibit on Write Word N27 A1 Fx Inhibit off Write Word N28 A0 Fx LAM FF reset Write Word Broadcast Mask Register N26 A0 Fx Read Write Lword Allows to enable disable CAMAC stations for broadcast write commands All stations N24 with Broadcast mask bit 1 are enabled Data D23 Broadcast Mask for N24 D22 N23 D21 D3 D2 D1 N22 N4 N3 N2 INI Broadcast CAMAC Write N25 Ax Fx CAMAC Write Cycle Word or Lword Broadcast write command has to be performed with a correct A x F x and W Data CAMAC command Stations N1 N24 are active for this write operation if the corresponding Broadcast Mask bit is 1 LAM Mask Register N28 A1 Fx Read Write Lword stations with station number N with enabled Broadcast Mask bit 1 can generate a LAM FF in the C
20. omputer where the PCIADA is plugged in instructions are given on the enclosed CD ROM at WORKAROUND TXT 2 2 General description and function Attention It is assumed that the PC is equipped with a self configuring PCI BIOS Plug and Play Bios which automatically recognizes the card To guarantee a maximum PCI compatibility and performance the PCIADA is based on the PCI bus target interface Chip PLX9050 produced by PLX Technology which manages the PCI communication At booting time necessary settings are configured by PCI auto setup No jumpers have to be set on the interface card All PCIADA information such as memory and IRQ requirements are stored in an EEPROM Some IDs can be read out from PCR During PCI setup PCIADA calls for three different memory areas 1 54 byte Local Configuration Register LCR of the I O area Different control status register and base addresses are available in the LCR Note Some computer architectures do not provide register mappings in the I O area Please refer to LCR in memory area 2 32 Kbytes of the memory area for direct access to local CC32 address space and transparent CAMAC data way access 2 3 Major PC Register PCR The following ID s are used to identify the connected hardware These values are determined by the PCI Bios and software drivers ID PCIADA Defined value PCIADA Defined value for CC32 for VMEMM ref only Vendor ID 0 10 5 0 10 5 0 0 2258 9050 Subsyste
21. r word only Long word Read from CC32 word address D31 D16 equals to D15 D00 Long word Write to CC32 word address only D15 D00 will be transferred D31 D16 are ignored CC32 commands described following are given within the CAMAC NAF notation This includes internal CC32 commands The gray marked cells in the next table indicate operations to the CAMAC stations via the CAMAC data way All the other described commands are special functions of the CC32 controller WR Function F16 bit 1 RD Function F16 bit 0 N31 A0 Fx CC32 RESET Ae O N30 A2 Fx CYCLE TUNE RegC CYCLE TUNE RegC Word D15 D00 gt gt 24 17 D15 D00 lt lt N24 N17 N30 A1 Fx CYCLE TUNE RegB CYCLE TUNE RegB Word D15 D00 gt gt N16 N9 D15 D00 lt lt 16 9 N30 A0 Fx CYCLE TUNE RegA CYCLE TUNE RegA Word D15 D00 gt gt N8 NI D15 D00 lt lt N8 N1 N29 A0 Fx LED Status D23 D00 lt lt LED24 LEDI D27 D24 lt lt 7 0 D31 D28 lt lt Q X INH LAM FF LAM NOT LAMn amp LMASKn D23 D00 lt lt NOT24 NOTI D31 D24 is equal LAM MASK LAM AND LAMn amp LMASKn N28 A3 Fx 28 2 D23 D00 lt lt AND24 ANDI D31 D24 is equal LAM MASK N28 A1 Fx Lword LAM MASK LAM MASK D23 D00 gt gt LMASK23 LMASKO D23 D00 lt lt LMASK24 LMASKI D31 D24 xx D27 D24 0 D28 LAM BUS OR D29 LAM NOT OR D30 LAM AND OR D31 LAM FF N28 A4 Fx Lword D23 D00 lt lt LAM24 LAMI D31 D24 is equ
22. set optionally to the shorter value of 100ns For each station this is done by defining the 2 bit and registers These registers are in the following named Nx 1 and Nx 0 to consider the station number Nx 1 Nx 0 00 gt 40015 CAMAC Standard Nx 1 Nx 0 01 gt 30005 Nx 1 Nx 0 10 gt 200ns Nx 1 Nx 0 11 gt 200ns 51 and 2 100ns Register map DATA D07 D06 D05 D04 D04 D02 D01 D00 Cycle tune RegC N20 1 N20 0 N19 1 N18 0 N18 1 N18 0 N17 1 N16 0 Cycle tune RegB N12 1 N12 0 N19 1 N11 0 N18 1 N10 0 N9 1 N9 0 Cycle tune RegA N4 1 N4 0 N3 1 N3 0 N2 1 N2 0 NI 1 N1 0 DATA D15 D14 D13 D12 DII D10 D09 D08 Cycle tune RegC N24 1 N24 0 N23 1 N23 0 N22 1 N22 0 N21 1 N21 0 Cycle tune RegB N17 1 16 0 5 1 N15 0 N14 1 N14 0 N13 1 N13 0 Cycle tune RegA N8 1 N8 0 N7 1 N7 0 N6 1 N6 0 N5 1 N5 0 Attention These options do not confirm the CAMAC standard They can be used to improve the data transfer and or the communication with CAMAC modules It has to be tested by the user which CAMAC module can be used for different CAMAC cycle timing CC32 Reset N31 A0 Fx Write Word Resetting the CC32 initializes the following registers e Inhibit FF e LAM FF BROADCAST MASK and LAM MASK REGISTER e CYCLE TUNE REGISTER 3 16 Power consumption November 00 15 00479 A1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 6V 1 7 A 1
23. t provides programmable interrupt generation on PC PCIADA is also compatible to the PCI VME system To link CAMAC systems equipped with the CC32 into a VME based data acquisition a VME slave module VC32 VMEADA is available which can replace the PCIADA in this case 1 4 Summary PCIADA CPCIADA PCI interface based on standard PCI chip PLX9050 produced by PLX Technology support of 8 16 u 32 bit PCI bus slave accesses direct data mapping into the target address area with automatic low big endian conversion use of 32K memory segment below the 1MB limit to be accessible MS DOS applications supports interrupt source from CC32 maskable LAM and local timeout interrupt source differential bus driver and receiver for fast and reliable data transfer 12 Summary CC32 crate controller transparent D16 and D24 032 data way access 32K NAF coding addressing 24 bit programmable LAM mask register LAM interrupt transfer to PCIADA FASTCAMAC Level 1 LED display for 6V CAMAC access local CC32 access INHIBIT and LAM stretched to 5 ms CAMAC data way display for Q X C Z N1 16 A1 8 F1 16 and Datal 24 CAMAC cycle tuning Busy to S1 for each station range 300ns and 200ns S1 S2 100ns Broadcast CAMAC WRITE and broadcast mask register no interference of PC operation due to CAMAC crate on off changes if interrupt disabled November 00 1 00479
24. the same crate number connected to PCIADA cards in one PC it is not possible to differ between the CAMAC controllers and to access them This can result in unexpected effects The actual crate number setting can be determined by software reading the CC32 Status lx x x Crate number for multiple PCI CC32 installations EE r r factory prepared setting crate number 1 I _ jumper is installed jumper is not installed 1 6 Access times and performance Typical access times based on a Pentium 133MHz including reading of program code ____ type WR time us PCI to CC32 internal D16 06 10 PCI to CC32 Dataway 16 1 4 1 2 1 8 1 6 PCI to CC32 Dataway 032 R W24 1 4 1 2 2 0 1 8 PCI to CC32 Dataway FAST LEVELI D32 D24 y u J 15 ny Values brackets are obtained with Cycle Tune bits 11 November 00 4 00479 A 1 User s Manual PCI CAMAC W Ie Ne R Plein amp Baus GmbH 2 PCIADA INTERFACE CARD 2 1 32 Kbytes Address range Attention The version of PCIADA to be used with the controller CC32 is configured to use a 32 Kbytes address area instead of the original 8K for use with VMEMM Thus instead of address bits AO and Al the higher address bits A13 u A14 are transmitted The CAMAC version of PCIADA is labeled with on the EEPROM If necessary it is possible to re program the EEPROM This can be done by the user via the c

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