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1. DO NOT MOVE OR RENAME THIS LINE Listing 13 A possible implementation of the task list jump table file 8051SCH ASM Having checked and if necessary run all possible tasks the whole process starts again Listing 14 SCH Dispatch Tasks end mov clr ric mov A SCH dis mask C A SCH dis mask A Roll run flag mask one place left decrease task index if not zero more tasks to do SCH dis index SCH Dispatch Tasks lp Super loop djnz ajmp Tasks SCH Dispatch Tasks Listing 14 A dispatch loop file 8051SCH ASM For demonstration purposes we include a simple task that will flash an LED connected to an external pin 5096 duty cycle 0 5 Hz tK K K K K OK E OK K K OK K OE OK K OE OK K K K ok K K K OK K K K K K K K OK K K K K K CE K K OE K K K K K K K K K K K K K K K K E KK K K KK KKK KKK Flashes LED on portO pinO on and off tK KK K K OK OK K K K OK K OE K K OE K K K K K K OE OK K K K K K K K OE OK K K K K K K OK K OE K K K K K KK K K K K K K K K K E K K K K KK KKK KKK Function LED Flash Description Pre None Post None TASK1 LED Flash mov A LED Status jz LED on clr LED PORT mov LED Status 00 ajmp SCH_Dispatch_Tasks_end LED_on setb LED PORT mov LED Status 01 ajmp SCH Dispatch Tasks end Is the led on No jump to turn it on Yes turn it off Update the LED status Turn LED on Update the LED status Return from scheduled task Listing 15 Flash LED T
2. Test delay time Current task is ready to be run SCH_Task_ready orl mov mov AJMP SCH_run_f A A R1 RO A SCH Update 1p end SCH Task notready dec RO SCH Update lp end inc inc mov rl mov djnz pop pop pop pop reti RO R1 A SCH_run_mask A SCH_run_mask A SCH index SCH Update _ lp 00h Olh PSW ACC so set run flag and reload delay value Set appropriate run flag Get value being pointed to Store in delay value task period Jump to end of loop Task isn t ready to be run Decrease delay value by one Increase pointer value by one Roll run mask one place to left Decrease index value not zero so more to check Restore registers Return from interrupt t RK K K ok OK OK K K K K K K K OK K K K K K K K K K OK K K K K K K OE OE K K K K K CE K K K K K K K K K K K K K K KK K K K K KK K K KK KKK KKK Task Name Scheduled Task Delay and Reload Values tK KK OK K OK OK OK K K OK K OE OK K OE K K K K K K OE K K K K K K K K K K K K K OK K K K K OE K K K K K K OE K K OE K KK K K K E KK K K KK KKK KKK include task periods inc tK K K K ok OK OK OK K K OK K OE K K OE K K K K K K OE K OK K K K K K K OE OK K K K K K CE OK K OE K K K K K K OE K K OE K K K K K K K K K K K KK KKK KKK Scheduled Tasks tK KK K K OE OE OK K K OK K OE K K OE K K K K K K K K K K K K K K K K OK K K K K K OE K K OE K K K K K K K K K K K K K K K K K KK K K KK KKK KKK include include in
3. A djnz SCH dis index SCH Dispatch Tasks lp decrease task index if not zero more task to do ajmp SCH_Dispatch_Tasks Super loop tK OK K K OK K K K K K OK K K K K K K K K K K K K K K K OK K K K K K K K K K K K K K K K K KOK K K K K K K K K KK KK KK KK KKK KK KKK KKK Scheduler Functions e K OK OK kK CK kK kK OK o OK k o CK kK CK CK o CK 0 o OK kK CK OK o CK o OK OK K CK k OK OK o kK OK o CK kK kK CK o CK k OK OK kK CE CK o OK k KOK KOK KOK OK o kK OK KOK KKK KKK OK tK KK OK K K OK OK K K OK K OE OK K OE K K K K K K OK K K K CK K K K K OE K K K K K K OE OK K K K K K K K K OK K K K K K OE KK KK KK KK KKK KKK KKK Function Description Pre Post SCH Update Services TMR2 overflow interrupt and processes all tasks None None tK KK OK K OK OK OK K K K K OE K K OE K K K K K K K K K K OK OK K K K OE K K K K K K K K K K K K K K K K KE K K K K K K K K KK KK KKK KK KKK K K K Clear Timer 2 interrupt flag Save registers that might be needed Setup loop counter and run flag mask SCH run mask 2z00000001b SCH index ZSCH MAX TASKS A SCH_ delays A SCH_rloads SCH_Update clr TF2 push ACC push PSW push 01h push 00h mov mov mov mov RO A mov mov R1 A SCH_Update_lp A SCH_run_mask RO 0 SCH_Task_notready mov cjne Init value for run flag mask Reset index value to number of tasks Get address of SCH delays Get location of first reload ram location Get run flag mask
4. K K K K K K K K K K K K KK KK KK KKK KKK KKK Listing 20 Port definition file file PORTS INC tK KK K K OK OK K K K K K K K K K K K K K OK K OK K K K K K K K K K K K K K K K K K K K K KOK K K K K KK K K KK KKK KKK KKK KK KKK KKK Description 8051 c515c Assembler scheduler tK KK OK ok OE OK OK K K K K OE K K OE K K K K K K OK K K K CK K K K K OE K K K K K K K OK K K K K K K K K KE K K K K K K K KKK KK KKK K K KKK KKK tK KK K K OE OK K K K K K OE K K OE OK K K K K K OE K K K K K K K K K K K K K K K K K K OE K K K K K K OE K K K K KK K K K K KK KK KK KKK KKK Filename Company Version 1 0 1 1 task_periods inc Author S Key S Key Files required Date 09 12 02 Created 30 05 03 separate files for easy of use Modification tK K K K OK OE OK OK K K K K OE K OK OE K K K K K K OK K K K OK K K K K OE K K K K K K OE K K OE K K OE K K K KE K K K K K K KK KK KK KKK KK KKK KKK tK K K K K OK OK OK K K OK K OE K K OE K OK CE K K K OE K OK K K K K K K K K K K K K K OE K K K K K K K K K OE K K K K KK KK K E KK K K KK KKK KKK Notes This section deals with the periods of all the task start delay and interval between the repeat of the tasks below enter the e KK K K ok OK OK OK K K OK K OE K OK OE K K K K K K OE K K K OK K K K K OE K K K K K K OE K K K K K K K K K K K K K K K CE KKK KKK KKK K K KKK KKK Scheduled Task Delay and Reload
5. K OK CE K K K K K K K K K K K K KK K CK K K K K KKK KKK KK KK KKK i Description 8051 c515c Assembler scheduler tK OK SKK ok OK OK OK K K K K OE K K OE K K K K o K OK K K K OK K K K C OE K K K K K K OE OK K K K K K K K OE K K K K K K CE KK KK KK KK KKK KKK KKK Filename ports inc Company Version Author Date Modification x 1 0 S Key 09 12 02 Created 1 1 S Key 30 05 03 separate files for easy of use DAOODOOOOODEOOOODIOOOOODIEOODEOODEOODEOOIODEOOOODIOOOOODOODEOODEOODEOODOOOOOOOOOOOOOOOOK Files required e K KOK K OK CK DK K K K CE K OK CE K OK CE K CK K K CE K OK CE K OK CE K K CE K CE CK K CE K K CE K CK CE K K CE K CE K K CE K OK CE K CK CE K K K KK KKK K K K K K K K x 2 Notes X This section deals with the port settings I find it easier to give the port a name such as LED PORT Then if you port to a different device you only need to change the port description iH dn this file e K OK OK oK CK KK OK o OK OK o CK kK kK CK o CK k o OK kK kK KOK CK o OK CK KOK OK k kK o CE OK KOK KOK CK KOK OK o CK KOK CK o CK OK KOK KOK OK KOK OK KOK KOK KK KK KK Initialise Ports LED PORT equ P0 0 tK KK OK K OK OK OK K K OK K OE K K OE K K K K K K K K K K OK K K K K OE K K K K K K OE OK K K K K K K K K OK K K KOK K CE KKK KKK KKK K K KKK KKK End of File e RK K K K OE OK OK K K OK K OE OK K OE K K K K OK K K K K K OK K K K K OE K K K K K K K K K K K K K
6. The location of the tasks is given in the task list This is a jump table see Listing 1 This is where the scheduled tasks go list below in order 1 to 8 TASK LIST ajmp TASK1 Jump to Task 1 ajmp TASK2 Jump to Task 2 ajmp TASK3 Jump to Task 3 ajmp TASK4 Jump to Task 4 ajmp TASK5 Jump to Task 5 ajmp TASK6 Jump to Task 6 ajmp TASK7 Jump to Task 7 ajmp TASK8 Jump to Task 8 SCH NO TASK HERE DO NOT MOVE OR RENAME THIS LINE Listing 1 Task list file 8051SCH ASM Each task has its own delay and reload values which are entered directly by the programmer into the appropriate task slot Listing 2 These values are then copied at runtime into RAM memory locations tK KK OK ok OK OE OK K K OK K OE OK OK OE K K K K K K K K OK K K K K K K K K K K K K K OE K K K K K K K K K OE K K OE K KK K K K E KK K K KK KKK KKK Scheduled Task Delay and Reload Values tK KK K ok OK OK OK K K OK K OE CK OK OE K K CE K OK K OE K K OE K K K K K OE OK K K K K K K OK K OE CK K K K K K K K K K K KK K K K E KK K K KK KKK KKK cseg SCH Delay Values db 0x00 Delay value for Task 1 db 0x00 Delay value for Task 2 db 0x00 Delay value for Task 3 db 0x00 Delay value for Task 4 db 0x00 Delay value for Task 5 db 0x00 Delay value for Task 6 db 0x00 Delay value for Task 7 db 0x00 Delay value for Task 8 SCH Reload Values db 0x63 Reload value for Task 1 db 0x00 Reload value for Task 2 db 0x00 Reload value
7. Values e K K OK K OK CK K K CK K CE K OK CE K OK K K CK K K CE K OK CE K OK CE K CK CE K CE CE K CE K OK CE K OK CE K K CE K CE K OK CE K OK CE K K K K K K KKK KKK K K K K K K x cseg SCH Delay Values db db 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 SCH Reload Values db 0x31 0x00 0x00 0x00 0x00 0x00 0x00 0x00 Delay Delay Delay Delay Delay Delay Delay Delay Reload Reload Reload Reload Reload Reload Reload Reload value value value value value value value value value value value value value value value value for for for for for for for for for for for for for for for for Task Task Task Task Task Task Task Task Task Task Task Task Task Task Task Task oo 4 0 U1 4 UJ NJ F2 Oo OQ Ui S UJ NJ H3 tK OK K K K OE OK K K K K K OE OK K OE K K K K K K OK OK K K OK K K K K OE K K K K K K CE OK K K K KOK K K K OK K K K K KK K K K KE KK KK KKK KKK KKK End of File tK OK SKK ok OK OK OK K K K OK OE K K OE K K K K K K OK K K K OK K K K K K CK K K K K K OE OK K K K KOK K K K K K K K K K CE KKK KKK KKK K K KKK KKK Listing 21 Scheduler task period definitions file TASK PERIODS IN tK KK K OK OE OK K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K KOK K K K K K K K K KK KK KK KKK KKK KK KK KKK Scheduled Tasks tK OK K K ok OK OK OK K K K K OE K K OE K K K K K K OK K K K OK K K K K OE K K
8. for Task 3 db 0x00 Reload value for Task 4 db 0x00 Reload value for Task 5 db 0x00 Reload value for Task 6 db 0x00 Reload value for Task 7 db 0x00 Reload value for Task 8 Listing 2 Delay and reload Values file TASK PERIODS INC An initialisation function As with most programs the system requires some initialisation In the case of assembly language programs we are also required to initialise vectors and memory allocations Vectors When an interrupt occurs the CPU finishes the instruction that it is currently processing and jumps to an area of memory known as a vector This vector contains a pointer to the relevant ISR In this case we are considering only one vector linked to the timer overflow When the timer reaches its maximum count and overflows the ISR SCH Update is called tK K K K K OK OK K K K OK K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K KOK K K K K K K K K KK K K KK KK K K K K K K KKK Vectors RAR EEE IE CREA LE ESE EEE LSE EERE EE GE OE EA EE CREE KEREKERE CSEG AT 0x0000 absolute Segment at Address 0 LJMP MAIN reset location jump to start CSEG AT 0x002b interrupt vector There is only one interrupt in this program LJMP SCH Update timer overflow gt update scheduler CSEG AT 0x0043 after all interrupt vectors start of main program Listing 3 Interrupt vectors file VECTORS INC Memory Allocation In assembly language the location of variables use
9. ram comments to the size of the number of tasks SCH MAX TASKS SCH rloads DATA SCH delays SCH MAX TASKS tK KK OK K OE E OK K K OK K OE K OK OE K K OE K K K CE K K K K K K K K OE OK K K K OK K CE K K OE K K K K K K OE K K OE K KK KK K E KK KK KK KKK KKK Listing 4 Memory allocation file MEMORY ALLOCATION INC Device initialisation To ensure correct operation of the scheduler we have to initialise run time variables prepare the system timer and prepare any ports used for IO operations The initialisation of runtime variables consists of copying the task delay and task reload values from non changeable ROM to RAM Listing 5 shows general configuration settings for the device initialise General Initialisation mov SP 0x30 Set Stack Pointer clr SWDT Clear Watchdog timer Listing 5 Initialisation file 8051SCH ASM Timer initialisation The scheduler is driven by timer ticks These are interrupts generated when a timer register overflows Listing 6 shows a possible timer initialisation using Timer 2 in an 8051 device With the timer reload values used here we have a 10 ms period between interrupts Tnitialise timer for scheduler using TMR2 mov T2CON 20x10 mov CCEN Z0x00 The timer preload values mov TH2 PRELOAD10H Pre defined values giving 10ms tick mov CRCH PRELOAD10H mov TL2 PRELOAD10L mov CRCL PRELOAD10L Enable Timer 2 interrupt but not the external one setb ET2 setb
10. 6F877 Microchip C515C Infineon 32 76 46 Table 1 A comparison of the memory requirements for schedulers implemented in assembly language and C for a range of different microcontrollers all figures are approximate In this table the comparison is between an implementation of Co operative scheduler Pont 2001 p 255 implemented in C and the assembly language scheduler described in the present pattern Overall these figures illustrate that the assembly language implementations require around a third or less of the code memory than is required in the C language implementation Savings in code memory are more variable in this table but are still substantial These memory savings particularly code memory reductions translate directly into reduced costs This is illustrated in Figure 2 which shows the cost per device for a family of 8051 microcontrollers The only difference between these microcontrollers is the code memory size Costs in Pounds Per 100 units 10 00 7 90 8 00 5 66 6 00 4 46 3 82 4 00 4 E 8K ROM 32K ROM 64K ROM 2 00 Microcontroller Cost 0 00 Processor EJP87C51RA 8K ggP 87 C51RB 16K P87C51RC 32K 7P87C51RD 64K Figure 2 Relating memory size to device costs When considering the resource implications of this approach to scheduling please note that the scheduler presented in this
11. ASSEMBLY LANGUAGE Context e You are developing an embedded application e You wish to use a time triggered software architecture based on some form of co operative scheduler e You chosen hardware platform microcontroller has very limited data memory and or code memory Problem How can you create a co operative scheduler with minimal memory and CPU requirements Background There are two ways of viewing a co operative scheduler e At one level a scheduler can be viewed as a simple operating system that allows tasks functions to be called periodically or less commonly on a one shot basis e Ata lower level a scheduler can be viewed as a single timer interrupt service routine that is shared between many different tasks As a result only one timer needs to be initialised and any change to the timing generally requires only one function to be altered Furthermore we can generally use the same scheduler whether we need to execute 1 10 or 100 different tasks Using such a scheduler we can co ordinate the execution and interaction of tasks in a highly deterministic manner By making the scheduler co operative that is only one task as active at any point in time we simplify the design and greatly reduce the potential for task conflicts Solution We have previously described in detail how to create a flexible scheduler using the C programming language see CO OPERATIVE SCHEDULER Pont 2001 p 255 In the pre
12. EXEN2 Listing 6 Timer initialisation file 805 1SCH ASM In general the initial task delays and reload values are stored directly in program memory using assembler directives such as db If these memory locations are referenced using a label a simple routine to move these fixed values from code memory to RAM can be used Listing 7 shows the routine used to copy the data code section scheduler data structure from ROM to RAM Tnitialise scheduler variables mov SCH_run_f 0x00 Clear all run flags mov SCH_index 0 Reset index counter mov R1 SCH_rloads Get address of delay values mov RO SCH_ delays Initialise indirect pointer SCH init lp mov DPTR ZSCH Delay Values Get delay value for task index mov A SCH index Get task index value movc A GA DPTR mov RO A Store in array inc RO mov DPTR SCH Reload Values Get reload value for task index mov A SCH index Offset pointer by number of tasks movc A A DPTR Get task index value mov R1 A Store in array inc R1 inc SCH index mov A SCH index decrease index value if not zero loop cjne A SCH MAX TASKS SCH init lp Listing 7 ROM to RAM copy file 8051SCH ASM To conclude the initialisation Timer 2 is started and the associated interrupt is enabled Listing 8 Enable interrupts and reset TMRO setb T1210 Set the timer running setb EAL Enable interrupts Listing 8 Concluding the scheduler initialisation file 805 1SCH ASM An IS
13. Implementing low cost TTCS systems using assembly language Simon Key Michael J Pont and Simon Edwards Embedded Systems Laboratory University of Leicester LEICESTER LEI 7RH UK Introduction We have previously described a pattern language consisting of nearly eighty components which will be referred to here as the PTTES Collection see Pont 2001 Pont and Ong in press This language is intended to support the development of reliable embedded systems the particular focus of the collection is on systems with a time triggered co operatively scheduled TTCS system architecture In this paper we present a new pattern TTCO SCHEDULER ASSEMBLY LANGUAGE which describes how to implement TTCS architectures using small memory limited microcontrollers such as 8051s PICs AVRs or similar devices Acknowledgements We are grateful to Jorge Ortega Arjona our shepherd at EuroPLoP 2003 for comments and suggestions on the first drafts of this paper Copyright Copyright 2003 2004 by Simon Key Michael J Pont and Simon Edwards Permission is granted to copy this paper for the purposes of EuroPLoP 2003 All other rights reserved The first phase of the work described in this paper was carried out while Simon Edwards was a Final Year student at the University of Leicester Present address MIRA Ltd Watling Street Nuneaton Warwickshire CV10 OTU UK 2 http www le ac uk eg embedded TTCo SCHEDULER
14. K K K K OE K K K K KOK K K K K K K K K K OE K K K K KK KKK KK KKK KKK e OR OK K K OK OE OK OK OE K K K OE K K OE K K K K K K K K K K OK K K K K OE K K K K K K CE OK K K K K K K K K K K K K K KK OG E K KK KKK KK KKK K K K Function LED Flash Description Flashes LED on port pinO on and off Pre None Post None tK OK K K K OE OK OK K K K K OE K K OE K K K K K K OK K K K CK K K K K OE K K K K K K OE OK K K K K OE K K K K K K K K KK K K K KKK KKK KK KKK KKK TASK1 LED Flash mov A LED Status is led on jz LED on no got turn it on cir LED PORT turn off mov LED Status 700 set status ajmp SCH Dispatch Tasks end LED on setb LED PORT turn LED on mov LED Status 01 set status ajmp SCH Dispatch Tasks end Return from scheduled task tK OK K K K OE OK OK K K OK K OE CK K OE K K K K K K K K K K OK K K K K OE K K K K K K OE K K K K K K K K K OK K K K K K OE K K KK KK KKK KK KKK KKK End of File tK OK SKK OK OE K K K K K OK OE K OK OE K K K K K K K K K K K K K K K OE K K K K K K OE OK K K K K K K K K CE K K K K KK K K KK KK KKK KK KKK KKK Listing 22 Task1 Flashing LED file TASK1 ASM tK KK OK OK OK OK OK K K OK OK OE K K OE K K K K K K K K K K K K K K K K CK K K K K K K ok K K K KK K K K K OK K K K KK KKK KKK KK K K K KKK KKK Scheduled Tasks tK KK OK ok OK OK K K K K OK OE K K OE K K K K K K K K K K OK OK K K K K K K K K K K OE K K K K K K K K K K K K K K K OE K K KK KK KKK KK KKK KKK tK OK
15. K K KK K K K KKK KKK KK KKK KKK Sample prescale and reload values e K K OK K OK CK K CK K K CE K OK CE K OK CE K CK K K CE K OK CE K OK CE K CK CE K CE K K CE K OK CE K CK CE K K CE K CE K OK CE K KOK K CK K K K K KKK K K K K K K CI K K x include TIMING INC tK KK K K OE OK K K K OK K K K K K K K K K K K OK K K K K K K K K K K K K K o K CE K K K K K K K K K K K K K K K K KK KK KK KK KKK KKK KKK Memory Allocation e K K OK K OK CK K K K OK CK K OK CE K K K K CK K K CE K OK CE K OK CE K OK CE K CE K K CE K OK CE K K K K KOK K CE K OK CE K OK CE K CK CE K K K KK KKK K K K K K K K x include MEMORY ALLOCATION INC tK OK K K OK OE OK OK K K OK OK OE K K OE K K K K K K OK K K K OK K K K K K K K K K K K OE OK K K K K K K K K K K K K K K K K K K K KK KK K K K KKK KKK Vectors e K OK OK oK CK kK kK OK o OK OK OK CK kK kK OK o CK OK OK CK kK kK OK o CK kK kK CK K CK k k CK o kK OK o CK k kK CK OK OK OK OK OK kK kK CK o CK OK KOK KOK KOK OK KOK OK KOK KKK KK KK include vectors inc tK OK SKK ok OK OK OK K K K K OE K K OE K K K K K K K K K K OK K K OK K K K K K K K K K OK K K K KOK K K K K K K K K K K K K K E KK KKK K K K KK K K K Main Program e K KOK K K K K K K K CE K OK CE K OK CE K CK K K CE K OK CE K OK CE K OK CE K K K K CE K OK CE K OK K K K K K CE K K CE K K CE K CK K K K K KKK KKK K K K K K K x MAIN tK KK K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K
16. K K OE OK K K K OK K OE K K OE K K K K K K K K K K OK OK K K K OE K K K K K K OE K K K K K OE K K K OK K K K K K OE K K K K KK KKK KK KKK KKK Scheduler Memory Allocation tK OK K K OK OE OK OK K K K K K K K OE K K K K K K OK K K K K K K K K OE KE K K K K K K ok K K K K K K K K K K K K K K OE KK KK KK KK KKK KKK KKK START OF DATA MEMORY EQU 00h START OF USER MEMORY EQU SCH rloads SCH MAX TASKS Misc variables SCH STATUS DATA START OF DATA MEMORY SCH temp DATA START OF DATA MEMORY 1h temp DATA START OF DATA MEMORY 02h Scheduler variables SCH run f DATA START OF DATA MEMORY 04h SCH run mask DATA START OF DATA MEMORY 05h SCH index DATA START OF DATA MEMORY 06h SCH dis mask DATA START OF DATA MEMORY 07h SCH dis indexDATA START OF DATA MEMORY 08h Delay values for scheduled tasks sched status reg temp reg for sched general temp reg Run flags for tasks Run flag mask Current task index Dispatch run flag msk Dispatch task index put in RAM comments to the size of the num of tasks SCH MAX TASKS SCH delays DATA START OF DATA MEMORY 09h Delay values for scheduled tasks put in RAM comments to the size of the num of tasks SCH MAX TASKS SCH rloads DATA SCH delays SCH MAX TASKS tK OK K K ok OK OK OK K K OK K OE K K OE K K K K K K OK OK K K OK OK K K K OE K K K K K K OE OK K K K K K K K K KE K K KOK KK KK K K KK KK KKK KKK KKK define all user variabl
17. K K ok OK OK OK K K K K OE K K K K K K K o K OK K K K OK K K K K OE K K K K K K K OK K OE K K K K K K K K K K K K CE KK K K KK KKK K K KKK KKK Function Description Pre None Post None tK KK OK OK OK OK K K K OK K OE OK K OE K K K K K K K K K K OK K K OK K K K K K K K K K ok K K K K K K K K K K K K K K OE K K KK KK KK KKK KKK KKK TASK2 ajmp SCH Dispatch Tasks end Return from scheduled task tK KK K OK OE OK OK K K K K OE K K OE K K K K K K OK K K K OK OK K K K K CK K K K K K OE K K K K KOK K K K K K K K K K OE KK K K KKK KKK K K KK KKK End of File tK OK K K K OE OK K K K OK OK OE OK K K K K K K K K OE K K K OK K K K K OE K K K K K K OE OK K OE K K K K K K K K K K K K CE KK K K KK KK KKK KKK KKK Listing 23 Task2 Empty task file file TASK2 ASM TASK8 ASM References and further reading Allworth S T 1981 An Introduction to Real Time Software Design Macmillan London Atmel 2002 AVR Instruction Set http www atmel com dyn resources prod_documents DOC0856 PDF Bate I 2000 Introduction to scheduling and timing analysis in The Use of Ada in Real Time Systems 6 April 2000 IEE Conference Publication 00 034 Cooling J 2003 Software engineering for real time systems Addison Wesley UK Cullyer W J Goodenough S J and Wichmann B A The choice of computer language for use in safety critical systems Software Engineering Journal Vol 6 No 2 March 1991 Inf
18. K OG KK KK KK KKK KKK KKK Initialise Ports e kK OK OK oK CK KK OK o OK k o CK OK CK OK OK CK o OK CK kK CK OK o CK o kK OK kK CK k OK kK o OK OK OK CK KOK CK OK CK OK o CK kK kK CK o CK o KOK KOK KOK OK KOK kK KOK KKK KOK KK include ports inc Tnitialise Ports mov SP 0x30 clr SWDT Initialise timer for scheduler using TMR2 mov T2CON 0x10 mov CCEN 0x00 The timer preload values mov TH2 PRELOAD10H mov CRCH PRELOAD10H mov TL2 PRELOAD10L mov CRCL PRELOAD10L Enable Timer 2 interrupt but not the external one setb ET2 setb EXEN2 Initialise scheduler variables mov SCH run f 20x00 clear all run flags mov SCH index 0 reset index counter mov R1 SCH_rloads get address of delay values mov RO SCH delays initialise indirect pointer SCH init lp mov DPTR ZSCH Delay Values get delay value for task index mov A SCH index get task index value movc A A DPTR mov RO A store in array inc RO mov DPTR ZSCH Reload Values get reload value for task index mov A SCH index offset pointer by number of tasks movc A A DPTR get task index value mov R1 A store in array inc R1 inc SCH index mov A SCH index cjne A SCH MAX TASKS SCH init lp decrease index if not 0 loop Enable interrupts and reset TMR2 setb T21I0 Set the timer running setb EAL enable interrupts SCH_Dispatch_Tasks This is the main task dispatcher process If a task is ready to be run A th
19. OOK Files required A 4 e K OK OK OK CK KK OK o OK OK o CK kK CK OK o CK OK OK CK kK kK OK o CK o kK OK OK CK k o CK o kK OK o CK kK kK CK o CK OK o OK KOK CK o CK OK KOK KOK KOK OK o kK k KOK KKK KOK KK 3 Notes VEREER A REEERE EEKE Ko ko koe ko ke eoe ko RK ERKE ke eoe ko ke eoe ke eoe E ke e xke eoe KK KK KKK KKK KKK tK OK K K OK OK OK OK K K OK OK CE K K OE K K K K K K K K K K OK OK K K K OE K K K K K K K ok K K K KOK K K K OK K K K K K OE KK KK KK KKK KK KKK KKK Vectors e K OK OK oK CK KOK OK o OK k o CK kK kK CK o CK o OK CK kK OK OK o CK o OK OK k OK k OK CK o kK OK OK CK kK kK kK o OK OK o CK KOK OK o CK o KOK KOK KOK OK o kK OK KOK KKK KOK KK CSEG AT 0x0000 reset LJMP MAIN reset location jump to start CSEG AT 0x002b timer 2 overflow There is only one interrupt in this program ljmp SCH Update timer has overflowed so update scheduler CSEG AT 0x0043 after all interrupt vectors start of main program tK OK SKK OK OK OK OK K K K K OE OK K OE K K K K K K OK K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K OG K K KK KK KKK KKK KKK End of File tK KK OK ok OE OK OK K K K K OE OK K OE K K K K K K OK K K K K K K K K OE K K K K K K K K K K K K OE K K K OK K K K K K OE KK KK KK KKK KK KKK KKK Listing 19 8051 C515C Vector table file VECTORS INC e K K OK K K K K K K OK CE K OK CE K K K K CK K K K K K CE K OK CE K K K K K K K K
20. R When the scheduler timer discussed above overflows the scheduler interrupt service routine ISR is executed The first action taken in the ISR is to clear the timer interrupt flag and save any registers that will be altered within this routine Listing 9 these registers will be restored at the exit from the function SCH_Update clr TF2 Clear Timer 2 interrupt flag push ACC Save registers that might be needed push PSW push 01h push 00h Listing 9 Performing a context save file 8051SCH ASM Each of the possible tasks is then checked A non zero delay time is decreased by one and the update function then checks the next task A zero delay time results in the delay time been re initialised with the associated reload value and the run flag for that task is set Listing 10 Setup loop counter and run flag mask mov SCH_run_mask 00000001b Init value for run flag mask mov SCH_index SCH_MAX_TASKS Reset index value to number of tasks in scheduler mov A SCH_ delays mov RO A Get address of SCH delays mov A SCH_rloads Get location of first reload ram location mov R1 A SCH Update lp mov A SCH run mask Get run flag mask cjne RO 0 SCH Task notready Test delay time if not zero task not ready Current task is ready to be run so set run flag and reload delay value SCH Task ready orl SCH_run_f A Set appropriate run flag mov A R1 Get value being pointed to mov RO A Store in delay va
21. ask file TASK1 ASM Reliability and safety implications Many questions have been raised about the suitability of assembly language for use in applications which are safety related or safety critical see for example Cullyer et al 1991 Cooling 2003 4 It should also be noted that C is rarely considered to be an ideal language for safety critical systems It is undoubtedly the case that implementing say a very large and complex air traffic control system entirely in assembly language would probably not be sensible However in the present pattern we focus on systems implemented using microcontrollers with very limited memory A consequence of this is that the code size is compared with many real time and embedded systems very small What is not clear is whether in such small systems where the code can be carefully and completely checked there are significant safety implications resulting from the use of assembly language vs C Further studies are required in order to clarify this issue Hardware resource implications Embedded systems implemented using assembly language generally require significantly less memory than those implemented in high level languages To illustrate the likely savings in memory when using this pattern please consider the results shown in Table 1 Microcontroller Manufacturer Size of assembly Size of assembly compared toC compared to C ROM RAM One Five task tasks 1
22. ck gt loop initial value for mask load dispatcher run flag mask mov SCH dis mask 200000001b get number of tasks in scheduler load dispatcher task index mov SCH dis index ZSCH MAX TASKS SCH Dispatch Tasks lp mov A SCH dis mask anl A SCH run f Get run flag mask Logical AND with run flags if result was zero so no run flag there go back to loop jz SCH Dispatch Tasks end Task needs to be run mov A SCH dis mask cpl A anl SCH run f A mov DPTR ZTASK LIST mov A SSCH MAX TASKS subb A SCH dis index clr C rlc A jmp A DPTR so clear run flag and jump to task Get inverse of run flag mask Clear appropriate run flag Load start of task lists Add current task no Clear carry X2 to get real code location Jmp to task Listing 12 A possible dispatch function file 8051SCH ASM The tasks have been stored in a jump table and the relevant task number is added to the base address of this table TASK LI ST The resulting value is then stored in the program counter causing a jump to the task Listing 13 This is where the scheduled tasks go the list below in order 1 to 8 TASK LIST ajmp ajmp ajmp ajmp ajmp ajmp ajmp ajmp TASK1 TASK2 TASK3 TASK4 TASK5 TASK6 TASK7 TASK8 SCH NO TASK HERE i Jump Jump Jump Jump Jump Jump Jump Jump to Task to Task to Task to Task to Task to Task to Task to Task oo 4 O0 U1 4 UJ NJ F3
23. clude include include include include include end TASK1 ASM task2 asm task3 asm task4 asm task5 asm task6 asm task7 asm task8 asm tK OK K K K OK OK K K K OK K OE K K OE K OK CE K K K OE OK K OE K K K K K OE E K K K K K OE K K OE K K K K K K OE K K OE K KK K K K K K K K K KK KKK KKK End of Program tK OK K K K OK OK K OK K K K OE K K OE K K K K K K K K K OE K K K K K K K K K K OK K OE K K OE K K K K K K OE CK K OE K KK KOK K E KK K K KK KKK KKK Listing 16 Assembly language scheduler for the 8051 microcontroller main program file 8501SCH ASM e K K OK K K K K K OK K K K OK CE K K K K CK K K K K OK CE K K K K K K K K K K CE K OK CE K K K K K CE K K K K K K OK CE K K K K K K KKK KKK KK KKK KK Description 8051 c515c Assembler scheduler tK OK SKK OK OE OK OK K K OK OK OE K K OE K K K K K K OK K K K OK K K K K K K K K K K K OE K K K K K K K K K K K K K K K OE KK KK KK KK KKK KKK KKK Filename TIMING INC 3 Company Version Author Date Modification b 1 0 S Key 09 12 02 Created t 1 1 S Key 30 05 03 separate files for easy of use DAOODOOOOODOOIOOOIOOOOODIOODEOODIEOODEOOOEOOOOOOODOODOODOODEOODEOODOOOOOOOOOOOOOOOOK Files required i tK OK K K OK OK OK K K K K K OE K K OE K K K K K K K K K K OK OK K K K K OK K K K K K OE OK K K K K K K K K K K K K K K K KK K K KKK KK K K KKK KKK Notes This section deals with the timing of the sch
24. d within the program has to be specified manually This is done by allocating a name to a section of memory this name can then be referred to throughout the program this is similar to variable initialisation in a high level language tK OK SKK ok OK E OK K K OK K OE K K OE K K K K K K OE K K OE K K K K K K K K OK K K K CE K K OE K K K K K K K K K K K KK K K K K KK K K KK KKK KKK Scheduler Memory Allocation e KK OK OK OK CK K K K K CE K OK CE K OK CE K CK CE K K K K CE K OK CE K OK CE K CK CE K OK CE K CE K OK CE K OK CE K CK CE K KOK K K K K K K KKK K K K K K KKK KKK START_OF_DATA_MEMORY EQU 00h START_OF_USER_MEMORY EQU SCH_rloads SCH_MAX_TASKS scheduler status register SCH_STATUS DATA START_OF_DATA_MEMORY temp register for Scheduler SCH_temp DATA START OF DATA MEMORY O1h general temp register temp DATA START OF DATA MEMORY 02h Scheduler variables Run flags for scheduled tasks SCH run f DATA START OF DATA MEMORY 04h Run flag mask SCH run mask DATA START OF DATA MEMORY 05h Current task index SCH index DATA START OF DATA MEMORY 06h Task Dispatcher run flag mask SCH dis mask DATA J START OF DATA MEMORY 07h Task Dispatcher task index SCH dis index DATA START OF DATA MEMORY 08h Delay values for scheduled tasks put in ram comments to the size of the number of tasks SCH MAX TASKS SCH delays DATA START OF DATA MEMORY 09h Delay values for scheduled tasks put in
25. eduler As set the tick is 1 ms vary these according to the settings below or work out your own note some ACCURATE timings are not possible DAOODOOOOODOOOODIOOOOODIOODOODEOODEOODEOOOODIOODOODOODEOODEOODEOODOOOOOOOOOOOOOOE tK KK OK K OE OK K K K K OK OE OK K OE K K K K K K OK K K K CK K K K K K K K K K K K OE OK K K K K K K K K K K K K K K K OG KK KK KK KKK KKK KKK Sample prescale and reload values fet ei eee er fssessincsiess Pe See asses soe ees PRELOAD10h PRELOAD101 time generated a ee ldem d n5esecdoclegezezexc OXBE OxE5 1ms 10 MHz EE Mp RE He Crate eta Sea DeL adele ee ei ee 0xB1 OxEO lms 12 MHz E E Poe ee see ee oe r tK KK K K K K K K K K K K K OK K K K K K OK K K K K K K K K K K K K K K K K K OE K K K K K K K K K KE K K K K K OE KK KK KK KKK KK KKK KKK SCH MAX TASKS equ 01h Maximum number of tasks MIN 1 MIN 1 MAX 7 depends on task variables Oscillator resonator frequency in Hz e g 11059200UL OSC FREQ equ 10000000 Number of oscillations per instruction 6 or 12 0SC PER INST equ 6 PRELOAD10 equ 65536 0SC FREQ OSC PER INST 100 PRELOAD10H equ PRELOAD10 256 0xd7 PRELOAD10H equ Oxbe PRELOAD10L equ PRELOAD10 256 Oxdl PRELOAD10L equ 0xe5 tK KK OK K OE OK OK K K K K OE K K OE K K K K K K OK K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K OE KK K K KK KK KKK KKK KKK End o
26. en the dispatcher will run it and clear its run flag ORL PCON 0x01 ORL PCON 0x20 mov A SCH run f jz SCH_Dispatch_Tasks mov SCH_dis_mask 00000001b mov SCH dis index SCH SCH Dispatch Tasks lp mov A SCH dis mask anl A SCH run f jz SCH Dispatch Tasks Task needs to be run mov A SCH dis mask cpl A anl SCH run f A mov DPTR ZTASK LIST mov A SCH_MAX_TASKS subb A SCH dis index clr C rlc A jmp A DPTR MAX_TASKS end Enter idle mode 1 Enter idle mode 2 test run flags no tick so loop init value for mask load dispatcher run flag mask get number of tasks in scheduler load dispatcher task index Get run flag mask AND with run flags if result is 0 run flag is clear go back to loop so clear run flag and jump to task Get inverse of run flag mask Clear appropriate run flag Load start of task lists Add current task number Clear carry x2 to get real code location Jump to task This is where the scheduled tasks go list below in order 1 to 8 TASK_LIST ajmp TASK1 Jump to Task 1 ajmp TASK2 Jump to Task 2 ajmp TASK3 Jump to Task 3 ajmp TASK4 Jump to Task 4 ajmp TASK5 Jump to Task 5 ajmp TASK6 Jump to Task 6 ajmp TASK7 Jump to Task 7 ajmp TASK8 Jump to Task 8 SCH NO TASK HERE DO NOT MOVE OR RENAME THIS LINE SCH Dispatch Tasks end mov A SCH dis mask Roll run flag mask one place left cir C ric A mov SCH dis mask
27. es for start of user memory END OF DO NOT MODIFY user variables Scheduled Task One Variables LED Status DATA START OF USER MEMORY led status register Scheduled Task Two Variables task two variable DATA START OF USER MEMORY 01h example Scheduled Task Three Variables Scheduled Task Four Variables Scheduled Task Five Variables Scheduled Task Six Variables Scheduled Task Seven Variables Scheduled Task Eight Variables tK OK K K OK K K K K K K K OE K K OE K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K K OE K K KK KK KK KKK KKK KKK End of File tK OK SKK K OK OK OK K K K K OE K K OE K K K K K K OK K OK K K OK K K K OE K K K K K K OE OK K K K K K K K K OK K K K K K OE KKK KKK KKK K K KKK KKK Listing 18 Memory and register allocation file MEMORY ALLOCATION INC e K KK K OK CK K K K K CE K OK CE K K K K CK K K K K OK CE K OK CE K CK CE K CE K K CE K K CE K CK CE K K CE K CE K K CE K OK CE K CK CE K K K KK KKK K K K KKK KK Description 8051 c515c Assembler scheduler x tK KK K K OK OK OK K K K K OE K K OE K K K K K K K K K K OK K K K K OE K K K K K K K K K K K K K K K K OK K K K K K K K K E K KKK KKK KK KK K K K Filename vectors inc Company Version Author Date Modification 1 0 S Key 09 12 02 Created 1 1 S Key 30 05 03 separate files for easy of use T DAOODOODOOOOOOODIOOOOODIEOODEOODEOODEOOIDEOOOODOODOODOODOODOODEOODOOOOOOOOOOOOOGO
28. f File tK KK OK K OK OK OK K K K K OE K OK OE K K K K K K K K K K OK K K K K K K K K K K K OE K K K K K K K K K E K K K K K K K K K K KK KKK K K KKK KKK Listing 17 Scheduler tick definition file TIMING INC tK K K K K OK OK K K K K K K K K K K K K K K K OE K K K K K K K K K K K K K K K OE K K K K K K K K K K K K K K KK KK KK KK KKK KK KKK KKK Description 8051 c515c Assembler scheduler e OR OK K K OK OK OK OK K K OK K OE K K OE K K K K K K OK K K K OK K K K K OE K K K K K K K ok K K OK K K K K K K K K K K K K KK KK KK KK KKK KKK KKK tK KK K ok OK OK OK K K OK K OE K K OE K K K K K K CE K K K K K K K K K K K K K K K OE OK K OE K K K K K K OE OK K OE K KK K K K E KK K K KK KKK KKK Filename MEMORY_ALLOCATION INC Company Version Author Date Modification b 1 0 S Key 09 12 02 Created 1 1 S Key 30 05 03 separate files for easy of use Files required tK KK K K OE K OK K K K K OE OK K OE K K K K K K OK K K K OK K K K K K K K K K K K K OK K K CK KOK K K K OK K K K K K CE KK K KE KK KK KKK KKK KKK and user variables do not modify the scheduler variables t OK OK K K ok OK OK OK K K OK K OE K K OE K K K K K K OE CK K K K OK K K K OE OK K K K OK K OE OK K K K K K K K K OE K K K K K K KK K E KK K K KK KKK KKK Notes unless REALLY necessary DO NOT MODIFY THIS SECTION This section deals with the allocation of memory to scheduler tK OK SK
29. ineon 1997 C515C 8 Bit CMOS Microcontroller User s Manual 11 97 http www infineon com cgi ecrm dll ecrm scripts public_download jsp 0id 803 1 amp p arent_oid 13734 Infineon 2000 C500 Architecture and Instruction Set http www infineon com cgi ecrm dll ecrm scripts public_download jsp 0id 27537 amp parent_oid 8136 Kopetz H 1995 The Time Triggered Approach to Real Time System Design in Predictably Dependable Computing Systems Springer Berlin 1995 Microchip 1997 PICmicro Mid Range MCU Family Reference Manual http www microchip com download lit suppdoc refernce midrange 33023a pdf Nissanke N 1997 Realtime Systems Prentice Hall Pont M J 2001 Patterns for time triggered embedded systems Building reliable applications with the 8051 family of microcontrollers ACM Press Addison Wesley UK Pont M J 2002 Embedded C Addison Wesley UK Storey N 1996 Safety critical computer systems Prentice Hall UK Styger E The Usage of C for 8 Bit 16 Bit and 32 Bit MCU s Compared with C and Assembly Embedded Systems Conference Europe in 1999 Spring Ward N J 1991 The static analysis of a safety critical avionics control system in Corbyn D E and Bray N P Eds Air Transport Safety Proceedings of the Safety and Reliability Society Spring Conference 1991 Published by SaRS Ltd
30. lue task period AJMP SCH Update lp end Jump to end of loop SCH Task notready Task isn t ready to run dec GRO Decrease delay value by 1 SCH Update lp end inc RO Increase pointer value by 1 inc R1 mov A SCH run mask Roll run mask one place to left rl A mov SCH_run_mask A djnz SCH_index SCH_Update_lp Decrease index value not zero so Loop still tasks to look at Listing 10 The core scheduler update code file 8051SCH ASM Finally the pre ISR program context is restored and system resumes normal operation Listing 11 pop 00h pop 01h pop PSW pop ACC reti Restore registers Return from interrupt Listing 11 Restoring the pre ISR context file 8051SCH ASM A dispatch function We have seen that a run flag is set for a given task to be performed in the SCH Update function In this section we see how the flag is used to activate the task that it relates to Until an interrupt occurs and a run flag is set the dispatch function sits in an endless loop sleeping between timer ticks When a run flag has been set checks are performed and the associated task is called Listing 12 This is the main task dispatcher process If a task is ready to be run A then the dispatcher will orl PCON 0x01 orl PCON 0x20 mov A SCH run f jz SCH Dispatch Tasks run it and clear its run flag Enter idle mode 1 Enter idle mode 2 goto sleep Test run flags No ti
31. mber of tasks and if required the scheduler timing TIMING INC Listing 17 e Allocate memory for the task variables file MEMORY ALLOCATION INC Listing 18 ERR ELAS ELE ER EEA RATES ERAS SRE SAS TCE RARE RE Ae eee Description 8051 Assembler scheduler DAOOOOOOOODEOOOODIOOOOODIOOOOODEOODEOOIOEOOIOOOIOODOODOODOODOODEOODOOOOOOOOOOOOOOOOK Filename 8051SCH ASM Company Version Author Date Modification 1 0 S Key 09 12 02 Created 1 1 S Key 30 05 03 separate files for easy of use tK OK K K OK OK OK OK K K OK K OE K K OE K K K K OK K OE K OK K K K K K K OE OK K K K K K CE K K OE K K K K K K OE K K K K KK KK K E KK K K KK KKK KKK Files required ki REG515C H TIMING INC MEMORY_ALLOCATION INC vectors inc x ports inc task_periods inc TASK1 ASM task2 asm task3 asm task4 asm task5 asm task6 asm task7 asm task8 asm e ORK OK OK K K K OE K OK K K OK K CE K K K K K K K K K OE K K K OK OK K K K OE K K K K K K K K K K K OK K K K K K K K K K K K K K K KK KKK KKK KKK Notes Base scheduler for 8051 THIS FILE DOES NOT REQUIRE MODIFICATION tK KK K K OE OK K K K OK K OE K K OE K OK K K K K K K K K K K K K K K K K K K K K K K K OE K K K K K K OE K K K K KK K K K E KK KK KK KKK KKK NOMOD51 disable predefined 8051 registers INCLUDE REG515C H tK KK K K OK OK K K K K K K K K K K K K K o K K K K K K K K K K OE KE K K K K K K K K K K KOK K K K K K K
32. paper is divided into multiple source files This has been done because when compared with a single source version we find this version much easier to use Please bear in mind that this approach increases the code memory requirements when using a single task by 42 bytes the increase is much less as subsequent tasks are added Portability Assembly language is not a portable language when compared to any high level language For example porting the scheduler code from a Microchip 16F877 to an AVR 9082323 generally requires a complete rewrite However within product families manufacturers maintain compatibility of instruction sets For example the 8051 or AVR allows quick porting of this scheduler between chips within the same range Similar observations are noted in other families Related patterns and alternative solutions CO OPERATIVE SCHEDULER Pont 2001 p 255 describes a similar architecture implemented using the C programming language Overall strengths and weaknesses From previous work we have the following strengths for a co operative scheduler The scheduler behaviour is highly predictable The scheduler is much simpler than pre emptive alternatives The scheduler is an integral part of the developed application Additionally for the assembly scheduler compared with an implementation in C we have one key strength C By using this scheduler we can reduce costs through the use of a microcontroller with le
33. sent pattern we describe how to create a similar scheduler using assembly language By using assembly language we can significantly reduce the system resource requirements In the examples we will use code fragments taken from an 8051 based system However the techniques can be applied with virtually any microcontroller 3 Compared with an equivalent pre emptive scheduler Key components An implementation of TTCo SCHEDULER ASSEMBLY LANGUAGE has the following key components 1 The scheduler data structure 2 An initialisation function 3 A single interrupt service routine ISR used to update the scheduler at regular time intervals 4 A dispatcher function that causes tasks to be executed when they are due to run 5 One or more tasks The links between these components during the program execution are shown schematically in Figure 1 Initialisation Timer Z Scheduler overflow ISR r data x Dispatcher A structure Task s Figure 1 Links between the different scheduler components during the program run We consider each of these components in the sections that follow The scheduler data structure To control a task we need to know three basic pieces of information 1 The location of the task in program memory 2 The initial delay value when should the task be run for the first time 3 The Reload value if the task is periodic what is the interval between runs
34. ss code memory General weaknesses of co operative scheduling External events have to be polled which may delay response times under some circumstances Tasks that exceed the system tick interval can greatly disrupt the system performance Specifically for the assembly scheduler Knowledge of the individual of microcontroller is required in order to write effective code amp Inthe implementation presented here a maximum of eight tasks that can be scheduled amp The assembly language scheduler is not as straightforward to use as the C language scheduler and some hand crafting is required Example An 8051 assembly scheduler We present a complete listing of an assembly language scheduler for the 8051 microcontroller in this section It is targeted at an Infineon C515C microcontroller running at 10 MHz and produces a Ims tick An example flashing LED task is included Please note that as discussed in Hardware resource implications this scheduler is split across multiple source files This is intended to make the use of the program more straightforward We can illustrate the use of these various files by outlining how we would add a simple flashing LED task to the scheduler e Create the flashing LED task TASK1 ASM Listing 22 e Modify the task s delay and reload values as required TASK PERIODS INC Listing 21 e Specify the port pin to be used PORTS INC Listing 20 e Modify the nu

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