3.125 Gbps 4x4 LVDS Crosspoint Switch
Contents
1. 1 L1 1 L1 OUTO DS25CP104 OUTO OUT1 OUT1 VDD3 OUT2 OUT2 OUT3 VDD Je PE2 2 GND ME Note This document is considered uncontrolled unless stamped otherwise 14 J10 26 M 2 E ie 58 580 288 ole PR 28 S 2 520 2 S21 298 530 209 8 BREN SMP lt 9 NATIONAL SEMICONDUCTOR A gt 425 SCHEMATIC C14 C15 C16 C17 C18 AUF O1UF UF O1UF MI DS25CP104E VK 2 2UF M2 M3 M4 222 DRAWING REV 25 25 gt 426 M5 M8 2 Gray Ms Enercon 5 05887 0 a Technologies DATED ACF 3 28 07 2 1 V_USB FB2 MMZ1608R301A Jt 1 VN 01 2 gt DN epi JES AEn gt DP MMZ1608R301A J1 4 IVY D J1 5 i E i J4 2 U4 PGB0040805 V33 R13 IFCLK CLKOUT Y1 24 000MHz 9 94 WAKEUP 44 10K R15 10K V USB F1 5 gt VIN V33 VIN gt VIN2 6 SNS PAO INTO PAI INT1 PA2 SLOE PA3 WU2 PA4 FIFOADRO PAS FIFOADRI PAG PKTEND PA7 FLAGD PBO FDO PBi FD1 FCLK PB2 FD2 PB3 FD3 CLKOUT PB4 FD4 PB5 FD5 WAKEUP PB6 FD6 PB7 FD7 CTLO FLAGA CTL2. AD AD AD AD A YES a H oe U cu PES J10 Q N RA r 4 Onno ng ZUUO YO E VUY IJ LY VUL 7 i is document is considered uncontrolled unless stamped otherwise 5 m N Note This document is considered uncontrolled unless stamped otherwise E 88 7 i i ai E e on on on on on on s t o 8 cuc cc 8 e x ss o e c c c c 8 e e e ea e lo aaa _ Beno COOH a LAYER 2 GND PLANE Note This document is considered uncontrolled unless stamped otherwise LAYER 3 SIGNAL Note This document is considered uncontrolled unless stamped otherwise E EN E EN EN I e on on on on on on s t o e e cuc cc e e x ss o e C c c c d 5 e T e ea e lo aaa _ Beno
3. N R16 R19 Footprints J23 J20 H L 30 s 599 USB L2 USB to SMBUS ob So CONVERSION o x e nn Oo SMBUS J15J16 J18J19 J24 N 00000 N N 2 0 e y D x lt lt lt p E EE 4 21 c N N ADR3 ooo PWDN A H L Figure 2 Top Layer DS25CP104EVK Page 4 of 17 DS25CPIO4EVK User Manual For descriptive purposes the DS25CP104EVK can be broken into three parts 1 The DS25CP104 IC with associated connectors and jumpers is main part of the board The block diagram of the DS25CP104 is shown in Figure 3 The receive buffers can be set to Off and Low equalization by the external pins EQO
4. HF O e Suppressor 0805 Pb Free xxm 89 ms personas E eee are remene mene PP mee pem eeminarss smi ene PP omen roan eee o or r a Uus 22 22200 2 0 x fess 2222222000 pma ERJ 3GEYJ222 2 2K 1 10W 5 0603 200ppm Pb Free 0 EE 1 10W 5 0603 200ppm Pb Free MN Wav ash ates eve uuo 15 1 12 35 PM 4 20 2007 Confidential and Proprietary This document is considered uncontrolled unless stamped otherwise Page 1 of 3 Linear Regulator 3 3V LLP6 Pb Free V v By Rev Date PL S DS25CP104EVK ROHS Main Product Responsible Eng Mgr Creator Creation Date PCBA DS25CP104 EVK Arlene Fox 3 28 2007 OAT 15 0402YC103KAT AVX OluF 16V 105 0402 Ceramic XR 2 0 Pb Free lt ALT gt C0402C103K4RAC KEMET DIQE 16V 210s 0402 Ceramic XIR Pb Free lt ALT gt ECJ 0EB1C103K PANA OluF 16V 10 0402 Ceramic XIR Pb Free 16 CAP 08055A180JAT AVX 18pF 50V 259 0505 Ceramic NPO Pb 2 x 11 12 0 Free lt ALT gt C0805C180J5GAC KEMET 50V 252 0805 Ceramic NPO Pb Free SALTS ECJ 2VC1H180J PANA 18pF 50V 5 0805 Ceramic NPO Pb Free 17 CAP C0402C104K8RAC KEMET 10V 10 0402 Ceramic KIR Pb 10 x 1 4
5. L ra L Se IL T n Note This document is considered uncontrolled unless stamped otherwise ab M et Note This document is considered uncontrolled unless stamped otherwise E E mC E E EHE NANG E la TT RI L gt lt EN ool 7 8 ool 7 c HE oon s 9 Note This document is considered uncontrolled unless stamped otherwise Note This document is considered uncontrolled unless stamped otherwise Note This document is considered uncontrolled unless stamped otherwise IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries reserve the right to make corrections modifications enhancements improvements and other changes to its products and services at any time and to discontinue any product or service without notice Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All products are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI s standard warranty Testing and other quality control techniques are used to the extent TI deems necessary to support this warr
6. the transmit buffers can be set to Off and Med levels of pre emphasis by the external pins PEO PE3 Since data capabilities are 3 125 Gbps SMA connectors are used to ensure minimal loss More information can be found about the DS25CP104 on the data sheets 2 A USB to SMBus converter has been added to the evaluation kit to implement SMBus switch configuration to control the signal conditioning Through the SMBus the DS25CP104 currently features four levels Off Low Medium and High of pre emphasis and two levels Off Low of equalization 3 Three channels of stripline have been added to the evaluation kit to test the pre emphasis and equalization functions 157 38 1cm 30 76 2cm and 60 152 4cm In practical applications devices often drive long backplanes or cables To help reduce jitter caused from long backplanes or cables pre emphasis can be used for the drivers and equalization for the receivers 500 531 System Management Bus PWDN ra lt o D EN smb ADDRn Figure 3 DS25CP104 Block Diagram Page 5 of 17 DS25CPIO4EVK User Manual DS25CP104 Evaluation The DS25CP104 is a 3 125 Gbps LVDS Crosspoint Switch with four levels of transmit pre emphasis and two levels of receive equalization configured in the SMBus Mode and two levels of transmit pre emphasis and two levels of receive equalization configured via external jumpers on the evaluation board in the Pin Mode Initial Pin
7. NG GENERATOR __ x with an oscilloscope with a bandwidth of at least 5 GHz TEST CHANNEL DS25CP104EVK Ya DS25CP104 50Q MS 500 MS OSCILLOSCOPE Figure 5 Pre Emphasis Performance Test Circuit Page 9 of 17 DS25CPIO4EVK User Manual Equalization Performance Testing In some applications data transmits over cables or long backplanes The equalization function on the DS25CP104 receivers helps to compensate for loss of certain media hence the DS25CPIOAEVK has three lengths of stripline to test the equalization function 1 Configure the test setup as shown in Figure 6 select the desired test channel lengths in Table 7 2 Set the desired INn to OUTn drivers by selecting S00 501 510 511 520 521 930 531 according to Tables 1 4 3 Select the PEn jumpers to 0 and the EQn jumpers to 1 according to Tables 5 and 6 4 Apply supply 3 3V typical to the VDD and supply ground to the VSS connectors 5 Connect a signal source signal generator data source or an LVDS driver to the desired INn inputs on the board and adjust the signal parameters VOH VOL VCM so that they comply with the device input recommendations 6 Connect an oscilloscope to the selected OUTn outputs and view the output signals with an oscilloscope with a bandwidth of at least 5 GHz TEST CHANNEL DS25CP104EVK Ya DS25CP104 500 MS 500 MS ES IN JAHE PATTERN GENERATOR uH Ha lu
8. 8 10 13 0 Free 14 16 18 C1206C225K4RAC KEMET 2 2uF loV 210 1206 Ceramic X R Xx 109 3 9 18 0 Pb Free lt ALT gt ECJ 3YB1C225K PANA 2 2uF 16V X10 1206 Ceramic XR Pb Free o o EE Y 2 o o EE Y 1 12 35 PM 4 20 2007 Confidential and Proprietary This document is considered uncontrolled unless stamped otherwise Page 2of 3 ENERCON BILL OF MATERIALS NATIONAL SEMICONDUCTOR PCBA DS25CP104EVK ROHS Main Product Responsible Eng Mgr Creator Creation Date jera ree arm naan EER E E E DS25CP104EVK E 0 Fs es na rr se n _ __ owmmomm sepe eoseem eene cemcnemm TT NAN NANA DA NAN D DA DN PAN Notes DO NOT STUFF O R15 16 17 18 19 J5 OY 1 12 35 PM 4 20 2007 Confidential and Proprietary This document is considered uncontrolled unless stamped otherwise Page 3of 3 Note This document is considered uncontrolled unless stamped otherwise E E J2 T 0 SMBUS lt USD U MDUS AN ICDCION ONVERSIO v UIN YIU IN c Ex VEI 2 mes ED 4 3 N N NIO fA NO L CA G3 JU BI NU m UU TU H IN2 AE OUT2 NZ E 20 J23 Mu Mu tc
9. OSCILLOSCOPE eT er Figure 6 Equalization Performance Test Circuit Page 10 of 17 DS25CPIO4EVK User Manual Pre Emphasis and Equalization Performance Testing In some applications data transmits over cables or long backplanes The pre emphasis and equalization functions on the DS25CP104 help to compensate for loss of certain media hence the DS25CPIOAEVK has three lengths of stripline to test the pre emphasis and equalization functions Configure the test setup as shown in Figure 7 select the desired test channel lengths in Table 7 Set the desired INn to OUTn drivers by selecting SOO 501 S10 S11 S20 521 930 531 according to Tables 1 4 Select the PEn jumpers to 1 and the EQn jumpers to 1 according to Tables 5 and 6 Apply supply 3 3V typical to the VDD and supply ground to the VSS connectors Connect a signal source signal generator data source or an LVDS driver to the desired INn inputs on the board and adjust the signal parameters VOH VOL VCM so that they comply with the device input recommendations Connect an oscilloscope to the selected OUTn outputs and view the output signals with an oscilloscope with a bandwidth of at least 5 GHz TEST TEST CHANNEL DSPSUEMIOSEVIS CHANNEL 500 Microstrip GENERATOR OSCILLOSCOPE Microstrip Va DS25CP104 2052 Microstrip Figure 7 Pre emphasis and Equalization Performance Test Circuit Page 11 of 1
10. user with the DS25CPIO4EVK to suggest test setup procedures and instrumentation to test the device optimally and to guide the user through some typical measurements that demonstrate the performance of the DS25CP104 in typical applications DS25CP104 m m NT Sin 1007 5 lu E T Figure 1 Photo of the DS25CPIO4EVK Page 3 of 17 Figure 2 shows the top layer drawing of the PCB with the silkscreen annotations The 4 5 by 4 5 inch eight layer PCB 15 designed to evaluate the functions of the DS25CP104 DS25CP104EVK Description DS25CP10A4EVK User Manual IN1 IN2 IN3 MA SMBUS ENABLE INO Ear H L H L H L O O O VDD VSS
11. 7 DS25CP10A4EVK User Manual SMBus Evaluation Introduction The CP104 can be evaluated in the Pin Mode using the external pins or in the SMBus mode The following section describes how to load and run the Analog Launch Pad from National Semiconductor a proprietary interface used to access the SMBus registers of the CP104 The 1 time the application is run on a PC and only the 1 time the application file needs to be downloaded extracted and then the appropriate driver needs to be enabled Any time after that on the same PC you need only to setup the CP104EVK and then proceed to using the Analog Launch Pad Loading and running the application file e Download the application file from http www national com appinfo lvds ds25cp104evk html e Place in any folder on your PC and run the file by double clicking on the file from Windows Explorer or My Computer this will extract the file and place it in C Program Files National Semiconductor Corp folder e The Analog Launch Pad will now function only in the Demo mode e The Analog Launch Pad is designed to function on Windows 98 2000 xp Setup the CP104EVK When using the USB power should be off to the CP104 and USB unplugged when changing cables or changing the jumper pins 1 Install jumper pins as follows _____21 H Enablsthe SMBus M inserted USB Controller Reset J18 J19 Address J24 122 H J20 J23 ___
12. COOH a LAYER 4 GND PLANE Note This document is considered uncontrolled unless stamped otherwise gt gt gt gt 8 e g 6 e Qo 666060606 o000 e e 7 4 e e e e j ei e WII e ese e o eee _ e eoo e 6 e e e e e e e QC e e e o e e NI e e e e e e e 6 e e 7 a e e e e e e e e e 7 e e e e e e e e o e e e e o P P LAYER 5 VCC PLANE Note This document is considered uncontrolled unless stamped otherwise LAYER 6 SIGNAL Note This document is considered uncontrolled unless stamped otherwise EN 88 7 EN E E E e on on on on on on t o 8 cuc cc 8 e x ss o e c c c c d 5 e T e ea e lo aaa _ Beno COOH a LAYER 7 GND PLANE Note This document is considered uncontrolled unless stamped otherwise rak LA rah p
13. I FLAGB PDO FD8 CTL2 FLAGC PD1 FD9 PD2 FD10 RDYO SLRD PD3 FD11 RDY1 SLWR PD4 FDI2 PD5 FD13 PD6 FD14 PD7 FD15 V33 V33A REVISION RECORD LTR ECO NO APPROVED DATE 0 INITIAL RELEASE J6 1 J6 2 J6 3 RDY1 J6 4 RDYO gt J6 5 CLKOUT _ gt J6 6 PA7 J6 7 PAG gt J6 8 PAS gt 46 9 26 10 45 1 4 J5 2 PAS gt J5 3 PA2 gt J5 4 PAT gt J5 5 CTL2 gt J5 6 gt J5 7 CTLO J5 8 IFCLK gt J5 9 J5 10 V33 RQ 10K lt 03 1 43 2 Note This document is considered uncontrolled unless stamped otherwise NATIONAL SEMICONDUCTOR SCHEMATIC DS25CP104EVK C10 2 2UF AUF R11 Eh NAN d 4 GNDA o00 220 220 Enercon Technologies ACF DATED 3 28 07 DRAWING NO REV 5 059857 V v By Rev Date PL S DS25CP104EVK ROHS Main Product Responsible Eng Mgr Creator Creation Date PCBA DS25CP104 EVK Arlene Fox 3 28 2007 1 PCB P 05885R0 DS25CP104EVK 5 25x5 25x 060in 8 layer 1 Bd 133 35x 133 35MM Panel 10 60x5 25in 269 24x 133 35mm 2 bds panel E NEN NEN 5 3 IC 24LC128 I SN MICROCHIP 128K bit Serial EEPROM 2 5V SOIC8 amp Pb 1l X PETS Free IC CY7C68013A 56LFXC CYPRESS EZ USB FX2 USB Microcontroller QFN56 1 x 1 Pb Free 5 IC DS25CP104 AT U5 Customer Supplied pe paa 5 c ___
14. National ar mic or Spir amp Sou 3 125 Gbps 4x4 LVDS Crosspoint Switch with Transmit Pre emphasis and Receive Equalization DS25CP104 Evaluation Kit USER MANUAL Part Number DS25CP104EVK For the latest documents concerning these eu oducts and evaluation kit visit lvds national com Schematic eue rber files o at Ivds natio nu om February 2008 Rev 0 2 DS25CP10A4EVK User Manual Table of Contents Taser COMO de EU 2 9m 3 ian E ian son tenn dake 4 PE AM VIENTO ROTER 6 EVIA O ELE d ro ia 12 eri OPM aN Ce uoo Naga ud ANG AG toin aa et aUe 16 Page 2 of 17 DS25CPIO4EVK User Manual Overview The DS25CPIOA4EVK is an evaluation kit designed for demonstrating performance of DS25CP104 a 3 125 Gbps 4x4 LVDS Crosspoint Switch with Transmit Pre emphasis and Receive Equalization The evaluation kit is comprised of the DS25CP104 with its associated input and output SMA connectors and jumpers to manually select the desired pre emphasis or equalization a USB to SMBus conversion circuit to control the SMBus with a PC and three FR4 striplines 15 38 1cm 30 76 2cm and 60 152 4cm to exercise the devices signal conditioning features pre emphasis and equalization The purpose of this document is to familiarize the
15. Settings for Pin Mode Testing Setting b Enable DisableSMbus SMbus EQO EQ 3 Equalization off See table PEO PE3 Pre Emphasis off See table PWDN H off Switch Configuration Truth Tables 0 A4 S00 X wc Table 2 Input Select Pins Configuration for the Output OUTI Page 6 of 17 DS25CP10A4EVK User Manual Table 4 Input Select Pins Configuration for the Output OUT3 Signal Conditioning Tables Output OUTn n 0 1 2 3 OR Table 5 Transmit Pre emphasis Truth Table Input INn n 0 1 2 3 Equalization Control Pin EQn State Equalization Level Table 6 Receive Equalization Truth Table Stripline Length Table also known as Test Channels Stripline Loss dB 1250 MHz Ll 15 38 1cm L2 30 76 2cm L 60 152 4cm Table 7 Stripline length table Page 7 of 17 DS25CPIO4EVK User Manual Jitter Performance Testing with No Signal Conditioning l 2 Configure the test setup as shown in Figure 4 Set the desired INn to OUTn drivers by selecting SOO 501 510 S11 S20 521 930 531 according to Tables 1 4 Select the PEn and EQn jumpers to 0 according to tables 5 and 6 Apply supply 3 3V typical to the VDD and supply ground to the VSS connectors Connect a signal source signal generator data source or an LVDS driver to the desired INn inputs on the board and adjust the signal pa
16. __ TT Table 8 Jumpers on the CPIOAEVK for SMBus use 2 Configure the test setup as desired examples are fig 4 fig 7 3 Supply 3 3 V Power to board Page 12 of 17 DS25CPIO4EVK User Manual Load the driver This needs to be done only once for a particular PC Plug in the USB cable from the PC to the CP104 EVK a small window should appear in the lower right corner of the PC recognizing new hardware If the bubble says USB device not recognized or nothing happens check the jumper configuration if still does not work remove jumper on J4 for 5 sec and then replace The USB controller is now reset and should be in communication with the PC this can be known by Hi speed USB device plugged into non Hi Speed USB hub appearing in the window Follow the instructions for New Hardware Wizard which may take up to one minute to run a select Install from a list or specific location b select Don t search I will choose the driver to install c select Have disk d Browse to C Program Files National Semiconductor Corp Analog LaunchPAD v1 07 Drivers e select NSC ALP Nano from the list f install the driver hit Continue Anyway if windows compatibility window is displayed h finish you are now ready to run the Analog Launch Pad Page 13 of 17 DS25CP104EVK User Manual Page 14 of 17 DS25CPIO4EVK User Manual Using the Analog Launch Pad for the CP104EVK The Analog Launch P
17. ad from National Semiconductor is a proprietary interface created to assist developers to test their designs and systems using National s evaluation boards the CP104EVK interface has been designed into the Analog Launch Pad The registers of the CP104 can be accessed through this interface enabling all the functions accessed through the SMBus Below is a picture of the Analog Launch Pad CP104 interface National Semiconductor Analog LaunchPAD Tasks ALP Nano USB 1 1 CP104 Nano Devices A formation Registers scripting ALP Nano USB 1 e CP 104 Nano Apply Refrest Refresh All Verbose Descriptions Switch Configuration Y Display PE Level Y Control Y Loss of Signal Y ALP Framework v1 08 12 11 2007 F1 5 tart National Semico Figure 8 Analog Launch Pad CP104 interface Page 15 of 17 DS25CPIO4EVK User Manual To use the interface e Run the application Analog Launch Pad and select CP104 Nano For the Analog Launch Pad to connect the board must be powered with the appropriate jumper selections and the USB driver must be functioning Otherwise it will open into the Demo mode e Select the Register folder and enter the register that you want to change make the appropriate changes and then hit Apply Register descriptions can be found in the DS25CP104 datasheets e Use only Apply to make changes Refresh Refresh All Display Load and Save bubbles should
18. anty Except where mandated by government requirements testing of all parameters of each product is not necessarily performed Tl assumes no liability for applications assistance or customer product design Customers are responsible for their products and applications using Tl components To minimize the risks associated with customer products and applications customers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other TI intellectual property right relating to any combination machine or process in which products or services are used Information published by TI regarding third party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from under the patents or other intellectual property of TI Reproduction of TI information in Tl data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Reproduction of this information with alteration is an unfair and deceptive business practice TI is not responsible or liable for such altered documentation Informatio
19. cts designated by TI as military grade meet military specifications Buyers acknowledge and agree that any such use of TI products which TI has not designated as military grade is solely at the Buyer s risk and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use TI products are neither designed nor intended for use in automotive applications or environments unless the specific products are designated by TI as compliant with ISO TS 16949 requirements Buyers acknowledge and agree that if they use any non designated products in automotive applications will not be responsible for any failure to meet such requirements Following are URLs where you can obtain information on other Texas Instruments products and application solutions Products Applications Audio www ti com audio Automotive and Transportation www ti com automotive Amplifiers amplifier ti com Communications and Telecom www ti com communications Data Converters dataconverter ti com Computers and Peripherals www ti com computers DLP Products www dlp com Consumer Electronics www ti com consumer apps DSP dsp ti com Energy and Lighting www ti com energy Clocks and Timers www ti com clocks Industrial www ti com industrial Interface interface ti com Medical www ti com medical Logic logic ti com Security www ti com security Power Mgmt power ti com Space Avionics and Defense www ti com space avionics defense Microcont
20. n of third parties may be subject to additional restrictions Resale of Tl products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated product or service and is an unfair and deceptive business practice is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications and acknowledge and agree that they are solely responsible for all legal regulatory and safety related requirements concerning their products and any use of TI products in such safety critical applications notwithstanding any applications related information or support that may be provided by Further Buyers must fully indemnify and its representatives against any damages arising out of the use of TI products in such safety critical applications TI products are neither designed nor intended for use in military aerospace applications or environments unless the products are specifically designated by TI as military grade or enhanced plastic Only produ
21. not be used e A selected square corresponds to a 1 while a blank square corresponds to a 0 e change the levels of Pre Emphasis or Equalization you must first go to Control register and enable Ignore External PE and Ignore External EQ before adjusting the signal conditioning through the SMBus e use the Loss of Signal you must first go to Control register and enable TOS e The Verbose Description square switches to a more descriptive text Page 16 of 17 DS25CP10A4EVK User Manual e Typical Performance When evaluating the CP104 EVK the eye diagram response should be similar to those below measured on the Tektronix CSA 8000 Fe Edt ee Setup Ul 1023 al FT fa des ose M angle Eh B mai Direct The DS25CP104 3 125 Gbps mE 7 output eye diagram with no STRIPLINE connected and with PE EQ Off HN Setup Les Hele t The DS25CP104 3 125 Gbps PRBS 7 output eye diagram before the STRIPLINE2 30 FR4 and with PE EQ Off Fe i xe Seup Ulis Hele IBA Wavekume __ The 3 125 Gbps PRBS 7 output eye diagram after the STRIPLINE 1 15 FR4 and with EQ Low See Figure 6 for the Setup used The DS25CP104 3 125 Gbps PRBS 7 output eye diagram before the STRIPLINE 2 30 FR4 and with PE Med See Figure 5 for the Setup used Page 17 of 17 6 9 4 j 2 1 REVISION RECORD LTR ECO NO APPROVED DATE 0 INITIAL RELEASE
22. rameters VOH VOL so that they comply with the device input recommendations Connect an oscilloscope to the selected OUTn outputs and view the output signals with an oscilloscope with the bandwidth of at least 5 GHz DS25CP104 EVK 500 DS25CP104 500 Microstrip Microstrip PATTERN dk GENERATOR j OSCILLOSCOPE Microstrip Microstrip Figure 4 Jitter Performance Test Circuit Page 8 of 17 DS25CPIO4EVK User Manual Pre Emphasis Performance Testing In applications where data transmits over cables or long backplanes the pre emphasis feature on the DS25CP104 transmitter helps to overcome media loss and reduce bit errors hence the DS25CP104EVK has three lengths of stripline to test the pre emphasis function 1 Configure the test setup as shown in figure 5 select the desired test channel lengths in Table 7 2 Set the desired INn to OUTn drivers by selecting 500 501 S10 S11 520 521 according to Tables 1 4 3 Select the PEn jumpers to 1 and the EQn jumpers to 0 according to Tables 5 and 6 4 Apply supply 3 3V typical to the VDD and supply ground to the VSS connectors 5 Connect a signal source signal generator data source or an LVDS driver to the desired INn inputs on the board and adjust the signal parameters VOH VOL so that they comply with the device input recommendations 6 Connect an oscilloscope to the selected OUTn outputs and view the output signals PATTERN Th
23. rollers microcontroller ti com Video and Imaging www ti com video RFID www ti rfid com OMAP Mobile Processors www ti com omap Wireless Connectivity www ti com wirelessconnectivity TI E2E Community Home Page e2e ti com Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2012 Texas Instruments Incorporated
Download Pdf Manuals
Related Search