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ADSP-TS201S EZ-KIT Lite Manual

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1. A B C D 1V DSP A A e e e e e e e e e e e e e VDD 1 0V Bypass Caps per DSP 8 1nF C173 C174 C175 C176 C177 C178 C179 C180 C219 C218 C216 C220 C221 C222 C223 C224 C225 4 0 01uF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 0 01UF 0 01UF 0 01UF 0 01UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF 5 0 1uF 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 1 100uF e e e e e e e e e e e e e Ww 1V DSP B CS e e e e e e e e e e ALL BYPASS CAPS SHOULD BE PLACED AS CLOSE AS POSSIBLE TO THE CORISPONDING IC TRACES FROM COMPONENT TO CAPACITOR AND FROM THE CAPACITOR TO GND SHOULD BE AS SHORT AS POSSIBLE C206 C196 C207 C208 C209 C210 C195 Catt C203 i C204 C205 C202 C201 C200 C199 C198 C197 i 01UF 0 01UF 0 01UF 0 1UF 0 1UF 0 1UF 0 1UF 0 1UF THE PRIORITY FOR THE PLACEMENT 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 1V DSP X 1 5V DSP X e e e e e e e e e e 2 5V DSP X 1 5V DSP A O 1 5V DSP B CY a e e e e e e e e e e e e VDD DRAM 1 5V Bypass Caps per DSP 6 1nF C67 C168 C169 C170 C171 C172 C68 C167 C165 C166 C75 C69 C212 C226 C217 C215 C214 C213 C232 C227 C229 C228 C230 C231 2 0 01uF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 0 01U
2. A C D IV DSP A 1V DSP B CN C A Cu C La 10UH 10UH 1008 1008 M M n a a ier ped C tc e WWE ld Me e emi me 5 or rne cm IW bn i NE E ai IMIDSPA SCLK vREF MIDSPB SCLK_VREF____ DSPB_ VREF 1 AV DSP A e a ge e AV DSP B Se e 4 a 0603 7T 0603 TT 0603 7T 0603 C44 C46 1UF 1UF 7T 0603 7T 0603 PLACE CLOSE TOGETHER USE at least 3 vias per connection D S B PLACE CLOSE TOGETHER USE at least 3 vias per connection D S P A 1 0V 1V_DSP_B O O 1_5V_DSP_B 1 5V Cy x 1 0V IV DSP A 1 5V DSP A 1 5V R110 C C A A 0 U12 MEM MEER 1206 U12 R76 Ut 61 NA FIOVDDI VDD DRAM Al L16 U uit avDD2 VDD DRAM2 apa VSS1 VSS78 1206 DD DRAMS n24VSS2 VSS79 Fid NS VSS78L15 ENDD4 VDD DRAMA Rita 73VSS3 VSSB0LS 61 NA VDD1 VDD_DRAM1 ADAN SS2 VSS79rg 0 gVDD5 VDD DRAM5 1206 Anto VSS4 VSS811w10 VDD2 VDD_DRAM2 aa VSS3 VSS80 g 1206 VDD6 VDD_DRAM6 AA21VS85 VSS82y R91 VDD3 VDD_DRAM3 A12VS84 VSS81w10 VDD7 VDD DRAM7 nna VSS6 VSS83iy 0 gVDD4 VDD DRAM4 A21VSS5 VSS82y E gVDD8 VDD DRAM8K1g ABTVSS7 VSS84iy 1206 gVDDS VDD_DRAM5 nna VSS6 VSS83iy gVDD9 VDD DRAM9g s 4 AB12VSS8 VSS85 2 VDD6 VDD_DRAM6 ABTVSS7 VSS84iy oVDD10 VDD DRAM Or 7g AB15VSS9 VSS86m e A AAA VDD7 VDD DRAM7 819V
3. Ut2 n as i LABEL DSP B near this DSP A C 1063 i AO D17 DO AN H24 DDRO DATA CAFI LA HB DDRA DATA ELO DAI B17 D2 1 1 A2 H22 DDR2 DATAZ EE TAS C16 D3 LAS H21 DDR3 DATA 25V 25V evil ra A L A4 O24 Da DATA4P 8 D4 C DARI D5 R5 L AS G23 DR5 DATASA 6 PS SO Bi6 D6 0805 gr G22 DDR6 DATAG DE BRO ATI C15 D7 dl L A7 O21 DpRz DATAT El 55 D15 D8 Ben 1 281 F24 DDR8 DATASL gt EE 47K ipis Do 0805 AS F23 Dno paTagh S 197 A104 E24AnpRio DATATOF O ero U12 l avi ipti Ati E29 DDR BATAN EIL 175331 B14 DTS ze 25V _A12 F22 ADDR12 DATA12 ih TED ES C1855 PA OO iCPA l O ET Ci4 DIS ser 1 gt PA _A13 FP2ADDRI3 DATA13 Tg I WRI 2 ATS IRL DpAAP7 IDPA I 47 D14 DT mir ps AI E22ADDR14 DATA14 Fi Wan oo BIW E V A15 E21 A13 ID15 u Lala en A ADDR15 DATA15 beza AGRO E17 ek DMAROAM JI DMARO T pm 1 5 L A6 Bi3 IDI Ree EN SEXUS gt BR3 Bg RI COM1 e A18 D24 nie DATE 16 _ gt cen Dial ABI Kr RE id 10 soniye bie DT i BRST 4 5 2 epsr DMARIfF IDMAR B pal 2R2 COM e D23 RA ER TAS i a Hu sd A D23 DDRI7 DATATI i DMARZPC8 KO IDMARZ B 1 An 3ha I Aigl B24 D12 ID18 A osi 22 ADDR18 DATAS men 1 MS0 Mw so
4. A B C D KEEP ALL OF THESE COMPONENTS OVER THE AGND PLANE e R65 C27 5 49K 100PF 1206 1206 R62 R66 11 0K 3 32K 1206 1206 e e e THE GND AND AGND PLANES SHOULD GO FROM PIN 10 to PIN 20 of U3 DAC LEFT c35 ne CT7 0805 2 UB 68UF 6040 TOPF i 1 f rci bo DAC E L V 026 NTM U3 680PF SOIC8 TO ay our 16 OUTL 549 ue 165K f334 256 eum OU e e e X2MCLK l MCLKI MCLK pigra f SUE C Bak O eok oura OUTA 2 74K SADPF L LRCLKI 201 RCLK 1206 1206 Tm 76DATA FILTRI e LABEL LINE OUT I kan 19 o sav fi i C ID VRE AD e pe 9 e ams mart Lte Lgu citum SI ET DATA ZEROR i on add tt X L LOOPBACK LEFT C i l a 4 LL _____ LOOPBACK RIGHT C i l p RESET RESET e TON TOK R70 C 0805 e DEEMP 5 49K TO0PF 7 mE 1206 1206 i kin x T OK 3 40K 1206 1206 e 2PM o e e SSO C E DAC RIGHT m S30PF T sa R75 KA 0805 amp ee 604 0 T re 7 FIL bu 1206 l d a lon a SLAVE MODE SK sa 1 65K MCLK IS 256 x Fs bu l 7 l 48 kHZ SAMPLE RATE IS I F MODE 5V ASV ASV R73 C32 2 74K 220PF 1206 1206 LLL o C142 C143 C153 QAUF 0 1UF QAUF T 0805 J 0805 T 0805 NX AG D Va ATA AD1854 AD1854 NEAR U8 ANALOG 202 Ross Nashua NH 03063 DEVICES PH 1 8
5. Ref Qty Description Reference Manufacturer Part Number Designator 27 7 MOMENTARY SW3 9 PANASONIC EVQ PAD04M SWT013 28 13 0545X2CONO019 IJl 3 SAMTEC SFC 145 T2 F D A 29 2 DIP6 SWT017 SW2 SW10 CTS 218 6LPST 30 4 IRJAS8PIN J4 7 TYCO 1 16609214 1 CON RJ45 31 1 DIP4 SWTO018 SWI ITT TDA04HOSB1 32 1 IDC6X1IDC6X1 PS FCI 90726 406HLF 33 1 IDC7X2IDC7X2 ZP4 FCI 68737 414HLF 34 2 3 5MM J9 10 A D ELEC ST 323 5 STEREO_JACK TRONICS CON001 35 1 IDC13x201DC13x2 P6 BERG 54102 T08 13LF 36 1 5A RESETABLE Fl MOUSER 650 RGEF500 FUS005 37 15 0 1 4W 596 1206 R76 R91 R104 KOA 0 0ECTRk7372BTTED R107 R109 110 R113 R118 R161 164 R178 179 R202 38 4 YELLOWLEDO01 LED3 6 PANASONIC LN1461C 39 1 22PF50V 5960805 C63 AVX 08055A220JAT 40 2 330PF 50V 5 C25 C30 AVX 08055A331JAT 0805 41 4 0 01UF 100V 10 C1 2 C7 8 AVX 08051C103KAT2A 0805 42 10 0 1UF 50V 1096 C4 C142 143 AVX 08055C104KAT 0805 C145 149 C153 C249 ADSP TS201S EZ KIT Lite Evaluation System Manual A 3 Ref Qty Description Reference Manufacturer Part Number Designator 43 4 1000PF 50V 596 C10 11 C13 14 AVX 08055A102JAT2A 0805 44 27 10K 1 10W 5 R3 R26 R39 42 VISHAY CRCW 080510K0 NEA 0805 R77 R86 87 R89 R94 R100 R102 R108 R112 R116 R153 R158 160 R203 R215 R223 224 R235 236 R238 45 3 4 7K 1 10W 5 R5 R93 R188 VISHAY CRCW08054K70J
6. A B C D U19 L7 Q1 D5 C101 1UH MMBT3904 BAT54 1UF 4 5 INDO11 SOT23 SOT23D 0603 R200 GATE Da tse e y 3 0 3 6 L ONREG IN a gt gt 0402 S3 D3 1 0V 2 7 S R196 VR2 S2 D2 e 1 2K 2 1 B S1 Di 0402 m R198 ee BST eV 1UF 0603 12 b 0 7UH T 0603 em e L gi SOIC8 INDO10 EEA 10K FREQ SW e BAD e SOTD o 0402 6 15 ISHND DL R199 css VV 7 13 R204 0 U21 Mi SE gn ER cris ms i CSL 1 50K 0402 ter tcr C99 C92 terza tcres TT 11 0402 4 5 470UF 470UF 10UF 10UF 470UF 470UF MD D 1UF BS COMP e GATE DA ME NE 0805 0805 TY E DE 0603 SYNC PGNDI R195 363 D e C102 8 10 15 0K 2 7 e 22000PF GND FB 0603 R212 e 8g Doe e ape VV oos a Di e P16 C100 2 2PF C96 wi T 0402 47PF SOIC8 COPPER BG DGND3 TT 1206 U20 BGND C98 IG e Ad GATE DA e sa POK ivijii L PoKV DGND3 J s paf e NA s gt p2 e NA NY BGND ls ib BGND W5 COPPER SOIC8 K DGND3 Sm Miswe C62 R175 R174 C61 1UF 1 1K 1 1K 1UF D4 D M 0603 0402 0402 0603 QBATM OT23D 0 qe nnn 2 5V SOT23D 9 jose L___UNREG_IN e O wi gt l II VREG _ U16 2 5V L VREC VR3 O J R171 R173 p rr nm 0 20 14 0 D1A ISWI L4 0402 EE ESE 0402 Co pipe Se 10UH U DHI 232514 asa i GR b Rods 21 13 si e e e R170 Swi SW2 R172 C36 0 D in Bald 0 10UF ini C90 C91 C33 Fcr20 E 0402 0402 1210 10UF 1
7. Clock Mult Link Port Of Default 5x Link Port 1 Link Port 2 ink Port 3 4 SWE Link Port 3j Osc gt i JTAG Port External Bus log Devi interface Unt eo EZ Kit Expansion Interface 1 5V 3 3V 1 05V 2 5V 5V Link Port 0 3 A Link Port 1 mE gt VDD CORE Link Port y l Power Regulation gt VDD DRAM Link Port 2 nectar n 4 RJ45 VDD 10 Link Port 3 Zame Figure 2 1 System Architecture This EZ KIT Lite has been designed to demonstrate the capabilities of the ADSP TS201S TigerSHARC processor The processor is powered by three separate regulators for the core internal DRAM and IO The pro 2 2 ADSP TS201S EZ KIT Lite Evaluation System Manual ADSP TS201S EZ KIT Lite Hardware Reference cessor core voltage is set to 1 05V The internal DRAM is powered by an external 1 5V regulator Finally the external interface IO operates at 2 5V but can accept up to 3 3V levels A 20 MHz SMT oscillator in conjunction with a clock generator set to 5x supply the input clock to the processors The speed at which the core operates is determined by pull up and pull down resistors on both the clock generator U1 and the SCLKRAT2 0 bit of each of the processors For more information see Clock Mode Settings on page 2 12 By default the processor core runs at 500 MHz 20 MHz x 5 U1 x 5 SCLKRAT 2500 MHz External Port The external port EP connects
8. Position 1 Position 2 Position 3 Position 4 Audio Amplification Mode OFF OFF ON ON No amplification default ON ON OFF OFF For electret microphone use Processor Mode Selections SW2 The SW2 switch configures several processor strap pins which in turn set the processor s operating modes after power up or hard reset e Processor Boot Strap Settings e SYSCON SDRCON Mode Settings e Interrupt Enable Settings Link Port Width Settings Do not change the switch settings while power is being applied to the board Many of the strap pin settings can be re configured in software after the processor is powered up Refer to the ADSP TS201S processor data sheet at http www analog com Uploaded Files Data Sheets ADSP TS201S pdf for more information 2 6 ADSP TS201S EZ KIT Lite Evaluation System Manual ADSP TS201S EZ KIT Lite Hardware Reference Processor Boot Strap Settings Position 1 of the SW2 switch determines how the processor boots Table 2 3 shows the available boot mode settings Refer to the ADSP TS201S processor data sheet at http www analog com Uploaded Files Data Sheets ADSP TS201S pdf for more information Table 2 3 Processor Boot Strap Settings SW2 Position 1 SW2 Position 1 Boot Mode OFF EPROM boot default ON External boot or link port boot SYSCON SDRCON Mode Settings Position 2 of the SW2 switch determines how the processor
9. A e PGND n A FB PGND PGND N GND 4 ADP3331ARTZ C74 R192 C73 SOT23 6 47UF 340 0K 0 47UF 0805 0805 T 0805 R201 698 0K 0805 e e TP2 TP3 TP4 TP5 TP9 TP10 TP11 TP8 MHi MH2 MH3 MH4 MH5 O o O O 0 0 O OS A ama SY NY NY NA NA m 5V ASV UNREG IN Q Q H e R178 FER3 0 600 VR6 1206 1206 Ni OUT e VO PA mi e An OUT SHON 8 OUT3 M1 M2 M3 M4 M5 TB ge il m e eN 4 ADP3336ARMZ R190 C70 C54 C72 RUBBER FOOT RUBBER FOOTRUBBER FOOTRUBBER FOOT RUBBER FOOT MSOP8 210 0K O 4 7UF 1UF 1UF MSCO09 MSCO09 MSCO09 MSCO09 MSCO09 0805 T 0805 T 0805 T 0805 C71 1UF T 0805 R191 64 9K 7 0805 AGND e e ANAI OU l 20 Cotton Road Nashua NH 03063 DEVICES eu 1 800 AanALocD Title ADSP TS201S EZ KIT LITE Size Board No A01 78 2002 Rev Date 1 10 2007 10 57 Sheet 13 of 15 A B C D
10. E L B x E x E Pal THE GND AND AGND PLANES SHOULD GO FROM PIN 8 to PIN 21 of U9 e R179 ASV ASV ASV ASV 3 3V 5V O O O O x O 1206 WIV Va fl KA L a E iG Leg n lap lan Los WHEN USING AN ELECTRET MICROPHONE 0805 08 0805 0805 0805 0805 PLACE RESISTOR BETWEEN AD1871 and AD1854 A Tg rIgnE 4 Russ REF AUDIO e O R156 1206 20 Cotton Road E Y ANALOG o a Nashua NH 03063 4 R150 rl Be WAUDIO IN RIGHT A 3 AM N Z DA AE PH 1 800 ANALOGD d 2 7 AUDIO IN LEFT E ZAG D AGND AGND AGND DEVICES a AI A A A A 3 6 NR AWPOUT 773 NEARUG NEARU7 NEARUZ6 AD1871 AD1871 O AD1871 x ADSP TS201 S EZ KIT LITE P MENE AMPOUT ZI a ns TA y AUDIO IN eee VEE TL Size BoardN R L Fe mn INL AMPINI IN A JAY Wa 1ze oar 0 A01 78 2002 ev C 2 1C Date 1 10 2007 10 57 Sheet 8 of 15 B C D _ KEEP ALL OF TH ESE COMPONENTS OVER THE AGND PLANE
11. gt BK FB7 MC14 BK2 FB1 MC13 UE i MiCPLD MISC8 1 Dos L TTTTGPLD M cama FB7 MC1 5 GCKO BK2 FB2 MC1 GTS CELDA 2 3 ICPLD MISC10 1 i Ima mazet 77782 iri 38 8 CPLD MISC11 11 12 TDO LI L MCLKI lt IMCLKS 1 L AUDIOCLKI BK FB8 MC2 GCK2 BK2 FB2 MC3 GTS3 SS A i ene 7 R206 L C PLD MISC261 0 BKi FB8 MC5 DGE BK2 FB2 MC4 CPLD MISGIS 13 506 BOUK SIN eki FBs MC13 BK2 FB2 MC5 GTSO CPLD MISC 13 S ES TER AAA a ac eee mou ak FB2 MOIS GTS1 GAD MM R207 ki MOLK SIM BK1 FB8 MC15 BK2 FB2 MC167 CPLD MISC19 19 po gt ES 43 138 CPLD MISC21 21 22 0805 nato ii XILINX BK FEM ES a L Ja Ii LRCLKI lt WMILRCLK S l SBK1_FB9_MC2 BK2 FB3 MC4 dido A 5 uou BE FBS MEIS CoolRunner ll ko Fea jiet CPLD_MISC25 25 26 EN 7 L al BS ai pd TT L _ ee ee ee X DR KI FB9 MC16 CPLD BK2 FB3 Mci2 29 WIICPLD Misco PAS add eki FB10 MC1 BK2 FB3 MCc1634 uCPLD Misca a e rie a ke av E Seki FB10 MC2 BK2 FB4 MC1 M ICPLD MISC6 23 morn 46 10 re R203 DSP RESET THAN Y Bki FB10 MC4 BK2 FB4 MC2 MiCPLD MISC8 1 gana wei di a e Mm DSP JTAG HEADER RESET LI KI FB10 MC14 BK2 FB4 MC3 MICPLD MISCTO st gk1 FB10 MC15 BK2 FB4 MC4 MICAID MISGI2 3 DA EMULATOR SELECT 595 K1 FB10 MC16 BK2 FB5 MC2 33 Bia FB11 MC1 BK2 FB5 Mc3 32 Fi TMS gt ITMS mal
12. C167 C181 C183 C202 205 C216 C218 220 C227 C232 C240 C242 82 3 10K 1 16W 596 R184 R189 VISHAY CRCWO40210KOFKED 0402 R197 83 6 01 16W 5 0402 R170 173 PANASONIC ERJ 2GEOROOX R199 200 84 1 1 2K 1 16W 5 R196 PANASONIC ERJ 2GEJ122X 0402 85 2 4 7K 31MW 5 RN3 4 CTS 746X101472 P RNET8 86 14 499 0 1 10W 190 R23 R25 R45 VISHAX CRCWO0805499RFKEA 0805 R111 R124 R124 R133 R140 146 R154 87 2 100UF10V 10 C CT20 21 AVX TPSC107K010R0075 88 44 1000PF 50V 5 C67 C168 180 AVX 04025C102JAT2A 0402 C186 C188 196 C206 215 C217 C226 C233 236 C243 246 89 1 64 9K 1 10W 190 R191 VISHAY CRCWO080564K9FKEA 0805 90 2 57 6K 1 4W 196 R147 148 VISHAY CRCW120657K6FKEA 1206 ADSP TS201S EZ KIT Lite Evaluation System Manual A 7 Ref Qty Description Reference Manufacturer Part Number Designator 91 1 210 0K 1 4W 190 R190 VISHAY CRCWO805210KFKEA 0805 92 14 1UF16V10 0603 C37 C41 C44 PANASONIC ECJ 1VB1C105K C46 C60 62 C86 C93 95 C101 C105 106 93 1 68PF50V 5960603 C53 AVX 06035A680JAT2A 94 1 470PF 50V 596 C52 AVX 06033A471JAT2A 0603 95 2 100K 1 10W 596 R169 R183 VISHAY CRCW0603100KJNEA 0603 96 1 01 10W 5 0603 R105 PHYCOMP 232270296001L 97 1 101 10W 5960603 R198 VISHAY CRCW060310ROJNEA 98 2 4700PF 16V 10 C88 C97 DIGI KEY 311 1083 2 ND 0603 99 1 10 0K 1 10W 1 R211 DIGI KEY 311 10 0KHRTR ND 0603 100 1 680PF 50V 5 C65 PANASONIC ECJ 1VC1H681
13. Iyon vss 4 33V JAW gay e onz vss 4 e yppe vss e e ona vssa e 4 vos vssa e vpn vssdP e von4 vss a 5 R155 0 3 6 3 6 0805 e VDDO1 VSSQ1 e VDDO1 VSSQ1 E SDO A A AA d A i C113 C112 C109 MSSDIO 1 lt gt n gal TI OAUF O TIT OAUF 0 01UF vppae vssq2 2 6 vppae esq mp OE ASA 0402 0402 0402 yppas vsso3 e e yppas vsso3 e e Vppa4 vssq4P P a e Vppa4 vssq4P a MssDi s Vppas vssasit e e vopas vesaf EEE e vppas vssos gt 6 e yppae vssos gt e e once n riti NA e vppa7 vsso7 e e yppaz vsso7 e not so critical Bl BG kepi ai m SN74AHC1G00 SN74AHC1G00 AT49BV040 TSOP86 TSOP86 3 3V U 3 3V Y mi A Na Ne ANALOG 2 Cotton Road e e Nashua NH 03063 DEVICES eu 1 800 AanALocD GOIUF cour OMUR GolUF GUR 0 01UF Sour cour ODUR ODUR GOIUF GOIUF 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 Title AD S P T S 201 S EZ KIT LITE e e e e e e e e M E M O RY Size Board No A0178 2002 Rev SDRAM SDRAM G a 2 1C Date 1 10 2007 10 57 Sheet 7 of 15 A B C D PLACE NEAR CONNECTOR CTS 10UF 576K 57 6K 1 ei bu NL ABPR 73 pe TRY TO KEEP ALL
14. xviii Accessing Documentation From Web serrat xix Printed BOURSE EA xix VisualDSP Documentation Set erario xix Hardware Tools Manuals coincida xix Picas aiio dd b diia kx ADSP TS201S EZ KIT Lite Evaluation System Manual CONTENTS Data Sheets 0 000 xx Notation Comentions mall cub kdo a Sa ob boh ha d A aa Op xxi USING ADSP TS201S EZ KIT LITE PES COM M 1 2 Debout Gor pirati i e E ko patat 1 3 Installation and SESSION 1 5 Evaluation License Restrictions sessirnar 1 7 A ik ak ka a a kk kk uk ik 1 7 CORAN IES resar A ieee 1 8 Eb EK nt l kt ak ks olay pelin rn 1 9 ko FLAG PIOS aaa 1 10 NAN ANE epa QI ik ki e rl A a A BE EQ kell Aadio IS eae ank n kak a a a a kaa a i ER MER 1 12 Processor Link Porte it aki od ki k a ik kk bk ek kak kk kk ek kk kk 1 12 E ample PS one pk batan i 1 13 Flash Proprmmesr i iia 1 14 ADSP TS201S EZ KIT LITE HARDWARE REFERENCE ANN At io a ae ana 2 2 Pl Poit ej 2 3 Expand MADE i 2 3 JTAG Emulation Port datt an anlasa 2 4 Switch Settings iii kk kk kok a kk kek kk ik kk kk kk kk A 2 5 Audio Amplification Selection SWI corn 2 5 vi ADSP TS201S EZ KIT Lite Evaluation System Manual CONTENTS Processor Mode Selections SW2 L eee 2 6 Processor Boot Strap EMOS rca 2 7 SYSCONISDRCON Mode Settings siii 2 7 Stra c Enable MO A se b UR 2 8 Link Port Width Settings unci n 2 8 FLAGS and TIROS Switch Seccinus 5 W 10 sesa avansman
15. 2 1 MMBT3904SOT23 Q1 MOUSER 512 MMBT3904 6 2 MT48LC4M32B2 U24 25 DIGI KEY 557 1196 1 ND TSOP86 7 1 IDT5V928PGI UI IDT IDT5V928PGGI TSSOP24 8 1 TS201S U10 ATMEL AT49BV040B 70JU AT49BV040 U10 9 4 LMV722MSOIC8 U6 8 U26 NATIONAL LMV722MNOPB SEMI 10 1 TS201S XC2C384 U4 XILINX XC2C384 10TQG144C ADSP TS201S EZ KIT Lite Evaluation System Manual Ref Qty Description Reference Manufacturer Part Number Designator 11 1 FDC658PSOT23 6 U15 FAIRCHILD FDC658P 12 2 FDS9926ASOIC8 U16 17 MOUSER 512 FDS9926A 13 2 IRF7832 SOIC8 U20 21 INTERNAT IRF7832PBF RECT 14 1 IRF7821 SOIC8 U19 INTERNAT IRF7821PBF RECT 15 1 20MHzOSC003 U18 DIGI KEV SG 8002CA PCC ND 20 000M 16 1 ADM708SARZ U5 ANALOG ADM708SARZ SOIC8 DEVICES 17 1 ADP3331ARTZ VR4 ANALOG ADP3331ARTZ REEL7 SOT23 6 DEVICES 18 1 AD1854JRSZ U3 ANALOG AD1854JRSZ SSOP28 DEVICES 19 1 AD1871YRSZ U9 ANALOG AD1871YRSZ SSOP28 DEVICES 20 1 ADP3336ARMZ VR6 ANALOG ADP3336ARMZ REEL MSOP8 DEVICES 21 2 ADSP TS201SA U11 12 ANALOG AD91032Z BP576 DEVICES 22 1 ADP1864SOT23 6 VRI ANALOG ADP1864AUJZ R7 DEVICES 23 1 ADP1823LFCSP32 VR3 ANALOG ADP1823ACPZ R7 DEVICES 24 1 ADP1821QSOP16 VR2 ANALOG ADP1821ARQZ R7 DEVICES 25 5 RUBBERFOOT Ml 5 MOUSER 517 SJ 5018BK 26 1 PWR J8 SWITCH RAPC712X 2 5MM JACK CRAFT CON005 A 2 ADSP TS201S EZ KIT Lite Evaluation Svstem Manual ADSP TS201 EZ KIT Lite Bill Of Materials
16. 2 2 T TX port 1 12 ADSP TS201S EZ KIT Lite Evaluation System Manual I 3 INDEX U V USB VisualDSP cable 1 3 documentation xix connector ZJ1 2 22 environment 1 5 interface 1 9 2 7 2 21 online Help xviii monitor LED ZLED3 2 18 voltage regulators xi 2 2 1 4 ADSP TS201S EZ KIT Lite Evaluation System Manual
17. 22 Ato Din I LA E24 DDR10 DATA108 9 4010 0805 RE E TA S CTAN E23 aia DT Ut EIS S E ENIM mide ADDR11 DATATI inin 3 3V B6 I SN L Ala F2 DDRI2 patar 4012 c18 cz s noob I l i Ata Far C14 IDB T LRD RAD GPA lt OPA t eee als wa ADDR13 DATA13 i jes A18 AD7 poun LO ISCLK DSP B i ae vrl TEE BS WRL d 5 WRL DPA BRA CR aa MN SL S Ls s A E DDRI4 DATA14D14 DIL ae BIg 50 2 CTA E21 A13 ID LWRH O WRH 0805 L A E2lippais DATA15 Ll dgio C17 AAT ELE 6 L A DAL D24 B13 Die 7 LACK HA ack DMARO JiDMARO i VDD ao TJ ISDRAM CLKO i ADDR16 DATA16 pwen D18 AB7 E es 7 DEUS ii 0 A17 p23 C12 DIZ 1 I BRST lt 5 BRST DMAR1 IDMART A l VDDQ1 Qi ADDR17 DATA17 A E Res ACE en 10 ELE ADDR18 DATA18 E ss ADE pekala e ogi 25 i El kwen MSO 0 DMAR3 lt _ IDMAR3_A VDDQ3 8 AS pRi9 BATAN T yele En ee e i T ws e e e k DASO 15207 71 MS1 81 VDDQ4 04 AAA ISDRAM CLK1 LA C21 DDR20 DATA20P 2 D20 L imiz hcs gt CREE X m Ti e ias DAS A23 bii IBATI L MSH SH IOWR gt OWR amw R34 E ADDR21 DATA21 wa back m hos Era 2 18 22 kor io DT RS AZI D11 16227 71 L BMS BMS IORD gt ORD X1 I Q 0805 ADDR22 DATA22 wa hag fond a EP E a oe B A23 B21 At D23 I IOEN gt HOEN 4 X2 0 Q7 ICLKOUT EXP 4 2 ADDR23 DATA23 ll SAR SAK
18. I L2CLKOUT P AUI _HIL2CLKOUT_N A D3DATIO P Bil gt 3DaTIO_P L3DATOO P gt IL3DATOO P B 1 L LEDATIG N BI AE spario N LaDATOO NC 5 PAT NB R31 4814 spar p LaDATO1 PAB1O 100 0 AMA spar N L3DATO NAATO 177777 7Y3BATIO P E aa 7 i 1 gen SL 3DAT 2 P L3 DATO2 PADTI L3DATIO P BEA AMAYA Y MILSDATIO N B 1 kaki an mi soi ann A o OVVVO DC HERR dem oso n an M SDATIZ N L3DATO2 NAC R33 P2 3DATI3 p LaDATO3 p B 100 0 L AC12 DATIS N LaDATO3 NAAT taj a MEM Me a 4 2 LCLKIN P BI 5 AB gcLKIN p LaciKo phD10 gt ILBCLKOUT PB 1 E L3CLKIN P BIIE AA MOILSCLKIN N B viec d lou AC13 AC10 e e em e i ee ua E Ul LSCIKIN N BI gt ac KIN N L3CLKO N gt ILBCLKOUT NB i DACKO Bl lt AC S SACKO Lack lt LSACKLB 1 L L3BOMPI BI yo ARISI 3BCMPI L3BCMPO gt IL3BCWPOB 2 5V DSP B O BP576 ANALOG 2 Coton Road R235 R236 R237 R238 Nashua NH 03063 10K 10K 10K 10K DE V ICES 4 SAN 0805 0805 0805 0805 PH 1 800 ANALOGD DNP Title ADSP TS201S EZ KIT LITE DSP LINK PORTS Size Board No Rev Date 1 10 2007 10 57 Sheet 4 of 15
19. LED1 The green LED LED1 indicates that power is being supplied properly to the board Reset LED LED8 When LEDS is lit it indicates that the master reset of all the major ICs is active 2 16 ADSP TS201S EZ KIT Lite Evaluation System Manual ADSP TS201S EZ KIT Lite Hardware Reference POWER RESET RESET LED1LED8 SW3 ADSP TS201S EZ KIT LITE DESIGNED BY ANALOG DEVICES INC PART NUMBER ADZS TS201S EZLITE Lis De SAC m pil Elis el Figure 2 4 LED and Push Button Locations FLAG LEDs LED3 6 The flag LEDs connect to the processor s programmable FLAG pins FLAG2 and FLAG3 The LEDs are active high and are lit by an output of 1 from the processor Refer to Programmable FLAG Pins on page 1 10 for information on how to utilize the flags when programming the processor Table 2 18 shows the FLAG signals and corresponding LEDs ADSP TS201S EZ KIT Lite Evaluation System Manual 2 17 LEDs and Push Buttons Table 2 18 FLAG LEDs FLAG Pin LED Reference Designator FLAG Pin LED Reference Designator FLAG2 A LED4 FLAG2 B LEDS FLAG3_A LED6 FLAG3_B LED3 USB Monitor LED ZLED3 The USB monitor LED indicates that USB communication has been ini tialized successfully allowing you to connect to the processor using VisualDSP If ZLED3 is not lit try resetting the board and or reinstalling the USB driver When VisualDSP is communicating with the EZ KIT Lite t
20. Manuals may be ordered by title or by product number located on the back cover of each manual Data Sheets All data sheets preliminary and production may be downloaded from the Analog Devices Web site Only production final data sheets Rev 0 A B C and so on can be obtained from the Literature Center at 1 800 ANALOGD 1 800 262 5643 they also can be downloaded from the Web site To have a data sheet faxed to you call the Analog Devices Faxback System at 1 800 446 6212 Follow the prompts and a list of data sheet code numbers will be faxed to you If the data sheet you want is not listed check for it on the Web site XX ADSP TS201S EZ KIT Lite Evaluation System Manual Preface Notation Conventions Text conventions used in this manual are identified and described as follows Example Description Close command File menu Titles in reference sections indicate the location of an item within the VisualDSP environment s menu system for example the Close command appears on the File menu this that this that Alternative required items in syntax descriptions appear within curly brackets and separated by vertical bars read the example as this or that One or the other is required Optional items in syntax descriptions appear within brackets and sepa rated by vertical bars read the example as an optional this or that this Optional item lists in syntax descript
21. 0603 101 1 2200PF 50V 596 C98 PANASONIC ECJ 1VBIH222K 0603 102 4 470UF 2V 2096 E CT16 CT19 PANASONIC EEF SEOD471R CT22 23 103 2 15 0K 1 16W 196 R193 R195 DIGI KEV 311 15 0KHRTR ND 0603 104 1 24 9K 1 10W 196 R92 DIGI KEY 311 24 9KHTR ND 0603 105 1 47UF 6 3V 1090 B CT14 NIC COMPO NTC T476K6 3TRBF NENTS A 8 ADSP TS201S EZ KIT Lite Evaluation System Manual ADSP TS201 EZ KIT Lite Bill Of Materials Ref Qty Description Reference Manufacturer Part Number Designator 106 9 2 0K 1 16W 196 R37 38 R88 PANASONIC ERJ 3EKF2001V 0603 R121 R212 R214 R216 218 107 1 0 051 2W1 1206 R165 SUSUMA RL16326 R050 F N 108 3 10UF 16V 1096 C36 C55 C110 AVX 1210YD106KAT2A 1210 109 1 GREEN LEDO01 LEDI PANASONIC LN1361CTR 110 1 RED LEDO01 LED8 PANASONIC LN1261CTR 111 2 1000PF 50V 5 C47 48 AVX 12065A102JAT2A 1206 112 2 2200PF 50V 590 C22 C24 AVX 12065A222JAT050 1206 113 1 0 1UF 50V 20 C5 AVX 12065E104MAT2A 1206 114 2 100K 1 8W 5 R58 59 VISHAY CRCW1206100KFKEA 1206 115 6 270 1 8W5 1206 R79 82 R90 VISHAY CRCW1206270RJNEA R151 116 2 604 0 1 8W 1 R74 75 PANASONIC ERJ 8ENF6040V 1206 117 6 1UF 20V 20 A CT8 13 AVX TAJA105K020R 118 1 255 0K 1 10W 1 R168 VISHAY CRCWO6032553FK 0603 119 1 80 6K 1 10W 196 R167 DIGI KEY 311 80 6KHRCT ND 0603 120 1 6 8UH 2596 L3 DIGI KEY 308 1328 1 ND IND009 121 1 4A SSBA3L D7 VISHAY SSB43L DO 214AA ADSP TS201S EZ K
22. 10K 10K 1206 0805 lt lt 0805 lt 0805 lt 0805 R87 10K U13 LABEL FLAGO B ins U30 E 2 18 R103 5 6 Siai 1Y118 100 aan 4 16 Ut4 RESET 1A2 1Y2 0805 2 74LVC14A ias 6 T e Bi Do SOIC14 1A3 113 3 3V SW6 8 12 O T4LVC14A U30 o in 1yalE MOMENTARY de SEA 9 8 A L FLAG2 Ai LU avi ALA 7ALVC14A eii i b SOIC14 Lo FLAG2 Bi A2 2Y2 v uoo ALTA M ava ji yo 17 FLAGS B Tons 2y4P 74LVC14A i NY SOIC14 OE FLAG3 B FLAG3 A AUDIO FLAG2 B FLAG2 A POWER 19 LED3 LED6 LED5 LED4 LED1 U30 e OoE2 YELLOW YELLOW YELLOW YELLOW GREEN 3 3V 13 12 TG LEDOO1 TG LEDOO1 TG LEDOO1 TG LEDOO1 TG LEDOO1 T4LVC14A SSOP20 SOIC14 l R79 R80 R81 R82 R151 anna 270 270 270 270 270 R102 MO AN 1206 1206 1206 1206 1206 10K 1 12 0805 C HM 2 IFLAGOA I LABEL FLAG1 B 2 n e el R101 gt FAA CO pou 0805 a m DO HAB LABEL POWER 9 8 4 B eeetei O 0 oo E gt mise LABEL FLAG3 B LABEL FLAG2 B SW7 5 8 e else 3 3V 3 3V 3 3V 3 3V 3 3V SWT013 a ae L IRQ0 A Sg M 2 IRQO A a A A A A LABEL FLAG3 A AUDIO LABEL FLAG2 A MOMENTARY ripe eral pope 6 L 3QQ A ont 1 L JAQOBSiHl81 v MN RME 7 TA SWTO17 l T 20 Cotton Road Switch ON Pushbutton will drive DSP net C114 C118 C111 C120 C144 ANALOG 0 1UF 0 1UF O1UF 04UF O 1UF Switch OFF DSP net can come from an external source 0402 0402 0402 0402 T 0402 Nashua NH 03063 NA DEFAULT All Switches ON DEVICES eu 1 800 A
23. B now is part of the online Help The PDF version of the ADSP TS2018 EZ KIT Lite Evaluation System Manual is located in the Docs VEZ KIT Lite Manuals folder on the installation CD Alternatively the schematic can be found on the Analog Devices Web site www analog com processors What s New in This Manual This edition of the ADSP TS201S EZ KIT Lite Evaluation System Manual documents ADSP TS201S EZ KIT Lite compliance with the RoHS and WEEE directives ADSP TS201S EZ KIT Lite Evaluation System Manual xiii Technical or Customer Support Technical or Customer Support You can reach Analog Devices Inc Customer Support in the following ways Visit the Embedded Processing and DSP products Web site at http www analog com processors technicalSupport E mail tools questions to processor tools support analog co E mail processor questions to processor support analog com World wide support processor europe analog com Europe support processor china analog com China support Phone questions to 1 800 ANALOGD Contact your Analog Devices Inc local sales office or authorized distributor Send questions by mail to Analog Devices Inc One Technology Way P O Box 9106 Norwood MA 02062 9106 USA Supported Processors The ADSP TS201S EZ KIT Lite evaluation svstem supports the Analog Devices ADSP TS201S TigerSHARC embedded processors xiv ADSP TS201S EZ KIT Lite Evaluation System Manual Preface Product
24. DSP B RX kose poo l 90 B9 90 B9 CONOTS L L3DATO P Bi C 4 DSP B RX CONO19 CONO19 5 181 9 L L3ACKO B o o Lou LSDATIO N BI C 3 L I3BCMPEBI C 7 NA NO NA 3 CON RJIS ANAI OU l 20 Cotton Road Nashua NH 03063 DE V IC ES PH 1 800 ANALOGD Title ADSP TS201S EZ KIT LITE Size Board No Rev Date 1 10 2007 10 57 Sheet 11 of 15 A B C D 3 3V CS PLACE CLOSE TO OSC C115 0AUF T 0402 R129 22 0805 OUTP A A A ME ADD OGIK 777 Nb OSC003 12 288MHz U4 R208 5 1 35 0 e CPLD MISCi4ilI SKI FB7 MC1 CDRST P6 E L OPD MSCI Bk FB7 Mc4 BK2 FB1 MC3 GSR A cee F MiCPLD MISC i TDO Al GRD MISCT8IM BK FB7 MC5 BK2 FB1 Mcail aS 3 MIICPLD MISC4 1 E oe i eee PLACE CLOSE TO CPLD 777 G ID BGA e rer Mo12 Gok BR rei Mot2 e cpio misos 5 B ORI iste pen a 31 139 CPLD MISC7 7 B mr oo LOL R205 gout CPLD MISC22i1lI
25. EBKa FB24 MC2 BKA FB18 MSPP OO FLAGS A 7 Title ADSP TS201S EZ KIT LITE ea rin i l 6 57 5 U CPLD TMS M BkK3 FB24 MC12 BK4 FB18 MC12 gt IDMARO Lia gt mg B DRM IDCEX 56 B ee JTAG CPLD FOR AUDIO BK3 FB24 MC14 BKA FB18 MC13 J MSI Size Board No Rev XC20384 a XT TQFP144 C A01 78 2002 21C Date 1 10 2007 10 57 Sheet 12 of 15 A B C D D2 FI FER5 MBRS540T3G 5A 190 5A FUS005 FER002 SMC a te ot gt UNREG IN _ 1 2 e D1 C48 Toco MBRS540T3G 1206 SA SMC CONDO5 e JINREQ IN I Ka C UNEN im C47 1000PF FER7 C55 C51 1206 600 10UF TO 10UF 1206 77 1210 0805 NAVY DNP e o FER6 600 F 7 1206 ya S GN 0 ANAY e Ed R165 R92 VR1 0 05 24 9K 1206 FDC658P 0603 5 TP7 8 3V Fi 1 IN U15 O O SHGN e COMP 4 1 cs L3 R166 fi t de l I 6 R105 INDOO9 0805 7T 0603 T 0603 PGATE 0 5 pe 1 8V GND 0603 e e e O R167 2 ADP1864 6 80 6K SOT23 6 0603 3 3V e Disi tema Fotis C56 O R234 SOT23 6 DOGMA 47UF 22UF 1UF 332 0K ZN BO MM B T 0805 0805 DNP w2 COPPER VR4 rc R202 e INPUT ERR T e sp OUTPUT
26. Information You can obtain product information from the Analog Devices website from the product CD ROM or from the printed publications manuals Analog Devices is online at www analog com Our Web site provides infor mation about a broad range of products analog integrated circuits amplifiers converters and embedded processors MyAnalog com MyAnalog com is a free feature of the Analog Devices Web site that allows customization of a Web page to display only the latest information on products you are interested in You can also choose to receive weekly e mail notifications containing updates to the Web pages that meet your interests MyAnalog com provides access to books application notes data sheets code examples and more Registration Visit www mvanalog com to sign up Click Register to use MyAnalog com Registration takes about five minutes and serves as means for you to select the information you want to receive If you are already a registered user just log on Your user name is your e mail address Processor Product Information For information on embedded processors and DSPs visit our Web site at www analog com processors which provides access to technical publica tions data sheets application notes product overviews and product announcements ADSP TS201S EZ KIT Lite Evaluation System Manual xv Product Information You may also obtain additional information about Analog Devices and its products
27. LICLKIN P A BH AA AA 12 1ACKO L1ACKI T24 A BCMPI L1BCMPO R15 100 0 BUE AD 1 apatIo P L2DATOO P L LEDATIO P Ar AMY AC sD ATION L2DATOO N 1058 AB20 ATH P L2DATO1 P BUS AZO 5 ATH N L2DATO1 N L DAT P AE AMA A L2DATH_NCA AD20 bariz P L2DATO2 P 1008 AC20 ATI2 N L2DATO2 N ENE L API A opam s P L2DATO3 P LI L2DATI2 PA BH AAA AC19 5 ATIS N L2DATO3 N 100 0 ABIA 2cLKIN p L2CLKO PI DUE AATS 5 LKIN N L2CLKO N 3 ns L2DATI3 PANNAN AB2II sacko L2ACKI 1008 _ AP23 5 BCMPI L2BCMPO 0805 DNP LI E2CLKIN P ANN AMM ADIM SDATIO_P L3DATOO P AC1 aDAT o N L3DATOO N AB14 e AB 3pATH P L3DATO1 P MA apart N L3DATO1 N P 3 spar p L3DATO2 P R20 M spaTI2 N L3DATO2 N DEDE 12 sparis p L3DATO3 PI aros zd EEEE AC12 3DATI3_N L3DATO3 N L L3DATIO P Ar YA A L3DATIO_N A i va e ADIS DO EOS Ue a isi a ko L3CLKINP AI TOU L3CLKIN P L3CLKO P 100 0 L LSCUKIN NAT A 8CLKIN N L3CLKO N ONE LO LSAGKO A lt lt ACISLSACKO LSACKI L Y EK N INA E O E L3BCMPO 2 5V_DSP_A BP576 4 Na 4 R108 R116 lt R119 lt R153 10K 10K 10K 10K 0805 0805 0805 0805 DNP m m L ____LOBCMPI A 1 QLBOMPIA W 1 BOMPLA NN 177 LSBOMPLAI EH AA24 AA23 lt lt gi LIDATOO P A l io LIDATOO NA l uo x Ciba oi EA Sooo ma EEN 1 RE D NA ZI E EK BAT met M GKOULN A 3 po A KLA paz AMICIBOMPO A ABIG EDT PAT 1 pate MIDATODN A 1 ADU APA II AOU MIEDRIOCW A 7777
28. as ka e a ul ED m ie eos ck ru vr SE A11 A 2h r 22 ME Phan pa11 ABI 4 ta p m M2 paige PI DQ1260 AW e zi 5 ADT Ud Yi a ELE A13 PAYS 222 0 bare Bi PAYS 22 Ba ii 2 AZI 271 ko A14 L A a Dor D14 _ LAA a DQ1493 DARI 3 e aue A15 pais Pe pais ror B Bonte L TEE SAR L ue A16 SDRAM CS 2065 por PIEL FT SDRAM CS les DO16 PKT 30 rin TI onee mW M7 V SDCREI 5 S cke pare IDU SDCKE M CKE DQ172 PIE 3 a 68 B4 IDI l A lt 2 68 B4 men A18 i SDRAM CLKOI f 5 LK DQ18 ien i SDRAM_CLK1 Oek DQ18 j 081 ie rini Ra a TI ud ie sani ii ii MSO y po pase PS paig ceri p yt y 225E issa aa L PEN BMS py 2 y Pa z m L SDWE ME p s 1040 L SDWE M WW pazo Jac HC1G00 HC1G00 RD D E 18 bg ID21 1 18 39 SOT23 5 SOT23 5 Sta 31 i CAS gt as DQ21 a D cas DQ21 WRU ME ADO lI aduer i RAS RAS pasa 022 n RASIN Ras Da22 Doa Dog fe Eze paz PLCC32 IDDA ji L LDQM amo Mg TAT L HDQM amo DQ24 9 Mos l Mt pass 102 hom paz5 non 285Qm2 pape 2026 _ 285Qm2 paze D27 71 noms bas Po P27 ams DQ270 Dog l Dazge 1228 _ paese iD29 I c pazge 1029 No DQ29 D230 MO Yen baso P30 nice paso mas 1 ca poste D SNcs pas1P mer LA Ta Bess D Mas Nos 2nce VpD1 vssi 4
29. handles writes to the SYSCON and SDRCON registers Table 2 4 shows the available settings for each write type Refer to the ADSP TS201S processor data sheet at http www analog com UploadedFiles Data Sheets ADSP TS201S pdf for more information Table 2 4 SYSCON SRDCON Mode Settings SW2 Position 2 Position 2 SYSCON SDRCON Mode OFF SYSCON SDRCON one time writable default ON SYSCON SDRCON always writable i In emulation space the SVSCON and SDRCON registers can be written to as manv times as needed The USB debug monitor operates in emulation space and allows alwavs writable mode for these registers ADSP TS201S EZ KIT Lite Evaluation System Manual 2 7 Switch Settings Interrupt Enable Settings Positions 3 and 5 of the SW2 switch determine how each of the processors handles interrupts Table 2 5 and Table 2 6 show the available interrupt settings Refer to the ADSP TS201S processor data sheet at http www analog com UploadedFiles Data Sheets ADSP TS201S pdf for more information Table 2 5 Interrupt Enable Settings SW2 Position 3 SW2 Position 3 Interrupt Enable Mode for Processor A U11 OFF Disable interrupts level sensitive mode default ON Enable interrupts edge sensitive mode Table 2 6 Interrupt Enable Settings SW2 Position 5 SW2 Position 5 Interrupt Enable Mode for Processor B U12 OFF Disable interrupts level sensitive mode default ON Ena
30. internal 5Kohm pull up resistor CONTROLIMP 1 0 Driver Mode 00 Normal 01 Pulse Mode 10 A D Mode 11 Pulse Mode A D Mode DS1 has internal 5Kohm pull down resistor DS2 and DSO have internal 5Kohm pull up resistors DS 2 0 Drive Strength OUTPUT IMP 000 11 1 26 001 23 8 32 010 36 5 40 011 49 2 50 100 61 9 62 101 74 696 70 DEFAULT 110 87 3 96 111 100 120 PLACE A LABEL HIGH NEAR SW2 12 aras SO PLACE A LABEL FOR THE SIGNAL NAME NEXT TO SW2 PINS 1 6 0806 0805 SW2 ON KI m e RAM cS ken SA m pecu IET n a mi SO mn WEGE E a w SSS DIP6 SWTO17 All strap pins have internal 5Kohm pull down resistors during DSP reset Switch OFF Signal Pulled Low Switch ON Signal Pulled High BMS EPROM Boot External or link port boot BM Disable interupts level sensitive Enable interupts edge sensitive ITMROE 41 bit Link Port Data Width 4 bit Link Port Data Width BUSLOCK SYSCON SDRCON one time writable SYSCON SDRCON always writable indicates DEFAULT KEEP STUB TO THE SIGNAL AS SMALL AS POSSIBLE 777 LIBCMPO AI REALLY L1BCMPo B LIBCMPLAIK L L L2BCMPO AI C REALLY L2BCMPOLB ___L28CMPI AI C L3BCMPO A KI L L3BCMPO BI LI R134 R111 R114 499 0 499 0 499 0 7499 0 0805 0805 0805 0805 DNP DNP DNP ENEDREG A sr EA CI R2
31. kaj DA EMULATOR SELECT ie RI zu BKI FB11 MC2 BK2_FB5_MC13 DA EMUICATOROENG gt gt TGK P ids dap 3 4 DA EMULATOR EMU DA EMULATOR EMU i BkK1 FB11 MC3 BK2 FB5 MC15 5 6 DA EMULATOR TMS a TUE TRST gt ITRST 21 129 zz BKI FB11 MC4 BK2 FB5 MC16 i TDI gt HDI 20 la e Li B DAJEMULATOR TOK DA EMULATOR TCK d mes BKI FB11 MC5 BK2 FB6 Mc2 TO ip eco e Lr e 3 us DA EMULATOR TRST DA EMULATOR TRST BK1_FB11_MC12 BK2 FB6 MC3 7 EMU EMU JE viduis 11 12 DA EMULATOR TDI DA EMULATOR TDI EMU PBki FB12 MC1 BK2 FB6 MC4 T BA 7 uod e 23 14 DA EMUCATORATDO DA EMULATOR TDO DA GPO M Bk1 FB12 MC2 BK2 FB6 MC13 IDC 2 53 n ii i i 17 _ DA_GP1 F BK1 FB12 MC3 BK2 FB6 MC14 e _ RESET RESET 54 18 aot cn DA GP L Bk1i FB12 MC5 BK2 FB6 MC16 I ank DA SOFT RESET lt DA SOFT RESET lsem DA GP3 M 0805 A TQFP144 Y a 6 6 5 DEBUG AGENT U4 U4 D 0 23 1 8V fx BK4 FB13 MC3 3 3V TCK BK3 FB19 MC3 BK4 FB13 MC4 TDI ei 4 SHGN BK3 FB19 MC4 BK4 FB13 MC1 TD BK3 FB19 MC5 BK4 FB13 MC13 27 TMS C85 C84 C83 VDD BKi 101 BK3 FB19 MC12 BK4 FB14 MC1 0 01UF 0 01UF 0 01UF All USB interface is considered proprietary and has 0402 m 0402 7 0402 vpn BK1 102 XILINX END 1E 7853 FB19 MC13 BK4 FB14 MC2 been omitted from this schematic e von Bke 101 GND2 e BK3 FB19 Mc14 BK4
32. ooo po o NN im ms Cyl m i BR 0 7 RO LAM C20 DR24 pipe Pl Po No ee an DUASI 15357 21 BRI e DE ae D20ADDR25 DATApe I apo e b 9899 TP Te e vn ET UE BR2 IDO GND1 4 A A CI9 R26 DATA26P10 D26 _ b PAM 1537 71 BR3 ID1 So GND2 e Lo 019 ADDAT DATA27 10 DEL lia m v 15387 i BR4 ID2 S1 GND3 A ARD DpR2s DATAZa219 P8 m e ese BR5 GNDAl LA B20 DDR29 DATA29 9 1029 _ bi DA I 15307 71 BR6 SCLKRATO REF GND5 e 1 40 A19 DDR30 DATA30P9 4030 m KA per Torr BR7 SCLKRATI CU ET DATA319 1031 k l 0SC003 Do D B SCLKRAT2 ISCLKRAT2 A 1 TSSOP24 DATA32 wa kan MN ee EA hs D33 1 l BM A lt ro BM DATA33 pos min ACS Wi i ms a AM e Be D34 7 BOFF 5 BOFF CONTROLIMPO CONTROLIMPO 1 KA UNC DATA34 cal E to po ev i da AB4 ce IBSBTI BUSLOCK m APEBUSLOCK CONTROLIMP1 OO ICONTROLIMPi 1 NC2 DATA35 ann PLACE TEST POINTS NEXT TO EACH OTHER I R21Nc3 DATA3628 D36 Ie AA8 0 TA A R2 A7 D37 71 L HBRI l 5 MHBR DS0 JIDSOA Nc4 DATA37 ps AB8 U4 a R3 B7 1535 HBG HBG DS1 lt DS1A Snes DATA38 EES Mi mA lts NUN sa 1539 71 DS2 lt JIDS2A PLACE CLOSE TO EACH OTHER elimin j zi JIL 1 1 RAS 5 RAS DATA40D7 P40 _ spen dice aussi asesinos 15417 71 CAS ji GAS ENEDREG i patay eaP a e A A I ocu 4 EMU l
33. p2 IFLAG2 B E a E LSBCMPL AI KI 7 i D3 42 41 D2 42 41 44 43 8 Ca e e DS 44 43 1D4 44 43 46 45 cl L DA 46 45 1D6 248 5 48 A d D9j 48 47 D8 48 47 50 49 Raf d D 50 49 iD10 E 50 49 52 51 D13 52 51 IDI 52 51 54 53 darme ml D15 54 53 iD14 E 54 53 56 55 J6 I bid 56 55 ID16 56 55 58 57 O fBOFF 14 HE Disi 58 57 iD18 58 57 60 59 a 2 D21 60 59 ID20 60 59 62 61 3 LABEL DSP B TX i D23 62 61 iD22 62 61 NN 64 63 4 lm e m i DES 64 63 Das ii 64 63 il iii 66 65 5 DSP B TX poy IDE 8 Ga a eg a kaan RT Lo 2 P nl 2 Be BOE A i BUSCO 84 LB O HBR a 222zz2 Lm 029 68 67 iD28 68 67 E 70 69 7 i j1 ID30 A a l m ee SNO UM ug Dal TB p9 DOE IT ROA lt TH pa gt IRA 71 1 BMS 12 A gt IGPA e I Tu A a pin ES Lez z LR KI z d O RALL L MSO zi p IRD con Ruas 2 ia a L ROB KI a e gt qRQ0B 1 L MSI 2 P l LI psi e AG Oe 037 e 4 Ps D36 7 A LI ms e O Rag B 1 i e IWAL NA d l maa C J A 3 3 3 3513 HN 7772222 npa i D38l 78 77 iD38 q 78 77 pa 80 79 R ml 41 mao 1 mn Dat 80 79 iD40 80 79 MAGRI O 82 81 i D43 82 81 iD42 82 81 84 83 iere En J7 B D45 84 83 1D44 84 83 r EMAI 86 85 BRST T A pipes eme LEMA L gt E E L BAST L A eee NT 86 B5 Da 86 85 j 88 87 i atum L3CLKIN P a 87 4 e 88 B7 90 89 ea L3CLKIN N Bi C LABEL
34. port allows an emulator to access the processor s internal and external memory as well as the special function registers through a 14 pin header See TTAG ZP4 on page 2 21 for more infor mation about the JTAG connector To learn more about available emulators contact Analog Devices as described in Product Information For more information about the JTAG interface and JTAG custom board design refer to EE 68 found at the Analog Devices Web site 2 4 ADSP TS201S EZ KIT Lite Evaluation System Manual ADSP TS201S EZ KIT Lite Hardware Reference Switch Settings This section describes the function of the DIP switches SW1 SW2 and SW10 The locations and default settings of the switches are shown in Figure 2 2 SW 123456 E E In Bo 38 Se ig ug bs 55 S 88 as 23 Iz a 2n ANALOG E qg CES gt g 8 3 SWIOTARARAR 123456 e 8 6 a 2 Figure 2 2 Switch Locations Audio Amplification Selection SW1 The SW1 switch determines the amplification of right and left signals con nected to the LINE IN connector J9 A non powered electret microphone can be used by simply varying the switch setting to the values shown in Table 2 2 An amplification gain of a factor of 10 can be achieved by set ting the switch into electret microphone use ADSP TS201S EZ KIT Lite Evaluation System Manual 2 5 Switch Settings Table 2 2 Audio Amplification Selection SW1
35. space 1 8 N notation conventions xxi O oscillators U18 2 3 2 12 P package contents l 2 power connector J8 2 21 LED LEDI 2 16 regulators 2 2 supplv specifications 2 23 processor IDs l 8 l 12 2 10 2 15 programmable flag pins See flags bv name FLAGs push buttons See also push buttons bv name SWx diagram of locations 2 16 R registration of this product l 3 reset master LED8 2 16 processor 2 6 push button SW3 2 19 INDEX resistors diagram of locations 2 10 clock mode settings 2 12 control impedance selection 2 14 drive strength selection 2 15 processor ID settings 2 11 restrictions of the license 1 7 RJ 45 connectors 1 12 2 23 RX port 1 12 S schematic of this EZ KIT Lite B 1 SCLK pins 2 14 SCLKRAT2 0 pins 2 3 2 12 2 13 SDRAM interface 1 8 start end addresses 1 8 SDRCON registers 1 8 2 7 setup of this EZ KIT Lite 1 4 SOC registers 1 8 specifications of the power supply 2 23 SQSTAT registers 1 10 startup of this EZ KIT Lite 1 5 SW10 FLAG IRQ DIP switch 2 9 SWI audio amplification switch 2 5 SW2 DIP switch 2 7 2 8 SW3 reset push button 2 19 SW4 IRQO A push button 1 11 2 19 SW5 IRQO B push button 1 11 2 19 SW6 FLAGO B push button 1 11 2 18 SW7 FLAGI B push button 1 11 2 18 SW8 FLAGI A push button 1 11 2 18 SW9 FLAGO A push button 1 11 2 18 SYSCON registers 1 8 2 7 system architecture of this EZ KIT Lite
36. 00 AaNALoGD Title ADSP TS201S EZ KIT LITE Size Board No Rev Date 1 10 2007 10 57 Sheet 9 of 15 A B C D 3 3V KA 3 3V KA R89 10K 0805 LABEL IRQ A LABEL FLAGO A R94 R99 10K 100 0805 LA 0805 U14 U30 S T Do Do misi 100 swa Ut4 TALVC14A 74 VC14A m 0805 SWTO13 Rm 4 11 Don MOMENTARY f Sale S9014 N Na T9 SW9 1UF 3 3V SWTO13 NL JMA C MOMENTARY cr8 U JUE INA R86 LABEL RESET 10K SA 0805 3 3V U5 pe 3 3V O e IMR RESET Saa PFI RESET MOMENTARY PFOP e RESET R130 0 R100 SOIC8 0805 R77 LABEL IRQ B 0805 A AND DSP RESET 1 A LABEL FLAG1 A 0805 R85 Loca DA SOFT RESET O 100 R78 LER 0805 UA lak P 0805 U14 O O e 2 Do 3 Do MRG BS mo O 19 Ms FL 7ALVC14A 7ALVC14A e B LEN AER SOIC14 SOIC14 SWTO13 OCA dcT10 3 3V MOMENTARV js AUR O 113 A AUF KA TINA 3 3V KI o S7 RESET LED8 LABEL RESET RED TG LEDOO1 3 3V Y e R90 R112 lt R160 R158 R159 270 10K 10K
37. 0UF TOUF 100UF m met un i p 29 NEN Ps Dap 0805 0805 0805 c 820 0603 7 nca 0402 FBI COMP2 sa e e e A S2 OMP1 FB2e 0402 5 SOIC8 R183 A R169 65 100K 100K T 0603 C64 C63 IVREG ae e Poki Poke 2 10K 1500PF MAMMA e m Sra eve a e AN AAA e UNREG IN 2SEN1 TRKE cie e 21 Dosp FREQ Sr 77 UNREG IN Me 0 28 9 0402 IN VREG 0402 U17 1 5V Fa DNP pili O b em 0402 BATS4A ak EET LA AN Po 4 b ee 6 20H SOT23D 304 gri e C110 priz M 6 DIB INDO12 10UF B ke si LEVEY e e EN2 TI C66 C59 GND panni di mM 0 1UF 22000PF 33 15 C60 C76 C86 7 C58 C57 CT21 p re a 0402 0402 NC PGND2 9 1UF 22000PF 1UF D2A 10UF 10UF 100UF ua POK VI 2 0603 0402 T 0603 SSH 2 B 0805 0805 gt c E SYNC PL Mr G2 D2B WA ADPT823 e s2 e e e LFCSP32 SOIC8 DGND2 AGND2 DGND2 W3 COPPER AGND2 SAT wa ANAI OU l 20 Cotton Road a BpER Nashua NH 03063 DEVICES Pi 1 800 anatoco TA Title ADSP TS201S EZ KIT LITE VA v POWER PAGE2 Size Board No A0178 2002 Rev Date 1 10 2007 10 57 Sheet 14 of 15 A B C D
38. 1S EZ KIT Lite Evaluation System Manual xvii Product Information File Description chm Help svstem files and manuals in Help format htmor Dinkum Abridged C library and FlexLM network license manager software doc html umentation Viewing and printing the html files requires a browser such as Internet Explorer 5 01 or higher pdf VisualDSP and processor manuals in Portable Documentation Format PDF Viewing and printing the pdf files requires a PDF reader such as Adobe Acrobat Reader 4 0 or higher Accessing Documentation From VisualDSP To view VisualDSP Help click on the Help menu item or go to the Windows task bar and navigate to the VisualDSP documentation via the Start menu To view ADSP TS201S EZ KIT Lite Help which is part of the Visu alDSP Help system use the Contents or Search tab of the Help window Accessing Documentation From Windows In addition to any shortcuts you may have constructed there are many ways to open VisualDSP online Help or the supplementary documenta tion from Windows Help system files chm are located in the Help folder and pdf files are located in the Docs folder of your VisualDSP installation CD ROM The Docs folder also contains the Dinkum Abridged C library and the FlexLM network license manager software documentation Your software installation kit includes online Help as part of the Win dows interface These help files prov
39. 2 10 and Table 2 11 show the available ID settings i The EZ KIT Lite must have a processor with the processor ID set to zero 0 on the board IDO must be present in order to allow ini tialization of SDRAM external memory Internal pull up or pull downs on certain pins such as memory interface and bus arbi tration are enabled only when the 10 000 Refer to the ADSP TS201S TigerSHARC Processor Hardware Reference for more information Table 2 10 Processor A ID Pins Configuration R115 Net ID2 A R117 Net IDI A R120 Net IDO A ID 2 0 Value Not populated Not populated Not populated 0 Not populated Not populated Populated 1 Not populated Populated Not populated 2 Not populated Populated Populated 3 Populated Not populated Not populated 4 Populated Not populated Populated 5 Populated Populated Not populated 6 Populated Populated Populated 7 1 Default settings Table 2 11 Processor B ID Pins Configuration R122 Net ID2 B R123 Net ID1 B R124 Net IDO B ID 2 0 Value Not populated Not populated Not populated 0 Not populated Not populated Populated 1 Not populated Populated Not populated 2 ADSP TS201S EZ KIT Lite Evaluation System Manual 2 11 Configuration Resistors Table 2 11 Processor B ID Pins Configuration Cont d R122 Net ID2 B R123 Net IDI B R124 Net IDO B ID 2 0 Va
40. 2 9 MI eua Resistors 2 10 Processor IL SEDE kesime asie Aa ipt 2 10 ilock Mode ANANA eT 2 12 Control Inusedangs Selection siii 2 14 Drive S reye Selesi in sisi 2 15 LEG A Push DI A 2 16 Power LED LEDT mark een E 2 16 Rest 2 e 2 16 FLAG LEDs LE DU aa 2 17 USB Monitor LED ZLED3 rre 2 18 Programmable FLAG Push Buttons SW6 9 2 18 Interrupr Push Buttons SWA and SW src 2 19 Reser Push Button A A 2 19 K A 2 20 Audio J9 and JI srren 2 21 l L A tn MI 2 21 ly EN c P kk ak k ak kk ke kk kk ka alir 2 21 VANN a ki lela 2 22 ADSP TS201S EZ KIT Lite Evaluation System Manual vii CONTENTS Est ea Ines T TES sa 2 22 Link ons VET Me 2 25 Power Supply Speci pid ka UR Pr iE ii d 2 23 ADSP TS201 EZ KIT LITE BILL OF MATERIALS ADSP TS201S EZ KIT LITE SCHEMATIC VACA a i el Gi banal A nan ilk kat B 1 A B 2 Lure c odia B 3 Processor Link Torts di ik abba Md ci a oo kk a B 4 dere duo Selek el lek kk l el kk kk B 5 ruri A es YA B 6 A l i ri a B 7 ZB liese a ks pA OM EUR BR iti ao e MUN rM A MN UI B 8 po I P D M PET PPP HEN B 9 Reset TE EI e B 10 dor i MITAN Aem B 11 TENSA Por TRIB Yenki nt a it B 12 Power Tage M B 13 A lll B 14 Processor Bypass Cape AA B 15 INDEX viii ADSP TS201S EZ KIT Lite Evaluation System Manual PREFACE Thank vou for purchasing the ADSP TS201S EZ KIT Lite Ana
41. 26 D21VSS27 VSS104p7o SVDD30 VDD 10333 gvSS29 VSS106p 1206 VDD27 AB23 DaVSS28 VSS105p VDD31 VDD Olinpo gVSS30 VSS107p Kg VDD28 VDD 101AB21 gVSS29 VSS106p MT8VDD32 VDD 105ap pVSS31 VSS108pra TARA K7VDD29 VDD 1021 gVSS30 VSS107p MTIVDD33 VDD IO6c33 4 2 5V VSS32 VSS109p35 SVDD30 VDD 10333 25V pVSS31 VSS108pra via VDD34 VDD 107654 A VSS33 VSS110p VDD31 VDD 104ap A VSS32 VSS109p v7 VDD35 VDD 108ET0 gVSS34 VSS111 p47 MT8VDD32 VDD lO5ap VSS33 VSS110prg yT8 VDD36 VDD 109 VSS35 VSS112p viT9VDD33 VDD 1063 gVSS34 VSS111p N19 VDD37 VDD 1010 VSS36 VSS113pg vig V DD34 VDD 107653 VSS35 VSS112p N6VDD38 VDD 1011 H1VSS37 VSS114pg v7 VDD35 VDD 108ET0 VSS36 VSS113pg y7VDD39 VDD 1012E7a TOVSS38 VSS115p N18 VDD36 VDD 109 H1VSS37 VSS114pg pa VDD40 VDD 1013 HTTVSS39 VSS116R10 N19 VDD37 VDD 1010 TOVSS38 VSS115H p7VDDA41 VDD 1014 R118 AT2VSS40 VSS117p ve VDD38 VDD 1011 ATTVSS39 VSS116R10 RE VDD42 VDD 1015ET9 0 H13VSS41 VSS118p y7VDD39 VDD 1012 74 H12VS840 VSS117p H7VDD43 VDD 1016 g 1206 H14VS942 VSS119p pa VDD40 VDD 1013 H13VSS41 VSS118p gVDD44 VDD_1017 8 H15VS843 VSS120p14 p7VDDA41 VDD 1014 R107 H14VS842 VSS119p gVDD45 VDD lO18p2g H1TeVSS44 VSS121p Rg VDD42 VDD 1015ET9 0 H15V9843 VSS120p14 SVDD46 VDD 1019 H17VS845 VSS122p H7 VDD43 VDD 1016 g 1206 HT6VSS44 VSS121p VDD47 VDD 10203204 HaVSS46 VSS123p17 gVDD44 VDD_1017 8 H17VS845 VSS122B16 JTOVDDAS VDD 1021550 HgVSS47 VSS124p gVDD45 VDD lO18p2g HaVSS46 vSS123p UTgVDD
42. 49 VDD 102245 JVSS48 VSS125gg VDDA46 VDD 1019 HgVSS47 VSS124p UTgVDD50 VDD_1023k gt p P13 VSS49 VSS126pa VDD47 VDD 10203204 JVSS48 VSS125Rg JEVDDS1 VDD 1024 1 p VSS50 VSS127710 JTOVDDAS VDD 1021izp VSS49 VSS126Rg U7VDD52 VDD 102550 4 VSS51 VSS128Tr UTgVDD49 VDD 10225 4 VSS50 VSS127710 vroYDDS3 VDD 102675 IDC2x1 2VSS52 VSS129143 UTgVDD50 VDD 1023k20 4 P11 VSS51 VSS128Tr v13VDD54 VDD 102704 DNP VSS53 VSS130143 3 JaVDDSI VDD 1024 TE Te 2VSS52 VSS129143 vraVDD55 VDD 102875 4 gVSS54 VSS131144 JAVDDS2 VDD 1025 55 E VSS53 VSS130143 V1 VDDS6 VDD 102950 VSS55 VSS1321145 vrQYPD53 VDD 1026 5 H4 E E VSS54 VSS131117 VTaVDDS7 VDD 103005 D VSS56 VSS13318 vraVDD54 VDD 102704 DNP VSS55 VSS132145 y gVDD58 VDD 1031 pay VSS57 VSS134147 vraVDD55 VDD 10285 4 JVSS56 VSS133171 veVDD59 VDD 103205 VSS58 VSS1351r2g v17VDD56 VDD 102959 VSS57 VSS134T17 v7VDD60 VDD 103350 gVSS59 VSS1365 vrgYDD57 VDD 10305 4 VSS58 VSS1351r2g vaVDD61 VDD 103475 gVSS60 VSS137ir vraVDD58 VDD_1081p29 4 aVSS59 VSS136T5 vavDD62 VDD 103524 KTOVSSS1 VSS13 veVDD59 VDD 103205 gVSS60 VSS1371rg wroVDD63 VDD_1036y5 H KTINSS62 VSS139p v7VDD60 VDD 103359 4 KTOVSSS1 VSS138lrg wr3VDD64 VDD_1087y29 KT2VSS63 VSS140p vgVDD61 VDD 103455 KTINSS62 VSS139p wraVDD65 VDD 10380204 K13VSS64 VSS141G7a ygVDD62 VDD 1035720 4 K12V S963 VSS140p wr7VDD66 VDD_1039y K
43. 5 499 0 R154 0805 499 0 ANALOG 20 Cotton Road Nashua NH 03063 DEVICES PH 1 800 ANALOGD Title ADSP TS201S EZ KIT LITE CONFIGURATION Size Board No Rev Date 4 9 2007 14 58 Sheet 15 A B C D FLASH 512Kbx8 LABEL SDRAM LOW LABEL SDRAM HIGH dcs deae EE 1 me AAA A Alo 18 lt gt U24 U25 U10 ip AO 12 13 DO ro roy ro as o Do L BU 2540 pao IUE Lal 30 pao TA 11 14 DI ae ex psi l A1 DI l AZI 26 4 D LAZ 26 4 lakat iie EI A1 bai m NS A1 pat M is mi ABI 27 5 D2 PASI 27 5 p2 Da A2 DQ2 ZE A2 DQ2 FUA g 17 50371 rl ro al LA AS D3 Jen j 2 80 5 pag 103 LAS 60 3 Da al 8g 18 DA TASI 61 B Da TASI 61 B pa pa A m A4 DQA rm m A4 DQA LAS 7 19 D5 ra n r c L A5 D5 LAN m AG 62 A5 pas y pS j AG 62 A5 pas ad gal 6 bo De pa pe pa l l A7 63 11 DE A7 63 11 gt A6 D6 L AG DQ6 PM Bal AG DQ6 r rs ABI 64 13 5731 ABI 64 13 Lea Sap o EI La A7 DQ7 Md A7 DQ7 FAB 27 pu m ge gt 1A8 pA 59d p 105 LAN Gag pos Ag 26 A Dg DATO A9 LO ed pag M WE LT pos PRI 23 e E TTE E A10 SDA10 24110 Bag 119 L SDA101 24110 Data ral
44. 71 VISHAY CRCW12063K32FKEA 1206 68 2 1 65K 1 8W 1 R67 R72 VISHAY CRCW12061K65FKEA 1206 69 2 10UF 16V 2096 CT4 5 PANASONIC EEE1CA100SR CAP002 70 2 68UF 25V 20 CT6 7 PANASONIC EEE FCIE680P CAP003 71 1 332 0K 1 10W 1 R234 VISHAY CRCW0805332KFKEA 0805 ADSP TS201S EZ KIT Lite Evaluation System Manual A 5 Ref Oty Description Reference Manufacturer Part Number Designator 72 9 01 10W 5960805 RI R7 R9 10 VISHAY CRCWO8050000ZOEA R130 R155 R166 R208 209 73 1 190 100MHZ SA FER5 MURATA DLW5BSN191SQ2 FEROO2 74 2 10UH 10901008 Ll 2 PANASONIC ELJ FC100KF 75 12 221 10W 5960805 RA RG RILR24 VISHAY CRCWO80522ROJNEA R32 R34 35 R129 R205 207 R219 76 1 0 47UF 16V 1096 C73 AVX 0805VC474KAT2A 0805 77 7 10UF 6 3V 1096 C33 C57 58 AVX 080560106KAT2A 0805 C90 92 C99 78 6 1000PF 10V 20 C38 40 C42 43 DIGI KEY 311 1136 1 ND 0805 C45 79 2 4 7UF 6 3V 1096 C70 C74 AVX 08056D475KAT2A 0805 80 37 0 1UF 10V 1096 C66 C69 C75 AVX 0402ZD104KAT2A 0402 C108 C11l 115 C118 C120 C141 C144 C165 166 C182 C184 185 C187 C197 201 C221 225 C228 231 C237 239 C241 A 6 ADSP TS201S EZ KIT Lite Evaluation System Manual ADSP TS201 EZ KIT Lite Bill Of Materials Ref Qty Description Reference Manufacturer Part Number Designator 81 43 0 01UF 16V 1096 C49 50 C68 AVX 0402YC103KAT2A 0402 C77 85 C103 104 C107 C109 C129 140
45. 8 source switch SW 10 2 9 FLAGO A SW9 pins 1 11 2 18 FLAGO B SW6 pins 1 11 2 18 FLAGI A SW pins 1 11 2 18 FLAGI B SW7 pins 1 11 2 18 FLAG2 A LED4 pins 1 11 2 18 FLAG2 B LEDS pins 1 11 2 18 FLAG3 A LED6 pins 1 11 1 12 2 18 FLAG3 B LED3 pins 1 11 1 12 2 18 FLAGREG registers 1 10 flash memory boot memory select pins 2 3 map of 1 9 frequency 1 13 2 12 G general purpose IO pins xi 2 18 GND pins 2 23 I impedance selection 2 14 input clock 2 3 installation of this EZ KIT Lite 1 5 interface connectors xi internal DRAM power regulator 2 2 memory 1 7 1 8 2 4 interrupt enable settings SW2 2 8 pins IRQ3 0 1 11 push buttons SW4 5 2 19 source switch SW10 2 9 IRQO A SWA interrupt pins 1 11 2 19 IRQO B SW5 interrupt pins 1 11 2 19 J JTAG connector ZP4 2 4 2 21 emulation port 2 4 L LEDs diagram of locations l 4 2 16 LEDI power 2 16 LED3 FLAG3 B 1 11 2 18 LED4 FLAG2 A 1 11 2 18 LEDS FLAG2 B 1 11 2 18 LED6 FLAG3 A 1 11 2 18 LEDS master reset 2 16 ZLED3 USB monitor 1 5 2 18 license restrictions 1 7 link ports connections 1 12 width settings SW2 2 8 LVDS signaling 1 12 I 2 ADSP TS201S EZ KIT Lite Evaluation System Manual M master processors 2 10 memory map of this EZ KIT Lite 1 7 select pins See BMS MSO 1 7 microphones 2 5 MSO memory bank 0 select pins 1 7 1 8 2 3 MSSDO external memory
46. A AC pi EEE 4 17 A161 D22 M2 IDi9 I LIZSZI EEE Ni o SDCKEMIL R4 ADDR19 DATA19 i el Si Sim mm e 6 ER cei B12 20 7 L MS1 1 PMARZA MI R5 a ADDR20 DATA20 L MSH SH lowRS y gt lOWR i DMAR3 A The ARTI Ap ct iD2i ride _ NM I ECC ie e rim Ae SADDR21 DATA21 ziska 17 BMS BMS ORD r LORD l abeo 17 A331 D11 iD22 end e TA 3 A22 A DDR22 DATA22 T On AAS GEN gt ie g o gt WON a i DMARI BEI Re A23 B21 A11 D23 m Ru cx nr E AP ADDR23 DATA23 por i BR BRO 17 A241 B11 ID24 1 a EADEM l 8241 O DDR24 DATAZ4 S Sen RNET8 17 A251 A10 ID25 l esans A25 D20 DDR25 DATA25 zm BR2 ipo A ilDO B 1 I ASAI B10 iD26 into RN3 A26 C19 DR26 DATA2G emi BR3 phe lt iB 5 AR C10 iD27 nen 2 77 wa E Nr DATA2I ei BRA pH 1028701 DMAROII Ri COMIP e pee i T2 2 po 2 10 A A20 pres DATAD 10028 BRS 1 __ DMARLAJ R2 COM2 17 A231 A NEW LL a 3 229 B20 DDR29 DATA29 EzE BR6 SCLKRATO 7 ISCLKRATO B L DMAR3 BM P8 D Bo iD30 Em A a mon monn m SEE 4 2971 18 appR30 DATA30 EE BR7 SCLKRATIM CO iSCLKRATI B 1 __ DMAR2 B 4 pericia be D3i e iia poem 6 ASADOR DATASI e SCLKRAT2I2 lt ISCLKRAT2 B i L BRSH00 35 ISCLKRAT2 B __ 7 DATA32P2 1032 _ Pop PA 1 BRGY Re A8 ID33 P Dl las rr ITA 8 A s aora 5 opp CONTROLIMPO 4 1 CONTROLMPO 71 La m 1 AA15 B8 iD34 mro a
47. ADS WMIEDRIGZR A 7 71 Aet RESTE 77771 ABS MURDER A TOI AS MIDDATOSNA DO LI ABM aza KOUT PA PAZ M GIKOUTN 3 pot W KCKCA II ROT MIE2ECMPO A f O ESTATE AC ZI jem gt BATONA III AB10 AA10 AD11 AC11 AB11 AA11 2010 BAKORA OO Act RaGKOUTN A LLI PO IBERIA 77 pe gt L3BCMPOA DSPA DSP B Link Port0 DSP A DSP B Link Port 1 DSP B DSPA Link Port2 DSP B DSPA Link Port 3 RJ45 RJ45 2 5V DSP B Y P l D S B U12 24 P24 PLACE CLOSE TO DSP B PINS CRITICAL L_____ LODATIO_ LB IE L opario_p LODATOO P TMMILODATO P B 1 R22 Ba oDATIO_N LODATOO N29 LODAT ONB 1 Renee opar p LODATO1 pe DATI PB 1 ee m F BNE KA DATI N LODATO1 NF MM ODAT INB 1 L LODATIO P BINE VVV L24 N22 e dE zil p n roman mi Y ODATIZ_P LODATO2_P __ __ LODATI2_P_B 1 d 0 L L23 opATI2 N LODATO2 NV y LODATIZNB 1 0809 22 opar s p LODATO3 PM24 RIILODAT 3PB 1 Lo LOCLKN P BH AAA L 12 opaTI3 N LODATO3 NS a E 3NB TU 1 L F ocuk n p LOCLKO P K ocuk n N LOCLKO NN L L gacko LOACKIP L J322 OBCMPI re Ol B i 2 ar P LiDATOO PEA MiDIDATIO PA 1 R29 paro N LIDATOO ANS pwin LIDATIO NA st 0805 TOOL PA ed DATI1_P A A LAT A mud ER PINE nau d TT LIDATOL NC AE 23 1DATH N LIDATO1 NY DAT INA 1 l L1DATOO
48. ADSP TS201S EZ KIT Lite Evaluation System Manual Revision 3 1 April 2007 Part Number 82 000770 01 Analog Devices Inc One Technology Way I4 ANALOG Norwood Mass 02062 9106 DEVICES Copyright Information 2007 Analog Devices Inc ALL RIGHTS RESERVED This document may not be reproduced in any form without prior express written consent from Analog Devices Inc Printed in the USA Limited Warranty The EZ KIT Lite evaluation system is warranted against defects in materi als and workmanship for a period of one year from the date of purchase from Analog Devices or from an authorized dealer Disclaimer Analog Devices Inc reserves the right to change this product without prior notice Information furnished by Analog Devices is believed to be accurate and reliable However no responsibility is assumed by Analog Devices for its use nor for any infringement of patents or other rights of third parties which may result from its use No license is granted by impli cation or otherwise under the patent rights of Analog Devices Inc Trademark and Service Mark Notice The Analog Devices icon bar and logo TigerSHARC TigerSHARC logo VisualDSP the CROSSCORE logo and EZ KIT Lite are registered trademarks of Analog Devices Inc All other brand and product names are trademarks or service marks of their respective owners Regulatorv Compliance The ADSP TS201S EZ KIT Lite evaluation system has been certified to compl
49. DSP TS201S pdf for more information Table 2 16 Drive Strength Setting for Processor A R136 DS2 R132 DS1 R135 DSO Drive Strength Output Impedance Populated Not populated Populated 11 1 26 Ohm Populated Not populated Not populated 23 8 32 Ohm Populated Populated Populated 36 5 40 Ohm Populated Populated Not populated 49 2 50 Ohm Not populated Not populated Populated 61 9 62 Ohm Not populated Not populated Not populated 74 6 70 Ohm Not populated Populated Populated 87 3 96 Ohm Not populated Populated Not populated 100 120 Ohm 1 Default settings ADSP TS201S EZ KIT Lite Evaluation System Manual 2 15 LEDs and Push Buttons Table 2 17 Drive Strength Setting for Processor B R138 DS2 R139 DS1 R137 DSO Drive Strength Output Impedance Populated Not populated Populated 11 1 26 Ohm Populated Not populated Not populated 23 8 32 Ohm Populated Populated Populated 36 5 40 Ohm Populated Populated Not populated 49 2 52 Ohm Not populated Not populated Populated 61 9 62 Ohm Not populated Not populated Not populated 74 6 70 Ohm Not populated Populated Populated 87 3 96 Ohm Not populated Populated Not populated 100 120 Ohm 1 Default settings LEDs and Push Buttons This section describes the function of the LEDs and push buttons Figure 2 4 shows the locations of the LEDs and push buttons Power LED
50. F 0 01UF 0 1UF 0 1UF 0 1UF 0 1UF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 0 01UF 0 01UF 0 1UF 0 1UF 0 1UF 0 1UF 4 0 1uF 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 1 100uF e e e e e e e e e e e e e e e e e 2 5V DSP A 2 5V DSP B A CN e e e e e e e e e e e e e e e e e VDD 10 2 5V Bypass Caps per DSP 8 1nF 2 0 01uF C194 C193 C192 C191 C190 C189 C188 C186 C181 C183 C182 C187 C185 C184 C234 C246 C236 C245 C233 C244 C243 C235 C242 C240 C241 C237 C238 C239 4 0 1uF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 0 01UF 0 01UF 0 1UF 0 1UF 0 1UF 0 1UF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 1000PF 0 01UF 0 01UF 0 1UF 0 1UF 0 1UF 0 1UF 1 100uF 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 0402 e e e e e e e e e e e e e e e e e ANAI OU 20 Cotton Road Nashua NH 03063 DE V IC ES PH 1 800 ANALOGD Title ADSP TS201S EZ KIT LITE Size Board No A01 78 2002 Rev Date 1 10 2007 10 57 Sheet 15 of 15 A B C I INDEX A AD1854 digital to analog converters DACs l 12 AD1871 analog to digital converters ADCs l 12 amplification gains 2 5 audio amplification selection SW1 2 5 connectors J9 10 2 21 interface l 12 B bill of materials A 1 BMS boot memory select pins 1 7 2 3 board schematic B 1 boot mode switch SW2 2 7 bus contr
51. FB14 MC3 e 7 47 71 e vpn BK3 101 CoolRunner l anp3 e pk3 FB20 MC1 BK4 FB14 MC4 When designing your JTAG interface please refer to the 62 70 e Pypp BK3 102 GND4 e BK3 FB20 MC2 BK4 FB14 MCS Engineer to Engineer Note EE 68 which can be found at CPLD e 9 ypp BK4 101 CPLD GND5 2 e 9eka FB20 MC3 XILINX BK4 FB14 MC13 NA http www analog com 18V e oo BKA 102 GND e S85ka FB20 MC4 IR l BK4 FB15 MC2 gt bi P CoolRunner dy amp 8 GND7 e BK3 FB20 MC5 BK4 FB15 MC5 A L VDD AUX 99 64 GND8 e Bk3 FB20 MC13 CPLD BK4 FB15 MC13 VDD INTA canpa l 4 8 pia FB21 MCI BK4 FB15 MC15 II DD INT2 GND10 23 e S ka FB21 MC3 BK4 FB15 MC16 24 DD INT anDt1 a Ss FB21 MC12 BK4 FB16 MC1 M M 1 1 1 1 e cid FB16 XC20384 icio MI bel gl Pu Bus F SUE CUE SOUF G O1UF GOTUF TQFP144 61 0 01UF 0 01UF 0 01UF 0 0i am na 0 BK3 FB22 MC2 BK4 FB16 MC14 0402 T 0400 1 0402 0402 J 0400 p 0402 0402 0402 U 60 BK3 FB22 MC12 BK4 FB16 MC16 33V Pe kg FB22 MC14 BK4 FB17 MC2 e e e e e e 85 BK3 FB23 MC3 BK4 FB17 MC12 P5 Seks FB23 MC4 BK4 FB17 MC13 CPLD e a n l ga FB23 MC5 BK4 FB17 MC14 AN A OG 0 Cotton Road 2 B85k3 FB23 MC12 BK4 FB17 MC16 Nashua NH 03063 L CPLD TCK M 3 leka FB23 MC13 BK4 FB18 MC3P9 OO RD D I y V ICES PH 1 800 ANALOGD L CPLD TDO M 4 P BK3 FB23 MC14 BKA FB18 MC4 lt IWAL C PLD TON 3
52. FF SOC registers 0x0C00 0000 OXOFFF FFFF Broadcast 0x1000 0000 Ox13FF FFFF Processor ID 0 0x1400 0000 Ox17FF FFFF Processor ID 1 External 0x3000 0000 0x37FF FFFF External memory space bank 0 MS0 Memory MSO includes flash memory which ends at 0x3007 FFFF 0x3800 0000 0x39FF FFFF External memory space bank 1 0x4000 0000 0x43FF FFFF External memory space MSSD0 MSSDO includes SDRAM which ends at 0x407F FFFF 0x8000 0000 OxFFFF FFFF Host SDRAM Interface The SDRAM on the EZ KIT Lite evaluation board is 32 MB To access SDRAM the SYSCON and SDRCON registers must be configured properly The SDRAM default values are e SYSCON e SDRCON 0x00189067 0x00005983 1 8 ADSP TS201S EZ KIT Lite Evaluation System Manual Using ADSP TS201S EZ KIT Lite For the supplied memorv the SDRCON register should be configured as follows SDRAM enable CAS latency of two cycles Pipe depth of zero page boundary of 256 words Refresh rate of every 3700 cycles precharge to RAS of two cycles RAS to precharge of five cycles Init sequence is MRS cycle follows refresh e e e e e O The SYSCON and SDRCON registers define bus control configuration They can be written only once after reset and cannot be changed during system operation In emulation space the SYSCON and the SDRCON registers can be written to as many times as needed The USB debug monitor oper ates in emulation space and allows always writable mod
53. Factor Not populated Populated Not populated Populated 2 Not populated Populated Populated Populated 3 Not populated Populated Populated Not populated 4 Populated Populated Not populated Populated 4 25 Populated Populated Populated Populated 5 Populated Populated Populated Not populated 6 Populated Not populated Not populated Populated 6 25 Populated Not populated Populated Populated 8 Populated Not populated Populated Not populated Reserved test mode 1 Default settings Table 2 13 SCLK Ratio Settings for Processor A R128 SCLKRAT2 R127 SCLKRATI R133 SCLKRATO Multiplication Factor Not populated Not populated Not populated 4 Not populated Not populated Populated 5 Not populated Populated Not populated 6 Not populated Populated Populated 7 Populated Not populated Not populated 8 Populated Not populated Populated 10 ADSP TS201S EZ KIT Lite Evaluation System Manual 2 13 Configuration Resistors Table 2 13 SCLK Ratio Settings for Processor A R128 SCLKRAT2 R127 SCLKRATI R133 SCLKRATO Multiplication Factor Populated Populated Not populated 12 Populated Populated Populated Reserved 1 Default settings Table 2 14 SCLK Ratio Settings for Processor B R126 SCLKRAT2 R125 SCLKRATI R45 SCLKRATO Multiplication Factor No
54. G emulators offer faster communication between the host PC and target hardware Analog Devices carries a wide range of in circuit emulation products To learn more about Analog Devices emulators and processor development tools go to http www analog com dsp tools The ADSP TS201S EZ KIT Lite provides example programs to demon strate the capabilities of the evaluation board The ADSP TS201S EZ KIT Lite installation is part of the Visu alDSP installation The EZ KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days For details about evaluation license restrictions after the 90 days refer to Evaluation License Restrictions on page 1 7 Refer to the VisualDSP Installation Quick Reference Card for details The board features Two Analog Devices ADSP TS201S processors v 500 MHz core clock speed v Configurable core clock mode Analog Devices AD1871 96 kHz analog to digital converter v Line in 3 5 mm stereo jack Analog Devices AD1854 96 kHz digital to analog converter v Line out 3 5 mm stereo jack e SDRAM memory v 32 MB 4 MB x 64 ADSP TS201S EZ KIT Lite Evaluation System Manual Preface e Flash memory v 512K main flash memory USB debugging interface Interface connectors v Id pin emulator connector for JTAG interface v Low Voltage Differential Signaling LVDS link ports via RJ 45 connectors v Expansion interface connectors e General purpose IO v 4 push but
55. IT Lite Evaluation System Manual A 9 Ref Qty Description Reference Manufacturer Part Number Designator 122 1 250MA D8 MOUSER 512 BZX84C5V6 BZX84C5V6 SOT23D 123 1 200MA BAT54A D6 MOUSER 512 BAT54A SOT23D 124 3 200MA BAT54 D3 5 MOUSER 512 BAT54 SOT23D 125 1 8 2UH 2096 L5 COILCRAFT MSS6132 822ML IND012 126 1 10UH 2096 L4 COILCRAFT MSS6132 103ML IND012 127 1 0 7UH 2096 L6 COILCRAFT MLC1265 701ML INDO10 128 2 1 1K 1 16W 196 R174 175 PANASONIC ERJ 2RKF1101X 0402 129 1 18K 1 16W 5 R176 DIGIKEY 311 18KJRCT ND 0402 130 1 12 1K 1 16W 196 R177 DIGIKEY 311 12 1KLRCT ND 0402 131 1 38 3K 1 10W 1 R181 DIGIKEY 311 38 3KHRCT ND 0603 132 1 820 1 16W 5 R182 DIGIKEY 311 820JRCT ND 0402 133 1 430 1 16W 1 R194 DIGIKEY 311 430LRCT ND 0402 134 1 2 2PF 50V 10 C100 DIGIKEY 490 1267 1 ND 0402 135 1 1200PF 50V 10 C89 DIGIKEY 490 1304 1 ND 0402 136 2 330UF 10V20 D CT17 18 SANYO 10TPB330M 137 1 82PF50V 5960402 C87 DIGIKEY 490 1290 1 ND A 10 ADSP TS201S EZ KIT Lite Evaluation System Manual ADSP TS201 EZ KIT Lite Bill Of Materials Ref Qty Description Reference Manufacturer Part Number Designator 138 3 22000PF 25V 10 C59 C76 C102 DIGIKEY 490 3252 1 ND 0402 139 1 1500PF 50V 1090 C64 DIGIKEY 490 3245 1 ND 0402 140 1 1UH20 INDO11 L7 DIGIKEY 495 1985 1 ND 141 2 SA
56. Lite via Debug Agent In Session name highlight or specifv the session name The session name can be a string of anv length although the box displavs approximatelv 32 characters The session name can include space characters If vou do not specifv a session name VisualDSP creates a session name by combining the name of the selected platform with the selected processor The only way to change a session name later is to delete the session and to open a new session Click Next 7 The Finish page of the wizard appears on the screen The page dis plays your selections If you are satisfied click Finish If not click Back to make changes To disconnect from a session click the disconnect button El or select Session Disconnect from Target To delete a session select Session Session List Select the ses sion name from the list and click Delete Click OK 1 6 ADSP TS201S EZ KIT Lite Evaluation System Manual Using ADSP TS201S EZ KIT Lite Evaluation License Restrictions The ADSP TS201S EZ KIT Lite installation is part of the VisualDSP installation The EZ KIT Lite is a licensed product that offers an unre stricted evaluation license for the first 90 days Once the initial unrestricted 90 day evaluation license expires e VisualDSP allows a connection to the ADSP TS201S EZ KIT Lite via the USB debug agent interface only Connections to simu lators and emulation products are no longer allowed The li
57. MBRS540T3G DI 2 ON SEMI MBRS540T3G SMC 142 1 8 20K 1 10W 1 R210 DIGIKEY 541 8 20KHCT ND 0603 143 1 10 0K 1 16W 1 R185 DIGIKEY P10 0KLCT ND 0402 144 1 1 50K 1 16W 1 R204 DIGIKEY P1 50KLCT ND 0402 ADSP TS201S EZ KIT Lite Evaluation System Manual A 11 ADSP TS201S EZ KIT Lite Evaluation Svstem Manual ADSP 152015 EZ KIT Lite ANO os DEVICES PH 1 800 ANALOGD Title ADSP TS201S EZ KIT LITE TITLE Size Board No Rev Date 4 9 2007 15 02 Sheet 1 of 15 D S A LABEL DSP A near this DSP LL ADS gt DOE 703 resan DA LAO H24 Deo pATAop 1 100 penn Te Pan BPP l ORI aoe KEEP THESE NETS THE SAME LENGTH rs IDI 1 LAM HR nore DATAZP17 DE ral ina l L A H21 DR3 DATAJEIE 108 pmm ICA L Adi G24 oR DATA4P16 IDA resi ME TI L AS G23 pg DATAS TE IDS pee ima L Ab G22 Re DATAgP1S DS reso Te il E ER M ee PLACE CLOSE TO IDT5v929 PINS peer ma l V LAB Pl DDR8 DATAS Io P8 iii A pe pam et mal LAN Ph DDRO DATAQ S DS
58. NEA 0805 46 2 2 0K 1 8 W 1 R156 157 VISHAY CRCW12062K00FKEA 1206 47 2 49 9K 1 8W 196 R60 R63 VISHAY CRCW120649K9FKEA 1206 48 10 100PF 100V 596 C3 C6 C9 C12 AVX 12061A101JAT2A 1206 C15 C20 21 C23 C27 C31 49 1 2 2UF 35V 10 B CT15 AVX TAJB225K035R 50 3 10UF 16V 1096 B CTI 3 AVX TAJB106K016R 51 6 100 1 10W 596 R78 R85 R95 VISHAY CRCW0805100RJNEA 0805 R99 R101 R103 52 2 220PF 50V 1096 C28 C32 AVX 12061A221 AT2A 1206 53 5 600 100MHZ FERI 3 FER6 7 STEWARD HZ1206B601R 10 500MA 1206 54 4 237 0 1 8W 196 R46 R48 R50 VISHAY CRCW1206237RFKEA 1206 R52 55 2 750 0K 1 8W 190 R47 R49 VISHAY CRCWI1206750KFKEA 1206 A 4 ADSP TS201S EZ KIT Lite Evaluation System Manual ADSP TS201 EZ KIT Lite Bill Of Materials Ref Qty Description Reference Manufacturer Part Number Designator 56 8 5 76K 1 8W 196 R44 R53 57 VISHAY CRCW12065K76FKEA 1206 R150 R152 57 2 11 0K 1 8W 1 R61 62 VISHAY CRCW120611KOFKEA 1206 58 4 120PF 50V 596 C16 19 AVX 12065A121JAT2A 1206 60 3 1UF16V10 0805 C54 C71 72 PANASONIC ECJ2FBIE105K 61 1 47PF 100V 1096 C96 KOA NPO1206HTTD470J 1206 62 1 340 0K 1 8W 1 R192 VISHAY CRCW0805 3403FRT1E3 0805 63 1 698 0K 1 8W 1 R201 VISHAY CRCW0805698KFKEA 0805 64 2 680PF 50V 1 C26 C29 AVX 08055A681FAT2A 0805 65 2 2 74K 1 8W 1 R68 R73 VISHAY CRCW12062K74FKEA 1206 66 4 5 49K 1 8W 1 R64 65 R69 70 VISHAY CRCW12065K49FKEA 1206 67 2 3 32K 1 8W 1 R66 R
59. P Linker and Utilities Manual Description of the linker function and commands VisualDSP Loader and Utilities Manual Description of the loader splitter function and com mands All documentation is available online Most documentation is available in printed form If you plan to use the EZ KIT Lite board in conjunction with a JTAG emulator also refer to the documentation that accompanies the emulator Visit the Technical Library Web site to access all processor and tools man uals and data sheets http www analog com processors technicalSupport technicalLi brary Online Technical Documentation Online documentation comprises the VisualDSP Help system software tools manuals hardware tools manuals processor manuals the Dinkum Abridged C library and Flexible License Manager FlexLM network license manager software documentation You can easily search across the entire VisualDSP documentation set for any topic of interest For easy printing supplementary pdf files of most manuals are provided in the Docs folder on the VisualDSP installation CD Each documentation file type is described as follows If documentation is not installed on your system as part of the software installation you can add it from the VisualDSP CD at any time by run ning the Tools installation Access the online documentation from the VisualDSP environment Windows Explorer or the Analog Devices Web site ADSP TS20
60. P Ai p AAA ML LIDATOO N A e l n e a a n e L liDATOOP AME V V V MM LIDATOO N_A L cd V24 Y24 l 1 ei LIDATO2 P A JL 1DATI2_P LIDATO2 PR MILIDATIZPA koi HIDATOZ NAN 2 DATI2 N LIDATO2 NS DATA NA LL ko LiDATOS PAN cars p LiDATOS PUE DATS PA 7771 L LIDATOS NAM L1DATIS N LIDATO3 i LLIDATB NA 1 jsa 17777 HOLKOUT P AUI cikin P L1CLKO a a DICIKIN PA TTT 1 Se PDA AN noon RADA NA L EIOLKOUTE P AUI AAA LE GL KOUT NA i ACK A L1ACKO LAK RULiACKO A L LIBCMPO A L iecur LIBCMPO MILIBCWPLA 1 R36 100 0 A lo L2DATOO A B P i pario P L2DATOO pe gi L2DATIO PA ACA DATIQ N L2DATOO NARI ani L2DATIO N je TOL PA BI aT P L2DATO1 PAR gii EDAT dB 0809 Lo I2DATOt N AI ARO 5 DATI N L2DATO1 MU L2DATIT N LL I DATOL P AI AA HMUGDATOLN A LL I DATO PAM AE opa P L2DATO2 P RLi2DATE PI jn 0 Lo I2DATOZNAM ACA opar z N L2DATO2 ee gg L2DATI2 N BS U L2DATO3 P ABS L AD19 5 ATIS P L2DATO3 pee mii L2DATIS P LL L2DATOZ PANN DATE NA LI L2DATOS NA amp 9 paris n L2DATO3 NR MIHZDATB NA 9 tif ponn UGKOUT P AMI zon p uoo pB AAN PASA DNP L D2OLKOUT N A AA 20LKIN N L2cLKo N CKN NA 77 TODATOS P ANEA AAA IHAT NA OUT 1 DITTISA KI Al pA acko L2ACKTD 6 WELZACKO A 7 7 100 0 SS APA 2acupi momo EN 0805 DNP e NN NN PP RE LM oo A NS oc uec rum Uv rr e AD14 ADS AA AE ET e e 1
61. P RESET gt RST IN DATAS9 mi c aa is ai F4 iD60 DATA60 E1 ID6i l RTO VPAST OUT DATAGI E ANAI OU 20 Cotton Road 0 E2 DE v va MUT api Nashua NH 03063 MA PORN oo DEVICES pu 1 800 ANALOGD BP576 Title ADSP TS201S EZ KIT LITE Size Board No A01 78 2002 Rev Date 1 10 2007 10 57 Sheet 3 of 15 A ALL NETS ON THIS PAGE EXCEPT L ACK and L BCMP _ ARE DIFFERETIAL PAIRS THESE SIGNAL SHOULD BE ROUTING ACCORDING THE GUIDELINES SET IN EE 179 2 5V DSP A i DSP A Ne U11 PLACE CLOSE TO DSP A PINS CRITICAL ii LODATIO P Am ODATIO P LODATOO P 00 231 oDATIO N LODATOO N DNE 22 onam P LODATO1 P LL LODATIO P AUBHL AAA K21 ODATI1 N LODATO1 N R12 L24 opATI2 P LODATO2 P 300 0 L29 ODATI2 N LODATO2_N Hibesi Pa L22 ODATIS P LODATO3 P 777 Sen EX AAA a E LODATI3 N LODATO3 N K24 OCLKIN P LOCLKO PN K23 OCLKIN N LOCLKO NN J21 QACKO LOACKIP J2 ek OBCMPI LoBCMPON2 122 DATO P L1DATOO P 100 0 T21 4DATIO N LIDATOO N DNE U24 DATI P LIDATOT PY 2 wW L1DATIO_P_A H A U23 DATIN LIDATO1 N L A patio P LiDATO2 P V23 1DATI2 N LIDATO2 N V22 ADATIS P LIDATO3 P V2 IDATIB N LIDATO3 N 100 0 U22 A CLKIN P L1CLKO P BS U 1i CLKIN_N LICLKO N LI
62. SS8 VSS85h712 VDD11 VDD DRAM 1 79 4 AB2VSS10 VSS87 gVDD8 VDD_DRAM8 BTEVSS9 VSS86m P9 VDD12 VDD_DRAM12p78 P12 AB22VSS11 VSS88H17 gVDD9 VDD DRAM9 ABDVSS10 VSS87y15 1 p G17VDD13 VDD DRAM13pqg 1 p AB3VSS12 VSS89m 2 oVDD10 VDD DRAM10 B22VSS11 VSS88m e 4 GTgVDD14 VDD DRAM14p13 4 AC2VSS13 VSS90y VDD11 VDD DRAM11 AB3VS812 VSS89m IDC2x1 gVDD15 VDD DRAM15 IDC2X1 AC23VSS14 VSS91 mg P8 VDD12 VDD_DRAM12 AC2VSS13 VSS90m DNP VDD16 VDD_DRAM16 DNP AD1VSS15 VSS92Ho LP VDD13 VDD DRAM13 VSS14 VSS91 mg VDD17 VDD DRAM17 AD2aVSS16 VSS93N10 e Fd GTeVDD14 VDD DRAM14 AD1VSS15 VSS92H0 R163 gVDD18 VDD DRAM18 BaVSS17 VSS94N IDC2x1 gVDD15 VDD_DRAM15 pwa VSS16 VSS93N10 0 gVDD19 VDD DRAM19 B22VSS18 VSS95N DNP VDD16 VDD_DRAM16 g2VS817 VSS94N 1206 TSVDD20 VDD DRAM20 B23VSS19 VSS96N VDD17 VDD DRAM17 B22VSS18 VSS95N HT9VDD21 VDD DRAM 1 2 5V DSP B 83VSS20 VSS97NTa R161 gVDD18 VDD DRAM18 B23VSS19 VSS96q AAA FBVDD22 VDD_DRAM22y CUN T VSS21 VSS98q 0 gVDD19 VDD_DRAM19 B3VSS20 VSS97NTa H7VDD23 VDD DRAM23 VSS22 VSS99k 1206 Aia VDD20 VDD_DRAM20 2 5V DSP A VSS21 VSS98N gVDD24 VDD_DRAM24 VSS23 VSS100N17 AToVDD21 VDD_DRAM21 uc d VSS22 VSS9 T6 R164 gVDD25 VDD_DRAM25 VSS24 VSS101 AAA HeVDD22 VDD DRAM22y VSS23 VSS100hy 0 VDD26 VSS25 VSS102xg H7VDD23 VDD_DRAM23 VSS24 VSS101 1206 VDD27 AB23 D13VSS26 VSS103jqg gVDD24 VDD_DRAM24 VSS25 VSS102jqg KGVDD28 VDD 1O1apza D21VSS27 VSS104p7o R162 gVDD25 VDD DRAM25 D13VSS26 VSS103jqg K7VDD29 VDD 102 paVSS28 VSS105p 0 a VDD
63. SW10 DSPA DSP B DSPA DSPB With TE A Pena FLAGO FLAG1 FLAGO FLAGI IRQO IRQO OFF OFF OFF OFF OFF OFF External source ONI ON ON ON ON ON On board push button switch 1 Default settings ADSP TS201S EZ KIT Lite Evaluation System Manual 2 9 Configuration Resistors Configuration Resistors This section describes the configuration resistors of the two TigerSHARC processors The locations of the configuration resistors and their respective default settings are shown in Figure 2 3 CONTROLIMP 1 0 E co c2 a payi gt 12 0 LI L mmm SPA HER DSPA DSPA ipf2 0 DS 2 0 SCLKRAT 2 0 SERIAL NO EXPANSION INTERFACE TYPE A Ul CLOCK GENERATOR R223 ma CONFIGURATION R224 RESISTORS R2155 Figure 2 3 Resistor Locations Bottom View of the Board Processor ID Settings The two ADSP TS201S processors on the EZ KIT Lite are factory config ured to set the processor A to an ID value of zero and processor B to an ID value of one This means that in the cluster processor A is the master 2 10 ADSP TS201S EZ KIT Lite Evaluation System Manual ADSP TS201S EZ KIT Lite Hardware Reference Although it is not recommended the ID value of each processor can be varied by placing 500 Ohm resistors in the appropriate position Table
64. TANSS65 VSS142j wroVDD63 VDD_1036y5 KT3VSS64 VSS141G7a w1aVDD67 VDD 1040y79 KTEVSS66 VSS143p wr3VDD64 VDD 10370204 KTANSS65 VSS142p w1gVDD68 VDD 10419 K1aVSS67 VSS1445577 WTAVDDES VDD 10380204 KTEVSS66 VSS143516 weVDD69 VDD_1042y KT7NSS68 VSS14508 wr7VDD66 VDD_1039y K1aVSS67 VSS144p w7VDD70 VDD_1043y KBVSS69 VSS146jg9 w1aVDD67 VDD 1040y70 KT7NSS68 VSS145jj8 waVDD71 VDD lO44v1 KgVSS70 VSS147y wryVDD68 VDD_1041y KBVSS69 VSS146jj9 wgVDD72 VDD 1045 L10VSS71 VSS148y w VDD69 VDD_1042y KgVSS70 VSS147y VDD73 VDD 1046 ETTVSS72 VSS149v1g w7VDD70 VDD_1043y C1OVSS71 VSS148g1g a N3 VDD 104719 L12V9973 VSS150v20 WaVDD71 VDD lO44v 1 ETTVSS72 VSS149y38 E AiV DSP B M e ayDD At VDD 1048yg L13VSS74 VSS151y5 waVDD72 VDD_1045y 119 VSS73 VSS150y55 TS L VDD A2 VDD_1049y8 TTAVSS75 VSS152y VDD73 VDD 1046 ET3VSS74 MD piknik P2 VDD 1050 L15V9976 VSS153yg cad N3 VDD 104749 ETAVSS75 VSS152y 4 DSPB SCLK VREF M SCLK VREF1 La a NSS77 VSS154 i AIV DSP Alle waVDD At VDD 1048yg L15VSS76 VSS153yg 7770000000007 VREF 6 DSPB VREF aa NUR ee VDD A2 VDD_10497g NSS77 VSS154 aac ati ad 50 DSPA SCLK VREF MI eo 2scLk_VREF1 m a 5 POS a S a vnREF e MIDSPA VREF PES Aii aan AR 4 BP576 KA NA BP576 Z v C45 C39 C43 1000PF 1000PF 1000PF ti gt a 7 0805 0805 7T 0805 1000PF 1000PF 1000PF 7 0805 0805 7T 0805 L EE PLACE CLOSE TO DSP B PINS ANALOG 20
65. TRACES AS SHORT AS POSSIBLE I WEAR AAAA C16 C20 120PF 100PF 1206 1206 4 4 3 3V 2 Jan 2370 N 7 1 mamo INL esa aki ANN 3 AMV722M SOIC8 fooopr T 0805 e ra 576K 576K LABEL LINE IN VREF AUDIO ie 1206 youn oder ADC LEFT A D C 1206 Tok STOK J9 0805 0805 EE MONITU A e f oopr E LOOPBACK LEFT R50 EE S IS CAPLN caso b ae pa mizin 237 0 12 SLAVE MODE Ei i URN 1206 CAPLP b A vo el rei E 4 b NL tlie an MCLK IS 256 x Fs CON 4 UN CCLK 256 512 e 48 kHZ SAMPLE RATE COUTADFO e IS I F MODE 2 NE CIN DF1 Ewa Can CLATCH IM S P AGND eni SAPAN LRGLKE ILRCLK Em WEN kr enero sou Bou 1206 N 1206 INR AMPIN 1206 DOUTES gt DR l IO IIIA M MEM ous A Y gt gt T 1 L MCLKI MCLK DIS e C18 100K foder 1206 p RESET P RESET VER LO IVREF AUDIO i 1206 1206 4 4 ADT871 TEE SSOP28 Eet o R48 ll Sa jj 04UF 10UF l 2 237 0 wee eee RI a 0805 T B v E 1 IT AMPGUT A W N AG D NH ARAW ki N l A 3 l PLACE NEAR CONNECTOR Bi C13 Ca C6 ki 1000PF 100PF y T 0805 1206 i 1206 N R57 R56 5 76K 5 76K o o 1206 1206 EL So j e Frasi l e ADC RIGHT omur Onur Gur Onur N J 70805 pos 0805 T 0805 N G AGND dor T 0805 3 2370 KEEP THESE CLOSE TO AD1871 1206 4 e INR AGB l il f AIMV72PMV722M l J SOIC8 IM mE n
66. accessible through push buttons SW4 and SW5 on the EZ KIT Lite board Interrupts are summarized in Table 1 4 For more information on configuring the interrupt pins see the ADSP 752015 Tig erSHARC Processor Hardware Reference Table 1 4 Interrupt Pin Summary Interrupt Connection Description IRQO A SW4 The IRQO interrupt connects to push buttons to supply feed back for program execution For instance you can write your TROO_B ane code to perform a different function when an interrupt is detected ADSP TS201S EZ KIT Lite Evaluation System Manual 1 11 Audio Interface Audio Interface The audio interface of the EZ KIT Lite board allows vou to interface with the board s analog to digital converter ADC and digital to analog con verter DAC The audio interface consists of two main ICs AD1871 and AD1854 The AD1871 is a stereo audio ADC intended for digital audio applica tions requiring high performance analog to digital conversion The AD1871 provides 97 dB THD N and 107 dB dynamic range The AD1854 is a high performance single chip stereo audio DAC deliv ering 113 dB dynamic range and 112 dB SNR at a 48 kHz sample rate Because the ADSP TS201S processor does not have any SPORTS a Xilinx complex programmable logic device CPLD generates the audio interface control signals between the processor and the audio circuit Setting the FLAG3 signal of processor A high enables the audio interface ins
67. ammer utility refer to the online Help 1 14 ADSP TS201S EZ KIT Lite Evaluation System Manual 2 ADSP TS201S EZ KIT LITE HARDWARE REFERENCE This chapter describes the hardware design of the ADSP TS201S EZ KIT Lite board The following topics are covered e System Architecture on page 2 2 Describes the configuration of the ADSP TS201S processor and explains how the board components interface with the EZ KIT Lite e Switch Settings on page 2 5 Shows the location and describes the function of each configura tion DIP switch Configuration Resistors on page 2 10 Shows the location and describes the function of each configura tion resistor LEDs and Push Buttons on page 2 16 Shows the location and describes the function of the LEDs and push buttons Connectors on page 2 20 Shows the location of and gives the part number for all of the con nectors on the board In addition provides the manufacturer and part number information for the mating parts Power Supply Specifications on page 2 23 Describes the power connector ADSP TS201S EZ KIT Lite Evaluation System Manual 2 1 Svstem Architecture Svstem Architecture This section describes the processor s configuration on the EZ KIT Lite b oard Stereo Stereo Jack Jack CPLD 1 0 Header External Bus JTAG Port Interface Unit
68. anALocD Title ADSP TS201S EZ KIT LITE SN74AHC1G00 74LVC14 74LVC14 IDT74FCT3244APY ADM708 Size Board No A0178 2002 Rev Date 1 10 2007 10 57 Sheet 10 of 15 B C D PLACE LABEL EXPANSION INTERFACE TYPE A NEAR MIDDLE CONNECTOR 5V 2 5V 2 5V 5V 33V Q S EA FN fx WARNING WHEN CONNECTING TO ANOTHER BOARD ZEE O MAKE SURE TX CONNECTOR GOES TO A RX CONNECTOR l 1 cdm E DO NOT USE CROSSOVER CABLE A EE ees e EL ADS CO J4 M 9 J3 14 2 1 Ji J2 2 LABEL DSPATX 2 1 M 2 1 M 4 8 4 8 4 8 6 5 zx me 4 i Aly 6 5 FA0 pe TT TT 6 5 Ena je 8 7 ri DSP A TX gin aue L CLKOUT EXPI SDWE L PPA DMARO _ 1 5 pue Pay 1 diam OOO e eee a tat LA 2 7 ve L CAS 3 7 ISDA10 1 iDMARLA 6 r
69. ar get board the LED can flicker indicating communications handshake Programmable FLAG Push Buttons SW6 9 Four push buttons are provided for general purpose user input The SW6 9 push buttons connect to the processor s programmable FLAG pins The push buttons are active high and when pressed send a high 1 to the pro cessor Refer to Programmable FLAG Pins on page 1 10 for more information on how to use the flags Table 2 19 shows the FLAG signals and corresponding switches Table 2 19 FLAG Push Buttons FLAG Pin Push Button Reference Designator FLAGO_A SW9 FLAGI A SW8 FLAGO B SW6 FLAGI B SW7 2 18 ADSP TS201S EZ KIT Lite Evaluation Svstem Manual ADSP TS201S EZ KIT Lite Hardware Reference Interrupt Push Buttons SW4 and SW5 Two push buttons SW4 and SW5 are provided for user interrupts The push buttons connect to the processor s interrupt pins The push buttons are active low and when pressed send a low 0 to the processor Refer to Interrupt Pins on page 1 11 for more information on how to use the interrupts Table 2 20 shows the interrupt signals and corresponding switches Table 2 20 Interrupt Push Buttons Interrupt Pin Push Button Reference Designator IRQO A SW4 IRQO B SW5 Reset Push Button SW3 The RESET push button SW3 resets all ICs on the board except the USB interface after it has been configured ADSP TS201S EZ KIT Lit
70. ble interrupts edge sensitive mode Link Port Width Settings Positions 4 and 6 of the SW2 switch determine the link port data width Table 2 7 and Table 2 8 show the available settings for the two tvpes of link port data widths Refer to the ADSP TS201S processor data sheet at http www analog com UploadedFiles Data Sheets ADSP TS201S pdf for more information Table 2 7 Link Port Width Settings SW2 Position 4 SW2 Position 4 Link Port Data Width for Processor A U11 OFF l bit link port data width default ON 4 bit link port data width 2 8 ADSP TS201S EZ KIT Lite Evaluation Svstem Manual ADSP TS201S EZ KIT Lite Hardware Reference Table 2 8 Link Port Width Settings SW2 Position 6 SW2 Position 6 Link Port Data Width for Processor B U12 OFF 1 bit link port data width default ON 4 bit link port data width FLAGs and IRQs Switch Settings SW10 The SW10 switch determines the source of the flag and IRQ signals con nected to each of the prospective processors The source can be modified to drive the nets by either a push button switch or an external source via the expansion header Refer to Programmable FLAG Push Buttons SW6 9 and Interrupt Push Buttons SW4 and SW5 on page 2 19 for information on the flags IROs and associated push buttons Table 2 9 shows the available flag and interrupt source settings Table 2 9 FLAGs and IRQs Switch Settings
71. coton Road PLACE CLOSE TO DSP A PINS KI NA asin evades 4 DEVICES ru 1 800 ANALoGD ST Title ADSP TS201S EZ KIT LITE Size Board No A0178 2002 Rev Date 1 10 2007 10 57 Sheet 5 of 15 A C D a ed l SCLKRAT2 Al lt mn A td ii dion ID2 AI C IDI AL IDO AI DSPA Default ID 0 R133 499 0 0805 DSPA Default PLL Ratio 5X CCLK 500MHz 2 5V R120 499 0 0805 DNP SCLKRAT2 BI lt Age Gus A smi A i na E pa m a a R123 499 0 0805 DNP DSP B Default ID 1 R45 499 0 0805 DSP B Default PLL Ratio 5X CCLK 500MHz 2 5V O M R131 499 0 0805 DNP CONTROLIMPO KI CONTROUMPN R143 499 0 0805 2 5V O G R139 499 0 0805 DNP ID 2 0 have internal 5Kohm pull down resistors ID 2 0 Proc ID 000 U 001 1 010 2 011 3 100 4 101 5 110 6 111 7 THESE RESISTORS DO NOT NEED TO BE VERV CLOSE TO THE DSP IF POSSIBLE WOULD LIKE THEM ALL ON THE BOTTOM OF THE BOARD ORGANIZED IN GROUPS SIMILAR TO SHOW HERE DEPENDING ON HOW MUCH ROOM YOU CAN LEAVE NEAR THEM I WOULD LIKE TO LABEL SOME OF THEM SCLKRAT 2 0 have internal 5Kohm pull down resistors SCLKRAT 2 0 PLL Ratio 000 4 001 5 010 6 011 7 100 8 101 10 110 12 111 RESERVED DEFAULT NORMAL CONTROLIMPO has an internal 5Kohm pull down resistor CONTROLIMPI has an
72. e Evaluation System Manual 2 19 Connectors Connectors This section describes the connector functionalitv and provides informa tion about mating connectors The connector locations are shown in Figure 2 5 P6 1 J5 J4 J7 J6 DSPA DSPA DSPB DSPB LINKPORT3 LINKPORT3 LINKPORT3 LINKPORT3 RX TX RX TX POWER J8 E ip Le DJ ANALOG DEVICES 2 ea SHARC USB E ZJ 5 LINE IN LINE OUT g JTAG 2 7P4 U KA Ka Figure 2 5 Connector Locations 2 20 ADSP TS201S EZ KIT Lite Evaluation Svstem Manual ADSP TS201S EZ KIT Lite Hardware Reference Audio J9 and J10 There are two 3 5 mm stereo audio jacks Part Description Manufacturer Part Number 3 5 mm stereo jack A D ELECTRONICS ST 323 5 Mating Connector 3 5 mm stereo plug to 3 5 mm RADIO SHACK L12 2397A stereo cable Power J8 The power connector provides all the power necessary to operate the EZ KIT Lite board Part Description Manufacturer Part Number 2 5 mm power jack SWITCHCRAFT RAPC712X DIGI KEY RAPC712X ND Mating Power Supply shipped with the EZ KIT Lite 7 5V power supply CUI DTS075400UDC P6P DB JTAG ZP4 The JTAG header is the connecting point for a JTAG in circuit emulator pod For more information about a JTAG custom board design or inter face please refer to EE 68 found at Analog Devices Web s
73. e Programs on page 1 13 Provides information about the example programs included in the ADSP TS201S EZ KIT Lite evaluation system Flash Programmer Utility on page 1 14 Provides information on the Flash Programmer utility included with VisualDSP For information on the graphical user interface including the boot load ing target options and other facilities of the EZ KIT Lite system refer to the online Help For detailed information about programming the ADSP TS201S Tiger SHARC processor see the documents referred to as Related Documents Package Contents Your ADSP TS201S EZ KIT Lite package contains the following items ADSP TS201S EZ KIT Lite board e VisualDSP Installation Quick Reference Card 1 2 ADSP TS201S EZ KIT Lite Evaluation System Manual Using ADSP TS201S EZ KIT Lite ADSP TS201S EZ KIT Lite Evaluation System Manual this document CD containing v VisualDSP software v ADSP TS201 EZ KIT Lite debug software v USB driver files v Example programs Universal 7 5V DC power supply USB 2 0 cable Registration card please fill out and return If any item is missing contact the vendor where you purchased your EZ KIT Lite or contact Analog Devices Inc Default Configuration The EZ KIT Lite evaluation system contains ESD electrostatic dis charge sensitive devices Electrostatic charges readily accumulate on the human body and equipment and can discharge without A detection Per
74. e for these registers Flash Memory The AT49BV040 chip provides a total of 512K x 8 bits of external flash memory arranged into eight uniform 64 Kb memory blocks The block addresses are shown in Table 1 2 Table 1 2 Flash Memory Map Start Address End Address Content 0x3000 0000 0x3000 FFFF Uniform block 0 0x3001 0000 0x3001 FFFF Uniform block 1 0x3002 0000 0x3002 FFFF Uniform block 2 0x3003 0000 0x3003 FFFF Uniform block 3 ADSP TS201S EZ KIT Lite Evaluation System Manual 1 9 Table 1 2 Flash Memory Map Cont d Programmable FLAG Pins Start Address End Address Content 0x3004 0000 0x3004 FFFF Uniform block 4 0x3005 0000 0x3005 FFFF Uniform block 5 0x3006 0000 0x3006 FFFF Uniform block 6 0x3007 0000 0x3007 FFFF Uniform block 7 To program the flash memory with your boot code first create a loader file from your processor code You set up the loader in VisualDSP depending on how you plan to boot the flash For information on creating a loader file refer to VisualDSP online help and the VisualDSP Loader and Utilities Manual Next the loader file must be programmed into the flash memory This can be done using the VisualDSP Flash Programmer utility see online Help Programmable FLAG Pins Each ADSP TS201S processor has four programmable flag pins Two flag pins from each processor FLAGO and FLAG1 allow in
75. e four RJ 45 connectors on the EZ KIT Lite Two connectors are used for link port 3 of processor A and two connectors are used for link port 3 of processor B Part Description Manufacturer Part Number 8 pin RJ 45 connector TYCO 1 16609214 1 Mating Cables BLK CAT 5E cable 1 foot E FILLIATE 119 5136 Gray CAT 5E cable 1 meter DIGI KEY AE1233 ND Power Supply Specifications The power connector supplies DC power to the EZ KIT Lite board Table 2 21 shows the power connector pinout Table 2 21 Power Connector Terminal Connection Center pin 47 5 VDC 4 amps Outer ring GND ADSP TS201S EZ KIT Lite Evaluation System Manual 2 23 Power Supply Specifications 2 24 ADSP TS201S EZ KIT Lite Evaluation System Manual A ADSP TS201 EZ KIT LITE BILL OF MATERIALS The bill of materials corresponds to ADSP TS201S EZ KIT Lite Sche matic on page B 1 Please check the latest schematic on the Analog Devices Web site http www analog com processors ti gersharc technicalLi brary manuals index htmlifEvaluation 20Kit 20Manuals 4 Ref Qty Description Reference Manufacturer Part Number Designator 1 2 74LVCI4ASOICI4 U14 U30 TI 74LVCI4AD 2 1 IDT74FCT3244 U13 IDT IDT74FCT3244APYG APY SSOP20 3 2 SN74AHC1G00 U31 U38 TI SN74AHCIGOODBVR SOT23 5 4 1 12 288MHZ U2 DIGI KEY SG 8002CA PCC ND OSC003 12 288M
76. ee e e st a I A e PAIS JER I 1 BUSLOCK lt P usLOCK covrROLMP1 A lt ICONTROLIMPT 1 L BR4NC A ABA Co DATA35C9 DS SEE R21 p 036 44 000000 ooo ooo LLLI RNET8 Ruca DATA36 sa I eat O ASR DS lt psoB i R2 A7 D37 Las U4 T lt nc4 DATA E 17 HBG H BAG DST DSB B7 iD38 besal SRSA EEN Bes DATA38 en DS gt sa BYIN PA PRE l DATASI I RAS 4 Has D7 1D40 231 2 Wo mz DATA40 e IT CAS ge Ans ENEDREG ENEDREG B l l an e S N ERER a a kemi DatAAi PE PEL P Yi Be ID42 1 diei rei n s EMU C EMU DATAM nce r I L nom TMROE O MADE B AV mm d OE G TOK rek DATA 043 xo Tm K4 nou mi DJA Fall m A EI TON Bi gt DATAA4ES T E e e WA po EN A LJLQ i TDO BI lt TDO DATA45 coo DTSDA CI K SDA10 TE ACA De D46 l elemeli L TMs gt TMs Mi eee SDCKEI KI KA GDCKE elotes AD4 c5 iD47 L SELIL en 1 L1 PLACE CLOSE TO DSP PINS TRST gt DATAT a S5WE C SDWE DATA48 a SCLK DSP Bi gt ha Dag ODER AS S DE ELLE dnm DS P MSSDJ0 31 MS gt Doi En SSDO IRQ 3 0 B nb DATA50 gt x MSSDTI Gl isi ipsi videres 0805 patas EDI L MSSDA Wiusspa ba DEZT lid DATAS2 2 MSSD3i HAL mst BR e PlecLkt ba ar SP m54 DATAgADS 1U94 ADSP Man l one DATA55P Doo 0805 D2 D56 l E DATAS6 mE E3 1D57 DATAS7 e ID58 1 pans P e cuu F3 Dag 7 L DS
77. ide information about VisualDSP and the ADSP TS201S EZ KIT Lite evaluation system xviii ADSP TS201S EZ KIT Lite Evaluation System Manual Preface Accessing Documentation From Web Download manuals at the following Web site http www analog com processors technicalSupport technicalLi brary Select a processor family and book title Download archive zip files one for each manual Use any archive management software such as Win Zip to decompress downloaded files Printed Manuals For general questions regarding literature ordering call the Literature Center at l 800 ANALOGD 1 800 262 5643 and follow the prompts VisualDSP Documentation Set To purchase VisualDSP manuals call 1 603 883 2430 The manuals may be purchased only as a kit If you do not have an account with Analog Devices you are referred to Analog Devices distributors For information on our distributors log onto http www analog com salesdir continent asp Hardware Tools Manuals To purchase EZ KIT Lite and in circuit emulator ICE manuals call 1 603 883 2430 The manuals may be ordered by title or by product number located on the back cover of each manual ADSP TS201S EZ KIT Lite Evaluation System Manual xix Product Information Processor Manuals Hardware reference and instruction set reference manuals mav be ordered through the Literature Center at 1 800 ANALOGD 1 800 262 5643 or downloaded from the Analog Devices Web site
78. ide of the CPLD Once the audio interface has been enabled the audio data can be transferred to and from the processor by generating a DMARO cycle The audio data interfaces with the processor via the lowest 24 bits of the data bus D23 0 A CPLD IO connector P6 has been added to allow a user to connect to the CPLD and the external port ofthe ADSP TS201S DSP A processor Refer to the schematic for information on how the connector is wired to the CPLD Refer to the audio example program included in the EZ KIT Lite s installation directory for more information on how to use the audio interface Refer to Audio J9 and J10 on page 2 21 for information about the audio connectors 1 12 ADSP TS201S EZ KIT Lite Evaluation System Manual Using ADSP TS201S EZ KIT Lite Processor Link Ports The link ports on the ADSP TS201S processor uses Low Voltage Differ ential Signaling LVDS to communicate with each other Each processor has a TX transmit port and RX receive port for each of its link ports The RJ 45 connectors J4 5 are the TX and RX ports for processor A Similarly J6 7 are TX and RX for processor B The TX and RX of one processor s link ports should be respectively connected to RX and TX of another processor s link ports In this manner the TX of one processor connects to the RX of the other processor Connect the link ports with a standard CAT 5E networking cable The length of the cable may affect the maximum frequency at
79. ience The primary audience of this manual is a programmer who is familiar with Analog Devices processors This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruc tion set Programmers who are unfamiliar with Analog Devices processors can use this manual but should supplement it with other texts such as the ADSP TS201 TigerSHARC Processor Hardware Reference and the ADSP TS201 TigerSHARC Processor Programming Reference that describe your target architecture Programmers who are unfamiliar with VisualDSP should refer to the VisualDSP online Help and user s or getting started guides For the locations of these documents see Related Documents xii ADSP TS201S EZ KIT Lite Evaluation System Manual Preface Manual Contents The manual consists of D Chapter 1 Using ADSP TS201S EZ KIT Lite on page 1 1 Provides information on the EZ KIT Lite from a programmer s perspective and outlines the board s memory map Chapter 2 ADSP TS201S EZ KIT Lite Hardware Reference on page 2 1 Provides information on the hardware aspects of the EZ KIT Lite Appendix A ADSP TS201 EZ KIT Lite Bill Of Materials on page A 1 Provides a list of components used to manufacture the EZ KIT Lite board Appendix B ADSP TS201S EZ KIT Lite Schematic on page B 1 Provides the resources to allow EZ KIT Lite board level debugging Or to use as a reference design Appendix
80. in any of the following ways E mail questions or requests for information to processor support analog com World wide support processor europe analog com Europe support processor china analog com China support Fax questions or requests for information to 1 781 461 3010 North America 49 89 76903 157 Europe Related Documents For information on product related development software see the follow ing publications Table 1 Related Processor Publications Title Description ADSP TS201S Embedded Processor Data Sheet General functional description pinout and timing ADSP TS201 TigerSHARC Processor Hardware Reference Description of internal processor architecture and all register functions ADSP TS201 TigerSHARC Processor Pro gramming Reference Description of all allowed processor assembly instructions Table 2 Related VisualDSP Publications Title Description VisualDSP Users Guide Description of VisualDSP features and usage VisualDSP Assembler and Preprocessor Manual Description of the assembler function and com mands VisualDSP C C Complier and Library Manual for TigerSHARC Processors Description of the complier function and com mands for TigerSHARC processors xvi ADSP TS201S EZ KIT Lite Evaluation System Manual Preface Table 2 Related VisualDSP Publications Cont d Title Description VisualDS
81. ions appear within brackets delimited by commas and terminated with an ellipse read the example as an optional comma separated list of this SECTION Commands directives keywords and feature names are in text with letter gothic font filename Non keyword placeholders appear in text with italic style format D Note For correct operation A Note provides supplementary information on a related topic In the online version of this book the word Note appears instead of this symbol Caution Incorrect device operation may result if Caution Device damage may result if A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage In the online version of this book the word Caution appears instead of this symbol 9 Warning Injury to device users may result if A Warning identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for the devices users In the online version of this book the word Warning appears instead of this symbol ADSP TS201S EZ KIT Lite Evaluation System Manual xxi Notation Conventions Additional conventions which apply only to specific chapters may appear throughout this document xxii ADSP TS201S EZ KIT Lite Evaluation System Manual 1 USING ADSP TS201S EZ KIT LITE This chapter provides specific information to assist vou with deve
82. ite Pin 3 is missing to provide keving Pin 3 in the mating connector should have a plug When an emulator is connected to the JTAG header the USB debug interface is disabled Q When using an emulator with the EZ KIT Lite board follow the connection instructions provided with the emulator ADSP TS201S EZ KIT Lite Evaluation System Manual 2 21 Connectors USB ZJ1 The USB connector is a standard type B USB receptacle Part Description Manufacturer Part Number Type B USB receptacle MILL MAX 897 43 004 90 000000 DIGI KEY ED90064 ND Mating Connector USB cable provided with the kit ASSMAN AK672 2 3 RANDOM USB AB 1004A Expansion Interface J1 3 Three board to board connectors provide signals for most of the proces sor s peripheral interfaces The connectors are located at the bottom of the board For more information about the expansion interface see Expan sion Interface on page 2 3 Part Description Manufacturer Part Number 90 position 0 05 spacing SAMTEC SFC 145 T2 F D A Mating Connectors 90 position 0 05 spacing SAMTEC TFM 145 x1 series through hole 90 position 0 05 spacing SAMTEC TFM 145 x2 series surface mount 90 position 0 05 spacing SAMTEC TFC 145 series low cost 2 22 ADSP TS201S EZ KIT Lite Evaluation System Manual ADSP TS201S EZ KIT Lite Hardware Reference Link Ports J4 7 There ar
83. l rc B TESE E c I LAS 20 B Bed i SDCKEI 10 B iRAS DMAR3 Bj l ji IDMAR2 B 7 ram FAR RE pp edem ees A sai ee II EE Wo E ja LE L HDOM 12 LDQM 3 L IOWRI E B iMSH g r 3 ME TT To Mi Le pies Ne o L AY 14 13 eS 14 13 IMSSDO 1 MSSDTi 16 15 RD ii rAd min OMB BB See ccr ON sak em a ID e a L AN 16 15 A10 i e le i MSSD3I 18 17 IMSSD2 1 Ue c H9 L I Ao 7h40 me e 0 2 1 NN ANAL emos cde hp p C sho or DA 18 17 IATZ 71 Dag 18 17 1048 1 20 19 BMB 1 ds A15 20 19 AA D51 20 19 1D50_ i 22 21 N i At 22 21 IA16 D53 22 21 D52 F 24 23 E 1 T Aig 24 23 iA18 D55 24 23 1D54 1 26 25 Z aI T AZ 26 25 iA20 D571 26 25 1D56 1 28 27 J5 c ada ii n men dd I I I LI 4 Re oo NON MANN KAMAMMN e f AZI 28 27 A22 More 28 b7 ID58 1 RESET 30 29 pom GIN PAT 1 ml El TADA Besl inme d BM vem 2 NM KN ak ge l vi kane m ee ADS 30 po LONE ETA 30 a DNE 32 pi 2 LSOLKIN NAI C 2 LABEL DSP A RX 1 255 1 I 158577 ek e kk iii i Ag 32 81 A26 TI D63 32 81 D62 71 34 83 BaTiO PAT KO 3 E I ADS TI neme ME YO n n tm i A29 34 pa oen j FLAGT A 2i BS IFLAGO A l 36 Be 4 DSP A RX e ENS aa a a a ep MAN A a KOD 2 a ge Sav i AS 36 85 IA30 FAGO A 36 85 TLAGA OO 38 87 1 77 IBACKO A 5 e B EE 4 DURA I SO a a IFAGOB i B LSDATI NAT C 8 reay FLE J O E ee La Lou Pe ot 1 FLAG3 Bj
84. log Devices ADI evaluation system for TigerSHARCO floating point embedded processors The TigerSHARC processor is a static super scalar SSS architecture tar geted at software defined radio applications In these wireless infrastructure applications the TigerSHARC processor is replacing field programmable gate arrays FPGAs in the chip rate processing appli cations for third generation cellular T he performance flexibility multiprocessing and IO capabilities of the TigerSHARC processor makes it superior to FPGA implementations The evaluation board is designed to be used in conjunction with the Visu alDSP development environment to test the capabilities of the ADSP TS201S TigerSHARC processor The VisualDSP development environment gives you the ability to perform advanced application code development and debug such as Create compile assemble and link application programs written in C C and ADSP TS201S assembly Load run step in step out step over halt and set breakpoints in application program Read and write data and program memory Read and write core and peripheral registers Plot memory ADSP TS201S EZ KIT Lite Evaluation System Manual ix Access to the ADSP TS201S processor from a personal computer PC is achieved through a USB port or an optional JTAG emulator The USB interface gives unrestricted access to the ADSP TS201S processor and the evaluation board peripherals Analog Devices JTA
85. lopment of programs for the ADSP TS201S EZ KIT Lite evaluation system The information appears in the following sections e Package Contents on page 1 2 Lists the items contained in your ADSP TS201S EZ KIT Lite package Default Configuration on page 1 3 Shows the default configuration of the ADSP TS201S EZ KIT Lite Installation and Session Startup on page 1 5 Instructs how to start a new or open an existing ADSP TS201SEZ KIT Lite session using VisualDSP Evaluation License Restrictions on page 1 7 Describes the restrictions of the VisualDSP demo license shipped with the EZ KIT Lite Memory Map on page 1 7 Describes the ADSP TS201S EZ KIT Lite board s memory map SDRAM Interface on page 1 8 Defines the register values needed to configure the external mem ory for SDRAM access Flash Memory on page 1 9 Describes how to program and use the flash memory ADSP TS201S EZ KIT Lite Evaluation System Manual 1 1 Package Contents Programmable FLAG Pins on page 1 10 Describes the function and use of the programmable flag pins on the EZ KIT Lite evaluation system e Interrupt Pins on page 1 11 Describes the function and use of the interrupt pins on the EZ KIT Lite evaluation system e Audio Interface on page 1 12 Describes how to use and configure the audio interface e Processor Link Ports on page 1 13 Describes how to use and configure the link ports Exampl
86. lue Not populated Populated Populated 3 Populated Not populated Not populated 4 Populated Not populated Populated 5 Populated Populated Not populated 6 Populated Populated Populated 7 1 Default settings Clock Mode Settings The resistors on the clock generator U1 and the resistors on the SCLKRAT2 0 pins of each of the processors determine the frequency at which the two processors operate The frequency supplied to CLKIN of the processor also can be changed by replacing the 20 MHz oscillator U18 shipped with the board with a different oscillator Ensure that the selected clock mode and frequency do not exceed the minimum and maximum specifications of the ADSP TS201S processor as noted in the product data sheet The final frequency at which the processors operate is determined by the following equation Freq of U18 Mult Factor of Ul Mult Factor of SCLKRAT pins Final Oper Freq The default frequency factory setting is 20 MHz 5 5 500 MHz 2 12 ADSP TS201S EZ KIT Lite Evaluation System Manual ADSP TS201S EZ KIT Lite Hardware Reference Table 2 12 through Table 2 14 show the resistor settings for the clock generator and the SCLKRAT pins For more information on the clock modes see the ADSP TS201S processor data sheet at http www analog com UploadedFiles Data_Sheets ADSP_TS201S pdf Table 2 12 Clock Generator U1 Settings R215 R224 R3 R223 Multiplication
87. manent damage may occur on devices subjected to high energy discharges Proper ESD precautions are recommended 4 to avoid performance degradation or loss of functionality Store ALA unused EZ KIT Lite boards in the protective shipping package The ADSP TS201S EZ KIT Lite board is designed to run outside your personal computer as a stand alone unit You do not have to open your computer case ADSP TS201S EZ KIT Lite Evaluation System Manual 1 3 Default Configuration When removing the EZ KIT Lite board from the package handle the board carefully to avoid the discharge of static electricity which may dam age some components Figure 1 1 shows the default DIP switches connector locations and LEDs used in installation Confirm that your board is set up in the default configuration before using the board POWER RESET LED1LED8 SW m POWER J8 e Be M ANALOG T DEVICES g um ne SHO E USB amp SWIO E za m MONITOR Z ZLED3 Figure 1 1 EZ KIT Lite Hardware Setup 1 4 ADSP TS201S EZ KIT Lite Evaluation System Manual Using ADSP TS201S EZ KIT Lite Installation and Session Startup For correct operation install the software and hardware in the order presented in the VisualDSP Installation Quick Reference Card 1 Verify that the yellow USB monitor LED ZLED3 located near the USB connector is lit This signifies that the board is communicat ing properly with the hos
88. nker restricts a user program to 128K words of internal mem ory for code space with no restrictions for data space Refer to the VisualDSP Installation Quick Reference Card for details Memory Map The ADSP TS201S processor has 24 Mbits of internal memory that can be used for program storage or data storage The configuration of internal memory is detailed in the ADSP TS201 Tiger SHARC Processor Hardware Reference The ADSP TS201S EZ KIT Lite board contains 512K x 8 bit of external flash memory The memory is divided into eight uniform 64 Kb sections This memory connects to the processor s BMS and MSO pins The flash memory can be accessed in boot memory space as well as the external memory bank zero space The board also contains 4M x 64 bit of external SDRAM memorv The SDRAM memory connects to the processor s SDRAM interface ADSP TS201S EZ KIT Lite Evaluation System Manual 1 7 SDRAM Interface Table 1 1 EZ KIT Lite Evaluation Board Memory Map Start Address End Address Content Internal 0x0000 0000 0x 0001 FFF Internal memory 0 Memory ao 0x0005 FFFF Internal memory 2 0x0008 0000 0x0009 FFFF Internal memory 4 0x000C 0000 0x000D FFFF Internal memory 6 0x0010 0000 0x0011 FFFF Internal memory 8 0x0014 0000 0x0015 FFFF Internal memory 10 0x001E 0000 0x001E 03FF Internal registers 0x001F 0000 0x001F O3
89. ol configuration 1 9 C CLKIN pins 2 12 CLKOUT pins 2 4 clock frequency 2 12 generator U1 2 3 2 12 ratio settings 2 13 codecs See AD1871 AD1854 complex programmable logic device CPLD 1 12 configuration of this EZ KIT Lite 1 3 configuration resistors 2 10 connectors diagram of locations 1 4 2 20 J10 audio out 2 21 JI expansion 2 3 2 22 J2 expansion 2 3 2 22 J8 expansion 2 3 2 22 J4 7 link ports 2 23 J8 power 2 21 J9 audio in 2 5 2 21 ZJI USB 2 22 ZP4 JTAG 2 4 2 21 contents of this EZ KIT Lite package 1 2 CONTROLIMP l 0 resistors 2 14 control impedance selection R131 R143 2 14 core power regulators 2 2 speed 2 3 customer support xiv D D23 0 pins l 12 default configuration of this EZ KIT Lite l 3 DIP switches diagram of locations 2 5 SW10 2 5 2 9 SWI audio amplification switch 2 5 SW2 2 5 2 7 2 8 driver mode resistors CONTROLIMP l 0 2 14 drive strength selection R132 R135 136 2 15 ADSP TS201S EZ KIT Lite Evaluation System Manual I 1 INDEX DS2 0 pins 2 15 E EPROM boot mode 2 7 example programs 1 13 expansion interface 2 3 2 9 2 22 external interrupts 1 11 memory xi 1 7 2 4 memory space MSSDO 1 8 ports 2 3 voltage regulator 2 3 EZ KIT Lite board architecture 2 2 F features of this EZ KIT Lite x field programmable gate arrays FPGAs ix FLAG LEDs LED3 6 2 17 push buttons SW6 9 2 1
90. t emu patag e D da eta a i ae Y2 A5 ID43 TI I LDQM lt DOM TMROE 1 a i TeK Tax DATA43 e KAT NUN ye HDQMI lt DOM co pa Mn DATA gt e a CC e e e e e BE 4 FLAG FLAG 3 0 A TDO_AI lt WATDO patas 3499 1M aun Ki ee 15467 Ti SDAT101 lt SDA10 FLAG i TMS Ars patago 46 gt K2 a RM e AD4 C5 Di7 i 1 SDCKEI lt SDCKE FLAG2 PLACE CLOSE TO DSP PINS TRST L TRST DATA47 E u r D5 ID48 1 L _SDWE lt SDWE FLAG3 A mn DATA48 ao i SCLK DSPAIL gt lt lt e SED DATA49g 19 _ U1 B4 1550 I MSSDJ0 31 SSDO IRQ 3 0 A e e DATA50 e No ansann GUT TASTE n7 ae MSSDTI 0 A2 IDB1 1 ed kn od MSSD1 0805 DATASI pissed MSSD21 C108 C107 C103 C104 C141 ba 15527 1 eat MSSD2 0 1UF 0 01UF 0 01UF 0 01UF 0 1UF DATAS2 MSSD3i 0402 0402 0402 0402 7 0402 P1 Bi 5 Ga E MSSD3 e SCLK1 DATA53 ELA IDEA a DATAs4P3 P54 ADSP TS2018A e e D1 D55 BP576 C34 DATA55 cori 10PF D2 D56 0805 DATA56 eol I PNE pATAST 1558 1 DATAgSE A D58 IDT5V928PGI 20MHz EE EE Le PI Ipo TI L DSP RESET DD RsTN DATASg 3 W22 1560 71 DATA60 4289 _ yan m U RST OUT DATAG1ET 1061 0 E2 D6 2 1 PONES NN IDEO ANALOG oton Road POR IN DATA63 wa A Por Nashua NH 03063 4 DEVICES PH 1 800 ANALOGD BP576 Title ADSP TS201S EZ KIT LITE Size Board No A0178 2002 Rev Date 1 10 2007 10 57 Sheet 2 of 15
91. t PC and is ready to run VisualDSP 2 If you are running VisualDSP for the first time navigate to the VisualDSP environment via the Start gt Programs menu The main window appears Note that VisualDSP does not connect to any session Skip the rest of this step to step 3 If you have run VisualDSP previously the last opened session appears on the screen You can override the default behavior and force VisualDSP to start a new session by pressing and holding down the Ctrl key while starting VisualDSP Do not release the Ctrl key until the Session Wizard appears on the screen Go to step 4 3 To connect to a new EZ KIT Lite session start Session Wizard by selecting one of the following e From the Session menu New Session e From the Session menu Session List Then click New Ses sion from the Session List dialog box From the Session menu Connect to Target Then click New Session from the Session List dialog box 4 The Select Processor page of the wizard appears on the screen Ensure TigerSHARC is selected in Processor family In Choose a target processor select ADSP TS201 Click Next ADSP TS201S EZ KIT Lite Evaluation System Manual 1 5 Installation and Session Startup 5 The Select Connection Tvpe page of the wizard appears on the screen Select EZ KIT Lite and click Next 6 The Select Platform page of the wizard appears on the screen In the Select vour platform list select ADSP TS201S EZ KIT
92. t populated Not populated Not populated 4 Not populated Not populated Populated 5 Not populated Populated Not populated 6 Not populated Populated Populated 7 Populated Not populated Not populated 8 Populated Not populated Populated 10 Populated Populated Not populated 12 Populated Populated Populated Reserved 1 Default settings The processor A and processor B SCLK ratios must be of the same value Control Impedance Selection The CONTROLIMP1 and CONTROLIMPO resistors set the impedance and driver mode of the processors as described in Table 2 15 The resistors are used together with the drive strength pins to determine the actual impedance and drive strength Refer to the ADSP TS201S processor data sheet at http www analog com UploadedFiles Data Sheets ADSP TS201S pdf for more information 2 14 ADSP TS201S EZ KIT Lite Evaluation System Manual ADSP TS201S EZ KIT Lite Hardware Reference Table 2 15 Control Impedance Selection R143 CONTROLIMPI R131 CONTROLIMPO Driver Mode Populated Not populated Normal Populated Populated Pulse mode Not populated Not populated A D mode Not populated Populated Pulse mode A D mode 1 Default settings Drive Strength Selection The DS2 0 pins of each processor determine the digital drive strength as described in Table 2 16 and Table 2 17 Refer to the ADSP TS201S pro cessor data sheet at http www analog com UploadedFiles Data Sheets A
93. teraction with the running program through the use of a switch SW6 9 The FLAG2 and FLAG3 pins from each processor are connected to LEDs LED3 6 After the processor is reset the programmable flags are configured as inputs The direction of each programmable FLAG is configured in the FLAGREG register If the flag is configured for output the value of the flag pin is set in the FLAGREG register If the flag is configured for input the value on the flag pin is read from the SQSTAT register Programmable flags are summarized in Table 1 3 For more information on how to configure the programmable flag pins see the ADSP TS201S TigerSHARC Processor Hardware Reference 1 10 ADSP TS201S EZ KIT Lite Evaluation System Manual Using ADSP TS201S EZ KIT Lite Table l 3 Programmable FLAG Pin Summarv FLAG Connection Description FLAGO A SW9 The FLAGO and FLAGI pins connect to the push buttons to supply feedback for program execution For instance FLAGI A SW8 you can write user input to trigger a routine when the push button is pressed FLAGO B SW6 FLAGI B SW7 FLAG2 A LEDA The FLAG2 and FLAG3 pins connect to the LEDs to sup ly feedback during program execution FLAG3 A LED6 d BP FLAG2 B LED5 FLAG3 B LED3 Interrupt Pins The ADSP TS201S processor includes four interrupt pins 1R03 0 for interaction with the running program One external interrupt from each processor is directly
94. to a 512K x 8 bit flash memorv The flash memorv connects to the boot memorv select BMS and memorv bank 0 MS0 pins The flash can be used to boot the processor as well as to store information during normal operation Refer to Flash Memory on page 1 9 for more information The EP also connects to a 4MB x 64 bit SDRAM Refer to SDRAM Interface on page 1 8 for more information Expansion Interface The expansion interface consists of three connectors The following table shows the interfaces each connector provides For the exact pinout of the connectors refer to Expansion Interface on page B 11 Table 2 1 Expansion Interface Connectors Connector Interfaces JI 5V GND address data ADSP TS201S EZ KIT Lite Evaluation System Manual 2 3 Svstem Architecture Table 2 1 Expansion Interface Connectors Contd Connector Interfaces J2 2 5V GND SDRAM control signals flags IRQs timers data J3 GND reset DMA memory control CLKOUT Link Ports signals When you use the expansion interface limits to the current and to the interface speed must be taken into consideration The maximum current limit depends on the regulator capabilities Additional circuitry can also add extra loading to signals decreasing their maximum effective speed Analog Devices does not support and is not responsible for the effects of additional circuitry JTAG Emulation Port The JTAG emulation
95. ton flags two for each processor v 2 push button interrupts one for each processor v 4LED FLAG outputs two for each processor Analog Devices ADP3331 ADP3336 ADP1864 ADP1821 and ADP1823 voltage regulators The EZ KIT Lite board contains two external memories flash memory and SDRAM The flash memory can be used to store user specific boot code By configuring the boot mode switch SW2 and programming the flash memory the board can run as a stand alone unit The SDRAM is shared by both processors and can be used to store data external to the processors For more information see Memory Map on page l 7 The EZ KIT Lite board contains an audio interface facilitating creation of audio signal processing applications Additionally the EZ KIT Lite board provides expansion connectors allowing you to connect to the processor s external port EP ADSP TS201S EZ KIT Lite Evaluation System Manual xi Purpose of This Manual Purpose of This Manual The ADSP TS201S EZ KIT Lite Evaluation System Manual provides instructions for installing the product hardware board The text describes the operation and configuration of the board components and provides guidelines for running your own code on the ADSP TS201S EZ KIT Lite Finally a schematic and a bill of materials are provided as a reference for future designs The product software installation is detailed in the VisualDSP Installa tion Quick Reference Card Intended Aud
96. which the data can be transferred Refer to the ADSP TS201S embedded processor data sheet at http www analog com Uploaded Files Data Sheets ADSP TS201S pdf for more information There are four link ports on each of the processors on the EZ KIT Lite For each processor the Link Port 0 transmit signals are connected to the receive of the same Link Port 0 signals Link ports 2 and 3 connect the transmit of one processor to the receive of the other processor Example Programs Example programs are provided with the ADSP TS201S EZ KIT Lite to demonstrate various capabilities of the evaluation board These programs are installed with the EZ KIT Lite software and can be found in the TS Examples ADSP TS201 EZ KIT Lite subdirectory of the Visu alDSP installation directory Please refer to the readme file provided with each example program for more information When running the examples do not change the BGEN or NMOD 8 or 9 bits in the SQCTL register The change can disable commu nications with the host ADSP TS201S EZ KIT Lite Evaluation System Manual 1 13 Flash Programmer Utility Flash Programmer Utility The ADSP TS201S EZ KIT Lite evaluation system includes a Flash Pro grammer utility The utility allows you to program the flash memory on the EZ KIT Lite The Flash Programmer is installed with VisualDSP Once the utility is installed it is accessible from the Tools pull down menu For more information on the Flash Progr
97. y with the essential requirements of the European EMC directive 89 336 EEC inclusive 93 68 EEC and therefore carries the CE mark The ADSP TS201S EZ KIT Lite evaluation system had been appended to Analog Devices Development Tools Technical Construction File refer enced DSPTOOLS1 dated December 21 1997 and was awarded CE Certification by an appointed European Competent Body and is on file The EZ KIT Lite evaluation system contains ESD electrostatic discharge sensitive devices Electrostatic charges readily accumu late on the human body and equipment and can discharge without A detection Permanent damage mav occur on devices subjected to high energv discharges Proper ESD precautions are recommended 4 to avoid performance degradation or loss of functionality Store dak unused EZ KIT Lite boards in the protective shipping package CONTENTS PREFACE Purpose ot This Manual ip kt oka skali LU pii ron adi ia dide xii E 211 ia ali P UM xii Pauca ORD riada FUR ER MN HR E xii Whats New m This Mamial ri xiii Technical or Customer SUpport RA xiv Sapported IDEO paria xiv Iodust Inlet A l kat bi e kk kk ok Iq kk kk n kk kk kk l XV E ee A EA xv Processor Product Informati n arar XV Related Documents sion bel pid sida qat kask tid xvi Online Technical Documentation cines xvii Accessing Documentation From VisualDSP xviii Accessing Documentation From Windows

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