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        IFX80471SKV Demo Board Users Manual
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1.  Di N Schottky Diode MBRD 360  3A  60V  D2 Diode  S3D 3A   Mi   P channel MOSFET   BSP 613P     3 1 About the IFX80471SKV demo board    The IFX80471SKV has open drain outputs at the pins RO and SO  The pull up resistors R12 and R13 on the  demo board are connected to the V_EXT pad  V_EXT should be connected to an appropriate pull up voltage  source  usually the microcontroller I O voltage source   The pull up resistors have been assembled with a  value of R12 R13 5 1kQ  This resistor value should be checked with respect to the actual I O voltage and  microcontroller requirements  The driving capability of the reset output and sense output are described in the  datasheet  under    Electrical Characteristics     item 5 1 40 and 5 1 55      The synchronizing function is disabled by the OQ resistor R8 connecting pin 5 directly to GND  In case the  synchronizing function is needed make sure R8 is removed before connecting a TTL Level frequency  source to the SYNC connector of the demo board      Mounted on PCB back side      Pin 2  GND  to be cut before assembly on demo board    Demoboard 4 Rev 1 0  2012 05 15    Infineon Demo Board IFX80471       4 Dimensioning of the external components  The equations for the dimensioning of the external components L1  R1 are given in the datasheet in chapter  7  where the dimensioning of the feedback divider resistors R4 and R5 is discussed     In this application note a practical approach how to apply these equations for given application requ
2. Cinfineon    IFX80471SKV    Demo Board User   s Manual    Demoboard  Rev 1 0  2012 05 15    Infineon Demo Board IFX80471       1 Abstract    Note  The following information is given as a guideline for the implementation of the device only and shall not  be regarded as a description or warranty of a certain functionality  condition or quality of the device     This Application Note is intended to provide support for using the demo board of the Step Down DC to DC  Controller IFX80471SKV  This document is written in order to help the reader understand the dimensioning  of the external components needed for the proper functioning of the DC DC controller  It will also enable the  reader to change the external components to adapt the function of the controller to his her application needs     2 Introduction    Selection of appropriate external components and the layout of the PCB are key factors when designing  DC DC applications for various industrial environments  The goal is to achieve optimum functionality with  minimum output voltage ripple and good EMC performance  This application note provides  as an example     1  proposal for the components selection  2  recommendation for layout    Lo    PIN     i Tam     ma dr    N  uh  ib  iw      rm      ie    a  os   gt     tro  oe   gt      rs    am       Figure 1 Photo of the demo board assembled with the IFX80471SKV DC DC Controller     Demoboard 2 Rev 1 0  2012 05 15    Infineon Demo Board IFX80471       3 Application schematic f
3. eference generating  positive feedback that might cause instability  Usage of low ESR ceramic capacitors in the range 220nF  to 1uF is recommended     For further details about the pin definitions and functions please refer to section 3 2 of the IFX80471  datasheet     7 Additional Information    e For further information please refer to www infineon com industrial standard  e For technical support please write to support infineon com    Demoboard 9 Rev 1 0  2012 05 15    Infineon Demo Board IFX80471       AP Number  Revision History  2012 05 15 Rev  1 0  Previous Version  none  1 0 Initial Rev   Demoboard 10 Rev 1 0  2012 05 15    Edition 2009    Published by  Infineon Technologies AG  81726 M  nchen  Germany       Infineon Technologies AG 2006   All Rights Reserved     LEGAL DISCLAIMER    THE INFORMATION GIVEN IN THIS APPLICATION NOTE IS GIVEN AS A HINT FOR THE  IMPLEMENTATION OF THE INFINEON TECHNOLOGIES COMPONENT ONLY AND SHALL NOT BE  REGARDED AS ANY DESCRIPTION OR WARRANTY OF A CERTAIN FUNCTIONALITY  CONDITION OR  QUALITY OF THE INFINEON TECHNOLOGIES COMPONENT  THE RECIPIENT OF THIS APPLICATION  NOTE MUST VERIFY ANY FUNCTION DESCRIBED HEREIN IN THE REAL APPLICATION  INFINEON  TECHNOLOGIES HEREBY DISCLAIMS ANY AND ALL WARRANTIES AND LIABILITIES OF ANY KIND   INCLUDING WITHOUT LIMITATION WARRANTIES OF NON INFRINGEMENT OF INTELLECTUAL  PROPERTY RIGHTS OF ANY THIRD PARTY  WITH RESPECT TO ANY AND ALL INFORMATION GIVEN  IN THIS APPLICATION NOTE     Information    For further 
4. he maximum  available load current according to the equation    lpeak PWM ILoaqt 0 5   Al    Demoboard 5 Rev 1 0  2012 05 15    Infineon Demo Board IFX80471       To continue we select Ri as  R1 22m0    Using this value we can calculate the maximum allowed ripple current  assuming still a load current of 2 0A     somV 22m0 2 0A  ax   mm    0 5    In order to keep the output voltage ripple as low as possible we choose a ripple current of 300mA in the  typical operation condition with 13 5V VBAT  corresponding to 15  of the 2 0A maximum load current  In the  datasheet  chapter 7 8 1 we find the equation        Vin   Your   Vour  fsw Vin LI  which we now use to define the buck inductance L1   _  13 5V    5 0V  5 0V _ 30uH  370kKHz 13 5V  300mA    Al_   545mA     Al    We select the next norm value     L1 33UH   Now it remains to check if the stability conditions arising from the slope compensation are fulfilled  The  inequation from chapter 7 8 1 in the datasheet gives us     2 0x107  e  Vour  e  Rsense   lt  LI  lt   4 0x10   e  Vour  e  Rense    2 0x107  e  7 1V  e  22m0   lt  L1  lt   4 0x107  e  7 1V  e  22m0   3luH lt L1 lt 62uH      which confirms that our selected inductance is good to maintain stability     5 Components placement and PCB layout of the Demo Board    For EMC optimization the demo board comes with an input II Filter  C4  L2  and C1   Thus emission from  the VBAT line is largely suppressed     For proper operation and to avoid stray inductance paths the exte
5. information on technology  delivery terms and conditions and prices please contact your nearest  Infineon Technologies Office  www  infineon com      Warnings    Due to technical requirements components may contain dangerous substances  For information on the types  in question please contact your nearest Infineon Technologies Office     Infineon Technologies components may be used in life support devices or systems only with the express  written approval of Infineon Technologies  if a failure of such components can reasonably be expected to  cause the failure of that life support device or system or to affect the safety or effectiveness of that device or  system  Life support devices or systems are intended to be implanted in the human body or to support and or  maintain and sustain and or protect human life  If they fail  it is reasonable to assume that the health of the  user or other persons may be endangered     
6. irements  is shown     IFX80471 SKV  Rsense   90m2    5  TINT  ITIN     0 25 05 0 75         Figure 4 Example of typ  characteristic of the output current limit  foldback      4 1 Variable output voltage    For the IFX80471SKV variable device demo board we use the same output current target as for the fixed  voltage version  2 0A  with permission to be in the foldback current limit range  see Fig  4   The desired  output voltage should be typ  7 10V     We should now fix the feedback output voltage divider  The datasheet  chapter 7 3  allows a range from 5kQ  to 500kQ2 for R5  corresponds to Rrg gt    We have selected a value of R5  47kQ     Using the feedback voltage value of 1 25V  item 5 1 12 of the electrical characteristics in the datasheet  we  can calculate R4 as    R4  47kQ  7 10V 1 25V  1    220k0      The following procedure is very similar to component dimentioning for the 5V versions  The shunt resistor is  given by the current limitation target     From the datasheet  Chapter 7 8 2  the equation for R1 is   R1   Vim   2  IpEaK PwM  Vim is specified in the electrical characteristics as item 5 1 27    peak current limit threshold voltage        50mV   90mV  To get the worst case  lowest  current we apply the equation above  but we leave out the  factor 2 since we have accepted to enter the foldback part of the current characteristic  We get    R1 max  50mV 2 0A  25mQ     We have to take into account that we have not yet considered the ripple current which reduces t
7. or Adjustable version    Figure 2 shows the minimum application circuit as proposed in the IFX80471 Datasheet which applies for the  adjustable output voltage version IFX80471SKV       Infineon BSO 613SPV  or Infineon BSP 613P  CS GDRV VOUT    SO  IFX80471SKV       Figure 2 Minimum application circuit for IFX80471SKV     The complete circuitry used for the demo board is shown in Figure 3  Compared to the minimum circuitry it   e covers a wider load current range  e improves EMC performance  e enables to use only one PCB to evaluate other voltage variants of the device    C4_1  4 7uF    C4 2    4 7uF C2  100nF  100 uF    C1    CS    IFX80471SKV _    MPH       Figure 3 Schematic of the demo board for IFX80471SKV     Demoboard 3 Rev 1 0  2012 05 15    Infineon Demo Board IFX80471       Table 1 E recommendation     BOM for IFX80471SKV  Device Supplier     Type Value  amp  Remark    12 224H  2 5A  66m0  Ci 100NF  63V  C2     Ceramic capacitor X7R  100nF   gt 60V     C3    o capacitor X7R  2 2nF  16V    C4 1 C4 2 TDK Ceramic capacitor C4532X7R1H475M   X7R  4 7uF  50Vq    C5 a Tantalum electrolytic capacitor Low ESR     Speed Power     B45010D1076M506    C6 Ceramic capacitor X7R  100nF  16V  C7 TDK Ceramic capacitor C3216X7R2A224 X7R  220nF  100V  C8 Ceramic capacitor X7R  220nF  16V  C9 not assembled      RI pf Resistor   22m  21   ow      i   R3 EEE Resistor Jeg   R4 pf Resistor 1 220k0   R7 R9 not assembled fo   R10 Resistor   RA   RI pf Resistor   OK   R12R13     Resistor   ET  
8. re 7 as the green highlighted area and the blue trace respectively  The Input and Output  capacitors should have a short low inductance link     small area                ground area  second layer       Figure 6 Layout Recommendations  Blue Line  Short Connection  Green  Small Area     The supply voltage should be routed via the pins of the input capacitors  The output voltage should be routed  via the pins of the output capacitors  It is recommended to design the ground as a ground area ina an layer   There should be a direct connection of all GND terminals of input capacitors  free wheeling diode D1  output  capacitors  the IC  RC elements and filter capacitors  Use a star shaped ground link to avoid ground looping   Separate the ground system  connect to external wiring ground only via a single trace  Connect the current  sensing IC terminals  pin 13 and 14  directly to the shunt R1 and design to be short     Please also make sure the following pins are free from any switching noise     Demoboard 8 Rev 1 0  2012 05 15    Infineon Demo Board IFX80471       e Pin 2   FB   Feedback Input  Keep the PCB traces far from switching nodes to prevent from coupled  switching noise  Use of low ESR ceramic capacitors recommended     e Pin 3   VOUT   Buck Output Voltage Input  Use low ESR ceramic capacitors   e Pin 5   SYNC   Input for external frequency synchronization   e Pin 8   COMP   Compesation Input     e Pin 13   VS   Device Supply Input  Spikes at VS may influence the Bandgap r
9. rnal catch diode  the Buck inductance and  the input capacitor Cin  have to be connected as close as possible to the PMOS device  Also the GDRV path  from the controller to the switching transistor should be as short as possible  Best suitable for the connection  of the cathode of the catch diode and one terminal of the inductance would be a small plain located next to  the drain of the PMOS    The GND connection of the catch diode must be also as short as possible  In general the GND level should  be implemented as surface area over the whole PCB as second layer    The most sensitive points for coupled switching noise are the feedback path to the pins FB and VOUT and  the input path  Also switching noise coupled back to the SYNC input must be avoided  These paths should  be kept away from the switching node  On the demo board also the ceramic capacitor C6 helps to suppress  potential noise on the feedback line     Demoboard 6 Rev 1 0  2012 05 15    Cinfineon    Demo Board IFX80471         at   E  T  co          Figure5 PCB Layout Front and Back    Demoboard    Rev 1 0  2012 05 15    Infineon Demo Board IFX80471       6 General Layout Recommendations    It is important to follow the layout recommendations given in this section  The commutation circuit input  capacitor C1  the PMOS M1 and the free wheeling diode D1 should be as compact as possible in order to  have low inductance  The area of the connection M1 L1 D1 should be as small as possible  This can be  seen in the Figu
    
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