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Sense & Control User`s Manual TLE5012B Angle Sensor
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1. w 3 2 1 0 ANG_RANGE AUTOCAL ANG_DIR PREDICT Ww Ww Ww Ww Field Bits Type Description ANG_RANGE 14 4 Angle Range Changes the representation of the angle output AVAL register by multiplying the output with a factor ANG_RANGE 128 080 factor 1 default magnetic angle 180 180 mapped to values 16384 16383 200 factor 4 magnetic angle 45 45 mapped to values 16384 16383 040 factor 0 5 magnetic angle 180 180 mapped to values 8192 8191 Reset 080 ANG_DIR Angle Direction Inverts angle and angle speed values and revolution counter behaviour Og counterclockwise rotation of magnet 1g clockwise rotation of magnet Reset 0 PREDICT Prediction Prediction of angle value based on current angle speed see data sheet Og prediction disabled 1g prediction enabled Reset derivate specific User s Manual 84 V 1 0 2014 04 TLE5012B Infineon SSC Registers Field Bits Type Description AUTOCAL 1 0 Ww Auto calibration Mode Automatic calibration of offset and amplitude synchronicity for applications with full turn Only 1 LSB corrected at each update CRC check of calibration registers is automatically disabled if AUTOCAL activated Auto calibration is described in the data sheet 00 no auto calibration 01 auto cal mode 1 update every angle update cycle FIR_MD setting 10 auto c
2. 1 Command 1_0000_0_000011_0010 R W_Lock_UPD_ADD_ND 2 Read Data 1_XXXXXXXXXXXXXXX Transmit angle speed 3 Read Data 1_XXXXXX_XXXXXXXXX Transmit angle revolution 4 Safety Word 1_1_1_1_XXXX_XXXXXXXX Transmit safety word Figure 6 5 SSC command to read angle speed and angle revolution Micro controller 1 Command 0_1010_0_001000_0001 R W_Lock_UPD_ADD_ND 2 Write Data 0_00010000000_1 0 01 Set ANG_Range 080 ANG_DIR 1s PREDICT 0g AUTOCAL 013 3 Safety Word 1_1_1_1_XXXX_XXXXXXXX Transmit safety word Figure 6 6 SSC command to change Interface Mode2 register User s Manual 65 TLE5012B TLE5012B TLE5012B V 1 0 2014 04 TLE5012B Infineon SSC Registers Writing process to avoid overwritting When writing in a certain field of a register it is important to not overwrite the bits from the other fields in the same register Therefore for the registers with many fields a Read has to be done previous to a Write so the content of the bits from the register can be written back and avoid unintended over writting in other fields than the desired field After a Write is recommended to do a Read to ensure that the values are correctly set Figure 6 7 shows the described sequence when a configuration parameter needs to be changed ae change desired A read register rca En 4 bits only 8 for check A Figure 6 7 SSC data transfer sequence to chan
3. SSC Registers Increment Counter Register IIF_CNT Offset Reset Value IIF Counter value 204 0000 15 14 13 0 Res IIF_CNT ru Field Bits Type Description IIF_CNT 13 0 ru Counter value of increments Internal 14 bit counter for the incremental interface which counts from 0 to 16383 during one full turn It can be used for synchronization purposes between sensor and counter value on microcontroller side Therefore depending on the setting of the IFAB_RES register Qbit to 12bit resolution of incremental interface 2 to 5 LSBs have to be removed from IIF_CNT for the synchronization Reset 04 Temperature 25 C offset value T250 Offset Reset Value Temperature 25 C Offset value 304 device specific 15 14 13 12 11 10 9 8 T250 Res F r 7 6 5 4 3 2 1 0 Res Field Bits Type Description T250 15 9 r Temperature 25 C Offset value Signed offset value at 25 C temperature 1dig 0 36 C T250 T_RAW 25 C dig 439 dig Reset device specific User s Manual 97 V 1 0 2014 04 TLE5012B Infineon Pre Configured Derivates 7 Pre Configured Derivates Derivates of the TLE5012B are available with different pre configured register settings for specific applications The default configuration of all derivates is described below see Chapter 7 6 for the respective fuse configuration and can be changed at start up via SSC interface 7 1 lIIF type E1000
4. The TLE5012B E1000 is preconfigured for Incremental Interface and fast angle update rate 42 7 us It is most suitable for BLDC motor commutation e Incremental Interface A B mode e 12bit mode one count per 0 088 angle step e Absolute count enabled e Autocalibration mode 1 enabled e Prediction disabled e Hysteresis set to 0 703 IFA IFB IFC pins set to push pull output e SSC interface s DATA pin set to push pull output IFA IFB IFC pins set to strong driver DATA pin set to strong driver fast edge e Voltage spike filter on input pads disabled 7 2 HSM type E3005 The TLE5012B E3005 is preconfigured for Hall Switch Mode and fast angle update rate 42 7 us It is most suitable as a replacement for three Hall switches for BLDC motor commutation e Number of pole pairs is set to 5 e Autocalibration mode 1 enabled e Prediction enabled e Hysteresis set to 0 703 IFA HS1 IFB HS2 IFC HS3 pins set to push pull output e SSC interface s DATA pin set to push pull output IFA IFB IFC pins set to strong driver DATA pin set to strong driver fast edge e Voltage spike filter on input pads disabled 7 3 PWM type E5000 The TLE5012B E5000 is preconfigured for Pulse Width Modulation interface It is most suitable for steering angle and actuator position sensing e PWM frequency is 244 Hz e Filter update time is 85 4 us e Error indication enabled e Autocalibration disabled e Predict
5. Trigger Nibble l Synchronisation Frame End Pulse l l l l I l l l l I l I l I l l l I l l l t i t i I I I I I C Activity Sensor Activity gt 90 Us Figure 5 14 SPC pause timing diagram In SPC mode the sensor does not continuously calculate an angle from the raw data Instead the angle calculation is started by the trigger nibble from the master in order to minimize timing jitter In this mode the AVAL register which stores the angle value and can be read via SSC contains the angle which was calculated after the last SPC trigger nibble This means that in any case to update the registers and read the data via SSC a trigger nibble has to be previously generated IFC pin 1 SPI SCK pin 2 slave x IFA SPC TLE5012B pin 5 master HC Figure 5 15 SPC configuration in open drain mode In parallel to SPC the SSC interface can be used for individual configuration The number of transmitted SPC nibbles can be changed to customize the amount of information sent by the sensor The frame contains a 16 bit angle value and an 8 bit temperature value in the full configuration Table 5 8 Sensors with preset SPC are available as TLE5012B E9000 The register settings for these sensors can be found in the Chapter 7 User s Manual 47 V 1 0 2014 04 armi Infineon TLE5012B Interfaces Table 5 8 Frame configuration Frame type IFAB_RES Data nibble
6. OFFX Offset Reset Value Offset X 0A device specific 15 8 X_OFFSET w 7 4 3 0 X_OFFSET Res w Field Bits Type Description X_OFFSET 15 4 Ww Offset Correction of X value in digits 12 bit signed integer value of raw X signal offset correction at 25 C Reset device specific Offset Y Register OFFY Offset Reset Value Offset Y OB device specific 15 8 Y_OFFSET w 7 4 3 0 Y_OFFSET Res w Field Bits Type Description Y_OFFSET 15 4 w Offset Correction of Y value in digits 12 bit signed integer value of raw Y signal offset correction at 25 C Reset device specific User s Manual 87 V 1 0 2014 04 TLE5012B Infineon SSC Registers Synchronicity Register SYNCH Offset Reset Value Synchronicity oc device specific 15 8 SYNCH w 7 4 3 0 SYNCH Res w Field Bits Type Description SYNCH 15 4 w Amplitude Synchronicity 12 bit signed integer value of amplitude synchronicity correction raw X amplitude divided by raw Y amplitude For synchronicity correction the offset compensated Y value is multiplied by SYNCH 2047p 112 494 Op 100 2048p 87 500 Reset device specific User s Manual 88 V 1 0 2014 04 Infineon TLE5012B IFAB Register multi purpose IFAB IFAB Register 15 SSC Registers Offset Reset Value oD device specific 3 2 1 0 ORTHO FIR_UDR IFAB_OD IFAB_HYST Ww Ww Ww Field Bits Type Descri
7. Reset 0 FILT_INV 14 w Filter Inverted Diagnostic function to test ADCs If enabled the X and Y signals are inverted The angle output is then shifted by 180 Og filter inverted disabled 1g filter inverted enabled Reset 0g User s Manual 82 V 1 0 2014 04 Infineon TLE5012B SSC Registers Field Bits Type Description FUSE_REL 10 Fuse Reload Triggers reload of default values from laser fuses into configuration registers Og normal operation 1g reload of registers with fuse values immediately Reloaded fuse values are used with the start of the next filter cycle Reset 0 ADCTV_EN ADC Test Vectors Diagnostic function to test ADCs If enabled sensor elements are internally disconnected and test voltages are connected to ADCs Test vectors can be selected via the register ADCTV_Y and ADCTW_X 0 ADC Test Vectors disabled 1 ADC Test Vectors enabled Reset 0 ADCTV_Y 5 3 Test vector Y 000 OV 001 70 010 100 011 Overflow 101 70 110 100 111 Overflow Reset 04 ADCTV_X 2 0 Test vector X 000 OV 001 70 010 100 011 Overflow 101 70 110 100 111 Overflow Reset 04 User s Manual 83 V 1 0 2014 04 Infineon TLE5012B Interface Mode2 Register MOD_2 Interface Mode2 Register 15 14 Offset SSC Registers Reset Value 084 derivate specific Res ANG_RANGE
8. T_RAW Reg lIF_CNT 20 lF Counter value Reg T250 30 Temp 25 C Offset Figure 6 2 Bitmap Part 2 Values most relevant Other Values Interface Configuration Multiple Sensors Configuration Calibration Configuration Calibration Default Values Other Configuration Diagnosis Reserved bits Figure 6 3 Colour legend for the Bitmap User s Manual 62 V 1 0 2014 04 TLE5012B Infineon SSC Registers Most relevant data and configuration bits The most relevant data and configuration bits are described below To find more details e g whether to set the bit to high or low please refer to Chapter 6 2 Angle value the angle value can be found in the AVAL register 02 under the ANG_VAL bits bits 14 0 Angle speed the angle speed can be found in the ASPD register 03 under the ANG_SPD bits bits 14 0 Number of revolutions the number of revolutions can be found in the AREV register 04 under the REVOL bitrs bits 8 0 For every full rotation in counter clockwise direction the number of revolutions increments by one for every full rotation in clockwise direction it decrements by one Raw values from the two GMR sensors the raw values from the two GMR sensors can be accessed via the ADC_X and ADC_Y registers 10 and 11 respectively Resolution the MOD_4 register OE contains two IFAB_RES bits bits 4 3 that are multi purpose For each interface the
9. fonws 929 977 1050 Hz 1 faa 1855 1953 2099 Hz 1 Output duty cycle range DY pwm 6 25 93 75 Absolute angle 2 Electrical Error S_RST S_VR 1 2 98 System error S_FUSE S_OV S_XYOL S_MAGOL S_ADCT 0 1 Short to GND 99 1001 Short to Vpp power loss 1 Not subject to production test verified by design characterization 2 Both hardware and software resets will generate an Electrical Error duty cycle for the first PWM pulse after the reset S_RST After readout S_RST bit will be set to 0 so the second PWM pulse will indicate an angle The PWM frequency is derived from the digital clock via _ foi 2 IFAB_RES 5 7 24 4096 The min max values given in Table 5 7 take into account the internal digital clock variation specified in TLE5012B Data Sheet If external clock is used the variation of the PWM frequency can be derived from the variation of the external clock using Equation 5 7 Sow Pulse length convertion to angle value The length of the duty cycle represents the angle value Whatever the absolute angle value is the t n time depends on the angle value calculated by the TLE5012B with resolution up to 0 100 The 0 100 resolution is due to the fact that with 12bit resolution 4096 steps 100 of the duty cycle can be mapped but only 87 5 of the duty cycle translates to angle values This means that the 360 degees must be mapped with only 3584 steps 87 5 4
10. Reset 0 1 bit remains 1 after error occurred Bit is cleared to 0 when status register is read via SSC command 2 bit remains 1 after reset occurred Bit is cleared to O when status register is read via SSC command Note When an error occurs the corresponding bit in the safety word remains 0 until the status register is read User s Manual 74 V 1 0 2014 04 Infineon TLE5012B Activation Status Register SSC Registers ACSTAT Offset Reset Value Activation Status Register 01 18EE 15 11 10 9 8 Res AS_FRST AS_ADCT Res w w w 7 6 5 4 3 2 1 0 AS Ge aie AS_OV AS_DSPU AS_FUSE AS_VR AS_WD AS_RST w w w w w w w w Field Bits Type Description Res 15 11 w Reserved Reset 010115 AS_FRST 10 w Activation of Firmware Reset All configuration registers retain their contents Og after execution 1 activation of firmware reset S_RST is set Reset 0 AS_ADCT 9 Ww Enable ADC Test vector Check Activation of this test is only allowed with deactivated AUTOCAL Og after execution 1g activation of ADC Test vector Check Reset 1 AS_VEC_MAG 7 w Activation of Magnitude Check Os monitoring of magnitude disabled 1g monitoring of magnitude enabled Reset 1 AS_VEC_XY 6 Ww Activation of X Y Out of Limit Check 0s monitoring of X Y Out of Limit disabled 13 monitoring of X Y Out of Limit enabled Reset 1 AS_OV 5 w Enable of DSPU Ove
11. V 1 0 2014 04 TLE5012B Infineon Application Circuits 3 Application Circuits The application circuits in this chapter show the various communication possibilities of the TLE5012B The pin output mode configuration is device specific and it can be either push pull or open drain The bit IFAB_ OD register IFAB OD indicates the output mode for the IFA IFB and IFC pins The SSC pins are by default push pull bit SSC_OD register MOD_3 09 Figure 3 1 shows a basic block diagram of a TLE5012B with Incremental Interface and SSC configuration The derivate TLE5012B E1000 is by default configured with push pull IFA IIF_A IFB IIF_B and IFC IIF_IDX pins Vpp 3 0 5 5V TLE5012B 100nF Digital Signal Processing SSC Interface SSG Unit a CORDIC ISM Teruna IF PB te 8 RAM HSM IFC IIF_IDX recommended e g 100Q Foss Fea M aa recommended e g 4700 Figure 3 1 Application circuit for TLE5012B with IIF interface and SSC using internal CLK IFA lIF_A IIF In case that the IFA IFB and IFC pins are configured via the SSC interface as open drain pins three resistors one for each line between output line and Vpp would be recommended e g 2 2kQ Figure 3 2 shows a basic block diagram of the TLE5012B with HS Mode and SSC configuration The derivate TLE5012B E3005 is by default configured with push pull IFA HS1 IFB HS2
12. and IFC HS3 pins Vono 3 0 5 5V TLE5012B 100 nF Digital Signal Processing SSC Interface Unit CORDIC IFA HS1 CCU ccu pect sles IF HSM IFC HS3 Fuses Aes GND IFB HS2 recommended e g 100Q recommended e g 470Q Figure 3 2 Application circuit for TLE5012B with HS Mode and SSC using internal CLK User s Manual 17 V 1 0 2014 04 TLE5012B Infineon Application Circuits If the IFA IFB and IFC pins are configured via the SSC interface as open drain pins pull up resistors are required 2 2kQ recommended The TLE5012B can be configured with PWM only Figure 3 3 The derivate TLE5012B E5000 is by default configured with push pull IFA PWM pin Therefore the following configuration is recommended Vop 3 0 5 5V TLE5012B VRA 100 nF VRG x Digital GMR Signal Processing SCK SSC Interface Unit S Temp l U Incremental IF PWM HSM IFA PWM IFB IFC recommended e g 10 0kQ Figure 3 3 Application circuit for TLE5012B with only PWM interface using internal CLK The TLE5012B E5020 is also a PWM derivate but with open drain IFA PWM pin A pull up resistor e g 2 2kQ should then be added between the IFA line and VDD as shown in Figure 3 4 Von 3 0 5 5V 100nF VRG Digital Signal Processing SCK SSC Inter
13. should be read via SSC and an occuring S_FUSE error should be ignored User s Manual 85 V 1 0 2014 04 Infineon TLE5012B Interface Mode3 Register MOD_3 Interface Mode3 Register 15 SSC Registers Offset Reset Value 094 device specific ANG_BASE w 3 2 1 0 ANG_BASE SPIKEF SSC_OD PAD_DRV WwW Ww Ww Ww Field Bits Type Description ANG_BASE 15 4 Angle Base Sets the 0 angle position 12 bit value Angle base is factory calibrated to make the 0 direction parallel to the edge of the chip 800 180 000 0 7FFy 179 912 Reset device specific SPIKEF 3 Analog Spike Filter of Input Pads Filters voltage spikes on input pads Additional delay of 10 us for data input Og spike filter disabled 1g spike filter enabled Reset derivate specific SSC_OD 2 SSC Interface Data Pin Output Mode Og Push Pull 1g Open Drain Reset 0 PAD_DRV 1 0 Configuration of Pad Driver 00 IFA IFB IFC strong driver DATA strong driver fast edge 01 IFA IFB IFC strong driver DATA strong driver slow edge 10 IFA IFB IFC weak driver DATA medium driver fast edge 11g IFA IFB IFC weak driver DATA weak driver slow edge Reset derivate specific User s Manual 86 V 1 0 2014 04 Infineon TLE5012B Offset X Register SSC Registers
14. 23 V 1 0 2014 04 TLE5012B Infineon Specification 4 2 Prediction mode The TLE5012B has an optional prediction feature which serves to reduce the speed dependent angle error in applications where the rotation speed does not change abruptly Prediction uses the difference between current and last two angle values to approximate the angle value which will be present after the delay time see Figure 4 5 The output value is calculated by adding this difference to the measured value according to Equation 4 1 a t 1 a t a t 1 a t 2 4 1 Sensor output With Without Prediction Prediction Angle Magnetic field direction Figure 4 5 Delay of sensor output Revolution counter on prediction mode When the prediction mode is enabled the revolution counter register AREV bits REVOL uses the current calculated angle and not the predicted angle to increase counterclockwise direction or decrease clockwise direction the counter when the angle crosses the 0 position Therefore the prediction angle may already indicate that the 0 has been crossed but the revolution counter may still not increase or decrease if the current calculated angle has not yet changed quadrant Once the current calculated angle sees a 0 crossing the revolution counter will be updated The Figure 4 6 illustrates an example in the second picture the angle value with prediction has already crossed the 0 from 1 to
15. 29 Table 5 3 SSC open drain timing specification sasaa aaaeeeaa 30 Table 5 4 Structure of the Command Word 0 000 cece tee 31 Table 5 5 Structure of the Safety Word 0 0 eens 32 Table 6 Bit Types c s4 40Acdcbedeadaed boots eae bee 4 aes oo bn ae ibe Be de be eo bd Geel eels 32 Table 5 7 PWHMinterface 0 00000 cc eee eee eee 45 Table 5 8 Frame configuration 0 0 cc eee eae 48 Table 5 9 Structure of status nibble 00 00 cette 48 Table 5 10 Predivider setting 60 0 rs kenaa ee een eee ee eee 48 Table 5 11 Master pulse parameters 0000 cc teeta 49 Table 5 12 Hall Switch Mode 00 0c ccc tenet eee 53 Table 5 13 Incremental Interface 0020 eee 60 Table 6 1 BETPOS erep AEren Part eae ene ates eda taeda aes GM ae ae a 64 Table 6 2 Register Overview 0 0 0 cette eee 70 User s Manual 8 V 1 0 2014 04 TLE5012B Infineon Product Description 1 Product Description RoHS yal eZ Q a Acc Qualified Figure 1 1 PG DSO 8 package 1 1 Overview The TLE5012B is a 360 angle sensor that detects the orientation of a magnetic field This is achieved by measuring sine and cosine angle components with monolithically integrated Giant Magneto Resistance iGMR elements These raw signals sine and cosine are digitally processed internally to calculate the angle orientation of the magnetic fiel
16. Figures List of Figures Figure 1 1 Figure 1 2 Figure 2 1 Figure 2 2 Figure 2 3 Figure 2 4 Figure 2 5 Figure 2 6 Figure 3 1 Figure 3 2 Figure 3 3 Figure 3 4 Figure 3 5 Figure 3 6 Figure 3 7 Figure 4 1 Figure 4 2 Figure 4 3 Figure 4 4 Figure 4 5 Figure 4 6 Figure 5 1 Figure 5 2 Figure 5 3 Figure 5 4 Figure 5 5 Figure 5 6 Figure 5 7 Figure 5 8 Figure 5 9 Figure 5 10 Figure 5 11 Figure 5 12 Figure 5 13 Figure 5 14 Figure 5 15 Figure 5 16 Figure 5 17 Figure 5 18 Figure 5 19 Figure 5 20 Figure 5 21 Figure 5 22 Figure 5 23 Figure 5 24 Figure 5 25 Figure 5 26 Figure 5 27 Figure 6 1 PG DSO 8 package ceas eeir Hee ea eee ce Saas BAG aR Nea hes eee he eee wag aegis 9 A usual application for TLE5012B is the electrically commutated motor 10 TLE5012B block diagram 1 eee ae 11 Laser Fuses burning proceSS 0 c cect eee eee 12 PROSIL ie acne rescence cae Fie es ee tea oe wes eaters Foes eee eee 13 Sensitive bridges of the GMR sensor not to scale 0 0 0 ee 14 Ideal output of the GMR sensor bridges 000 eae 15 Pin configuration top VieW 0 0 0 cee 16 Application circuit for TLE5012B with IIF interface and SSC using internal CLK 17 Application circuit for TLE5012B with HS Mode and SSC using internal CLK 17 Application circuit for TLE5012B with only PWM interface using internal CLK 18 Application circuit for TL
17. Page 93 Reset device specific SBIST Startup BIST Og Startup BIST disabled 1g Startup BIST enabled Reset 1 CRC_PAR 7 0 CRC of Parameters CRC of parameters from address 08 to OF If any settings within these registers are changed this CRC has to be changed accordingly Reset device specific Offset temperature compensation The TLE5012B compensates the temperature dependence of the X and Y offsets during run time by using an integrated temperature measurement see register TEMPER on Page 80 and applying factory calibrated temperature coefficients for the offsets At a chip temperature of T the resulting offset correction parameters are given by Offset_X Y T Offset_X Y 25 C TCO_X Y_T TEMPER T TEMPER 25 C 128 6 7 Temperature compensation of the offsets is only active if auto calibration is disabled If auto calibration is enabled TCO_X_T and TCO_Y_T are automatically set to 0 Once auto calibration is deactivated laser fused calibration values are loaded into TCO_X_T and TCO Y T User s Manual 93 V 1 0 2014 04 Infineon TLE5012B SSC Registers X raw Value Register ADC_X Offset Reset Value X raw value 10 0000 15 0 T T T T T ADC_X r Field Bits Type Description ADC_X 15 0 r ADC value of X GMR 16 bit signed integer raw X value Read out of this register will update ADC_Y Reset 0 Y raw Value Regi
18. Trimble Navigation Ltd EMV of EMVCo LLC Visa Holdings Inc EPCOS of Epcos AG FLEXGO of Microsoft Corporation FlexRay is licensed by FlexRay Consortium HYPERTERMINAL of Hilgraeve Incorporated IEC of Commission Electrotechnique Internationale IrDA of Infrared Data Association Corporation ISO of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION MATLAB of MathWorks Inc MAXIM of Maxim Integrated Products Inc MICROTEC NUCLEUS of Mentor Graphics Corporation MIPI of MIPI Alliance Inc MIPS of MIPS Technologies Inc USA muRata of MURATA MANUFACTURING CO MICROWAVE OFFICE MWO of Applied Wave Research Inc OmniVision of OmniVision Technologies Inc Openwave Openwave Systems Inc RED HAT Red Hat Inc RFMD RF Micro Devices Inc SIRIUS of Sirius Satellite Radio Inc SOLARIS of Sun Microsystems Inc SPANSION of Spansion LLC Ltd Symbian of Symbian Software Limited TAIYO YUDEN of Taiyo Yuden Co TEAKLITE of CEVA Inc TEKTRONIX of Tektronix Inc TOKO of TOKO KABUSHIKI KAISHA TA UNIX of X Open Company Limited VERILOG PALLADIUM of Cadence Design Systems Inc VLYNQ of Texas Instruments Incorporated VXWORKS WIND RIVER of WIND RIVER SYSTEMS INC ZETEX of Diodes Zetex Limited Last Trademarks Update 2011 11 11 User s Manual 3 V 1 0 2014 04 Infineon TLE5012B Table of Contents 1 1 1 2 1 3 2 1 2 2 2 2 1 2 2 2 2 2 3
19. accross the period Therefore this last pulses are transmitted at another frequency that the maximum frequency specified in Table 5 13 Figure 5 24 shows an example where the last pulses have a different frequency If 1000 pulses 87 9 angle at startup have to be transmitted at startup 1000us are needed at maximum frequency With the default angle update rate time tupa 42 7Us 23 44tupa 1000pulses 1MHz 42 7uUs are required to transmit the 1000 pulses In reality 24t are used The first 23t y send 982 pulses at 1MHZz 23tupa 42 7Us 1Mhz The remainig 18 pulses are not send at 1MHz 0 44t but at a frequency so that the 18 remaining pulses are distributed through the whole t pa that is a frequency of 422kHz User s Manual 58 V 1 0 2014 04 TLE5012B Infineon Interfaces tu pd ty pd tupa tu pd ty pd lt o p Remaining Maximum frequency 1MHz pulses Figure 5 24 Increcremental Interface startup pulses frequency IIF Index The IFC pin or IIF Index generates one pulse at zero crossing This output can be used as check or as comparison with the Phase A Phase B outputs The IIF Index pulse will be generated when the internal Incremental Interface Counter has calculated the position as 0 the timing of this triggers depends at each start up but it remains constant once the chip is powered The IIF Index pulse width t duration is sp
20. are anti parallel Reference Layer and Free Layer are anti parallel resistance is maximal The output signal of each bridge is only unambiguous over 180 between two maxima Therefore two bridges are oriented orthogonally to each other to measure 360 With the trigonometric function ARCTAN2 the true 360 angle value is calculated out of the raw X and Y signals from the sensor bridges User s Manual 14 V 1 0 2014 04 Infineon TLE5012B Functional Description Y Component SIN ck X Component COS Vx COS 180 360 Angle a Vy SIN Figure 2 5 Ideal output of the GMR sensor bridges User s Manual 15 V 1 0 2014 04 Infineon TLE5012B 2 4 Pin Configuration Functional Description Center of Sensitive Area Figure 2 6 Pin configuration top view 2 5 Pin Description Table 2 141 Pin Description Pin No Symbol In Out Function 1 IFC O Interface C CLK IIF_IDX HS3 External Clock IIF Index Hall Switch Signal 3 2 SCK SSC Clock 3 CSQ SSC Chip Select 4 DATA O SSC Data 5 IFA O Interface A IIF_A HS1 PWM SPC IIF Phase A Hall Switch Signal 1 PWM SPC output input for SPC trigger only Vop Supply Voltage GND Ground IFB O Interface B IIF_B HS2 IIF Phase B Hall Switch Signal 2 1 External clock feature is not available in IIF or HSM interface mode User s Manual 16
21. cable length shall be 5 meters HSM the HSM is an interface that emulates the output of three Hall switches therefore three uni directional lines are required Only the angle position can be calculated from the output The switching hysteresis and the pole pair configuration can be selected via SSC By default the number of pole pairs is set to 5 IIF the IIF is an interface that emulates an optical encoder Three uni directional lines are required two for Phase A and Phase B and a third one for the IIF Index which indicates a 0 pass Phase A and Phase B pulse out a pulse for each step resolution that the angle moved The two Phases are needed to also track the rotation direction clockwise or counter clockwise At start up the IIF pulses out the angle value Different IIF modes step resolutions and hysteresis values can be configurated via SSC IIF interface is meant for short distances TLE5012B and ECU to be placed on the same PCB It is used for high speed applications such as electrically commutated motor drives SSC can be used in parallel to any other interface PWM SPC HSM or IIF More details on the default configuration of each derivate are described in Chapter 7 User s Manual 27 V 1 0 2014 04 Infineon TLE5012B Interfaces Table 5 1 summarizies the key characteristics and parameters that have to be considered when choosing an interface Table 5 4 Main interface cha
22. driver DATA pin set to medium driver fast edge e Voltage spike filter on input pads enabled User s Manual 99 V 1 0 2014 04 Cinfin eon TLE5012B Pre Configured Derivates 7 6 Fuse Values The derivate specific reset values for the configuration registers which are stored in laser fuses on the sensor are shown in Figure 7 1 Interface Modes Register Interface Modes Register Vek msb Isb msb Isb msb lsb IFAB Register Interface Mode4 Register e M i ephe eiee e i fofofo fo fs fo e fo fo fofofofolo Topol Pa fo fo fofofofols Ts fol o OOO ORMKIENE msb Isb msb Isb msb lsb mskIlsb TLE5012B E5020 PWM EE O E 0 Interface ur Register Figure 7 1 Derivate specific fuse settings User s Manual 100 V 1 0 2014 04
23. example with SPC interface User s Manual 50 V 1 0 2014 04 TLE5012B Infineon Interfaces CRC generation software code example message is the data transfer for which a CRC has to be calculated A typical message consists of the status nibble three data nibbles and the CRC nibble the trigger nibble and the synchronisation nibble are not part of the CRC Length is the number of nibbles in the message A typical message has 5 nibbles the trigger nible and the synchronization nibble are not part of the CRC unsigned char CRC unsigned char message unsigned char Length crce defined as the 4 bits that will be generated through the message till the is generated In th xample above this are the blue lines out of the XOR operation final cre unsigned char crc Numnibbles is a counter to compare the bits used for the CRC calculation and Length unsigned char Numnibbles bitdata Initially the CRC remainder has to be set with the original seed 0x05 for the TLE5012B crc 0x05 For all the nibbles of the message for Numnibbles 0 Numnibbles lt Length Numnibbles crce is calculated as the XOR operation from the previous cre is the XOR operator cre message Numnibbles For each bit position in a 4 bit nibble for bitdata 0 bitdata lt 4 bitdata T the MSB of the cre is 1 w
24. extract the temperature T C TEMPER dig 152 dig 2 776 dig C Reset 0 User s Manual 80 V 1 0 2014 04 Infineon Interface Mode1 Register MOD_1 Interface Mode1 Register 15 14 TLE5012B 13 SSC Registers Offset Reset Value 06 derivate specific FIR_MD Res 4 3 2 1 0 Res CLK_SEL DSPU_HO jie MOD Res Ww Ww Ww Field Bits Type Description FIR_MD 15 14 Update Rate Setting Filter Decimation 01 42 7 us 10 85 3 us 11 170 6 us Reset derivate specific CLK_SEL Clock Source Select Switch to external clock at start up only If there is no clock signal on the IFC pin when the chip is switched to the external clock source the chip does not allow the switch CLK_SEL remains zero operation continued If the external clock disappears with CLK_SEL already set the chip will reset PLL out of lock and run on with the internal clock 0s internal oscillator 1g external 4 MHz clock IFC pin switched to input Reset 0g DSPU_HOLD Hold DSPU Operation If DSPU is on hold no watchdog reset is performed by DSPU Deactivate watchdog with AS_WD before setting DSPU on hold 0 DSPU in normal schedule operation 1s DSPU is on hold Reset 0g IIF_MOD 1 0 Incremental Interface Mode 00g IIF disabled 01 A B operation with Index on IFC pin 10 Step Direction operation with Inde
25. is a 3 pin SSC SPI slave One of these pins is for the Clock another one is for the Chip Select and the third one is for the Data input and output Since there is only one pin for the Data the output and input of the master have to be connected When the sensor transmits data the master s output pin SDO pin has to be switched to high ohmic Clock generation As described in Chapter 5 2 1 the master has to send a command word to start the communication between master and slave After that the master has to trigger a clock so the slave can respond with the data and or safety word To generate a clock set the direction of the master s SDO pin to input and next write 0xFFFF in the SDO register A delay twr delay see Table 5 2 has to be implemented before generating the clock for the answer With this a pulse of 1s is generated and the clock triggered Since the SDO has been set as an input pin this pulse of 1s will not be transmitted and will not interefere with the data coming from the slave sensor This step writing OxFFFF has to be repeated as many times as reads from the slave are expected This is usually twice one for the data and one for the safety word Slave Number configuration at start up With SSC the CSQ line ensures that the data sent or received goes to or comes from the correct slave Still if the slave number S_NR bits are not configurated correctly at start up the safety word may report a wrong slav
26. orthogonality can be compensated using the following equation in which only the Y value must be corrected X X Y X sin ORTHO Y i cos ORTHO 5 4 As described in the IFAB register address OD the ORTHO bits represent a value between 11 2500 and 11 2445 with a 12 bit resolution Y should finally be limited to 16 bits Angle calculation After correction of all errors the resulting angle can be calculated using the arctan function and subtracting the angle base as shown in Equation 5 5 arctan Eas ANG _ BASE X 5 5 To correctly resolve the arctan function in 360 the microcontroller should implement the function arctan2 Y X 3 ANG _ BASE is a 12 bit register Small deltas from the ANG_VAL register may depend on the speed of application Figure 5 10 shows the flow chart of angle calculation from the X raw and Y raw values as described above User s Manual 42 V 1 0 2014 04 TLE5012B Infineon Interfaces Temperature dependent Offset Calculation read T_RAW opits A e T_RAW4po pits X T250 439 d read T250bits read TCO_X_Typits X J lt Y read TCO_Y Trn i X aves ae gt gt 7 gt gt 7 read X_OFFSET bits OR read Y_OFFSET 2b gt k gt OY 12bits Offset Compensation wa O N read ADC_Xi6bits gt Pi X1iebits read ADC_Yiepits gt J lt Y1 16bits d Ampl
27. pin 5 IFA and Phase B pin 8 IFB This is with the absolute count enabled which is the default mode in the register MOD_4 User s Manual 57 V 1 0 2014 04 TLE5012B Infineon Interfaces HSM_PLP Thus the microcontroller gets the information about the absolute position after startup After this startup pulses the TLE5012B continues on normal operation modus Phase B 2 o g i 9 i phdse phase cs 4 gt 3 steps turned Angle Value is outputted at startup 2 steps turned Ll Hele AP J Figure 5 23 Increcremental Interface startup pulses and first step movements at different speeds The number of pulses indicates the angle value position The number of pulses increases from 0 to 180 and decreases from 180 to 360 Therefore the maximum number of pulses is at the 180 position with 2048 pulses or a length of 2 045ms If Phase A is triggered before Phase B then the angle is between 0 and 180 If Phase B is transmitted before Phase A then the angle is between 180 and 360 The angle can be calculated measuring the length in seconds of the train of pulses 5 9 _ length sec 180 angle sl ep Or counting the number of pulses 5 10 pulses 180 angle EE The startup pulses are distributed in an integer number of angle update rate time tupa meaning that the pulses transmitted in the last angle update rate time t are actually distributed
28. recipient of this code must verify any function described herein in the real application e Infineon Technologies hereby disclaims any and all warranties and liabilities of any kint including without limitation warranties of non infringement of intellectual property rights of any third party with respect to any and all code given in this document User s Manual 40 V 1 0 2014 04 TLE5012B Infineon Interfaces 5 2 5 Angle Calculation with X raw and Y raw values The TLE5012B s COordinate Rotation Digital Computer CORDIC contains the trigonometric function for angle calculation The angle value can be accessed reading the ANG_VAL register For safety checks and other purposes it is also possible to calculate the angle value in a microcontroller by reading the X raw and Y raw values from the TLE5012B The raw values have to be compensated by either calculating the offset amplitude and phase parameters or by reading the registers which contain the pre calibrated values The second case is recommended in cases where either the application does not turn full rotations to calculate the compensation parameters the whole sine and cosine signals are required or it rotates at high speeds enough data has to be read to ensure that the maximum and minimum values of the sine and cosine are read 5 2 5 1 Angle Calculation using pre calibrated compensation values For the angle calculation using pre calibrated compensation values the followin
29. s complement number is generated by the following equation 6 1 N 2 Value bysg 2 gt b 2 i 0 For example if the AVAL Register value is 1100 1101 1001 0011 the MSB indicates that the RD_AV field is high and a new angle value is present ANG_VAL ANG_VAL are represented by the following 15 bits 100 1101 1001 0011 Therefore the angle value is 6 2 N 2 Value bygg 2 9 b 2 1 2 0829 40 279 1824 41425 4082 41427 4 i 0 4 1 2158 40215 0421510 412151 02152 age ele eg Seo a eo a 1 2 412 41 2741 2 41 2 41 2 163844 2048410244 2564 128 1642 1 12909 And if we calculate the angle formula provided in the AVAL register description we can calculate the angle 6 3 360 360 Aisin 2 ING adits MELIS is PAEAS IS g 12909 141 82 User s Manual 67 V 1 0 2014 04 Infineon TLE5012B SSC Registers 6 1 4 Zero position configuration Each device has a factory calibrated angle base to make the 0 direction parallel to the edge of the chip For some applications it may be necessary to specifically set the 0 angle position after sensor and magnet are assembled In particular if interfaces are used which do not output the absolute angle incremental interface or Hall Switch Mode a mechanical reference position is to be defined in an end of line calibration Therefore the following steps should be performed 1 2 3 Move the mechanical assembly to th
30. single bit SD ADC e 15 bit representation of absolute angle value on the output resolution of 0 01 e 16 bit representation of sine cosine values on the interface e Max 1 0 angle error over lifetime and temperature range with activated auto calibration e Bi directional SSC Interface typ 8Mbit s e Supports Safety Integrity Level SIL with diagnostic functions and status information e Interfaces SSC PWM Incremental Interface IIF Hall Switch Mode HSM Short PWM Code SPC based on SENT protocol defined in SAE J2716 Output pins can be configured programmed or pre configured as push pull or open drain e Bus mode operation of multiple sensors on one line is possible with SSC or SPC interface in open drain configuration e 0 25 um CMOS technology e Automotive qualified 40 C to 150 C junction temperature e ESD gt 4kV HBM e RoHS compliant Pb free package e Halogen free 1 3 Application Example The TLE5012B GMR based angle sensor is designed for angular position sensing in automotive applications such as Electrically commutated motor e g Electric Power Steering EPS Brushless DC electric motors BLDC e Rotary switches e Steering angle measurements e General angular sensing The TLE5012B is also used in various non automotive applications Pinien an EC Motor Magnet Figure 1 2 A usual application for TLE5012B is the electrically commutated motor User s Manual 10 V 1 0 2
31. the Infineon Technologies components and shall not be regarded as any description or warrant of a certain functionalities conditions or quality of the Infineon Technologies component s All statements contained in this code including recommendation or suggestion or methodology are to be verified by the user before implementation or use as operating conditions and environmental factors may differ The recipient of this code must verify any function described herein in the real application e Infineon Technologies hereby disclaims any and all warranties and liabilities of any kint including without limitation warranties of non infringement of intellectual property rights of any third party with respect to any and all code given in this document User s Manual 52 V 1 0 2014 04 TLE5012B Infineon Interfaces 5 5 Hall Switch Mode HSM The Hall Switch Mode HSM within the TLE5012B makes it possible to emulate the output of 3 Hall switches Hall switches are often used in electrical commutated motors to determine the rotor position With these 3 output signals the motor will be commutated in the right way Depending on which pole pairs of the rotor are used various electrical periods have to be controlled This is selectable within OE HSM_PLP Figure 5 19 depicts the three output signals with the relationship between electrical angle and mechanical angle The mechanical 0 point is always used as reference The HSM is gener
32. the Safety Word of the SSC communication Thus after switching the autocalibration mode the Status register should be read via SSC and an occuring S_FUSE error should be ignored User s Manual 22 V 1 0 2014 04 TLE5012B Infineon Specification 4 1 1 Angle Error adder with Autocalibration enabled With constant temperatures AT lt 5 Kelvin or parts rotating faster than the temperature changes the autocalibration angle error is as specified in the TLE5012B Data Sheet If autocalibration is enabled when the temperature changes by more than 5 Kelvin within 1 5 revolutions an additional angle error has to be added to the specified value specified Such cases will happen when the rotating part is halted and the temperature is changing by more than 5 Kelvin or the rotating part is moving too slowly compared to the external temperature changes see Figure 4 4 Additional Angle Error OK Figure 4 4 Cases where an angle error adder has to be included if autocalibration is enabled The angle error adder is described in the TLE5012B Data Sheet and depends on the initial temperature To read the right angle error adder select the initial temperature and move through the x axis as many degrees as the delta between the final temperature and the initial temperature Then read the y axis value at this delta and add it to the specified angle error which already contains lifetime drifts Some cases are shown in Table 4 1 T
33. the read write access rights of the specific registers Table 6 2 identifies the values with symbols Access to the registers is accomplished via the SSC Interface Table 6 2 Register Overview Register Short Name Register Long Name Offset Address Page Number Registers Descriptions Register Descriptions STAT STATus register 001 72 ACSTAT ACtivation STATus register 01 75 AVAL Angle VALue register 02 77 ASPD Angle SPeeD register 03 78 AREV Angle REVolution register 04 79 FSYNC Frame SYNChronization register 05 80 MOD_1 Interface MODe1 register 06 81 SIL SIL register O74 82 MOD_2 Interface MODe2 register 084 84 MOD_3 Interface MODe3 register 094 86 OFFX OFFset X 0A 87 OFFY OFFset Y OB 87 SYNCH SYNCHronicity OCh 88 IFAB IFAB register OD 89 MOD_4 Interface MODe4 register 0E 90 TCO_Y Temperature COefficient register OF 93 ADC_X ADC X raw value 104 94 ADC_Y ADC Y raw value 114 94 D_MAG Angle vector MAGnitude 144 94 T_RAW Temperature sensor RAW value 154 96 IIF_CNT IIF CouNTer value 204 97 T250 Temperature 25 C Offset value 304 97 The registers are addressed wordwise User s Manual 70 V 1 0 2014 04 TLE5012B Infineon SSC Registers Configuration Register Checksum To monitor the integrity of the sensor configuration the TLE5012B performs a cyclic redundancy check of the configuration registers in address range 08 to OF Th
34. then be read by sending a read command for the desired register and setting the UPD bit of the Command Word to 1 e After sending the Safety Word the transfer ends To start another data transfer the CSQ has to be deselected once for at least teosofi e By default the SSC interface is set to push pull The push pull driver is active only if the TLE5012B has to send data otherwise the DATA pin is set to high impedance User s Manual 33 V 1 0 2014 04 TLE5012B Infineon Interfaces 5 2 3 TLE5012B in bus mode Up to four slaves can be connected in the same bus e g four TLE5012B or two TLE5012B and two Linear Hall The master microcontroller uC will need four CSQ chip select pins to connect to each of the slaves Daisy Chain schemes are not possible L SCK pin 2 SPI LI CSQ pin 3 slave 1 Data pin 4 TLE5012B STAT Status Register z S NR bits SCK pin 2 SPI CSQ pin 3 slave 2 Data pin 4 TLE5012B STAT Status Register S NR bits SCK pin 2 SPI SPI CSQ pin 3 slave 3 master Data pin 4 TLE5012B uC STAT HHO XXX ANA AXA AAA Status Register S_NR bits SCK pin 2 SPI CSQ pin 3 slave 4 Data pin 4 TLE5012B STAT Status Register S NR bits Figure 5 6 Example of four slaves connected to a bus with one master with SSC interface The TLE5012B particularity is that it
35. use of the Safety Word after data transfer Up to 4 sensors can be used with SSC SSC is meant for short distances TLE5012B and ECU to be placed on the same PCB PWM the PWM is an unidirectional interface Only one line is needed in which the angle value is transmitted The angle value corresponds to the duty cycle of the signal with 0 represented by a 6 25 duty cycle and 93 75 representing the maximum angle Safety Analysis results would be communicatd via duty cycle below 2 or above 98 The frequency of the PWM interface can be set via SSC interface PWM is meant to support distances up to 5 meters SPC the SPC is an interface based on the SENT protocol The ECU master uC sends a Trigger Nibble which wakes up the TLE5012B to transmit the angle value 12bit or 16bit resolution depending on the number of nibbles If desired the temperature can also be transmitted in two extra nibbles The SPC also sends a CRC and an end pulse to terminate the communication One line is needed for the transmission and the pins 1 and 2 are used to set the slave number Up to four slaves can be connected to one ECU the ECU Trigger Nibble length will wake up the respective sensor SAE International describes the SENT protocol SAE J2716 distance as up to 5 meters Combined resistance for all connector shall have less than 1 Ohms per line over total vehicle life The bus wiring shall utilize cables with less than 0 1nF per meter of wire length the maximum
36. with SSC interface 0000000 36 Flow Chart of Angle Calculation from the X raw and Y raw values 00 0 000 43 Typical example of a PWM Signal 1 0 0 0 0 0 cee eae 44 Example of four slaves connected to a bus with one master with SPC interface 46 SPC frame example 00 00 eee 47 SPC pause timing diagram 1 tenes 47 SPC configuration in open drain mode 00 00 cece tees 47 SPC Master pulse timing 2 6 2 2 driter tiad eee eens 49 TLE5012B s CRC generator polynomial for the SPC interface 0 2 00 c eee eee 50 CRC generation example with SPC interface 0002000 ccs 50 Hall Switch Mode 2 2 2 0 000 cc tees 53 HS hySteresi in c cea ai pawl E eee te Gad bee ees at ae aD Be ae Pede shee Fen 56 Incremental interface with A B mode 0000 57 Incremental interface with Step Direction mode 0000 cee eee eee eee 57 Increcremental Interface startup pulses and first step movements at different speeds 58 Increcremental Interface startup pulses frequency 0002 0c eee eee eee ee 59 IIF Index pulse in A B Mode 000 eee eee 59 IIF Index pulse in Step Direction Mode 0000 eee eee 59 Phase A B output during a rotation direction change due to the hysteresis threshold 60 Bitmap Pant Tas oma noaa a a ae tea a Gear ad nee a ch ens OR oa a aca nel aol Ge aac aa 61 User s Manu
37. 014 04 Cinfineon TLE5012B 2 Functional Description 2 1 Block Diagram Functional Description TLE5012B Digital Signal Processing i Interface Unit Figure 2 1 TLE5012B block diagram 2 2 Functional Block Description 2 2 1 Internal Power Supply The internal stages of the TLE5012B are supplied with several voltage regulators e GMR Voltage Regulator VRG e Analog Voltage Regulator VRA e Digital Voltage Regulator VRD derived from VRA These regulators are directly connected to the supply voltage Vpp 2 2 2 Oscillator and PLL The digital clock of the TLE5012B is provided by the Phase Locked Loop PLL which is by default fed by an internal oscillator In order to synchronize the TLE5012B with other ICs in a system the TLE5012B can be Users Manual 11 V 1 0 2014 04 TLE5012B Infineon Functional Description configured via SSC interface to use an external clock signal supplied on the IFC pin as the PLL source instead of the internal clock External clock mode is only available in the PWM or SPC interface configurations 2 2 3 SD ADC The Sigma Delta Analog Digital Converters SD ADC transform the analog GMR voltages and temperature voltage into the digital domain 2 2 4 Digital Signal Processing Unit The Digital Signal Processing Unit DSPU contains the e Intelligent State Machine ISM which does error compensation of offset offset temperature drift amplit
38. 096 so effective resolution is 0 100 The angle value can be measured with the following formula where toy is the length of the pulse in seconds and fowe Is the frequency selected Anglet toy 6 25 j w i pum J 87 5 PWM 5 8 The frequency for the PWM interface can be selected via the register MOD_4 IFAB_RES bits as described in Chapter 6 2 1 See Chapter 7 for the PWM derivates with the default frequencies A ton Of more than 93 75 duty cycle would indicate an error as described in Table 5 7 User s Manual 45 V 1 0 2014 04 TLE5012B Infineon Interfaces 5 4 Short PWM Code SPC The Short PWM Code SPC is a synchronized data transmission based on the SENT protocol Single Edge Nibble Transmission defined by SAE J2716 As opposed to SENT which implies a continuous transmission of data the SPC protocoll transmits data only after receiving a specific trigger pulse from the microcontroller The required length of the trigger pulse depends on the sensor number which is configurable Thereby SPC allows the operation of up to four sensors on one bus line SPC enables the use of enhanced protocol functionality due to the ability to select between various sensor slaves ID selection The slave number S_NR can be given by the external circuit of SCK and IFC pin In case of Vpp on SCK the S_NR 0 can be set to 1 and in the case of GND on SCK the S_NRJ 0 is equal to 0 S_NR 1 can be adjusted in th
39. 12B Infineon Interfaces unsigned char ReducedPoly unsigned int message unsigned char crc unsigned bitindex Only 8 bits are taken ReducedPoly unsigned char polynomial 0x0OFF For all the possible message combinations for message 0 message lt OxFF messaget t crc unsigned char message For all the bits of the byte for Bitindex 0 Bitindex lt 8 Bitindex t Calculation of the CRC 1f crc amp 0x80 0 cre lt lt 1 crc ReducedPoly else cre lt lt 1 The value out of the CRC calculation for a certain message is saved in the position of the message crcTable message crc Disclaimer The CRC generation software code provided above shall be used as guidance to the developer of solutions with the TLE5012B Infineon is not responsible for malfunctioning of the code provided above This code was used with an Infineon s microcontroller XC878 e The CRC generation software code is only provided as a hint for the implementation or the use of the Infineon Technologies components and shall not be regarded as any description or warrant of a certain functionalities conditions or quality of the Infineon Technologies component s All statements contained in this code including recommendation or suggestion or methodology are to be verified by the user before implementation or use as operating conditions and environmental factors may differ The
40. 2 2 4 2 2 5 2 2 6 2 3 2 4 2 5 4 1 4 1 1 4 2 4 3 4 4 4 5 5 1 5 2 5 2 1 5 2 2 5 2 3 5 2 4 5 2 5 5 2 5 1 5 2 5 2 5 3 5 4 5 4 1 5 4 2 5 4 3 5 5 5 6 6 6 1 Table of Contents List of Figures 0000005 List of Tables 000 000 eae Product Description OVEPVIEW o spann kaane a tan E E ap eee ENS Features aeaio miari dhe ia ethan oad D Application Example Functional Description Block Diagram 0 0 eee Functional Block Description Internal Power Supply Oscillator and PLL SD ADG o 4 5 c00 ooegha var eaieea ee nhee tebe Digital Signal Processing Unit Intenaces o actise hee eee ete Safety Features 0 0 00 cee ee ee Sensing Principle 0 00 e eee eee Pin Configuration 0 000 eee eee Pin Description 02020 eee Application Circuits Specification 04 Autocalibration 0 0 cee ee Angle Error adder with Autocalibration enabled Prediction mode 0 0 cee eee Calculation of the Junction Temperature Calculation of the Temperature Switching to external clock INntGMaCe S o cch be an Sen nce eae eS Interfaces overview Synchronous Serial Communication SSC Interface SSC Timing Definition SSC Data Transfer TLE5012B in bus mode Cyclic Redundancy Check CRC Angle Calculation with X raw and Y raw values Angle Calculation using pre calibrated compensation values Angle Calcul
41. 2B to external clock supply the following procedure is used e Trigger a chip reset by writing a 1 to the AS_RST bit address 01 0 via SSC interface e Within 175 us after the reset command write a 1 to the CLK_SEL bit address 06 4 After the power on time max 7 ms read the CLK_SEL bit via SSC interface to confirm that external clock is selected Note If the clock source CLK_SEL bit is switched to external clock during operation of the sensor it may occur at a chance of roughly 1 due to an internal timing conflict that the switching command is not accepted and the chip keeps operating on internal clock User s Manual 26 V 1 0 2014 04 rr TLE5012B Infineon Interfaces 5 Interfaces 5 1 Interfaces overview Depending on the application one or other interface may be more suitable The TLE5012B has five interfaces e SSC Synchronous Serial Communication e PWM Pulse Width Modulation e SPC Short PWM Code e HSM Hall Switch Mode IIF Incremental Interface SSC the SSC is a digital interface which allows bi directional data transfer The TLE5012B uses 3 pin as described in the Chapter 5 2 SSC allows to read additional data to the angle value from registers angle speed raw values temperature etc and set configurations resolution enable disable of features such as prediction or autocalibration etc SSC allows a high data transfer with CRC Cyclic Redundancy Check and secure communication
42. 359 but the revolution counter has not yet decreased remains 43 Prediction Angle Revolution Angle Revolution Angle Revolution Value counter Value counter Value counter Register MOD_2 08 AVAL 02 AREV 04 AVAL 02 AREV 04 AVAL 02 AREV 04 Field PREDICT 2 ANG_VAL 14 0 REVOL 8 0 ANG_VAL 14 0 REVOL 8 0 ANG_VAL 14 0 REVOL 8 0 Tarava 0 3 43 1 43 359 42 prediction win 1 1 43 359 43 357 42 prediction Figure 4 6 Revolution counter with prediction mode disabled enabled User s Manual 24 V 1 0 2014 04 TLE5012B Infineon Specification 4 3 Calculation of the Junction Temperature The total power dissipation P 5 of the chip leads to self heating which increases the junction temperature T above the ambient temperature The power multiplied by the total thermal resistance Rsa junction to ambient yields the junction temperature Rinsa is the sum of the two components Junction to Case and Case to Ambient 4 2 Risa Rinse inca eet T T AT AT Rna X Pror Rasa x Von X Lpp gt Vox Io lbo la gt O if direction is into IC Q Example assuming no load on Vout V p SV 4 3 Ipp 14mA AT 150 x 5 V x 0 014 4 0 V4 10 5K 4 4 Calculation of the Temperature The TLE5012B provides the temperature in the TEMPER bits of the FSYNC register via the SSC interface see Chapter 6 2 or with an extended SPC frame see Table 5 8 TEMPER is a compensated value of the te
43. 70 FEBC R Lock ADDR ND ANG_BASE STAT RESP E twr_delay MSB LSB MSB MSB LSB 1101000010010001 ANG_BASE ANG VAL OFFSET 1111111010111100 COMMAND mo nook te ane arse TTT twe_delay SAFETY WORD LSB 0101000010010001 MSB 1111111001111000 COMMAND READ Data 1 SAFETY WORD D091 76004 FE5B R LOCK ADDR ND 7 ANG BASE STAT RESP CRC MSB LSB MSB LSB MSB LSB 1101000010010001 00001111111001011011 Figure 6 10 SSC data transfer to configure the zero position Figure 6 11 shows in other than the binary domain the values of the registers and the offset for the example above Binary Decimal Resolution Angle MSB LSB Bits ANG_BASE Unsigned 12 0 038 357 8 Signed 2048 1024 512 256 128 64 32 0 12 0 088 2 2 ANG_VAL Unsigned 15 0 011 191 9 Signed 16384 00 O 1024 15 0 011 168 1 ANG_VAL 12 MSBs Unsigned 12 0 088 191 9 Signed 12 0 088 168 1 ANG_BASE 2 2 357 8 ANG_VAL 168 1 191 9 OFFSET 165 9 165 9 O 1024 512 256 0 64 32 00000 12 0 088 165 9 Figure 6 11 Zero position configuration in different domains User s Manual 69 V 1 0 2014 04 Infineon TLE5012B 6 2 Registers Descriptions SSC Registers This section describes the registers of the TLE5012B and replaces the TLE5012B Register Setting document It also defines
44. E5012B with only PWM interface using internal CLK 18 Application circuit for TLE5012B with only SPC interface using internal CLK 19 SSC configuration in sensor slave mode with push pull outputs high speed application 20 SSC configuration in sensor slave mode and open drain bus systems 0005 20 Parameter correction with autocalibration mode 1 2 200 0c eee eee eee 21 Parameter correction with autocalibration mode 2 20 cece eee eee 21 Parameter correction with autocalibration mode 3 00 00 eee eee eee 22 Cases where an angle error adder has to be included if autocalibration is enabled 23 Delay of sensor Output ais ccaatevseteddaravigestanndevadogda cp avadbewanane ad e a 24 Revolution counter with prediction mode disabled enabled 00 000 cece eee 24 SOG UMING 2244 le sdacs ee Rape en BHA ea See alae wae Ue we ea ee 29 SSC data transfer data read example 0 2 00 c eects 31 SSC data transfer data write example 0 0000 cette 31 SSC bit ordering read example 2 0 000 cece eee 33 Update of update registers 2 0 0 tees 33 Example of four slaves connected to a bus with one master with SSC interface 34 Fast CRC polynomial division circuit 0 2 0 0 eet 35 TLE5012B s CRC generator polynomial for the SSC interface 222020055 35 CRC generation example
45. able 4 1 Additional angle error examples Tjunction range Autocal T 1 5 revolutions Additional angle error 40 C 150 C Off No additional angle error 40 C 150 C On lt 5 Kelvin No additional angle error 40 C 150 C On 10 Kelvin lt 0 2 40 C 150 C On 20 Kelvin lt 0 35 40 C 150 C On 50 Kelvin lt 0 85 gt 135 C On 15 Kelvin lt 3 3 As the magnetic field decreases with higher temperatures angle errors due to increases of temperature are more critical than decreases of temperature As the additional angle error described in the TLE5012B Data Sheet applies to the worst case temperature increasing the angle error adder due to decreasing temperature changes will always be smaller If a parallel SSC interface is in place autocalibration can be disabled when a critical case described in Figure 4 4 occurs A temperature check in the microcontroller can be implemented to check if the temperature has changed by more than 5 Kelving during 1 5 revolutions If the temperature changes by more than 5 Kelvin within the 1 5 revolutions in which the maxima and minima are measured then autocalibration has to be disabled and enabled again When autocalibration is disabled the default calibration parameters stored in the laser fuses will be used for the X and Y raw values correction and the angle error will fulfill the specifications described in the TLE5012B Data Sheet User s Manual
46. airs with autocal 1 7 2 12 12 pole pairs with autocal 1 7 8 13 13 pole pairs with autocal 1 8 4 14 14 pole pairs with autocal 1 9 0 151 15 pole pairs with autocal 1 9 6 16 16 pole pairs with autocal 1 Mechanical angle switching AHShystm 0 703 Selectable by hysteresis IFAB_HYST29 User s Manual 54 V 1 0 2014 04 armi Infineon TLE5012B Interfaces Table 5 12 Hall Switch Mode cont d Parameter Symbol Values Unit Note Test Condition Min Typ Max Electrical angle switching Onshystel 0 70 j 1 pole pair hysteresis IFAB_HYST 111 1 41 2 pole pairs IFAB_HYST 111 2 11 j 3 pole pairs IFAB_HYST 11 2 81 7 4 pole pairs IFAB_HYST 11 3 52 5 pole pairs IFAB_HYST 111 4 22 6 pole pairs IFAB_HYST 11 4 92 7 7 pole pairs IFAB_HYST 111 5 62 j 8 pole pairs IFAB_HYST 11 6 33 9 pole pairs IFAB_HYST 111 7 03 10 pole pairs IFAB_HYST 111 7 73 11 pole pairs IFAB_HYST 111 8 44 12 pole pairs IFAB_HYST 111 9 14 ia 13 pole pairs IFAB_HYST 11 9 84 j 14 pole pairs IFAB_HYST 11 10 55 j 15 pole pairs IFAB_HYST 11 11 25 16 pole pairs IFAB_HYST 111 Fall time tustall 0 02 1 ps R 2 2kQ C lt 50pF Rise time tustise 0 4 1 us R 2 2kQ C lt 50pF 1 Depends on internal oscillator frequency variation see TLE5012B Data Sheet 2 Not subject to production test ve
47. al mode 2 update every 1 5 revolutions 11 auto cal mode 3 update every 11 25 Reset derivate specific 1 Auto calibration and Revolution Counter work only for ANG_RANGE 080 Usage of Auto Calibration Auto calibration can be used to compensate temperature and lifetime drifts of the angular error in applications where a rotor is continuously turning The algorithm relies on the collection of maximum and minimum values of the raw X and Y signals of the sensing elements The automatic calculation of calibration parameters out of the collected minimum and maximum values is only performed if the chip temperature has not changed by more than 5 C during the collection of the values in order to avoid temperature drift related errors For the sensor to be accurate in autocalibration mode it has to be assured in the application that the calibration parameters are updated frequently Thus autocalibration should only be used in applications where the magnet regularly rotates by at least one full turn at a temperature which is constant within 5 C Enabling Disabling of Auto Calibration in running mode When switching Auto Calibration on or off during operation the TLE5012B may erroneously trigger the S_FUSE error bit in the status register which indicates a configuration CRC error which is also displayed permanently in the Safety Word of the SSC communication Thus after switching the Auto Calibration mode the Status register
48. al 6 V 1 0 2014 04 TLE5012B Infineon List of Figures Figure 6 2 Bitmap Part 2 e c 2iaseeetect trd dienai erd peter teed bres chebidieigerend EEA 62 Figure 6 3 Colour legend for the Bitmap 0 0 0 0 eee 62 Figure 6 4 SSC command to read angle value 0 0 eee 65 Figure 6 5 SSC command to read angle speed and angle revolution 000 eee 65 Figure 6 6 SSC command to change Interface Mode2 register 0 00 eee 65 Figure 6 7 SSC data transfer sequence to change a configuration parameter 00 ee eee 66 Figure 6 8 Example of a SSC data transfer sequence to change a configuration parameter 66 Figure 6 9 Flow Chart of ANG_BASE calibration procedure 202 0 000 a 68 Figure 6 10 SSC data transfer to configure the zero position 0 2 0 0 00 0020 69 Figure 6 11 Zero position configuration in different domains 0 0 cee eee 69 Figure 6 12 Timing of angle calculation in SPC Trigger Nibble low time corresponds to slave number 92 Figure 7 1 Derivate specific fuse settings 0 0 0 tees 100 User s Manual 7 V 1 0 2014 04 armi Infineon Ba List of Tables List of Tables Table 2 4 Pin Description 0 00000 teeta 16 Table 4 14 Additional angle error examples nuaanaa aaaea 23 Table 5 4 Main interface characteristics a na aaaea ee 28 Table 5 2 SSC push pull timing specification 2 00 00
49. ally used with push pull output but it can be changed to open drain within the register IFAB_OD Sensors with preset HSM are available as TLE5012B E3xxx The register settings for these sensors can be found in the Chapter 6 2 Hall Switch Mode 3phase Generation Electrical Angle 0 60 120 180 240 300 360 HS1 HS2 HS3 Mech Angle with 5 Pole Pairs 0 12 24 36 48 60 72 Mech Angle with 3 Pole Pairs 0 20 40 60 80 100 120 Figure 5 19 Hall Switch Mode The HSM Interface can be selected via SSC IF_MD 010 Table 5 12 Hall Switch Mode Parameter Symbol Values Unit Note Test Condition Min Typ Max Rotation speed n 10000 rpm Mechanical User s Manual 53 V 1 0 2014 04 Infineon TLE5012B Table 5 12 Hall Switch Mode cont d Interfaces Parameter Symbol Values Unit Note Test Condition Min Typ Max Electrical angle accuracy Oslect 0 6 1 1 pole pair with autocalibration 1 2 21 2 pole pairs with autocal 2 1 8 3e 3 pole pairs with autocal 2 4 4 4 pole pairs with autocal 12 3 0 5 5 pole pairs with autocal 3 6 6 6 pole pairs with autocal 2 4 2 7 7 pole pairs with autocal 2 4 8 8l 8 pole pairs with autocal 2 5 4 9 9 pole pairs with autocal 6 0 10 10 pole pairs with autocal 1 6 6 111 11 pole p
50. ansmission order is Most Significant Bit MSB first Least Significant Bit LSB last Data is put on the data line with the rising edge of SCK and read with the falling edge of SCK e The SSC Interface is word aligned All functions are activated after each transmitted word e After every data transfer with ND 2 1 the 16 bit Safety Word is appended by the TLE5012B e A high condition on the Chip Select pin CSQ of the selected TLE5012B interrupts the transfer immediately The CRC calculator is automatically reset e After changing the data direction a delay ty delay see Table 5 3 has to be implemented before continuing the data transfer This is necessary for internal register access If in the Command Word the number of data is greater than 1 ND gt 1 then a corresponding number of consecutive registers is read starting at the address given by ADDR e Incase an overflow occurs at address 3F the transfer continues at address 00 If in the Command Word the number of data is zero ND 0 the register at the address given by ADDR is read but no Safety Word is sent by the TLE5012B This allows a fast readout of one register e Ata rising edge of CSQ without a preceding data transfer no SCK pulse see Figure 5 5 the content of all registers which have an update buffer is saved into the buffer This procedure serves to take a snapshot of all relevant sensor parameters at a given time The content of the update buffer can
51. ated above the logic part of the TLE5012B device These GMR elements change their resistance depending on the direction of the magnetic field Four individual GMR elements are connected to one Wheatstone sensor bridge for each of the two components of the applied magnetic field e X component V cosine and the Y component V sine With this full bridge structure the maximum GMR signal is available and temperature effects cancel out each other ADCx ADC x ADCy ADCy Figure 2 4 Sensitive bridges of the GMR sensor not to scale Attention Due to the rotational placement inaccuracy of the sensor IC in the package the sensors 0 position may deviate by up to 3 from the package edge direction indicated in Figure 2 4 In Figure 2 4 the arrows in the resistors represent the magnetic direction which is fixed in the Reference Layer On top of the Reference Layer and separated by a non magnetic layer there is a Free Layer When applying an external magnetic field the Free Layer moves in the same direction as the external magnetic field while the Reference Layer remains fix The resistance of the GMR elements depends on the magnetic direction difference between the Reference Layer and the Free Layer When the external magnetic field is parallel to the direction of the Reference Layer the resistance is minimal Reference Layer and Free Layer are parallel When the external magnetic field and the Reference Layer
52. ation with end of line calibration values Pulse Width Modulation Interface Short PWM Code SPC Unit Time Setup 2 2 200 Master Trigger Pulse Requirements Checksum Nibble Details Hall Switch Mode HSM Incremental Interface IIF SSC Registers 200 005 Registers Overview User s Manual Table of Contents V 1 0 2014 04 Infineon 6 1 1 6 1 2 6 1 3 6 1 4 6 2 6 2 1 7 1 7 2 7 3 7 4 7 5 7 6 TLE5012B Table of Contents BICTYPO S 2 4 4c enddad ied Ena TAEAE EA O AEE ETT ERA 64 Communication Examples 0 0000 cece teeta 65 Signed registers and Two s complement 0000 cee eee 67 Zero position configuration 0 0 0 eee ae 68 Registers Descriptions 2 0c0 0eeetaa sat veda Pies teddy cba ve tdal aaade da ebead eet 70 Register DeSCriptions scere sersre erener trar ee eae ose ea ee ie ata eee 72 Pre Configured Derivates 0 0 eee eee 98 IF typez E1000 i ca cveta digas cid bik sian dedawstdat deat eesa de basiaeian Gedae ea 98 HSN ES00D a sr rarr water Gree Bp See Pane pee eee wae eee al a a ee eee 98 PWM type E5000 vio a0 ced ee de bee ee dae pd eee ne Fd 98 PWMetype E9020 2 occ ses tet ie Oe ae al a ae NS Gee 99 SPC type E9000 ceria a E die ds Phe aes ak bas tee eae ea ens Pe 99 FUSE VANGS srar ets ete eae ORES ee ee aA is GS Bee ee ea ee oe Ba ae 100 User s Manual 5 V 1 0 2014 04 Infineon TLE5012B List of
53. be configurated to operate in any of the four following protocols on the IFA IFB and IFC outputs Bit reconfiguration required at every start up else the default protocol of the derivate will be used SSC interface is always active in parallel on pins SCK CSQ and DATA 00 IIF 01 PWM 10 HSM 11 SPC Reset derivate specific 1 In SPC interface configuration the sensor s digital signal processing unit DSPU runs only when receiving a SPC trigger pulse on the IFA pin see Figure 6 12 This means that changes to register settings are applied and also the angle AVAL register is updated only after a trigger pulse uC Activity Sensor Activity Time Base 1 tck 3us dtck Trigger Nibble Synchronisation Frame l Status Nibble Data Nibbles l i l l l l 24 34 51 78 tck 56 tck 12 27 tck l 12 27 tck angle calculation jd Figure 6 12 Timing of angle calculation in SPC Trigger Nibble low time corresponds to slave number User s Manual 92 V 1 0 2014 04 Infineon TLE5012B Temperature Coefficient Register TCO_Y Temperature Coefficient Register 15 SSC Registers Offset Reset Value OF device specific TCO_Y_ SBIS CRC_PAR Ww Field Bits Type Description TCO_Y_T 15 9 Offset Temperature Coefficient for Y Component 7 bit signed integer value of Y offset temperature coefficient See Offset temperature compensation on
54. d magnet The TLE5012B is a pre calibrated sensor The calibration parameters are stored in laser fuses At start up the values of the fuses are written into flip flops where these values can be changed to application specific parameters The precision of the angle measurement over a wide temperature range and a long lifetime can be improved by enabling an optional internal autocalibration algorithm Data communications are accomplished with a bi directional Synchronous Serial Communication SSC that is SPl compatible The sensor configuration is stored in registers which are accessible by the SSC interface Additionally four other interfaces are available with the TLE5012B Pulse Width Modulation PWM Protocol Short PWM Code SPC Protocol Hall Switch Mode HSM and Incremental Interface IIF These interfaces can be used in parallel with SSC or alone Pre configured sensor derivates with different interface settings are also available See the derivate ordering codes in the TLE5012B Data Sheet A description of the derivates can also be seen in Chapter 7 Online diagnostic functions are provided to ensure reliable operation User s Manual 9 V 1 0 2014 04 TLE5012B Infineon Product Description 1 2 Features e Giant Magneto Resistance GMR based principle Integrated magnetic field sensing for angle measurement 360 angle measurement with revolution counter and angle speed measurement e Two separate highly accurate
55. d data the bright green bits are additional data that may only be relevant for some specific applications The orange bits are configuration parameters which can be changed if the default values are not the desired ones The dark orange bits are relevant if connecting several devices sensors to a same master microcontroller The grey bits are relevant for diagnosis to address the demands for functional safety There are also yellow bits for the autocalibration and calibration values Finally the purple bits are extra features that can be configured if desired STAT 00 Status Reg ACSTAT 01 Activation status Reg WwW w w Ww Ww Ww Ww Ww Ww Ww AVAL 02 Angle Value Reg E ASPD 03 Angle Speed Reg E AREV 04 Angle Revolution Reg E FSYNC 05 Frame Synchro Reg MOD_1 06 Interface Mode1 Reg W W W SIL 07 SIL Reg MOD_2 08 ANG_RANGE ANG PRED Interface Mode2 Reg _DIR ICT wW MOD_3 094 ANG BASE Interface Mode3 Reg W OFFX 0A Offset X Reg Figure 6 1 Bitmap Part 1 User s Manual 61 V 1 0 2014 04 Infineon TLE5012B SSC Registers OFFX 0B Offset Y Reg SYNCH 0C Synchronicity Reg IFAB 0D IFAB Reg MOD_4 0E Interface Mode4 Reg TCO_Y OF Temperature Coef R ADC_X 10 X raw value Reg ADC Y 11 Y raw value Reg D_MAG 14 D_MAG Reg T_RAW 15
56. d using the bit SSC_OD Series resistors on the DATA SCK and CSQ lines are recommended to limit the current in case either the microcontroller or the sensor are accidentally switched to push pull A pull up resistor typ 1 KQ is required on the DATA line SSC Slave TLE 5012B i Shift Reg i l uC SSC Master Clock Gen optional e g 100 Q Figure 3 7 SSC configuration in sensor slave mode and open drain bus systems After sending the command word and writing data in case of configuration the microcontroller output to be set as high ohmic to receive an answer from the TLE5012B SSC SPI does not generate a continuous clock Clock pulses are only generated when the microcontroller transmits data meaning that after the transmission there is no clock signal anymore and the sensor can not answer Therefore the microcontroller has to be configured so a clock is also generated when a read data from the sensor is expected Check Chapter 5 2 3 for further details User s Manual 20 V 1 0 2014 04 TLE5012B Infineon Specification 4 Specification 4 1 Autocalibration Autocalibration enables online parameter calculation and therefore reduces angle error due to temperature and lifetime drifts The TLE5012B is a pre calibrated sensor After start up the parameters in the laser fuses get loaded into flip flops The TLE5012B needs 1 5 revolutions to generate new autocalibration param
57. e number The slave number may also be wrong in configurations with one single slave To ensure that the received slave number in the safety word is correct RESP bits configure the slave numbers at start up with a write command The slave number bits are described in the Status Register For configurations with only one or two slaves it is also possible to configure the slave number at start up with the SCK and IFC pins as done for the SPC interface see Figure 5 12 The particularity with SSC interface is that the SCK is a line connected to the master and therefore can only have on status at start up Setting the IFC pin at high or low two slave numbers can be configurated User s Manual 34 V 1 0 2014 04 TLE5012B Infineon Interfaces 5 2 4 Cyclic Redundancy Check CRC A Cyclic Redundancy Check CRC is sent in the last 8 bits of the safety word e This CRC is according to the J1850 Bus Specification e Every new transfer restarts the CRC generation e Every Byte of a transfer will be taken into account to generate the CRC also the sent command s and the non CRC bits the 8 upper bits of the safety word e Generator polynomial X8 X4 X3 X2 1 but for the CRC generation the fast CRC generation circuit is used see Figure 5 7 e The seed value of the fast CRC circuit is 11111111 The remainder is inverted before transmission Serial CRC output parallel Remainder Figure 5 7 Fas
58. e 8bit CRC is stored in register CRC_PAR address OF When changing one or more of these registers a new checksum has to be calculated from registers 08 to OF using the generator polynomial described in Chapter 5 2 4 and written to the CRC_PAR register Otherwise a CRC fail error status bit S_ FUSE 1 will occur The CRC check can be disabled by setting register AS_FUSE to 0 It is automatically deactivated if auto calibration is active as auto calibration performs periodical adjustments of several configuration registers Derivate Specific Reset Values The reset values of certain registers for example interface settings are set by laser fuses which are specific for the employed derivate Exxxx number of the TLE5012B In this case the reset values in the register table are marked as derivate specific A list of specific reset values for all derivates is given in Chapter 7 6 Factory Calibrated Reset Values The reset values of calibration registers for example offset calibration are set by laser fuses which are written during the factory calibration of the sensor These values are specific for each individual device In this case the reset values in the register table are marked as device specific When modifying parts of these registers the register content should be read first then only the relevant bits should be changed and the content should be written back into the register in order to avoid unintended over wr
59. e desired 0 position Read the content of the ANG_BASE in the MOD_3 register address 09 Read the content of the AVAL register address 02 and remove the three LSBs to obtain a 12 bit angle value rounded to minimize truncation error Subtract the 12 bit angle value obtained in step 3 from the value of the ANG_BASE register and store the result in the non volatile memory of the microcontroller On every start up of the TLE5012B write the stored value into the ANG_BASE register Turn mechanical assembly to desired E Example read AVAL register gt 1FFE 90 rM remove 3 LSBs from 3FF AVAL value d H read ANG_BASE 072 10 register bitwise subtract 12bit AVAL from 072 3FFy C73y ANG_BASE e write calculated value into ANG_BASE register A Figure 6 9 Flow Chart of ANG_BASE calibration procedure User s Manual 68 V 1 0 2014 04 Infineon TLE5012B SSC Registers Figure 6 10 shows an example with the register values when setting the angle 191 9 or 168 1 as the 0 position Turn mechanical assembly to desired 0 position COMMAND READ Data 1 SAFETY WORD D021 C439 FE3D R LOCK ADDR ND r Ri ANG_VAL STAT RESP CRC MSB LSB 9 MSB LSB MSB LSB 1101000000100001 1 1400010000777004 1111111000111101 COMMAND READ Data 1 SAFETY WORD D091 FE
60. e same way by the IFC pin Only one data line to the slaves is necessary as the length of the trigger nibble will awake one or the other slaves as explained in the next paragraph SPC slave 1 Tigrite Wmetnfanel sas r Daktil Died gp aid au lag ORO Bial l I l I l I i I l i l Low t p VEE VEVE EVENE VEN ri Tree at ee Ser iy Nido Cth TLE5012B yee bas Tapie irois Fane Sats Nie le 1 o iiae Vick IFC pin SPC y wate DT SCK pin 2 slave 2 UU iw Ui IFA SPC pi 5 TLE5012B N E pe yiee yl em l ei h oaa VEN STAT a Ab bbb bbb e Es Status Register S NR bits e IFC pin SPC Tieton saa PENADI p DERN TRIES oe SCK pin slave 3 Vf Afi J IFA SPC pin 5 E i sa oni om oma Hel p FA 4 we lt r HP ome ol e A Status MNE _ EES PRECEEBEES S_NR bits i M IFC pin SPC L Tigie sae asane MRR DME NES oe Ironia DD SCK pin l PUPE Ue AU STAT les pemn fore J oe omy ona lu Status Register i ity Tree ha eet NetieBaiy Dh The low time length of the Trigger Nibble from the master defines the specific slave number Figure 5 12 Example of four slaves connected to a bus with one master with SPC interface As in SENT the time between two consecutive falling edges defines the value of a 4 bit nibble thus representing numbers between 0 and 15 The transmission time t
61. e time defines the delay time after a transfer before the TLE5012B can be selected again Table 5 2 SSC push pull timing specification Parameter Symbol Values Unit Note Test Condition Min Typ Max SSC baud rate fssc 8 0 Mbit s CSQ setup time tess 105 ns 1 CSQ hold time tear 105 ns 1 CSQ off tesoff 600 ns SSC inactive time SCK period tsckp 120 125 ns 1 SCK high sa 40 ns 9 SCK low tsc 30 ns 1 DATA setup time DATAs 25 ns 1 DATA hold time ever 40 ns 1 Write read delay tur dsiay 130 ns 1 Update time tesupdate 1 Us See Figure 5 5 SCK off leeuce 170 ns 1 1 Not subject to production test verified by design characterization User s Manual 29 V 1 0 2014 04 Infineon TLE5012B Table 5 3 SSC open drain timing specification Interfaces Parameter Symbol Values Unit Note Test Condition Min Typ Max SSC baud rate fssc 2 0 Mbit s Pull up Resistor 1kQ CSQ setup time tess 300 ns L CSQ hold time tesh 400 ns 1 CSQ off en 600 ns SSC inactive time SCK period tscxp 500 ns 1 SCK high tsckh 190 ns 1 SCK low tea 190 ns 1 DATA setup time leans 25 ns 1 DATA hold time TATAR 40 ns 1 Write read delay Gedo 130 ns 1 Update time tcSupdate 1 us See Figure 5 5 SCK off tsckoff 170 ns 1 1 Not subject to production test verified by design character
62. eA i Ne Cinfineon LS Angle Sensor GMR Based Angle Sensor TLE5012B User s Manual V 1 0 2014 04 User s Manual Sense amp Control Edition 2014 04 Published by Infineon Technologies AG 81726 Munich Germany 2014 Infineon Technologies AG All Rights Reserved Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics With respect to any examples or hints given herein any typical values stated herein and or any information regarding the application of the device Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind including without limitation warranties of non infringement of intellectual property rights of any third party Information For further information on technology delivery terms and conditions and prices please contact the nearest Infineon Technologies Office www infineon com Warnings Due to technical requirements components may contain dangerous substances For information on the types in question please contact the nearest Infineon Technologies Office Infineon Technologies components may be used in life support devices or systems only with the express written approval of Infineon Technologies if a failure of such components can reasonably be expected to cause the failure of that life support device or system or to affect the safety or effectiveness of that device or syste
63. ecified in Table 5 13 Incremental Interface AIB Mode 90 el Phase shift PhaseA V Vi PhaseB V Vi Courier 1673 1679 resso 16381 J ree 168 Index V VL lt q Index pulse timin gt pi g a Figure 5 25 IIF Index pulse in A B Mode Incremental Interface Step Direction Mode VL Direction V L TAA Index V VL tor Index pulse timing a Figure 5 26 IIF Index pulse in Step Direction Mode Note In Figure 5 25 and Figure 5 26 the Index pulse timing shows the start time of the Index pulse In applications rotating above 2930rpm the period of Phase A B will be smaller than the length of the Index pulse User s Manual 59 V 1 0 2014 04 TLE5012B Infineon Interfaces Hysteresis effect when changing rotation direction The TLE5012B has an hysteresis threshold to avoid pulsing unintended steps due to mechanical vibrations of the rotor or system The default hysteresis is 0 703 and it can be changed in the register IFAB IFAB_HYST Once the hysteresis threshold is surpassed the Phase A and Phase B output the missed steps and continue to work in their normal operation mode Pulsing the missed pulses allows to count all the steps and correctly calculate the angle position The number of missed pulses depends on the hysteresis threshold and on the step resolution The missed pulses are outpulsed during a period of duration the angle update rate ti
64. eck of DSPU CORDIC and CAPCOM at startup Activation in operation via AS_DSPU possible but only recommended during application halt Ogs DSPU self test ok 1g DSPU self test not ok or self test is running Reset 0 User s Manual 73 V 1 0 2014 04 Infineon TLE5012B SSC Registers Field Bits Type Description S_FUSE 3 ru Status Fuse CRC CRC check configuration registers 08 to OF 4 CRC_PAR register OF Deactivation via AS_FUSE CRC check is automatically disabled if auto calibration is active Note When changing the content of one or more configuration registers in address range 08 to OF a new CRC has to be calculated and stored in register CRC_PAR address OF otherwise CRC fail will occur 0 CRC ok 1g CRC fail Reset 0 S_VR 2 ru Status Voltage Regulator Permanent check of internal and external supply voltages Deactivation via AS_VR Og Voltages ok 1s Vbp over voltage Vpp off GND off or Voveg Vova Vovp too high Reset 0 S_ WD 1 ru Status Watchdog Permanent check of watchdog After watchdog counter overflow the DSPU stops Deactivation via AS_WD Og normal operation 1g watchdog counter expired DSPU stop AS_RST must be activated Outputs deactivated Pull Up Down active Reset 0 S_RST 0 ru Status Reset Indication that there has been a reset state Oz no reset since last readout 1p indication of power up short power break firmware or active reset
65. econd to last unpredicted angle value Angiekange Ll agg _ SPD digits 2 Speed s 3ta s 6 6 Reset 0 User s Manual 78 V 1 0 2014 04 Infineon TLE5012B Angle Revolution Register SSC Registers AREV Offset Reset Value Angle Revolution Register 044 8000 15 14 9 8 RD_REV FCNT REVOL r wu ru 7 0 REVOL ru Field Bits Type Description RD_REV 15 r Read Status Revolution 0g no new values since last readout 1p new value REVOL present Note If an update event register snapshot is done after a normal read RD_REV will not be set to 1 in the following read either update read or normal read unless a new value is available Reset 1 FCNT 14 9 wu Frame Counter unsigned 6 bit value Internal frame counter Increments every update period FIR_MD setting Reset 04 REVOL 8 0 ru Number of Revolutions signed 9 bit value Revolution counter Increments for every full rotation in counter clockwise direction at angle discontinuity from 360 to 0 and decrements for every full rotation in clockwise direction at angle discontinuity from 0 to 360 Reset Op Revolution Counter with Prediction enabled The revolution counter register REVOL counts full rotations of the magnetic field It increments when the measured angle passes the 0 point in counter clockwise direction and it decrements when the 0 point is passed in clockwise direction The revo
66. epresented and not because a different resolution between the two registers TCO_X_T and TCO_Y_T have 7 bits only and are multiplying a 10 bit value Therefore the result of the multiplication has to be limited to the 10 MSBs gt gt 7 or an arithmethic signed 7 bits right shift In the last step of Equation 5 1 the 10 bit value for the temperature dependent offset has to be added to the 12 bit X_OFFSET and Y_OFFSET User s Manual 41 V 1 0 2014 04 o Infineon TLE5012B Interfaces After the X and Y values are read out the temperature corrected offset value must be subtracted X X RAW O Y Y _ RAW O 5 2 X_RAW and Y_RAW are 16 bit values at which a 12 bit value is subtracted Offsets are in the 12 bit range since the values are smaller than the whole X_RAW and Y_RAW range Next the Y value is normalized with the amplitud synchronicity Xx X Y Y SYNCH 5 3 While Y4 is a 16 bit absolute value SYNCH is a 12 bit relative factor amplitude synchronicity is a relative correction between the amplitude of the X raw and Y raw values To convert SYNCH to absolute factor a normalized one has to be added this corresponds to add a value of 16 384 2 14 After the multiplication Y will be a 28 bit value 16 bit from Y and 14 bit from the SYNCH absolute factor which includes the added one therefore it has to be shifted to have the 16 MSBs only gt gt 14 or an arithmetic signed 14 bit right shift The influence of the non
67. es not need to be calculated each time but is taken from the look up table saving some computational time As a look up table is required some extra memory space is needed compared to the first example Example 1 message is the data transfer for which a CRC has to be calculated A typical message consists of 2 bytes for the command word plus 2 bytes for the data word plus 2 bytes for the safety word Bytelength is the number of bytes in the message A typical message has 6 oytes unsigned char CRC8 unsigned char message unsigned char Bytelength crce defined as the 8 bits that will be generated through the message till the final cre is generated In th xample above this are the blue lines out of the XOR operation unsigned char crc Byteidx is a counter to compare the bytes used for the CRC calculation and Bytelength unsigned char Byteidx Bitidx Initially the CRC remainder has to be set with the original seed OxFF for the TLE5012B crc OxFF For all the bytes of the message for Byteidx 0 Byteidx lt Bytelength Byteidx crce is calculated as the XOR operation from the previous crc and the message is the XOR operator cre message Byteidx For each bit position in a 8 bit word for Bitidx 0 Bitidx lt 8 Bitidx If the MSB of the cre is l1 with the amp 0x80 mask we get the MSB o
68. est Condition Min Typ Max Threshold Vin 50 of Vop Threshold hysteresis Vinnyst 8 of Vpp 5V 3 Vop Vbo 3 V Total trigger time lit 90 UT SPC_Trigger 0 tiw UT SPC_Trigger 1 12 Master low time bia 8 12 14 UT S_NR 00 16 22 27 S_NR 01 29 39 48 S_NR 10 50 66 81 S_NR 11 Master delay time aa 5 8 us 1 1 Not subject to production test verified by design characterization 2 Trigger time in the sensor is fixed to the number of units specified in the typ column but the effective trigger time varies due to the sensor s clock variation Total trigger time The SPC_Trigger is set to 0 by default For a short SPC Trigger Nibble and therefore an overall shorter SPC Frame the SPC_Trigger bit can be set to 1 via the SSC interface The SPC_Trigger bit is the second MSB of the HSM_PLP bits of the MOD_4 register address 0E Check Chapter 6 2 for further details User s Manual 49 V 1 0 2014 04 TLE5012B Infineon Interfaces 5 4 3 Checksum Nibble Details The checksum nibble is a 4 bit CRC of the data nibbles including the status nibble The CRC is calculated using a polynomial x x x7 1 with a seed value of 0101 The remainder after the last data nibble is used are transferred as CRC CRC calculation example with SPC interface In this example the CRC generation for a typical SPC data transfer is shown With SPC interface the CRC is calculated out of the statu
69. eters The update mode can be chosen within the Interface Mode 2 register AUTOCAL The parameters are updated in a smooth way to avoid an angle jump on the output Therefore only one Least Significant Bit LSB will be changed within the chosen range or time The autocalibration is done continuously AUTOCAL Modes 00 No autocalibration 01 Autocalibration Mode 1 One LSB to final values within the update time tupa depending on FIR_MD setting 10 Autocalibration Mode 2 Only one LSB update over one full parameter generation 1 5 revolutions After update of one LSB autocalibration will calculate the parameters again 11 Autocalibration Mode 3 One LSB to final values within an angle range of 11 25 Calculate Offsets Synch X_Offset 651 Y_Offset 664 Calculate Offsets Synch X_Offset 646 Y_Offset 658 Fused Offsets X_Offset 633 Acquire Max Min rature pairs j Check Tempe Acquire Tempe P q P Parameters Max Min rature Correction pairs Check Parameters Y_ Offset 653 Correction 620 a Calculate Parameters Parameters Correction Calculate Parameters 635 Parameters Correction Q 6404 633 646 645 651 O 650 655 658 660 1 653 664 665 670 ON amp N D L amp A OD ON rh NX Lk A v Sh SNCS RRO L EE Filter update period tupa X _ Offset Y_Offset Figure 4 1 Parameter correction with autocalibration mode 1 Calculate Offsets Synch X_Of
70. f the crc if crc amp 0x80 0 crce advances on position crce is moved left 1 bit the MSB is deleted since it will be cancelled out with the first one of the generator polynomial and a new bit from the message is taken as LSB cre lt lt 1 crce is calculated as the XOR operation from the previous cre and the generator polynomial 0x1D for TLE5012B Be aware that here the x8 bit is not taken since the MSB of the crc already has been deleted in the previous step crc QOx1D User s Manual 37 V 1 0 2014 04 TLE5012B Infineon Interfaces In case the crc MSB is 0 else crce advances one position this step is to ensure that the XOR operation is only done when the generator polynomial is aligned with a MSB of the message that is 1 ere lt lt 1 m Return the inverted crc remainder is the invertion operator An alternative m to the operator would be a XOR operation between crc and a OxFF polynomial return crc Example 2 The function that generates the CRC message is the data transfer for which a CRC has to be calculated A typical message consists of 2 bytes for the command word plus 2 bytes for the data word plus 2 bytes for the safety word Bytelength is the number of bytes in the message A typical message has 6 byte
71. face Unit IS CORDIC CCU IFA PWM Incremental IF ii HSM IFC Fuses recommended e g 2 2kQ recommended e g 10 0kQ Figure 3 4 Application circuit for TLE5012B with only PWM interface using internal CLK It is recommended to connect unused pins to ground rather than leaving them floating A resistor between the DATA line pin and ground is recommended to limit buffer circuit current if DATA generates an unexpected output The CSQ line has to be connected to Vpp to avoid unintentional activation of the SSC interface User s Manual 18 V 1 0 2014 04 TLE5012B Infineon Application Circuits The TLE5012B can be configured with SPC only Figure 3 5 This is only possible with the TLE5012B E9000 derivate which is by default configured with an open drain IFA SPC pin Von 3 0 5 5V TLE5012B Digital Signal Processing SSC Interface Unit CORDIC Incremental IF CCU ccu aa Fuses Y GMR Temp recommended e g 2 2kQ recommended e g 10 0kQ Figure 3 5 Application circuit for TLE5012B with only SPC interface using internal CLK In Figure 3 5 the IFC S_NR 1 and SCK S_NR 0 pins are set to ground to generate the slave number S_NR Op or 00 It is recommended to connect unused pins to ground rather than leaving them floating A resistor between the DATA line pin and ground is recommended to l
72. fset 651 Y_Offset 664 Parameters Correction by only 1 LSB Calculate Offsets Synch X_Offset 646 Y_ Offset 658 Fused Offsets X_Offset 633 Acquire Tempe Parameters Max Min rature pairs f Check Correction Y_Offset 653 620 625 Calculate Parameters Parameters Calculate Parameters Parameters a 630 Correction Correction D 635 olaaa a Ea 5 640 633 634 635 645 650 653 654 655 2 Revolutions 3 4 X _ Offset Y_Offset Figure 4 2 Parameter correction with autocalibration mode 2 Users Manual 21 V 1 0 2014 04 TLE5012B Infineon Specification Calculate gt Calculate Offsets Synch Parameters Offsets Synch Parameters i A X_Offset 646 Correction X_Offset 651 Correction Y Offset 693 pairs es Y_Offset 658 Y_Offset 664 Fused Offsets Acquire Tempe X_Offset 633 Max Min rature a Calculate Parameters Parameters Correction Calculate Parameters 635 Parameters Correction fie 633 646 ES Offset SAO Q40 HH OO HP HAV HA QAO On DAP DAO HOA Qa Oro SV Oo NOON Ya Oo SOO CONOR Ma Oo OD 7 SA SoS On Vn oA QA SNP FIOM PSSNPLL GEG FBONSOKLS VSS NEAT ATAT ASAT Angle X_Offset Y_Offset Figure 4 3 Parameter correction with autocalibration mode 3 The autocalibration mode 1 is the quickest mode to correct the parameters Mode 2 is the slowest method but it has the advantage that it only corrects one digi
73. g values have to be read from the registers e X raw value ADC_X register address 10 e Y raw value ADC_Y register address 114 e T raw value T_RAW register address 15 e 7250 value T250 register address 30 e TCO_X_T value MOD_4 register address OE e TCO_Y_T value TCO_Y register address OF e X_OFFSET value Offset X register address OA e Y_OFFSET value Offset Y register address 0B e SYNCH value SYNCH register address 0C e ORTHO value IFAB register address 0D e ANG BASE value MOD_3 register address 09 The values T250 TCO_X_T TCO_Y_T X_OFFSET Y_OFFSET SYNCH ORTHO and ANG _BASE are values specific for each device and constant if autocalibration disabled Therefore these values are required to be read only once and saved to the microcontroller for re use Refer to Chapter 6 2 for the description of the listed registers These values have to be read with autocalibration disabled X raw and Y raw values compensation To increase the accuracy the temperature dependent offset drift can be compensated The offset values O and Oy can be described by Equation 5 1 Oy X_OFFSET TCO_X_T T_RAW T250 439 O Y _OFFSET TCO_Y_T T_ RAW T250 439 55 T250 is a 7 bit register that has to be subtracted from the 10 bit T_RAW register No shifts are required in this operation since the higher number of bits in the T_RAW register is due to the fact that a larger range of values has to be r
74. ge a configuration parameter In the following example the Incremental Interface resolution of a TLE5012B E1000 derivate will be changed from the default 0 088 IFAB_RES bits 00 in the MOD_4 register to 0 352 IFAB_RES bits 10 via a SSC data tranfer First the whole MOD_4 register is read The bits will be copied in the write word and only the two IFAB_RES bits changed to the desired configuration Finally a read confirms that the desired bits have changed and the rest of the bits remain as they were COMMAND READ Data 1 SAFETY WORD 48204 FEF4 Ad Aa A ee BR a i 01001000001 ORR 111111011110100 COMMAND WRITE Data 1 SAFETY WORD 50E14 48304 FE63 CS e a A MSE S5 NSB LSB 01010000111000 0 1PER EREL EKK 000 1111111001100011 COMMAND READ Data 1 SAFETY WORD DOE1 48304 FE404 e a ee a ee i 01001000001 ORR 111111001000000 Figure 6 8 Example of a SSC data transfer sequence to change a configuration parameter User s Manual 66 V 1 0 2014 04 TLE5012B Infineon SSC Registers 6 1 3 Signed registers and Two s complement Many registers are described as signed registers Data in the registers such as the Angle Value and the Angle Speed and also configuration parameters such as the X and Y Offset the Amplitude Synchronicity Orthogonality Correction and the Offset Temperature Coefficients are among others signed registers That means that they are stored in Two s complement A Two
75. he CRC consists in a XOR logical operation line 3 between the 8 MSB bits of the Command Word line 1 and the seed value 1111111 line 2 Align the generator polynominal line 4 to the non zero MSB of the dataset out of the first step line 3 and calculate another XOR line 5 x x 34x 1 x Sa a Ne 100011101 Figure 5 8 TLE5012B s CRC generator polynomial for the SSC interface From this point onwards reiterative XOR logical operations between the data result of the previous operation and the generator polynominal are done till the remaining bits is equal or smaller than OOFF only 8 bits left The User s Manual 35 V 1 0 2014 04 Infineon TLE5012B Interfaces genarator polynomial always has to be aligned to the non zero MSB of the dataset Finally the CRC value line 41 has to be inverted XOR with a all 1 s polynominal to generate the Inverted Remainder line 42 oma nN Oa BR ON A U UU U WwW WWW Ww WN NY NNN NHN NNN YN a a a aoa SP eB SB Se O O DAN DOA FF WOH Fz O ODOC WAN DOA FF WH FRA O DT AN DAF ON O A A cee Seed XOR Generator polynomial XOR Generator polynomial XOR Generator polynomial XOR Generator polynomial XOR Generator polynomial XOR Generator polynomial XOR Generator polynomial XOR Generator polynomial XOR Generator polynomial XOR Generator polynomial XOR Generator polynomial XOR Generator polynomial XOR Generator polynomia
76. herefore depends on the transmitted data values The single edge is defined by a 3 Unit Time UT see Chapter 5 4 1 low pulse on the output followed by the high time defined in the protocol nominal values may vary depending on the tolerance of the internal oscillator and the influence of external circuitry All values are multiples of a unit time frame concept A transfer consists of the following parts Figure 5 13 A trigger pulse by the master which initiates the data transmission e A synchronization period of 56 UT in parallel a new sample is calculated e Astatus nibble of 12 27 UT e Between 3 and 6 data nibbles of 12 27 UT e A CRC nibble of 12 27 UT e Anend pulse to terminate the SPC transmission User s Manual 46 V 1 0 2014 04 n Interfaces Trigger Nibble Isynchronisation Frame Status Nibble Pata Nibblet Data Nibble 2 4 Data Nibble 3 q CRC lend Puise gg y Bit 11 8 Bit 7 4 Bit 3 0 24 34 51 78 tck 56 tck Vo iz o7tck lL 12 27tok nle i2 27tck nlo 12 27 tck 12 27 tok uC Activity Time Base 1 tck 3us dtck Sensor Activity Nibble Encoding 12 x tck Figure 5 13 SPC frame example The CRC checksum includes the status nibble and the data nibbles and can be used to check the validity of the decoded data The sensor is available for the next trigger pulse 90us after the falling edge of the end pulse see Figure 5 14 Trigger Nibble synchronisation Frame JEnd Pulse
77. imit buffer circuit current if DATA generates an unexpected output The CSQ line has to be connected to Vpp to avoid unintentional activation of the SSC interface User s Manual 19 V 1 0 2014 04 TLE5012B Infineon Application Circuits Synchronous Serial Communication SSC configuration In Figure 3 1 and Figure 3 2 the SSC interface has the default push pull configuration see details in Figure 3 6 Series resistors on the DATA SCK serial clock signal and CSQ chip select lines are recommended to limit the current in the erroneous case that either the sensor pushes high and the microcontroller pulls low at the same time or vice versa The resistors in the SCK and CSQ lines are only necessary in case of disturbances or noise In case of longer than usual lines or capacitances the DATA line resistor should be smaller than the recommended value uC SSC Master A lt 4 lt Figure 3 6 SSC configuration in sensor slave mode with push pull outputs high speed application SSC Slave TLE 5012B DATA c MTSE Shift Reg Shift Reg Clock Gen optional e g 100 Q optional e g 470 Q It is also possible to use an open drain setup see Figure 3 7 for the DATA SCK and CSQ lines This setup is designed to communicate with a microcontroller in a bus system together with other SSC slaves e g two TLE5012B devices for redundancy reasons This mode can be activate
78. ion disabled e Hysteresis disabled IFA PWM pin set to push pull output e SSC interface s DATA pin set to push pull output IFA IFB IFC pins set to weak driver DATA pin set to medium driver fast edge e Voltage spike filter on input pads enabled User s Manual 98 V 1 0 2014 04 TLE5012B Infineon Pre Configured Derivates 7 4 PWM type E5020 The TLE5012B E5020 is preconfigured for Pulse Width Modulation interface with high frequency It is most suitable for steering angle and actuator position sensing e PWM frequency is 1953 Hz Filter update time is 42 7 us Error indication enabled e Autocalibration mode 2 enabled e Prediction disabled e Hysteresis disabled e IFA PWM pin set to open drain output SSC interface s DATA pin is set to push pull output IFA IFB IFC pins set to weak driver DATA pin set to medium driver fast edge e Voltage spike filter on input pads enabled 7 5 SPC type E9000 The TLE5012B E9000 is preconfigured for Short PWM Code interface It is most suitable for steering angle and actuator position sensing e SPC unit time is 3 ps e Duration of the master pulse to trigger SPC output is 90 UT e 12 bit angle resolution Filter update time is 85 4 us e Autocalibration disabled e Prediction disabled e Hysteresis disabled e IFA SPC pin set to open drain output e SSC interface s DATA pin set to push pull output IFA IFB IFC pins set to weak
79. ith the amp 0x80 mask we get the MSB of the crc if crc amp 0x08 0 crce advances on position cre is moved left 1 bit the MSB is deleted since it will be cancelled out with the first one of the generator polynomial and a new bit m and the message from the message is taken as LSB cre lt lt 1 crce is calculated as the XOR operation from the previous cre and the generator polynomial 0x0D for TLE5012B Be aware that here the x4 bit is not taken since the MSB of the crc already has been deleted in the previous step crc 0x0D In case the crc MSB is 0 else crce advances one position this step is to ensure that the XOR operation is only done when the generator polynomial is aligned with a MSB of the message that is 1 ere lt lt 1 User s Manual 51 V 1 0 2014 04 TLE5012B Infineon Interfaces Return the crc remainder The amp 0x0F mask is a safety check to ensure four LSBs only and rest 0 s return crc amp 0x0F Disclaimer The CRC generation software code provided above shall be used as guidance to the developer of solutions with the TLE5012B Infineon is not responsible for malfunctioning of the code provided above This code was used with an Infineon s microcontroller XC878 e The CRC generation software code is only provided as a hint for the implementation or the use of
80. iting of the calibration values Multi Purpose Registers Some configuration registers have more than one assignment and change different settings depending on the selected interface for the IFA IFB IFC pins selectable via the IF_MD register address 0E These registers are marked as multi purpose and their assignments are described separately for each relevant interface User s Manual 71 V 1 0 2014 04 Infineon TLE5012B 6 2 1 Status Register Register Descriptions SSC Registers STAT Offset Reset Value Status Register 00 0000 15 14 13 12 11 10 9 8 RD_ST S_NR ae a ia S_ROM S_ADCT Res r w ru ru r ru 7 6 5 4 3 2 1 0 S_MAGOL S_XYOL S_OV S_DSPU S_FUSE S_VR S_WD S_RST ru ru ru ru ru ru ru ru Field Bits Type Description RD_ST 15 r Read Status 0 status values not changed since last readout 1p status values changed Note If an update event register snapshot is done after a normal read RD_ST will not be set to 1 in the following read either update read or normal read unless a new value is available Reset 1 S_NR 14 13 WwW Slave Number Used to identify up to four sensors in a bus configuration The levels on pin SCK and pin IFC can be used to change the default slave number for SPC interface Pin SCK represents S_NR 13 and pin IFC the S_NR 14 Reset 00 NO_GMR_A 12 ru No valid GMR Angle Value Cyclic check of DSPU output 0
81. itude d SYNCH Fama SYNCH a xD Normalization rea 12bits an j gt aie a Y2 a6bits a 14 X 2i6bits d Non Orthogonality Correction read ORTHO 12bits sin ORTHO Xx gt y cos ORTHO ee Angle Calculation gt i d read ANG_BASE 12g i Figure 5 10 Flow Chart of Angle Calculation from the X raw and Y raw values 5 2 5 2 Angle Calculation with end of line calibration values The TLE5012B already has pre calibrated compensation parameters which can be used to calculate the angle value see Chapter 5 2 5 1 Own compensation parameters can also be calculated end of line if desired In that case check the Application Note TLE5009 Calibration User s Manual 43 V 1 0 2014 04 TLE5012B Infineon Interfaces 5 3 Pulse Width Modulation Interface The Pulse Width Modulation PWM interface can be selected via SSC IF_MD 01 in the register MOD_4 The PWM update rate can be programmed within the register OE IFAB_RES in the following steps e 0 25 kHz with 12 bit resolution e 0 5 kHz with 12 bit resolution e 1 0 kHz with 12 bit resolution e 2 0 kHz with 12 bit resolution PWM uses a square wave with constant frequency whose duty cycle is modulated according to the last measured angle value AVAL register Figure 5 11 shows the principal behavior of a PWM with various duty cycle
82. ization User s Manual 30 V 1 0 2014 04 TLE5012B Infineon Interfaces 5 2 2 SSC Data Transfer The SSC data transfer is word aligned The following transfer words are possible Command Word to access and change operating modes of the TLE5012B e Data words any data transferred in any direction e Safety Word confirms the data transfer and provides status information k twr_daay gt fe COMMAND READ Data1 X READ Data2 SSC Master is driving DATA SSC Slave is driving DATA Figure 5 2 SSC data transfer data read example twr_delay e e COMMAND WRITE Data1 SAFETY WORD SSC Master is driving DATA SSC Slave is driving DATA Figure 5 3 SSC data transfer data write example Command Word SSC Communication between the TLE5012B and a microcontroller is generally initiated by a command word The structure of the command word is shown in Table 5 4 where the Update UPD bit allows the access to current values or updated values If an update command is issued and the UPD bit is set the immediate values are stored in the update buffer simultaneously This enables a snapshot of all necessary system parameters at the same time Bits with an update buffer are marked by an u in the Type column in register descriptions The initialization of such an update is described on page 33 Table 5 4 Structure of the Command Word Name Bits Description RW 15 Read W
83. l XOR Generator polynomial XOR Generator polynomial XOR Generator polynomial XOR Generator polynomial XOR Generator polynomial XOR Remainder Inverted Remainder COMMAND WRITE Data 1 SAFETY WORD 50814 MSB LSB MSB 010100001000000130000100000000100 1111111000000000 111 1 1010118 100011101 001000010 100011101 000010101 100011101 o pol 1 0 Bl 1 1 100011101 0001010111 pw anew ane panes TP rar MBE OD DD SB 08044 FEOO gt FE314 CRC LSB MSB LSB 100011101 001000101 100011101 000001011 100011101 ogoi 1 Bia 1 ae 1 0 4 100011101 ORS 1 Ein o Be O10 1 100011101 G 1 iy O FG 1 ae 1 1G 100011101 010000001 100011101 O10 10 0 iis 1 a 1 100011101 O 1 i 1 08 116 100011101 o pi 1 0 1 OO 100011101 010 101100 100011101 00 1000100 100011101 o 01 0 01 0 E 1 10 1 100011101 O1 FO 1 a 1 fat O o 100011101 OO 1 Bi OT 1 a 1 1 OD 1 1 0011000 31y Figure 5 9 CRC generation example with SSC interface User s Manual 36 V 1 0 2014 04 TLE5012B Infineon Interfaces CRC generation software code example Two software codes with C language to generate CRC are provided The first example is a more intuitive though slower solution since two iterative loops are done a loop for each byte and an inner loop for each bit It is also a compact solution The second code is faster since the inner loop is implemented as a look up table LUT Therefore the CRC do
84. lution counter always works with the measured angle If prediction register PREDICT address 08 is enabled the output angle that is available in the AVAL register is modified by the current angular speed to reduce the propagation delay In this case the increment or decrement of the revolution counter may be delayed with respect to the AVAL register by one update time due to the discrepancy of measured and predicted angle User s Manual 79 V 1 0 2014 04 Infineon TLE5012B Frame Synchronization Register SSC Registers FSYNC Offset Reset Value Frame Synchronization Register 054 0000 15 9 8 T FSYNC TEMPER wu ru 7 0 TEMPER ru Field Bits Type Description FSYNC 15 9 wu Frame Synchronization Counter Value Subcounter within one frame Increments every internal clock cycle Maximum counter value depends on FIR_MD setting 16 FIR_MD 00 32 FIR_MD 01 64 FIR_MD 10 128 FIR_MD 11 Reset 0 TEMPER 8 0 ru Temperature Value Signed integer temperature value Offset compensated and saturated below approx 30 C and above approx 140 C Compensation done by DSPU from T_RAW and the offset temperature T250 T C TEMPER dig 161 dig 2 776 dig C For reference point on the real temperature the voltage via the ESD diode at Vpp pin is used This introduces some variation from device to device After characterization a 9 bit correction is considered more accurate to
85. m Life support devices or systems are intended to be implanted in the human body or to support and or maintain and sustain and or protect human life If they fail it is reasonable to assume that the health of the user or other persons may be endangered armi Infineon TLE5012B Revision History Page or Item Subjects major changes since previous revision V 1 0 2014 04 Chapter 6 2 Registers Descriptions updated from Register Setting Rev1 7 TEMPER CLK_SEL and T_RAW Trademarks of Infineon Technologies AG AURIX C166 CanPAK CIPOS CIPURSE EconoPACK CoolIMOS CoolSET CORECONTROL CROSSAVE DAVE DI POL EasyPIM EconoBRIDGE EconoDUAL EconoPIM EconoPACK EiceDRIVER eupec FCOS HITFET HybridPACK I RF ISOFACE IsoPACK MIPAQ ModSTACK my d NovalithiC OptiMOS ORIGA POWERCODE PRIMARION PrimePACK PrimeSTACK PRO SIL PROFET RASIC ReverSave SatRIC SIEGET SINDRION SIPMOS SmartLEWIS SOLID FLASH TEMPFET thinQl TRENCHSTOP TriCore Other Trademarks Advance Design System ADS of Agilent Technologies AMBA ARM MULTI ICE KEIL PRIMECELL REALVIEW THUMB uVision of ARM Limited UK AUTOSAR is licensed by AUTOSAR development partnership Bluetooth of Bluetooth SIG Inc CAT iq of DECT Forum COLOSSUS FirstGPS of
86. me around 40us in the default configuration After this step we One step already surpassed Actual angle Hysteresis a Another Anoth the Hysteresis step NN otc threshold step NY 0 0 0 OOOO Phase B Phase B Phase B Phase B Phase tl ii Phase A Phase A Phase A Phase A Phase Tl i 90 phase 90 Phase BA B A at constant speed Figure 5 27 Phase A B output during a rotation direction change due to the hysteresis threshold Table 5 13 Incremental Interface Parameter Symbol Values Unit Note Test Condition Min Typ Max Incremental output frequency finc 1 0 MHz Frequency of phase A and phase B Index pulse width toe 5 us 0 1 1 Not subject to production test verified by design characterization User s Manual 60 V 1 0 2014 04 TLE5012B Infineon SSC Registers 6 SSC Registers The TLE5012B includes several registers that can be accessed via Synchronous Serial Communication SSC to read data as well as to write to configure settings 6 1 Registers Overview There are twenty two documented registers but only a few are relevant to read data or to configure the TLE5012B Many extra features that are also documented may only be used in very specific cases In the following Bitmap the relevant bits can be identified The most important bits are the ones indicated in green orange and grey The green bits contain calculate
87. mperature at the ADC The compensation is done with an offset value at 25 C temperature T250 which is specific for each device The T250 value is measured for each device during production and it is stored in the fuses The temperature in degrees Celsius C can be calculated using the formula provided in Chapter 6 2 and reading the TEMPER bits TEMPER is a signed register to convert the value to digits proceed as described in Chapter 6 1 3 As an example for a TEMPER value of 110111000 the value in digits is calculated in Equation 4 4 N 2 4 4 Value bysg 2 YB 2 1821 F 182974 O82 41424 412 i 0 1 276 FO 4 0 2 Fe a at Se 1 a 2 a 256 128 32 16 8 72 Therefore the temperature in degrees Celsius is calculated in Equation 4 5 TEMPER dig 152 dig 72 152 80 49 T C z 28 8 C 2 776 dig C 2 776 2 776 TEMPER typical accuracy error is around 5 C across the whole temperature range TEMPER is a limited register For a whole temperature range use the T_RAW register which can be compensated with the T250 register The relation between TEMPER and T_RAW is shown in Equation 4 6 TEMPER dig T _ RAW dig T 25O dig 530 dig 4 6 User s Manual 25 V 1 0 2014 04 TLE5012B Infineon Specification 4 5 Switching to external clock External clock operation is possible for the interface configurations SSC only SSC amp PWM and SSC amp SPC To switch the TLE501
88. nerator polynomial 100011101 0x11D As this table will be checked byte by byte each byte has 256 possible values 2 8 for its CRC calculation with the given generator polynomial unsigned char TableCRC 256 The cre of the position 1 result from operation cre messagetByteidx is 0x00 gt 0x00 XOR 0x11D 0x00 1 byte 0x00 The crc of the position 2 is 0x1D gt 0x01 XOR 0x11D 0x1D 1 byte 0x1D The crc of the position 3 is 0x3A gt 0x02 XOR 0x11D 0x3A 1 byte 0x34 For all the rest of the cases 0x27 0x74 0x69 0x4E 0x53 0xE8 OxF5 0xD2 OxCF 0x9C 0x81 0xA6 0xBB 0xCD OxDO OxF7 0xEA 0xB9 0xA4 0x83 0x9E 0x25 0x38 Ox1F 0x02 0x51 0x4C 0x6B 0x76 0x87 0x9A 0xBD 0xA0 0xF3 OxEE OxC9 0xD4 Ox6F 0x72 0x55 0x48 Ox1B 0x06 0x21 0x3C 0x4A 0x57 0x70 0x6D 0x3E 0x23 0x04 0x19 0xA2 0xBF 0x98 0x85 OxD6 OxCB OxEC 0xF1 0x13 O0OX0E 0x29 0x34 0x67 Ox7A Ox5D 0x40 OxFB OxE6 OxCl OxDC Ox8F 0x92 OxB5 OxA8 OxDE OxC3 OxE4 OxF9 OxAA OxB7 0x90 Ox8D 0x36 Ox2B Ox0C Oxll 0x42 Ox5F 0x78 0x65 0x94 0x89 OxAE OxB3 OxEO OxFD OxDA OxC7 Ox7C Ox61 0x46 Ox5B 0x08 0x15 0x32 Ox2F 0x59 0x44 0x63 Ox7E Ox2D 0x30 0x17 0x0A 0xB1 OxAC Ox8B 0x96 OxC5 OxD8 OxFF OxE2 0x26 Ox3B Ox1C 0x01 0x52 Ox4F 0x68 0x75 OxCE OxD3 OxF4 OxE9 OxBA OxA7 0x80 Ox9D OxXEB OxF6 0xD1 OxCC Ox9F 0x82 OxA5 O
89. nit time can be done within IFAB_HYST This enables a setup of different unit times Table 5 10 Predivider setting Parameter Symbol Values Unit Note Test Condition Min Typ Max Unit time tunit 3 0 us IFAB_HYST 00 2 5 IFAB_HYST 01 2 0 IFAB_HYST 10 1 5 IFAB_HYST 11 1 Not subject to production test verified by design characterization User s Manual 48 V 1 0 2014 04 TLE5012B Infineon Interfaces 5 4 2 Master Trigger Pulse Requirements An SPC transmission is initiated by a master trigger pulse on the IFA pin To detect a low level on the IFA pin the voltage must be below a threshold Vp The sensor detects that the IFA line has been released as soon as V is crossed Figure 5 16 shows the timing definitions for the master pulse The master low time tmiow as well as the total trigger time tmi are given in Table 5 11 If the master low time exceeds the maximum low time the sensor does not respond and is available for a next triggering 30 us after the master pulse crosses Vinr tig tot iS the delay between internal triggering of the falling edge in the sensor and the triggering of the ECU tntr e SPC e Vin _ ECU trigger level veeccccoboopecece fmiow ma tot Figure 5 16 SPC Master pulse timing Table 5 11 Master pulse parameters Parameter Symbol Values Unit Note T
90. p new angle value ANG_VAL present Note If an update event register snapshot is done after a normal read RD_AV will not be set to 1 in the following read either update read or normal read unless a new value is available Reset 1 ANG_VAL 14 0 ru Calculated Angle Value signed 15 bit Angle ANG _VAL digits 6 4 4000 180 valid for ANG_RANGE 0x080 0000 0 3FFF 179 99 valid for ANG_RANGE 0x080 Reset 0 User s Manual a V 1 0 2014 04 Infineon TLE5012B Angle Speed Register SSC Registers ASPD Offset Reset Value Angle Speed Register 034 8000 15 14 8 RD_AS ANG_SPD r ru 7 0 ANG_SPD ru Field Bits Type Description RD_AS 15 r Read Status Angle Speed Og no new angle speed value since last readout 1g new angle speed value ANG_SPD present Note If an update event register snapshot is done after a normal read RD_AS will not be set to 1 in the following read either update read or normal read unless a new value is available Reset 1 ANG_SPD 14 0 ru Calculated Angle Speed Signed value where the sign bit 14 indicates the direction of the rotation Without prediction difference between the current unpredicted angle value and second to last unpredicted angle values AneleRange KI ANG _ SPD digits Speed s 2 2t apa LS 6 5 With prediction difference between the current predicted value and s
91. perature compensation on Page 93 Reset device specific User s Manual 90 V 1 0 2014 04 Infineon TLE5012B SSC Registers Field Bits Type Description HSM_PLP multi purpose 8 5 w Hall Switch Mode Pole Pair Configuration 0000 1 pole pairs 0001 2 pole pairs 0010 3 pole pairs B wae 1101 14 pole pairs 1110 15 pole pairs 1111 16 pole pairs Pulse Width Modulation Mode Error Indication xx0xg error indication enabled xx1Xg error indication disabled Incremental Interface Mode Absolute Count Interface counts to absolute value at startup x0xxg absolute count enabled X1XxXg absolute count disabled SPC Mode Total Trigger Time Duration of the master pulse to trigger SPC output 0000 90 UT 01008 tmiow 12 UT Reset derivate specific IFAB_RES multi purpose 4 3 Ww Pulse Width Modulation Mode Frequency Selection of PWM frequency 003 244 Hz 01 488 Hz 10 977 Hz 11 1953 Hz Incremental Interface Mode IIF resolution 00 12bit 0 088 step 01 11bit 0 176 step 10 10bit 0 352 step 11 9bit 0 703 step SPC Mode SPC Frame Configuration 00 12bit angle 01 16bit angle 10 12bit angle 8bit temperature 11 16bit angle 8bit temperature Reset derivate specific User s Manual 91 V 1 0 2014 04 Infineon TLE5012B SSC Registers Field Bits Type Description IF_MD 1 0 Interface Mode on IFA IFB IFC Any derivate can
92. ption ORTHO 15 4 Orthogonality Correction of X and Y Components 12 bit signed integer value of orthogonality correction GMR element orthogonality correction 2047 11 2445 0 O 2048 11 2500 Reset device specific FIR_UDR FIR Update Rate Initial filter update rate FIR setting to be loaded into FIR_MD on startup Changing of the FIR setting can only be done by writing to the FIR_MD bits via SPI after power on 0 FIR_MD 10 85 3 us 1g FIR_MD 01 42 7 us Reset derivate specific IFAB_OD IFA IFB IFC Output Mode Os Push Pull 1g Open Drain Reset derivate specific User s Manual 89 V 1 0 2014 04 TLE5012B Infineon SSC Registers Field Bits Type Description IFAB_HYST multi purpose 1 0 Ww HSM and IIF Mode Hysteresis Electrical switching hysteresis for HSM and IIF interface 00 0 01 0 175 10 0 35 11g 0 70 SPC Mode Unit Time 00 3 0 ps 01 2 5 ps 10 2 0 us 11g 1 5 ps Reset derivate specific Interface Mode4 Register multi purpose MOD_4 Offset Reset Value Interface Mode4 Register 0E device specific 15 9 8 T T T T TCO_X_T hia WwW w 7 5 4 3 2 1 0 HSM_PLP IFAB_RES Res IF_MD Ww Ww WwW Field Bits Type Description TCO_X_T 15 9 Ww Offset Temperature Coefficient for X Component 7 bit signed integer value of X offset temperature coefficient See Offset tem
93. racteristics Characteristics IIF PWM SPC HSM SSC Data Values angle steps angle value angle value angle value many data angle value at temperature period available in the start up optional registers Distance short medium long up to 5m long up to 5m medium short Data rate high low medium low high high Resolution high high high low high Check IIF Index 0 Duty cycle range CRC HS1 HS2 HS3as Safety Word in pulse Phase diagnostics complementary the data transfer A B as signals Availability of complementary status and signal diagnostics registers Max slaves in no bus mode no bus mode 4 no bus mode 4 bus mode Communication 3 only two 1 1 3 3 lines without IIF Index Communication unidirectional unidirectional unidirectional unidirectional bidirectional triggered SSC possible Yes Yes Yes Yes Yes Other Emulates Optical Based on SENT Emulates three SPI with 3 pin Encoder protocol Hall Switches 1 Not subject to production test Distance subject to application circuit and environment 2 Communication lines between slave TLE5012B and master microcontroller External clock not included User s Manual 28 V 1 0 2014 04 TLE5012B Infineon Interfaces 5 2 Synchronous Serial Communication SSC Interface 5 2 1 SSC Timing Definition CSQ SCK DATA e toatas DATAh Figure 5 1 SSC timing SSC Inactive Time CS 5 The SSC inactiv
94. rface in parallel The angle value AVAL register read out by the SSC interface can be compared to the stored counter value In case of a non synchronization the microcontroller adds the difference to the actual counter value to synchronize the TLE5012B with the microcontroller After startup the IIF transmits a number of pulses which correspond to the actual absolute angle value Thus the microcontroller gets the information about the absolute position The Index Signal that indicates the zero crossing is available on the IFC pin Sensors with preset IIF are available as TLE5012B E1000 The register settings for these sensors can be found in Chapter 6 2 A B Mode The phase shift between phases A and B indicates either a clockwise A follows B or a counterclockwise B follows A rotation of the magnet Incremental Interface A B Mode a 90 el Phase shift Phasea VH Vi PhaseB V V Figure 5 21 Incremental interface with A B mode Step Direction Mode Phase A pulses out the increments and phase B indicates the direction Incremental Interface Step Direction Mode se TULL LLL LLL VL Direction Vu l Vi L Figure 5 22 Incremental interface with Step Direction mode Startup pulses Just after startup the IIF transmits a number of pulses which correspond to the actual absolute angle value These pulses are transmitted at the maximum frequency see Table 5 13 in both lines Phase A
95. rflow Check 0s monitoring of DSPU Overflow disabled 1g monitoring of DSPU Overflow enabled Reset 1 AS_DSPU 4 Ww Activation DSPU BIST Og after execution 1g activation of DSPU BIST or BIST running Reset 15 User s Manual 75 V 1 0 2014 04 Infineon TLE5012B SSC Registers Field Bits Type Description AS_FUSE Activation Fuse CRC A write in any of the fuse registers will set this bit automatically automatically enabled by deactivation of AUTOCAL AUTOCAL disables register CRC check regardless of the AS_FUSE setting Os monitoring of CRC disabled 13 monitoring of CRC enabled Reset 1 AS_VR Enable Voltage Regulator Check Oz check of regulator voltages disabled 1g check of regulator voltages enabled Reset 1 AS_WD Enable DSPU Watchdog 0 DSPU watchdog monitoring disabled 1p DSPU Watchdog monitoring enabled Reset 1 AS_RST Activation of Hardware Reset Activation occurs after CSQ switches from 0 to 1 after SSC transfer Og after execution 1g activation of HW Reset S_RST is set Reset 0 User s Manual 76 V 1 0 2014 04 Infineon TLE5012B Angle Value Register SSC Registers AVAL Offset Reset Value Angle Value Register 024 8000 15 14 8 RD_AV ANG_VAL r ru 7 0 ANG_VAL ru Field Bits Type Description RD_AV 15 r Read Status Angle Value 0g no new angle value since last readout 1
96. rified by design characterization 4 Minimum hysteresis without switching 3 GMR hysteresis not considered 5 The hysteresis has to be considered only at change of rotation direction To avoid switching due to mechanical vibrations of the rotor an artificial hysteresis is recommended Figure 5 20 User s Manual 55 V 1 0 2014 04 TLE5012B Infineon Interfaces Ideal Switching Point QA HShystel OHShystel Qelect o Qelect Figure 5 20 HS hysteresis User s Manual 56 V 1 0 2014 04 TLE5012B Infineon Interfaces 5 6 Incremental Interface IIF The Incremental Interface IIF emulates the operation of an optical quadrature encoder with a 50 duty cycle It transmits a square pulse per angle step where the width of the steps can be configured from Qbit 512 steps per full rotation to 12bit 4096 steps per full rotation within the register MOD_4 IFAB_RES The rotation direction is given either by the phase shift between the two channels IFA and IFB A B mode or by the level of the IFB channel Step Direction mode as shown in Figure 5 21 and Figure 5 22 The incremental interface can be configured for A B mode or Step Direction mode in register MOD_1 IIF_MOD Using the Incremental Interface requires an up down counter on the microcontroller which counts the pulses and thus keeps track of the absolute position The counter can be synchronized periodically by using the SSC inte
97. riod typdate before than if prediction is disabled The prediction function is linear and may not be recommended for cases where the rotation speed changes abruptly At reset the default status is restored User s Manual 63 V 1 0 2014 04 TLE5012B Infineon SSC Registers 6 1 1 Bit Types The TLE5012B contains read write and update registers as described in Table 6 1 Table 6 1 Bit Types Abbreviation Function Description r Read Read only registers Ww Write Read and write registers u Update Update buffer for this bit is present If an update is triggered the immediate values are stored in this update buffer simultaneously This enables a snapshot of all necessary system parameters at the same time The relevant data is found in the read registers or the relevant bits in the register Write bits are mostly for configuration purposes Mostly to select other configuration settings than the default ones from the derivate e g change resolution hysteresis update rate enable disable features such as autocalibration but also possible to overwrite compensation parameters Some bits are also marked as update bits This function is meant to obtain the data from multiple registers in the very exact moment In normal operation if a Command Word is sent to read multiple registers due to the fact that some time is needed to process each READ we will be reading registers in different moments current data i
98. rite 0 Write 1 Read Lock 14 11 4 bit Lock Value 0000 Default operating access for addresses 0x00 0x04 0x14 0x15 0x20 0x30 1010 Configuration access for addresses 0x05 0x11 User s Manual 31 V 1 0 2014 04 Infineon TLE5012B Interfaces Table 5 4 Structure of the Command Word cont d Name Bits Description UPD 10 Update Register Access 0 Access to current values 1 Access to values in update buffer ADDR 9 4 6 bit Address ND 3 0 4 bit Number of Data Words if bits set to 0000 no safety word is provided Safety Word The safety word consists of the following bits Table 5 5 Structure of the Safety Word Name Bits Description STAT Chip and Interface Status 15 Indication of chip reset or watchdog overflow resets after readout via SSC 0 Reset occurred 1 No reset 14 System error e g overvoltage undervoltage Vpp GND off ROM 0 Error occurred S_VR S_DSPU S_OV S_XYOL S_ MAGOL S_FUSE S_ROM S_ADCT 1 No error 13 Interface access error access to wrong address wrong lock 0 Error occurred 1 No error 12 Valid angle value NO_GMR_A 0 NO_GMR_XY 0 0 Angle value invalid 1 Angle value valid RESP 11 8 Sensor number response indicator The sensor number bit is pulled low and the other bits are high e g for the sensor number or slave number 00 the RESP bits would be 1110 For the sensor n
99. s Table CRC is the pointer to the look up table LUT unsigned char CRC8 unsigned char message unsigned char Bytelength unsigned char TableCRC crce defined as the 8 bits that will be generated through the message till the final cre is generated In th xample above this are the blue lines out of the XOR operation unsigned char crc Byteidx is a counter to compare the bytes used for the CRC calculation and Bytelength unsigned char Byteid Initially the CRC remainder has to be set with the original seed OxFF for the TLE5012B crc OXxFF For all the bytes of the message for Byteidx 0 Byteidx lt Bytelength Byteidx cre is the value in the look up table TableCRC x at the position x Wo m The position x is determined as the XOR operation between the previous crc and the next byte of the message is the XOR operator crc TableCRC cre message Byteidx J n Return the inverted crc remainder is the invertion operator An alternative m to the operator would be a XOR operation between crc and a OxFF polynomial User s Manual 38 V 1 0 2014 04 TLE5012B Infineon Interfaces return crc The look up table which depends on the CRC generator polynomial required for the TLE5012B is as follows Look up table LUT for the TLE5012B with ge
100. s 12 bit angle 00 3 nibbles 16 bit angle 01 4 nibbles 12 bit angle 8 bit temperature 10 5 nibbles 16 bit angle 8 bit temperature 11 6 nibbles The status nibble which is sent with each SPC data frame provides an error indication similar to the Safety Word of the SSC protocol In case the sensor detects an error the corresponding error bit in the Status register is set and either the bit SYS_ERR or the bit ELEC_ERR of the status nibble will be high depending on the kind of error see Table 5 9 Regardless whether the error is permanent or transient the error bit in the status nibble remains high until either the Status register is read via SSC interface or the sensor is reset Table 5 9 Structure of status nibble Name Bits Description SYS_ERR 3 Indication of system error S_FUSE S_OV S_XYOL S_MAGOL S_ADCT 0 No system error 1 System error occurred ELEC_ERR 2 Indication of electrical error S_RST S_VR 0 No electrical error 1 Electrical error occurred Both hardware and software resets will set this bit at 1 for the first status nibble after the reset S_RST After readout S_RST bit will be set to 0 S_NR 1 Slave number bit 1 level on IFC 0 Slave number bit 0 level on SCK 5 4 1 Unit Time Setup The basic SPC protocol unit time granularity is defined as 3 ps Every timing is a multiple of this basic time unit To achieve more flexibility trimming of the u
101. s read not data from the same point in time To read data from the very exact time and not current data an Update Event has to be generated before sending the COMMAND Word As explained in Chapter 5 2 2 under the Data communication via SSC section the Update Event is generated by setting the CSQ line to low for 14s tcsupaate This will store the values in the update buffer at the same time it is a snapshot This values will remain in the buffer till another Update Event is generated or till the TLE5012B is switched off To read the update buffer which has just been generated the Command World has to set the UPD Update Register Access bit to high The Command Word structure is described in Chapter 5 2 2 under the SSC Data Transfer section With UPD set to high the update buffer will be read which contains the data from the very exact moment and not the normal registers which contain current values User s Manual 64 V 1 0 2014 04 Infineon TLE5012B 6 1 2 Communication Examples SSC Registers This chapter gives some short SSC communication examples The sensor has to be selected first via CSQ and SCK must be available for the communication Micro controller 1 Command 1_0000_0_000010_0001 R W_Lock_UPD_ADD_ND j 2 Read Data 1_XXXXXXXXXXXXXXX Transmit angle value 3 Safety Word 1_1_1_1_XXXX_XXXXXXXX Transmit safety word Figure 6 4 SSC command to read angle value Micro controller
102. s and the definition of timing values The duty cycle of a PWM is defined by the following general formulas Duty Cycle ton PWM t pwm Lon T log 1 Sew eS pwm 5 6 The duty cycle range between 0 6 25 and 93 75 100 is used only for diagnostic purposes In case the sensor detects an error the corresponding error bit in the Status register is set and the PWM duty cycle goes to the lower 0 6 25 or upper 93 75 100 diagnostic range depending on the kind of error see Output duty cycle range in Table 5 7 Regardless whether the error is permanent or transient the error bit in the Status register remains set and the duty cycle stays in the diagnostic range until either the Status register is read via SSC interface or the sensor is reset This diagnostic function can be disabled via the MOD_4 register see Chapter 6 2 Sensors with preset PWM are available as TLE5012B E5xxx The register settings for these sensors can be found in Chapter 6 2 i ton ON High level OFF Low level Ura Vdd Duty cycle 6 25 Duty cycle 50 Duty cycle 93 75 Figure 5 11 Typical example of a PWM signal User s Manual 44 V 1 0 2014 04 armi Infineon TLE5012B Interfaces Table 5 7 PWM interface Parameter Symbol Values Unit Note Test Condition Min Typ Max PWM output frequencies fowmt 232 244 262 Hz 1 Selectable by IFAB_RES iowa 464 488 525 Hz 1
103. s nibble plus all the data nibbles In this example this is for the default three data nibbles The status nibble is 0000 as there are no errors and the slave number is the 00 IFC and SCK pin connected to ground as shown in the application circuits chapter The following three data nibbles provide the angle value At the beginning the CRC is set at 0000 see Figure 5 18 line 1 The first step to generate the CRC consists in a XOR logical operation line 3 between the status nibble line 1 and the seed value 0101 line 2 Align the generator polynomial line 4 to the non zero MSB of the dataset out of the first step line 3 and calculate another XOR line 5 xf x tx 1 ne aad 11101 Figure 5 17 TLE5012B s CRC generator polynomial for the SPC interface From this point onwards reiterative XOR logical operations between the data result of the previous operation and the generator polynomial are done till the remaining bits are equal or smaller than OxOF only 4 bits left ce VSB 1S5 MSB LSB NSB LSB MSB LSB NSB SB 0101 Seed XOR 0 Generator polynomial 11 XOR 01 1 0 Generator polynomial XOR Generator polynomial XOR o oo N DO oO F OO NY a ee ee ks 10 Generator polynomial 11 XOR SQ SA 5 e a 12 Generator polynomial 13 XOR 5j G l oo 14 Generator polynomial 15 XOR 16 Generator polynomial 17 XOR 18 Remainder Figure 5 18 CRC generation
104. se bits allow to choose between four different resolutions if the default ones are not the most adequate for the application For PWM interface the frequency can be chosen from 244Hz to 1953Hz therefore it can be chosen how often the updated angle value has to be transmitted For IIF pulses can be transmitted for different step resolutions from 0 088 to 0 703 For SPC it can be chosen if angle resolution should be in 12 or 16 bits the latest meaning that an extra nibble has to be pulsed out At reset the default resolution is restored Interface mode there are different TLE5012B derivates with different default interfaces Still the interface of the TLE5012B can also be chosen via SSC at start up by setting the two IF_MD bits bits 1 0 of the MOD_4 register OE At reset the default interface of the derivate is restored Autocalibration the TLE5012B is a factory calibrated sensor Still automatic calibration of offset and amplitude synchronicity can be enabled for applications with full turn capability in the MOD_2 register 08 under the AUTOCAL bits bits 1 0 to compensate lifetime and temperature effects At reset the default factory calibrated parameters are restored For further information on autocalibration refer to Chapter 4 1 Prediction the prediction function can be enabled disabled in the MOD_2 register 08 under the PREDICT bit bit 2 As described in Chapter 4 2 Prediction allows to calculate the angle value around one pe
105. ster ADC_Y Offset Reset Value Y raw value 11 0000 15 0 ADC_Y r Field Bits Type Description ADC_Y 15 0 r ADC value of Y GMR or ADC_Y is read Reset 0 16 bit signed integer raw Y value Updated when ADC_X User s Manual 94 V 1 0 2014 04 TLE5012B Infineon SSC Registers D_MAG Register D_MAG Offset Reset Value D_MAG Register 14 0000 15 14 13 12 11 10 9 8 Res MAG ru 7 6 5 4 3 2 1 0 MAG ru Field Bits Type Description MAG 9 0 ru Angle Vector Magnitude Angle Vector Magnitude after X Y error compensation due to temperature This Field allows additional safety checks Formula MAG SQRT X X Y Y 64 Reset 04 User s Manual 95 V 1 0 2014 04 Infineon T_RAW Register TLE5012B SSC Registers T_RAW Offset Reset Value T_RAW Register 154 0000 15 14 13 12 11 10 9 8 T_TGL Res T_RAW ru m 7 6 5 4 3 2 1 0 T_RAW ji ll ru Field Bits Type Description T_TGL 15 ru Temperature Sensor Raw Value Toggle Toggles after every new Temperature value T_RAW Reset 0 T_RAW 9 0 ru Temperature Sensor Raw Value Temperature at ADC This value is not compensated with the offset temperature T_RAW range is not limited as TEMPER T_RAW is an unsigned value T C T_RAW dig 369 dig T25O0 dig 2 776 dig C Reset 0 User s Manual 96 V 1 0 2014 04 TLE5012B Infineon
106. t CRC polynomial division circuit CRC calculation example with SSC interface In this example the CRC generation for a typical SSC data transfer is shown In this case the feature Prediction will be enabled so the SSC data transfer consists of a command word and a write data word send by the master microcrontroller followed by a safety word which contains the CRC send by the slave TLE5012B The command word 5081 indicates that a write data word MSB of the command word at O will follow and that this data has to be writen in the address 08 MOD_2 register The four LSBs of the command Word indicate how many 16 bit words will follow 0001B in this case The write word 08044 is sent to enable Prediction one of the features available with the TLE5012B The PREDICT bit bit 2 of the WRITE Data 1 will be set at 1 Note Before sending a Write Data it is necessary to receive a Read Data to ensure that the bits that will not be configurated changed are not overwritten with a wrong value After writing the new configuration parameters the sensor will send a safety word FE31 indicating the status STAT the sensor number RESP 1110 in this case since there is only one sensor named 00 and the CRC which includes the STAT and RESP bits in its generation In this case the CRC transmitted is 31 CRC generation At the beginning the CRC is set at 00 see Figure 5 9 line 1 The first step to generate t
107. t and then new parameters are calculated So in case that the parameters are calculated out of a corrupted Max Min pair for example due to a spike this will only distort the offset by one bit whereas mode 1 or mode 3 would completely correct the parameters with the corrupted values before new parameters are calculated Condition for usability of Autocalibration The autocalibration algorithm relies on the collection of maximum and minimum values of the raw X and Y signals of the sensing elements therefore applications suitable for autocalibration must turn full rotations 360 Compensation parameters for offset and amplitude synchronicity error are calculated from these minima and maxima only if the temperature did not change by more than 5 Kelvin during their collection to avoid temperature drift induced errors For the sensor to be accurate in autocalibration mode it has to be assured in the application that the calibration parameters are updated frequently Thus autocalibration should only be used in applications where the magnet regularly rotates by at least one full turn internal TLE5012B check of full turn requires maximum 1 5 revolutions at a temperature which is constant within 5 Kelvin Enabling Disabling of Autocalibration When switching autocalibration on or off the TLE5012B may erroneously trigger the S_FUSE error bit in the status register which indicates a configuration CRC error which is also displayed permanently in
108. ude synchronicity and orthogonality of the raw signals from the GMR bridges and performs additional features such as auto calibration prediction and angle speed calculation e COordinate Rotation Digital Computer CORDIC which contains the trigonometric function for angle calculation e Capture Compare Unit CCU which is used to generate the PWM and SPC signals e Random Access Memory RAM which contains the configuration registers e Laser Fuses which contain the calibration parameters for the error compensation and the IC default configuration which is loaded into the RAM at startup Laser fuses configuration The laser fuse settings are derivate specific During production each and every TLE5012B chip is specifically configurated according to a derivate interface PWM SPC HSM or IIF and to its specific calibration values e g offset amplitude synchronicity orthogonality These default values are set by laser fuses where they remain stored permanently At power on the values stored in the Fuses are loaded into flip flops placed in the RAM Via the SSC interface these derivate specific configuration values can be overwritten in the RAM This allows some programmability such as change of interface using a IIF derivate as a PWM derivate for example or to correct the calibration values if running the autocalibration mode for example When powered off or reset the overwritten values will be lost and the default values stored in the f
109. umber or slave number 10 the RESP bits would be 1011 CRC 7 0 Cyclic Redundancy Check CRC which includes the STAT and RESP bits 1 When an error occurs the corresponding status bit in the safety word remains low until the STAT register address 00 is read via SSC interface Bit Types The types of bits used in the registers are listed here Table 5 6 Bit Types Abbreviation Function Description r Read Read only registers WwW Write Read and write registers u Update Update buffer for this bit is present If an update is issued and the Update Register Access bit UPD in Command Word is set the immediate values are stored in this update buffer simultaneously This allows a snapshot of all necessary system parameters at the same time User s Manual 32 V 1 0 2014 04 TLE5012B Infineon Interfaces Data communication via SSC SSC Transfer Command Word IRW LOCK lupo I ADDR l LENGTH SSC Master is driving DAT A SSC Slave is driving DAT A Figure 5 4 SSC bit ordering read example Update Signal SCK Update Event a ig go eg tg gg DATA AR ee IX X Ay SSC Master is driving DAT A SSC Slave is driving DAT A Command Word Data Word s CSQ tesu pdate Figure 5 5 Update of update registers The data communication via SSC interface has the following characteristics e The data tr
110. uses will be reloaded into the RAM at the next power up The Figure 2 2 shows how the Fuse burning process works In the original state all Fuses are connected to ground GND Once the calibration and derivate specific values are calculated the information is burned into the Fuses so that some remain connected to GND low or logical O and some are now pulled up by a resistor high or logical 1 When powering the sensor the RAM is initialized with the values from the Fuses Voo Voo D S P U Voo Voo D S P U Vbo Voo D S P U 0 0 0 0 1 0 i GND GND GND GND Figure 2 2 Laser Fuses burning process m AN GND GND User s Manual 12 V 1 0 2014 04 TLE5012B Infineon Functional Description 2 2 5 Interfaces Bi directional communication with the TLE5012B is enabled by a three wire SSC interface In parallel to the SSC interface one secondary interface can be selected which is available on the IFA IFB IFC pins e PWM e Incremental Interface e Hall Switch Mode Short PWM Code By using pre configured derivates see Chapter 7 the TLE5012B can also be operated with the secondary interface only without SSC communication 2 2 6 Safety Features The TLE5012B offers a multiplicity of safety features to support the Safety Integrity Level SIL Infineon s sensors that are intended for this purpose are identified b
111. valid GMR angle value on the interface 1 novalid GMR angle value on the interface e g test vectors Reset 0 NO_GMR_XY 11 ru No valid GMR XY Values Cyclic check of ADC input Og valid GMR_XY values on the ADC input 1g no valid GMR_XY values on the ADC input e g test vectors Reset 0g User s Manual 72 V 1 0 2014 04 Infineon TLE5012B SSC Registers Field Bits Type Description S_ROM 10 Status ROM Check of ROM CRC at startup After fail DSPU does not start SPI access possible Os CRC ok 1 CRC fail or running Reset 0 S_ADCT Status ADC Test Check of signal path with test vectors All test vectors at startup tested Activation in operation via AS_ADCT possible Og Test vectors ok 1g Test vectors out of limit Reset 0g S_MAGOL Status Magnitude Out of Limit Cyclic check of available magnetic field strength magnet loss check Deactivation via AS_VEC_MAG 03 GMR magnitude ok 1 GMR magnitude out of limit Reset 0 S_XYOL Status X Y Data Out of Limit Cyclic check of X and Y raw values Deactivation via AS_VEC_XY On X Y data ok 1g X Y data out of limit gt 23230 digits lt 23230 digits Reset 0 S_OV Status Overflow Cyclic check of DSPU overflow Deactivation via AS_OV 03 No DSPU overflow occurred 13 DSPU overflow occurred Reset 0 S_DSPU Status Digital Signal Processing Unit Ch
112. x on IFC pin 11 not allowed Reset derivate specific 1 DSPU_HOLD is ignored in PWM or SPC mode User s Manual 81 V 1 0 2014 04 TLE5012B Infineon SSC Registers External Clock Selection External clock operation is possible for the interface configurations SSC only SSC amp PWM and SSC amp SPC To switch the TLE5012B to external clock the following procedure is used e Trigger a chip reset by writing a 1 to the AS_RST bit address 01 0 via SSC interface e Within 175 us after the reset command write a 1 to the CLK_SEL bit address 06 4 e After the power on time max 7 ms read the CLK_SEL bit via SSC interface to confirm that external clock is selected Note If the clock source CLK_SEL bit is switched to external clock during operation of the sensor without a reset it may occur due to an internal timing conflict that the switching command is not accepted and the chip keeps operating on internal clock SIL Register SIL Offset Reset Value SIL Register 07 0000 15 14 13 11 10 9 8 T FILT_PA FILT_IN FUSE_RE R V Res L Res w w w 7 6 5 3 2 0 Res RORTY E ADCTV_Y ADCTV_X w w w Field Bits Type Description FILT_PAR 15 w Filter Parallel Diagnostic function to test ADCs If enabled the raw X signal is routed also to the Y ADC so SIN and COS signal should be identical Os filter parallel disabled 1 filter parallel enabled source X value
113. xB8 0x03 0x1E 0x39 0x24 0x77 Ox6A Ox4D 0x50 OxAl OxBC Ox9B 0x86 OxD5 OxC8 OxEF OxF2 0x49 0x54 0x73 Ox6E Ox3D 0x20 0x07 OxlA Ox6C 0x71 0x56 Ox4B 0x18 0x05 0x22 Ox3F 0x84 D 0x99 OxBE OxA3 OxFO OxED OxCA OxD7 0x35 0x28 OxOF 0x12 0x41 Ox5C Ox7B 0x66 OxDD OxC0O OxE7 OxFA OxA9 OxB4 0x93 Ox8E OxF8 OxE5 OxC2 OxDF Ox8C 0x91 OxB6 OxAB 0x10 0x0D Ox2A 0x37 0x64 0x79 Ox5E 0x43 OxB2 OxAF 0x88 0x95 OxC6 OxDB OxFC OxE1 Ox5A 0x47 0x60 Ox7D Ox2E 0x33 0x14 0x09 0x7F 0x62 0x45 0x58 Ox0B 0x16 0x31 Ox2C 0x97 Ox8A OxAD OxBO OxE3 OxFe The cre of the position 255 is 0xD9 gt OxFE XOR Ox11D OxD9 1 byte OxD9 The crc of the position 256 is 0xC4 gt OxFF XOR 0x11D OxC4 OxC4 1 byte The following code does not need to be implemented since the look up table is already provided above But for general interest the following code would be used to generate the look up table independently of which generator polynomial is used This code can also be used to ensure that the values in the look up table are correctly generated copied to the application Generation of a look up table LUT void BuildCRCTable unsigned int polynomial unsigned char crcTable ReducedPoly is the generator polynomial User s Manual 39 V 1 0 2014 04 TLE50
114. y the following logo PRO B SIL Figure 2 3 PRO SIL Logo Disclaimer PRO SIL is a Registered Trademark of Infineon Technologies AG The PRO SIL Trademark designates Infineon products which contain SIL Supporting Features SIL Supporting Features are intended to support the overall System Design to reach the desired SIL according to IEC61508 or A SIL according to 15026262 level for the Safety System with high efficiency SIL respectively A SIL certification for such a System has to be reached on system level by the System Responsible at an accredited Certification Authority SIL stands for Safety Integrity Level according to IEC 61508 A SIL stands for Automotive Safety Integrity Level according to ISO 26262 Safety features are e Test vectors switchable to ADC input activated via SSC interface e Inversion or combination of filter input streams activated via SSC interface e Data transmission check via 8 bit Cyclic Redundancy Check CRC for SSC communcation and 4 bit CRC nibble for SPC interface e Built in Self test BIST routines for ISM CORDIC CCU ADCs ran at startup e Two independent active interfaces possible e Overvoltage and undervoltage detection User s Manual 13 V 1 0 2014 04 TLE5012B Infineon Functional Description 2 3 Sensing Principle The Giant Magneto Resistance GMR sensor is implemented using vertical integration This means that the GMR sensitive areas are integr
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