PWM generation on TC1766
Contents
1. 6 3 Introduction to the PWM recente eee eco ce nace eio ctun nta a 7 3 1 Object approach Hardware ssssssssssseseeeee nennen mener enne en enne nennen nnns 7 3 2 Layered approach and hardware abstraction sss eene eme 8 4 Low level driver The basic GPTA objects eeeeeeseeeeeennneennnennn nennen nennen nnn nennen 9 4 1 The GPTAL TG mod s tsa e ete det do ial elas eet de addere 9 4 2 Cascading theL TG uiii dudit ede ri lee eine utei et EAE E 9 4 2 1 The reset timer cell 252 2 7 e tee deqe a ghex tena td ques atten than ente y dette due vita 10 4 2 2 The cells actions amp output signal 2 2 ce tee etter ene etree rte eene 10 4 3 Coherent update Shadow register ssssssssssessseeeeneeenee nennen enne nnns 12 4 4 Connecting the input clock 2 2 eee ee eeeee eee etter erent ee teen ee eee ae ee ee eae ee ee enne nenne ener nennen 12 45 Connecting to output pin eee eee cece cece eeeeee cette ee ee ee ce aan ee eeeeee sce aaaeceeeeeeeseceaeaeeeeeeeeesecsiaeeeeeeneetene 12 46 GPTA and port initialization sequence cccceeeeeeccee cece ee te cece eae eeeeeeeesecacaeceeeeeeesecsuaeeeeeereeetees 13 4 7 PP easter ete atc ee nese ete eee eee ie ee 13 5 Driver The Basic PWM objects sese nnn nnne nnn n enin trennt nnns 14 5 1 rs 14 5 2 Coherent update vs non coherent update sss2. Ton 2 DeadTime if Ton gt Max Ton Period tBottomLeadingEdge Period Ton 2 1 tBottomTrailingEdge Period Ton 2 1 Where e period is the period in ticks Period Frimer fPwm frimer fopra with frimer the reset timer input frequency e Tonis the ON time of the PWM in ticks with von DutyCycle perioa e MinPulse is the smallest allowed pulse in ticks 0 in the example Application Note 24 V1 0 2008 08 Infineon AP32128 PWM generation using the GPTA Application examples The PWM objects The table below shows in the 1 part the timer output for a period of T 8 ticks DeadTime 1 MinPulse 0 The output is high for 4 ticks and low for 4 ticks The p part shows the output for one of the top channels for the duty cycle 096 10096 5096 and 12 596 Note that e For dc 0 4 the top output is set at t 3 but immediately reset by the trailing cell so that no pulse appear on the output The bottom output is reset at t 3 but immediately set by the trailing cell so that no pulse appears on the output e For dc 100 the top output is set as the timer is reset to t 1 OxFFFF As the trailing edge is set to t 7 the falling edge never occurs and the output remain set The bottom output is reset as the timer is reset to t 1 OxFFFF As the trailing edge is set to t 7 the falling edge never occurs and the output remain set e For dc 50 the top output is set at t 1 and reset at t 5 the o
3. 7 2 Building the executable Load and compile the tasking project AP32128 PwmGeneration TC1766 RAM pjt Application Note 27 V1 0 2008 08 Infineon LTC GTC GT FPC DCM PDL GPTA PWM AP32128 PWM generation using the GPTA Abbreviations Local timer cell Global timer cell Global timer Filter and prescaler cell Duty cycle measurement Phase discrimination logic General purpose timer array Pulse width modulation Application Note 28 Abbreviations V1 0 2008 08
4. e An output signal having a variable duty cycle gt We ll use 2 compare cells one for the leading and one for the trailing edge e A connection from the PWM output of the GPTA to the microcontroller output pin gt we ll use the GPTA output multiplexer and the port alternate functions signal routing The Figure 1 shows a 4 cells PWM configuration The 1 cell is configured as a reset timer and counts up When the 2 cell configured as a compare cell matches the timer value the timer is reset to OXFFFF and continues counting up The 3 and 4 cells produce the PWM output signal the PWM leading edge rising edge and the PWM trailing edge falling edge They are configured as compare cells that change the signal output when the compare cell value match the timer value Changing the compare value will change the PWM duty cycle Note that the compare values are symmetrical to the middle of the period in order to produce a centered aligned PWM Set Output on event 40 Reset output on event or cop P1200 eat aa Compare Figure 1 Basic PWM Application Note 7 V1 0 2008 08 e AP32128 Infi neon PWM generation using the GPTA Introduction to the PWM 3 2 Layered approach and hardware abstraction The GPTA hardware abstraction can be done using 3 layers e The Low level driver layer e The Driver layer e The application layer The Figure 2 shows a use case for creating and using the PWM objects des
5. 4 i t o x GPTAx o gen 9 o Note that the complete timer object timer period match can be built either independently from the next channel as on the Figure 4 where there is a dedicated compare cell for the period match or part of the next 10 Optional Application Note 14 V1 0 2008 08 AP32128 PWM generation using the GPTA Infineon Driver The Basic PWM objects channel as on the Figure 5 where the period compare cell is also used in the generation of the PWM output signal 5 2 Coherent update vs non coherent update Coherent update Non coherent update Resource used Costly in resources 2 LTC per edge Less resources used 1 LTC per edge Small duty cycle No restriction 0 duty cycle possible Limited by the compare value update latency Big duty cycle No restriction 100 duty cycle possible Limited by the compare value update latency Correct pulses Proper pulses guarantied no glitches Glitches may appear on compare value update Depends on the update method used Multi channel Multi channel update is synchronous Channel update might not be synchronous Depends on the update method used Update timing The compare value update can be done at any time The new value is taken in account for the next period SO line The update time has an influence on the generated pulse Unexpected duty cycle mi
6. 0 1 System Pwm 2 DutyCycle 0 1 System Pwm 3 DutyCycle 0 3 hold the current PWM duty cycles Manual setting of the duty cycle can be done by setting to TRUE 1 the variable system Pwm x ManualDutyCycle With x 1 3 and writing the required duty cycle in the System Pwm x DutyCycle variables TA simple RC filter may convert the PWM pulses to the averaged signal sine waves Application Note 6 V1 0 2008 08 sf AP32128 Infi neon PWM generation using the GPTA Introduction to the PWM 3 Introduction to the PWM When one hear from the GPTA the 1 think that come to the mind is Oh no Such a complex module I ll never get anything out of it without a lot of work That s what this appnote will try to remove from everyone s mind 3 1 Object approach Hardware The GPTA should be seen as a module made of very flexible objects like timers capture compare modules and other objects to suits nearly every application Let s have a look from the application point of view the requirements could be e need a centered aligned PWM output with a constant period and a variable duty cycle If we look closer at the requirement and match it with the GPTA objects the following objects will be required e A timer using a defined input clock gt We ll use a reset timer with one of the GPTA available module clocks GPTA input multiplexer e A period value gt We ll use one compare cell to reset the timer Period match
7. SO line ENS Mode Input Input Initial SI Action Output Interrupt sensitivity Value Se cuevent y state LTC4 compare Period 2 High Reset No No L TC5 compare Period 2 Low Copy or No No Reset LTC6 compare Period 2 2 1 High Copy or No Yes oet LTC7 compare Period 2 2 1 Low Copy or GPTA3 Yes Set LTC8 compare Period 2 High Set No No LICI6 LTC24 LTCO compare Period 2 Low Copy or No No LTC17 Set LTC25 LTC10 compare Period 2 High Copy or No No LTC18 Reset LTC28 LTC11 compare Period 2 Low Copy or GPTA8 No LTC19 Reset GPTA17 noa GPTA26 LTC12 compare Period 2 High Reset No No LTC20 LTC28 LTC13 compare Period 2 Low Copy or No No LTC21 Reset LTC29 LTC14 compare Period 2 High Copy or No No LTC22 Set EIC LTC15 compare Period 2 Low Copy OE GPTA9 No LTC23 Set GPTA19 LTC31 GPTA27 Application Note 23 V1 0 2008 08 Infineon AP32128 PWM generation using the GPTA 6 4 3 Duty cycle formula and output example Application examples The PWM objects Find below the pseudo code used for the leading and trailing edge computation Min MinPulse Max Period MinPulse if Ton lt Min Ton 0 else if Ton gt Max Ton Period tTopLeadingEdge Period Ton 2 1 tTopTrailingEdge Period Ton 2 1 if Ton gt 0
8. of the SO line on the next timer event Application Note 12 V1 0 2008 08 Infineon 4 6 AP32128 PWM generation using the GPTA Low level driver The basic GPTA objects GPTA and port initialization sequence At reset the microcontroller GPTA ports are 3 stated the output signal level is at that time defined by the external circuit as for example with pull up or pull down resistors When programming the multiplexer the GPTA outputs are disconnected internally from the LTCs and set to a default low level Therefore glitches may appear on the GPTA outputs while the GPTA multiplexer is being programmed In order to avoid such glitch the port alternate function must be set last as in the following initialization sequence example Enable and set the GPTA module clock amp enable the GPTA module Setup the LTC LTC interrupts and LTC default output state Program the GPTA I O multiplexer In case the emergency stop functionality is used set the port output default state and enable the emergency outputs Set the port pad driver mode Set the port alternate function to connect the GPTA output to the uC ports port behavior 4 7 API Mode API Brief description p Reset timer GPTA LTC CellTimerReset Configure a reset timer cell Compare ge Mec a Configure a compare cell Multiplexer input GPTA LTC ConnectCLK Route an input signal to an LTC p p p g Multiplexer output GPTA LTC ConnectPin Route the LTC output sig
9. value for LTC43 is set out of the timer range so that the compare event never occurs and the output remains set Reset timer Period match GPTA8 CHO Pe LTC42 a LTC43 I 1 Pe LTC44 Duty cycle CH1 GPTAG gap os ua Timer 1 pr CHO GPTAB H CH1 I GPTAO Figure 6 Basic PWM channels Application Note 17 V1 0 2008 08 ore AP32128 Infi neon PWM generation using the GPTA Application examples The PWM objects 6 2 2 Configuration summary Resource Configuration Info GPTA8 e Direction output CHO e Behavior Push pull ALT1 e Default Low GPTA9 e Direction output CH1 e Behavior Push pull ALT1 e Default Low Mode Input Input Initial Default Action Output Interrupt sensitivity Value SO line preni Mode Input Input Initial SI Action Output Interrupt sensitivity Value shade Omaani y state LTCA1 compare Period 2 Always Reset No No LTC42 compare OxFFFE Always Copy or No No Set LTCA3 compare Period 2 Always Reset No No LTC44 compare OxFFFE Always Copy or No No Bet 6 2 3 Duty cycle formula Find below the pseudo code used for the leading and trailing edge computation tTrailingEdge Period 2 if Ton 0 0 gt 2nd compare never occurs 1st edge tLeadingEdge OxFFFE else if Ton gt Period 100 gt
10. 2nd compare lst edge overwrite the lst compare 2nd edge if Channel gt FirstCell Channel gt Timer gt Cell 1 The channel is allowed for 100 tLeadingEdge Period 2 tTrailingEdge Period 1 else The channel is not allowed for 100 tLeadingEdge OxFFFF else x gt 1 lt compare value lt Period 3 tLeadingEdge Period Ton 2 Where e period is the period in ticks Period Frimer fPwm with frimer the reset timer input frequency frimer fepta e Ton is the ON time of the PWM in ticks with Ton DutyCycle period Application Note 18 V1 0 2008 08 et AP32128 Infi neon PWM generation using the GPTA Application examples The PWM objects 6 2 4 API Mode API Brief description Reset timer Tier InitO Initialize the reset timer Initialization Channel Pwm_EdgeAligned_Init Initialize a PWM channel initialization PWM update 6se lisnea Update Update the PWM duty cycle Pwm EdgeAligned Off Set the PWM off For more details on each function see the software documentation 6 3 PWM 2 Edge aligned coherent update PWM channels 6 3 1 Features This example implements two edge aligned coherent update PWM channels For this a PWM timer object is used LTC32 followed by the 1 channel and the 2 channel The 1 channel is made of a single edge PWM object LTC33 and a single edge coherent update PWM object LTC34 amp LTC
11. 35 where LTC 33 is also used for the timer period match The duty cycle update is done by writing the new compare value to the shadow compare cells LTC34 or LTC35 whichever is inactive The LTC33 compare value is never modified Therefore the duty cycle of 100 is not possible for this channel The 2nd channel is made of a single edge PWM object LTC36 and a single edge coherent update PWM object LTC37 amp LTC38 The duty cycle update is done by writing the new compare value to the shadow compare cells LTC37 or LTC38 whichever is inactive The LTC36 compare value is only updated in case the duty cycle is set to 100 In this case the compare value for LTC36 is set out of the timer range so that the compare event never occurs and the output remains set In order to reflect the update of the shadow registers on the PWM outputs the SO line of the timer must be toggled by a software request Note that once the request has been done no further modification to the compare values should be made before the SO line has been toggles In case this is not respected glitches or incorrect pulses might be produced on the output PS Period match Rm Reset timer GPTAG Duty cycle GPTA7 A i Coherent 1 j 4 update 1 gt SI Y i CHO GPTAG Ht I GPTA7 Figure 7 Coherent update PWM channels Application Note 19 V1 0 2008 08 ore AP32128 Infi neon PWM generation using the GPTA Application e
12. Application Note V1 0 August 2008 AP32128 TC1766 PWM generation using the GPTA Microcontrollers T Infineon Never stop thinking Edition 2008 11 17 Published by Infineon Technologies AG 81726 M nchen Germany Infineon Technologies AG 2008 All Rights Reserved LEGAL DISCLAIMER THE INFORMATION GIVEN IN THIS APPLICATION NOTE IS GIVEN AS A HINT FOR THE IMPLEMENTATION OF THE INFINEON TECHNOLOGIES COMPONENT ONLY AND SHALL NOT BE REGARDED AS ANY DESCRIPTION OR WARRANTY OF A CERTAIN FUNCTIONALITY CONDITION OR QUALITY OF THE INFINEON TECHNOLOGIES COMPONENT THE RECIPIENT OF THIS APPLICATION NOTE MUST VERIFY ANY FUNCTION DESCRIBED HEREIN IN THE REAL APPLICATION INFINEON TECHNOLOGIES HEREBY DISCLAIMS ANY AND ALL WARRANTIES AND LIABILITIES OF ANY KIND INCLUDING WITHOUT LIMITATION WARRANTIES OF NON INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS OF ANY THIRD PARTY WITH RESPECT TO ANY AND ALL INFORMATION GIVEN IN THIS APPLICATION NOTE Information For further information on technology delivery terms and conditions and prices please contact your nearest Infineon Technologies Office www infineon com Warnings Due to technical requirements components may contain dangerous substances For information on the types in question please contact your nearest Infineon Technologies Office Infineon Technologies Components may only be used in life support devices or systems with the express written approval of Infineon Technologie
13. ate PWM objects for the 3 top PWM channels LTC8 to LTC11 LTC16 to LTC19 and LTC24 to LTC27 e Three double edge coherent update PWM objects for the 3 bottom PWM channels LTC12 to LTC15 LTC20 to LTC23 and LTC28 to LTC31 When updating the duty cycles the channel shadow registers are updated for all 3 channels and then the software request to toggle the timer SO line is done Application Note 21 V1 0 2008 08 Infineon AP32128 PWM generation using the GPTA Application examples The PWM objects Period match ADC trigger Period center ADC trigger m ss cosa E Timer SI Dead time 1 CCO GPTA14 5 COUTO GPTAIS CC1 GPTAI6 COUT1 GPTA17 CC2 GPTA24 COUT2 GPTA25 Figure 8 Application Note 3 2 channels coherent update PWM 22 V1 0 2008 08 Infineon AP32128 PWM generation using the GPTA Application examples The PWM objects 6 4 2 Configuration summary Resource Configuration Info GPTA3 e Direction output Timer pin e Behavior Push pull ALT1 e Default High GPTA8 e Direction output Top GPTA17 e Behavior Push pull ALT1 PWM GPTA26 e Default Low GPTAQ e Direction output Bottom GPTA19 e Behavior Push pull ALT1 PWM GPTA27 e Default Low Mode Input Input Initial Default Action Output Interrupt sensitivity Value
14. ble to raise an interrupt on event and or forward the output signal to a port pin Level or edge sensitive In level sensitive mode the prescaler clock from the CDU can be used to reduce the timer frequency t Optional 5 Set reset toggle unchanged copy from previous cell Application Note 9 V1 0 2008 08 ar AP32128 Infi neon PWM generation using the GPTA Low level driver The basic GPTA objects 4 2 1 The reset timer cell The reset timer cell generates the timer value which is incremented on each input clock according to the selected sensitivity The timer value is propagated to the compare cell through the timer bus The reset timer cell has also the ability to toggle the timer Select Output line SO line in order to enable disable selected compare cells This is detailed later in the chapter 4 3 Coherent update Shadow register mode 4 2 2 The cells actions amp output signal Each cell including the reset timer cell has the possibility to modify the output signal by an action on event set reset or toggle Whereas the cascaded cell group includes the reset timer with all the compare cells linked to it see Figure 3 the signal cascaded cell group includes only the cells that are able to modify a given output signal by an action For the PWM application the 1 cell of a cascaded signal cell group will either set or reset the output signal whereas the next cells of the group will propagate or modify the ou
15. cribed below Every PWM generations are no more complex than such a modular assembly of basic objects an input clock a timer some compare cell for toggling the output pin having a defined PWM period and duty cycle value This application notes will describe and explain the different objects that can be implemented on the target microcontroller Note that the source code of the object described is available as a concrete example Anitialize reset Create PWM channel TS timer nitialize Period Compare Initialise Duty cylce compare Actor Set GPTA multiplexer Set pin configuration Connect Pin AL function pdate compare value Figure 2 PWM use case Application Note 8 V1 0 2008 08 AP32128 PWM generation using the GPTA Infineon Low level driver The basic GPTA objects 4 Low level driver The basic GPTA objects This appnote names the basic GPTA objects functionalities that are achieved using the simple GPTA elements like LTC GTC GT FPC DCM PDL digital PLL For the PWM generation of this application note only the LTC Timer reset and LTC Compare objects are used 4 1 The GPTA LTC modes The GPTA LTC is a flexible module that can operate in the following 4 modes Mode Description Trigger Event Action on event Free The timer is The timer reaches the e Raise interrupt running incremented by the overflow value OXFFFF Modify the LTC output timer sel
16. dingEdge Period Ton 2 Where e period is the period in ticks Period Frimer fewm with frimer the reset timer input frequency frimer fepta e Ton s the ON time of the PWM in ticks with Ton DutyCycle Period Application Note 20 V1 0 2008 08 ar AP32128 Infi neon PWM generation using the GPTA Application examples The PWM objects 6 3 4 API Mode API Brief description Reset timer Tier InitO Initialize the reset timer Initialization Channel eee ee Initialize a PWM channel initialization PWM update C Edsehligned Update Update the PWM duty cycle Pwm Cu EdgeAligned Off Set the PWM off Toggle the 7 zer UPdete Toggle the SO line after PWM update SO line For more details on each function see the software documentation 6 4 PWM 3 Center aligned 3 2 channels coherent update PWM multi channel PWM 6 4 1 Features This example implements 3 center aligned coherent update PWM channels with top and bottom PWM as used in inverter application The PWM has the following features e 2 3 PWM channels e Dead time generation e Variable duty cycle 0 100 coherent update for all 3 channels e Min pulse cancellation e Variable period coherent update For this a 29 LTC are used The PWM object is made of e APWM timer object LTC3 e Adouble edge coherent update PWM object for the period and period center signals LTC4 to LTC7 e Three double edge coherent upd
17. e example eiecti erneute nien e E han isani nane ER eet a De Ro ue annasan ERE ARA Ran RD 27 7 1 DOCUMENTATION scrucera ni edi ates i Aidala ean didi AN 27 7 2 s itirenegis arre 27 8 Abbreviations inertio eti indi a iiie iie ee E ee Eee iE 28 Application Note 4 V1 0 2008 08 et AP32128 Infi neon PWM generation using the GPTA Scope 1 Scope Dear Reader Thanks for using this PWM generation appnote This appnote will help you to implement simple to complex PWM on your TC 1766 target microcontroller This appnote aims to give an example on how to use and configure the GPTA s LTCs of the TC1766 microcontroller in order to generate PWMs The following PWM function will be implemented e PWM 1 Edge aligned basic PWM channels e PWM 2 Edge aligned coherent update PWM channels e PWM 3 Center aligned 3 2 channels coherent update PWM multi channel PWM for Inverter application e Interrupt generation Have fun with Infineon s PWM generation 1 1 Micro controller resources used e GPTA o Clock distribution unit o LTC Free running timer Compare o Input output Multiplexer o Alternate function This appnote do not aim to list all possible configuration suitable for the PWM generation using the GPTA Application Note 5 V1 0 2008 08 et AP32128 Infi neon PWM generation using the GPTA Setup 2 Setup 2 1 Needed material The following HW and SW material i
18. e flexible but requires a dedicated attention during the resource assignment phase One should care of the following e Check for the possible connection between the LTC and the output pin e Check that the number of the cascaded cell do not exceed the maximum allowed e Check the routing of the trigger signal to the output ports ADC DMA as required e Check the LTC interrupt source register in case interrupt are needed It is better if the service request control register is not shared between different interrupt sources faster handling because there is no need to check the interrupt source 6 2 PWM 1 Edge aligned basic PWM channels 6 2 1 Features This example implements two edge aligned basic PWM channels no coherent update For this a PWM timer object is used LTC40 followed by the 1 channel and the 2 channel The 1 channel is made of two single edge PWM object LTC41 amp LTC42 where LTC 41 is also used for the timer period match The duty cycle update is done by writing the new compare value directly to the active compare cells LTC42 The LTC41 compare value is never modified Therefore the duty cycle of 100 is not possible for this channel The 2nd channel is made of two single edge PWM object LTC43 amp LTC44 The duty cycle update is done by writing the new compare value directly to the active compare cells LTC44 The LTC43 compare value is only updated in case the duty cycle is set to 100 In this case the compare
19. ected input clock e Transfer the action request to the next and overflow as the LTC value OxFFFF is reached Reset The timer is The timer reaches the e Raise interrupt timer incremented by the overflow value OxFFFF Modify the LTC output selected input clock e Transfer the action request to the next and is reset to OxFFFF LTC by an event from the e Toggle the select line SO next LTC Capture The reference timer The capture event e Save the reference timer value value is copied to the occurs e Raise interrupt LTC value register on e Modify the LTC output capture event e Transfer the action request to the next LTC e Reset the previous LTC if configured as Reset timer Compare Compare with the The reference timer e Raise interrupt reference timer If matches the compare e Modify the LTC output enabled by the select value e Transfer the action request to the next line SI LTC e Reset the previous LTC if configured as Reset timer For more details on each mode see the TC1766 User Manual 4 2 Cascading the LTCs Cascading cells consist in grouping LTCs in order to produce complex output signals Applying the cell cascading method to the PWM generation leads to the following configuration A timer reset cell followed by m compare cells Any number of adjacent cells can be cascaded each cell having the ability to change the state of the output signal by an action like set reset or toggle Furthermore each cell is a
20. ght be generated in case the update timing is not respected Jitter of the No Jitter G Jitter may appear according to the output signal update method used Period Period is constant Period may vary according to the update method used Application Note 15 V1 0 2008 08 Infineon AP32128 PWM generation using the GPTA Driver The Basic PWM objects 5 3 API Mode API Brief description Timer ee ees Initialize a timer object cd i ee Transfer the shadow value Toggle SO line Single edge Pwm ChannellEdgee Tait Initialize a PWM channel with a configurable single edge Macer E Update the PWM channel single edges Single edge P chasseliEdge Init Initialize a PWM channel with a configurable single Coherent edge update a Update the PWM channel single edges Double edge Channel 2Edges Init Initialize a PWM channel with configurable leading and Coherent trailing edges Pwm Cu Channel2Edges Update m update r Update the PWM channel leading and trailing edges For more details on each function see the software documentation 11 Cu refers to Coherent Update API Application Note 16 V1 0 2008 08 et AP32128 Infi neon PWM generation using the GPTA Application examples The PWM objects 6 Application examples The PWM objects 6 1 General resource assignment check list The configuration of the PWM hardware is quit
21. itialization 3ChannelsCenterAligned Tnit Initialize the 3 channels center aligned PWM object Update Pwm Cu 3ChannelsCenterAligned Update Update the top and bottom PWM duty cycle of all 3 channels Pwm Cu 3ChannelsCenterAligned SetPeriodAndUpdate Set the PWM period and update the top and bottom PWM duty cycle of all 3 channels Pwm Cu 3ChannelsCenterAligned Off Switch off the PWM outputs Settings Pwm Cu 3ChannelsCenterAligned SetDeadTime Set the dead time Pwm Cu 3ChannelsCenterAligned SetMinPulse Set the min pulse Status Pwm Cu 3ChannelsCenterAligned GetPeriod Return the PWM period Pwn Cu 3ChannelsCenterAligned GetDeadTime Return the dead time Pwm Cu 3ChannelsCenterAligned GetMinPulse Return the time min pulse For more details on each function see the software documentation 13 Cu refers to Coherent Update API Application Note 26 V1 0 2008 08 Infineon AP32128 PWM generation using the GPTA 7 Source code example 7 1 Documentation Source code example The source code documentation can be found in HTML format see the file Doc html index html The documentation structure is as follow Tab Description Main page General information Module Structured source code documentation Data structures Information on data structures Files File description Note that the default configuration can be modified in the file configuration h
22. nal to a pin p p put Sig Multiplexer programming GE TA InitMultiplexerArrays Initialize the GPTA multiplexer GPT A ProgramMultiplexerArrays Program the GPTA multiplexer GPTA initialization GPT A InitializeClock Initialize the GPTA clock GP TAO ClockEnable Enable the GPTA clock For more details on each function see the software documentation Application Note 13 V1 0 2008 08 ar AP32128 Infi neon PWM generation using the GPTA Driver The Basic PWM objects 5 Driver The Basic PWM objects The PWM modular approach requires the definition of the basic PWM objects Those objects will be put together to build complete single to multi channel PWM object The basic PWM objects are the PWM timer the PWM channel single edge and the PWM channel double edge 5 1 The PWM objects Object Property Action on event Resources Timer e Counter e The internal counter is reset 1 LTC as reset timer e Input clock frequency e Interrupt generation 1 g 1 Single e Edge value e Interrupt generation 1 LTC as compare Edge e Output signal modification ms B LTC3 oO z c c koag S5 C O 2 LTCs as compare dll z 9 o O t o 6 Double e Leading edge value e Interrupt generation Edge e Trailing edge value e Output signal modification 5 2 O Qo t c U o8 C 2 t o o gen 82 st is 2 m t i o 2 o S pe 5 a LIC
23. o included in the signal cascaded cell group Application Note 10 V1 0 2008 08 et AP32128 Infi neon PWM generation using the GPTA Low level driver The basic GPTA objects cell n 3 is routed to GPTAx pin The group of cells n 4 to n m is an other semi independent more complex signal cascaded cell group made of m 3 cell and using the GPTAy output The PWM is semi independent because the period is the same for all the channels but the duty cycle is totally independent The Figure 4 shows the produced output using the configuration described in the Figure 3 for the LTC n to n 3 only The period is set to 160 the leading edge to 40 and the trailing edge to 120 which produce a center aligned PWM with a duty cycle of 5096 Set Output on event 40 Compare Reset output on event or cop Figure 4 LTC cascading output example Application Note 11 V1 0 2008 08 et AP32128 Infi neon PWM generation using the GPTA Low level driver The basic GPTA objects 4 3 Coherent update Shadow register The coherent update or shadow register method consist of using two LTC compare objects for a single signal edges Either the 1 or the 2 LTC compare object is active at a time As the timer is reset the inactive cell is made active and the active one is made inactive simultaneously by toggling the timer Select Output line SO line This method ensures a coherent and synchronous update of all PWM edges and or channel
24. s if a failure of such components can reasonably be expected to cause the failure of that life support device or system or to affect the safety or effectiveness of that device or system Life support devices or systems are intended to be implanted in the human body or to support and or maintain and sustain and or protect human life If they fail it is reasonable to assume that the health of the user or other persons may be endangered er AP32128 Infi neon PWM generation using the GPTA AP32128 Revision History 2008 08 V1 0 Previous Version none Author Alann Denais Page Subjects major changes since last revision We Listen to Your Comments Any information within this document that you feel is wrong unclear or missing at all Your feedback will help us to continuously improve the quality of this document Please send your proposal including a reference to this document to lt mcdocu comments infineon com Application Note 3 V1 0 2008 08 AP32128 um Infi neon PWM generation using the GPTA Table of Contents Page 1 SCODC wise setae sce cesvcnse deweti iu desi vanan a E E E E E E 5 1 1 Micro controller resources Used encinares eerte dauert et aad tane didtur ee sd au E Ve UE s 5 2 CDD EE 6 2 1 Needed material eoe tacent Ronan eo Rea ER RR HR VOR ea TAS nKRR CR PER ERN IR RAR TE XR RENE Kara 6 2 2 Ihren ccm E
25. s in case of multi channels PWM me Period match tiaa e aa N Resettimer _ GPTAG Duty cycle GPTA7 i 1 Coherent f update i M MN Timer it y ia SI T gt 7j CHO GPTAG re ial D CH1 GPTA7 Figure 5 Single edge coherent update The Figure 5 shows an example of an edge aligned PWM configured as follow e 1 cell Reset timer cell e 2 cell Period match compare cell that resets the timer and the output signal training edge on event e 3 and 4 cells Coherent update for the leading edge rising edge Both cells are configured as compare cells but the 3 LTC is enabled on SI High and the 4 LTC is enabled on SI low A software request will toggle the SO line of the reset timer on the next timer event e The 5 to 7 cells are configured as the 2 to 4 cells except that the 5 cell does not have any effect on the timer period 4 4 Connecting the input clock The timer input clock is connected using the GPTA multiplexer See the GPTA user manual for more details 4 5 Connecting to output pin The LTC output is connected to the port pin using the GPTA multiplexer and the port alternate function See the GPTA user manual for more details 8 The reset timer Select Output line SO line is connected to the next compare cells Select Input line SI line i Setting the bits LTCCTR CUD and LTCCTR CUDCLR of the timer simultaneously will request the toggling
26. s required to run the application example e APC with local administration rights e A functional TC1766 TriBoard with 15Mhz quartz incl cables power supply e Adebugger supporting TC1766 e Anoscilloscope e The PWM source code and executable included in this package e Optional Tasking VX toolset for TriCore v2 5 It is strongly recommended to have the Tasking toolchain installed and running on the PC where the PWM software is running so that the PMW s default parameters can be changed recompilation needed For more information about the toolchain please visit www tasking com The PWM software delivered with this application note is made of e Source code e Executable files elf and hex e Tasking projects file for the toolchain v2 5 2 2 Installation steps It is assumed that the user knows how to operate the different tools mentioned above Compiler Debugger TriBoard etc The following steps may be followed to install operate the PWM application e Install all the needed SW tools Tasking toolchain debugger e Connect a TriBoard to the debugger e Connect an scope probe to the required PWM outputs o PWM 1 pins GPTA8 and GPTA9 o PWM 2 pins GPTA6 and GPTA7 o PWM 3 pins GPTA14 GPTA15 GPTA16 GPTA17 GPTA24 GPTA25 and GPTA3 for the center signal e Build the project e Start a debugger session e Run the program and look for the global variable system The structure members system Pwm l DutyCycle
27. ssssssssssssssseseeeeeeen eene nnn 15 5 3 aN a 16 6 Application examples The PWM objects nasssssnuunnnenunnnnunnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnn nnmnnn 17 6 1 General resource assignment check list nennen 17 6 2 PWM 1 Edge aligned basic PWM channels ses een emen 17 6 2 1 Feature Sia 17 6 2 2 Configuration Summa neretai iia ater hz iaa p Rae a arae e dente vine aires 18 6 2 3 Duty Cycle formula cn teenie aria weet aah nea eee aac an e YR e e adios 18 6 2 4 APIs ctetu ite iade Madre ient faa gh ide uy nbacdaan yd ee statu Ao ane DL ED td 19 6 3 PWM 2 Edge aligned coherent update PWM channels see 19 6 3 1 Features 3320 EE 19 6 3 2 Configuration SUMMARY essersi aveteecaashe dda erre eee de e eren ee abc cea E euh rtc det cere dele 20 6 3 3 Duty cycle formula cedente die etre ael Leer pr doe de aetna eae 20 6 3 4 APIS Cee REDE reer Moo eU LL ELLEN IID LIMEN I PL EM IURE 21 6 4 PWM 3 Center aligned 3 2 channels coherent update PWM multi channel PWM 21 6 4 1 HIillIf M EE 21 6 4 2 Configuration Summa vedere rcc der rcnt erede da eae e nh pcc de doceat e deese git da crie euh deeds 23 6 4 3 Duty cycle formula and output example sssssseseeeenee nennen nnnm enne 24 6 4 4 AP Iesus cts petes um Ln Le LL MM LII UL M ME DINEM DEM an 26 7 Source cod
28. tput signal An action done by a cell N is always overwritten by an action done by the cell N 1 in case the actions occur simultaneously The last cell of the cascaded signal group is used to output the PWM signal to a port pin f m Timer Action wo Timer a LTCn period FL al Compare Register Action V LTC n 1 Compare Register Action 2 signal LTC n 2 5 ol S cascaded 3 g LTCs a m 1 cascaded pet RET WES Dx GPTAx LTCs egister ction lt LTC n 3 4 Compare Register Action LTC n 4 m 3 signal Celio a cascaded Register Action Tcs lt LTC n IN i 1 oi 1 ot 1 i 1 l Compare GPTAy Register Action is LTC n m i Figure 3 LTC cascading The Figure 3 shows m 1 cascaded cells referring to the same reset timer cell n The cell n 1 is a compare cell which reset the previous timer cell n on period match The cell n 2 and n 3 is a signal cascaded cell group made of 2 cells where the action of the cell n 2 is only propagated to the cell n 3 The output of the On the TC1766 the number of cascaded cell is limited according to ratio fsys fepta With fsysz80MHz for 1 lt fsys fepta 2 max 20 LTCs for 2 lt fsys fepta lt 3 max 40 LTCs for 3s fsys fepta No limits 7 In case the reset timer modifies the output signal the reset timer is als
29. utput have 4 ticks high and 4 ticks low The bottom output is reset at t O and set at t 6 A dead time of 1 tick have been inserted e For dc 12 5 the output is set for 1 tick only at t 2 The bottom output is reset at t2 1 and set at t 4 A dead time of 1 tick have been inserted Timer Value 7 6 X 5 X 4 X 3 2 i 0 i X Timer output dc Ton Lead Trail Leading Trailing ing ing formula formula value value 50 4 6 2 que T 2 2 1 Channel output dc Ton Lead Trail Leading Trailing ing ing formula formula value value 0 0 3 3 Top tropLeadingEdge tropTrailingEdge 3 3 Bottom tBottomLeadingEdge tBottomTrailingEdge 100 8 i J Top tropLeadingEdge tropTrailingEdge Ei Bottom tBottomLeadingEdge tBottomTrailingEdge 50 4 d 5 Top tropLeadingEdge tropTrailingEdge 0 6 Bottom tBottomLeadingEdge tBottomTrailingEdge 12 5 1 2 3 Top tropLeadingEdge tropTrailingEdge 1 4 Bottom BottomLeadingEdge BottomTrailingEdge t dingEd t ilingEd Legend High Low High overwritten by low Low overwritten by High 12 Duty cycle Application Note 25 V1 0 2008 08 Infineon AP32128 PWM generation using the GPTA Application examples The PWM objects 6 4 4 API Mode API Brief description In
30. xamples The PWM objects 6 3 2 Configuration summary Resource Configuration Info GPTA6 e Direction output CHO e Behavior Push pull ALT1 e Default Low GPTA7 e Direction output CH1 e Behavior Push pull ALT1 e Default Low Mode Input Input Initial Default Action Output Interrupt sensitivity Value SO line event Mode Input Input Initial SI Action Output Interrupt sensitivity Value enable on event y state LTC33 compare Period 2 Always Reset No No LTC34 compare OxFFFE High Copy or No No Set LTC35 conp EIS oes OxFFFE Low Copy or GPTA6 No Set LTC36 compare OxFFFE Always Reset No No LTC37 compare OxFFFE High Copy or No No Set LTC38 Compare OxFFFE Low Copy or GPTA7 No Set 6 3 3 Duty cycle formula Find below the pseudo code used for the leading and trailing edge computation tTrailingEdge Period 2 if Ton 0 0 gt 2nd compare never occurs 1st edge tLeadingEdge OxFFFE else if Ton gt Period 100 gt 2nd compare lst edge overwrite the lst compare 2nd edge if Channel gt FirstCell Channel gt Timer gt Cell 1 The channel is allowed for 100 tLeadingEdge Period 2 tTrailingEdge Period 1 else The channel is not allowed for 100 tLeadingEdge OxFFFF else x gt 1 lt compare value lt Period 3 tLea
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