NCV7240 Octal Low-Side Relay Driver Evaluation Board User`s
Contents
1. NCV7240EVB Bill of Materials NCV7240 Evaluation Board Reference Designator s C1 thru C15 C20 C22 C23 C18 C19 Di thru D11 Ji J2 J10 thru 123 125 126 J27 130 J3 thru 39 132 324 J2B 129 131 M1 Ri R12 thru R19 R24 R25 R2 R3 R5 thru R11 R4 R20 R21 R22 R23 R26 ui uz U3 U4 us Ub U7 Substitution RoHS Quanti Description Value Tolerance Footprint Manufacturer Manufacturer s Part Number any m P Allowed Compliant CAP CER 1UF 50V 10 m Murata Electronics T m CAP CER 22UF 16V X5R 1205 Murata Electronics CRM31CR61C226ME15L Nor Lh Arnerita LED GREEN CLEAR THIN a Se i TEST POINT PC MULTI 7 MEUS MO So ele pE nen wn o CONN E 0 100 CHECA as 22 28 4024 E SE RES 0 0 em 1 8W 0805 NIE CRCWDOBDS5ODDOZOEA E REN TES CIAO uan m AAA NK MEME io RN SE wle melon men NER K iain OCTAL D IC REG p 400M ADI D ME DPAKS ON Semiconductor NCV4276BDTADJRKG EAE IC RES 10 ov add WA NAU DPAK3 ON Semiconductor NCV4274ADTSORKG www BD t lt ctom ON NCV7240EVB EVALUATION BOARD LAYOUT r i m r F r y 4 1 i a a y t y yr ae FF d a ig TS UE LUN j ys ay Fo Ma a Joi r J y md y 3 r syn AH 2 y at a j y FF um EA i 5 ES T 2 t UI r y y y En j all ua a r a 2d I ESI y r d 3 Tm f d gan PN ACE a Y Wa o i Ur i an Ne ia qe n fu E or NM IAS O Fy ie i aora ral i r2. to the LDOs when the jumper is disconnected J29 J29 disconnects VDD supply from the LDO to the board When the jumper is disconnected the board can be powered from an external supply J31 J31 disconnects VDDA supply from the LDO to the board When the jumper is disconnected the board can be powered from an external supply www BD FT com ON NCV7240EVB OPERATIONAL GUIDELINES The material necessary to successfully use the evaluation boards is listed below PC running the latest Onsemi FlexMOS GUI USB cable Type A to Type B USB to SPI Interface Adapter with Ribbon Cable NCV7240 Evaluation Board Power Supply Resistive LED Inductive or Motor Load An application example of the NCV7240 driving relays is shown in Figure 3 Figure 3 shows J28 J29 and J31 jumpers inserted This powers the on board LDO regulators for VDD and VDDA Both VDD and VDDA light their respective LED D10 and D11 when powered The multiple VBAT connectors on the terminal blocks help the user connect loads in the system by providing a connection which provides capability for two wires per terminal site When VBAT voltage is applied to the board the onboard regulator regulates the VDD voltage By default VCC is regulated to 3 3 V but this can be adjusted to 5 V via the GUI VCC power to the board is provided via VDDA through R20 and is shown active with diode D2 14 Lay o o e o
3. 6 bit minimum is reported on the SO pin after CSB goes low until the first rising edge of SCLK Detection can be performed by clicking on the TER button in the GUI since SI is OR d with the TER fault it is important to understand that if the LSB bit BO is set high on the previous frame the TER should be ignored This is because SI holds the value of BO until the first SCLK rising edge and TER is latched in before the first rising edge of SCLK C10 Figure 6 Evaluation Board DUT www BD FT com ON NCV7240EVB 0Ohm R5 0Ohm R6 0Ohm R9 Vcc 0Ohm R8 0Ohm R7 0Ohm R10 g U4 0Ohm R11 MM74HC573 SOEIAJ 311 e 1 INI 2 19 J12 IN2 3 J14 IN3 i J13 eg T IN4 5 J17 EN 6 J16 e LHI 2 J15 CSB 8 13 O 9 12 Vcc 11 1 J23 O 1 VCC USB 24 23 VTRGT SS ao 0 T PI2 8 J26 TERK 19 PH 1 027 LHI LHI 11 EN EN re IN1 0 9 IN2 m Yee lt LEN 7 N3 INS PO6 6 PS NA Na 4 SDA Z 1 T Sx Vcc VDDA R20 i id 0Ohm U5 AT24C01A VCC USB C1 0 1 Figure 7 Evaluation Board Interface JUMPER VBAT C 028 o VIN C15 C16 100nF 1uF R22 14 7k V5 EN m ULEN X MGSF1NO2LT1 J30 O 1 U7 NCV4274 JUMPER 1 3 1 451 o2 C20 C21 100nF 1uF C19 D11 ons UP a LED 7 7 EN Figure 8 Evaluation Board Power C13 0 1uF D3 LED D2 LED rd xe Q_CSB Q_VCC J18 J19 J20 J22 J25 OOOOO JUMPER VDD 1 29 92 C18 22uF D10 LED XX VDDA www BD FI com ON
4. E G USB to SPI Interface 4 22 t2 z0r c500565 9 9 SS 6 26 232 6 2306 237230325 Geo Adapter o gt gt 5020 gt o o gt O Om P M t E e e je s cn e o VS N Y ne ON Semlconductor key wu 0 mm t IN SPland I O 2 mo P Ri 07 ind nterface wale an ond E ee a e n u RM os INA piis m on 2 _ R5 05 EN cn cu z pae CD e 5 OS gu pe LHI CH Ri nie J vus e a Fa amo csa s 1 sp Activity Version 2 0 1 GZ nb ml NCV7240 Target Boord Rev 100 02 09 12 CSB SCLK Si SO GNO v 9 e us CNO INI N2 INJ I4 ev 9 9 9 Figure 3 Application Example Once the hardware is configured with the desired load and is interfaced with the USB to SPI adapter the user can launch the FlexMOS software Once the software is running the GUI should automatically identify the connected demonstration board and load the appropriate GUI interface for the low side drivers If the software doesn t recognize the connected demonstration board manually select the device from the drop down box If the device name doesn t appear in the drop down box the latest version of the GUI needs to be installed on the PC A detailed description of the GUI functionality for the NCV7240 is shown in Figure 4 The FlexMOS GUI is used to enable or disable the device and to control the low side driver outputs www BD FT com ON NCV7240EVB ioi xi Now evaluating NCV7240 Octal Low Side Relay Driver
5. NCV7240EVB NCV7240 Octal Low Side Relay Driver Evaluation Board User s Manual ON Semiconductor http onsemi com EVAL BOARD USER S MANUAL Description Features 8 Channels 600 mA Low Side Drivers Programmable Logic Supply Voltage 16 bit SPI Control Over Load and Over Temperature Protection The NCV7240 evaluation board provides a convenient method to evaluate the NCV7240 octal low side driver in a customer defined application environment The setup involves the use of a PC installed with custom designed software an interface board and the NCV7240 evaluation board The evaluation board is controlled using the ON Semiconductor FlexMOS GUI installed on a selectable Open Load Detection for LED Loads personal computer PC The USB to SPI interface adapter Dedicated GUI Interface for Device Control and board provides master slave communication between the Diagnostic target demonstration board and the PC The user can control each of the eight low side outputs independently using this system setup The evaluation board s power management includes an adjustable LDO giving the option for a 3 3 V or 5 V digital supply voltage VCC selectable through the GUI An external power supply can be used by removing a jumper on the board Visual indicators dictate the board configuration through LEDs Interface Connector po USB2SPI Target Board Adapter Figure 1 Evaluation Board Solution Semiconductor Compon i 1 bl catio
6. SPI Clock Freq 125 y kHz Note not all frequencies are exactly possible nearest will be used SPI Device Not Available NCV7240 Channel 1 Channel 2 Channel 3 Channel 4 Channel 5 Channel 6 Channel 7 Channel 8 ON ON ON C ON ON C ON C ON C ON C OFF C OFF OFF C OFF OFF C OFF C OFF C OFF C INPUT C INPUT C INPUT C INPUT C INPUT C INPUT INPUT INPUT STDBY STDBY STDBY STDBY STDBY STDBY STDBY STDBY IEEE Update mode Vcc Mode Frame Detection Manual Auto Polling CIN Cw Update Al ON Global OFF AI INPUT Global STDBY TER Show auto generated events About this Software Exit Low Side Drive Channel Control Frame Detection Allows independent control of each low side driver Displays results from TER or SPI command equivalent Output Status SPI Traffic Displaysthe current status of each low side driver Log of SPI commands send and received Compiled SPI Frame Push Button Control Compiled SPI frame based on the Control Input Update Transmits the compiled SPI Frame to the slave device AIION Turns all 8 low side drivers on GlobalOff Turns all 8 low side drivers off GUI Update Mode All INPUT Configures IN1 IN4 active Manual User must press Update button for any changes Global STDY All outputs off made to Low Side Channel Control to take effect Open circuit diagnostic currents off Auto When the Low Side Channel Control is changed the TER Retrieves Tr
7. ansmission Error information Update button is automatically triggered Displayed in Frame Detection box Polling the Low side Channel Control is updated periodically ata predefined interval This will show a constant flow of data in the SPI Traffic box Check Box Control Enable Device Enables or disables the integrated driver Limp Home Activates channels 1 4 as per the datasheet INx Parallel input pair control See datasheet for details z VCC Mode Programs the onboard LDO for either 3 3V or 5V Figure 4 GUI Overview www BD ftf com ON NCV7240EVB TYPICAL CHARACTERISTICS Tek Run 50 0kS s Sample a NUN acenc iie PN EN C1 Max 38 2 V Figure 5 Typical Output Clamping Action Typical Operation Figure 5 above highlights the clamping action clamped to 38 2 V of the NCV7240 as the device turns off when driving an inductive load In this case a relay has turned off The slight hump in the decaying waveform is caused from the mechanical relay action of the system Transmission Error TER The NCV7240 device includes a transmission error detection feature whereby a transmission error bit count not VDDA J2 qe J8 2 JOSTPWR E IFE 12 C11 0 1uF U3 CSB 1 IN VCC GND enn NC OUT 2 Ohm NL17SH04 C23 c3 C4 C5 C6 C7 C8 C9 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF gt Opt Opt Opt Opt Opt Opt Opt Opt a multiple of 8 1
8. i Tr T n y i Paare 4 ra yas g Fy a Fn C d Y TP Fd le y y 5 J i sj am Foll aan gt a i r y r F i a el M A Lt E T F e a 2 ad J F 7 PD p m ru y Corsa utet r r Par ot i SURE n Pal tane i i l j j i Ko y Y aa p r ry 1 o y Di yog oe ees FNI ENI ZNI INI QN ma a LLLA vc e9 9 UNO 05 5 WIS 85 21 60 20 00 way poog 396101 QyZ AON fi DENT W fio E sp LIT 5 4 Y Me 5 B n nbr 9 9 9 9 SE SE SE E o Figure 10 Top Copper Figure 9 Silk Screen amp Drill Holes Figure 12 Board Composite Figure 11 Bottom Copper NCV7240EVB ON Semiconductor and WwW are registered trademarks of Semiconductor Components Industries LLC SCILLC SCILLC reserves the right to make changes without further notice to any products herein SCILLC makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does SCILLC assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation special consequential or incidental damages Typical parameters which may be provided in SCILLC data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer applicat
9. ion by customer s technical experts SCILLC does not convey any license under its patent rights nor the rights of others SCILLC products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application Buyer shall indemnify and hold SCILLC and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part SCILLC is an Equal Opportunity Affirmative Action Employer This literature is subject to all applicable copyright laws and is not for resale in any manner PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT N American Technical Support 800 282 9855 Toll Free ON Semiconductor Website www onsemi com Literature Distribution Center for ON Semiconductor USA Canada P O Box 5163 Denver Colorado 80217 USA Europe Middle East and Africa Technical Support Order Literature http www o
10. n Order Number April 2012 Rev WWW e CO m EVBUM2052 D NCV7240EVB Supply Input Low Side Outputs Ground vw v e e o o 09 09 09 9 9 9 9 9 9 9 Q amp fm oW m B3 om cm cm G 69 98 5552555555255 25 95 e gt 0 005 05095 5 p o e e a je Con hee s5 e oo 5 e o ON Semiconductor A a S M cu z eo t 5 ran nm S 76 n 3 LT 124 T TR na 2 ns x le EM S ao en cd IC y Z yd rac LM ee F mo css se v U S8 cs ca m9 02 vee a ta e NCV7240 Torget Boord Rev 100 02 09 12 ax 0 COO GO m N Mi NM TestPoints LED Indicators Supply Disconnect Figure 2 Evaluation Board Table 1 ABSOLUTE MAXIMUM RATINGS tng a CTA Main Supply Voltage to output pins OUTx 0 3 to 36 USB to SPI Interface Adapter Connector Pins 0 5 to 5 5 Junction Temperature NCV7240 40 to 150 E GN Ambient Temperature Evaluation board 40 to 105 ME Stresses exceeding Maximum Ratings may damage the device Maximum Ratings are stress ratings only Functional operation above the Recommended Operating Conditions is not implied Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability Table 2 RECOMMENDED OPERATING CONDITIONS anw wm www BD FT com ON NCV7240EVB Table 3 PIN FUNCTION DESCRIPTION connector Plumber Temane Demon ooo BEU eaeoe 8 rra Purpose Opt se orconotingtie LDO roles ne aera P
11. nsemi com orderlit Phone 303 675 2175 or 800 344 3860 Toll Free USA Canada Phone 421 33 790 2910 Fax 303 675 2176 or 800 344 3867 Toll Free USA Canada Japan Customer Focus Center For additional information please contact your local Email orderlit onsemi com Phone 81 3 5817 1050 Sales Representative www BDTIC com ON m
12. urpose Out 3 sed opr onto of UTZ an OUTS 3 era pose po Ok 24 VCC USB 5 V USB voltage from the USB to SPI adapter board to the evaluation board 100 mA max Supply DEED VBAT Main Supply Voltage Powers the NCV7240 drivers and the onboard LDO Hequirement EE m 00000000000 Low Side DEED OUT1 Low Side Output 1 Driver Outputs DEM OUT2 Low Side Output 2 DEED OUT3 Low Side Output 3 DEED OUT5 Low Side Output 5 DEED OUT6 Low Side Output 6 EE OUT8 Low Side Output 8 www BD FT com ON NCV7240EVB Table 3 PIN FUNCTION DESCRIPTION comes wm asain O Test Points amp LED Indicator Supply Disconnect IN1 Parallel input 1 used for parallel control of OUT1 and OUT5 An LED is illuminated when the pin is high IN2 Parallel input 2 used for parallel control of OUT2 and OUT6 An LED is illuminated when the pin is high IN3 Parallel input 3 used for parallel control of OUT3 and OUT7 An LED is illuminated when the pin is high IN4 Parallel input 4 used for parallel control of OUT4 and OUT8 An LED is illuminated when the pin is high CSB Chip Select Bar signal produced by the master CSB LED is illuminated when CSB transition to a low state SCLK Serial clock signal generated by the master Serial input data from the master Serial output data from the slave Digital Supply voltage VCC LED is illuminated when the LDO is regulating Chip Ground J28 J28 disconnects the VBAT supply from the board No power is delivered
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