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1. I m gt j c AJ m Uu Isolated Signal Generator R3485 422 232 T TL The Problem You ve designed a power supply you want to check it s stable on your board under load and you really want to ASCA2AT IBS485HV know whatthe low frequency gain margin is But your isolation transformer is only good down to 20 Hz What to do The Solution RS232 lt gt RS485 ATE Converter 5 Port Isolated RS485 Repeater 3x k A Tracer Chan A M1 0 Gain M2 0 Phase FRA FOM 0 4 Use a Cleverscope Amplitude 35 79 G dB 60 07 De 12 94 G dB Slo 23 50 E now sro ERES E eror with our new C3701 45 00 board only Enclosures Cables mum source BERI isolated signal Power Supplies and Other Divisions Gain 10 00 G dB Phase 25 00 Deg Freq 10 ce Hz Frequency Span Sz Nc Frequency Res 7st SM generator to do your Eo Accessories 50 0 unis 250 in circuit Frequency m i 10 0 Dag aseud 10 0 100 1k 10k 100k 200k Freq Hz even on mains power Multi Repeaters supplies Check out Videos and White Papers at www cleverscope com fra Em o Response Analysis Bi See INTRODUCING THE SMFCONX 30 0 dis You can go all the 20 0 from DC up to 65 CLP Mii MS Extended Distance Units MHz With 300V RMS isolation inject your Converters e Serial to Digital fe 20 0 EIE ded NT EE TE iti 2 5A out erm e the feedback path 7 Hepeaters Large Multi Drop Networks
2. Management Data Input Output User Diagram Protocol Wireshark free network protocol analyzer www wireshark org SOURCES 88E1111 Ultra gigabit Ethernet transceiver Marvell Technology Group Ltd www marvell com LabVIEW Software National Instruments Corp www ni com TE0600 FPGA Micromodule Trenz Electronic GmbH www trenz electronic com Tri Mode Ethernet Media Access Controller TEMAC core AXI Ethernet Lite MAC Embed ded Development Kit EDK and Spartan 6 LX FPGA Xilinx Inc www xilinx com The host interface is used to access the register to manipulate the core When CSB is low and WRB is high then a read operation occurs and CA specifies the register s address see Resources for documentation about the tri state MAC During the next rising edge of Clk_reg the value is written to CD If CSB and WRB are both low a write operation occurs SPECIFIC DETAILS It is necessary to use an ODDR2 on the Spartan 6 platform to drive the Ethernet TX CLK pin Otherwise an error during implementation will occur because a clock network should not drive an output pin Note ChipScope is a powerful tool to use during debugging but sometimes the signals are not available due to trimming This can be prevented by defining the save attribute attribute save string attribute save of sig TRUE signal is The speed register which is located at 7 d034 usually has a 16
3. QUIPMER i dE e y El Em m n Wr s Ex p WI WIES m lll Wha 3f el A Ire ll Mir PL ios Jb E ll Jk i LR Nl G x Per Ls Phone 618 529 4525 Fax ee 457 0110 Web www emacinc com 58 o z l o oO CIRCUIT CELLAR DECEMBER 2013 281 THE DARKER SIDE FIGURE 1 An amplifier is a simple concept but there are plenty of options to implement it From A to H Amplifier Classes What is an amplifier and how can you choose the right class type for your application This article defines amplifiers and describes different classes to help you find the best combination of performance efficiency and cost for your design By Robert Lacoste France elcome back to the Darker Side In my last article I explained how to wire a simple bipolar transistor to build an amplifier Bipolar Transistor Biasing Circuit Cellar 279 Even if I didn t state it explicitly these amplifiers were part of the so called Class A amplifiers If you are an audiophile you know there are plenty of other amplifier classes They are identified by a long list of letters including the common A AB B and D but also more exotic letters including G H and even T Their advantages and pitfalls are commonly discussed amongst audio geeks Try to Google best audio amplifier class and you will receive more than 39 million answers Of course amplifiers are used for more than just audio applications Innovat
4. CLASS C Rather that continuing to talk about audio amplifier with Class D I found it more fun to follow the alphabet Now I ll discuss Class C amplifiers see Figure 4 There isn t any Class C audio amplifier This class is devoted to RF amplifiers Why This is because a Class C amplifier is highly nonlinear How can it be of any use An RF signal is composed of a high frequency carrier with some modulation The resulting signal is often quite narrow in terms of frequency range Moreover a large class of RF modulations doesn t modify the carrier signal s amplitude For example with a frequency or a phase modulation the carrier peak to peak voltage is always stable In such a case it is possible to use a nonlinear amplifier and a simple band pass filter to recover the signal Class C amplifiers go one step further than Class B amplifiers With Class A the transistor always conducts with Class B it conducts half of the time and with Class C the transistor conducts only a small percentage of the time i e when the input voltage is close to its peak The voltage on the transistor s collector is then sharply dropped one time per period As illustrated this signal then has high amplitude and the same frequency as the input signal However it is far from a clean sine signal A proper band pass or low pass filter can recover the desired amplified signal As you may imagine designing a properly working Class C amplifie
5. o oO CIRCUIT CELLAR DECEMBER 2013 281 Signal Name FT311D Pin Number 1 0 Type Description I2C CLK 23 O I2C Clock I2C Data 24 IO I C Data TABLE 5 Two signals are used in I2C mode TABLE 6 This is the command byte structure of the available I2C commands TABLE 7 Five signals are used in UART mode TABLE 8 This is the command byte structure of the available UART commands Command Byte 1 the application may use the ResetPort command The PWM interface consists of four PWM output signals which have period and duty cycle parameters see Table 3 There are three PWM commands each uses a four byte command format SetPeriod SetDutyCycle and Reset see Table 4 SetPeriod enables the application to define each GPIO bit s function SetDutyCycle is sent to the application any time an input changes state on the interface Should the GPIO interface need to be reset and configured as all inputs the application may use the Reset command The I2C interface uses two signals clock and data see Table 5 There are four I2C commands each uses a multi byte command format SetFrequency WritePort ReadPort and Reset see Table 6 The application used SetFrequency to define the I2C clock output s byte timing WritePort enables the application to write a number of Command Byte1 Byte 2 Frequency in SetFrequency 0x31 kilohertz 23 44 60 and 92 WriteData 0x32 7 bit address WriteData 0x32 7 bit a
6. Taiwan Semiconductor Manufacturing Company Ltd www tsmc com Toshiba Corp www toshiba com SOURCES FM28V100 and FM6124 QG FRAM Cypress Semiconductor Corp www cypress com EMD3D064M MRAM Everspin Technologies Inc www everspin com MSP430FR5969 Wolverine mixed signal microcontroller Texas Instruments Inc www ti com conferences ReRAM s impressive performance metrics are serving to bolster the development of this memory technology We are certain to see ReRAM ICs becoming widely available two to three years from now THE WINNING TECHNOLOGY A multitude of new memory technologies are vying for influence Which one or two will emerge as commercially successful products The answer is not clear despite manufacturers arguing strongly in favor of their respective products To be commercially viable any technology needs to meet a set of stringent requirements that include widespread availability and reasonably low cost In the case of memory technologies another important requirement is availability at high storage densities This is where most new memory technologies tend to struggle Memory densities rise incrementally so it takes many years before a memory type matures enough to be commercially available as a large capacity chip What is clear is that some if not all of the memory technologies examined in this article will become mainstream in upcoming years Anticipating their emergence Table 1 compar
7. amo w Behavioral Hierarchy 7 9 selected design unit s Hardware Co Simulation pr oper bes Hierarchy tegor change the uni a s Cakeoory Use this to Nus 3 x6sb9 2cs a i rtc I CA rs 7 fetu t fp fond DegnView Soe ae EY LL Hardware Co Simulation Value Ta fp ffttb tb fp fft tb vhd _ 1 oD D D a Pro erty Name tb a fft ipcore New Source Include File References P z DT dui fp fft top fp fft 14 fft core fft core ip g Add Source Enable Hardware Co Simulation J ffi core fft core ipo Clock Port ltopack 1 Y No Processes Running Of Find si Target Board for Hardware Co Sim LX9 TAG p es dut fp fft top 3 Design Properties Enable Incremental Implementation rocesses dut fp ft 3 yy ISim Simulator P Source Properties 2 Behavioral Check Syntax TT ox PIC Simulate Behavicral Model download parameters run the operation and upload results back to the computer may be much faster than running the simulation on the computer I think HCS s more interesting use is where your hardware interfaces to the real world Perhaps you are using the memory controller block or a Xilinx PCI Express block in the FPGA and want to test your code with the exact external hardware The example I ll use builds on a simple serial block where the serial blocks are connected to a real hardware serial port A specific example of this may be when you are designing a serial protocol Y
8. 80 LL cc _ Libs LLJ p H p Q Lid CIRCUIT CELLAR DECEMBER 2013 281 Can anyone deny that we re on the verge of major breakthroughs in the fields of embedded development microcomputing wireless communications and robot design Tech the Future is a section devoted to the ideas and stories of innovators who are developing the groundbreaking technologies of tomorrow Low Cost SBCs By Kyle Granat Kyle Granat is a hardware engineer at Trossen Robotics headquarted in Downers Grove IL Kyle graduated from Purdue University with a degree in Computer Engineering Kyle who lives in Valparaiso IN specializes in embedded system design and is dedicated to STEM education A Raspberry Pi controls this robotic rover Could Revolutionize Robotics Education For my entire life my mother has been a technology trainer for various educational institutions so it s probably no surprise that I ended up as an engineer with a passion for STEM education When I heard about the Raspberry Pi a diminutive 25 computer my thoughts immediately turned to creating low cost mobile computing labs These labs could be easily and quickly loaded with a variety of programming environments walking students through a step by step curriculum to teach them about computer hardware and software However my time in the robotics field has made me realize that this endeavor could be so much more than
9. A Class D amplifier is a type of digital amplifier b The comparator s output is a PWM signal which is amplified by a pair of low loss digital switches All the magic happens in the output filter Have a look at the Class B schematic shown in Figure 3 If you slightly change the transistor s biasing it will enable a small current to continuously flow through the transistors when no input is present This current is not as high as what s needed for a Class A amplifier However this current would ensure that there will be a small overall current around zero crossing Only one transistor conducts when the Keil MDK ARM MDK ARM is the complete development environment for ARM Cortex M series microcontrollers CAN Interface File System USB Host USB Device TCP IP Networking GUI Library www keil com mdk 49 89 456040 20 ARM Ltd AD366 01 13 input signal has a high enough voltage positive or negative but both will conduct around 0 V Therefore a Class AB amplifier s efficiency is better than a Class A amplifier but worse than a Class B amplifier Moreover a Class AB amplifier s linearity is better than a Class B amplifier but not as good as a Class A amplifier These characteristics make Class AB amplifiers a good choice for most low cost designs Nearly all low to medium range audio amplifiers used to be Class AB at least until the proliferation of Class D amplifiers as I will explain
10. One of the top RTOS developers didn t do this on a system we designed and it required us to retrofit thousands of devices already in the field with a battery backup to prevent unrecoverable data corruption following inadvertent loss of power In the same way smart file system architecture can eliminate the need for defragging your file system s architecture can affect whether or not a file system s integrity can be guaranteed across every power down scenario Let s start by looking at the problem THE POWER DOWN PROBLEM Early on when using SD cards and compact flash in cameras and other devices many users discovered that the inexpensive cards could get corrupted when removing the card while writing to it When the cards became corrupted you could lose all of your data on the card Even today my new Nikon camera has strict warnings Do not remove the card while the access light is on If you ever had an SD card compact flash or memory stick become corrupted and lose all of its data your pictures songs etc you know how frustrating that can be Imagine if my company put this sticker on a embedded medical device we designed to go inside the human body Don t remove power without first performing an orderly shutdown They would probably call for a medical orderly after they shut us down Embedded systems usually cannot control when power is going to be removed And not every system can be held up long enough to p
11. The first order polynomial is specified as 1 The second order polynomial is specified as 4 1 2 The third order polynomial is specified as 1 2 3 The fourth order polynomial is specified as 4 1 2 3 4 The fifth order polynomial is specified as 4 1 2 3 4 5 The sixth order polynomial is specified as 1 2 3 4 5 6 The curly brackets specify that this is an array function This is important They must be added by selecting the data and pressing CTRL SHIFT ENTER to add the formula as an array If you have problems copy and delete the formula from the white formula Fax 81 2 620 2003 CO jp U I 3 N N 5 LU CC co DA www hdli HuMANDATA LTD HUMANDATA RAAE WAO 2 BOR rT CEE MESS SAVING COST TIME with readily 775777317 7 available FPGA boards Basic and simple features single power supply operation Quality and reliability is provided by years of sales Same board size and connector layout ACM XCM series All stocked items are ready to be shipped immediately Over 100 varieties of FPGA CPLD boards are available Customizing speed grade and or any features are possible Free download technical documents before purchasing High quality and highly reliable FPGA CPLD boards from Japan Almost all products are RoHS compliance ALTERA FPGA Board Cyclone IV E F780 FPGA board ACM 204 series Cyclone IVE SDRAME LE 1 0 296 E
12. circuitcellar com THE CONSUMMATE ENGINEER Z LLL the impedances are not matched standing waves develop along the line as some of the power is reflected back This can cause unwanted electromagnetic interference EMI and the signal itself can become corrupted Physical damage to the hardware can even result from a serious impedance mismatch The match s degree is expressed as a Standing wave ratio SWR zl for Z 2 Z SWR 5 Zo and SWR for Z gt Z Z L SWR 1 is perfect but SWR lt 2 is considered a good match Instead of SWR standing wave voltage ratio SWVR is often used because it can be easily measured Matched impedance equipment is used every day e g telephones computer interface cables Ethernet serial communications cables and RF coaxial or twin lead cables for TV distribution Each interface cable class is designed to have a certain impedance to make Coaxiel RG213 Reberver 50 Q unbalanced Millimeter FIGURE 2 This is the dipole antenna for 315 MHz not to scale FIGURE 3 A 1 1 50 0 balun made out of a coaxial cable is shown unbalanced 43 m io Cc z Uu 44 o zZ l o oO CIRCUIT CELLAR DECEMBER 2013 281 THE CONSUMMATE ENGINEER circuitcellar com ccmaterials ABOUT THE AUTHOR George Novacek gnovacek nexicom net is a professional engineer with a degree in Cybernetics and Closed Loop Control Now
13. 75 TEST YOUR EQ I TECH THE FUTURE 80 Low Cost SBCs Could Revolutionize Robotics Education By Kyle Granat Students can modify SBCs into fully fledged robotics platforms Sa Source Properties Hardware Co Simulation Properties E J bee view Behavioral a TE Implementation a z5 Hierarchy CoSim Lx9 S C xeesb9 2c59g324 E fp fft tb tb fp fft tbhd WIE dut fp fft top fp fft 4 fft core fft core ipd Use this to change the selected design unit s Hardware Co Simulaton propertes Source Fie fp fft top v Property Name Value Enable Hardware Co Simulation d Clock Port top_aclk Target Board for Hardware Co Sim LX9 JTAG Enable Incremental Implementation Free layer Tunnel barrier B Fixed layer Isolation transistor OFF SPIN TORQUE MRAM CELL S STRUCTURE Qeditor cc Ej circuitcellar circuitcellar 5 Low Power Single Board Computers Low Cost l TS 7400 V2 450MHz ARM9 pricing High Reliability y 1 1 9 Features qty 1 Up to 256MB RAM 1x Watchdog Timer S89 2GB NAND Flash 2x SD Sockets q 2x CAN port 1x BBRTC a 20x DIO 1x Temp Sensor Benefits 40 to 85C Industrial temperature range w optional icro SD Card micro ar Backward compatible w TS 7400 2x faster more features reduced cost Backwards compatible 7 with TS 7400 Boots quickly to your Embedded Applicati Easy development w Debian and Tn l Computer on Modules Sta
14. MOUSER ELECTRONICS acia Authorized distributor of semiconductors wy and electronic components for design engineers 2 CIRCUIT CELLAR DECEMBER 2013 281 Issue 281 December 2013 ISSN 1528 0608 CIRCUIT CELLAR ISSN 1528 0608 is published monthly by Circuit Cellar Inc 111 Founders Plaza Suite 300 East Hartford CT 06108 Periodical rates paid at East Hartford CT and additional offices One year 12 issues subscription rate US and possessions 50 Canada 65 Foreign ROW 75 All subscription orders payable in US funds only via Visa MasterCard international postal money order or check drawn on US bank SUBSCRIPTIONS Circuit Cellar P O Box 462256 Escondido CA 92046 E mail circuitcellar pcspublink com Phone 800 269 6301 Internet circuitcellar com Address Changes Problems circuitcellar pcspublink com Postmaster Send address changes to Circuit Cellar P O Box 462256 Escondido CA 92046 ADVERTISING Strategic Media Marketing Inc 2 Main Street Gloucester MA 01930 USA Phone 978 281 7708 Fax 978 281 7706 E mail circuitcellar smmarketing us Advertising rates and terms available on request New Products New Products Circuit Cellar 111 Founders Plaza Suite 300 East Hartford CT 06108 E mail newproducts circuitcellar com HEAD OFFICE Circuit Cellar Inc 111 Founders Plaza Suite 300 East Hartford CT 06108 Phone 860 289 0800 COVER PHOTOGRAPHY Chris Rakoczy w
15. start up delay that could be ready to use almost as soon as it was powered up Such a computer will need to use an inexpensive but fast nonvolatile memory This combination is difficult to come by but proponents of magnetoresistive RAM MRAM think boot times could soon become outdated as this new memory becomes a mature product MRAM technology is based on using the direction of tiny magnetized regions as the means of encoding binary digits 0 and 1 In this respect it is similar to legacy memory technologies e g bubble memory and magnetic core memory which once dominated storage in mainframe computers MRAM contains an array of memory cells each coupled to word and bit lines with an access transistor Each MRAM chip s memory cell is made of a tiny sandwich of magnetic and insulating thin films called a magnetic tunnel junction MTJ The MTJ behaves as a two valued resistor The resistance is dependent on one of two possible magnetic states This bistability enables an MTJ to store a 0 or 1 just as the presence or absence of charge enables a DRAM to store information However an MTJ s magnetic polarization states don t need any power to survive exactly as any ordinary magnet retains its magnetism without any external energy expenditure So unlike DRAM and SRAM memory based on MTJs requires neither periodic refreshing nor power application to retain its contents The tunnel junction is made of two layers of magnetic mat
16. As the host the FT311D must inquire whether the connected device supports the AOAM If so it will operate as an Open Accessory Mode device with one USB BULK IN endpoint and one USB BULK OUT endpoint as well as the control endpoint This interface will be a full speed 12 Mbps USB enabling data transfer in and out The AOAM USB host has a set of string descriptors the Android OS is capable of reading These strings are user associated with an Android OS application The Android then uses these strings to automatically start the application when the hardware is connected The FT311D is configured for one of its multiple interfaces via configuration inputs at power up Each configuration will supply the Android device with a unique set of string descriptors therefore enabling different applications to run depending on its setup The FT311D s configuration determines whether each application will have access to several user interface APIs that are specific to each configuration Next let s take a look at these interfaces in detail HOST INTERFACES The GPIO interface consists of seven signals the user can control see Table 1 There are four GPIO commands each uses a four byte FT311D Pin Number circuitcellar com 67 GPIO 0 23 IO GPIO data bit 0 bidirectional GPIO 1 24 IO GPIO data bit 1 bidirectional GPIO 2 25 IO GPIO data bit 2 bidirectional GPIO 3 26 IO GPIO data bit 3
17. Corp www panasonic com ABOUT THE AUTHOR Faiz Rahman faiz rahman electrospell com obtained his PhD in Electrical Engineering from Imperial College London in 1997 After doing postdoctoral work at the University of Nottingham he worked for the California Institute of Technology on projects based at NASA s Jet Propulsion Lab Later he served as a senior technology development engineer at Cypress Semiconductor before taking a faculty position at the School of Engineering at the University of Glasgow in 2002 Faiz is currently the Stocker Visiting Professor at Ohio University in Athens Ohio His interests include nanotechnology advanced electronic and optoelectronic devices organic electronics and integrated systems much higher density chips later this year Other companies known to be working on this technology include Samsung Hynix Sharp Fujitsu and Taiwan Semiconductor Manufacturing Panasonic has gone even further by announcing a microprocessor with a built in ReRAM block This device boasts power consumption of only a few hundred microwatts and is aimed at low power high battery endurance applications Evaluation kits for the Panasonic processor are already available IMEC a European semiconductor research organization has also described the development of high specification ReRAM ICs at developer Samsung Electronics America Inc www samsung com Sharp Electronics Corp www sharpusa com Sony Corp www sony com
18. Linux embedded file systems This article discusses file system integrity across power outages and system crashes and describes some integrity assurance solutions By Bob Japenga USA n 1975 I was working on a PDP 11 system that used the RT 11 file system I noticed that the disk access became slower over time You could issue the SQUeeze command to the file system all 2 5 MB of it which would resolve this problem Of course the command took almost a day to complete PCs had a similar problem caused by disk fragmentation that prompted many people to buy a new PC when their old one moved at a sluggish pace They thought it was worn out Instead the disk was just fragmented Disk fragmentation happens any time one file s data is located in noncontiguous physical locations on the disk Once when my dentist complained about how slow his PC had become he asked me for recommendations for a new PC I suggested he use a defrag program instead of replacing his PC He was very grateful but he still drills me now and again STRUCTURE MATTERS Both problems were caused by the file system s architecture File systems have a physical disk structure that defines where the data is stored in the physical media e g hard drive floppy USB stick or flash drive The logical disk structure defines how files are stored on the disk The way in which the design maps the logical disk structure to the physical disk structure dramatically
19. Run the following two commands at the iSim console Note the tb uut name will vary depending on the device under test this assumes you ve called your testbench tb and the HCS module uut Adjust as needed gt scope tb uut gt hwcosim set shareCable 1 Command 4 Set breakpoint on start of testbench code Command 5 Hit Play in iSim The bitstream downloads and the testbench starts but then it breaks on the point you set up Command 6 Hit Play on the ChipScope Analyzer You can first test with a trigger immediate if you prefer Command 7 Hit Play on iSim The code runs as normal and will trigger ChipScope when you expect These are the required instructions to Share the Xilinx ChipScope Pro connection with HCS They may require some alteration You must ensure the ChipScope ILC core uses USER2 or some other non default JTAG BSCAN primitive Note A video version is available at ProgrammableLogicInPractice com You may wonder why you d want to use ChipScope when you also have the software simulator to plot signals The most basic reason is that the software simulator cannot plot internal signals running in hardware i e you d need to change the interface to bring them up to the test bench level Next I will explain how to add external hardware into the co simulation This hardware could run at higher speeds asynchronously to the test bench Remember the test bench clock typically appears in the hertz or kilohert
20. affects any file system s performance and reliability For example neither the Macintosh file system after OS 10 2 nor Linux systems need defragging Both have file structures that do not require this operation I bring this up because most people are familiar with older Windows systems defragging requirements Most don t know that this is not inherent in all file systems but is due to a design decision about the file system s structure The file system s structure can affect things such as robustness over time excessive disk space usage and so forth This brings us to another feature critical to embedded systems robustness across unexpected power outages or system crashes If you are using a file system in an embedded system you don t want it to ever get corrupted across a power outage or crash Some file systems prevent this from happening by requiring an orderly shutdown With embedded systems you don t want to require an orderly shutdown to be performed before you power down One embedded Linux single board computer SBC provider continues to provide misinformation about this on its website It insists that embedded systems must provide an orderly Linux shutdown to prevent data corruption Really This depends on what Linux file system you are using Thus it is important for you as the designer to know exactly what your file system can and cannot do Can it be powered down 10 000 times without corrupting the data
21. as X increases I can ensure I have accumulated the correct ADC value If you want to know the ADC equivalent to an analog value you can use this function to find it I included a program to exhaustively evaluate each value the ADC can produce to ensure that SAAD finds the correct value for each one see Project Files It does as long as all values of Y ascend or descend as the case must be The code sample uses the coefficients for the fourth order equation as its test case This is an instance where the Y values decrease as X increases and it fails when testing for the 3585 value This is because of the reversal of direction where Y starts increasing as X increases which makes the value comparison fail The only way you would know would be to run the test program with your set of coefficients remember to set the number of bits and see that all values pass I have also included the code to compute the binomial least squares fit coefficients It is ABOUT THE AUTHOR circuitcellar com 31 David Cass Tyler David Cass Tyler gmail com is a retired embedded systems engineer who lives in Willard NM He is the owner and sole author of The Control Freak www the control freak com which he uses to share his knowledge with the community David is currently working on a Stan dard Commands for Programmable Instruments SCPI parser that he hopes to sell on his website implemented from I Miller and J E Freund s Probability a
22. be enough for this discussion Theory is easy but difficulties arise when you actually want to design a real world amplifier What are your particular choices for its final amplifying stage CLASS A The first and simplest solution would be to use a Single transistor in linear mode This is what I presented in my previous article Figure 2 shows a refreshed version Basically the transistor must be biased to have a collector voltage close to Vec 2 when no signal is applied on the input This enables the output signal to swing either above or below this quiescent voltage depending on the input voltage polarity If you take another look at the schematic you will understand that a current must continuously flow through the transistor to achieve this biasing set point This current must never go down to zero as you want it to stay in the transistor s linear zone You could replace the bipolar transistor with some fancy MOSFET or use a pair of transistors to adopt a variant but the concept would stay the same It is a Class A amplifier as long as the transistor is always conducting This solution s advantages are numerous simplicity no need for a bipolar power supply and excellent linearity as long as the output voltage doesn t come too close to the power rails This solution is considered as the perfect reference for audio applications But there is a serious downside Because a continuous current flows through its coll
23. bidirectional GPIO 4 29 IO GPIO data bit 4 bidirectional GPIO 5 30 IO GPIO data bit 5 bidirectional GPIO 6 31 IO GPIO data bit 6 bidirectional TABLE 1 Q In GPIO mode any of the seven signals can be an input or output bit z Command Bytel1 Byte2 Bits set to 1 Bits set to 1 ConfigPort Ox1ll 0x00 are considered are considered outputs inputs ReadPort 0x12 GPIO Status 0x00 0x00 WritePort 0x13 GPIO Data 0x00 0x00 ResetPort 0x14 0x00 0x00 0x00 TABLE 2 This is the command byte structure of the available GPIO commands FT311D Pin Number 1 0 Type Description PWM 0 23 O PWM Channel 0 PWM 1 24 O PWM Channel 1 PWM 2 25 O PWM Channel 2 PWM 3 26 O PWM Channel 3 TABLE 3 In PWM mode four signals can produce a PWM output Command Byte 1 Byte 2 Byte 3 Period in SetPeriod 0x21 0x00 0x00 milliseconds for all channels 1 255 SetDutyCycle 0x22 PWM Channel oxoo Percent ON 5 95 Reset 0x23 0x00 0x00 0x00 TABLE 4 This is the command byte structure of the available PWM commands command format ConfigPort ReadPort WritePort and ResetPort see Table 2 ConfigPort enables the application to define each GPIO bit s function ReadPort is sent to the application any time an input changes state on the interface WritePort enables the application to change any output bit on the interface Should the GPIO interface need to be reset and configured as all inputs 68 o z
24. board with readily available components 20 Cong t xo gt d Lt 2S NF ce ACK Assembly Language Essentials Larry Cicchinelli compatibility with standard debugging and programming software 180 MHz 32 MB RAM and 64 MB swap Item EPS ELNL 120026 91 93 ASSEMBLY LANGUAGE ESSENTIALS Looking to brush up your program ming skills Get back to to the basics with this matter of fact guide to As sembly language Perfect for advanc ing students and academics this book introduces you to a processor s most fundamental programming language It includes essential terminology per taining to higher level programming important algorithms that can be built into high level language a free down loadable Assembler program and much more Author Larry Cicchinelli Item CC BK 9780963013323 47 50 CIRCUIT CELLAR SECURITYR Q ARDINADE PTHERNETaSS aD m ii f Cre Ol O M iD 1 O Oo i D LI me i Lu z5 he r i E h x ru a cer E CC CLOUD TAG T SHIRT For a limited time you can have an exclusive Circuit Cellar Tag Cloud T shirt Designed for electronics en gineers the T shirt features Circuit Cellar on the front and an embedded electronics tag cloud on the back It is 100 loose fit cotton and currently available in large and extra large sizes Item CC SHIRT 001 20 i EAGLE v6 GETTING STARTED GUIDE EAGLE is a u
25. consideration especially in communications and when working with high frequencies This article shows a practical implementation in the form of an antenna for a garage door opener By George Novacek Canada round 1840 Moritz von Jacobi postulated a fundamental law of electrical engineering which has since become known as Jacobi s law It states that maximum power from a source when viewed from the output terminals is obtained when the source s internal impedance and the load impedance match Consider the DC circuit shown in Figure 1a Here both the internal and the load impedances are purely resistive The generator comprises a DC voltage source V and internal resistance R The output terminals are load resistor R s terminals The blue trace in Figure 1b shows the power transferred in relation to the RR ratio Maximum power is being transferred only when the two resistors are equal Because equal current flows through the two equal resistors R and R 50 of the power is dissipated by each resistor Since one half of the power is wasted in the source s internal resistance the power transfer efficiency is a mere 50 This has sometimes led to an incorrect conclusion that no more than 50 efficiency can be achieved in electrical circuits This is not what Jacobi s law means It Output power and efficiency 45 tells us how to choose a load resistor R for maximum power transfer given the internal resista
26. digits long Even so you have described a line that reflects the process The calculated values will have a precision that is greater than two significant digits because the curve s shape dictates zx circuitcellar com Em xx aS ve RE Mirte Eel BE ee 56 087 Bead FIGURE 1 This spreadsheet displays the fourth order chart values 27 SaYNLVAS 28 un LLI c lt LLI T CIRCUIT CELLAR DECEMBER 2013 281 All you need to determine the engineering unit s value that is being measured is the A D reading and an array of calibrated coefficients that precision Think of it as if you are trying to determine your speedometer reading s accuracy As you go past a mile marker on the highway you reset the trip odometer to zero As you pass the tenth mile marker you look down and see that your trip meter reads 10 1 miles You now know your speedometer s precision to one decimal place To determine the accuracy to two decimal places repeat this process but drive 100 miles and note the reading For three decimal places you would have to drive 1 000 miles To increase your calculated readings accuracy and precision take more and more calibration points evenly distributed and closer to the rails They will tend to average out the errors In Figure 1 the coefficients displayed in the equation are the numbers you are seeking You can diagnose how well your coefficients work by calc
27. is better Some like to stick with what they know and has proven robust We have had just enough problems with JFFS2 that I tend to favor working with a later design e g UBIFS Benchmarks on UBIFS look very good see Resources for more information CHOICES CHOICES As embedded systems designers we sometimes wish we could have fewer options when choosing a processor a RTOS a file system a development toolchain and so forth But the fact remains that we do have many choices Understanding the implications of the choices will help us create more robust systems Choosing a flash file system for your embedded Linux system is important Hopefully I have introduced some options so you can take this beyond thin slices THEY SAY NY M Tuesday WM 7 _through Friday January 10 2014 2 alas Vegas N e CESweb org LE HCES2014 j TA Y X hialo RA Ore 2S GOOD THING LAS VEGAS me i aa Li NL FROM SQUARE ye Jr Over four days those who shape the future gather in a city built on reinvention Here brands markets and economies conyerge in what s f r more thana tradeshow And in 2014 there s more opportunity than ever to connect with those who ma ter The only question now why woulgr t you fit it in your future i and today at CESweb org p fk d j A THE GLOBAL STAGE FOR INNOVATION PRODUCED BY KS CEA 52 CIRCUIT CELLAR DECEMBER 20
28. is that it is impossible to ensure that one transistor will start to conduct exactly when its counterpart stops whatever its external conditions e g transistors temperature dispersion in transistor s behaviors input Signal frequency etc Therefore a Class B amplifier suffers from a small distortion at each signal s zero crossing It could be small when the amplifier is properly designed but it will never be as good as a Class A amplifier CLASS AB As its name indicates Class AB amplifiers are midway between Class A and Class B circuitcellar com FIGURE 2 a A Class A amplifier can be built around a simple transistor b The transistor must be biased in so it stays in the linear operating region i e the transistor is always conducting y ud Q1 conducting 02 conducting FIGURE 3 a Class B amplifiers are usually built around a pair of complementary transistors b Each transistor conducts 50 of the time This minimizes power losses but at the expense of the crossover distortion at each zero crossing FIGURE 4 a A Class C RF amplifier s concept is shown R1 could be replaced by another inductor to avoid any lossy component except the transistor b For Class C operation the transistor only conducts a small amount of time The output Signal is reconstructed thanks to the output filter 59 SNWN109 60 COLUMNS CIRCUIT CELLAR DECEMBER 2013 281 FIGURE 5 a
29. m using here you can still see what the results should look like circuitcellar com 57 eo io Cc z T Ultra Small Panel PG Up to 1 GB Flash amp 256 MB RAM 4 3 WOVGA 480 x 272 TFT LCD Analog Resistive Touchscreen 10 100 Base T Ethernet ARMS 400Mhz Fanless Processor 3 R5232 amp 1 R 232 422 485 Port 1 USB 2 0 High Speed Host port 1 USB 2 0 High Speed OTG port MicroSD FlashCard Sockets Eid E 12C 4 ADC Audio Beeper Battery Backed Real Time Clock Optional Audio with Line in out Operating Voltage 5V DC or 8 to 35V DC Optional Power Over Ethernet POE m WindowsCE Designed and Manufactured in the USAthe PPC E4 is an ultra compact Panel PC that comes ready fo run with the Operating system installed on Flash The dimensions of the PPC E4 are 4 8 by 3 0 about the same as that of popular touch cell phones The PPC E4 is small enough to fitin a 2U rack enclosure Apply power and watch either the Linux X Windows orthe Windows CE User Interface appear on a vivid 4 3 color LCD Interact with the PPC E4 using the responsive integrated touch screen Everything works out of the box allowing you to concentrate on your application rather than drivers Just Write It and Run building and configuring device It Pricing starts at 375 for Qty 1 www emacinc com sales cc_dec13 Since 1985 AEK 28 EE pin SIAE NH ETLARI sen iri Is
30. one per memory cell Each capacitor is accessed by a dedicated access transistor for read and write operations The problem is that the charge stored in a DRAM cell tends to disappear due to self discharge after only a few milliseconds This means that all DRAM chips have to be periodically read and every cell s state must be restored every few milliseconds The requirement for periodic refresh operations increases the power consumption of DRAM banks in addition to endangering data integrity in the case of even short power supply dips Within this backdrop ferroelectric RAM FRAM became a potential game changer when it was introduced in the early 1990s FRAM is similar to DRAM but uses a different material for its capacitor dielectric Therein lies the main difference between the two memory types FRAM utilizes ferroelectric materials as memory cell capacitor dielectric material A ferroelectric material placed inside an electric field e g a capacitor becomes polarized with a permanent electric field which it retains even when the external polarizing field is removed This essentially means that once a ferroelectric capacitor is charged and the voltage across it is removed an electric field still remains between the capacitor plates The direction of the polarization field depends on which way the capacitor was charged to Your solution Save time and money with embedded software solutions built to run righ
31. read key presses and set LED states on this SPI slave 16 key touch panel 71 72 o za l o OQ CIRCUIT CELLAR DECEMBER 2013 281 Photo 4 Many of my projects use printable ASCII text commands and replies This enables a serial terminal to become a handy user I O device This current probe circuit outputs its measurements in ASCIT printable text circuitcellar com ccmaterials RESOURCES Arduino http arduino cc Future Technology Devices International Ltd FT31xD Demo APK User Guide Appli cation Note 208 2013 SPI devices don t have fixed addresses a chip select separate enable is required for each slave device to exist on the same bus There is no standard SPI format Therefore it is necessary to know the format of the device with which you are working SPI devices pass information in some fixed bit packet usually some factor of 8 since the hardware is an 8 bit shift register For instance using an 8 bit format the first byte sent may be a command with 1 bit R W 7 bit pointer format A 0x00 may mean set the pointer to b 0000000 and set up to write any following bytes A 0x80 may mean set the pointer to b 0000000 and set up to read any additional bytes Note that while this byte is being clocked into the Slave device the Slave device is clocking something out to the Master Since a Slave device can t determine how to answer a question before is was asked thi
32. simulators are important when validating and debugging designs But sometimes a critical design piece only exists in hardware which limits testing to the physical device This article introduces hardware co simulation which provides the flexibility and power of a computer based simulation but connects to a real hardware which you cannot accurately simulate Hardware co simulation HCS is often the answer to both of these problems In this article I ll describe using the Xilinx ISE toolchain for which HCS is supported by the WebPack free version of the tools With HCS a module is pushed into your real FPGA which communicates with the rest of the software based simulation over the JTAG connection There are some basic limitations the clock to the module is not a predictable frequency you can only select a single module to implement in hardware and you cannot push the topmost module to hardware However the single module chosen can have submodules If you want to push your design s topmost module into hardware you will typically just need a wrapper If you are using HCS to increase the simulation speed of certain operations the lack of a constant predictable clock isn t normally an issue For example with a fast Fourier transform FFT operation you may wish to push this into hardware The time to hardware view Qf Implementation HA Smuk 7 p E S Source Properties Hardware Co SimulabonPropertes
33. surveillance systems is very competitive We have started a new company SVT Analytics to pursue customer analytics for retail using smart camera technologies I also continued to look at methodologies and tools for bigger software systems yet another interest I inherited from my dad NAN Tell us a little more about SVT Analytics What services does the company provide and how does it utilize smart camera technology MARILYN We started SVT Analytics to develop customer analytics for software Our goal is to do for bricks and mortar retailers what web retailers can do to learn about their customers On the web retailers can track the pages customers visit how long they stay at a page what page they visit next and all sorts of other statistics Retailers use that information to suggest other things to buy for example Bricks and mortar stores know what sells but they don t know why Using computer vision we can determine how long people stay in a particular area of the store where they came from where they go to or whether employees are interacting with customers Our experience with embedded computer vision helps us develop algorithms that are accurate but also run on inexpensive platforms Bad data leads to bad decisions but these systems need to be inexpensive enough to be sprinkled all around the store so they can capture a lot of data NAN Can you provide a more detailed overview of the impact of IC technolog
34. the spreadsheet the C2 C8 range calculates the values using the powers of X while the D2 D8 range uses Horner s rule to calculate the same values The formulas being used are A2 4 F 21 A2 3 G 21 A2 2 H 21 A2 1 214 J 21 and A2 A2 A2 A2 A 10 B 10 C 10 D 10 E 10 When you recognize the Horner s rule pattern it is actually easier to type it in for any given order The LINEST function is used to calculate the equation displayed in Figure 1 This function returns an array The five tables that are displayed are the LINEST arrays for first through fifth order polynomials Notice that column numbers vary according to the order For instance the table in the F21 J25 range is five rows and polynomial order plus one column The table is specified as LINEST B 3 B 7 A 3 A 7 1 2 3 4 TRUE TRUE Select the entire range and go to Formulas Insert Function to pop up the Insert Function dialog box Select LINEST to get the Function Arguments dialog box Select the ranges for Known_ys and Known_xs to specify the input data Set Const to TRUE to compute the Y Intercept normally and set Stats to TRUE to output the regression statistics This will set the upper left hand cell to LINEST B 3 B 7 A 3 A 7 T RUE TRUE To see the data for a fourth order polynomial edit the cell normally and add the 1 2 3 4 to the A 3 A 7 parameter
35. to Internet of Things IoT security to analog and mixed signal SoC solutions Below are conference notes that embedded systems designers will find useful m Living on the Edge of the SoC Jim Aralis CTO and VP of R amp D at Microsemi e Industry Related Observations Right now we re seeing a decline in standard prod ucts Manufacturers of standard products have to look to a different future and they are The result Companies like Microsemi are absorbing some of what our customer does e Predictions Expertise in analog processing signal condition ing precision timing and high speed communica tions design will be essential for future engineers to develop successful products in an ever changing digital environment System engineers and architects will be the cre ators and the companies with the best system en gineers will excel This will likely result in the re duced need for board designers We ll see fewer foundries fewer fabless design houses fewer SoC designers digital will become block based and system houses will take over much of the differentiation Aralis said Analog will continue to drive some of that differentiation It s going to be an interesting new world And I think it s going to be very good just make sure you are in the right place B Securing the Internet of Things Jauher Zaidi Chairman amp CTO Palmchip e Industry Related Observations Zaidi noted tha
36. to JFFS2 because it contains journaling and compression we seamlessly switched to UBIFS once on a RESOURCES eLinux org Flash Filesystem Benchmarks 3 1 Yaffs open source file system www yaffs net project when JFFS2 was taking too long to boot It reduced our boot time by 30 s In most benchmark tests it is faster than the other file systems in reads and writes and average on file deletions We have had no problems using UBIFS We have hundreds of thousands of JFFS2 systems in the field and comparatively few UBIFS Again talk to me in a few years LogFS In 2010 yet another flash file system LogFS was introduced into the mainstream Linux distribution One of the problems with JFFS2 is that it keeps the inode tree think of this as metadata handling where the logical blocks map to the physical blocks in RAM so it must create this every time you boot LogFS keeps this on disk Clearly this creates some performance degradation but we do not have any experience with this file system CHOOSING A JOURNALING FILE SYSTEM Some choices are made for you with the hardware Not all file systems work with all the different kinds of flash Sometimes you design around a SBC with a flash file system already installed Yes you could change it but do you need to JFFS2 and UBIFS have built in compression which may drive your decision if you are concerned about how little disk space you have Some are of the school that newer
37. with IPv4 between two network devices the MAC and both devices IP addresses are needed THE ADDRESS RESOLUTION PROTOCOL The ARP is used for the resolution of a network layer address i e IP address into a link layer address or MAC address ARP is a Layer 2 protocol because it is used to resolve a Layer 2 address It is also a Layer 3 protocol because IP is a Layer 3 address Figure 1 shows the packet structure when using IPv4 The value of Operation specifies the operation the sender is performing 0x01 circuitcellar com 21 Destination MAC address 2 2 Operation Destination MAC address 2 2 Destination IP address 2 2 Destination MAC address 1 2 Source MAC address 1 2 Source MAC address 2 2 Ethernet type 0x0806 Hardware type 0x0001 m ande Protocol address AJ Protocol type 0x0800 i length 0x04 p Source MAC address 1 2 Source MAC address 2 2 Source IP address Destination MAC address 1 2 Destination IP address 1 2 0x0000 is used for a request and 0x02 is used for a reply It is necessary to use ARP otherwise the MAC address is unknown So before sending UDP packets an ARP request is sent to ask what MAC address has the IP address The reply is taken and the MAC address is extracted Because the destination s MAC address is unknown 16 hFFFFFFFFFFFF is used which represents a broadcast Furthermore if a request with the FPGA board s IP address is received you rep
38. with the first register Many devices use a register pointer to select one of these registers which eliminates unnecessary data transfers In this case the first data byte written will change this pointer The next data bytes read or written will go the pointed to register This pointer is auto incrementing Photo 2 shows the demo which enables the user to set the I2C clock s frequency value I ve attached a past project that exposes the compass chip s Honeywell HMC5843 I2C bus This device uses a register pointer with 13 registers Field strength measurements of the X Y and Z axes are available in a 12 bit signed format When using a registered device the first data byte written goes to the pointer register Reads must be preceded by a write to properly set the pointer The number of actual data bytes written will be N 1 as the pointer is written using the first byte SPI MASTER DEMO SPI adds an extra data line to an I C bus s clock and data lines With two data lines the data direction is fixed on each This enables data to simultaneously move in both directions potentially twice as fast as I2C Using fixed data directions also enables the bus to be TTL compatible as opposed to open collector Since circuitcellar com PHOTO 2 I used a Honeywell HMC5843 digital compass IC for the demo Three axis magnetic measurements are available as signed integers PHOTO 3 I used the SPI Master demo to
39. 126 GPIO debug status OLED 7101 to 4880 0500 Get your project to market fast lay down a standard SODIMM connector snap in a CFA10036 System On Module and you instantly have access to tons of GPIO and the power of Linux Leave the 8 bit dark ages behind CFA920 TS This tiny touch enabled embedded Linux PC is powered by the CFA10036 EBEN sie E 94 800x480 color TFT resistive touch screen IKE i 10 100 Ethernet USB i gos E 24 GPIO on 0 1 79 more GPIO on 1mm 6 channel accel gyro Siete rA m 140 01 to 105 0500 Sheree pene Rl 18 5mm A E LAC e anian ie thick a Crystalfontz b www crystalfontz com tel 888 206 9720 The company is working on producing THE ORIGINAL SINCE pon Beta LAYOUT FREE Stencil T7 with every prototype ved AIN I am Z Embedded RFID authenticate track amp ud your product www magic pcb com Call Tony 1 707 447 7744 sales pcb pool com tony shoot beta layout us we PCB POOL is a SUD trademark of TA JE www pcb pool com Bete create electronics 40 Uu LLI cc t LEI LL CIRCUIT CELLAR DECEMBER 2013 281 circuitcellar com ccmaterials RESOURCES Buffalo Technology Inc www buffalotech com Elpida Memory Inc www elpida com Fujitsu www fujitsu com Hynix Semiconductor Inc www hynix com IMEC www imec be Micron Technology Inc www micron com Panasonic
40. 13 281 PROGRAMMABLE LOGIC IN PRACTICE o z o oO module running on your physical FPGA By Colin O Flynn Canada D my last article I introduced the concept of using logic analyzers built into your hardware design to debug and validate hardware implementations In this article I d like to show you to something even more powerful controlling hardware modules in an almost arbitrary fashion from your computer This can greatly simplify your debugging and validation process The time you invest to learn these techniques will quickly come back to you in increased productivity As always detailed project files example videos and additional instructions are posted on the companion website ProgrammableLogicInPractice com HARDWARE CO SIMULATION Design simulation is almost always required for functional testing Simulations PHOTO 1 enable rapid code iterations You can easily Enabling hardware co simulaton probe into any network without lengthy s a simple matter of selecting the synthesis implementation phases module authorizing it and defining There are two common downsides to the interface and clock You may also Simulation First in complex designs it need to specify a constraint UCF f HOM 4 can take a long time to run the simulation file if you re interfacing to external Second your design may interface to external Connecting FPGA Hardware to Virtual Test FPGA
41. 20MHz i ch oscilloscope 100 M S sample rate 3 5 in color TFT LCD 6 hour battery life FREE rugged impact resistant case HDS1021M 269 95 WWW SAELIG COM 4j JE 69 SNWN109 70 o z l o oO CIRCUIT CELLAR DECEMBER 2013 281 Command Byte 1 Byte 2 Byte 3 Bytes 4 7 E BitO 0 MSB first ClockSpeed in little Endian Ag in Modes BitO 1 LSB first format up to 24 MHz SendData 0x62 Send N bytes of data 1 255 SendData 0x62 N bytes of data sent ReadData 0x63 Retrieve N bytes of data 1 255 ReadData 0x63 N bytes of data retrieved Reset 0x64 TABLE 12 This is the command byte structure of the available SPI Master commands FIGURE 1 The Future Technology Devices International FT311D IC is available in 32 pin LQFP and QFN packages You can use a small tip iron and a little magnification to hand solder the LQFP version I used through hole peripheral components for the remainder of the parts A keyed 10 pin connector ensures there aren t any connection errors this tool which will enable you to investigate new technologies that come with one of these simple interfaces Let s look at the circuit required for this project PROJECT HARDWARE A USB host must supply 5 V to the Android device While the FT311D runs on 3 3 V it does have 5 V tolerant inputs I started with a 2 1 mm power jack suitable for most 5 V wall warts A 78L33 regulator will suppl
42. 25U256C3N 3 3v single power Supply operation On boamd oscillator SMH jis eet RoHS compliant gt e o ahd the Two varlable outputs for oe WMuclo 0 8V to 3 3 34 max Lan PRI Serles FPGA boards Power Switch and LED Power Input DC5V 2 1 mm Jacks Terminal Block option ELE Board size 156x104 mm 4 Layers PCB Thru hole E x One for general power 3 3V 34 max www hdl co jp CC 30 Uu LLI cc t LEI LL CIRCUIT CELLAR DECEMBER 2013 281 PROJECT FILES circuitcellar com ccmaterials REFERENCES 1 Wikipedia Spline interpolation bar at the top of the page Select the 5 x 5 cell range All the cells will be blue except the top left cell which will be white Use the mouse to select the formula bar at the top and paste the LINEST formula back into the line Press the CTRL SHIFT ENTER to add it as an array Now select the output range and format the numbers as Scientific to four decimal places You don t have to display the entire table You can display only part of it by using the INDEXC function as shown in the A13 A17 range These are the Coefficients of Determination for the first five orders They are what is displayed on the chart as the R2 number They can enable you to determine the best order without going through all the graphing and so forth The fourth order polynomial s coefficients are displayed in the A20 A24 range in the same way T
43. C packages with capacities of 32 64 and 128 Mb with operating speeds as high as 66 MHz Both SPI and parallel interfaces are available with the former targeted at flash replacement applications and the latter intended for all other applications Photo 1 shows Micron s PRAM IC packages Samsung has its own aggressive marketing plan for PRAM devices and has demonstrated experimental chips with capacities as high as 512 Mb The company will use its chips for in house products and for sale to other OEMs MAGNETORESISTIVE RAM Computer boot times are a constant source of annoyance to many computer users As previously mentioned the source of the problem is the necessity to read data E Free layer Tunnel barrier px Fixed layer 2nlatian transistor OFF FIGURE 2 A spin torque magnetoresistive RAM cell s structure includes a free layer a tunnel barrier and a fixed layer 36 un LLI c t LLI T CIRCUIT CELLAR DECEMBER 2013 281 PHOTO 2 Everspin Technologies s EMD3D064M is a 64 Mb spin torque magnetoresistive RAM IC Image courtesy of Everspin Technologies PHOTO 3 A 64 Mb spin torque magnetoresistive RAM die from Everspin Technologies is shown Image courtesy of Everspin Technologies from a but inexpensive hard drive to a small fast but expensive memory DRAM which the large slow memory computer processor can directly access We have all wished for a computer with no
44. C841 microcontroller The more advanced labs include several projects that introduce you to ADCs DACs and their applications Other projects demonstrate some of the many circuitcellar com CC SHOP Shlomo Engelberg CIRCUIT 8 CELLAR ways you can use a microcontroller to solve practical problems The Keil uVision4 IDE is introduced early on and it is used throughout the book This book is perfect for a university classroom setting or for independent study Author Shlomo Engelberg Item CC BK 9780963013347 35 Further information and ordering www cc webshop com CONTACT US Circuit Cellar Inc 111 Founders Plaza Suite 300 East Hartford CT 06108 USA Phone 860 289 0800 Fax 860 461 0450 E mail custservice circuitcellar com 77 78 CIRCUIT CELLAR DECEMBER 2013 281 32 M 10 provucrs s services AD FORMAT The Vendor Directory at EIN EM circuitcellar com vendor Advertisers must furnish digital files that meet our specifications f ide t ewal circuitcellar com mediakit IS your guide to a variety o engineering products and ALL TEXT AND OTHER ELEMENTS MUST FIT WITHIN A 2 x 3 FORMAT services E mail adcopy circuitcellar com with your file For current rates deadlines and more information contact Peter Wostrel at 978 281 7708 or circuitcellar smmarketing us Thermocouple Measurement Made Easy PIC SERVO MOTION CONTROL MOTION CONTROLLERS FOR BRUS
45. E Denis Meyer 31 46 4389435 d meyer elektor fr NETHERLANDS Harry Baggen 31 46 4389429 h baggen elektor nl SPAIN Eduardo Corral 34 91 101 93 95 e corral elektor es ITALY Maurizio del Corso 39 2 66504755 m delcorso inware it SWEDEN Wisse Hettinga 31 46 4389428 w hettinga elektor com BRAZIL Jodo Martins 31 46 4389444 j martins elektor com PORTUGAL Jo o Martins 31 46 4389444 j martinsQelektor com INDIA Sunil D Malekar 91 9833168815 ts elektor in RUSSIA Nataliya Melnikova 7 965 395 33 36 elektor russia gmail com TURKEY Zeynep K ksal 90 532 277 48 26 zkoksal beti com tr SOUTH AFRICA Johan Dijk 31 6 1589 4245 j dijk elektor com CHINA Cees Baay 86 21 6445 2811 ceesbaay gmail com circuit cellar circuitcellar com VOICE fi COIL OUR NETWORK Express e ektor 2014 International CES All Electronics Corp AP Circuits ARM Beta LAYOUT Ltd Cadsoft Computer GmbH CC Webshop Holiday Sale Cleverscope Crystalfontz America Inc Custom Computer Services Digi International Elektor Elektor Elprotronic Inc EMAC Inc Embedded World ExpressPCB EzPCB Fabstream Technologies LLC FlexiPanel Ltd FTDI Chip GHI Electronics LLC Humandata Ltd NOT A SUPPORTING COMPANY YET Contact Peter Wostrel circuitcellar smmarketing us Phone 978 281 7708 Fax 978 281 7706 to reserve your own space for the next edition of o
46. EBONE www GHlElectronics com gadgeteering 23 1 m gt c A m Uu 24 Un Lud cc t LEI LL CIRCUIT CELLAR DECEMBER 2013 281 QByteArray datagram datagram append 100 QHostAddress myBroadcastAddress QHostAddress ense ehem udpSocket writeDatagram datagram data datagram size myBroadcastAddress 8100 LISTING 2 This code is used to send a UDP packet in Qt4 PROJECT FILES circuitcellar com ccmaterials RESOURCES P J Ashenden The Designer s Guide to VHDL 3rd Edition Systems on Silicon Morgan Kaufmann 2008 J Blanchette and M Sum merfield C GUI Program ming with Qt4 24 Edition Prentice Hall 2008 dSPACE GmbH www dspace com GitHub Inc UDP Network with a Tri Mode MAC on a Spartan 6 FPGA C M Kozierok The TCP IP Guide A Comprehensive Illus trated Internet Protocols Ref erence 1st Edition No Starch Press 2005 D Molkentin The Book of Qt 4 The Art of Building Qt Applications 1st Edition No Starch Press 2007 you have to pause until Tx mac wa is high again Tx mac eop is used to signal the end of the packet Tx mac BE signals if the complete four bytes or only one two or three bytes have to be written OpenCores 10 100 1000 Mbps Tri Mode Ethernet MAC Overview UDP IP Core Overview Trenz Electronic GmbH FPGA Boards Wikipedia Address Resolution Protocol
47. EMFs This is especially true when the output is connected to long unshielded wires such as the ones between an audio amplifier and the loudspeakers Class D amplifier designers must be cautious regarding the output low pass filter s performance And they must check the compliance to EMC standards as soon as possible in the design cycle Class D amplifiers are now used everywhere so solutions do exist However their implementation is not as straightforward as it looks As always the best solution is to use a pre integrated solution e g a Class D IC from one of the many suppliers such as Texas Instruments Maxim Integrated and Linear Technology Then you must look at its reference design and either carefully reproduce it or understand exactly what you are doing before making a modification CLASS E AND CLASS F Remember that Class C is devoted to RF amplifiers using a transistor conducting only during a part of the signal period and a filter Class E is an improvement to this scheme enabling even greater efficiencies up to 80 to 90 How Remember that with a Class C amplifier the losses only occur in the output transistor This is because the other parts are capacitors and inductors which theoretically do not dissipate any power Because power is voltage multiplied by current the power dissipated in the transistor would be null if either the voltage or the current was null This is what Class E amplifiers try to do ensure th
48. GPU must be paired with a suitable solid state memory system to create a practical usable device Several different IC memory technologies are available for digital system designers Some are better in certain performance specifications than others No currently available technology can claim to excel in all respects This disparity has sustained several different memory technologies such as dynamic RAM DRAM and static RAM SRAM which feature high access speed and flash memory which is known for its nonvolatility and high integration density Digital systems often comprise several different memory types to take advantage of their unique performance and economic benefits This article discusses some interesting new memory technologies that have become available for use in embedded systems I cover only those devices that are now commercially available but bear in mind that many other technologies are being hotly pursued in academic and corporate research labs worldwide As I examine these emerging memory technologies it is important to understand that it has taken many years the sustained efforts of many individuals and enormous expenditures by technology companies to bring each of these memory technologies to market Thus each memory technology described is a testament to human ingenuity PHASE CHANGE RAM One of the most interesting memory types to emerge in recent years is one that stores data as order or disorder
49. H BRUSHLESS AND STEPPER MOTORS Electronic and Electro mechanical Devices Parts and Supplies Wall Transformers Alarms Fuses Relays Opto Electronics Knobs Video Accessories Sirens Solder Accessories Motors Heat Sinks Mosaic Thermocouple Measurement Wildcard Provides high precision high accuracy measurement Terminal Strips L E D S Displays of thermocouples of all types E J K R 3 or T Fans Solar Cells Buzzers Bue a ies Lage OSTSEE controller chips s Comes in Single hannel or Quah hannel Batteries Magnets Cameras Configurations controller boards Panel Meters Switches Speakers Singe Channel 1 TC uncalibrated accuracy of i j Hh 0 1 C Dual hannel 2 TCs calibrated acc RE uses and MUC Mare of 40 25 C both with builin col www allelectronics com clei www p icservo con Free 96 page catalog E 1 800 826 5432 JEFFREY KERR LLC GHZ sizieleliifieber SOCKETS A small processor with low Need a little bit of a IO VSP Sin BGA a MALE SIM display We have it White 128x32 OLED 3 3v I C SPI FPCIZIF _ l4 30mm 2 if isa MOVF c EE SUBWF tI ul BTFSC o B q GOTO E o stages 4 6 ROM locations per line Color OLED T mmo c _ Save development time 96x64xRGB without losing memory SPl parallel _ B he Y FPC or E Im Utilize all features of the C compiler 0 1 carrier 3 c d s peripheral drivers 160 view lc standard C operato
50. IE SW _ 1 0 296 Lu y e Credit card size 98 x 51 mm a s Ve RaH5 compliant Spartan 6 USB FPGA board EDX 301 Cyclone IV E USB Config Emm s HI SPEED EPACE15F 17 C8H dE HEB HER AHS Compact size 54 x 53 mm RoHS compliant S See all our products A D DA conversion board boards with USB chip from FTOI and accessories at Spartan 6 USB Config USER Em mJ HI SPEED XC6S3LX16 2C3G225C EHEH i Cam pact size 54 s 53 mm RoHS compliant gt 5 inch TFT full color LCD display with WVGA 800x480 resolution resistive touch panel UTL 021 3 3 V single power supply operation e Piezo buzzer to beep Useful plastic bezel is included to assemble e LTM campatible pin assignment EA ACD la aa PLCCO6 8 Series PIK and Bet Mountable Module FPGA Module IC socket mou ie 50 Os External clock inputs Eames are available ain e 3 3V single power supply POS operation Voltage converters for auxiliary power supply are built in Separated supply inputs Core O drivers JTAG signal Al PLCCB8 series have common pin assignment Very small size 25 3x 25 3 mm E RoHS compliance HU MADE IN JAPAN XILINX PLCC68 Series Spartan 6 PLCC68 FPGA Module XP68 03 XC6SLX45 203G324C 3 3v single power supply operation On board oscillator S0MHZ RoHS compliant eo Cyclone III PLCC68 FPGA Module s gem xion m UDCTI 6s EPSC
51. JTAG cable speed The FFT s software only simulation takes 47 8 s Using the Avnet LX9 MicroBoard with a built in USB JTAG cable the simulation takes 150 s and the test bench clock runs at between 40 and 70 Hz Using a Xilinx Platform Cable USB on the same board means the simulation takes only 11 2 s and the test bench clock runs at between 800 and 1 100 Hz In this example you need the Platform Cable USB s additional Ix9 jtag gt Description gt LX9 JTAGY Vendor gt Xilinx Type gt jtag Part gt xc6slx9 2csg324 lock deret ete 10 VariablePeriods gt 15 20 30 J Pin gt C10 y BoundaryScanPosition gt 1 circuitcellar com FIGURE 1 Developing a computer interface for your FPGA Why not use hardware co simulation to enable your computer program to talk to your FPGA simulator You are using the real hardware interface but giving yourself the debugging and verification power a software simulator provides Listing 1 You ll have to add this code to the board support package for the hardware co simulation On my computer this was installed at C Xilinx 14 4 ISE_DS ISE sysgen hwcosim data hwcosim bsp 53 eo io Cc za Uu 54 o z D l o oO CIRCUIT CELLAR DECEMBER 2013 281 You may wonder why you d want to use Xilinx The ChipScope when you also have the software simulator to p
52. NG FILE SYSTEMS An embedded systems designer using Linux has several choices to make when selecting a file system And the implications can be significant Explanations of some of the journaling file systems we have used follows Journaling Flash File System V 2 JFFS2 This has been the industry benchmark for flash based journaling file systems since it was the first one introduced into the mainstream Linux distribution JFFS2 has compression built into its core It also has wear leveling built into the structure We have worked mostly with JFFS2 It has several quirks we have discovered over 49 eo io za Uu 50 o z l o oO CIRCUIT CELLAR DECEMBER 2013 281 circuitcellar com ccmaterials ABOUT THE AUTHOR Bob Japenga has been designing embedded systems since 1973 In 1988 along with his best friend he started MicroTools which specializes in creating a variety of real time embedded systems With a combined embedded systems experience base of more than 200 years they love to tackle impos sible problems together Bob has been awarded 11 patents in many areas of embedded systems and motion control You can reach him at rjapenga microtoolsinc com time One is that because of compression you cannot tell exactly how much disk space you have left as you run low For example if there is 1 MB of raw disk space left and you have 2 MB of data to write can you commit the write
53. PACES3UF 20 C8N EP4CE40F 20 CEH EPACE115F28CBSH Credit card size 86 x54 mm E RaHS campliant Cyclone III F780 FPGA board ACM 202 series To XCOSLX75 2FGGAB4C i XILINX FPGA Board Spartan 6 FGG484 FPGA board XCM 019 series Spartan 6 5V 1 0 LED ds 100 XCOSLXxX45 2F GG464C sg FEHR Creditcard size 88 x 54mm fE RaHS compliant Spartan 6 LXT FGG484 FPGA board XCM 020 lass Cyclonell SW 1 0 296 Spartan 6 MRAM DDR2 JG TIS EP3C55F 780C8N put SW LES 10 100 SIF40 EP3CA0F7a0CEN XCSSDXA5T 2FCCADAC HEHEEHEHHHESHEEOGEEOHERER EP3C120F780CBH L8 Credit card size 86 54 mm RoHS compliant gt Cyclone IV GX F484 FPGA board ACM 108 series IVGX DDR2 2 NY EPACGXS50CF23C8N EPACGX110CF23CaN EPACGX150CF23C7N Compact size 43 x 54 mmi RoHS compliant eS MAX II T144 CPLD board ACM 302 1270 MAX I LED SW j _1 0 56 EPM1270T 14 4 5H Compact size 54 x 53 mm RoHS compliant USB FPGA Board Cyclone IV USB FPGA Board EDA 301 Creditcard size 88 54 mm E XCoSLX75T 2FGCABAC M es XC6SLX1D0T 2FGC4BAC E 1 0 XC65LX150T 2FG CA84C if RoHS compliant Virtex 5 FFG676 FPGA board XCM 109 series Virtex 5 SDRAM LED 1 0 128 XC5VLX30 1FFG676C XC5VLX50 1FFGG7GC XCSVLX85 1FFGE76C MAN XCSVLX110 1FFG676C om Compactsize 43x 54mm MAN Rio HS compliant e Spartan 6 FGG676 FPGA board XCM 206 series Spartan 6 MRAM DDR2 E
54. PROGRAMMABLE LOGIC DECEMBER 2013 circuitcellar com ISSUE 281 circuit cellar READY TO RECONFIGURE TIPS FOR WORKING CONFIDENTLY WITH FPGAs Hardware Co Simulation Ethernet on an FPGA amp More Tq a i I i ai e 4 lli i Al Bi SoC and IoT Predictions Q amp A Smart Camera Specialist m UDP Streaming Converting A D Values New Memory Technologies Impedance Matching Embedded File Protection HCS Testing Amplifier Class Comparison USB Android Host IC m SBCs and STEM 9 00US 10 00C AN 74470 Il 12 0 0 Ethernet Core Modules with High Performance Connectivity Options gt MOD5270 e iG E 147 5 MHz processor with 512KB Flash amp 8MB RAM 47 GO o 3 UARTs lC SPI x A MOD5234 147 5 MHz processor with 2MB flash amp 8MB RAM 49 GPIO 3 UARTs l C SPI CAN eTPU for I O handling serial communications motor timing engine control applications MOD54415 250 MHz processor with 32MB flash amp 64MB RAM 42 GPIO 8 UARTs 5 C 3 SPI 2 CAN SSI 8 ADC 2 DAC 8 PWM 1 Wire interface NANO54415 250 MHz processor with 8MB flash amp 64MB RAM 30 GPIO 8 UARTs 4 l C 3 SPI 2 CAN SSI 6 ADC 2 DAC 8 PWM 1 Wire interface gcc es The goal Control configure or monitor The method Create and deploy appl
55. SOURCES C O Flynn Using Internal Logic Analyzers for FPGAs Circuit Celar 279 2015 ProgrammableLogicIn Procuce CON Yat for reset EXTERNAL HARDWARE CONTROL Now lets get into something more interesting interfacing external hardware to the HCS I ll go through two examples here interfacing to a serial port and interfacing to DDR memory Figure 2 shows the general format Note that there are suddenly two clock domains the test bench clock being generated by the HCS controller logic and the clock connected to your hardware module Crossing clock domains is always important in FPGA designs and this is no different If you are unfamiliar with the usual techniques see a suitable FPGA reference I ll use two standard techniques a first in first out FIFO to pass data between the clock domains and a simple l n JT AG CoSim B Il L Wrapper 100 MHz 66 6 MHz Xilinx Inc ISim Hardware Co Simulation Tutorial Accelerating Floating Point FFT Sim ulation Application Note UG817 2012 ISim Hardware Co Simulation Tutorial Interacting with Spartan 6 Memory Controller and On Board DDR2 Memory Application Note WiGrsnks 20i SOURCES ISE Design Suite ISE WebPACK design soft ware PCI Express IP Avnet Spartan 6LX9 MicroBoard Platform Cable USB ChipScope ILA ILC and Spartan 6 FPGA SP601 Evalu ation kit Xilinx Inc www xilinx com handshaking protocol for some basic status
56. THERNET ON AN FPGA As its name suggests the appeal of an FPGA is that it is fully programmable Instead of writing software you design hardware blocks to quickly do what s required of a digital design This also enables you to reprogram an FPGA product in the field to fix problems on the fly But what if you are an individual electronics DIYer rather than an industrial designer DIYers can find FPGAs daunting This Circuit Cellar issue should offer reassurance at least on the topic of UDP Streaming on an FPGA That s the focus of Steffen Mauch s article for our Programmable Logic issue p 20 Ethernet on an FPGA has several applications For example it can be used to stream measured signals to a computer for analysis or to connect a camera via Camera Link to an FPGA to transmit images to a computer Nonetheless Mauch says most novices who start to develop FPGA solutions are afraid to use Ethernet or DDR SDRAM on their boards because they fear the resulting complexity Also DIYers don t have the necessary IP core licenses which are costly and often carry restrictions Mauch s UDP monitor project avoids such costs and restrictions by using a free implementation of an Ethernet streaming device based on a Xilinx Spartan 6 LX FPGA His article explains how to use OpenCores s open source tri mode MAC implementation and stream UDP packets with VHDL over Ethernet Mauch is not the only writer offering insights into FPGAs For more ad
57. The reader s firmware and the associated PC software sup port programming using any NET language 484 pages ISBN 978 1 907920 14 1 72 50 Embedded Linux Made Easy Today Linux can be found running on all sorts of devices even coffee machines Many elec tronics enthusiasts will be keen to use Linux as the basis of a new microcontroller project but the apparent complexity of the operating system and the high price of development boards has been a hurdle Here Elektor solves both these problems with a beginners course accompanied by a compact and inexpensive populated and tested circuit board This board includes everything necessary for a modern embedded project a USB interface an SD card connection and various other expansion options It is also easy to hook the board up to an Ethernet network Populated and tested Elektor Linux Board Art 120026 91 93 30 Elektor is more than just your favorite electronics magazine It s your one stop shop for Elektor Books CDs DVDs Kits amp Modules and much more www elektor com store Hektor Elektor US 111 Founders Plaza Suite 300 East Hartford CT 06108 USA Phone 860 289 0800 Fax 860 461 0450 E mail order elektor com RESET nt Android Elektorcardioscope Instructive fascinating and potentially useful to everyone perform your own electrocardio grams on your Android smartphone or tablet The project involves skillful
58. You don t know unless you know the esoteric compression algorithm efficiency on the particular data you want to write We have worked around this algorithmically but it is nontrivial In addition it can have a fairly long boot time on large i e greater than 32 MB flash drives It also uses significantly more RAM than the other options For us JFFS2 s primary disadvantage is with larger flash drives We are not convinced it works well on systems above 64 MB Yet Another Flash File System V 2 YAFFS2 In 1975 a friend of mine kept going on and on about YACC yet another compiler compiler I didn t even know why you needed a compiler to compile compiler code Around 2001 the YAFFS2 creators reached back into that bit of history to create YAFFS We are currently using YAFFS2 on one system Under our tests it has proven to be very robust across thousands of power failures occurring during disk writes According to the Yaffs website it has been crash tested hundreds of thousands of times Due to its architecture YAFFS2 boots up much more quickly on large drives than JFFS2 YAFFS2 takes significantly longer to remove a file than the other options We have very limited experience with quantities of these in the field so talk to me in a few years We chose it because it came with the SBC we were using Unlike JFFS2 YAFFS does not contain built in compression Unsorted Block Image File System UBIFS Considered the successor
59. a traditional computer lab By adding actuators and sensors these low cost SBCs could become fully fledged robotic platforms Leveraging the common I C protocol adding chains of these sensors would be incredibly easy The SBCs could even be paired with microcontrollers to add more functionality and introduce students to embedded design There are many ways to introduce students to programming robot computers but I believe that a web based interface is ideal By setting up each computer as a web server students can easily access the interface for their robot directly though the computer itself or remotely from any web enabled device e g a smartphone or tablet Through a web browser these devices provide a uniform interface for remote control and even programming robotic lo see a video of a web based interface go to circuitcellar com ccmaterials platforms A server side language e g Python or PHP can handle direct serial I2C communications with actuators and sensors It can also wrap more complicated robotic concepts into easily accessible functions For example the server side language could handle PID and odometry control for a small rover then provide the user functions such as right left and forward to move the robot These functions could be accessed through an AJAX interface directly controlled through a web browser enabling the robot to perform simple tasks This web based approach is great for a
60. ace R3 with the updated com ponent by going into the Component Properties and clicking the Change button see Figure 3 The Change Component window will then open so that you will be able to select our new resistor from the library Now when you click the BOM Quote button the RS website will recognize the modified 100R resistor Some parts like the LED will be difficult to match with just the component name so you could set the RS part number in the RS Part Number field instead Then just update the component instead of changing the component Once all the components have been updated then you can create an order pad by pressing Add accepted items to order pad where you can see the total costs and place an order PCB Quotation We ll also need a printed circuit board if we re going to make our design so let s try using DesignSpark s PCB quoting function As part of the quoting process DesignSpark will check if you ve run a design rule check DRC on the board and that it s within the design limits for the service I had problems using Chrome as my default browser when trying the quotation func tion so I used Internet Explorer for the rest of the quotation process If you try and quote the circuit board as is DesignSpark will warn you that the board is too small because the minimum size for quoting is 30 mm x 30 mm and our board is 20 mm x 20 mm If you ignore the error and try and get a quotation anyway the quotation web si
61. arts to make circuits of your own a free subscription to Device Cloud fully customizable widgets to monitor and control connected devices an open source application that enables two way communication and control with the devel opment board over the Internet and cables circuitcellar com CLIENT PROFILE accessories and everything needed to connect to the web The Cloud Kit costs 149 Circuit Cellar prides itself on presenting readers with information about innovative companies products and embedded technologies This space is where organizations services relating to Circuit Cellar enables clients to present readers useful information special deals and more Loudspeaker Design Gay Cookbook BT Yanie Hri sias qm edition 2 Speaker Building Ee EN iy 201 Ai T ba By Alles N d 19 JSIYdY3LN3 3 AYLSNANI e e ON dE LEO E ee EE Beeeceeceeweeese eee eee 295 EL i lad Tes i 1 t ANA OFF 2 h m om a L OFF 20 C a LJ 0 OFF ath 4 O lU 20 un LLI c t LLI T CIRCUIT CELLAR DECEMBER 2013 281 UDP Streaming on an FPGA When implementing a high performance network device with an FPGA you don t always have to use a proprietary IP core User Datagram Protocol streaming is another option and it s not as difficult as it may seem The article shows that a hardware implementation without a processor is a practica
62. at the output transistor never has a simultaneously high voltage across its terminals and a high current going through it This may seem impossible but remember that an RF amplifier is only used for a narrow frequency band around the RF carrier frequency This enables you to use two tricks to design a Class E amplifier First as for Class D amplifiers the transistor must be used as much as possible as an on off switching device and not in its linear region as with Class C amplifiers This requires a proper biasing and a very fast transistor Second a specific tuning of the output impedance matching filter could ensure that the voltage across the transistor is minimal when the transistor switches from one state to the other Basically the output filter must have the proper complex impedance to introduce the required phase shift between current and voltage Going into further detail would require a full article If you are interested I recommend you read N O Sokal s Class E RF Power Amplifiers QEX magazine 2001 I have a final word about Class F This is an improvement to Class E optimizing the impedance matching circuits one step further to reduce the effects of harmonics and increase the efficiency a little more Similar to Class E Class F is only suitable for narrow frequency bands so it is mainly used for RF applications circuitcellar com Optical Encoder Pair Kit for Micro Metal Gearmotors ITEM 42590 Compatible G
63. ating this pulse takes approximately 40 ms This delay is not as critical as the other parts of the timing signal It is essentially the dead time between control signals If you repeat the control pulse too quickly i e 10 ms the servomotor will buzz and jitter If you repeat the control signals too slowly i e 70 ms the servomotor will shut off between signals and its position will not remain constant With the Servo app the repetition rate can be controlled for all PWM outputs between 1 and 250 ms see Photo 1 Each pulse output is 5 to 95 of the repetition rate This is a problem for servomotors If you wanted to set a minimum 1 ms pulse you d need a 20 ms repetition rate so that 5 would equal 1 ms 20 ms x 0 05 ms At 95 the pulse would be 10 ms no more than 2 ms is needed So you will need to limit the pulse to 10 or use a lower repetition rate I found that a 4 ms repetition rate worked well with my servomotors without an annoying buzz However the PWM API is not designed to run servomotors The outputs can source or sink up to 8 mA to control LED brightness or motor speed Many motor drivers operate with PWM inputs such as the old favorite Texas Instruments TI L923D quadruple half H drivers or TI s newer DRV8835 Two modes can often be used with these drivers the PWM and direction control and the PWM and enable control The first uses the PWM to determine the 0 to 100 speed The direction control se
64. ational brings the Internet of Things to the popular XBee platform Built around Digi s new XBee Wi Fi module which fully integrates into Device Cloud the kit is a simple way for anyone with an interest in M2M and the Internet of Things to build a hardware prototype and integrate it into an internet based application This kit is suitable for electronics engineers software designers educators makers and innovators of all kinds GET STARTED 149 00 XBee Wi Fi Cloud Kit Kit contains an XBee Wi Fi module a development board with a variety of sensors and actuators a variety of loose electronic prototyping parts for making circuits of your own and cables accessories and everything needed to connect to the web minus the AP Ce DEVICE w7 CLOUD by QCETHERIOS O loTASAP XBee By eri asiestwaytoadd WIE ul FSS 0 og9jl3t to SS ITO We Interne KORNES The fastest and easiest way to explore and develop Internet connected devices and circuits Free open source application enables two way communication and control with the development board over the internet Fully customizable widgets for simple monitoring and control of connected devices Free limited subscription to Device Cloud by Etherios Your M2M Expert 18 INDUSTRY amp ENTERPRISE CIRCUIT CELLAR DECEMBER 2013 281 PRODUCT NEWS SMALL SELF CONTAINED GNSS RECEIVER TM Series GNSS modules are self contained high performance
65. ator NAN When did you transition from engineering to teaching What prompted this change MARILYN Actually being a professor and teaching in a classroom have surprisingly little to do with each other I spend a lot of time funding research writing proposals and dealing with students I spent five years at Bell Labs before moving to Princeton NJ I thought moving to a new environment would challenge me which is always good And although we were circuitcellar com 11 QUESTIONS amp ANSWERS very well supported at Bell Labs ultimately we had only one customer for our ideas At a university you can shop around to find someone interested in what you want to do NAN How long have you been at Georgia Institute of Technology s School of Electrical and Computer Engineering What courses do you currently teach and what do you enjoy most about instructing MARILYN I recently designed a new course Physics of Computing which is a very different take on an introduction to computer engineering Instead of directly focusing on logic design and computer organization we discuss the physical basis of delay You can talk about an amazingly large number that we can provide of problems involving just inverters and RC circuits 9 huge amoun of We relate these basic physical phenomena to computational power systems For example we figure out why dynamic ON single chip RAM DRAM gets bigger but not fas
66. bs corn LITILTU EUER Stand Alone Field Programmer Power from target device or adapter Program file stored on SD CARD Programming options stored in file Single button operation starting at 79 95 Program in circuit or use adapters for unmounted chips Zero Insertion Force Adapters available for DIP SOIC SSOP TOFP and more PIC is a registered trademark of Microchip Technology Inc in the USA and other countries Revolutionary new _ circuitcellar com 79 Ultrasonic Distance Sensing Made EZ LV Max Sonar Ez Mast popular MaxSonar Multipla interfaces Easy integration 1 inch rasolution Calibrated baam pattar ne Starting at 29 95 HRXL Max Sonar WR High naa tolaranca zo IPG rated 1 mm iraszalution Multt Sansor operation Calibrated baam pattarn Starting at 100 05 XL MaxSonar Ez7 Graat for WA s and robotics Incredible noisa GE immunity Small in siza 10m rasolution Automatic calibration Starting at 39 95 www maxbotix com LISTEN TO YOUR MACHINES Ethernet PLCs for OEMs FMD88 10 and FMD1616 10 In tegrated Features ETHERNET Modbus TCP IP 16 or 32 digital L s 10 analog 1 Os R3232 and R5465 LCD Display Port 1 0 Expansion Port Ladder BASIC Programming 229 and 295 before OEM Qty Discount tel 1 877 TRI PLCS web www tri plc com cci htm TRIANGLE Tie RESEARCH INTERNATIONAL
67. ch can handle 10 100 1000 Mbps Ethernet The TE0600 has a baseboard so I didn t have to develop a board to get started OpenCores s tri mode MAC is published under the GNU Lesser General Public License LGPL and was created in 2005 The description language is Verilog however it is usually not a problem to mix Verilog and VHDL in one project While a User Datagram Protocol UDP core is available from OpenCores I did not use the core in my project I chose a UDP because it is much simpler to implement than a TCP IP For example you do not have to retransmit packets if they become corrupted or lost during transmission Furthermore the UDP is superior for streaming data whenever the data integrity is not so important or the latency has to be kept minimized WHY ETHERNET ON AN FPGA One goal of Ethernet on an FPGA may be to stream a lot of measured signals to a computer to analyze display or save It can also be used to connect a camera over Camera Link to the FPGA and stream the captured images to a computer Another goal could be to stream signals to the FPGA from a computer to have a signal generator with a lot of output channels There are complete solutions for these kinds of problems They are available as National Instruments LabVIEW cards or DSpace software but they are expensive and they are usually not customizable Yet another advantage to using an FPGA is the ability to connect special hardware without any fur
68. ch clock to the free running hardware clock In reality remember the test bench clock typically runs much slower than the free running hardware clock For certain signals you may get away with very basic methods to cross the clock domain due to this assumption However you should still be careful of the possibility of a metastable event being pushed into your free running clock domain MEMORY TEST Let s move onto another example I will demonstrate how to use HCS to test a DDR memory interface This example is typical of any high speed interface Often you want to validate that the hardware works before going deeper into the design validation process This means testing the board layout the soldering of a prototype version and even just general design principles For DDR the design tools I used Xilinx ISE have a memory interface generator MIG which gives you a fairly high level interface to the DDR memory A tiny wrapper ABOUT THE AUTHOR Colin O Flynn coflynnQnewae com has been building and breaking electronic devices for many years and is currently completing a PhD at Dalhousie University in Halifax NS Canada His most recent work focuses on embedded security but he still enjoys everything from FPGA development to hand soldering his prototype circuits Some of his work is posted on his website at www newae com around that generated core can be produced with minimal effort On top of that there is a simple test ben
69. ch other that is X X When this happens the circuit resonates at the following frequency 1 2nVLC MATCHING REQUIREMENTS This is when things become interesting particularly in communications be it digital e g the USB protocol analog or RF Even a PCB layout needs to respect impedance matching requirements Take a microprocessor running at a relatively slow 100 MHz clock speed One requirement for a reliable digital operation is a crisp clock i e a rectangular clock waveform with short rise and fall times A rectangular wave is composed of its fundamental frequency and several of its odd harmonics Generally all odd harmonics up to about the 15th are needed for a reasonably crisp clock Now lets do the math The 100 MHz clock s 15th harmonic is 1 500 MHz Its wavelength A Greek letter lambda is approximately 200 mm 199 862 mm to be precise A PCB trace or a conductor with a length exceeding A 8 begins to behave as a transmission line In our example this would be 25 mm or a little less than 1 Such a length is easily exceeded if the clock is distributed to several ICs When a connection becomes a transmission line it exhibits a characteristic impedance based on its physical properties and the line must be terminated at both ends The source and the load impedances must match that of the transmission line This is not just to ensure maximum power transfer which may not be needed but if
70. ch that validates the calibration procedure along with some simple read write tests In this example you could even use the provided simulation models to first validate your test bench But if you are targeting other interfaces you may not have such a luxury Xilinx s Application Note UG818 provides an example of this with DDR2 on the Spartan 6 FPGA SP601 board see Resources I ve modified it to use the LPDDR on the Avnet LX9 MicroBoard Figure 4 shows the test setup s design principles The entire design is minimal around 500 lines of Verilog code most of which is port interfaces The MIG tools also produce a synthesizable test system but the A As low as 9 95 each Unmasked boards ship next day www apcircuits com VISA MERLEG CERE Bal EE d L EE I ELECTRONICS INDUSTRIES AP CIRCUITS PCB Fabrication Since 1984 Two Boards Two Layers Two Masks One Legend point of this example is that you can use HCS to quickly validate any high speed interface This is especially helpful if PCB engineers are looking for feedback validation of their layout before you ve had time to invest in the FPGA development VALIDATION DONE Hopefully this article has shown you how HCS can make your life easier If you want to follow along visit ProgrammableLogicIn Practice com for complete source code and project files Videos also demonstrate the example projects so even if you don t have the specific boards I
71. compile option can also cause odd sounding error messages and you may still have to occasionally use the Cleanup Project Files command under the project menu to clear everything C est la vie On a similar note You won t get nice synthesis results reports in the project navigator showing you warnings that may be important You can run synthesis as part of normal implementation if you want these reports If you re using Verilog I also encourage you to use default nettype none at the start of each file to disable the default behavior that enables implied net creation USING CHIPSCOPE WITH HCS In my previous article I introduced you BSCAN CaSim User 100 MHz User Clk to ChipScope Xilinx s ILA You can use these tools alongside HCS by sharing the JTAG connection Within the FPGA you need to specify that you want the ChipScope core to use a non default boundary scan connection since HCS always uses the default block The default block connection is via USER1 so instead you need to use another connection e g USER2 for the ChipScope integrated logic controller ILC You can select this when inserting the ILC block Once you ve appropriately configured the device you can run the simulation with HCS A few special commands are required to enable ChipScope and HCS to share the JTAG connection Command 1 Start iSim hit the Restart button Command 2 Start the ChipScope Analyzer and then hit Connect Command 3
72. computing than by building a robot around one The first version of this language is available on his website walterkrawec org He has plans to release an improved version THOUGHTS ON EMBEDDED TECH Walter said he is amazed with the power of the latest embedded technology for example the Raspberry Pi For less than 40 you have a perfect controller for a robot that can handle incredibly complex programs Slap on one of those USB battery packs and you have a fully mobile robot he said He used a Pololu Maestro to interface the motors and analog sensors It all works and it does everything I need However he added If you want to build any of this yourself by hand it can be much harder especially since most of the cool stuff is surface mount making it difficult to get started PC Oscillos up to 200 MHz UART AW Gs p SPI ua SPECTRUM ANALYZER M ask tests cc GS s 5 COLOR PERSISTENCE Advanced triggers Ap Perses Be De Yoon Memmen Tees thi L de dQ mue d FFT Serial decoding PERSISTENCE DISPLAY MEASUREMENTS amp STATISTICS PASSP ORT xd 1900 see United Stai of Americe O Outstanding speed optimizations enable IAR Embedded Workbench to generate faster code than ever before With the shortest possible execution times It is the ultimate choice for developing low power applications The world leading C C compiler and debugger tool suite with the broade
73. ction test_pressure converts the ADC reading to engineering units before making the threshold comparison This is a direct obvious way to implement such a function The second function test_pressure2 converts the threshold value to an equivalent ADC reading so that the two can be compared directly The key difference is in performance The first function requires that arithmetic be done on each reading before making the comparison However the calculations in the second function can all be performed at compile time which means that the only run time operation is the comparison itself ANSWER 2 First of all note that there are really only four inputs and three unique outputs for this function since input E is always 1 and outputs GHI are always 0 The only real outputs are F plus the groups JK and LM Since the other 27 input combinations haven t been specified we can take the output values associated with all of them as don t care The output F is simply the inversion of input C The output JK is high only when A is high or D is low The output LM is high except when B is low and C is high Therefore the entire function can be realized with a total of five gates see Figure 1 ANSWER 3 The original 10 Mbps Ethernet standard was jointly developed by Digital Equipment Corp DEC Intel and Xerox It was released in What s your EQ The answers are posted at You can quizmasters at eq circui
74. dating While using OpenCore s tri mode MAC the implementation is based on an open source core which enables its use without any fear of copyright infringement This design could be easily expanded I kept the implementation simple without much error handling If the transmitted data must always be correct then some checksum and handshaking has to be implemented but often it does not really matter The complete Xilinx ISE project and the Qt4 application with source files are available on the GitHub online project sharing DOWNLOAD our free CAD software ideis Mar ae aca DESIGN your two or four layer PC board SEND us your design with just a click RECEIVE to boards in just days b EF M Ex 4 a I A z P2 a a A A pjata R exbresspcb com 26 Uu LLI cc t LEI LL CIRCUIT CELLAR DECEMBER 2013 281 Calibration Part 2 Polynomial Curve Fitting The first part of this article series introduced linear calibration and recalibration of A D conversion readings It described how to convert A D readings to real world engineering unit values The article also explained how to convert back from those values to the equivalent A D readings This article presents a method for fitting a polynomial curve to nonlinear data to perform nonlinear conversions It also outlines an approach that converts back from the engineering units to the A D readings By David Cass Tyler USA The gr
75. ddress ReadData 0x33 7 bit address ReadData 0x33 7 bit address Reset 0x34 0x00 FT311D Pin Number UART_TXD 23 UART_RXD 24 UART_RIS 25 UART_CTS 26 UART_TX_ACTIVE 29 data bytes to the I2C Slave device Note the WritePort command is also returned to inform the application of the data transfer s success ReadPort enables the application to request a number of data bytes from the I2C Slave device Note the ReadPort command is also returned to inform the application of the data transfer s success and to pass the data back to the application Should the I2C interface need to be reset and configured as all inputs the application may use the Reset command The UART interface consists of five signals see Table 7 Here there is just one command SetConfig which uses an eight byte command format see Table 8 SetConfig enables the application to define the UART s configuration and must be sent before any data is transferred Once configured the application is free to send and or receive blocks of up to 256 bytes of data For light loads handshaking unnecessary To move a large amount of data the RTS and CTS lines should be used The last two interfaces are SPI Master and SPI Slave While the interfaces use the same four signals they are configured differently depending on whether you want to emulate a master or a slave device Table 9 shows how Byte3 Byte4 Byte N 0x00 0x00 0x00 Options N Data bytes u
76. de to use Like the I2C mode it requires just two lines TX and RX These are TTL level signals not the inverted RS 232 levels associated with an asynchronous serial port link This means all data idles at logic 1 Asynchronous means the clock is not transmitted along with the data While the format must be predetermined each 10 bit packet s starting edge is used to sync the data with the predetermined clock The packet format consists of a start bit the number of data bits any parity bit the number of stop bits that s 10 bits using the 8 none 1 bit format The clock speed or baud rate has a broad number of standard speeds Photo 4 shows how I attached a current probe project to the UART application This circuit continually measures the current that passes through an attached probe All commands and replies for this project are in ASCII formatted text Three commands are used RC read current RP read probe type and WP z value write probe type RC returns the present measured value in milliamperes as C value mA RP returns P value The write probe type command also returns P value The probe type is the maximum amps for which the probe is designed and changes the measurement values scaling TIED DOWN OR UNLIMITED POTENTIAL RELEASED Multimeters are great tools They have portability that enables them to be brought to wherever a measurement must be made An Android device has this same ability Since a
77. e high quality and high performance Ethernet solutions From Ethernet Visit www microchip com connectivity Switches Controllers Bridges and PHYS to a variety of standard interfaces serving for more information consumer industrial and automotive applications Microchip can provide a solution to address your varied application needs and offers you the support needed to reduce your time to market AN MICROCHIP Microcontrollers Digital Signal Controllers Analog Memory Wireless The Microchip name and logo the Microchip logo dsPIC MPLAB and PIC are registered trademarks of Microchip Technology Incorporated in the U S A and other countries All other trademarks are the property of their registered owners 2013 Microchip Technology Inc All rights reserved 06 13 10 gt gt z i UO CIRCUIT CELLAR DECEMBER 2013 281 QUESTIONS amp ANSWERS NAN Do you remember your first computer engineering project MARILYN My dad is an inventor One of his stories was about using copper sewer pipe as a drum memory In elementary school my friend and I tried to build a computer and bought a PCB fabrication kit from RadioShack We carefully made the switch features using masking tape and etched the board Then we tried to solder it and found that our patterning technology outpaced our soldering technology NAN You have developed many embedded computing techniques from hardware software co de
78. e Custom Units amp Uo Smart Units Fiber Optics lsolators v Industrial 3 0 KV Isolation Vsaelig Call the RS485 Wizards h 513 874 4796 cleverscope com mim www rs485 com 2 DESIGNSPARK PCB acr By Neil Gruending Canada Edit details Ignore row Requested Man Part No NPN MMBT3S04 Manufacturer v View full product details Figure 1 Best matching of the generic type code NPN MMBT3904 to RS Components part numbers Figure 2 Here we find the RS Components part numbers for 3k6 3 6 kQ and 3k9 3 9 kQ SMD resistors E Ignore row DesignSpark Tips amp Tricks Day 6 After the layout Today we re going to use the DesignSpark online BOM and PCB quoting tools to find out how much it would cost to build our example project These tools can be a great time saver J Accept MMBT3904LT1G Accept MMBT3904LT1G ON Semiconductor ON Semiconductor 545 0343 545 0343P so 50 uid BOM Quotation In our last installment we generated a bill of mate rials BOM as a spreadsheet that could be used to manually order the parts we need for the board Some supplier websites will let you upload your BOM to order your parts but DesignSpark cuts out the intermediate steps and connects to the RS Components website for you The website doesn t work worldwide yet but I hear that they re working on it For this article I set my locale to the United Kingdom Settings Preference
79. e and the receiver impedances are unbalanced The solution is to use a 1 1 balun i e a balanced to unbalanced transformer You can purchase it but it s easy to make one see Figure 3 Just add a loop of the coaxial 4 2 long which causes 180 phase shift of the signal and voil you have symmetry Half the wave length of a 315 MHz signal is 18 74 476 mm With a coaxial cable the RF wave does not propagate as fast as in vacuum therefore you must take the coaxial cable type s specific propagation velocity factor into account For RG213 it is 66 Consequently the loop s length will be 12 4 314 mm With the antenna installed the garage door opener range increased significantly The door can now be consistently operated from the road A GOOD UNDERSTANDING We encounter impedance matching issues daily especially when interfacing a diversity of electronic equipment Most of the time we purchase hardware with proper cables and terminations without even realizing impedance matching was designed in Nevertheless it s always good to understand what goes on behind the scenes Nurnberg Germany February 25 27 2014 its a smarter world Summit for Innovations The world s largest event for Embedded Technologies establish contacts and expand your network Media Partners elektron k Price compurer automation de PU neun dd und Elektronik LINES elektronik automotive EET i
80. e flaps and controls to make the best use of that sensor data One challenge of jet engines is the high temperatures Jet engines are so hot that some parts of the engine would melt without careful design We need to provide more computational power while living with the restrictions of high temperature electronics NAN Your research interests include embedded computing smart devices VLSI systems and biochips What types of projects are you currently working on MARILYN I m working on with Santiago Grivalga of Georgia Tech on smart energy grids which are really huge systems that would span entire countries or continents I continue to work on VLSI related topics such as the work on error aware computing that I pursued with Saibal Mukopodhyay I also work with my friend Shuvra Bhattacharyya on architectures for signal processing systems As for more unusual things I m working on a medical device project that is at the early stages so I can t say too much specifically about it NAN Can you provide more specifics about your research into smart energy grids MARILYN Smart energy grids are also driven by the push for greater efficiency In addition renewable energy sources have different characteristics than traditional coal fired generators For example because winds are so variable the energy produced by wind generators can quickly change The uses of electricity are also more complex and we see increasing opport
81. e remote desktop to program on other Windows based systems There is seldom a time when I have to physically move to one of the other systems We d like to know about your workspace Send our editors your photos and information Need to Stay Connected Learn About Microchip s USB and Networking Solutions USB GETTING STARTED IS EASY USB technology can be found in practically all applications and markets from consumer industrial and automotive segments The extreme proliferation of USB I you need USB or Networking has even led to the adoption of the technology as an embedded chip to chip high connectivity in your product design bandwidth interface Microchip has been enabling such uses applications and markets Microchip s broad line of proven and with seamless USB connectivity by delivering integrated value rich solutions such as reliable solutions cover all main market USB hub controllers power delivery and charging transceivers switches Flash media segments and applications including controllers and security m Consumer electronics Ethernet T m Industrial equipment and control Ethernet devices have become ubiquitous in communications and networking products servicing a wide variety of applications across multiple market segments m Automotive This well understood technology provides a robust link to ensure reliable x Medical communication between devices in a network Microchip has a broad portfolio 7 mM B of reliabl
82. earmotors 58 6 i Add quadrature encoding to your micro metal gearmotors e 3 and 5 tooth wheels included e 3 3Vand 5 V versions available e Works with our growing assortment of gearmotors with extended AR back shaft Premium Jumper Wires STARTING AT ES Make prototyping connections quickly and easily with these high quality jumper wires available with male or female terminations in a variety of lengths and colors CP2104 USB to Serial Adapter Carrier ITEM 1308 This adapter features a micro USB connection and provides access to all of the CP2104 s control signal pins and GPIO User programmable in C C sample programs available solving and line following 38 kHz IR Proximity e Sensor Te ITEM 2460 3595 Typical sensing range up to 24 60 cm e Fixed gain modulated IR detector e Small size 0 4 x 0 6 ES Simple Motor Controller 18v15 ITEM 1377 s 3995 Highly configurable DC motor controller that supports four interface modes USB TTL serial analog voltage and hobby radio control RC 3pi Robot ITEM 975 0995 BE e Ships fully assembled with motors LCD Assembled with 75 1 HP Motors ITEM 2506 0995 p Arduino controllable with library support and example sketches Includes six IR reflectance sensors for line following or edge detection Small enough for mini sumo less than 10 cm x 10 cm Individual parts and kit version a
83. eater the number of observed values across the measurement range the better and more accurate your fit will be xperimenting with a new project often means instrumenting it to gather data about what is going on Part of that instrumentation process involves properly calibrating the inputs to get precise and accurate readings By precise I mean taking measurements with sufficient resolution decimal places to see the tiny changes Accurate means taking exact measurements When an input reads 5 V I want to know that the actual value is equal to or greater than 4 95 V and less than 5 05 V I don t know for certain that second decimal place s value but I do know the exact value rounded to the first decimal place The first part of this article series explained how to calibrate and recalibrate linear measurements where real world engineering units vary proportionally to the ADC values Just like everything else the real world does not always act that way Not all measurements wind up being linearly proportional So how can you handle mysterious unknown values You can take a series of measurements across the full range of inputs and produce a curve that fits them and a method to calculate the exact values The greater the number of observed values across that measurement range the better and more accurate your fit will be The best way to figure this out is to start by taking three readings at low midd
84. ector even without an input signal s presence this implies poor efficiency In fact a basic Class A amplifier s efficiency is barely more than 30 It could be increased to 4096 if the collector load is replaced with a coupling transformer but that s still low And this poor efficiency means heat As an example assume you want to build a stereo 2 x 100 W Class A amplifier If you do the math you ll find that around 300 W would be continuously dissipated in the amplifier s transistors This would be enough to keep your room at a warm temperature CLASS B How can you improve an amplifier s efficiency You want to avoid a continuous current flowing in the output transistors as much as possible Class B amplifiers use a pair of complementary transistors in a push pull configuration see Figure 3 The transistors are biased in such a way that one of the transistors conducts when the input signal is positive and the other conducts when it is negative Both transistors never conduct at the same time so there are very few losses The current always goes to the load Plenty of variants exist e g with coupling transformers but a Class B classification always means each transistor conducts 50 of the time A Class B amplifier has more improved efficiency compared to a Class A amplifier This is great but there is a downside right The answer is unfortunately yes The downside is called crossover distortion The problem
85. electric Ramtron was recently acquired by Cypress This table compares the performance attributes of different emerging memory technologies PHOTO 5 Cypress Semiconductor s FM6124 QG is a complete SoC Photo courtesy of Cypress Semiconductor This behavior is similar to ferromagnetic materials placed inside magnetic fields when they can be polarized to become permanent magnets This similarity is why the term ferro exists in the word ferroelectric otherwise these two classes of materials have little in common A class of materials called perovskite has often been used in ferroelectric memory cell applications The permanence of induced electrical polarization in ferroelectric capacitors endows FRAMs with their nonvolatility To write a particular bit a FRAM s cell capacitor is briefly charged in one direction to polarize the ferroelectric material between its plates The capacitor voltage can then be removed and the bit state will be retained in the directional sense of the dielectric material s polarization No charges may leak away and the polarization can be maintained for many years making FRAM in a sense a nonvolatile analog of DRAM Figure 3 shows a FRAM cell s organizational structure The ferroelectric capacitor is connected to one of the cell selector transistor s terminals the other terminal is the bit line The transistor s gate is connected to the word line When both the bit and word lines are driven hig
86. erformed in the application It avoids the overhead of processing at the network interface level and makes the hardware processing e g FPGAs a lot easier Time sensitive applications e g real time data streaming often use UDP because dropping packets is preferable to waiting for delayed packets In a real time system e g video streaming it is not a good option to wait for delayed packets Figure 2 shows the UDP packet structure when using IPv4 The checksum over the data is optional If it is not used it is normally set to 0x0000 Note When developing an Ethernet application or Ethernet capable devices it is helpful to use a packet sniffer e g the Wireshark free network protocol analyzer to analyze the packets OPENCORES S TRI MODE MAC The 10 100 and 1 000 Mbps tri mode Ethernet MAC implements a MAC controller and is licensed under the LGPL so it is open source The implementation conforms to the IEEE 802 3 specification The MAC was designed to use less than 2 000 logic cells logic elements to implement full function and is written in Verilog A GUI circuitcellar com QUdpSocket udpSocket new QUdpSocket this DOO Tes s ME port SES res udpSocket bind QHostAddress QString temp Jp exe E EE SEN lt 7 TNI QeurIDeLPes f SUCCESSFUL 3 IRR lt lt ff connects listener connect iudpSocket is available to configure optional modules first in first out FIFO depth a
87. erial separated by a thin layer of a material that is both nonmagnetic and nonconducting One magnetic layer is made from a magnetically hard material and has a fixed permanent magnetic orientation The other layer is made from a magnetically soft material and is capable of switching its polarity from one orientation to the opposite one This switch can be affected in a few nanoseconds by a current flowing into the magnetically soft layer whose magnetic orientation is free to rotate The cell can be read by passing a current vertically through the MTJ This current tunnels through the insulating layer between the two ferromagnetic layers If the two ferromagnetic layers have the same magnetic orientation then the cell has a low magnetoresistance and a large current flow On the other hand if the two layers have antiparallel orientation then the cell s magnetoresistance is high and a smaller current flows through it Figure 2 shows the structure for a spin torque MRAM By measuring the current flow it is possible to tell the two magnetic orientation states apart and thus the bit stored in the MRAM cell Laboratory tests have consistently shown that MTJs magnetic states are very stable and unaffected by mechanical thermal and magnetic shocks The rest of the circuitry needed to make a complete memory chip is essentially the same as with other CMOS solid state memory types Thus MRAMs present the same external interface and com
88. ering robotics to Internet and connectivity Circuit Cellar delivers the critical analysis you require to thrive and excel in your electronics engineering courses 66 COLUMNS CIRCUIT CELLAR DECEMBER 2013 281 FROM THE BENCH Unleash Your Android Device s Potential Future Technology Devices International s new interface chip turns your Android device into an effective application tool The chip can be added to any circuit enabling the Android device to serve as a user I O device By Jeff Bachiochi USA like to make or purchase little widgets using new technology I have an initial desire to learn about a new device before using it in a project Having a small circuit with an interface to the supported synchronous or asynchronous serial bus makes it compatible with most microcontrollers so it is easy to work with If you don t mind spending a little time writing some code on any small microcontroller based board you may have around you can exercise the new device Sometimes a manufacturer will offer a small circuit to demonstrate the new technology Many times this is priced low at cost or even less because manufacturers hope if you play with the circuit you will use it in a future design As a widget the interface bus enables you to connect it to any microcontroller based board such as the Arduino Arduino has library routines that enable me to communicate with any serial protocol and inco
89. es the attributes of these currently known technologies Despite some of the hype surrounding these emerging memory technologies it is reasonable to assert that no one memory will be universal i e capable of replacing all other types in a complex application Rather each will open up its own niche However it is clear that all the new memory technologies have strong performance attributes which will make them popular and enable higher performance digital systems The next few years will see some of these technologies becoming commonplace further expanding the options available to digital system designers Pp m A BETTER PEACE FOR ELEGHRONIGS Kis CISETSCUS o CRT CU e VISITES TUS n W e Over 600 electronics projects and kits for sale Electronic kits you won t find anywhere else All projects include components and instructions e Design your own kit We ll build it and pay you on every sale Join in the tun and visit us a oi Www CiubJameco com Kits 1 42 o z l o oO CIRCUIT CELLAR DECEMBER 2013 281 THE CONSUMMATE ENGINEER FIGURE 1 a The generator with its internal resistance Ry and the load resistance R is shown b The blue trace is the plot of the power dissipated by R vs Ry when Ry is constant The red trace shows the transfer efficiency dependence on an R R ratio According to Jacobi s law impedance matching is an important design
90. exchange When connecting your test bench to the UUT leave any external ports unconnected You ll also need a standard constraint UCF file which the simulator will use during implementation to map those unconnected ports to the correct physical pins In ISE modify the Simulate Behavioral Model process properties and add a flag e g hwcosim_constraints Avt_S6LX9_MicroBoard_ UCF_110804 ucf to the other compiler options field SERIAL KILLER Reports of the serial port s demise have been greatly exaggerated I m going to use it as a simple example of a computer interface Ultimately most interfaces end up being a method of shoveling bytes from the computer to your peripheral In that regard the serial port isn t so different from any other interface Let s look at how you can validate that your computer interface is working perfectly with the real computer Figure 3a shows the test block diagram Figure 3b shows the test s flowchart This example shows a few interesting things First the test bench running on the computer waits for a signal from the physical hardware to start the test This signal is the reset signal that is provided by a push button but you can imagine a variety of other areas where you want the test bench to wait for a hardware event The test bench uses a simple handshake to acknowledge the reset signal Second a dual clock FIFO is used to cross the clock domain from the test ben
91. exel aate muxo 877 777 N date MLX90614 ROS S date MLX90514 dare Lab X ert upxooel4 cec M xgo614 crc s 18 crc 208 pages ISBN 978 1 907920 20 2 47 60 Android Apps programming irib ILI Tale serial print digitalwrit digitalwE delay 34g Elektor Programming step by step Android Apps This book is an introduction to programming apps for Android devices The operation of the Android system is explained in a step by step www eleki Very Original Applications Mastering Microcontrollers Helped by Arduino Arduino boards have taken the world by storm since their initial development The aim of this book is not only to let you enter the World of Arduino but also to help you emerge victo rious and continue your microcontroller programming learning experience by yourself In this book theory is put into practice on an Arduino uno board using the Arduino programming environment Having completed this fun and playful course you will be able to program any microcontroller tackling and mastering I O memory interrupts communication serial PC SPI 1 wire SMBus A D converter and more This book will be your first book about micro controllers with a happy ending way aiming to show how personal applications can be programmed A wide variety of appli cations is presented based on a solid number of aa hands on examples covering anything fro
92. f it as using short straight lines to describe the curve The derived value can be fairly close if you fit enough line segments to the curve SPLINE INTERPOLATION Another way to process this data is to use something like a cubic spline interpolation to fit a smooth line through all of the known points so you can calculate unknown values lying between them 1 The method is similar to using a flexible ruler to connect the points D Calc Horner 56 0871 56 0871 5850000 580000 E2 0000 48 0900 44 0300 Az 0000 AZ 53857 0 00054 Ag 847 Coeff icients of Determination for Different Orders 2 R Ow iE 4 1514E 03 MEUS zin F 44208 04 28900E 02 3 0000E D T tora Second Order TIBET Led 512E H ww ci E ETET amp 23TTE D4 2 EISE Teen Rx RR S rsssseseal T80806 00 ea a Gol oowex mwa ma WHAT soe mua im men A RI LL HERES CSET 3809 E 04 O 000E 00 meweereme G 0000E 00 2 960009 QUE 70000 EXHI m LIS DUE Loww wh WU REC Oe 55088 a O FNA Of mH O stus BA LINESTI ESTL Nor a n Books such as W H Press et al s Numerical Recipes in C The Art of Scientific Computing provide the code necessary to use this method The disadvantage of these methods is the amount of programming involved and the difficulty of understanding There must be an easier way POLYNOMIAL CURVE FITTING USING EXCEL One of the more commonly occu
93. g signal anywhere In that case the PWM signal can be directly generated in the digital domain avoiding any quality loss Battery 1 8V 1 2 V Power mansgement 73 7 DM differential Flexaound D 3P Micraphane 2 difrerential Seven band parametric Steren equalier playback ADC y Dynamic range contral Digital audio Cantrol interface registers ar Digital biqued filter record This PWM signal is then amplified The beauty of the Class D architecture is that amplifying a digital signal can be done with high efficiency since the transistors are used as full on off switches Power dissipation only occurs during the transitions from one logic state to the other and can be minimized if the transistors are fast enough After this amplifying stage there is a high power signal but it s still in a PWM format How can you reconstruct the high power analog output you were looking for You can simply use a low pass filter Moreover if you are designing an audio amplifier then the loudspeaker itself could be part of the filter it is an inductor which reduces the bill of material As you may have guessed Class D amplifiers aren t free from difficulties First as for any sampling architecture the PWM frequency must be significantly higher than the input signal s highest frequency to avoid aliasing Nyquist sampling theorem says twice higher but this would require a perfect brick wall output filter To keep the fil
94. global navigation satellite system GNSS receivers designed for navigation asset tracking and positioning applications Based on the MediaTek chipset the receivers can simultaneously acquire and track several satellite constellations including the US GPS Europe s GALILEO Russia s GLONASS and Japan s QZSS The 10 mm x 10 mm receivers are capable of better than 2 5 m position accuracy Hybrid ephemeris prediction can be used to achieve less than 15 s cold start times The receiver can operate down to 3 V and has a 20 mA low tracking current To save power the TM Series GNSS modules have built in receiver duty cycling that can be configured to periodically turn off This feature combined with the module s low power consumption helps maximize battery life in battery powered systems The receiver modules are easy to integrate since they don t require software setup or configuration to power up and output position data The TM Series GNSS receivers use a standard UART serial interface to send and receive NMEA messages in ASCII format A serial command set can be used to configure optional features Using a USB or RS 232 converter chip the modules UART can be directly connected to a microcontroller or a PC s UART The GPS Master Development System connects a TM Series Evaluation Module to a prototyping board with a color display that shows coordinates a speedometer and a compass for mobile evaluation A USB interface enables sim
95. h the cell is selected and the desired memory operation is performed depending on the potential at the other end of the capacitor Several companies have active FRAM developments Ramtron International has worked on this technology for a long time Semiconductor and currently offers several FRAM devices Serial and parallel FRAM is available with capacities up to 8 Mb per device Photo 4 shows a Cypress 1 Mb parallel access FM28V100 Cypress also offers a low energy variety of FRAM with active current as low as 3 2 uA Cypress even integrated its FRAM module into the FM6124 QG a complete system on a chip SoC that is a standalone event recorder see Photo 5 Although this device is no longer available its development shows that FRAM blocks can be embedded into digital system ICs to obtain chips that do not require external memory support Texas Instruments also offers embedded FRAM products Its MSP430FR58 and 59 series microcontrollers feature up to 64 KB of integrated FRAM A big advantage of using FRAM in microcontrollers is that just one memory can be used for program data and information storage instead of having to use separate flash SRAM and EEPROM blocks which has been the trend so far This makes programming easier and also reduces power consumption Similar products are also available from Fujitsu RESISTIVE RAM Phase change memory uses programmed heat generating current pulses to affect memory cell
96. h0004 default value This register is used to set the Ethernet MAC core s speed level 16 h0004 means 1 000 Mbps 16 h0002 means 100 Mbps and 16 h0001 means 10 Mbps The default value could be changed in reg int v The speed register s value has to match the PHY s mode which the PHY has negotiated see the note below If the FPGA board is directly connected to a PC it is possible to limit a gigabit Ethernet card to 100 or 10 Mbps for example Note This implementation lacks the network speed s automatic detection which the PHY negotiates with the switch network card or whatever The automatic detection could be done by either using the 88E1111 PHY s status LEDs which is a kind of hack or using the MDIO interface to manually get and set the PHY s status see Resources for more information OPERATION MODE To send and receive UDP packets you must know each receiver and sender s MAC and IP address or use the ARP to resolve them see the Address Resolution Protocol section of this article In this implementation the FPGA sends a broadcast ARP request with its own MAC and IP and the IP address of the destination and waits for an ARP response When an ARP response from the destination IP address has been received data transmitting and data receiving begins Broadcast means circuitcellar com 25 ABOUT THE AUTHOR Steffen Mauch steffen mauch gmail com received his BSc in Electrical Engineering in 2010 and his MSc
97. he last thing I want you to notice is the charted point for X24095 See how it kicks back up at the end Even though the calculated polynomial passes exactly through each and every point it is not necessarily a good fit You have to use enough input points to describe the curve for the entire range in which you are interested You may have to use a different polynomial order and suffer the resulting loss of accuracy to get the most usable fit Always remember all these polynomials are just best guess estimates even if they are backed up with sound mathematics You the engineer have to make the final well reasoned decision DIGITAL TO ANALOG There is always the problem of converting back from your Y value to the corresponding X value I am including code to accomplish this as long as Y always increases or decreases as X increases Please note that for polynomials that are two or greater multiple X values 2 Freescale Semiconductor Inc MCF5282 and MCF5216 ColdFire Microcontroller User s Manual 2009 RESOURCES I Miller and J E Freund Probability and Sta tistics for Engineers 3rd Edition Prentice Hall 1985 W H Press S A Teukolsky W T Vetterling and B P Flannery Numerical Recipes in C The Art of Scientific Computing Second Edition Cambridge University Press 2002 can evaluate the same Y value I am going to specify that for any given Y there is a unique X value You are on your own to ans
98. henol BELDEN SSBRADY KROY General Cable CAROL PANDUIT DrO POWER TE Rite elementiu 0 000 Fhomas Betts 14 gt H Lam le UO CIRCUIT CELLAR DECEMBER 2013 281 MEMBER PROFILE MEMBER STATUS Walter has been reading Circuit Cellar since he got his first issue in 1999 Free copies were available at the Trinity College Fire Fighting Robot Contest which was his first experience with robotics Circuit Cellar was the first magazine for which he wrote an article An HC11 File Manager two part series issues 129 and 130 2001 TECH INTERESTS Robotics among other things He is particularly interested in developmental Research Assistant and PhD Student Stevens Institute of Technology Hoboken NJ e Upstate New York and evolutionary robotics where the robot s strategies controllers and so forth are evolved instead of programmed in directly RECENT TECH ACQUISITION Walter is enjoying his Raspberry Pi What a remarkable product I think it s great that I can take my AI software which I ve been writing on a PC copy it to the Raspberry Pi compile it with GCC then off it goes with little or no modification CURRENT PROJECTS Walter is designing a new programming language and interpreter for Windows Mac Linux including the Raspberry Pi that uses a simulated quantum computer to drive a robot What better way to learn the basics of quantum
99. i antenna to increase the gain and directionality I used a free YagiCAD program I had used in other projects for the design Figure 2 shows the antenna The driven element is a dipole with about 50 0 impedance theoretical dipole impedance is 73 Q The calculated gain is 7 7 dB with directionality in the horizontal plane also shown in Figure 2 The antenna gain is expressed as a ratio of its output to a theoretical isotropic antenna RESOURCES J Wetherall University of San Diego Imped ance Matching Network Designer 2001 Wikipedia Square Wave Frequency Spectrum Animation YagiCAD Antenna Design Software www yagi cad com with a spherical radiation pattern The gain is achieved by focusing the beam just like putting a reflector behind a light bulb I built the antenna with 0 5 plumbing copper pipe because it is easy to work with At 315 MHz the skin effect causes the surface current penetration of a mere 3 67 um so just about any stiff conductor would work To keep the construction simple I used a piece of wood for the boom and placed the antenna in the rafters above the garage RG213 coaxial cable is a good choice for connection to the receiver It is popular among Ham amateurs due to its characteristics i e 50 0 impedance reasonable price and low loss The receiver and the dipole are good match for the 50 Q coaxial cable The only problem is that the dipole s impedance is balanced while the coaxial cabl
100. ic but this is the concept Class G achieves this improvement by using more than one stable power rail usually two Figure 6 shows you the concept As long as the input signal is low enough the amplifier is a classic Class AB amplifier and uses a low voltage power supply When the signal amplitudes are higher another couple of transistors go into action supplied by a higher voltage power K Mcknight Doherty Amplifier Design Mi crowave Monolithic Integrated Circuit MMIC Course Johns Hopkins University 2009 D Self Audio Power Amplifier Design Handbook 5th Edition Focal Press 2009 N O Sokal Class E RF Power Amplifiers QEX magazine 2001 H Theiler H Lenhard and H Gether Class G H Amplifiers How Well Do They Deliver on Their Promise of High Audio Quality and Low Power Consumption ams AG Wikipedia Amplifier Class T amplifier Yamaha Corp Yamaha Power Amplifier White Paper 2008 SOURCES D Premier amplifier and ADH technology Devialet http en devialet com MAX98090 Ultra low power stereo audio codec Maxim Integrated Inc www maximintegrated com The detailed design is more complex in particular to reduce the distortion during the transitions between each mode The two power supplies must be generated through high efficiency DC DC switching converters as you don t want to reduce the transistors losses by increasing losses in the power sup
101. ications from The result Access device from the a device using Ethernet your Mac or Windows PC Get hands on familiarity Internet or a local area network LAN with the NetBurner platform by studying building and modifying source code examples The NetBurner Ethernet Core Module is a device containing everything needed for design engineers to add network control NetBurner Development Kits are available and to monitor a company s communications assets For a very to customize any aspect of operation low price point this module solves the problem of including web pages data filtering or network enabling devices with 10 100 Ethernet including custom network applications The kits those requiring digital analog and serial control include all the hardware and software you need to build your embedded application MOD5270 100IR 69 qty 100 NNDK MOD5270LC KIT 99 y PP MOD5234 100IR 599 qty 100 NNDK MOD5234LC KIT 249 gt For additional information please visit MOD54415 100IR 89 qty 100 NNDK MOD54415LC KIT 129 http www netburner com kits NANO54415 200IR 69 qty 100 NNDK NANO54415 KIT 99 Information and Sales sales netburner com Web www netburner com Telephone 1 800 695 6828 WwWww mousercom est Products for Your Newest Designs mouser com Tne widest selection of tne newest products
102. ign There you can see that the website is using the Compo nent Name NPN MMBT3904 as the main search term and that the website is proposing its clos est matches If you click on the View full product details arrow on the bottom row the table will expand to show more details like the component cost In this case we ll accept the first match because it s the correct part number Figure 2 shows another example This time the website couldn t find an appropri ate match which leaves a couple of options to find the correct part If you have a RS account then you can click on the Edit details link to mod ify the part information but you will need to do this every time you upload a BOM that uses this part For that reason I like to correct the part information in DesignSpark s libraries instead The manufacturer part number 0805 100 5 that was used by the website was actually the Component Name for R3 which means we should rename it First open the Library Manager and then navigate to the 100R component in the resis tor library Here you will find a Rename button so that you can rename the part 0805 100r 5 ADVERTISEMENT The next step is to tell DesignSpark to reload the part parameters for R3 from the library Normally you would use the Update Components All Components command in the Tools menu or right clicking on R3 and selecting Update Component But since we ve changed the Component Name we ll need to repl
103. in Microsystem Engineering in 2011 from Furtwangen University Baden W rttemberg Germany He is currently working as a research assistant in the Control Engineering Group at the Ilmenau University of Technology Thuringia Germany Steffen s interests include robust control and real time FPGA solutions I m gt j c AJ m Uu that the MAC address is unspecified with 16 0hFFFFFFFFFFFF UDP MONITOR EXAMPLE A Qt4 application is used to receive and send UDP packets Two good references about starting to use Qt4 are J Blanchette and M Summerfield s C GUI Programming with Qt 4 and D Molkentin s The Book of Qt 4 The Art of Building Qt Applications The UDP port is defined as 8100 and the application also listens to this port As shown in Photo 2 four LED checkboxes have been used to control the LEDs on the carrier board If a checkbox is checked this LED on the carrier board shines UDP handling is simple when using Qt4 Listing 1 shows how a QUdpSocket is created and how the readyRead signal is used As demonstrated only a few lines of codes are needed Listing 2 shows how a datagram is sent The datagram is created and an integer of 100 is added Then the created datagram is sent to 192 168 1 1 on port 8100 These two listings are enough to receive and transmit data over Ethernet from the FPGA board DON T FEAR AN FPGA This article demonstrates that even a UDP implementation in an FPGA doesn t need to be intimi
104. in small islands of a special material The structural transition between ordered and disordered phases is driven by controlled heating of the material island Phase change RAM PRAM has been in intensive development since the 1990s but commercial products have only now become available It is well known that conducting materials where atoms are regularly arranged have high electrical conductivities compared to disordered conductors This difference in conductivity is utilized by PRAM to store digital data These devices use a phase change material such as germanium antimony telluride Ge Sb Te which is abbreviated as GST What is striking about this semiconductor material is that it can exist in both crystalline ordered and amorphous disordered forms which can be transformed into each other by applying a very brief heat pulse GST s crystalline phase has orders of magnitude lower resistivity compared to its amorphous phase PRAM devices use GST s crystalline state to represent bit 1 and its amorphous state to represent bit 0 The two structural phases are stable so phase change memories are nonvolatile with data retention times in excess of 10 years at temperatures in excess of 100 C With repeated read write cycles or endurance of more than a million cycles PRAM is the leading candidate to replace ubiquitous flash memory for mass storage applications The main drawback of widely used flash memory is its slow access
105. ive amplifier designs are also required for RF systems where efficiency is a key concern Engineers have worked to develop some additional amplifier classes namely C E and F This may seem overwhelming so I thought v ee gain Me it was a good subject for this column Have a seat as I try to explain the key differences between all these amplifier families AMPLIFIER BASICS Let s start with some basics For simplicity I will assume that the amplifier s inputs and outputs are AC coupled through properly sized capacitors so DC offsets are not a concern I will also assume that the power supply could be either unipolar V or bipolar V and that the signal s polarity is not a problem if so it could easily be inverted with another small transistor used as a preamplifier What is an amplifier As shown in Figure 1 amplifiers are devices that must accept a given input signal V for example ranging from Vpy to Vpqyy and generate an amplified version Voy of the input with some DC offset So the amplifier s output should be something like V OUT V OFFSET gain x Vin You may argue that this is more than simplified You would be correct as an amplifier can t be restricted to a voltage amplifier There are concerns regarding input and output impedances which would lead to the associated current and power gain Anyway this article is only about amplifier classes and talking about voltage gain will
106. k Clk uaer in write available Tx rac wa aut write Tx mac wr in stat of packet Tx mac sop in end of packet T amp mac eop fin data 31 downto 1 Tx mac data n byte enable Tx mac BE in clack Clk_uger fin read available Rx mac ra out read Rx mac md in packet available Rx mac pa aut start of packet Rx mac sop aut end af packet E mac eop out data 31 downto 0 Rx mac data aut byte enable Ex mac BE aut THE USER DATAGRAM PROTOCOL Computer applications can use the UDP protocol to send messages referred to as datagrams to other IP hosts mostly IPv4 It can also be used to network without prior communications to set up special transmission channels or data paths In the OSI model it acts on Layer 4 which is the transport layer UDP uses a simple transmission model with a minimum of protocol mechanism Unlike TCP it does not utilize handshaking Therefore it is by default an unreliable protocol which means that there is no guarantee of delivery duplicate protection or ordering UDP provides checksums for data integrity and port numbers to address different functions at the source and the datagram s destination The checksum is optional UDP is UDP Monitor Send Packet LED 1 LED2 LED3 LED 4 Binding SUCCESSFUL on port 8100 Send LED1 0 LED2 0 LED3 1 LED4 0 N suitable when error checking and correction is either unnecessary or p
107. l inputs the application may use the Reset command Each interface s format has its own quirks but is kept as simple as possible I won t discuss writing applications because FTDI has demo applications for each interface see Resources Since you only need rudimentary functions to enable you to exercise the FT311D you can use these applications directly in support of circuitcellar com 6 IN 1 SCOPE 2 ch 2MSa s 200kHz 1I bit scope 2 ch spectrum analyzer eMSa s 8 bit AWG Function generator Network analyzer PWM Digital 1 0 CGM 101 99 95 20MHz SCOPE 2 ch 250MS S me sample rate J0MHZ scope with 8 color sess TFT LCD AutoScale amp waveform mathmiatic functions Quality FREE carry case included SDS5032E 299 GOMHz SCOPE f s BOMHZ 2 ch scope With SOOMSa s rate amp huge 10MSa memory 8 color TFT LCD amp FREE carry case sps6062 349 1OOMHz SCOPE High end 100MHz 2 ch 165a s benchscope with iMSa memory and USB port FREE scope carry case Super low price DS1102E 399 100MHz SCOPE 100MHz 2 ch scope meme gt with 1GS s sample rate and 8 color TFT LCD Huge amounts of memory FREE scope carry case sps7102 429 100MHz MSO 2 chi0OMSa s 1 scope B ch logic Rue 8 analyzer USB 2 0 and 4M samples storage per channel with advanced triggering amp math functions CS328A 1359 20MHz HANDHELD Fast amp accurate handheld
108. l solution even for novices By Steffen Mauch Germany Photo 1 Trenz Electronic s credit card sized TEOO600 is a industrial FPGA micromodule that integrates a Xilinx Spartan 6 LX FPGA Photo courtesy of Trenz Electronics ost novices who start to develop FPGA solutions are afraid to use Ethernet or DDR SDRAM on their boards because they fear the resulting complexity Moreover they don t have the necessary IP cores or the information When implementing a high performance network device with an FPGA you typically use a proprietary IP core usually from the FPGA s manufacturer Most FPGA development novices are nervous when they need to integrate something apparently complex e g network streaming into a FPGA Furthermore licenses for IP cores such as Xilinx s Tri Mode Ethernet Media Access Controller TEMAC are costly Other proprietary media access controllers MACs such as Xilinex s AXI Ethernet Lite MAC cannot be used without Xilinx s Embedded Development Kit EDK They may also require licenses or have other restrictions For this project I used a free implementation of an Ethernet streaming device based on Trenz Electronic s TE0600 FPGA micromodule see Photo 1 The TE0600 is based on a Xilinx Spartan 6 LX FPGA Different FPGA sizes are available as modules This module has a PHY already integrated a Marvell Technology Group 88E1111 ultra gigabit Ethernet transceiver whi
109. lding educational robotic platforms As the cost of these platforms decreases it becomes even more feasible for advanced students to recreate the experience on many platforms We re already seeing web based interfaces e g ArduinoPi and WebIOPi lay down the beginnings of a web based framework to interact with hardware on SBCs As these frameworks evolve and as the costs of hardware drops even further I m confident we ll see educational robotic platforms built by the open source community DISPLAY MADE EASY jn Mi EMBEDDED VIDEO ENGINE A REVOLUTIONARY SOLUTION ENABLING HI QUALITY HUMAN MACHINE INTERFACES AT A LOWER COST DEVELOPMENT SYSTEMS FROM WATCH EVE DEMOS ONLINE Eie zum FTDICHIP COM Power of the Quoting Revolution in the palm of your hand At a click of a button we will find the best price in the market compiled in one easy to read spreadsheet Just like your xd 21 Ir MINI hy 847 806 0003 sales PCE ITAR SO 9001 2008 UPAR l
110. le and high points along the range If they can all be connected by a straight line they are a linear fit right Not necessarily What about an S curve You can connect low middle and high points in an S curve with a straight line but it won t describe the points that lie between the middle and the extremes So you take two more readings one between the low and the middle points and one that lies between the middle and high points If those points also fall on a straight line chances are it is a linear calibration This is actually how manufacturers gather data for their datasheets They take enough data to see the underlying curve and then knowing what the curve actually looks like they take pretty values to get nice looking curves for publication Once you have acquired enough points to accurately describe the underlying curve you still want to be able to convert your A D values into engineering units This article explains how you can do that LINEAR INTERPOLATION Linear interpolation is the simplest and least accurate way to convert your A D values into engineering units You gather an array of ordered pairs A D reading and the corresponding real world engineering units sorted by the X A D value Then you look up the values that are immediately less than and immediately greater than the ones you want to convert Then you can use the straight line formula to interpolate between them Think o
111. le is being reprinted here with the correct clues The answers will be available in the next issue and are posted at circuitcellar com crossword N U CA Nel ACROSS 2 Temperature restrictions for laser cooling techniques two words 4 This signal sees the world through rose colored glasses two words 5 kor kB two words 7 A half adder is made of an AND gate and one of these two words 14 Symbolized by Np 15 Two tunnel diodes used in high speed gate circuits two words 17 Unidirectional antenna 18 Used as a light source in a cathode ray tube 19 All materials show this but certain liquids display it more strongly than others two words pa A o oo N nN DOWN 1 This type generates sine waves three words 3 These digital circuits are built with several collector BJTs three words 6 Their electronic properties can be metallic or semiconducting two words 8 Uses diodes and transistors logarithmic properties to compensate for nonlinearities and instabilities two words 9 Can be implied by the instruction s function two words 10 Used to measure a signal s standards 11 Semiconductor network sealed in a thin rectangular package 12 Process that limits peak signals two words 13 Condenses or enlarges an electric signal s dynamic range 15 Device under development by search engine giant 16 Avery small robot ANSWER 1 The first fun
112. le with densities of up to 16 Mb per chip Photo 3 shows an Everspin Technologies 64 Mb MRAM die Other future vendors include Toshiba and Hynix Semiconductor which have announced a joint venture for MRAM chip R amp D and manufacturing Some companies are already shipping products with small amounts of embedded MRAM Buffalo Technology for instance is selling flash based solid state drives with an 8 MB MRAM cache memory At the time of this writing the high cost of MRAM devices and their relatively low Capacities compared to that of other memory technologies remain as barriers to more widespread use However with ongoing developments it is certain that in the near future MRAM chip costs will reduce significantly while their storage capacities will rise greatly increasing their usage in many digital systems FERROELECTRIC RAM DRAM is at the heart of all contemporary computers due to its fast access times high integration density and low cost We are all familiar with the boot time that occurs every time a desktop or laptop computer is switched on During this time the OS and other start up programs are read from the hard drive and stored into DRAM banks where these can be executed by the microprocessor in real time In many ways DRAM is an example of an ideal memory if it weren t for its volatility DRAM stores binary digits 0 and 1 as the absence or presence of electrical charge respectively on tiny capacitors
113. lects the motor s direction The second arrangement uses the PWM to determine speed and direction with 50 OFF The speed increases in opposite directions depending on whether the PWM is less than or greater than 50 0 full ON reverse and 100 full ON forward I2C DEMO The serial communication protocols are the most widely used in the industry as they require a low number of I O lines On the synchronous side i e those providing a clock the I2C uses only two signals clock and data The open collector bus style enables any connected device to pull either bus line low While this can hang communications when properly used it enables a slow peripheral to halt further clocking until it becomes ready to respond The Bus Master supplies the clock to other devices The data line can change only while the clock line is low The data line changing while the clock line is high indicates a formatted transmission s beginning start bit or end stop bit The format consists of multiple 9 bit transmissions with the first 8 bits indicating a desired device s 7 bit address and a bit indicating whether the transmission wants to read or write to a device The ninth bit is an opportunity for the addressed device to say Got it continue Additional bytes contain 8 bit data Each device has its own factory set address or address range Data bytes will be read from or written to the device s registers always starting
114. lot signals The most basic reason is that the software simulator cannot plot internal signals running in hardware FIGURE 2 Using either JTAG or Ethernet control the co simulation module inside the FPGA controls the user module The clock generated by the co simulation module runs much slower than the external clock speed to make HCS worthwhile for speed improvements I ll discuss other uses for HCS where simulation speed isn t the problem I haven t covered another option for the HCS connection Using an Ethernet link which is even faster This option is detailed in Xilinx s UG817 Application Note see Resources If you are attempting to get the greatest speed you ll want to use the Ethernet interface instead of JTAG INCREMENTAL MADNESS One of the HCS panels options is incremental compile Normally your design would be resynthesized every time you relaunch the simulation from ISE If you are only changing the test bench this is a huge waste of time since there are no changes to the hardware design incremental compile option causes implementation to be skipped reusing the old bitstream If you re using the incremental compile option be sure to disable it when you change your hardware file otherwise it causes the expected problem of old code being used This is frustrating when you are sure you fixed a bug but your fixes don t work because the old bitstream is still being used The incremental
115. lso available build your own configuration buzzer and five reflectance sensors ae Zumo Robot for Arduino E Take your design from idea to reality Find out more at www pololu com 63 eo io Lun z T 64 o za l o oO CIRCUIT CELLAR DECEMBER 2013 281 circuitcellar com ccmaterials RESOURCES 5 C Cripps RF Power Am plifiers for Wireless Commu nications 2 d Edition Artech House 2006 Devialet D Premier White Paper E Gaalaas Class D Audio Amplifiers What Why and How Analog Devices Inc 2006 J Honda and J Adams Class D Audio Amplifier Basics Inter national Rectifier Application Note AN 1071 2005 R Lacoste Bipolar Transis tor Biasing Circuit Cellar 279 200s Linear Technology Corp www linear com CLASS G AND CLASS H Class G and Class H are quests for improved efficiency over the classic Class AB amplifier Both work on the power supply section The idea is simple For high output power a high voltage power supply is needed For low power this high voltage implies higher losses in the output stage What about reducing the supply voltage when the required output power is low enough This scheme is clever especially for audio applications Most of the time music requires only a couple of watts even if far more power is needed during the fortissimo I agree this may not be the case for some teenagers mus
116. lum pentoxide titanium dioxide and even silicon dioxide The relevant facts are that the switching action is extremely fast typically taking place in just a few nanoseconds and the resistive state is reversible nonvolatile and needs very low switching energy Figure 4 shows a typical ReRAM cell s structure where the resistive cell stack is located just above the cell selection transistor circuitcellar com FIGURE 4 is shown that sandwich the tantalum and titanium oxide resistive element placed between ruthenium contacts This design s compact vertical structure reduces the silicon chip area required for each memory cell making high density integration possible Several companies have announced ReRAM products that are in development or available in low sampling volumes Micron and Sony have entered into a joint venture agreement to develop ReRAM chips In early 2011 Elpida Memory developed a 64 Mb ReRAM chip using a 50 nm process A typical resistive RAM cell s structure 39 I m gt j c AJ m Uu M2 and M1 are the top and bottom electrodes Throw off the 8 bit ball and chain a a Ne Ll m T z Pu n d s i m a e ee ce apex d si 67 6mm x 41 8mm 2 6 x 1 6 HA 1 CRYSTALFONTZ e ef NES fF i A mel CFA10036 ARM9 s SOM fast 454MHz ARM9 s jJSD 4GB to 64GB Linux mainline kernel deep 128 258MB USB UART SPUI I C GxADC 8xPWM CAN wide 91
117. ly combining a small PIC interface to control an analog input stage with a great deal of software Our ECG interface is available in the form of a ready to use module to which you just have to add four electrodes and an Android application for smartphone or tablet there s no physical connection between this terminal and the in terface as it uses Bluetooth communication Ready assembled board Art 120107 91 132 00 500 ppm LCR Meter The remarkable precision of this device and its amazing ease of use arethe result of care ful design It works so well behind its unclut tered front panel that one could almost forget the subtleties of the measurement techniques employed A dream opportunity for our readers who are passionate about measurement to enjoy themselves If like us you wonder at the marvels modern tech niques bring within our reach come along and feel the tiny fraction of a volt Set Main board and LCD board assembled and tested Art 110758 93 300 00 Di OIN 9 S Eaa tal eh l l BE 48 o z 2 o oO CIRCUIT CELLAR DECEMBER 2013 281 EMBEDDED IN THIN SLICES It is important for you as the designer to know exactly what your file system can and cannot do Can it be powered down 10 000 times without corrupting data Part 2 File System Integrity Embedded File Systems The first part of this article series introduced the topic of
118. ly with a defined MAC address It is also possible to use static ARP entries and program the destination MAC address directly in the source code Note when using Linux static ARP entries can be set like this arp s 192 168 1 1 00 1d 7e xx xx xx However if more than one computer is used that is not a practical approach Usually when the Ethernet card changes the MAC address also changes FIGURE 1 An IvP4 ARP packet structure is shown FIGURE 2 This is the IVP4 UDP s packet structure Destination MAC address 1 2 Destination MAC address 2 2 Source MAC address 1 2 Source MAC address 2 2 Ethernet type Total length Flags fragment offset Header checksum Source IP address 2 2 Source MAC address 2 2 Destination port Checksum More data content Version header Time to live Source IP address 1 2 Source IP address 1 2 Source port Different services Identification Protocol Length Data 22 un LLI c t LLI T CIRCUIT CELLAR DECEMBER 2013 281 FIGURE 3 The core has one interface for transmission one for receiving and one for the host interface a This is the host interface s timing diagram b The read interface s timing diagram is shown c This is the write interface s timing diagram PHOTO 2 This screenshot shows the Qt4 UDP monitor clock Clk_reg in write CD in in read ZD out out register CA in WRB in CSB in clac
119. m simple math programs reading sensors and GPS data right up to programming for ad vanced Internet applications Besides writing applications in the Java programming lan guage this book also explains how apps can be programmed using Javascript or PHP scripts 348 pages ISBN 978 1 907920 23 3 56 40 244 pages ISBN 978 1 907920 15 8 56 40 Prices and item descriptions subjectto change E amp O E Digital Signal Processing Quektor Theory and Practice Practical Digital Signal Processing using Microcontrollers This text on DSP reflects the growing impor tance of discrete time signals and their use in everyday microcontroller based systems The author presents the basic theory of DSP with minimum mathematical treatment and teaches the reader how to design and implement DSP algorithms using popular PIC microcontrollers Theauthor s approachis practical and the book is backed with many worked examples and test ed and working microcontroller programs 428 pages ISBN 978 1 907920 21 9 72 50 MIFARE and Contactless Cards in Application RFID MIFARE is the most widely used RFID techno logy and this book provides a practical and com prehensive introduction to it Among other things the initial chapters cover physical funda mentals relevant standards RFID antenna de sign security considerations and cryptography The complete design of a reader s hardware and softwareis described in detail
120. munication protocols as any other semiconductor memory chip This makes it easy to upgrade existing systems to use MRAMs instead of other conventional memories MRAM s nonvolatility alone will not make ita potential game changing technology Its high access speed is what makes it special Unlike other nonvolatile memory e g EEPROMs and flash MRAM boasts typical access speeds of 35 ns and potentially as short as 4 ns with further developments This combined with MRAM s extremely high endurance and data retention periods of more than 20 years even makes the technology suitable for use as CPU cache memories which is a very demanding application One further advantage of MRAM is that its basic architecture where the access transistor can be formed directly on top of the MTJ enables very dense integration greatly reducing the cost of storage per bit and making MRAM well suited for use in solid state disks Throw in its relatively low standby power dissipation of less than half a milliwatt and MRAM also becomes attractive for hand held and portable devices It is not difficult to see why this technology has been described as the universal memory device EMD3D064M MRAM is now available from Everspin Technologies a spin off from Freescale Semiconductor in small footprint BGA and DFN packages with either serial SPI or parallel interface see Photo 2 Operating at a 3 3 V industry standard these ICs are currently availab
121. n educational environment as students can systematically pull back programming layers to learn more Beginning students would be able to string preprogrammed movements together to make the robot perform simple tasks Each movement could then be dissected into more basic commands teaching students how to make their own movements by combining rearranging and altering these commands By adding more complex commands students can even introduce autonomous behaviors into their robotic platforms Eventually students can be given access to the HTML user interfaces and begin to alter and customize the user interface This small superficial step can give students insight into what they can do spurring them ahead into the next phase Students can start as end users of this robotic framework but can eventually graduate to become its developers By mapping different commands to different functions in the server side code students can begin to understand the links between the web interface and the code that runs it Students will delve deeper into the server side code eventually directly controlling actuators and sensors Once students begin to understand the electronics at a much more basic level they will be able to improve this robotic infrastructure by adding more features and languages While the Raspberry Pi is one of today s more popular SBCs a variety of SBCs e g the BeagleBone and the pcDuino lend themselves nicely to bui
122. nce R but is not intended for selection of the internal resistance R given the load R Efficiency n Greek letter eta of this simple circuit is shown by the red trace in Figure 1b which plots the efficiency n with respect to the load and internal resistance ratio It is calculated as rc For maximum efficiency Ry should be as small as possible when compared to R to minimize loss in the generator To visualize the concept consider three fundamental conditions First R R As we have already seen n 0 5 i e 50 If R oo or R 0 1 i e 100 And if R 0 n 0 In other words with decreasing R and or increasing R n is approaching 100 When R 0 which is a short circuit the efficiency becomes zero as all the power is wasted in R While the efficiency grows with Lesd sauree resistance ratio increasing R and or decreasing R the total amount of power transferred decreases on both sides of the R RL condition DC POWER TRANSFER There aren t many situations where a DC power transfer is an issue However it is an important design aspect when working with AC signals especially at higher frequencies The concept remains the same except the resistances are replaced with complex impedances Once again for maximum power transfer Z1 Z which can be written as R jX R jX I I L The resistive components must match R R while the reactive components must cancel ea
123. nd Statistics for Engineers so you have the code to programmatically determine a second order polynomial s coefficients The code matches what is computed in Excel in the spreadsheet see Project Files Functions have also been supplied to return the values of Not a Number Positive Infinity and Negative Infinity so you can return those values when appropriate METHODS FOR SUCCESS The first part of this article series discussed how to calibrate and recalibrate linear conversions This article examined the tools to handle up to sixth order polynomials The code for binomial curve fitting is available see Project Files and a discussion for using scatter charts and the LINEST function in Excel complete with examples has been presented Using these polynomials enables you to expand the range of transducers you can choose for your projects It also enables you to design and implement equipment that doesn t have to be linear Excel is the poor man s tool for doing this Various curve fitting programs do a nice job if you can afford them There are books that discuss curve fitting algorithms if you want to explore them The methods presented in this article series are enough to get you started With these methods you should be able to handle the majority of situations you are likely to encounter and achieve precise and accurate readings within your system Good luck with your experiments and excursions into the unknown
124. nd verification parameters The core has three interfaces one for transmission one for receiving and one for the host interface With the host interface for example the Ethernet s speed can be set Also you can access statistics about the number of packets that have been sent see Figure 3a The read interface reads the received data see Figure 3b When Rx mac ra is high data in the FIFO is available Every signal is clocked in with the rising edge of CIk user Therefore Rx mac rd is set to high as long as Rx mac ra is high ARDUINO 10 OFF CODE GOGADGET SIGNALCPeadyRead this RASBERRY PI AD porti When Rx mac pa is high then Rx mac data is valid Rx mac sop and Rx mac eop signal the packet s start and end Rx mac BE signals if the entire four bytes or only one two or three bytes are valid Figure 3c shows the write interface This interface is used to write data with the rising edge of CIk user into the FIFO so the MAC core can transmit these to the PHY When Tx mac wa is high there is space in the FIFO Therefore Ix ma ca is set high and Tx mac sop is used to signal the packet s start Tx mac data is the data transmitted into the FIFO If Tx mac wa is low then nN LISTING 1 SO MOM LS sr CIBNBHPTE E when data i15 received processPendingDatagrams 78 called sL TCprocessPendingDatagramsi This code is used to create an UDP object in Qt4 BEAGL
125. ng aa Maka aan TU roae AMi DESIG N 6 Markt amp Technik 5 E APUR ENTWICKLER Organizers Trade Show Conference N rnbergMesse GmbH WEKA FACHMEDIEN GmbH Tel 49 0 9 11 86 06 49 12 Tel 49 0 89 2 55 56 13 49 visitorservice nuernbergmesse de info embedded world eu NURNBERG MESSE BOARDS BOOKS DVDs AND MORE AT WWW ELEKTOR COM STORE Elektor STORE Te The world of electronics at your fingertips Learning to fly with Eagle Eagle V6 Getting Started Guide LEARING TO FLr WITH EAGLE Clemens Valens The book is intended for anyone who wants an introduction to the capabilities ofthe CadSoft s Eagle PCB design software package The reader may be a novice at PCB design or a professional wanting to learn about Eagle with the inten tion of migrating from another CAD package After reading this book while practicing some of the examples and completing the projects LORI F p condition FKuding 9 n Ea 4 thout tart wil fj Hoste dy Suche N as you should feel confident about taking on more t dTransmissig ann SSA Erunt r wire en ueatr roni cane I m wire remdi oy pits nvmilab amp A id inb Wire readi challenging endeavors This book is supplied with a free copy of Eagle on CD ROM for MS Windows Linux and Mac b readi af Mire avait e 2B pe wr if wire ave oni t rue wire endTransmi gh oe ee Perot RATURE gesl j
126. nsight into what excites future engineers With respect to electrical engineering and embedded design programming what are some hot topics your students are currently attracted to MARILYN Embedded software real time low power is everywhere The more general term today is cyber physical systems which are systems that interact with the physical world I am moving slowly into control oriented software from signal image processing Closing the loop in a control system makes things very interesting My Georgia Tech colleague Eric Feron and I have a small project on jet engine control His engine test room has a 6 thick blast window You don t get much more exciting than that NAN That does sound exciting Tell us more about the project and what you are exploring with it in terms of embedded software and closed loop control systems MARILYN Jet engine designers are under the same pressures now that have faced car engine designers for years better fuel efficiency lower emissions lower maintenance cost and lower noise In the car world CPU based engine controllers were the critical factor that enabled car manufacturers to simultaneously improve fuel efficiency and reduce emissions Jet engines need to incorporate more sensors and more computers to use those sensors to crunch the data in real time and figure out how to control the engine Jet engine designers are also looking at more complex engine designs with mor
127. od is to give each board a unique suf fix to the designators when renaming them For example R1 could be R1A R1B R1C and R1D DesignSpark will now be able to quote the pan elized board but you will still need to contract the PCB manufacturer to make sure that they are able to accept panelized boards Conclusion Today we modified our design so that DesignSpark could give us BOM and PCB cost estimates Next time we ll look at how DesignSpark can render a 3 D image of the board 130247 Tips amp Tricks Figure 3 The component renaming window 34 Un LLI c t LLI T CIRCUIT CELLAR DECEMBER 2013 281 Emerging Memory Technologies A variety of memory technologies is available for use with embedded systems This article examines some newer technologies and provides details about phase change magnetoresistive ferroelectric and resistive memory types By Faiz Rahman USA PHOTO 1 Micron Technology offers change RAM IC packages courtesy of Micron Technology phase Image emories are pervasive in digital systems Open up almost any modern computing communication entertainment surveillance or control system and you will find a handful of memory chips inside Digital data has to be stored in a suitable medium and made available as information processing devices work with it Any digital data processor a microprocessor a microcontroller a DSP or a graphic processing unit
128. ompile but I had to wonder When I asked FTDI about this the company responded with No one has ever asked for that I ll put in a request Please note this isn t a device issue but merely a shortsighted design issue of the demo applications I have a final comment about Android applications in general If you think the AOAM has future potential but you want to know what s involved with X writing Android applications for a specific purpose send me an e mail and I ll add this to my list of future projects Author s Note As of this printing FTDI has released all of the demos providing users with a choice of ASCII Hex or Decimal characters for entry display Now that is quick customer service Texas Instruments MCUs and pan assign unique serial number USB Flash and Gang Programmers for Programmers INSTRUMENTS MSP430 Chipcon CCxx C2000 Stellaris LMxx ST Microelectronics MCUs STM32xx ARM up to 64 USB FPA programmers can be connected to one PC and program target devices simullaneously JTAG SBW or BSL Elprotronic www elprotronic com circuitcellar com Epot USB FPA Dusrioore Cx CIE CE 73 eo i zZ z T 74 un LLI o Ld lt p Y c un un LLI CIRCUIT CELLAR DECEMBER 2013 281 CROSSWORD Pemma Editor s Note The incorrect clues were published in Circuit Cellar s November 2013 issue so last month s puzz
129. only jektor membership Take out your Membership now at www elektor com member4 62 o z l o oO CIRCUIT CELLAR DECEMBER 2013 281 FIGURE 6 a A Class G amplifier uses two pairs of power supply rails b One supply rail is used when the output signal has a low power blue The other supply rail enters into action for high powers red Distortion could appear at the crossover FIGURE 7 Maxim Integrated s MAX98090 ultra low power stereo audio codec is a good example of a high integration multi mode power amplifier Content courtesy of Maxim Integrated micraphane Analg Lire input microphone 3 L Preamplifies PGA Analog Line input microphone Stereo digital mica phone Micraphane 1 Preamplifier PaA CLASS D Class D is currently the best solution for any low cost high power low frequency amplifier particularly for audio applications Figure 5 shows its simple concept First a PWM encoder is used to convert the input signal from analog to a one bit digital format This could be easily accomplished with a sawtooth generator and a voltage comparator as shown on Figure 5 This section s output is a digital signal with a duty cycle proportional to the input s voltage If the input signal comes from a digital source e g a CD player a digital radio a computer audio board etc then there is no need to use an analo
130. operation from 20 to 70C 800MHz or 1066MHz ARM9 CPU Up to 512MB RAM 256MB SLC XNAND 2x microSD with DoubleStore 2x Ethernet 2x USB Host CAN RS 232 SPI I2C DIO 1x RS485 2W Modbus Optional cellular WIFI amp XBEE radios Linux 2 6 34 w sub second boot TS TPC 8380 fully enclosed in low cost plastic enclosure Headphone connector amp speaker Panel Mount Open Frame TPCs also available 250MHz to 1GHz CPU Fast startup under 3 seconds Controllers tart ar a Opto isolated ports available 1 99 Industrial screw down connectors aw a Digital counters quadrature decoder Modbus a Flexible programming with Debian Linux Peripherals start at qty 100 Support 2W MODBUS communication and power over a single CAT5 cable picture of TS 8820 BOX 4 We TS 1420 12 outputs 8Amp Technologic Systems now offers four powerful TS 1700 DIO and One Wire computers targeting industrial process control s Implement an intelligent automation system at we 15 1800 14 A D 24 DIO low cost with a minimal number of components TS 1400 6 relays Technologic Visit our TS 7800 powered website at gt 2 e Q CIRCUIT CELLAR e DECEMBER 2013 281 CC WORLD SoC CONFERENCE NOTES by CC Staff USA The 11th International System on a Chip SoC Conference comprised two days of SoC related sessions meetings and keynotes at the University of California Irvine Topics ranged from emerging complex SOCs
131. ou are developing the software API which passes messages over the serial port to your hardware board With HCS you can use the real API developed with the physical hardware send the messages out the serial port receive them on the physical board and then pass the messages into the FPGA simulator see Figure 1 Any output from the FPGA simulation is sent out the real physical port where the other device is listening Is it crazy to take the messages from the computer and pass them out to hardware only to bring them back into the computer I don t think so because this flow enables you to test the system in a realistic situation making your verification and debugging job easier Since the code is running in simulation you aren t limited to only probing specific signals as with an integrated logic analyzer ILA Of course your FPGA may connect to other devices e g a microcontroller where without HCS it would be almost impossible to debug As an example I ran Xilinx s FFT tutorial Application Note UG817 see Resources onthe Avnet LX9 MicroBoard You ll have to recreate the FFT core and adjustthe number of samples to fit the LX9 see detailed instructions at ProgrammableLogicInPractice com At this point you could just run the FFT as a regular software simulation but you ll want to push the FFT operation down to hardware instead The HCS needs you to define a board support package BSP for your hardware Basically yo
132. ouple of DC servomotors to test the PWM functions however this interface is best for driving LED brightness or as motor controller inputs USB ANDROID HOST IC The FT311D is a full speed USB host targeted at providing access to peripheral hardware from a USB port on an Android device While an Android device can be a USB host many are mobile devices with limited power For now these On The Go OTG ports will be USB devices only i e they can only connect to a USB host as a USB device Since the USB host is responsible for supplying power to a USB peripheral device it would be bad design practice to enable a USB peripheral to drain an Android mobile device s energy Consequently the FT311D takes on the task of USB host eliminating any draw on the Android device s battery All Android devices from V3 1 Honeycomb support the Android Open Accessory Mode AOAM The AOAM is the complete reverse of the conventional USB interconnect This game changing approach to attaching peripherals enables three key advantages First there is no need to develop special drivers for the hardware second it is unnecessary to root devices to alter permissions for loading drivers and third the peripheral provides the power to use the port which ensures the mobile device battery is not quickly drained by the external hardware being attached Since the FT311D handles the entire USB host protocol USB specific firmware programming isn t required
133. p to 253 Status N Options N Status N Data bytes up to 253 0x00 0x00 0x00 1 0 Type Description O Data transmitter I Data receiver O Ready to send handshake I Clear to send handshake O TX Enable RS 485 Byte 2 Byte3 Byte4 Byte5 SetConfig Baud rate in little Endian format parole 7 or 8 SendData N 1 256 bytes of data ReadData N 1 256 bytes of data Parity 0 N Flow control nae Pa 1 0 2 E 0 N 1 3 M 4 S RTS CTS FT311D Pin Number SPI_S SS 26 SPI_S CLK 29 SPI S MOSI 30 SPI S MISO 31 1 0 Type I I I O SPI Select input SPI Clock input SPI Slave data input SPI Slave data output TABLE 9 In SPI Slave mode four signals comprise the interface Command Byte 1 Byte 2 Byte 3 BitO 0 MSB first BitO SetConfig 0x51 1 LSB first Mode 0 3 Send N bytes of data 1 255 N bytes sent SendData 0x52 SendData 0x52 Retrieve N bytes of ReadData 0x53 data 1 255 Reset 0x54 TABLE 10 This is the command byte structure of the available SPI Slave commands FT311D Pin Number SPI_M_SS 26 SPI_M_CLK 29 SPI_M_MOSI 30 SPI_M_MISO 31 TABLE 11 Four signals comprise the interface in SPI Master mode SPI Select output SPI Clock output SPI Master data output SPI Master data input ES O NO the signals are defined in the Slave mode There are four SPI Slave commands each use
134. ple viewing of satellite data and Internet mapping and custom software application development Contact Linx Technologies for pricing Linx Technologies www linxtechnologies com Giektor Ono Ektor Digi International Inc www digi com 11001 Bren Road East Minnetonka MN 55343 CONTACT Elizabeth Presson elizabeth presson digi com FEATURED PRODUCT The XBee product family www digi com xbee is a series of modular products that make adding wireless technology easy and cost effective Whether you need a ZigBee module or a fast multipoint solution 2 4 GHz or long range 900 MHz there s an XBee to meet your specific requirements PRODUCT INFORMATION Digi now offers the XBee Wi Fi Cloud Kit www digi com xbeewificloudkit for those who want to try the XBee Wi Fi XB2B WFUT 001 with seamless cloud connectivity The Cloud Kit brings the Internet of Things IoT to the popular XBee platform Built around Digi s new XBee Wi Fi module which fully integrates into the Device Cloud by Etherios the kit is a simple way for anyone with an interest in M2M and the IoT to build a hardware prototype and integrate it into an Internet based application This kit is suitable for electronics engineers software designers educators and innovators EXCLUSIVE OFFER The XBee Wi Fi Cloud Kit includes an XBee Wi Fi module a develop ment board with a variety of sensors and ac tuators loose electronic prototyping p
135. plifier is still currently in use Here are a couple more audio field examples Yamaha s Yamaha Power Amplifier White Paper explains how the company merged a Class AB and a Class D amplifier for best cost performance ratio Basically a Class D amplifier provides a coarse output at high efficiency and is improved by a Class AB final stage providing fine tuning at low loss To me it seems close to a Class H amplifier In the same spirit but a more higher end version look at Devialet s award winning D Premier amplifiers Its patented ADH technology which stands for analog digital hybrid combines a Class A amplifier used M LLLE A as a reference and eight Class D digital amplifiers per channel achieving a total harmonic distortion below 0 001 and an amazing 130 dB of signal to noise ratio which is more than impressive with 240 W of output power In such a short article my goal was not to help you to design a amplifier I just wanted to give you some information about how to select an adequate topology for your application Amplifier classes have been a hot topic since the early days of electronics so there are plenty of publications and books on this subject The information available in the Resources could be your starting point e i c z Uu SUBSCRIPTIONS When textbooks just aren t enough supplement your study supplies with a subscription to Circuit Cellar From programming to sold
136. ply section Class H goes one step further in the same spirit Rather than using two or more power supply rails it uses a continuously variable switching DC power supply The power supply s voltage is dynamically adjusted to whatever is required for optimal performances depending on the required signal amplitude This enables a better efficiency however the power supply s performances are deeply correlated to the full amplifier s performances WRAPPING UP The list of amplifier classes seems endless While preparing this article I even found some references to a so called Class T audio amplifier It appears to be a custom architecture developed by Tripath Company which is now owned by Cirrus Logic and is somewhat close to Class D Very little information is available but at least you known what the T stands for Amplifier design is an infinite quest for the best balance between performances efficiency and cost An engineer s goal is to find the best mix As an example Figure 7 shows a block diagram of Maxim s MAX98090 audio amplifier chip In the same piece of silicon there is a stereo audio amplifier that could be configured as a 3 W Class D speaker amplifier as a Class AB amplifier for line output and an independent ultra low power stereo Class H headphone amplifier This chip also integrates some preamplifiers as well as an ADC a DAC and a DSP but that s another story It s not too bad for le
137. pplications can be written for these devices ABOUT THE AUTHOR Jeff Bachiochi pronounced BAH key AH key has been writing for Circuit Cellar since 1988 His background includes product design and manufacturing You can reach him at jeff bachiochi imaginethatnow com or at www imaginethatnow com they make a great portable application tool Until the AOAM s release there was no way for these devices to be connected to any external circuitry and used as effective tool I think FTDI has bridged this gap nicely It provided a great interface chip that can be added to any circuit that will enable an Android device to serve as an effective user I O device I ve used the chip to quickly interface with some technology to discover its potential or just test its abilities But I m sure you are already thinking about the other potential uses for this connection One note about the demos provided Other than the GPIO and PWM demos all data is displayed as ASCII text For anyone who works with data you know that you must work in a format in which all values can be entered and displayed and this is not printable ASCII text The demo apps released by FTDI only allow ASCII characters which severely limits their usefulness I know the 2 Cun a ow A v SAI eee UE RES Amateur to Professional order now Prototype start at 10 ea Free Shipping source code is available for every demo and I can make improvements and rec
138. proprietary IP core 26 Calibration Part 2 Polynomial Curve Fitting By David Cass Tyler Convert nonlinear A D readings to engineering units 34 Emerging Memory Technologies By Faiz Rahman Newest RAM from phase change to ferroelectric E COLUMNS 42 THE CONSUMMATE ENGINEER Impedance Matching By George Novacek Unmatched impedances can corrupt design signals 48 EMBEDDED IN THIN SLICES Embedded File Systems Part 2 File System Integrity By Bob Japenga Ensure robustness in outages and system crashes 52 PROGRAMMABLE LOGIC IN PRACTICE Connecting FPGA Hardware to Virtual Test Benches By Colin O Flynn Co simulation controls hardware modules from your computer SERVO APP circuitcellar com CONTENTS SX 4 N N ey YM Cut DIPOLE ANTENNA FOR 345 MHz ierarchy CoSim LX9 C xe sba 2c 9324 Category Design View Hardware Co Simulation Y Include File Feferences JS Add Source My Find Processes dut fp fft top E Design Properties SY en P Sarerea 3 Behavioral Check Syntax p ep i Simulate Behavioral Model a2 Ctrl F ENABLING HARDWARE CO SIMULATION 58 THE DARKER SIDE Amplifier Classes from A to H By Robert Lacoste Compare amplifiers efficiency performance and cost 66 FROM THE BENCH Unleash Your Android Device s Potential By Jeff Bachiochi Chip helps an Android device become a user interface TESTS amp CHALLENGES 74 CROSSWORD
139. r embedded systems You want a file system that can go through millions of shutdowns during file writes and never corrupt either the existing file being written or any other file in the system THE SOLUTION Journaling file systems came to the rescue The idea for such architecture was conceived in the 1980s IN 1990 IBM released the first Journaled File System which it called JFS The basic concept is that the file system creates a circuitcellar com journal entry of all changes Tf you Write Xe e that are going to be made aen Aie gt Me E x EE D LED a SCC changed Thus in case of an incomplete operation it can quickly and easily back out updating the directory the last change If the power goes down or something when the DOWEI DOSS causes the software to crash the file system will not be down you run the risk of corrupted and it can quickly recover The file system can corrupting the directory read the journal to recover the system to the point it was antrjes for other files at just before the write was commanded Some call journaling file systems log structured file This is unacceptable for systems since the difference embedded systems between keeping a log and keeping a journal is pretty minute It is beyond the scope of this thin slice but for argument s sake let s consider log structured file systems of the same ilk as journaling file systems LINUX FLASH BASED JOURNALI
140. r issue in PDF format and article code from the beginning through your date of purchase Keep your CC Gold archive up to date with a Circuit Cellar digital subscription The archive is loaded with everything you need to know about embedded applications and develop ment signal processing wireless com munications programmable logic em bedded programming measurement and sensors analog techniques data acquisition Internet and connectivity communications robotics graphics and video and more Item CCGOLD e 250 CC 2012 ARCHIVE CD A top selling item the CC 2012 Ar chive CD puts an entire year of embed ded design solutions at your fingertips With quick links to the all projects source code and schematics CC ar chive CDs will become a staple in your prototyping artillery Articles cover everything from energy harvesting applications and environmental data logger construction to developments in microelectromechanical systems and Arduino survival guides The content on these CDs will help you master the evolving world of embedded design and development Item CD 017 CC2012 34 EMBEDDED LINUX BOARD Linux is available on many devices but the OS s complexity and high de velopment costs can be challenging at times Not the case with this board The beginner s course that accompanies this development board makes it an ideal kit for Linux experts and enthusiasts alike Features include a two layer
141. r is a bit more complex than designing with Class A B or AB but the advantage is efficiency A Class C amplifier can have good efficiency as there are no lossy resistors anywhere It goes up to 60 or even 70 which is good for high frequency designs Moreover only one transistor is required which is a key cost reduction when using expensive RF transistors So there is a high probability that your garage door remote control is equipped with a Class C RF amplifier Join the Elektor Community Take out a GOLD Membership now magazwe Your GOLD Membership contains e 8 Regular editions of Elektor magazine in print and digital e 2 Jumbo editions of Elektor magazine in print and digital January February and July August double issues e Elektor annual DVD ROM e A minimum of 10 DISCOUNT on all products in Elektor STORE e Direct access to Elektor L ABS pna Embedded PT idee EW j on a Oe e Direct access to Elektor MAGAZINE our online archive for members el ektor e Elektor POST sent to your email account SSE incl 25 extra projects per year e An Elektor Binder to store these 25 extra projects e Exclusive GOLD Membership card sProjecte Wi Fi Controller Board Control RGB LED S relays amp stuff but n ison ns TN B eres ALSO AVAILABLE M or nn The all paperless GREEN Membership which ee delivers all products and services including Elektor MAGAZINE online
142. resistance changes However resistive RAM ReRAM a still developing memory breed uses voltage pulses to make resistance changes This memory technology utilizes materials and structures where suitable voltages can alter memory cells resistive states so they can store one or more data bits similar to PRAM There are strong hints that ReRAM is capable of very fast switching with symmetric read and write times of less than 10 ns This comes with a remarkably low power consumption which should make this technology ideal for many applications As if these attributes were not enough ReRAM cells are very small and can be placed extremely close together which results in high density memory fabrics Several research Organizations have already demonstrated ReRAM cells smaller than 30 nm x 30 nm It is easy to see that ReRAM s outstanding features will attract a lot of attention which is exactly what is happening A ReRAM cell is made from a resistive switching material This is any inorganic or organic material whose electrical resistance can be stably switched between a high and low resistance state by applying a suitable current pulse Depending on the material involved the resistance switching can occur because of the formation and disappearance of filamentary conducting paths or due to the movement of individual atoms in the crystal lattice Examples of materials that can exhibit this functionality include nickel oxide tanta
143. retired he was most recently president of a multinational manufac turer for embedded control systems for aerospace applications George wrote 26 feature articles for Circuit Cellar between 1999 and 2004 its matching universal for given applications For instance with RF work a 50 0 impedance is conventional Impedance matching methods are beyond the scope of this article but I will mention that resistors and transformers are used to match resistance while networks with capacitors and or inductors are used to cancel the reactive components A PRACTICAL EXAMPLE Let s consider a practical impedance matching example My garage door opener s operating range along my approximately 150 46 m long driveway was poor and inconsistent Both the transmitter and the receiver use surface acoustic wave SAW resonators to control their frequency so the poor range was not due to detuning Increasing the transmitter power to extend the range was not an option I figured a combination of the signal absorption plus multipath distortion were the most likely culprits of the poor range I decided to build a good antenna for the receiver to fix the problem The original antenna was a piece of a A 4 long wire that was around 9 4 238 mm for its 315 MHz operating frequency This indicated the receiver s input impedance to be about 50 Q the theoretical impedance of a monopole A 4 antenna is 36 Q I decided to replace it with a three element Yag
144. ross the cell is measured to reveal whether the cell is in a low resistivity ordered state bit 1 or a high resistivity disordered state bit 0 There have been several recent advances in PRAM technology Perhaps the most remarkable is the ability to control the cell heating current precisely enough to create several intermediate cell resistance values This immediately increases the memory Capacity as each cell can be made to store more than one bit For example if eight resistance values can be created and distinguished then the cell can be used to store three bits thus tripling the memory capacity This is now a circuitcellar com 35 FIGURE 1 The structure of phase change RAM cells in reset and set states is shown I m gt j c AJ m Uu Reset cell binary D Set cell binary 1 Dielectric Crystalline GST Electrode DU Amorphous GST D TIN Hester Cell selector routinely used technique implemented with PRAM devices Another development still in the research labs is to stack several PRAM cell arrays on top of each other to create high capacity chips This fabrication technology has been demonstrated in principle but has not been implemented in real chips PRAM technology has historically been pursued by several companies but there has been much consolidation over the years Micron Technology and Samsung are currently leading PRAM chip development Micron offers several PRAM chips in BGA and SOI
145. rovide time to perform an orderly shutdown If all the information about a file could be atomically written to one location in the file system powering down while writing to that one location would be acceptable Only the most recent data would be lost Other parts of the file system would not be corrupted But real file systems don t keep all of the information about a file in one place That would make accessing the file very time consuming Imagine having to look across every block of a terabyte drive trying to find your unique file As a minimum file systems usually create other information about the file that they store in another place One example of this is directory information which tells the system where the file is located This makes finding your file faster File systems also want to store other information such as who has permission to read write delete and append the file who owns the file when the file was last modified when the file was created when the file was last accessed and pointers to the media s physical blocks hard drive or flash where the file is kept This is called metadata Information about most files is contained in at least two locations the directory and the file itself Therein lies the problem If you write the data successfully and then start updating the directory when the power goes down you run the risk of corrupting the directory entries for other files This is unacceptable fo
146. rporate an LCD and maybe some push buttons It could be a fun project It would be nice to have this type of tool to use on widgets Future Technology Devices International FTDI makes a tool that enables you to use an Android device as a user interface to the various protocols You may be familiar with FTDI as it s been around for more than 20 years FTDI may be most noted as specialists in converting legacy peripherals to USB Its most popular product presents a USB interface for direct connection to a microcontroller s TTL UART pins You can replace what were the normal RS 232 converter circuitry and a DB9 25 i e legacy serial port with one of these devices and a USB connector to make your microcontroller USB compatible You don t need to know anything about the intricacies of USB It s a great idea and it s easy to implement A few years ago FTDI announced a commitment to supporting the Android Open Accessories initiative It wanted to enable engineers to make use of tablets and Smartphones utilizing the Android OS This led to last year s introduction of the FT311D multi interface Android host IC This device provides an instant bridge from an Android USB port B to peripheral hardware over general purpose input output GPIO UART PWM I2C Master SPI Slave or SPI Master interfaces Let s take a look at how FTDI s apps and the FT311D can be used to make a worthy addition to your toolbox PHOTO 1 I used a c
147. rring curves is polynomial A polynomial curve is expressed as Y Xnc Xnclc 4 X26 Xici X00 In fact a straight line equation is the most trivial polynomial where Y s value changes an order 0 polynomial is just the constant Cg since X always equals 1 All you need to determine the engineering unit s value that is being measured is the A D reading and an array of calibrated coefficients There are many sources of information for curve fitting data to a polynomial Again Numerical Recipes in C is a good example For those of us looking for expedience there is an easier way You can use an Excel spreadsheet to calculate a polynomial that will enable you to easily compute the intervening values First build an Excel two column array where the first column holds the independent variable the A D reading and the second column holds the associated dependent variable the real world engineering units Take a bunch of measurements starting at the low end of the range but above the lowest A D value and work toward but not to the highest A D value i e stay off the rails Add blank values for the lowest and highest A D readings so the chart encompasses the SU 320986238 eeseesees 16 EN EMI Breer Po yngmia ewe le full range To make it easier to work with sort this array in ascending order Select all of the values in both columns including the column labels and choose Scatter from the Inser
148. rry Pi to create a powerful embedded control and navigation computer in a small 20 mm x 65 mm x 85 mm footprint The RIO is well suited for applications requiring real world interfacing such as robotics industrial and home automation and data acquisition and control The RIO adds 13 inputs that can be configured as digital inputs 0 to 5 V analog inputs with 12 bit resolution or pulse inputs capable of pulse width duty cycle or frequency capture Eight digital outputs are provided to drive loads up to 1 A each at up to 24 V The RIO includes a 32 bit ARM Cortex M4 microcontroller that processes and buffers the I O and creates a seamless communication with the Raspberry Pi The RIO processor can be user programmed with a simple BASIC like programming language enabling it to perform logic conditioning and other I O processing in real time On the Linux side RIO comes with drivers and a function library to quickly configure and access the I O and to exchange data with the Raspberry Pi The RIO features several communication interfaces including an RS 232 serial port to connect to standard serial devices a TTL serial port to connect to Arduino and other microcontrollers that aren t equipped with a RS 232 transceiver and a CAN bus interface The RIO is available in two versions The RIO BASIC costs 85 and the RIO AHRS costs 175 Roboteq Inc www roboteq com i The new XBee Wi Fi Cloud Kit from Digi Intern
149. rs yet obtain AVR demo o Supreme Code Optimization Pe x 206 9720 PF FL eee Q sales Q ccsinfo com Crystalfontz hod 44522 6500 x 35 JP www crystalfontz com s Ironwood 7 RTT 0204 ELECTR vuued En Pues en rr rie a x Bl EMOS G IS M B U S hi Lj INTERNA Aa NAL Bus Monitors Protocol Analyzers Host Adapters Multiplexers Ay Battery gt Applications VA m 7 Software 7 Tools Em E an pet Micro Computer Control www mcc us com www blemosint com Your reliable outsourcing partner expandlO USB chip 42 LOW cost with HIGH quality PCB PCBA and More INSTANT QUOTE AT www myropcb com OR CALL 1 888 PCB MYRO MyRO USB Status AID l O SPI I2C Ideal for adding USB to sensors amp peripherals No drivers needed for Windows Mac Linux No microcontroller programming required Also check out our USB 232 USB to UART www hexwax com Buy from Mouser amp Farnell PA HE FATA PIC programmer Most devices supported ICSF SOTP amp copy limits at Digikey NE 32 amp Mouser www flexipanel com Actual size patents pending Programmers for Microchip PIC Microcontrollers cM PC Tethered USB Model shown Standalone software Command line operation Hide GUI for automated use Override configuration with drop downs melcibs me U2 Programmer enero egimeenim Labs fc wan mela
150. s menu since the website connection doesn t work for Canadians yet So let s see what will happens when we click on the BOM Quote since the components I cre ated didn t have any RS part numbers Once you click on the button DesignSpark will run the built in BOM report using the fields that it knows about Reference Designator Quantity Compo nent Name Component Value Package Name Accept Accept DENEN 1 3 3 0805 100 5 RS Stock No 1 Description dit deta an Part anufact nit Qua oHS 1 Resistor rice nits ils No urer ntity M M U R RS 0805 3k6 55 0 125W RS 0805 3kS S 0 125W Viking Tech Corpor Viking Tech Corpor 713 6982 713 6935 1 1 METIA 0805 Resistor 0 1 0805 Resistor 0 1 8 63 8 63 1 Reel of 5000 1 Reel of 5000 8 63 5 63 In stock for next w In stock for next w Manufacturer Manufacturer Part Number RS Part Number and the Component Description Note that the Package Name field is a separate field in the schematic symbol and not the PCB footprint name Next DesignSpark will log you into the RS website with your ModelSource ID so that the BOM can be uploaded to the RS website The website will then do its best to match the component fields in the BOM to RS part num bers When the RS part number field is blank the website will propose its best matches For example Figure 1 shows the proposed matches for the MMBT3904 in our des
151. s a multibyte command format SetConfig SendData ReadData and Reset see Table 10 This SPI Slave device has an array of up to 256 data bytes that can be read or written by a master on the bus SetConfig enables the application to define the SPI Slave peripheral s configuration SendData enables the application to write data into the array on the Slave interface Note if the SendData command is executed the two byte SendData command is sent back to the application as verification ReadData enables the application to retrieve data from the array on the Slave interface Should the GPIO interface need to be reset and configured as all inputs the application may use the Reset command Table 11 shows how the signals are defined in the Master mode There are four SPI Slave commands each uses a multibyte command format SetConfig SendData ReadData and Reset see Table 12 This SPI Master device can send or retrieve up to 255 data bytes from a Slave device on the bus An array of this data is held in the application Set Config enables the application to define the SPI Master peripheral s configuration SendData enables the application to write N data bytes from an array to a Slave interface Note once the SendData command is executed a SendData command is returned with the number of bytes actually received ReadData enables the application to retrieve N data bytes from a Slave interface Should the GPIO interface need to be reset and configured as al
152. s byte is useless although it may actually hold data from the last request s next register Unlike Software Application Development FT31xD Android Programmers Guide Applica tion Note FT_000532 2013 SOURCES FT311D USB Android host IC Future Technology Devices International Ltd www ftdichip com HMC5843 Digital compass IC Honeywell International Inc www honeywell com L923D Quadruple half H driver and DRV8835 motor driver Texas Instruments Inc www ti com I2C a Slave device cannot hold the clock line low requesting a wait while it prepares to reply to the command with the right data so a dummy byte is often added to the format to give the Slave device some processing time This means when the command is to read data dummy data bytes are received while the complete command and dummy byte are sent then additional dummy bytes are sent to enable the data bytes you want to receive to be clocked out A SPI touch keypad is attached as a Slave device to the SPI Master application see Photo 3 This keypad has four commands read LED status read keypad status read keypad key and write LED state All read commands are three bytes the command a dummy byte to give the Slave device time to prepare a reply and a dummy byte to clock in the one byte reply The write command is two bytes the command and the data byte no data needs be read back UART DEMO The UART demo is probably the easiest mo
153. ser friendly powerful and affordable software package for efficient PCB design It can be used on most main computing platforms in cluding Microsoft Windows XP Vista or Windows 7 Linux based on ker nel 2 6 or above and Apple Mac OS X Version 10 6 or higher This book will benefit novices and professionals who are eager to learn about EAGLE or may be migrating from another CAD pack age From schematic and layout editing tools to project completion EAGLE V6 will help you achieve your PCB fabrica tion goals Item BK ELNL 978 1 907920 20 2 47 6 EAS HORS TO Fy a 2 Eagle gt TAPIR The TAPIR which stands for Totally Archaic but Practical Interceptor of Ra diation is a fun and expensive kit that detects frequency levels in electronic devices Once assembled connect the headphones and antenna and switch it on Move the TAPIR around any elec trical device and you ll hear different noises depending on the emitted field s type and frequency Item EPS ELNL 120354 71 21 El apucs41 MICROCONTROLLER DESIGN MANUAL This manual presents a compre hensive guide to designing and programming with the Analog Devices ADuC841 microcontroller and other microcontrollers in the 8051 family It includes a set of introductory labs that detail how to use these microcontrollers most standard features and includes a set of more advanced labs many of which make use of features available only on the ADu
154. sign algorithms and real time scheduling algorithms to distributed smart cameras and code compression Can you provide some information about these techniques MARILYN I was inspired to work on co design by my boss at Bell Labs Al Dunlop I was working on very large scale integration VLSI CAD at the time and he brought in someone who designed consumer telephones Those designers didn t care a bit about our fancy VLSI because it was too expensive They wanted help designing software for microprocessors Microprocessors in the 1980s were pretty small so I started on simple problems such as partitioning a specification into software plus a hardware accelerator Around the turn of the millennium we started to see some very powerful processors e g the Philips Trimedia I decided to pick up on one of my Embedded Computing Expert An Interview with Marilyn Wolf Marilyn Wolf has created embedded computing techniques co founded two companies and received several Institute of Electrical and Electronics Engineers IEEE distinctions She is currently teaching at Georgia Institute of Technology s School of Electrical and Computer Engineering and researching smart energy grids Nan Price Associate Editor earliest interests photography and look at smart cameras for real time computer vision That work eventually led us to form Verificon which developed smart camera systems We closed the company because the market for
155. ss than 3 I m sure you will find your way through a manufacturer s website for even more impressive silicon but I would like to wrap up this article by clarifying an important point Designing an amplifier isn t just about selecting which class is the best for your application This may be enough for simple projects but as a good engineer you need to check if a more clever approach may be appropriate Do you want some examples In the RF field an efficient solution was invented in 1936 at Bell Labs by William H Doherty His idea was to associate two amplifiers one in charge of the RF carrier amplification and one providing some extra power when the input signal is strong Each section could then be independently optimized for best ABOUT THE AUTHOR circuitcellar com 65 Robert Lacoste lives in France near Paris He has 24 years of experience in embedded systems analog designs and wireless telecommunications A prize winner in more than 15 international design contests in 2003 he started his consulting company ALCIOM to share his passion for innovative mixed signal designs His book Robert Lacoste s The Darker Side was published by Elsevier Newnes in 2009 You can reach him at rlacoste alciom com if you don t forget to put darker side in the subject line to bypass spam filters performances e g with a Class AB amplifier for the carrier and a Class C amplifier for the peaks This so called Doherty am
156. st MCU support is now even more powerful SIAR SYSTEMS 16 LLI Uu cc e cc LL k LLI c gt cc m W gt c CIRCUIT CELLAR DECEMBER 2013 281 PRODUCT NEWS SMALL CELLULAR EMBEDDED PLUG IN MODEM The Skywire is a small embedded plug in cellular modem that uses a standard XBEE form factor and 1xRTT CDMA operating mode which minimizes hardware and network costs Its U FL port helps ensure antenna flexibility The modem s bundled carrier service plans enable simple deployment The Skywire embedded modem features a Telit CE910 DUAL wireless module and is available with bundled CDMA 1xRTT data plans This enables developers to add fully compliant cellular connectivity without applying for certification Future versions of the Skywire will support GSM and LTE The Skywire is available with a complete development kit that includes the cellular modem a baseboard an antenna a power supply debug cables and a cellular service plan The Skywire baseboard is an Arduino shield that enables direct connection to an Arduino microcontroller WN wape WAY NPBA Skywire modems cost 129 for one and 99 in 1 000 unit quantities A complete development kit including the modem costs 262 NimbeLink LLC www nimbelink com Nee qon j LAHAT AANA AV SC The RIO is an I O expansion card intended for use with the Raspberry Pi SBC The card stacks on top of a Raspbe
157. t tab Choose Scatter with only markers as you will be connecting the dots with a trend line Click on one of the graph s dots This will select all of them Right click and select Add Trendline to bring up the Format Trendline dialog box From this dialog box you can draw different trend lines and choose one that best connects the dots Check the box that says Display R squared value on chart This is the Coefficient of Determination and it represents how well the trend line fits the data The values range from 0 to 1 with 1 being the highest degree of fit The default trend line is the linear fit which is a straight line s least squares fit Note its R2 value and then select polynomial and dial up the order from two to six noting the corresponding R2 values and watching how well the trend line overlays the dots Choose the one that best fits the line as your calibration curve Now click Display equation on chart to display the coefficients you will use to convert from your ADC reading to your real world engineering units Right click on the displayed equation select Format Trendline Label and select Scientific from the Number Category Set the label to display enough decimal places to represent the Effective Number of Digits This will give you your maximum usable precision during conversion Notice that the measurements you have are only two significant
158. t Cisco IBSG reported that there will be 50 billion devices connected to the Internet by 2020 Calit2 University of California Irvine D Evans The Internet of Things Cisco IBSG 2011 He also noted that by 2020 the average person will be connected to approximately 5 000 devices The proliferation of Internet connected devices means new security issues for end users and manufacturers e Secure Design Planning Engineers must understand that personal privacy will be a top concern of consumers in the next decade and beyond Security has to be a part of a design Zaidi said This means more than focusing on data storage and trans mission related security issues Engineers must also focus on chip security Send CC your workspace pics amp info gt lt uu your photos and info to editor circuitcellar com WwW Tweet pics or a link of your space to circuitcellar Use ccworkspaces WORKSPACE FOR DEV SYSTEMS by CC Staff USA The CC editorial team continues reviewing engineering workspaces each month Currently we re featuring embedded systems engineer David Cass Tyler s New Mexico based home setup When I require extra space to spread out I move into the spare bedroom and use the desk in there to set up the hardware Tyler noted Almost all of my projects are developed to be distributed and accessible through the network When I need to program on a different computer I tend to use th
159. t out of the box Get development started quickly with no integration required and full support for popular tools With Micro Digital you have low cost no royalty licensing full source code and direct programmer support So get your project off to a great start Visit us at www smxrtos com today Free SMX Evaluation Kits are available for many processors at www smxrtos com eval Micro Digital YOUR RTOS PARTNER 800 366 2491 sales smxrtos com circuitcellar com Ferroelectric Wond line Word line FIGURE 3 A ferroelectric RAM cell s organizational structure is shown PHOTO 4 This is Cypress Semiconductor s 1 MB parallel access FM28V100 ferroelectric RAM IC Image courtesy of Cypress Semiconductor Processors Supported www smxrtos com processors www smxrtos com Free Evaluation Kits www smxrtos com eval Free Demos www smxrtos com demo ARM e Cortex ColdFire e PowerPC e CodeWarrior e CrossWorks e GCC e IAR EWARM 37 T m gt c AJ m Uu 38 un LLI e I t LLI T CIRCUIT CELLAR DECEMBER 2013 281 Access Speed Symmetric Power Data Integration Noise CET FA y Endurance J 1 i Access Consumption Retention Density Immunity Time PRAM Medium No High High High Medium High MRAM Fast Yes Medium High High High High FRAM Fast Yes Low High High High High ReRAM Fast Yes Low High High High High TABLE 1 polarize the ferroelectric di
160. tcellar com n circuitcellar com eq DISCUSS information d engagea Mind F E H J K L M NETWORKING social media esign tips tutorial sofiyyare engineering engineering prod newsmed ak a lectronics ponury Nant 4o talk to us ws i Share Your intevests Check out our New Social ire g Co oloo oololololo l o CIRCUIT CELLAR AUDIOXPRESS ELEKTOR j 6 0 9 06 9 06 9 06 0 6 0 6 0 9 0 9 GO 9 O0 9 G0 9 6 9 G 06 0 6 O 0 6 6 6 6 0 6 9 6 6 e eee oe e circuitcellar com TEST YOUR EQ Contributed by David Tweed November 1980 and was commonly referred to as DIX Ethernet ANSWER 4 The multiple access with collision detection protocol that Ethernet uses was based on a radio protocol developed at the University of Hawaii It was known as the ALOHA protocol FIGURE 1 How many NAND gates would it take to implement Problem 2 s transition obg contact the udio En ions 4 a e n 75 m un Uu Qo ie T r r m Z ep m Uu 76 CIRCUIT CELLAR DECEMBER 2013 281 CC SHOP x CIRCUIT CELLA g e an ar CIRC un CEL A nu rci i TIM Eia a CUT 7 2 T 1 x TA Ve r f Li EJ n a d eos Mo 4 LS j P d Nip Te CC GOLD It s the ultimate archive for all things Circuit Cellar project articles tutorials source code project files and more The USB includes every Circuit Cella
161. te of the Art Embedded Design Our embedded Computer on Modules COMs are CPU core modules that securely connect to a carrier board Standard functions are designed into the Computer on Module which is mated to your custom carrier board to enable exactly the functions your project requires COTS carrier boards are available or design your own carrier board for a custom solution with reduced design time and complexity on T5 8160 Di Eo Features can include Mob Up to 1GHz ARM w 512MB RAM Computer on Modules include Fanless low power designs All parts soldered on no moving parts TS 4200 Atmel ARM w super low power Double Store SD for reliable storage TS 4600 400MHZ at extremely low cost TS 4710 Up to 1066MHz PXA168 w video A TS 4712 like TS 4710 2 Ethernets y Lf TS 4720 like TS 4712 AGB eMMC Flash User programmable FPGAs 40 to 85C Industrial temperature range Easy development w Debian and Linux 2 6 Sub second boot to Linux 30 years in business 3 Next day shipping for most products Open 5ource Vision 33 Engineers on Tech Support 8 Year Product Lifecycle Guarantee 33 Custom configurations and designs w Never discontinued a product excellent pricing and turn around time Design your solution with one of our engineers 480 837 5200 pricing starts at S409 qty 1 3 69 qty 100 Panel Mount or Fully Enclosed Features can include 5 inch 7 inch and 10 inch touchscreens Fanless
162. te will fail We will have to panelize our board to make it large enough to meet the minimum PCB size requirement Panelizing a circuit board refers putting multi ple copies of the circuit board onto a larger PCB panel for manufacturing This is how a circuit board manufacturer produces circuit boards but there is a point where it becomes cost prohibitive to cut out smaller boards out of large panels So what we will do for our board is to duplicate the board four times to make it 43 mm x 43 mm ADVERTISEMENT Properties Component Component Values R3 Position 18650 00 Angle 0 00 0805 100 5 23000 00 Rel Mimored Fixed V Component Package SM Description Symbol V Pin Names Pin Numbers instead as a 2 x 2 array of boards with 3 mm between them The extra 3 mm gives you room to cut out the boards DesignSpark can t automatically panelize our board for us but it is possible to do it manually by selecting the entire board copying it and then pasting it back into the PCB file Just make sure that you choose to not to merge the 5 V and GND nets when DesignSpark asks Unfortunately DesignSpark will also automatically increment all of the reference designators so that they don t conflict with the rest of the boards The only way to fix this is to manually edit but this is tricky with DesignSpark because it requires that every component have a unique reference designator One meth
163. ter then see Moore s law has and energy consumption advanced to the point ALINANWWOD eT iJ n AH 3 DESIGN SOFTWARE Streamlines the Process of PCB Design to Mass Design s Manufacturing pii for Low Cost Printed Circuit Boards Design without compromise with unlimited Prototype production single double or multi layer and unrestricted design software layer fabrication Our manufacturing rules are built into SoloPCB Automatic and secure pricing ordering and to design smart and build with confidence design file submission right from SoloPCB Price with our low cost pooling option or as full feature for greatest manufacturing flexibility N USoIOPCE M Hierarchical schematic editor 1008K Digi Key Library 16 Layer Autorouter Push Shove Trace Editing Automatic Split Plane Generation Intelligent Copper Pour MASS DESIGN MassDesign com 2 6 Layer Pooling Options Low High Volume Blind Buried Vias Matched Impedance Multiple Choices for Materials and Finishes 004 Width Spacing E Test Wy FabStream 12 gt H Y gt 2 o c CIRCUIT CELLAR DECEMBER 2013 281 QUESTIONS amp ANSWERS Smart energy grids are a prime example of Internet based con trol but the Internet isn t very good at real time control how that has driven computer architecture as DRAM has hit the memory wall NAN As an engineering professor you have some i
164. ter cost under control the PWM frequency must be a lot higher usually 10 times higher than the input signal frequency For a 10 Hz to 20 kHz audio signal this translates into PWM frequencies in the hundreds of kilohertz e g 200 kHz Such a frequency corresponds to a 5 us period i e 1 200 000 Now assume you want a 16 bit amplitude accuracy This implies the position time of each PWM edge must be precise with a 1 65 536 relative accuracy Therefore the switching stage s design must not introduce Sterea line output Class AB amplifier single ended Line output Speaker left Class D amplifier differential OR NN Speaker left Clase D amplifier differential left right playback Digital filter Digital gain level control Speaker right Clase D amplifier differential Line input A PGA differential or single ended Analog microphone PA or Three pale Faur pale Line input Line input B PGA differential or single ended Jack detection Sterea headphone Clase H amplifier fsingleended MAXIE 90 random variations higher than 76 ps i e 5 wus 65 536 This is quite low isn t it This explains why building a good Class D amplifier is a little more complex than drafting its block diagram The second concern with Class D amplifiers is related to electromagnetic compatibility EMC Switching power signals at high speeds is the best way to generate strong electromagnetic fields
165. ther overhead and excessive use of the parallel capabilities I want to show how to use OpenCores s open source tri mode MAC implementation and stream UDP packets with VHDL over Ethernet It is even possible to use the free version of ISE with the LX45 module to implement UDP streaming I used VHDL as the hardware description language HDL P J Ashenden s The Designer s Guide to VHDL provides a good description of VHDL First I will address the core s interface Then I will explain the Ethernet format the Address Resolution Protocol and the UDP Finally I will present the implementation aspects and a UDP monitor example ETHERNET Ethernet a commonly used LAN technology was introduced in 1980 and later standardized as IEEE 802 3 Systems communicating over Ethernet divide a stream of data into shorter pieces called frames Each frame contains source and destination addresses MAC addresses As per the Open Systems Interconnection OSI model Ethernet provides services up to and including the data link layer The OSI model includes Layer 1 physical Layer 2 data link Layer 3 network Layer 4 transport Layer 5 session Layer 6 presentation and Layer 7 application Ethernet acts on Layer 1 similarly as Bluetooth or USB Ethernet and the different protocols e g TCP UDP etc are well addressed in C M Kozierok s The TCP IP Guide A Comprehensive Illustrated Internet Protocols Reference To communicate
166. time This makes it only suitable for use as a storage device Flash memory also requires erasing an entire block before even 1 bit can be changed a process that requires several milliseconds PRAM on the other hand features write times of around 100 ns and read times of around 20 ns making it much faster Figure 1 shows a typical PRAM cell s structure The storage node consists of a tiny island of GST on top of a titanium nitride TiN heater The GST island is sandwiched between top and bottom electrodes and is contained within a silicon dioxide dielectric envelope A memory cell selector transistor is fabricated on top of the storage node This cell access transistor serves to select an_ individual addressed cell to write and read data To perform a write operation the transistor drives a heating current into the TiN heater Writing a 1 bit requires a low value current pulse for several tens of nanoseconds This causes the phase change material to anneal itself i e to adopt a low resistivity ordered crystalline state On the other hand to write a 0 bit a short duration high current pulse is injected which melts the GST material and cools it down quickly before its atoms can arrange themselves into an ordered structure The resulting glassy amorphous phase has a high resistivity To read a PRAM cell s state its access transistor is made to inject a small constant current through the GST island The resulting voltage drop ac
167. u need to specify a clock source s location The HCS module will use this pin for its own clocking purpose This clock will be different from any other clock your module may be using The tools usually won t work well if you reuse a clock From your test bench you will normally input a clock into the unit under test UUT HCS treats this clock in a special manner and will generate it from the BSP specified clock This clock will be under software control and won t run in a regular manner In this FFT example I measured the test bench clock as Program Verilog simulator L contral ii Serial i Cosim part having a 50 ns pulse width but pulses occur at a 40 to 1 100 Hz rate depending on the interface To set up the BSP find the hwcosim bsp in your ISE installation In my ISE installation it is located at C Xilinx 14 4 ISE_DS ISE sysgen hwcosim data hwcosim bsp Listing 1 shows an example of the BSP format to add support for the Avnet LX9 MicroBoard With this file modified you can launch or relaunch ISE By selecting the appropriate board you can enable the Hardware Co Simulation option for the device under test DUT Photo 1 shows the process and resulting icon indicating that hwcosim will be used At this point you simply select the test bench module fp fft tb in Photo 1 and select Simulate Behavioral Model as normal SPEED UP RESULTS Note that the simulation s speed will be highly dependent on the
168. ulating the Y values for the original X values and displaying them on the original chart If the markers for the calculated values overlay the markers for the observed values the curve is a fairly good fit You can also compute the offset error and display it for further assurance of good coefficient values I highly recommend that you take this step It will help flush out any problems and prevent them from cropping up later when they can become very expensive to correct You can use Horner s rule to effectively compute the Y values Horner s rule states that the powers of X are factored out so the polynomial values are computed using a series of multiply accumulates The algorithm works for any polynomial order Y X3 X c3 X2 X c X1 X Cy X X c Y X x X2 x c3 X X c C4 Co Y X x Xx X x c3 c Cy co Y X x X x X x c3 c c4 cO Y X x X x X x 0 cy c Cy co Codified double X Y cL c3 c2 cl CUJ for int 1 20 X 0 0 Y 0 0 I lt n i Y Y X clil This has been implemented in the EvaluatePolynomial function in the included code samples see Project Files and will take the array of coefficients as a parameter By factoring out the X values and putting the accumulation of factor values into a for loop you eliminate the need to calculate the powers of X making the computation much more efficient Notice that it is now another multiply accumulate operation In
169. unities to shift demand to level out generation needs For example electric cars need to be recharged but that can happen during off peak hours But energy systems are huge A single grid covers the eastern US from Florida to Minnesota To make all these improvements requires sophisticated software and careful design to ensure that the grid is highly reliable Smart energy grids are a prime example of Internet based control We have so many devices on the grid that need to coordinate that the Internet is the only way to connect them But the Internet isn t very good at real time control so we have to be careful We also have to worry about security Internet enabled devices enable smart grid operations but they also provide opportunities for tampering NAN You ve earned several distinctions You were the recipient of the Institute of Electrical and Electronics Engineers IEEE Circuits and Systems Society Education Award and the IEEE Computer Society Golden Core Award Tell us about these experiences MARILYN These awards are presented at conferences The presentation is a very warm happy experience Everyone is happy These things are time to celebrate the field and the many friends I ve made through my work gt Hard vvired TUB EI CLA IK EN n 4 i p E ii ra WB lis At Newark element14 we connect you to all of your cable and wire management needs newark com 3M Alphawire Amp
170. ur members magazine SUPPORTING COMPANIES gl 78 5 60 oo 55 18 21 39 We 78 17 46 47 61 72 S 45 25 3 iL 9 Gs 23 29 IAR Systems Imagineering Inc Ironwood Electronics Jameco Electronics Jeffrey Kerr LLC Lemos International Co Inc MaxBotix Inc Micro Computer Control Micro Digital Inc Microchip Technology Inc microEngineering Labs Inc Mosaic Industries Inc Mouser Electronics Inc MyRO Electronic Control Devices Inc NetBurner Newark element14 Pico Technology Ltd Pololu Corp R E Smith Inc RS Components Saelig Co Inc Technologic Systems Triangle Research International Inc if C4 78 41 78 79 79 D 37 9 8 79 C2 13 14 63 31 32 33 69 6 7 79 3 4 CIRCUIT CELLAR DECEMBER 2013 281 CONTENTS DECEMBER 2013 e ISSUE 281 PROGRAMMABLE LOGIC circuit cellar UDP STREAMING DEVICE BASED ON AN FPGA MICROMODULE ll CC COMMUNITY 08 CC WORLD 10 QUESTIONS amp ANSWERS Embedded Computing Expert Professor Marilyn Wolf on smart camera surveillance control oriented software and smart energy grids 14 MEMBER PROFILE Research Assistant Walter O Krawec Hoboken NJ I3 INDUSTRY amp ENTERPRISE 16 PRODUCT NEWS 19 CLIENT PROFILE Digi International Inc Minnetonka MN Il FEATURES 20 UDP Streaming on an FPGA By Steffen Mauch Implement Ethernet without a
171. vanced FPGA enthusiasts columnist Colin O Flynn discusses hardware co simulation HCS which enables the software simulation of a design to be offloaded to an FPGA This approach significantly shortens the time needed for adequate simulation of a new product and ensures that a design is actually working in hardware p 52 This Circuit Cellar issue offers a number of interesting topics in addition to programmable logic For example you ll find a comprehensive overview of the latest in memory technologies advice on choosing a flash file system for your embedded Linux system a comparison of amplifier classes and much more Mary Wilson editor circuitcellar com THE TEAM EDITOR IN CHIEF C J Abate MANAGING EDITOR Mary Wilson ASSOCIATE EDITOR Nan Price ART DIRECTOR KC Prescott ADVERTISING COORDINATOR Kim Hopkins PRESIDENT Hugo Van haecke FOUNDER Steve Ciarcia PUBLISHER PROJECT EDITORS Carlo van Nistelrooy Ken Davidson ASSOCIATE PUBLISHER bette Tree Shannon Barraclough CONTROLLER COLUMNISTS Emily Struzik Jeff Bachiochi Ayse K CUSTOMER SERVICE Coskun Bob Japenga Robert Debbie Lavoie Lacoste Ed Nisley George Novacek Colin O Flynn EE SDS Bon eee Bel USA UK Carlo van Nistelrooy 1 860 289 0800 c vannistelrooy elektor com ELEKTOR LABS Wisse Hettinga 31 46 4389428 w hettinga elektor com GERMANY Ferdinand te Walvaart 49 241 88 909 17 f tewalvaart elektor de FRANC
172. wer this question in other circumstances At the end of my sophomore year of college I ran out of money and had to drop out of school and get a job I wound up spending eight years as a carpenter and cabinet maker which you would think wouldn t relate very well to computers You would be wrong Lessons in each field can be applied to other fields with good results For instance I always needed unknown sized shims and I couldn t carry around everything I needed I realized that for anything from 0 03125 to a full inch that I could just carry the powers of two fractional inch shims i e 0 5 0 25 0 125 0 0625 and 0 03125 and create anything I needed by adding them together If I needed a 0 75 shim I would use a 0 5 and a 0 25 shim to create it Likewise 0 875 would be 0 5 0 25 0 125 and SO on Later after I had read Freescale Semiconductor s MCF5282 and MCF5216 ColdFire Microcontroller User s Manual I realized that a successive approximation ADC used this same principle In Chapter 28 Queued Analog to Digital Converter QADC the manual explains how the user supplies the high and low reference voltages VRH and VRL and how the successive approximation register sequentially receives the conversion value one bit at a time starting with the most significant bit The Successive Approximation Analog to Digital SAAD C function simulates this operation l l Since I specified that Y always increases
173. ww rakoczyphoto com COPYRIGHT NOTICE Entire contents copyright 2013 by Circuit Cellar Inc All rights reserved Circuit Cellar is a registered trademark of Circuit Cellar Inc Reproduction of this publication in whole or in part without written consent from Circuit Cellar Inc is prohibited DISCLAIMER Circuit Cellar makes no warranties and assumes no responsibility or liability of any kind for errors in these programs or schematics or for the consequences of any such errors Furthermore because of possible variation in the quality and condition of materials and workmanship of reader assembled projects Circuit Cellar disclaims any responsibility for the safe and proper function of reader assembled projects based upon or from plans descriptions or information published by Circuit Cellar The information provided by Circuit Cellar is for educational purposes Circuit Cellar makes no claims or warrants that readers have a right to build things based upon these ideas under patent or other relevant intellectual property law in their jurisdiction or that readers have a right to construct or operate any of the devices described herein under the relevant patent or other intellectual property law of the reader s jurisdiction The reader assumes any risk of infringement liability for constructing or operating such devices O Circuit Cellar 2013 Printed in the United States EDITOR S LETTER OVERCOME FEAR OF E
174. y 100 mA however the FT311D s required operating current is only 25 mA Two LEDs are used for status LED1 is steadily illuminated when the USB is connected and functional If connected but nonfunctional it will blink an error code LED2 indicates the circuit is powered An external 12 MHz crystal or resonator is required This feeds an internal PLL to enable internal execution at 48 MHz which is needed for USB 2 0 Figure 1 shows the circuit diagram Three internally pulled up configuration inputs enable selection of one of six operation modes The input leaves various combinations IOBUS1 IOBUSO VOC HC HC GND USBEM SEOP of these pins open or applies a jumper to short the pins to ground Finally a single keyed connector provides access to all bus signals plus 5 V 3V3 and ground If you want to use this tool with an external circuit that already has 5 V you may power it from that circuit through this 10 pin connector I found some slick looking enclosures blue translucent that are small and inexpensive less than 3 for this circuit A nice enclosure always legitimizes a project giving it a finished appearance Labeling identifies the jumper configurations and the signal connections PWM DEMO Now I ll discuss the PWM outputs and drive RC servomotors Each servomotor requires a 1 ms pulse to send the arm wheel or horn to the right stop A 1 5 ms pulse centers it and 2 ms pulse sends it to the left stop Repe
175. y on surveillance in recent years What do you see as the most active areas for research and advancements in this field MARILYN Moore s law has advanced to the point that we can provide a huge amount of computational power on a single chip We explored two different architectures an FPGA accelerator with a CPU and a programmable video processor We were able to provide highly accurate computer vision on inexpensive platforms about 500 per channel Even so we had to design our algorithms very carefully to make the best use of the compute horsepower available to us Computer vision can soak up as much computation as you can throw at it Over the years we have developed some secret sauce for reducing computational cost while maintaining sufficient accuracy NAN You wrote several books including Computers as Components Principles of Embedded Computing System Design and Embedded Software Design and Programming of Multiprocessor System on Chip Simulink and System C Case Studies What can readers expect to gain from reading your books MARILYN Computers as Components is an undergraduate text I tried to hit the fundamentals e g real time scheduling theory software performance analysis and low power computing but wrap around real world examples and systems Embedded Software Design is a research monograph that primarily came out of Katalin Popovici S work in Ahmed Jerraya s group Ahmed is an old friend and collabor
176. z range but now a portion of your hardware design could easily be running in the megahertz range You need ChipScope to monitor the section of your design running from a different clock to the test bench CadSoft 7 turns 25 V 0 Celebrate with us and participate in our anniversary quiz or visit http www element14 com community community knode cadsoft_eagle 25 years CadSoft www cadsoftusa com 1988 2013 56 o za l o oO CIRCUIT CELLAR DECEMBER 2013 281 FIGURE 3 a The serial interface co simulation s complete setup is shown FIFOs are used to cross the clock domain between the co simulation module and the free running hardware clock An external reset pin is used to synchronize the test bench to a hardware event b When running the serial test bench waits for the user to hit the physical PCB s reset button sends the string ABC out the serial lines waits for three bytes to be received and prints the hex value of those bytes FIGURE 4 Interfacing to the LPDDR chip on the Xilinx Avnet LX9 MicroBoard provides a good example of validating a complex interface with a simple test bench The wrapper around the Xilinx provided memory controller contains no logic and only serves to provide the required interface for hardware co simulation The computer based test bench has all the logic to test the DDR chip s m circuitcellar com ccmaterials in RE

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