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EDK2628 User Manual - Digi-Key
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1. BOOT LED FLASH Programming Power LED User LED a 90000000000 0000 c m S 00000000600000000000000000000000000900 0000000600000000000000000000000000900 m B RX232 XTAL DTXD Microprocessor gt BOOT pon 5 Switch Switch DCTS DRTS s n CJ5 B8 o 9 Way O O O n UPM D ce 2999909090509 42 0909000000990000006000900600000000900 CJ4 T T 3 6 9 12 1 ll I 3 2 311 2 3 1 2 3 Jumper umper Jumper Jumper B C s D 1 2 3 123 1 123 1 1 2 3 FIGURE 5 1 JUMPER CONFIGURATION The following tables define each jumper and its settings 5 2 UsER MODE SETTINGS CJ5 CJ5 is used to set the operating mode of the microcontroller These jumpers must be fitted at all times to ensure correct operation of the EDK Jumper Function Setting 1 2 Setting 2 3 CJ 5 A Default 1 2 User Mode Setting Bit 0 pulled High p
2. EDK2628 USER MANUAL FOR 85 2628 ON CHIP FLASH MICROCONTROLLER Preface Cautions 1 This document may be wholly or partially subject to change without notice 2 All rights reserved No one is permitted to reproduce or duplicate in any form a part or this entire document without Renesas Technology Europe Limited s written permission Trademarks General All brand or product names used in this manual are trademarks or registered trademarks of their respective companies or organisations Specific Microsoft MS and MS DOS are registered trademarks and Windows and Windows NT trademarks of Microsoft Corporation Document Information Product Code D004673 11 Version 1 Date 30 04 2003 Copyright Renesas Technology Europe Ltd 2003 All rights reserved Website http Awww renesas com 2 1 2 2 2 3 3 1 4 1 4 2 4 3 4 4 5 1 5 2 5 3 5 4 5 5 5 6 6 1 6 2 7 1 7 2 TABLE OF CONTENTS TABLE OF CONTENTS je G 3 START UP dte res 4 INSTALLING THE EVALUATION DEVELOPMENT KIT 4 SERIAL CONNEGTJQN 55 ettet mme et erue caia mutet re eed ut de edad 4 POWER SUPP Y atteint eet me tatit idt aig eed ote ent 4 EDK BOARD LAYOUT MED 5 EDK BLOCK DIAGRAM deter er e Ui e n rc a AE rete c e EP pen 5
3. 1184 1 36 1221 1 73 2400 invalid invalid 64 2404 0 16 2441 1 73 2441 1 73 4800 4808 0 16 32 4735 1 36 4883 1 73 4883 1 73 9600 9615 0 16 9766 1 73 9766 1 73 9766 1 73 19200 18939 1 36 19531 1 73 19531 1 73 i i invalid invalid 38400 39063 1 73 39063 1 73 39063 1 73 i i invalid invalid 57600 56818 1 36 52083 9 58 i i invalid invalid i i invalid invalid 115200 125000 8 51 156250 35 63 invalid invalid 1 i invalid invalid 208333 9 58 i i invalid invalid invalid invalid 1 i invalid invalid 460800 625000 35 63 invalid invalid invalid invalid 1 i invalid invalid TABLE 4 2 CRYSTAL FREQUENCIES FOR RS232 COMMUNICATION Note The device used to convert the RS232 serial information to logic signals for the microcontroller is limited to 120kBaud The rates above this level can only be utilised if the user provides direct logic level communications The user may replace the HC49 U surface mounted AT cut crystal with another of similar type within the operating frequency of the microcontroller device Please refer to the hardware manual for the microcontroller for the valid operating range Alternatively the user may fit an oscillator module or provide an external clock source When providing an oscillator module or external source it is highly recommended that the load capacitors for the AT crystal are removed from the PCB These are physically placed within the PCB outline of the oscillator module for easy location and to ensure they are removed
4. device CPLD This is not necessary for most user designs but allows a measure of increased flexibility for the EDK designs Mode transitions including boot mode transitions only require the reset to be held active while the mode settings are presented On releasing reset the microcontroller will be in the required mode The logic design detects a power up event and provides a timed reset pulse to guarantee the reset of the device At the end of the reset pulse the processor will be placed in user mode and any code in the device will execute During user mode the NMI button can be pressed at any time This will provide a single de bounced NMI interrupt to the device Pressing the boot button will cause the boot mode controller to reset the device and during the reset period present the required mode settings to start the device in boot mode At the end of the reset period the boot mode settings will have been latched into the device which will then be ready to accept a boot mode connection via the RS232 interface or the flash programming header Pressing the boot button during a normal reset will not cause the EDK to enter boot mode The boot mode settings are fixed at mode 3 The required mode settings are made using a tri state capable buffer Note boot control device is programmed to support all possible EDK products For this reason the reset pulse is over 500ms Repetitive activation of either the Boot or Reset buttons will restart th
5. e Nslw ome E 6 te a reta d ren d b v nt 6 SERIAL INTERFACE tetra rr redo dicenda tab eo e n ente d cine strats 6 MEMORY MAP er edere tovt me eto dba ra De cde edel a sd to tne d Dna tin n rada 8 BD c anna 8 BOARD OPTIONS erecta reiner in rectis t rA rust a um Acc Dr C Ec de 9 JUMPER EINKS mrt e eme ib ee uten 9 USER MODE SETTINGS CJE tasca da db dett s 10 EDK OPTIONS qutt bout s 10 SERIAD PORT SEEEGTION n ente t teca te a et bac UH ett t decens 11 FLASH PROGRAMMING HEADER 11 BOOT CONTROL eite nete n n RO EN 12 MICROCONTROLLER HEADER CONNECTIONS eene nte ta tt ntet etta te tentant 13 HEADER eiu 13 HEADER J2 ea bita e eee s n ect te i ael p nin egeo vn En etd 13 CODE 14 AMON bedi WA anal as Nad A 14 2 START UP INSTRUCTIONS 2 1 INSTALLING THE EVALUATION DEVELOPMENT Kir EDK Please refer to the quick start guide provided for initial installation of the EDK A copy of the quick start guide and other information relating to this EDK at http www eu renesas com tools Installing the EDK requires pow
6. of the EDK board FLASH Mp4 1 0000600600000000060000000000000000000 Programming J 000000000000000000000000000000000000 3V3 UVcc GND Testpoints RESn FW NMIn ULED1 ULED2 PSCK PTXD PRXD RX232 XTAL DTXD 0781 DRXD NMI Switch BOOT LED HB Power LED LJ User1 LED EJ User2LED RESET BOOT Switch Switch CJ5 5 RXDISn DCTS DRTS 1 MD2 MD3 UPM B m o m 9 Way D Type 8 B OOOOO CSn 2000000000000 J2 1000000000000000000000000000000000000 CJ4 FIGURE 3 1 EDK BOARD LAYOUT 3 1 EDK BLock DIAGRAM The diagram shows the connectivity of the components on the EDK board 5V PSU Reset Boot NMI Switches 5V Supply amp Control Logic 3V3 Regulator RS232 Programming amp Comms 1 1 Microprocessor HCAN Driver 1 LEDs User1 Power P amp amp User2 Boot FIGURE 3 2 EDK BLOCK DIAGRAM 4 EDK OPERATION 4 1 USER INTERFACE The EDK provides three buttons for influencing the operation of the
7. when using this option When changing the crystal frequency the pre loaded debugging monitor will not function In this situation the user is responsible for providing code to evaluate the device away from the default operating speed 4 2 3 REMOVABLE COMPONENT INFORMATION This information is provided to allow the replacement of components removed from the board as described in section 4 2 2 Component Cct Ref Value Rating Manufacturer Load Resistor X1 R4 IMQ 0805 1 Welwyn WCR Series Load capacitors X1 2 22 0603 10 25 0603 3 220 TABLE 4 3 REMOVABLE COMPONENT INFORMATION Care must be taken not to damage the tracking around these components Only use soldering equipment designed for surface mount assembly and rework 4 3 Memory Table 4 4 illustrates the EDK memory map for mode 7 Section End Section Start Section Allocation H 00000000 H OOO1FFFF On Chip ROM H OOFFD800 H OOF FEFBF On Chip RAM H OOFFF800 H OOFFFF3F Internal I O Registers Internal I O Registers H OOFFFFBF H ECL H OOFFFFFF TABLE 4 4 MEMORY DEFAULT MODE 7 4 4 LEDs The EDK has four red LEDs The function of each LED is clearly marked on the silk screen of the PCB Please refer to the board layout diagram for position information Section 3 When t
8. AP NC J2 03 67 5 PF5 PF5 70 6 PF6 PF6 69 7 PF3 ADTRGwIRQ3n 72 8 4 4 71 9 1 74 10 PF2 PF2 73 11 97 15 97 76 12 PFO IRQ2n PFO 75 13 95 13 95 78 14 P96 ANI5 P96 77 15 P93 ANI1 P93 80 16 P94 AN12 P94 79 17 P91 AN9 P91 82 18 P92 AN10 P92 81 19 AVSS CON_AVSS 84 20 P90 AN8 P90 83 21 AVCC CON_AVCC 86 22 VREF CON_VREF 85 23 P46 AN6 P46 88 24 P47 AN7 P47 87 25 P44 AN4 P44 90 26 P45 AN5 P45 89 27 P42 AN2 P42 92 28 P43 AN3 P43 91 29 P40 ANO P40 94 30 P41 AN1 P41 93 31 P11 P09 TIOCBO Pll 96 32 P10 POS TIOCAO P10 95 33 P13 P011 TCLKB P13 98 34 P12 PO10 TIOCCO TCL P12 97 KA 35 P15 PO13 TIOCB1 T 15 100 36 14 12 P14 99 37 UVCC 2 38 P16 PO14 TIOCA2 IRQ P16 1 In 39 VSS GND 4 40 P17 POIS TIOCB2 TCL P17 3 KD 41 HTxD HTxD 6 42 HRxD HRxD 5 43 P71 TMCI23 P71 8 44 P70 TMCIOl TMRIOI P70 7 45 P73 TMOI P73 10 46 P72 TMOO P72 9 47 75 75 12 48 74 2 74 11 49 77 77 14 50 76 76 13 13 7 DEVELOPMENT 7 1 HMON 7 1 1 MODE SUPPORT The HMON library is built to support Advanced Expanded Mode only The Device supports only Mode 7 7 1 2 BREAKPOINT SUPPORT The monitor utilises the PC Break Controller for code located in ROM allowing a single breakpoint to be set in the code Code located in RAM may have multiple breakpoints limited only by the size of the On Chip RAM 7 1 2 1 CODE LOCATED IN FLASH
9. INGS To enable the use of this alternate port the user must change the settings to those in the following table Zero ohm Default Function Microcontroller Link ID Port Pin CR20 Not Fitted Transmit data from EDK TxD2 PA1 CR23 Not Fitted Receive data to EDK RxD2 PA2 CRI9 Fitted Alternate Transmit data from EDK TxD0 P30 CR22 Fitted Alternate Receive data to EDK RxD0 P31 TABLE 5 4 OPTION LINKS ALTERNATE SERIAL PORT The user may implement a handshaking protocol on the EDK This is not supported with the software tools supplied To support this option two spare port pins have been allocated on the microcontroller Using these port pins the CTS and RTS lines of the host serial interface can be controlled The user may also control the operation of the board via the same handshaking lines This is not supported with the software tools supplied but may be written by the user Using the CTS line the user may simulate pressing the boot button see section 5 6 This will cause the EDK to swap into and out of Boot mode on each low level activation of CTS Feedback of the current mode is provided on the RTS line A high level indicates boot mode and a low level indicates user mode The following settings are made by default and ensure that there are no conflicts on unnecessary microcontroller pins Zero ohm Default Function Microcontroller Link ID Port Pin 12 Not Fitted Mode State out fro
10. ROM Double clicking in the breakpoint column in the code sets the breakpoint Adding a further breakpoint elsewhere in the code removes the previous one 7 1 2 2 CODE LOCATED RAM Double clicking in the breakpoint column in the code sets the breakpoint Breakpoints will remain unless they are double clicked to remove them 7 1 9 CODE SIZE HMON is built along with the debug code Certain elements of the HMON code must remain at a fixed location in memory The following table details the HMON components and their size and location in memory For more information refer to the map file when building code Section Description Start Location Size H bytes RESET VECTOR HMON Reset Vector Vector 0 H 000000000 4 Required for Startup of HMON TRAP VECTORS Trap Vectors Vector 8 9 10 11 00000020 10 Required by HMON to create Trap Breakpoints in RAM HW BREAK VECTORS HMON Break Controller Vector 27 0000006 4 Required by HMON to create Breakpoints in SCI VECTORS HMON Serial Port Vectors Vector 80 81 82 83 H 00000160 C Used by HMON when EDK is configured to connect to the default serial port PHMON HMON Code 00001124 222C CHMON HMON Constant Data 00003350 13E BHMON HMON Uninitialised data H 00FFDC32 217 FDTInit FDT User Mode Kernel H 00001000 124 This is at a fixed location and must not be moved Should the kernel need to be moved
11. TROLLER HEADER CONNECTIONS The following table lists the connections to each or the headers on the board 6 1 HEADER J1 Function EDK Symbol Device Pin Function EDK Symbol Device No pin No pin 1 VSS GND 64 2 EXTAL CON EXTAL 63 3 XTAL CON XTAL 62 4 VCC UVCC 61 5 NMI NMIn 60 6 STBYn STBYn 59 7 VCL NC_J2_07 58 8 RESn RESn 57 9 VSS GND 56 10 MD2 MD2 55 11 MDI MDI 54 12 MDO MDO 53 13 P30 TxDO DTxD 52 14 P31 RxDO DRxD 51 15 P32 SCKO IRQ4n P32 50 16 P33 DRTS 49 17 P34 P34 48 18 P35 IRQ5n DCTS 47 19 P36 P36 46 20 P37 P37 45 21 PA3 SCK2 PSCK 44 22 PA2 RxD2 PRxD 43 23 PAI TxD2 PTxD 42 24 41 25 PB7 TIOCB5 ULED2 40 26 6 5 ULEDI 39 27 5 1 4 PB5 38 28 PB4 TIOCA4 4 37 29 PB3 TIOCD3 PB3 36 30 PB2 TIOCC3 PB2 35 31 VSS GND 34 32 PBI TIOCB3 1 33 33 UVCC 32 34 PBO TIOCA3 PBO 31 35 PC7 SCS 11 PC7 30 36 PC6 SSCK1 PC6 29 37 PCS SSII 5 28 38 4 8501 4 27 39 PC3 SCSOn PC3 26 40 PC2 SSCKO PC2 25 41 PCI SSIO PCI 24 42 0 5500 PCO 23 43 PD7 PD7 22 44 PD6 PD6 21 45 PDS PDS 20 46 PD4 PD4 19 47 PD3 PD3 18 48 PD2 PD2 17 49 PD1 PD1 16 50 PDO PDO 15 6 2 HEADER J2 J2 Pin Function EDK Symbol Device Pin Function EDK Symbol Device No pin No pin 1 FWE FW 66 2 PLLVSS NC J2 01 65 3 PF7 PF7 68 4 PLLC
12. board The purpose of each button is clearly marked next to it Refer to the board layout for positions Section 3 1 Reset Switch This button provides the microcontroller with a timed reset pulse of at least 250mS 2 BootSwitch This button toggles the operating mode of the microcontroller A complete description of this function is given in section 5 6 3 NMI Switch This button provides a de bounced signal to the microcontroller for each operation of the button There is no minimum or maximum activation time for this button 4 2 SERIAL INTERFACE The serial interface on the EDK board has several functions The serial port on the microcontroller directly supports three wire serial interfaces Options are provided on the board for the user to write handshaking routines using standard port pins Other board option links allow users to control the entry and exit from boot mode using the same handshaking signals Refer to section 5 for details on setting serial interface options 4 2 1 CONNECTOR PIN DEFINITIONS The EDK RS232 interface conforms to Data Communication Equipment DCE format allowing the use of 1 1 cables when connected to Data Terminal Equipment DTE such as an IBM PC The cable used to connect to the EDK will affect the available board options A fully wired cable can allow handshaking between the microcontroller and the host PC subject to setting the board options and the availability of suitable host software Handshaking
13. e reset timer and extend the reset period Pressing the boot button within the 500mS period of a reset will not cause the board to enter boot mode 5 6 1 CPLD CODE The code is based upon a four state machine providing a guaranteed reset period which can be extended by holding the relevant control input in the active state When released the timer will extend the reset for approximately 500 The states are split into two functions one for User mode and one for Boot mode The first state of each is used to hold the reset line active When the timer expires then the second state is used to hold the device in the selected mode and wait for an external control signal to either move back into the user reset state or into the boot reset state 5 6 2 STATE DIAGRAM Boot Mode Controller Positive Logic MR a Y EE M CTS BootSw Res Wait iting n KA X N 8 mL A Boot Boot N N NS p DITE Res gt Reset Timer N P o a Res Res 7 7 o Clocked Transitions IRes Reset y 27 UR Res usingNES55 gt 7 4 Al solid transition 4 lines 7 N 27 4 Reset Pa NN v 4 WPS BootSW ResSw CTS BootWaiting IRes Ses A Ns Sa a FIGURE 5 2 CPLD STATE DIAGRAM 6 MICROCON
14. er and serial connection to a host computer 2 2 SERIAL CONNECTION The serial communications cable for connecting the EDK to a host computer is supplied The serial cable has 1 1 connectivity Figure 2 1 shows how to connect the EDK to a PC or notebook computer equipped with a nine pin D connector HOST PC EDK lt 3 3 lt 2 2 gt 5 5 FIGURE 2 1 SERIAL CONNECTION TO PC NOTEBOOK WITH DB 9 CONNECTOR SUPPLIED 2 3 POWER SUPPLY The EDK hardware requires a power supply of 5V Since total power consumption can vary widely due to external connections port states and memory configuration use a power supply capable of providing at least 500mA at 5V DC 5 The design is specified for evaluation of the microcontroller and so does not include circuitry for supply filtering noise reduction under voltage protection over current protection or reversed polarity protection Caution should be used when selecting and using a power supply The power connector on the EDK is a 2 5mm Barrel connector The center pin is the positive connection OV e 5 FIGURE 2 2 POWER SUPPLY CONNECTION Caution Existing customers using E6000 products note that the polarity of this board is opposite to that for the E6000 Use of the E6000 power supply with this board will damage both board and power supply 3 EDK LAYOUT The diagram shows a general layout
15. he board is connected to a power source the Power PWR led will illuminate The Boot mode indication LED will illuminate when the microcontroller has been placed into Boot mode Please see section 5 6 for more details of this function There are two LEDs dedicated for user control these are marked USR1 and USR2 Each LED will illuminate when the port pin is in a logical high state The user LEDs are connected to the following ports LED Port Microcontroller Pin Functions on Identifier Pin Pin Port Pin USRI PB6 6 5 39 USR2 PB7 7 5 40 TABLE 4 5 LED PORT CONNECTIONS 5 BOARD OPTIONS The EDK has a number of configuration settings set by jumpers CJ4 A B C D CJ5 A B C D and zero ohm links Common EDK functions can be set using the jumpers as described in sections 5 3 and 5 2 The additional zero ohm links provide additional features that may be required to interface with other systems All the Jumper link settings are three pin options There are four sets of options on each header The headers are numbered from 1 to 12 with pin 1 marked on the PCB by an arrow pointing to the pin The diagram below shows the numbering of these jumper links and indicates jumpers fitted 1 2 for each three pin jumper 5 1 JUMPER LINKS Power NMI Switch
16. is not supported as standard on the microcontroller so for normal use a minimal three wire cable can be used The minimum connections are unshaded in the following table EDK DB9 Signal Host DB9 Connector Pin Connector Pin No Connection EDK Tx Host Rx EDK Rx Host Tx No Connection Ground No Connection EDK CTS Host RTS EDK RTS Host CTS No Connection cA ul A BY BW boy TABLE 4 1 RS232 INTERFACE CONNECTIONS These are not connected on the EDK by default See section 5 4 for more details FIGURE 4 1 EDK SERIAL PORT PIN NUMBERING 4 2 2 CRYSTAL CHOICE The operating crystal frequency has been chosen to support the fastest operation and provide the most reliable CAN communication The value of the crystal is 20MHz The following table shows the baud rates and Baud Rate Register BRR setting required for each communication rate using the above default operating speed It also confirms the resultant baud rate and the bit error rate that can be expected Baud Rate Register Settings for Serial Communication Rates Setting BRR Actual ERR BRR Actual ERR BRR Actual ERR BRR Actual ERR Baud setting Rate setting Rate setting Rate setting Rate 110 invalid invalid invalid invalid invalid invalid invalid 88 110 0 25 300 invalid invalid j invalid invalid invalid 300 0 16 296 1 36 1200 invalid invalid 129 1202 0 16
17. it must be re compiled FDTUserModeMicroKernel FDT User Mode Kernel H 0001F600 84C This is at a fixed location and must not be moved Should the kernel need to be moved it must be re compiled CUser_Vectors Pointer used by HMON to point to the start of user code H 0000400 4 14 MEMORY H 00000000 H 00000400 H 00000403 H 00001000 H 00001 123 H 00001124 H 0000348D H 0001F600 H 0001FE4B H 0001F FFF H OOFFD800 H OOFFDC32 H OOFFDE48 H OOFFEDCO H OOFFEFBF H OOFFF800 H 00FFFF60 H OOFFFFBF H OOFFFFCO H OOFFFFFF RESET Vector TRAP Vectors CUser Vectors FDTInit HW Break Vector PHMON CHMON SCI Vectors On Chip FLASH ROM FDTUserModeMicr oKernel On Chip RAM BHMON Stack Internal I O REGISTERS Internal I O REGISTERS On Chip RAM H 00000000 H 00000003 H 00000020 H 0000002F H 0000006C H 0000006F H 00000160 H 0000016B 15 7 1 5 BAUD RATE SETTING HMON has initially set to connect at 57600 Baud Should the user wish to change this the value for the BRR in HMONserialconfiguser c will need to be changed and the project re built Please refer to the HMON User Manual for further information 7 1 6 INTERRUPT MASK SECTIONS HMON has an interrupt priority of 6 The serial port has an interrupt priority of 7 Modules using inte
18. m EDK N A From CPLD CR7 Not Fitted Change Mode request to EDK N A From CPLD CRI6 Not Fitted Alternate RTS232 Ready to send from EDK P33 CR13 Not Fitted Alternate CTS232 Clear to send to EDK P35 IRQ5n TABLE 5 5 OPTION LINKS SERIAL PORT CONTROL See section 5 6 Note These setting pairs are exclusive If CR12 and are fitted CR16 and CR13 must not be fitted If CR16 and CR13 are fitted CR12 and CR7 must not be fitted 5 5 FLASH PROGRAMMING HEADER The Flash Programming header is used with the Renesas Flash Debug Module FDM The FDM is a USB based programming tool for control and programming of Renesas microcontrollers available separately from Renesas This header provides direct access for the FDM to control the EDK microcontroller To utilise this header the user must make the following changes to the board configuration 1 Disable the RX232 signal from the RS232 transceiver Jumper link CJ4 A is provided for this purpose Please refer to section5 3 2 Disable User Program Mode using jumper CJ4 B Please refer to section5 3 Caution Do not operate the board with the user mode jumpers removed and the FDB disconnected as the microcontroller mode pins will float to an indeterminate state This may damage the microcontroller device 5 6 Boot CONTROL The method for placing the microcontroller device in to Boot mode for reprogramming has been incorporated into a complex programmable logic
19. rocontroller Supply Voltage 2 RXDISn Disable Flash Header functions Pulled low Enables RX232 3 No Connection No Connection 4 UVCC Microcontroller Supply Voltage 5 UPM CPLD Controlled option to set Flash Write FW Pulled low 6 No Connection No Connection 7 No Connection No Connection 8 No Connection No Connection 9 No Connection No Connection 10 No Connection No Connection 11 No Connection No Connection 12 No Connection No Connection 10 5 4 SERIAL PORT SELECTION The programming serial port is connected to the RS232 connector by default This allows direct programming of the EDK using the supplied software tools A secondary serial port is available on the microcontroller and can be connected to the RS232 connector by changing some board option links The additional port option allows the user to write messages or connect to other devices via the serial port while programming support is provided by the Flash programming header The following surface mount zero ohm link settings are fitted by default and connect the RS232 header to the programming serial port of the microcontroller Zero ohm Default Function Microcontroller Link ID Port Pin CR20 Fitted Transmit data from EDK 2 1 CR23 Fitted Receive data to EDK RxD2 PA2 CRI9 Not Fitted Alternate Transmit data from EDK TxD0 P30 CR22 Not Fitted Alternate Receive data to EDK RxD0 P31 TABLE 5 3 OPTION LINKS DEFAULT SETT
20. rrupts should be set to lower than this value 6 or below so that serial communications and debugging capability is maintained 7 2 ADDITIONAL INFORMATION For details on how to use High Performance Embedded Workshop HEW with HMON refer to the HEW manual available on the CD or from the web site For information about the H8S 2628 series microcontrollers refer to the H8S 2628 Series Hardware Manual For information about the H8S 2628 assembly language refer to the H8S Series Programming Manual Further information available for this product can be found on the Renesas web site at http www eu renesas com tools General information on Renesas Microcontrollers can be found at the following URLs Global http www renesas com
21. ulled Low CJ 5 B Default 1 2 User Mode Setting Bit 1 MDI pulled High MDI pulled Low CJ 5 C Default 1 2 User Mode Setting Bit 2 MD2 pulled High MD2 pulled Low CISD User Mode Setting Bit 3 MD3 pulled High MD3 pulled Low Default 1 2 DEHNS Di pulled Hig TABLE 5 1 USER MODE JUMPER SETTINGS DEFAULT SETTINGS IN BOLD The default settings indicated in bold text place the microcontroller into Mode 7 5 3 EDK OPTIONS CJ4 The EDK options provide access to commonly used features of the EDK range These jumpers must be fitted at all times to ensure correct operation of the EDK Jumper Function Setting 1 2 Setting 2 3 CJ 4 A Default 2 3 Source Serial Receive Disables the RS232 receive signal to enable the use of the Flash Programming Header Enables the RS232 receive signal The Flash Programming Header must not be used in this state Disables the Flash write hardware Enables the Flash write hardware CJ 4 B UN protection protection Default 2 3 M A 5 The flash can be overwritten in The flash cannot be overwritten in User Mode CJ 4 C Not Used Not Used CJ 4 D Not Used Not Used TABLE 5 2 BOARD OPTION JUMPER SETTINGS DEFAULT SETTINGS IN BOLD See section 5 5 The following table lists the connections to each jumper pin Pin Net Name Description 1 UVCC Mic
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