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MC68LC302

1. based on the information in this document Freescale Semiconductor reserves the right to make changes without further notice to any products herein Freescale Semiconductor makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation consequential or incidental damages Typical parameters which may be provided in Freescale Semiconductor data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts Freescale Semiconductor does not convey any license under its patent rights nor the rights of others Freescale Semiconductor products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application Buyer shall indemnify and hold Freescale Sem
2. Control IPLO IRQT BR IPL1 IRQ6 BGACK IPL2 IROZ BG Clock CLKO ag EXTAL gt XTAL a XFC For More Information On This Product Go to www freescale com Freescale Semiconductor Inc Table 1 MC68LC302 Ordering Information Package Type Operating Frequency Temperature Order Number Voltage MHz Pin Grid Array 5V 20 0 C to 70 C MC68LC302RC20 RC Suffix Thin Quad Flat Pack 5V 16 67 0 C to 70 C MC68LC302PU16 PU Suffix 5V 16 67 40 C to 85 C MC68LC302CPU16 5V 20 0 C to 70 C MC68LC302PU20 5V 20 40 C to 85 C TBD Thin Quad Flat Pack 3 3V 16 67 0 C to 70 C MC68LC302PU16V PU Suffix 3 3V 16 67 40 C to 85 C MC68LC302CPU16V 3 3V 20 0 C to 70 C TBD 3 3V 20 40 C to 85 C TBD Table 2 Documentation Document Title Order Number Conients MC68302 User s Manual MC68302UM AD Detailed information for design M68000 Family Programmer s Reference Manual M68000PM AD M68000 Family instruction set The 68K Source BR729 D Independent vendor listing supporting soft ware and development tools The 68LC302 Addendum Describes the differences between the MC68302 and the MC68LC302 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits
3. Freescale Semiconductor Order this document by MC68LC302 D MC68LC302 e 2 freescale semiconductor Product Brief Low Cost Integrated Multiprotocol Processor Freescale introduces the low cost version of the well known MC68302 Integrated Multiprotocol Processor IMP It will be known as the MC68LC302 and will expand a family of devices based on the MC68302 Some features and pins have been removed while other features have been enhanced as compared to the original MC68302 Simply put the MC68LC302 is a traditional MC68302 with a new static 68000 core a new timer and low power modes but without the third serial communication controller SCC It is packaged in a low profile 100 TQFP that requires less board space than the regular MC68302 as well as making it suitable for use in height restricted applications such as PCMCIA De e E e E 1 LOW 1 GENERAL 3 TIMERS POWER INTERRUPT PURPOSE 4 CHIP SELECTS CONTROL CONTROLLER DMA RAM ROM CHANNEL SYSTEM CONTROL 68000 STATIC 68000 SYSTEM BUS CORE 20 ADDRESS 8 16 DATA l l l l l l l l l 2 BYTES 4 SDMA 1152 BYTE PIT l DUAL PORT CHANNELS rat l l l l l l l l l l This document contains information on a product under development Freescale reserves the right to change or discontinue this product without notice For More Information On This Product Go to www freescale com Freescale Semiconductor Inc FEATURES The featu
4. etained the MC68LC302 can function as a fully intelligent DMA driven peripheral chip containing serial channels timers chip selects etc DIFFERENCES BETWEEN THE MC68LC302 AND MC68302 The MC68LC302 has some specific differences from the MC68302 Even though the functionality of the processor and the peripherals remain the same some of the flexibility has been removed due to the pin reduction from 132 on the original MC68302 to 100 pins on the MC68LC302 The following features have been removed or modified from the MC68302 in order to make the MC68LC302 possible SCC and its baud rate generator BRG3 are removed e External masters are not able to take the bus away from the MC68LC302 through the normal bus arbi tration scheme as these pins no longer exist An external master can still maintain bus mastership through a simple scheme using the HALT pin This restriction does not apply when using the MC68LC302 in CPU disabled mode slave mode in which case BR BG and BGACK are all available MC68LC302 PRODUCT INFORMATION For More Information On This Product Go to www freescale com Freescale Semiconductor Inc The SCP pins are now muxed with PA8 PAY and PA10 The TXD3 RXD3 and RCLK functions asso ciated with SCC3 are eliminated The UDS LDS and R W pins are not available except in slave mode where they replace the IPL2 0 pins Instead the new pins WEH WEL and OE have been defined for glueless interfacing to me
5. iconductor and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part RoHS compliant and or Pb free versions of Freescale products have the functionality and electrical characteristics of their non ROHS compliant and or non Pb free counterparts For further information see http www freescale com or contact your Freescale sales representative For information on Freescale s Environmental Products program go to http www freescale com epp 2 freescale semiconductor mu SEMICONDUCTOR PRODUCT INFORMATION memm For More Information On This Product Go to www freescale com
6. mory PA12 is now muxed with the MODCLK pin which is associated with the 32 KHz or 4 MHz PLL The MOD CLK pin is sampled after reset and then becomes PA12 New VCCSYN GNDSYN and XFC pins have been added in support of the on chip PLL For purposes of emulation and development support only a special 132 PGA version is supported This version adds back the FC2 0 IAC FRZ and AVEC pins The FC2 0 pins allow bus cycles to be distin guished between program and data accesses interrupt cycles etc The IAC FRZ and AVEC pins are provided so that emulation vendors can quickly retrofit their existing MC68302 emulator designs to sup port the MC68LC302 MC68LC302 PRODUCT INFORMATION For More Information On This Product Go to www freescale com Freescale Semiconductor Inc MC68LC302 PIN DESCRIPTION NMSI1 ISDN I F RXD1 L1RXD TXD1 L1TXD RCLK1 L1CLK TCLK1 L1SY0 SDS1 CDT L1SY1 CTST LIGR RTST L1RQ GCIDCL RXD2 PA0 TXD2 PA1 RCLK2 PA2 TCLK2 PA3 CTS2 PA4 RTS2 PA5 CD2 PA6 BRG2 SDS2 PA7 NMSI2 PAIO SPRXD PA8 SPTXD PAQ SPCLK PA10 MODCLKPA12 PAIO SCP TIN1 PB3 TIN2 PB5 TOUT2 PB6 WDOG PB7 TIMER PBIO PB8 PB9 PB10 PB11 IQGND 2 lQVDD 2 MC68LC302 Signals MC68LC302 PRODUCT INFORMATION Address Bus A1 A19 Chip Select CSOAOUT2 CS3 CST Data Bus DO D15 Bus Control WEH AO UDS A0 WEL WE LDS DS DTACK OE R W System Control RESET HALT BUSW DISCPU Interrupt
7. pport MC68LC302 PRODUCT INFORMATION For More Information On This Product Go to www freescale com Freescale Semiconductor Inc MC68LC302 APPLICATIONS The MC68LC302 excels in several applications areas First any application using the MC68302 but not needing all three serial channels is a potential candidate for the MC68LC302 Note however that the MC68LC302 sacrifices most of the provision for external bus mastership thus the MC68LC302 may not be appropriate where the MC68302 is used as part of larger systems Second the MC68LC302 excels in low power and portable applications The inclusion of a static 68000 core coupled with the low power modes built into the device make it ideal for handheld or other low power applications The new 32 kHz or 4 MHz PLL option greatly reduces the total power budget of the designer s board and allows the MC68LC302 to be an effective device in low power systems The MC68LC302 can then optionally generate a full frequency clock for use by the rest of the board During low power modes the new periodic interrupt timer PIT allows the device to awaken at regular intervals In addition two pins can awaken the device from low power modes Third given that the MC68LC302 is packaged in a 100TQFP package it allows the MC68LC302 to be used in space critical applications as well as height critical applications such as PCMCIA cards Fourth since the disable CPU mode also known as slave mode is still r
8. res of the MC68LC302 are as follows Bold face items show major differences from the MC68302 On Chip Static 68000 Core Supporting a 16 or 8 Bit M68000 Family System SIB Including Independent Direct Memory Access IDMA Controller Interrupt Controller with Two Modes of Operation Parallel Input Output I O Ports Some with Interrupt Capability On Chip 1152 Byte Dual Port RAM Three Timers Including a Watchdog Timer New Periodic Interrupt Timer PIT Four Programmable Chip Select Lines with Wait State Generator Logic Programmable Address Mapping of the Dual Port RAM and IMP Registers On Chip Clock Generator with Output Signal On Chip PLL Allows Operation with 32 kHz or 4 MHz Crystals Glueless Interface to EPROM SRAM Flash EPROM and EEPROM Allows Boot in 8 bit Mode and Running Switch to 16 bit Mode System Control System Status and Control Logic Disable CPU Logic Slave Mode Operation Hardware Watchdog New Low Power Standby Modes with Wake Up from Two Pins or PIT Freeze Control for Debugging Available Only in the PGA Package DRAM Refresh Controller CP Including Main Controller RISC Processor Two Independent Full Duplex Serial Communications Controllers SCCs Supporting Various Protocols High Level Synchronous Data Link Control HDLC SDLC Universal Asynchronous Receiver Transmitter UART Binary Synchronous Communication BISYNC Transparent Modes Autobaud Su

MC68LC302

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