PC/104 Peripheral boards MSMCAN CAN
Contents
1. ia 13 Ganhes15 vs 25 iniecit ees ttt 27 eee bete ie 24 CIA Can in Automation International Users and Manufacturers 30 DATA 0000000000000000 28 29 DIAGNOSHOS ni tree rates 30 ERROR explanations 28 Failure and Hints 4 002 31 ate e ec eet 15 ID 00000000 28 29 ID2Z0 IDISS oe oa 28 1028 1021 Target Addr Bits 10 28 In Buffer 03E05 e RBS 28 29 Intel Coporation 2 2 30 1 ices ei are eve en 15 IO mapped 18 J113 J10 iii Deere 15 cu cob eu 13 J6 SWIN 15 J7 Porterweiterung 13 Jumper descriptions 15 laVOUt Hie ia iena pee Ael 17 LEG 022 s e d n eai at eiie 23 Literature Sales ete Rete 30 Mask Register 28 15 MEMORY mapped 19 mode 32 LI Ai bere ea eat te 12 2 0 ene 15 MSMGANME2. It must be derived from the decode of LA17 through LA23 MEMCS16 should be driven with an open collector 300 ohm pull up or tri state driver capable of sinking 20mA MEMR input output These signals instruct the memory devices to drive data onto the data bus MEMR is active on all mem ory read cycles MEMR may be driven by any microprocessor or DMA controller in the system When a microprocessor on the 1 0 channel wishes to drive MEMR it must have the address lines valid on the bus for one system clock period before driving MEMR active These signals are active low MEMW input output These signals instruct the memory devices to store the data present on the data bus MEMW is active in all memory read cycles MEMW may be driven by any microprocessor or DMA controller in the system When a microprocessor on the I O channel wishes to drive MEMW it must have the address lines valid on the bus for one system clock period before driving MEMW active Both signals are active low OSC output Oscillator OSC is a high speed clock with a 70 nanosecond period 14 31818 MHz This signal is not synchronous with the system clock It has a 50 duty cycle OSC starts 100us after reset is inactive RESETDRYV output Reset Drive is used to reset or initiate system logic at power up time or during a low line voltage outage This signal is active high When the signal is active all adapters should turn off or tri state all drivers con nected t
3. NetWare Novell Corporation Ethernet Xerox Corporation DR DOS PALMDOS Digital Research Inc Novell Inc ROM DOS Datalight Inc 1 3 Disclaimer DIGITAL LOGIC AG makes no representations or warranties with respect to the content of this manual and specifically disclaims any implied warranty of merchantability or fitness for any particular purpose DIGITAL LOGIC AG shall under no circumstances be liable for incidental or consequential damages or related expenses resulting from the use of this product even if it has been notified of the possibility of such damage DIGITAL LOGIC AG reserves the right to revise this publication from time to time without obligation to notify any person of such revisions If errors are found please contact DIGITAL LOGIC AG at the address listed on the title page of this document 1 4 Who should use this product Electronic engineers with know how in PC technology Without electronic know how we expect you to have questions This manual assumes that you have a general knowledge of PC electronics Because of the complexity and the variability of PC technology we can t give any warranty that the product will work in any particular situation or combination Our technical support will help you Pay attention to the electrostatic discharges Use a CMOS protected workplace Power supply OFF when you are working on the board or connecting any cables or devices This is a high technology product You need
4. TECHNICAL USER S MANUAL FOR MICRGSPACE PC 104 Peripheral boards MSMCAN CAN BUS interface card BIGITAL L GIC Nordstrasse 11 F CH 4542 Luterbach Tel 41 0 32 681 53 33 Fax 41 0 32 681 53 31 DIGITAL LOGIC AG MSMCAN Manual V1 60b COPYRIGHT 1992 95 BY DIGITAL LOGIC AG No part of this document may be reproduced transmitted transcribed stored in a retrieval system in any form or by any means electronic mechanical optical manual or otherwise without the prior written per mission of DIGITAL LOGIC AG The software described herein together with this document are furnished under a license agreement and may be used or copied only in accordance with the terms of that agreement REVISION HISTORY Prod Serialnumber Product Document Date Visa Modification MR To Version Remans News Attention 02 95 FK 07 95 FK 7 09 96 RP NeW Structure pO AB 09 96 RP Jumper PAB VS 10 96 Function 04 05 Revision 12 97 SL__ Write to register sample rev Vt52 030915 Related APP NOTES BETA V1 60b 03 99 JM Maintenance update DIGITAL LOGIC AG MSMCAN Manual V1 60b Registration Form Please register your product under http www digitallogic ch gt SUPPORT gt Product Registration After registration you will receive driver amp software updates errata information customer information and news from DIGITAL LOGIC AG products automatically D
5. 6 1 2 PLD Equallons ss sede eee ree P ee d ue Er e ERR eee 15 6 1 3 51 IO BASE Adaress Selection Switch sse 15 6 1 4 S2I1RQ Selector SWIlch idit ete Eee 16 6 1 5 S3 NODE Selector Switch iii 16 6 2 Board Layout EE 17 T SOFTIWAHE T lille ep REA RR EE ER ERI RR NER EE 18 7 1 Delivered Eefo CERERI 18 7 2 Accessing the CAN Controller 82527 from 18 7 2 1 1 Operalioh passa ela PARERE RSEN 18 7 2 2 MEMORY mapped 19 7 3 Functions of the CAN Driver i 19 7 3 1 Function INIT CAN With AH 00 19 7 3 2 Function TRANSMIT CAN MESSAGE with AH 01 20 7 3 3 Function READY CAN with AH 02 iii 20 7 3 4 Function RECEIVE ONE CAN MESSAGE with AH 03 21 7 3 5 Function CAN RxDADH with AH 4 22 7 3 6 Function Get Status Register with AH 5 22 7 4 Program Example in Pascal aei ce teet ae dt deca d 24 8 BUILDING A SYSTEM alia nl alii 26 8 1 CAN Bus cable and 26 8 2 Tostat GAINICaEG ara ra 26 8 2 1 Installation of the CAN Driver CA I9 COM or 15 26 8 3 The CANTEST EXE Program to monitor the CAN b
6. Function request number AL undefined BL transfer speed BL 00for 100 kBit sec BL 01 for 500 kBit sec BL 02 for 20 kBit sec BL 03 for 50 kBit sec Register definition after returning from INT61h AL Status of the CAN controller DIGITAL LOGIC AG MSMCAN Manual V1 60b 7 3 2 Function TRANSMIT CAN MESSAGE with AH 01 Function description This function transmits one CAN message to the CAN bus The length of the datafield must be defined over register CL Since the INTEL CAN controller allows to communicate with basic and with extended CAN the message type must be defined by register CH The CAN message is composed of the ARBITRATION and the DATA string Register definition before calling the INT61h AH 01 Function request number AL 01 01 uses the first message buffer of the 82527 CL Data Length code CL 00 08 8 databytes are the maximum CH CAN message type CH 00 BASIC CAN CH 2 01 EXTENDED CAN ES SI Pointer to the first byte of the CAN message CAN Message Byte number 00 01 02 03 04 05 06 07 08 o9 oa 08 Arbitration Jo H 223 j J j Databyes 00 02 04 os 106 7 number of the valid databytes is defined by register CL BASIC CAN Only the first 11 bits of the arbitration string may be used EXTENDED CAN All 21 bits of the arbitration string may be used Register definition after returning from INT61h AL Status of t
7. WRITELN Anzahl noch vorhandener Messages Daten FOR c 1 TO 12 DO BEGIN WRITE canreceivemess c END readln 25 DIGITAL LOGIC AG MSMCAN Manual V1 60b 8 BUILDING A SYSTEM 8 1 CAN Bus cable and termination The CAN bus must be terminated on each end of the bus with one 1200hm resistor Connector Pin 2 First CAN Node1 CAN Node2 CAN Node Last CAN Node 8 2 To start the CAN card The 15 19 driver is a stay memory resident program that may be asked by every appli cation or programming language to communicate with the CAN board The CAN driver provides four general functions TRANSMIT RECEIVE INIT and READY Before the CAN driver may be accessed the driver must be installed 8 2 1 Installation of the CAN Driver CA 19 or CA 15 COM CA 15 To use with IRQ5 and IO ADR 340 CA 19 To use with IRQ9 and IO ADR 340 default If you need another IRQ or IO ADR it has to be altered in the CA I5 ASM 19 5 The CAN board is at default IRQ 9 and address 340 Do not change anything Execute the file 19 MM e ke e e hee e hee e e ee e ee e ee e ee e ee installation message informs you DIGITAL LOGIC AG Switzerland about the successful installation as a MM ke e e hee e he e e hee e e e e e e ee e ee e ee e ee e ee e ee ee e e ke kx memory resident program TSR CAN Driver 82527 Ver 1 10b Parameters Speed var 20k
8. a sequence have occurred in part of a received message where this is not allowed 02 Form Error 03 Acknowledge Error The message transmitted by this device was not acknowledged by another node 04 Bit 1 Error During the transmission of a message the 82527 wanted to send a recessive level but the monitored CAN bus value was dominant 05 Bit O Error During the transmission of a message the 82527 wanted to send a dominant level but the monitored CAN bus value was recessive 06 CRC Error The CRC checksum was incorrect in the message received 07 unused 23 DIGITAL LOGIC AG MSMCAN Manual V1 60b 7 4 Program Example in Pascal The purpose is to make a program in a higer language which uses the six general functions TRANSMIT RECEIVE INIT READY RxDADR and Get Status from the CAN driver CA_I5 COM CA I9 COM Before the CAN driver may be accessed the driver must be installed The CA 15 COM CA I9 COM CAN driver is a stay memory resident program that may be asked by every application or programming language to communicate with the CAN board First we used the program example INTR from the Pascal 6 help With this example we established the next two program The CanTran1 exe program transmits one CAN message to the CAN bus PROGRAM CanTranl USES crt printer dos CONST canmessage array 1 12 of BYTI 02 02 00 00 01 02 03 04 05 06 07 08 bi Il VAR Daten byte regs Registers O
9. facturers Group Address Weichelgarten 26 D 91058 Erlangen Tel 49 9131 601091 FAX 49 9131 601092 Copies of the Intel 82527 Manual or other Intel literature may be obtained from Intel Coporation Literature Sales P O Box 7641 Mt Prospect IL 60056 7641 or call 1 800 879 4683 Or ask your local Intel dealer 30 DIGITAL LOGIC AG MSMCAN Manual V1 60b 10 FAILURES AND HINTS 10 1 CAN does not work Check 1 tmustbe E SS we Does the Software which you have loded n correspond with IRQ and address 10 2 500 kBit s Speed Problem Fast access With 500kB s speed transmission we remarked that it could be necessary to pull up the Databus of the 82C527 with 10k resistors All boards V1 4 and later and some of V1 3 have already integrated pull ups Older boards may be updated by DLAG IRQ BASE Address ve Ll R16 31 DIGITAL LOGIC AG MSMCAN Manual V1 60b 11 INDEX 500 kBit s speed 31 82527 Controller e ERI 12 Accessing the CAN Controller 82527 from Intel 18 isses indian 17 71 217217 oii MURAT ni Li d 23 I5 GOM ttd ettet 26 19 in eoe n nudes 26 ETE 26 CAN Connector DSUB9 13 CAN Message Len 0 8 08 28 CANE Signal entere tee e tette tes 13
10. know how in electronics and PC technology to install the system DIGITAL LOGIC AG MSMCAN Manual V1 60b 1 5 Recycling information Hardware Print epoxy with glass fiber wires are of tin plated copper Components ceramics and alloys of gold silver check your local electronic recycling Software no problems re use the diskette after formatting 1 6 Technical Support 1 Contact your local Digital Logic Technical Support in your country 2 Use Internet Support Request form on http www digitallogic ch gt support 3 Send a FAX or an E mail to DIGITAL LOGIC AG with a description of your problem DIGITAL LOGIC AG Dept Tech Support Fax 41 32 681 53 31 Nordstr 4F E Mail support digitallogic ch CH 4542 Luterbach SWITZERLAND Support requests will only be accepted with detailed informations about the product BIOS Board Version 1 7 Limited Warranty DIGITAL LOGIC AG warrants the hardware and software products it manufactures and produces to be free from defects in materials and workmanship for one year following the date of shipment from DIGITAL LOGIC AG Switzerland This warranty is limited to the original product purchaser and is not transferable During the one year warranty period DIGITAL LOGIC AG will repair or replace at its discretion any de fective product or part at no additional charge provided that the product is returned shipping prepaid to DIGITAL LOGIC AG All replaced parts an
11. message added on the program cantest ASM 28 MSMCAN Manual V1 60b DIGITAL LOGIC AG Parameters defined by CA COM var Speed CA COM Version 1 10 must be loaded before this program Only basic CAN mode ID28 to ID18 are addresses other are zero 1028 1021 Target Adr Bits 10 1020 1013 00 CAN Message Len 0 8 DLC 08 ID28 ID21 Receive Mask Bit 00 1D20 ID13 00 0 undef 1 equality 1028 1021 Receive Adr Bits 00 1020 1013 00 Status BOff Warn Wake RxOK TxOK Err2 Err1 ErrO 35 Define Transmit ADR LEN Define bitrate and init Define Receive Mask ADR Send a message Receive a message Get 527 Status EXIT Rx Message 3825 Buffer 03 0 10 00000000 DATA 0000000000000000 Tx Message ID 10000000 DATA 3344556677889900 DIGITAL LOGIC AG In Buffer 03 0 It is implemented in the ca_i9 com There are 1024 messages possi ble to store ID 00000000 Target Address from the RX message DATA 00 00 00 00 00 00 00 00 01234567 These are the data of the message Object Structure page 21 Description Execute the file CA COM The previous installed CAN driver will be uninstalled The displayed message informs you about the suc cessful uninstallation from the memory 29 MSMCAN Manual V1 60b 19 ENTER Reinstallation of CAN Driver OK DIGITAL LOGIC AG MSMCAN V1 51 9 DIAGNOSTICS 9 1 General If you need more information on CAN contact the CIA CAN Automation International Users and Manu
12. IGITAL LOGIC AG MSMCAN Manual V1 60b Table of Contents MI elec ctt 6 1 1 How to use this manual epe 6 1 2 Trademarks eee abe eee ee E ded ieee 6 1 3 er xxm 6 1 4 Who should use this product ceci ea Eee cepe pere detta 6 1 5 RECyGlingi E a EET EE 7 1 6 ER 7 1 7 Limited Warranty erede nee at e inserunt Fea EE Rin te EROR asi Pe eR HER 7 2 OVERNNIEM lle 8 2 1 Standard Features nde bet o etre desi e Las fe e rece Maiani 8 2 2 Ordernng Informiatlon iena dre et deae ad dah 8 2 3 Related Application 8 3 IPCHOA BUS SIGNALS iri Feo Eras Feo ta eran kx emi es ees 9 4 DETAIL SYSTEM DESCRIPTION 5 2 2 22202 lira 12 4 1 82527 CONTE nana RR MN MS 12 5 DESCRIPTION OF THE CONNECTORS eeeeeeeeeee eene n nnn nnne nnn nnns 13 5 1 GAN Connector DSUB9 irte rip ee be ERU eset Ud esae ku 13 5 2 J7 Port Expansion P20 P27 for the 82527 Chip 13 5 3 JA0 PGATOA BUS Interface 5e urne aede eed ea Feu nu e esee d 14 6 JUMPER LOCATIONS ON THE BOARD eene nennen nennen nn nnn nnn nnne nnn nn nnns 15 6 1 Jumper Descriptloris 15 6 1 1 or Memory mapped ie 15
13. K eK ON COR KE BK KER RRA ERR LEE ARR ER KN Main 1 RAR KERR RR AR BRIAR IKE RRR RIK ook Eo COR e RRR EAE KBR OK y BEGIN TEXTCOLOR lightgreen TEXTBACKGROUND blue CLRSCR WRITELN ERROR EARL LAKE AR RIK GUN KR RK TOK KN Function Init CAN with AH 00 Koo eue see ke ko ok ee deo eco ok Init CAN function regs ah 0 Function request number regs al 0 none regs bl 0 transferspeed 100k Intr 61 regs Call DOS Funktion INT61 LIRR KER IRR LIEK IRE RIES ARK BK KEK BIEN Function Transmit CAN Message with AH 01 OK ON IER RRA BRK ERE ERR EN regs ah 1 Function request number regs al 1 uses the first message buffer 1 of the 82527 regs cl 8 00 08 databytes regs ch 0 BASIC CAN regs es Seg canmessage Pointer to the first regs si Ofs canmessage 1 byte of the CAN message Intr 61 regs Call DOS Function INT61 daten regs al Get Status of the CAN controller WRITELN WRITE Das CAN Resultat ist Daten READLN END 24 DIGITAL LOGIC AG MSMCAN Manual V1 60b The CANRES1 EXE program will receive only one message PROGRAM CanRes1 USES crt printer dos CONST canmessage array 1 12 of BYTE 02 02 00 00 01 02 03 04 05 06 07 08 Daten byt
14. LOGIC AG MSMCAN Manual V1 60b 7 SOFTWARE 7 1 Delivered Software Available from our BBS No 41 32 681 53 34 tools can zip CA_I5 AS 35 341 08 31 96 12 43p CA_I9 AS 35 341 08 31 96 12 43p CANTES AS 15 688 08 31 96 4 24p CANTES EXE 3 756 08 31 96 4 24p DOSLIB INC 37 006 08 31 96 3 18p CA I5 CO 15 53213 08 31 96 12 43 CA I9 CO 157323 08 31 96 12 43p CANSELE AS 14 411 08 31 96 3 06p CANSELE EXE 3 654 08 31 96 3 05p MAKECAN BAT 9 02 07 95 3 12 7 2 Accessing the CAN Controller 82527 from Intel 7 2 1 10 mapped Operation This mode is default on standard boards Assumes that the BASE IO ADR is selected on 340h Assumes that you are using an IO mapped board with the PLD Sample Read modify write back register 08 of the 82527 Register Address mov dx 341 Register 08 mov 1 08h out dx 1 Register Address mo dx 340h Read register 08 from 82527 to al ecs 097 winie 148 ada wals or and al xx Write iochlmtsci register back 82521 out For testing the correct settings read the power on default in the Register 02 Register Address mov dx 341 Register 02 mov al 02h out dx al Register Address mov dx 340h Read register 02 from 82527 to al in al dx The result in the al register must be 61h this is the default value after power up For more information see 82527 Serial Communicatio
15. PP2 5 2 nni 15 Ordering 8 PC 104 BUS Interface 14 PLD Equations Diiira ar 15 Receive 28 RECEIVE ONE CAN MESSAGE 21 eH E Re PEE 23 S1 BASE Address Selection Switch 15 S2 IRQ Selector 16 S3 NODE Selector 16 9 E 18 15121510 27 Standard 8 i ee EID III 28 Status Register 01H information 22 termination tad e pret 26 The Functions of the CAN Driver 19 DIGITAL LOGIC AG TXOK P 23 U15 PLD wis evden ce reete 15 Uninstalling the CAN Driver CA COM 29 33 MSMCAN Manual V1 60b
16. US 27 8 4 Uninstalling the CAN Driver CA COM wien 29 DIGITAL LOGIC AG MSMCAN Manual V1 60b 9 DIAGNOSTICS 2 30 9 1 Generali dual lot ed tel olo cal di ve ii ie n rel er ch us Nc 30 10 FAILURES AND HINTS li 31 10 1 GAN does notwWorlk gt raise in anie uerb 31 10 2 500 kBit s Speed Problem ii 31 11 m 32 DIGITAL LOGIC AG MSMCAN Manual V1 60b 1 PREFACE This manual is for integrators and programmers of systems based on the MICROSPACE card family It contains information on hardware requirements interconnections and details of how to program the sys tem The specifications given in this manual were correct at the time of printing advances mean that some may have changed in the meantime If errors are found please notify DIGITAL LOGIC AG at the address shown on the title page of this document and we will correct them as soon as possible 1 1 How to use this manual This manual is written for the original equipment manufacturer OEM who plans to build computer sys tems based on the single board MICROSPACE PC It provides instructions for installing and configuring MICROSPACE boards and describes the system and setup requirements 1 2 Trademarks Chips amp Technologies SuperState R MICROSPACE MicroModule DIGITAL LOGIC AG DOS Vx y Windows Microsoft Inc PC AT PC XT IBM
17. als are not connected on this board o 2 Grund Ground 3 SD6 5V LA22 186510 6 502 8 9 IOCHRDY i 5 19 5 18 5 17 5 16 5 15 5 14 5 13 5 12 0 1 2 3 4 5 6 7 8 9 0 SA11 1 2 3 4 5 6 7 8 9 0 1 2 L SAQ SA8 SA7 SA5 SA4 SA3 SA2 3 SAI 31 SAO Ground 5 Volt 2 2 2 2 2 2 2 2 2 2 3 Ground Ground DIGITAL LOGIC AG MSMCAN Manual V1 60b 6 JUMPER LOCATIONS ON THE BOARD 6 1 Jumper Descriptions 6 1 1 10 mapped Memory mapped MSMCAN operates IO mapped or Memory mapped depending on the PLD Version and the jumper selections Refer to the following list Jumper PLD Version IO mapped MEM mapped J10 Switch 1 2 disable the Sax 2 3 enable 5 0 5 7 2 8 enable the SA latch 1 2 disable the SA latch J6 Switch 2 3 enable SA latch 1 2 disable the SA latch U15 PLD Software MSMCANIO PP2 MSMCANME PP2 Device GAL20V8A GAL20V8A Marking on the PLD Device CAN CAN IO MEM Default 6 1 2 PLD Equations MEM mapped CS244 Node Switch AO A1 SELIO IOR lt CS373 IO Address Latch for CANC AO A1 SELIO GND CS245 Databus Select JAO A1 SELIO DTR245 IOR RW for CANC IOW CANCS for CANC I JAO A1 SELIO PCINT PC Interrupt CANINT CANINT IORDY PC Ready Signal VCC VCC AND 6 1 3 S1 IO BASE Ad
18. current CAN message CAN Message Byte number 00 01 02 03 04 05 06 07 08 09 0 oB 2 3 Databytes 1 00 jot 02 03 04 05 oe 07 BASIC CAN Only the first 11 bits of the arbitration string may be used EXTENDED CAN All 21 bits of the arbitration string may be used After returning from this function the transferred CAN message is available in the buffer pointed by the ES SI registers 21 DIGITAL LOGIC AG MSMCAN Manual V1 60b 7 3 5 Function CAN RxDADR with AH 4 Version 1 1 30 08 96 Felix Basic Code Function description With this function it is possible to put a mask to the message 15 Mask Register OC OD OE and OF If this function is not used the default is A 0 value means care or accept 0 1 for that bit position A 1 value means that the in comming bit value must match exactly the corresponding bit in message 15 See also Intel Manual 82527 Register definition before calling the INT61h AH 04 Function request BX Mask15 ID Register and Reg 00 CX Mask15 ID Register OE and Reg OF Register definition after returning from INT 61h AX 00 7 3 6 Function Get Status Register with AH z 5 Version 1 1 30 08 96 Felix Basic Code Function description This function receives the status information of the 82527 CAN Controller For the description of the status regist
19. d init Define Receive Mask ADR Send a message Receive a message Get 527 Status EXIT Rx Message 3B25 Buffer 03 0 10 00000000 DATA 0000000000000000 Tx Message ID 10000000 DATA 3344556677889900 If you have chosen every menu the screen will look like this Communicator for MSMCAN Modules BASIC CAN Version 1 10 27 DIGITAL LOGIC AG Use the 82527 Intel Manual The pages and titles are from this Manual Refer also to the Manual Functions of the CAN Driver page 19 Page 21 Message Object Structure 1028 1021 Target Addr Bits 10 This is the Arbitration 0 ID20 ID13 00 This is the Arbitration 1 The arbitration 2 and 4 is not used in this program For the structure of an arbitration see page 23 Arbitration 0 1 2 3 Registers ID 10 00 0000 Arbitration 0 Arbitration 1 be anything CAN Message Len 0 8 DLC 08 This is the Message Configuration Registor page 24 1028 1021 Receive Mask Bit 00 1020 1013 00 O undef 1 equality 1028 1021 Receive Adr Bits 00 1020 1013 00 This is the Message 15 Mask Register OC OFH at page 15 Status BOff Warn Wake RxOK TxOK Err2 Err1 Err0 35 When an error occurs refer to the Status Register 01H page 10 11 See also the ERROR explanations in this Manual at page 22 Attention There is a mistake in the program The status register must be de leted after receiving the error message So the value 35 is wrong Rx Message 3B25 Counter of the
20. d products become property of DIGITAL LOGIC AG Before returning any product for repair customers are required to contact the company This limited warranty does not extend to any product which has been damaged as a result of accident misuse abuse such as use of incorrect input voltages wrong cabling wrong polarity improper or insuffi cient ventilation failure to follow the operating instructions that are provided by DIGITAL LOGIC AG or other contingencies beyond the control of DIGITAL LOGIC AG wrong connection wrong information or as a result of service or modification by anyone other than DIGITAL LOGIC AG Neither if the user has not enough knowledge of these technologies or has not consulted the product manual or the technical support of DIGITAL LOGIC AG and therefore the product has been damaged Except as expressly set forth above no other warranties are expressed or implied including but not lim ited to any implied warranty of merchantability and fitness for a particular purpose and DIGITAL LOGIC AG expressly disclaims all warranties not stated herein Under no circumstances will DIGITAL LOGIC AG be liable to the purchaser or any user for any damage including any incidental or consequential damage expenses lost profits lost savings or other damages arising out of the use or inability to use the product DIGITAL LOGIC AG MSMCAN Manual V1 60b 2 OVERVIEW 2 1 Standard Features Controller Intel 82527 16 2 CAN Spec
21. dress Selection Switch IO mapped Switch S1 Range 000h 3ffh Custom board switch St 1 12 3 4 6 7 IO Base address MEM Base address UO OO on on on on IRE DIGITAL LOGIC AG MSMCAN Manual V1 60b 6 1 4 S2 IRQ Selector Switch Interrupt line Switch S2 1 2 3 4 6 1 5 S3 NODE Selector Switch Read 2 53 1 DSACK Input Not used for PC CPUs Only for none Intel CPUs with non multiplexed BUS READY Input is only in MODE 0 1 used and not in Mode 3 53 3 to 53 8 Node Number free for user for your own application Switch S3 off signal to GND on signal to VCC off on The position can be either off or on It has no function in our CAN test program DSACK READY switch ss h dh 4 5 6 8 Standard board Do not change these Jumpers 1 2 82C250 RS to VCC 2 3 82C250 RS to GND Default The 82C527 controller is implemented into our boards in mode 3 Do not change these Jumpers DIGITAL LOGIC AG 6 2 Board Layout CD NU Eg 10UF jJ 3 SW DIP 8 N 2 20 1 20 11 x Sje C N CT QUE Lal MSMCAN Manual V1 60b DIGITAL LOGIC AG 4515 OBERDORF PC 104 PRINT SIZE VERSION V1 4B 16 Mai 1996 MSMCAN V1 4 modifications 117 PLEC with new Pale with new PADa DIGITAL
22. e canreceivemess array 1 12 of byte regs Registers integer PRR KK OS APR UK KE OR KO RR ICON QEON REN RR RR doe ae ROKR RRR OK RR COR obe Main 1 RG IER RR BER IK BAIR BED RR RRR RK Y BEGIN TEXTCOLOR lightgreen TEXTBACKGROUND blue CLRSCR WRITELN WRITE Eine CAN Message wird erwartet RI AIR RK OK UK BK e Ke c oce y Function Init CAN with AH 00 LRA AIR RRR RIOR ARR RR KAKA ERRE Init CAN function regs ah 0 Function request number regs al 0 none regs bl 0 transferspeed 100k Intr 61 regs Call DOS Function INT61 fA RR ARAKI RAR RRR RRR E OK OK ick KK AKER A y Function Ready Can with AH 02 IRR RRR KIA UK KBR KAKA de Y Get can status Repeat regs ah 2 Function request number regs al 0 none Intr 61 regs Call DOS Function INT61 UNTIL regs al gt 0 RRR RA RR IRA AR KIER KAR A RK KIRK Kh Function Init CAN with AH 03 DREA eO KK ER ERER ok KAR RRR RIL KK KR KK y Receive CAN Message regs ah 3 Function request number regs al 1 use message buffer 1 regs es Seg canreceivemess Pointer to the regs si Ofs canreceivemess 1 first byte of the CAN message Intr 61 regs Call DOS Function INT61 daten regs al WRITELN
23. e TC com pletes a DMA Transfer This signal is expected by the on board floppy disk controller Do not use this sig nal because it is internally connected to the floppy controller OWS input The Zero Wait State OWS signal tells the microprocessor that it can complete the present bus cycle without inserting any additional wait cycles In order to run a memory cycle to a 16 Bit device without wait cycles OWS is derived from an address decode gated with a Read or Write command In order to run a memory cycle to an 8 Bit device with a minimum of one wait states OWS should be driven active one system clock after the Read or Write command is active gated with the address decode for the device Memory Read and Write commands to an 8 Bit device are active on the falling edge of the system clock OWS is active low and should be driven with an open collector or tri state driver capable of sinking 20mA 12V 5 used only for the flatpanel supply and BIAS generation GROUND 0V used for the entire system VCC 5V 0 25V separate for logic and harddisk floppy supply DIGITAL LOGIC AG MSMCAN Manual V1 60b 4 DETAIL SYSTEM DESCRIPTION The MICROSPACE CAN module performs all serial communication functions such as transmission and reception of messages message filtering transmit search and interrupt search with minimal interaction from the host CPU The MSMCAN supports the standard and the extended message framed in CAN specificati
24. er see chapter 7 3 6 1 Status Register 01H information of the 82527 CAN Controller Register definition before calling the INT61h 05 Function request Register definition after returning from INT 61h AX Status Register 527 7 3 6 1 Status Register 01H information of the 82527 CAN Controller 06 105 04 fO oo 01 00 WARN RXOK R RW RW RW RW Rw 22 DIGITAL LOGIC AG BOFF WARN WAKE RXOK TXOK LEC 0 2 MSMCAN Manual V1 60b Bus OFF Status one There is an abnormal rate of errors occurrences on the CAN bus More than 256 errors zero The 82527 is not bus off normal operation Warning Status one There is an abnormal rate of occurrences of errors on the CAN bus More than 96 errors zero The 82527 is not in an abnormal error status Wake up Status This bit is set when the 82527 had been previously set into sleep mode by the CPU This bit is resetted by reading the status register Received Message successfully one A message has been received successfully Must be resetted by the CPU after full transmission zero message was received Transmitted Message successfully one A message has been transmitted successfully Must be resetted by the CPU after full transmission zero Since this bit was last resetted by the CPU no message has been successfully transmitted Last Error Code 00 No Error 01 Stuff error more than 5 bits in
25. he CAN controller 7 3 3 Function READY CAN with AH 02 Function description This function asks the internal receive buffer if some CAN messages are available If yes the AX register returns the number of available messages Register definition before calling the INT61h AH 02 Function request number AL undefined Register definition after returning from INT61h AX Number of received CAN messages 20 DIGITAL LOGIC AG MSMCAN Manual V1 60b 7 3 4 Function RECEIVE ONE CAN MESSAGE with AH 03 Function description This function receives one CAN message from the internal buffer if at least one message was in the buffer After initialising the driver receives all incoming CAN messages automatically and stores them in the dynamic buffer This feature prevents the application program to interrupt real time if the CAN mes sage was received The capacity of the internal buffer is enough for memorising 1000 messages Register definition before calling the INT61h AH 03 Function request number AL undefined ES SI Pointer to the first byte of the CAN message buffer that may be used as a target to transfer the current message Register definition after returning from INT61h AX Number of the CAN message They are available after transferring the current message AX 000 means no other messages are available in the internal buffer ES SI Pointer to the first byte of the CAN message buffer filled with the
26. ification V2 0 part B Standard and extended data and remote frames S dentifier tandard and extended message identifier 14 TX RX objects and 1 Rx object with programmable mask Host Interface IO mapped or memory mapped 1k window C800 CC00 D000 D400 0800 DC00 200h to 3ffh I O range CAN Interface Standard ISO DIS 11898 9 pin DSub rm CAN Speed up to 500 kBaud Thermal shutdown Bus PC 104 104 stackthrough pins Sizes 96x90mm Environmental Temperature operating 25 C to 85 C storage 65 C to 125 C Any information is subject to change without notice 2 2 Ordering Information MSMCAN MICROSPACE 104 CAN Controller 2 3 Related Application Notes Description 19A For MSMCAN and other CAN Products 30 CAN Software 72 CAN 82C527 Controller Application Notes are availble at http Avww digitallogic ch gt support or on any Application CD from DIGITAL LOGIC DIGITAL LOGIC AG MSMCAN Manual V1 60b 3 PC 104 Bus SIGNALS AEN output Address Enable is used to degate the microprocessor and other devices from the I O channel to allow DMA transfers to take place low CPU Cycle high DMA Cycle BALE output Address Latch Enable is provided by the bus controller and is used on the system board to latch valid ad dresses and memory decodes from the microprocessor This signal is used so that devices on the bus can latch LA17 23 The 5 0 19 addres
27. it 1 wait state 1 0 cycle It is derived from an address decode IOCS16 is active low and should be driven with an open collector 300 ohm pull up or tri state driver capable of sinking 20mA The signal is driven based only on SA15 SAO not IOR or IOW when AEN is not asserted In the 8 Bit I O transfer the default transfers a 4 wait state cycle AOR input output I O Read instructs an I O device to drive its data onto the data bus It may be driven by the system micro processor or DMA controller or by a microprocessor or DMA controller resident on the I O channel This signal is active low input output Write instructs an I O device to read the data on the data bus It may be driven by any microprocessor or DMA controller in the system This signal is active low DIGITAL LOGIC AG MSMCAN Manual V1 60b IRQ 3 7 9 12 14 15 input These signals are used to tell the microprocessor that an I O device needs attention An interrupt request is generated when an IRQ line is raised from low to high The line must be held high until the micro processor acknowledges the interrupt request Master input This signal is used with a DRQ line to gain control of the system A processor or DMA controller on the 1 0 channel may issue a DRQ to a DMA channel in cascade mode and receive a DACK MEMCS16 input MEMCS16 Chip Select signals the system board if the present data transfer is a 1 wait state 16 Bit memory cycle
28. microprocessor The 16 Bit devices will use DO through D15 To support 8 Bit device the data on D8 through D15 will be gated to DO through D7 during 8 Bit transfers to these devices 16 Bit microprocessor transfers to 8 Bit devices will be converted to two 8 Bit transfers SMEMR input output These signals instruct the memory devices to drive data onto the data bus for the first MByte SMEMR is active on all memory read cycles SMEMR may be driven by any microprocessor or DMA controller in the system When a microprocessor on the 1 0 channel wishes to drive SMEMR it must have the address lines valid on the bus for one system clock period before driving SMEMR active The signal is active low SMEMW input output These signals instruct the memory devices to store the data present on the data bus for the first MByte SMEMW is active in all memory read cycles SMEMW may be driven by any microprocessor or DMA controller in the system When a microprocessor on the I O channel wishes to drive SMEMW it must have the address lines valid on the bus for one system clock period before driving SMEMW active Both signals are active low SYSCLK output This is a 8 MHz system clock It is a synchronous microprocessor cycle clock with a cycle time of 167 nanoseconds The clock has a 66 duty cycle This signal should only be used for synchronization TC output Terminal Count provides a pulse when the terminal count for any DMA channel is reached Th
29. ns Controller manual 82527pm pdf DIGITAL LOGIC AG MSMCAN Manual V1 60b 7 2 2 MEMORY mapped Operation This mode is only assigned for customer applications Assumes that the BASE MEM ADR is selected on DOxxh Assumes that you are using a MEMORY mapped board with the CANMEM PLD All Registers of the CAN controller 82C527 are directly available Pay attention to the timing For the PC bus you need the double read mechanism for fast access as proposed by INTEL Refer to the INTEL documentation 7 3 Functions of the CAN Driver The CA_I5 COM CA 19 COM provides six general functions TRANSMIT RECEIVE INIT READY RxDADR and Get Status Before the CAN driver may be accessed the driver must be installed The CA 15 COM CA I9 COM CAN driver is a stay memory resident program that may be asked from every application or programming language to communicate with the CAN board The CAN driver will be accessed over the software interrupt 61h The AH register defines the function which must be executed After the hardware reset or power up the CAN controller must be initialised before any other step is performed 7 3 1 Function INIT CAN with AH 00 Function description This function initialises the CAN controller on the board The transfer speed may be selected depending on the CAN nodes Remember all CAN nodes must use the same transfer speed Register definition before calling the INT61h AH 00
30. o the I O channel This signal is driven by the permanent Master REFRESH input output These signals are used to indicate a refresh cycle and can be driven by a microprocessor on the 1 0 chan nel These signals are active low SAO SA19 LA17 LA23 input output Address bits 0 through 19 are used to address memory and 1 0 devices within the system These 20 ad dress lines allow access of up to 1 MBytes of memory SAO through SA19 are gated on the system bus when BALE is high and are latched on the falling edge of BALE LA17 to LA23 are not latched and ad dresses the full 16 Mbytes range These signals are generated by the microprocessors or DMA control lers They may also be driven by other microprocessor or DMA controllers that reside on the 0 channel The SA17 SA23 are always LA17 LA23 address timings for use with the MSCS 16 signal This is ad vanced AT96 design The timing is selectable with jumpers LAxx or SAxx SBHE input output Bus High Enable system indicates a transfer of data on the upper byte of the data bus XD8 through XD15 Sixteen Bit devices use SBHE to condition data bus buffers tied to XD8 through XD15 SD O 15 input output DIGITAL LOGIC AG MSMCAN Manual V1 60b These signals provide bus bits 0 through 15 for the microprocessor memory and l 0 devices DO is the least significant Bit and D15 is the most significant Bit All 8 Bit devices on the I O channel should use DO through D7 for communications to the
31. on 2 0 part B Due to the backward compatible nature of the MSMCAN module the standard message frames in CAN specification 2 0 part A are fully met The MSMCAN provides storage for 15 message objects of 8 byte data length Each message object can be configured as either transmit or re ceive except for the last message object The MSMCAN uses a physical CAN bus interface for high speed applications up to 500 kBaud The in terface provides transmit capability to the differential bus and differential receive capability from the CAN bus Different driver software packages are available for the MSMCAN 4 1 82527 Controller The 82527 Controller is implemented in our boards in mode 3 You will need the Intel Manual for the 82527 Copies of the 82527Manual or other Intel literature may be obtained from Intel Corporation Literature Sales P O Box 7641 Mt Prospect IL 60056 7641 or call 1 800 879 4683 Or ask your local Intel dealer DIGITAL LOGIC AG MSMCAN Manual V1 60b 5 DESCRIPTION OF THE CONNECTORS 5 1 CAN Connector DSUB9 J1 and J3 Pin2 Signal Pin7 CANH Signal Pin 3 and Pin 6 are Ground J1 defines the AS input from the 82C250 VCC 2 3 GND 1 2 5 2 J7 Port Expansion P20 P27 for the 82527 Chip esser a ERN Lo E s RES ee P27 WAH P26 INT 82527 PIN 1t0 1 12 13 4 15 16 17 DIGITAL LOGIC AG MSMCAN Manual V1 60b 5 3 J40 PC 104 BUS Interface The cross out sign
32. s lines latched internally according to this signal BALE is forced high during DMA cycles DACK O 3 5 7 output DMA Acknowledge 0 to 3 and 5 to 7 are used to acknowledge DMA requests DRQO through DRQ7 They are active low This signal indicates that the DMA operation can begin DRQU O 3 5 7 input DMA Requests 0 through 3 and 5 through 7 are asynchronous channel requests used by peripheral de vices and the I O channel microprocessors to gain DMA service or control of the system A request is generated by bringing a DRQ line to an active level A DRQ line must be held high until the corresponding DMA Request Acknowledge DACK line goes active DRQO through DRQS will perform 8 Bit DMA transfers DRQ5 7 are used for 16 accesses IOCHCK input IOCHCK provides the system board with parity error information about memory or devices on the I O channel low parity error high normal operation IOCHRDY input I O Channel Ready is pulled low not ready by a memory or I O device to lengthen I O or memory cycles Any slow device using this line should drive it low immediately upon detecting its valid address and a Read or Write command Machine cycles are extended by an integral number of one clock cycle 67 nanosec onds This signal should be held low for no more than 2 5 microseconds low wait high normal operation IOCS16 input 16 Bit Chip Select signals the system board that the present data transfer is a 16 B
33. to 500k IRQ 9 IO ADR 340 341h SW INT 61h Product MSMCAN If no ERROR Message appears the installation was successful 26 DIGITAL LOGIC AG MSMCAN Manual V1 60b 8 3 The CANTEST EXE Program to monitor the CAN bus Start the CANTEST EXE program after installing the CAN driver 19 The menu allows you to transmit and to receive CAN messages To communicate with CAN I O modules from SELECTRON use CANSELE EXE Description Start the CANTEST program after installing the CAN driver CANTEST EXE Communicator for MSMCAN Modules BASIC CAN Version 1 10c CA 19 The menu allows you to transmit and to receive CAN messages DIGITAL LOGIC AG Parameters defined by CA COM var Speed CA COM Version 1 10 must be loaded before this program Only basic CAN mode ID28 to ID18 are addresses others are zero Chose the speed you wish with cursor down and cursor up cursor down gt 100kBit s cursor up 500kBit s ENTER 20kBit s 50kBit s Now the screen will look like this Communicator for MSMCAN Modules BASIC CAN Version 1 10c Each menu can be selected with cursor down cursor up DIGITAL LOGIC AG Parameters defined by CA COM var Speed ENTER CA COM Version 1 10 must be loaded before this program If you are not sure about the Input press ENTER and the default is Only basic CAN mode ID28 to ID18 are addresses others are zero automatically chosen Define Transmit ADR LEN Define bitrate an
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