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DLP PROJECTOR SERVICE MANUAL

1. w ATSC Tuner a T Tuner Power 845 OHM 1 A J D n EH M nj Eu R501 R502 q3 dg 4 820 24 3 EN TU ATTEN NS R 1 16W 1 16W y 3 3V_TU 002 H2 cso 1 5 NEED TO VERY CLOSE TO RF
2. IO OE ILU 2 fa N NANDO8GW3B2CN6E TC58NVG2S3ETA00 3 3V_NORMAL NVRAM ud Le BCM3549 GPIO ESS MESE M24M01 HRMN6TP o OPT Cen 0 1uF CAUTION e SCL3_3 3V R657 3 DEV 22 600 amp 900 amp 1000 ER SDA3_3 3V x ES OPT RRC HR 3 EAN60771501 R658 22 K9F8GO8U0M PCBO BED i3 5 4 9 I VD S AUD LO LGE3549XS LGE3549XS P22 B2 version 0 R942 G24 D3 3V A 53 3V ps24 SP 19 00 GPIO 01 S A G22 x 225 CP 10 02 c 3 GPIO_03 IC900 D26 3 LGE3549XS LGE3549XS P22 B2 version S seo pas 00 E E Place close to BCM BCM LVDS DOWN_ENZ B
3. LED PWR Mc MO gt nr nr c 0806 B VCC_G KTC5103D A E R839 1K gt 9 9 sc c820 VCC_G 0 1uF De m oN AS a 10817 16v A INO IC803 E IURIS QCPL M61H pc M c KIA75S358F SE GND G ege mA ES AZ431AN ATRE1 A VCC G CATHODE GND o C811 R814 o iur e ADJ G C dise c803 Os 16v e e e e e e e 36 y a 0 1uF IC807 GND G 3 3V Liev KIA75S358F a GND G 9 CD G 8T N o D V R861 s L eg SE VCC_7V_G GND G P 390 ANODE ies 9 5 19 5V 592 o 20K UR A 2 A lt L804 A 20037WR 08A00 C813 axl e UBW2012 121F SE IC809 2200pE x Coen Dog X m
4. DDR1_po00 DDR1 DO d DDRO DQ E8 DDR1_DO01 DDR1 DO DDRO_CLK gt DDRO_DO DDR1_CLK SS E DDRO_CLKb DDR1_CLKb DDR1_D002 251 DDR1_DO ERO GEE F2 p7 DDRO_DOI DDR01_CKE He ppR1 D903 71 DDR1 DO D3 DDRO_DOI DDR1_Do04 DDR1 DO D1 DDRO_DOT DDR1 DQ05 SC DDR1_DO 14 A1 pun B20 IPIS DDRO1_RASb 7 e iens DDRO1_RASb po 10 Az A2 DDR1_Do06 TE DDRI_DO sa h ES 21 DDR0_DO 10 EE G7 B1 23 DDR1_DQ07 DDR1_DO ee F3 po DDRO DO 14 F3 pg PDR1_DO 11 A3 E bas E18 DDR1_DQ 0 15 DDRO1_WEb DDRO1_WEb A4 A4 D21 DDR1_DQ G8 GE A5 ae DDR1_Do09 DDR1 DO 2o A6 DDR1_DQ10 B7 E20 POR Mk Bil DDR1_DQS1 AT DDR1_DQ11 DOS DDR0_DOS1 G2 A8 a X55 DDRi DOI G2 as DDRO1_BAO DDR1_DOS1b A8 DDR1 DO12 DDRL DOI DDRO1_BAO a DOS E DDR0_DOS1b G3 A8 P s DDRO1_BA1 DDR1_DM1 A9 ppR1_po13 DDRO1_BA1 DDROI ATO ae DM RD
5. ST BY Power BCM core 1 2V volt R8003 D1 2V NOTE 17 A1 2V 100 IC8010 RL_ON gege A AOZ1038PI EP LX R8002 BLM18PG121SN1D R8001 L B ST_5V 0 1C8009 7 FEND E a 50 2 c800 c803 C8041 C8012 G AZ1117BH ADJTRE1 CDI Dale oz 22ur 22uF 22uF 0 luF L8001 4 o gt s 7 10V d 3300pr Boga 10V tov ev 66008 a dan MIJB 201209 0120P N2 VIN S We 3 50 o SE GE 6509 e 5V_NORMAL A INPUT ST MEN 2 E 7 RAL Pus OV y 5V_NORMAL A TC8002 m Horus B e e IC8004 AP2132MP 2 5TRG1 EP No 0 c8001 AGND EN pp OUTPUT 2uF f lur csoda l ssaa es oz 3 6 LS AP2132MP 2 5TRG1 EP DR Vout 0 6 1 R1 R2 R 22 e 10V 22uF 22uF 0 1uF m Vout 0 6 1 R1 R2 8 4 5 E E s S Le 10V 10V 50V EE conp 2 POSENSE lt e x i Lc8007 Lc8006 4 5 P4 1 8 PG Si GND on Tuus reng KE e i R2 nn D1 8V di e 32 mm m Pm m ee PG g GND R8073 3 3V_NORMAL Ke 2 SS d E A hd Seon E R2 20 A2 5V as z 2 3 1 2 5V 5 ao T ADS s A Sg MAX 1A we go 2 EE 7 5 A 18008 EN E au L8012 18010 lu ES n oS om 5 500 e R1 EN RAE als BOT Oe A 43 3V_NORMAL 0 4 esas E Ps 4 3 6 E pea 0 oy oo 500 3 R1 L8017 D S MU oleo Kus um a Ze 3 6 VIN VOUT SC 5 IC8008 1 10W TT OUT RAA 5 28038 28048 3 VIN
6. G_NTC R406 M1 5 2x C400 PM DATA 15 FR FOR MACRONIX 16Mb delete R313 POSENSE Ss 5 olur M Tr Fou ESI FOR ATMEL 32Mb delete R312 add R314 R315 C302 Eee T5 GND IN24 S UJ _DATA_ BMDATA 13 pS O m T Le EE Shange ROTE O RS When Power Off e Se GRN_NTC_PWM set Roe owt TOP Botto A EE C405 od ior PM DATA 12 ge PHDATATII Las 0 010F ZZ oe e oo En E 4 us A 01up Ze PM_DATA_11 a PMDATATIO 25V 25V SS PM DATA 10 ee PMDATATSI 3 3v PWRGOOD EE M_DATA a D PM_DATA_9 Us PMDATA S A Le Y PM_DATA_8 P4 PMDATA 7 PMADR 16 4 7 1 PM_DATA_7 17 PMDATA 6 g PM_DATA_6 5 ROBENGE M_DATA_ Ss PMDATA 5 A IC301 C300 10uF 6 3V PM DATA 5 ee PHDATATA S29JL032H70TF1020 PM_DATA_4 PMDATA 3 S PM_DATA_3 URN AER EA Ke PM_DATA_1 PMDATA O C302 p10uF 6 3V PM DATA 0 1 gt OPT ds PMDATA 15 epro_17 C N TN C 3 3V N W1 PMADR 111 PMDATA 7 GP10 16 7 hd PMADR 20 PM ADDR 20 PMADR 10 DO14 PMDATA 14 Y1 PMADR 19 PM ADDR 19 AB2 PMADR 18 DO6 PMDATA 6 3 3V PM_ADDR_18 A AA3 PMADR 17 x PM_ADDR_17 Do13 PMDATA 13 e PM_ADDR_16 x4 3 3V E W5 M 9 j x x ew Ap 15 He PMADR 15 PMADR 19 R312 Do5 PMDATA 5 x IC10 LES o 8 x E PM_ADDR_14 les Do12 PMDATA 12 os DPP6401 le o d D Q 12 4 vol sl ojo AA PMADR 13 a SS PM_ADDR_13 wl xl xl dal Y5 PMADR 12 Do4 PMDATA 4 IC10 PM_ADDR_12 fre EZ PM_WESZ 119 DPP6401 PM_ADDR_11 B ABA PMADR 10 VES c301 0 1uF
7. HL BCM3549 JTAG TMS 8 il Ge x 001 A06 USB_PWRON1 m USB PWRON_1 EJTAG_ ET BCH3513 JTRG TRSTb x8101 o ET ie USB_PWRON_2 EJTAG_TRSTB TE k ar R1023 EJTAG_CEO D3 3V e 32 768KHz ER HS R1024 2 7K n a R8175 N m EJTAG_CE1 Sonde xo a R1011 R1014 aad Eee ase ls OPT uti 4 7M Ej 240 1K P5 Sea ci L1005 r lt I FLMDO ll PEPHY_RDAC 25 z E BLM18PG121SN1D 274 L GND m EBHY SRDN p3 EPEY RDN PLL_MAIN_AVDD1P2 ees vr o 125 EPHY_RDP ws FPPHY_RDP PLL_MAIN_AGND ees a o bd MICOM_RESET T2 ee EPHY TDN wu IFPRY_TDN PLL MAIN MIPS EREF TESTOUT gt SUA 6 EPHY_TDP 7 p1 PPHY_TDP PLL_RAP_AVD_TESTOUTI ee BLM18PG121SN1D tu I x 3 e 0 ar 1 H A1 2V re EPHY_AVDD1P2 PLL_RAP_AVD_AVDDIP2 vv LE M Hi Ka a T b wa PPHY_AVDD2P5 PLL_RAP_AVD_AGND PS Lo 43 E x E QCA puy PLL VDD1P2 3 1 TT U o E E a _PLL_ PLL_DS_AGND_1 se 3 5V_ST z a O x Q L1002 E ada ws BPHY_AGND_1 PLL_DS_AGND_2 z ox El e M 31218 E pa BUMUGPGIZL END e or IFPHY_AGND_2 ojo E x 5 Ay EPHY AGND 3 SA 5 UMS ZS epo B zi m al o E R8186 20K al 2 BYP_CPU_CLKF gt HA E3 E E Zz 2 zd BYP DS CLK 2S x Xx E 1 16w Oo o AC8 Ge ave BEE V25 2 TAA 2021 c8103 ST 9p sl si P 1 AB9 V26 2 7 amp A BL022 EEPROM for Micom 3 5V ST 0 lur A N Q O gt 1 e a aah AUDMX_RTGHT1 BYP_SYS175_CLK x E A WD UOILNINI ZININ eil CN een x AS a a E 4 e
8. u a DO1 DO ok ae ae Se DM Dee Es e E on By mE Fa SE dn mE 35 os Ia E F2 N e a ole IC900 Me mer emo Sg 8 ss 3 ss s3 D seo ec me Des mu mc comme 3e o2 uh EE ie Be jose LES e Be Su ue Les I mm oe ie m LES po2 BER IC or OF OG O3 DO Oo od ws oo OA oS o o On oS o OZ Or o Ss ae CS Nr ov o3 O5 oS 2 tue o5 o o3 ip ot od bos DO3 o o o st Si o o N am d LGE3549XS LGE3549XS P22 B2 version MM E a o o S S D 5 OR DE p Kee a BE Re 25 on Sa Tres ee 93 m iube E oS o oi e o o o F7 Pus DO5 DO5 e G7 8 DO6 A6 Do6 9 D Lob C656 F3 DDR_BVDDO 57 e DQ7 DQ7 0 1uF C657 DDR_BVDD1 gt e a Ss DDR_BVSSO e a E B24 TC603 IC605 DDR BVSS1 5 z 1 DOS F20 OPT NT5TU128M8DE BD NT5TU128MS8DE BD anne a DOS SE PLL TEST Ge S DDRO_DQ 0 15 cs Das DOS DDR_PLL_IDO 7 e yw DDRO_CLK ANYA_DDR DDR1_CLK ANYA_DDR Ge DM RDOS DM RDQS DDRO1_C 255 Re14 gt DDRO1_CKE R619 cg DDRO_DO O R617 cg PDR1_DQ O NU RDOS NU RDOS R615 100 100 DDR_COM DDR0_DO 1 c2 DDR1_DO 1 E16 0 240 DDRO_CLKb gt c2 DDR1_CLKb DDRO1_ODT gt DDRO1_ODT DDR0_DO 2 p PDRI_DO 5 C23 DDRO1_CKE D7 BORO ACRE i DDR EXT C pq D3 DDRO_DO 3 Se pa DDRI_DOT3 AG AO DDRO_C BID gt DDRO_CLK pi DDRO_DOTS pi DDR1_po 4 H3 2 Ge H7 DDRO_CL Se gt DDRO_CLKb ERES By Do DDRO_DOTS ERR pg DDRI_DOIZ l A2 DDR1_C FU gt DDR1_CLK SEA gt ES a1 DDRO_po 6 Se i gi DDRI_DOT6 aS A3 DDRO1_CAS J8 DDR
9. Fig 11 1 4 1 Press Black Adjustment Verification Button Fig 11 1 3 The left side of the screen changes from Red Green Blue to Color Coordinate Table Measurement Screen x y Y 2 Press Color Purity Inspection Button Fig 11 1 4 che el DO a mm mme me RA I md fms Y BR bg RS Ra 20 88 HE 700 299 74 GC Hu qu ns gt Fig 11 1 5 3 The screen status indication line Chromaticity Measurement Red Color Purity Inspection changes to Red Color Purity Inspection The color of the inspection boundary at top right of the screen changes to Red 4 Press the direction key of the adjustment remote controller to change the video of the projector to Red Pattern After 2 3 seconds Red Color Coordinate Table Data is transmitted from CL200 In the Result Display Window at right center of the screen the coordinate of the Red color and the brightness are displayed Copyright 2011 LG Electronics Inc All right reserved 11 Only for training and service purposes 5 Press Next button on the screen D b LU 197 720 253 LET SR Fig 11 1 6 6 Screen status indication line Chromaticity Measurement Green Color Purity Inspection changes to Green Color Purity Inspection The color of the inspection boundary at top right of the screen changes to Green 7 Press the direction key of the adjustment remote controller to chan
10. 1 Select ADJ of the adjustment remote controller to enter adjustment mode 2 Press right direction key of 9 Mac ADDRESS D L to enter Mac Address D L state 3 In Fig 6 5 state click ENTER key of PC 4 When the adjustment is completed OK message is displayed and if it fails NG message is displayed Fig 8 3 6 5 To exit press ADJ or EXIT of the adjustment remote controller again to exit 6 To verify the adjustment result enter IN START and verify Fig 9 2 interface HZH USE Board Projector Fig 8 3 1 Device Setting Diagram Product inte Tew riemet LGPT1 PC Ma Total w NG 4 T 01 Data Fie Dane 2 pm Tw 14 27 08 LG Electronics Pregam VER OV File me MAC en Tee ham No tem Resun DETECT _ZMAC WATE Fig 8 3 2 Play file keydownload exe icon Left Fig 8 3 3 Play file keydownload exe Right LGE Internal Use Only EZ ADJUST PCM EDID D L AC3 EDID D L ADC Calibration DDP AUTO CCA DDP MANUAL CCA DDP LED CURRENT CTRL DDP OPTIC CHECK DDP DMD CHECK DDP TEST PATTERN CO d OO Aa ND MAC ADDRESS D L Fig 8 3 4 Adjustment Menu when ADJ is selected Left Fig 8 3 5 Setting Screen on Mac Address D L Right ILGPT1 PT 01 sm gsm Date 2011 01 15 LG Electronics IMAC_Only NO TEST ITEM RESULT HDETECT MAC WHITE 0 OK OK 0 OK
11. are SODMX_TNCM1 SM a Aa an DI eil eil na dd S RC DE ag RUDME_LEFT2 IC18100 amp gt D gt mM as fut bal Ll lt ea a Du CH nes M24C16 WMN6T AUDMX_TNCM2 AE8 AUDMX_LEFT3 BD z NC EO vec AUDMX_RIGHT3 AC9 bcc i fou EET P60 SCLO 4 P140 PCL INTP6 perez BCM AUDIO AF7 Mr bean ox KS Sms scr1_3 3V CDD RL_ON NC E1 WC 5dan a ES ou RrGnT EN co 28128 22 P61 SDAO 2 POO TIOOO CO EDID_WP AUDMX_INCM4 3 S SORTES AN E 2 Ke I lul 6 4 c158 AB10 F T AUDIO_LIN R160 13 8 e AUDMX_LEFTS NG E2 SCL R8117 E E NEC EEPROM SCL P62 EXSCLO 3 P01 TIO10 TO00 R8189 10K B 98100 AUDIO_RIN R163 490 0165 0 015uF ADE 2803052 T acto AUDMX_RIGHTS 22 D H PC LR INCM gt EIRE 0 22uF e AUDAX TNOMS R8114 NEC_EEPROM_SDA P63 4 P130 3 S AF9 vss SDA e ds AUDMX LEFT6 22 T 1 1 ai 0 AF10 P aa EE wai29 22 P33 TI51 TO51 INTP4 5 P20 ANIO Ada by L AUDIO INCM EL oi AE10 gt FLASH WP pu Sir ap ADDMX_TNCM6 a P75 ANT1 P 21 eeng bes 2 R8130 22 E vio DDMX_AVSS_1 fe Oh Lm 4 6 UPD78F0513AGA GAM AX R8195 A22 alle AUDMX_AVSS_2 ned cet eg D Route INCM between associated ma RB 22 P74 7 ANT2 P22 R819 22 left and right signals of same channel ei EJTAG AUDIO_SLEEP C S W ASSY E P73 KR3 9 ANI3 P23 mr The INCM trace ends at the gt SWERCON OEET same point where the connector A AA10 SC Ground connects to che beara ground MU E m8
12. v RT0 xp lt 4 UARTO_TXD SSPO_CLK TIRADA PM_ADDR_10 PWRGOOD bd R17 L20 ec AAS PMADR 9 S W ASSY Do11 PMDATA 11 MW 2p VARTO_cTS2 SSPO_TXD TE401 E f y6 PMADR 8 LJARTO_RXD UARTO_RXD SSPO_RXD PM_ADDR_8 E Rae WP ACC po3 PMDATA 3 SE RETO RISZ TSTPT 7 T PM_ADDR_7 171 for CCA G To DMD ABS PMADR 6 R315 RY BY DQ10 PMDATA 10 TSTPT 6 PM ADDR 6 zac OPT To DAD Miner PM ADDR 5 PMADR 15 PMADR 18 DQ2 PMDATA 2 IC10 R14 27 E3 S SW Y7 PMADR 4 VPP High Normal Operation USB DAT N USB DAT N TSTPT 4 PM ADDR 4 Low Write Erase Protection DPP6401 R15 27 E2 AB6 PMADR 3 Do9 PMDATA 9 USB_DAT_P USB_DAT_P TSTPT_3 PM_ADDR_3 ws PMADR 2 S x10 TSTPT_2 PM_ADDR_2 ARA SE Dol PMDATA 1 e TSTPT_1 ADS n MS 18TR3 0 PMADR 0 DO8 PMDATA 8 x o PM_ADDR_0 18pF GND_2 p TH geri an 3 3V R28 x Do0 PMDATA 0 wie GE i Sam PES 2 SR 3 2 R23 A15 s AA8 OE c78 230 ETM_PIPESTAT_2 za AB8 PM_OESZ A o Ud ETM PIPESTAT _OES e Si Y ER STAT_1 PM_BLSZ_0 vsso 18pF D 1 16W oen TANT TLC TR e E AM TUESRIT R30 33 H19 R41 27 s ML CE A EMRGOOD GER IK c2 PMRGOOD EXT ARSTZ ETM_TRACESYNC V2 R305 33 FLASH_CSSZ POSENSE OSENSE ETM_TRACECLK PM WEZ E CD PM WESZ USB ENZ RIEK 4 R304 33 E PM_OEZ gt PM OESZ c u E 6 3V U3 o ICTSEN U2 R306 33 x 32Mb Bottom type 4 Banks S FLASH CSSZ a Ul E HW_TEST_EN Di R302 2R303 B 10K lt 10K s Z THE N SYMBOL MARK OF
13. 1K AD16 HDMT_RX_0_DATA1_N B L USB DAT P a o gt win coin oou 5 SD PR3 R106 5 6 HDME_HPD 3 USB_DM1 UY Y Y Y 2 AC16 SEIS HDMI RX 0 DATA1 P E SC Du E R10 S a an a a o AF16 Md c HDMT_RX_0_DATA2_N Go BCM USB zm USB DPl TBO M 3 R1 USB_DP JK902 e e e e e D PC LR INCM af HDMI_RX_0_DATA2_P oe oa KJA PH 1 0177 R168 AE12 Dati HDMI_RX_0_VDD3P3 91402 USB_ YB 5 E M5 GND LUV i EE eee HDMI_RX_0_VDD1P2 ERCIOAS USB_ R914 ed c3 R921 12 AC13 RA Rm HDMI RX 0 VDD2P5 NUT p A2 5V M4 9 FRERES oN ap13 lt HDMI_RX_0_AV 1 E 1 A 3 MI_RX_0_AVSS_ HDMI_SCL e e eS ll i OO AUDIO RIN SD C2 BLM18PG121SN1g A1 2V t 1 e AF13 Ke HDMT_RX_0_AVSS_2 gt e EDMI_SDA M3_DETECT AF15 a ia HDMI_RX_0_AVSS_3 UTE D p3 3v ET D osha AC14 a HDMI_RX_0_AVSS_4 L906 l Jii o MI_RX_0_AVSS_ 6 Ge se asf SD_C3 BLM18PG121SN1D S Ei w d A M1 j r 9 AD14 HDMI RX 0 AVSS 5 o D D e a 10 gt aypro LIN SD_INCM_LC3 7 c891 Q luE AB11 D GVESi HDMI RX 0 PLL AVSS d BS1 H M6 R904 12 c903 0 1uE AE13 HDMI RX 0 PLL DVDD1P2 Sy a lo Lis SD_CVBS2 L905 o o UN AE14 HDMI_RX_O_PLL_DVSS BLM18PG121SN1D s eh SD_CVBS3 da ke 3 3V NORMAL e AD15 S 43 3V H3 ge 3 a nal KEREN HDMI_RX_1_CEC_DAT placed as close to Connector as possible 7 a e KEEN ca Pine SD INCM CVBS1 HDMI RX 1 HTPLG IN TERRE g De EN a EH EEN AD12 Mz Capacitors on VBUSA should be MIC2009YM6 TR 5V NOR
14. 1YDAC_RBTAS CN Se I2C_3 NVRAM A8 DPP6401 COMP_DET me erro so 10K R602 AAA2 7K 01 1 8mA C 1 AT 523 d d 2 ERAT m VDAC_1 CLKS4_AVDDIP2 ee 33prerm 6212AA2600E 35 SP 10 51 NAND_WEb W 1 02 NAND_TO 21 NAND_TO 2 2 7K 410 2 4mA 3rd over tune Recommand a D3 3V 0 01uF ap23 MOER crk54_aAVpp2p5 SE ES 20 A d us GP 10 52 WE 1 01 NAND IO 1 NAND_IO 1 peng om 11 3 0mA VDAC_VREG 7SS_1 Se 2 2 7uH SE BTL 2 pauta ETE E s ETS X1001 R1059 22 ma bie fe NC_11 1 00 NAND_rO 0 NAND IO 0 CLK54 AVSS 2 Se o o RIDAS Se e e e BCM INT C SE 25 Wi GPIO_54 Ze I0 0 AND_IO 0 R60S AA 2 K NAND_ TO 7 MIPS Frequency DNS E 104 B Q E Gef e CLK54 AVSS 3 Sos mul oxdaxd oxd sud wxdeud ay RGB_DDC_SCL C STE E srro_ss rod wens Neto O 405MHz BBs_scr BSC_S_SCL 54MHz XTAL LK54 XTAL N ASK 25 SUNSET GPIO_56 1 378MHz F22 U26 R104 4 22 C1001pg22p ZAS EAS Sat mao ENS ua RITA 22 L6 FLASH WP y BBS_SDA BSC_S_SDA CLK54_XTAL_P Se gt rode RGB_DDC_SDA Se GPIO 57 E NC_13 NC_18 L T N B CLK54_MONITOR 7 SCLO_3 3V i uae SGP 10 00 NC_14 NC_17 NAND_ALE I2C Level DNS tuf om e tj s PM_OVERRIDE A1 2V SDA0_3 3V gt s i i 233 37 5 Sens RESET oz es E iW OCS af af af ap 4 oc x25 m BLM18PG121SN1D schr1_3 3v e N23 SP 10 02 1 5V Switching eLeLeL sl os 54MHz_XTAL_MCXO_AVDD1P2 ST TER a D3 3v N SDA1_3 3V lt C e z 39 19 03 1036 1 i n VCXO
15. Bushing verification location Copyright 2011 LG Electronics Inc All right reserved Only for training and service purposes 5 Caution for DMD Digital Micro mirror Device 5 1 Caution for DMD ESD 1 Connector the grounding to prevent a damage of ESD Electrostatic Discharge when handing the DMD 2 Wear a wrist strap to connect the ESD grounding in flesh necessarily 3 Connect the ESD ground to workstation and an electric conductor 4 Save the DMD after getting rid of a static electricity Keep it at an exclusive case when moving it When grounding open the case 5 Put on gloves for preventing static electricity 6 All work is done at static free location Attach the tape or remove a dust on the DMD front or DMD back pin 5 2 Caution for DMD Clean 1 Follow the procedure and caution to prevent the screen from being scratched 2 When DMD glass stains with dust polish the front and back DMD glass with soft cloth Then do it again after rotating 180 degree the DMD If necessary keep under observation 3 Don t clean the DMD with the high pressure The static electricity and pressure will damage the DMD Attachment TI Reference DMD Handling Specification DMD Cleaning 6 EDID Data Download 6 1 Used Device Adjustment remote control 6 2 Adjustment Method 1 Enter to adjustment mode with selecting ADJ on remote control 2 Enter to 0 PCM EDID D L with pressing right di
16. GRN_EN C DMD_D19 Ge AMBIENT_TEMP_COMP_OUT D22 DMD_D 15 a GPIO_25 yis DMD D18 MD_ R37 33F19 G_NTC Pl VSYNC DMD DT13 DDP ASIC READY GPIO 26 AB16 E DMD_D17 E21 z L2 E P1_HSYNC GPIO_27 DMD_D16 16V E20 M4 DMD_D15 DMD_D 11 0 1uF GPIO_24 S c80 P19 DMD_D14 DMD_D 10 ALF_VSYNC E c P20 DMD D13 DMD D 9 R29 K21 L3 T 33 V ADJ CH2 w22 ALF HSYNC E DMD_DT8 v21 SPIO_37 LEDR EN D RED EN SE 5 pm c3 ALF_CSYNC HE 229K GPIO_30 LEDG_EN RAGS CD GRN_EN V_ADJ_CH1 a p ee DMD_D 7 LEDB_EN RAT gt BLU_EN ere LEDR PWM Ke gt v_ADJ_CH1 S c R124 120 Y9 DMD_D9 DMD_D 6 A19 Ts BERS R423 33 SE BLU_EN lt LVDS_TX_0_CLK_P DED DT4 GPIO 11 LEDG PWM CO v ADJ CH2 W9 DMD_D8 CLT t e K4 R429 33 LVDS_TX_0_CLK_N DMD_D7 DMD_D 1 3 3v GPIO_10 LEDB_PWM o V_ADJ_CH3 R121 100 ABRO DMD_D6 N19 RED EN C3 LVDS TX 0 DATAO P AMA AA10 DMD_D5 _ DMD_D 0 E w20 9 19 20 LVDS TX 0 DATA NM DMD_D4 n DMD D 2 DN GPIO 21 Ji B NTC Q CMP_PWM 2123 2498 yii DMD D3 a DMD_D 5 es A R_NTC LVDS_TX_0_DATA1_P A Wii DAD D2 a DMD_D 13 55 ET 22 R465 fev RHET LVDS TX 0 DATA1 N Di Di e CMP OUT epro_33 22V 467 AB12 DB DO a GP10 34 Fo 21 R415 6 communication Cc gt R123 1 M d LVDS_TX_0_DATA2_P AMA AA12 epro_35 2 Ni D DPP RX LTX 0 DPP TX LVDS_TX_0_DATA2_N GPTO_36 lt e A5 i Y13 DMD_SAC_CLK B18 J LVDS_TX_0_DATA3_P _ gt R125 100 a E GPIO_14 LVD
17. PLL AUDIO TESTOUT ard pere ALL RESET READY Geen D3 3V HDMI_SCL 739204 e H scr 10 04 EAN61009301 NAND CLE A Ed I ac Da Do E d R8203 p J1 pi Al 2V elela da VCXO_AGND RESET_OUTB UC Aad ORTREL 2 HDMI SDA e xs 15GPTO_05 e 0 Enable D2CDIFF AC DNS OPT UNS E gl gl ol aa ed 225 ESETZOUTB ED25 xo Se scr3_3 3v C x SGPIO_06 1 Disabe D2CDIFF AC S o 4 7 s NON t GEES i i us JusB AvDD1P2 RESET oUTB SOC RESET aigs ET i la dE ve STAG _RESETE O Y SDA3_3 3V e SGPIO 07 MAIN_FLASH_4G_NUMONYX ain USB_AVDD1P2PLL RESETB A EAN60345904 BTLM18PG121SN1D Ta gen R1020 a D D3 3v T D333V i d USB AVDD2P5 NMIB PT A V T3 J5 CN c1009 se 3 3 L1001 USB AVDD2P5REF TMODE 0 22 D3 3V R4 J4 DD soc_rEseT 10uF ue PLACE BOTTOM KL bd ya USB AVDD3P3 TMODE_1 a1 2v a2 5v GEZ 6 34 PANSSUSITQL 10y M s121SN1DC1003 4 d i2 Gs BLM18PG121SN1D 100p USBZBREF ruopg_ 2 A 8 Sea vi J3 o a N ET USB_DM1 TMODE_3 Ee 4 4 R1010 RLODY USB_DP1 SPI_S_MISO m 120 3 9K Ul AB7 USB_DM2 POR_OTP_VDD2P5 001 AU35 USB_DM1 U2 I Y8 e a a USB_DP2 POR_VDD1P2 001 AU34 UsB DP1 T5 Ko z KE E a 3 5V_ST USB1 is inserted Ro ee H4 BCM3549_JTAG_TCK x 4 dg ai USB MONPLL EJTAG BCH3549 JTAG TDI 001 AW6 USB PWRFLTI gt do alm USB PWRFLT EJTAG BCM3549 JTAG TDO S e D O ul O ns R2 H2 R1033 10Mh E tal USB_PWRFLT_2 EJTAG z rysta ae T2 PW
18. RB41 E et E et E A 1 Se HDMI_RX_1_AVSS_5 1s B E B B D D D A B x E o 4 st o gt a SE al s s s s s s 3 Slalalololalalolals alols d HDMT_RX 1 AVSS 6 Sei a a al af aj al a s al al Of Cf of of 2 a ayaly m o oa pts HDMI_RX_1_AVSS_7 Ee z HDMI_RX_1_PLL_AVSS z DSUB_VSYNC C HDMI_RX_1_PLL_DVDD1P2 E UNE Y7 c946 c951 C955 3 A HDMI_RX_1_PLL_DVSS 0 01uF 1000pF 10uF S E e Ms EAN60345904 d 4814V00112J 2 23 JL M8 rs s HDMI INPUT 4814V00112J M4 4814V00112J M7 OPT THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES Place close to BCM SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION y y SECRET d DATE passe THE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE SCHEMETIC LGElectronics Ce ELE_TRONILS LOCK HEET EO ARE Copyright 2011 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only
19. 2 7K 1 Disable Block 0 Write LVDS_TX_AVSS_2 UE Te Te DA Tm USB_S0 CH GPIO_37 E s s H mo aea Se ey ey R985 22 H21 N22 NAND_CEb NC_25 LVDS TX AVSS 3 o pales nie Rage UK SB 51 C odd 25 Ls GP 10 38 sr miso NAND_10 3 2 NAND ECC 1 DNS L1003 LVDS_TX_AVSS_4 ajo alo ae ajo al GPIOS sr most k E NC_7 NC_24 e 50 7x avss a of dPdYd 8 I2C MAP CH een c9es 00 No ECC M 2p22 VDAC_AVDD2P5 LvbS Tk ASS sfp 1 mePro_40 sr zc 4700pF mc g ae O1 1 ECC Bit ARAS VDAC_AVDDIP2 LVDS_TX_AVSS_6 Sexe 6 SCH GPIO_41 SF_CSB He C T0 4 RCC BIC k VDAC_AVDD3P3_1 LVDS_TX_AVSS_7 MODE VS i D lo Elo tela AE23 pude beid EK F24 9 10 42 C958 hH Agee d 11 8 ECC Bit S Es Foes wie VPAC_AVDD3P3_2 LVDS TX AVSS 8 eem CP 10 43 0 1uF vss_1 vss_2 da b cies a a z S 3 vay vpac_avss_1 LVDS TX AVSS 9 I2C 0 Tuner a25 SP 10 44 NAND_IO 4 CPU Endian 0 o T Pe cu voac_avss_2 Lvps_rx_avss_10 3rd Ovretone Crystal GPIO_45 NC Nc 22 E 0 Little Endian S S S 1 S A e e yis VPAC_AVSS_3 LVDS TX AVSS 11 I2C 1 MICOM 52 x25 CP 10 45 NGA SE E 1 Big Endian VDAC_AVSS_4 LVDS_TX_AVSS_12 GPIO_47 3v BD hoc avss_5 Lvps rx Avss 13 I2C 2 FMT E T cL Nc_20 i AC _5 TX E Ee DT C1900 y 220 323 SPIO_48 NAND_CLE NAND_TO 6 5 Xtal Bias Control 1 DNS C1024 E A GPIO_49 AL 1 03 NAND_IO 3 3 00 1 2mA Fundmental Recommand R1019 560AF24 gt y K6 R995 NAND_ALE d _10 3 NAND I0 3 0 luF Bee pz
20. E 85858238 7E 5 OTOK Fig 8 3 6 Mac Address Download Completed Screen Final Assembly Adjustment Enter Power Only Mode 1 After assembling the SET during the start of post process DC on the SET use keypad or remote controller 2 Press P ONLY key of the adjustment remote controller to ente Power Only mode Full White Screen is displayed 3 To enter the next adjustment press EXIT key of the remote controller to exit Full white screen and proceed with the adjustment 9 EDID ADC MAC ADDRESS Verification Adjustments 9 1 Used Device Adjustment Remote Controller 9 2 EDID ADC MAC Address verification Methode 1 Select IN START of the adjustment remote controller Input 0413 for password 2 Verify RGB OK and HDMI1 OK in 1 Adjust Check gt 3 EDID PCM category Fig 7 1 3 Verify ADC Comp 480f OK ADC Comp 10806 OK and ADC RGB OK in 1 Adjust Check gt 2 Adjust ADC category 4 1 Adjust Check gt Verify MAC Address downloaded at the bottom left 5 To exit press IN START or EXIT of the adjustment remote controller again to exit Copyright O 2011 LG Electronics Inc All right reserved 9 Only for training and service purposes Adjust Check Press OK to Save Country Group Code Country Group Country 480i Component 15 1080p Component OPTIC CHECK RGB EST PATTERN G E RGB OK 0x3
21. Only for training and service purposes LGE Internal Use Only LG Electronics Inc LGE Confidential Trouble shooting Applied chassis FM12A B LG Electronics LCD TV Division Projector Team PHS Gr 1 Trouble shooting No power Check 19 5V LED L13 L14 Less NO Check LED L13 L14 Check ST_5V MAIN_P8001 PIN 1 2 3 Check Operating FAN 1 Check 1 2V_Core L8004 2 Check 3 3V L8015 3 Check 1 8V L8012 4 Check 1 8V DDR L8011 5 Check 14 6V L205 6 Check 2 5V L8017 7 Check 1 9V L8022 NO gt Replace JK17 NO Replace IC8009 No Ee Replace X81 01 1 Check 14 6V L205 2 Check IC202 3 Check FAN1 2 Signal line L203 L204 4 Check FAN1 2 TACH P200 201 Pin2 1 Check Power On Off R8003 2 Check R8060 IC8005 3 Check IC8002 R8052 4 Check IC8002 R8052 5 Check L8002 L8003 Q8002 D8001 IC8003 6 Check R8059 IC 8004 7 Check R8082 IC8006 Copyright 2011 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only 2 Trouble shooting No video Digital TV video Check RF Cable amp Signal ok Check Tuner 3 3V Power No Main L513 a Check Main IC502 Replace IC502 ok Check Tuner 1 8V P No Main L515 OO Check IC503 Replace IC503 ok Check IF P N Signal No Main R526 R529 D PE CERTE PO UE D Bad Tuner Replace Tuner ok Check IF_P N Signal No Check R815 R816 No Main L802 1 7 Q803 0804 gt
22. THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION ss SECRET L ELECTRONICS MD tes DATE es THE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE SCHEMETIC LGElectronics 4 T LUEK HEET Copyright 2011 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only
23. each products is marked by models 4 Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM 5 The receiver must be operated for about 30 minutes prior to the adjustment 3 Test method 1 Performance LGE TV test method followed 2 Required other specification Safety UL CSA IEC CE specification EN55022 Class B EMC FCC ICES IEC CE specification EN60950 1 4 General Specification iin Me Dm 5085760 EIL LS NN Adapter DC 19 5 V 5 64 110 W AC 100 V cons 50 Hz 60 Hz OO _ MEE slPewesge mum LI en 7 Sprang ergsers 13 TT a SemeTewemue 5 Ho semgsremaw SSS Copyright 2011 LG Electronics Inc All right reserved 4 LGE Internal Use Only Only for training and service purposes ADJUSTMENT INSTRUCTION 1 Application Object This instruction is for the application to the DLP Projector Chassis FM12A 2 Notes 1 The power source insulation of this DLP Projector is not charging type and you may not use the transformer for insulation It is advised to use an insulation transform between the power supply cable and power input of the set to protect the test equipment 2 The adjustment must be performed under the correct sequence But it can be changed within the error boundary of performance considering the mass productivity 3 The adjustment must be performed in the circu
24. i C803 He TPS54331D 5 SRE ona n CE 500 Du ou fe 10uF 10uF d or ep a WE fred 4 5 C8058 c8061 c8062 280205 br NCTRL 6 3V 6 3V n P8001 Mos m als a Zi0ur 10ur e e TSS EAN6138760 12507WR 06r zt NS 2 NE o m gt wu om VCTRL NC 6 3V 6 3V 0 1uF de eg SES 36 Malas 30 05 DS 61387601 E AAS 2 5 cs Sia EAN6 7 18007 5 oo 95 MIB 201209 01 20P N2 fa N r emm emm emm emm Max 1100 mA z e AIS e Lj Ge E y i VOUT REE s RB l t 30K 3 3V NORMAL L ee al J KL 7 o 9 G N Lo T R8060 uuo Heel LN Lcs 5 A040 EN m E EE POWER_ON OFF2_1 22u u lu da TZotpr 390pF au L8013 9 D D 25v 25v 50v 50y 50v oss MAX 3 1A TOR mm mn ne Sr daas ns M C8013 m 50V 3 e AED 22uF abs MAX 2 3A 25V A oed SH CTC219S01NE 5V_NORMAL eA l A Se SS Se O ON DRMAT 108006 E eo EN EE AP2132MP 2 5TRG1 TL EP L8015 SW Vout 0 6 1 R1 R2 ERC R8209 FB 0 2 GT e e e 2 i S A 1 10W o LE DMD REF 1 9V COMP AOZ1024DI ei 5 E E GND xS ul os oxe g R2 E om j c8051 eg gt xw EIS A ZS y Loos C8052 oS 4 3V_NORMAL a x A 22uF om en L8023 EN E ADJ RI 158022 GND 50V 10v 2 2 Pen 500 E 5 R1 2 R8058S 4 ol 0 m Lc8057 C8059 S e E STE 20K S 3 dl an iut ARE VIN VOUT he 3 c133 0 De 4 5 C131 C132 mo 10uF 10uF 865 ee uds te m VCTRL NC eV peor 0 1uF C8054 de Le gol 3300pBT ao a ea mee i EAN613876
25. 0 151 L o MAIN_TU_IF_OUT AUD_RIGHTO_N gt res ons 6 R c AUD RIGHTO P AW c R1511 e AA16 AF25 100 SD_V1_AVDD1P2 AUD_LEFT1_N R151 MS or AB13 sr D AE25 g 5 91500 a n SD_V1_AVDD2P5 AUD_LEFT1_P AUDIO_SLEEP en og W14 AE26 10K 2503052 BCM Reference SD_V1_AVSS_1 AUD_RTGHT1_N AA15 AF26 Ee t le apis 32 V1 Avss 2 AUD_RIGHT1_P ee e ADIA SD_V2_AVDD1P2 AUD_AVDD2P5_1 ARID gt d 10 2 Z SD_V2_AVDD2P5 AUD_AVSS_1_1 e V2 Avss 11 2325 H R1434 DSUB G AUD Ass 1 2 T AD23 e 10 e AUD LEFT2 N ms mur USB SWITCH an SD_V3_AVDD1P2 AUD_LEFT2_P R1436 DSUB_B AC15 T AD24 e SD V3 AVDD2P5 AUD RIGHT2 H F Y14 AE24 e wis 32 v2 avss AUD_RIGHT2_P ee W13 4 SD_V3_AVSS_1 AUD_AVDD2P5_2 bd Aen SV s1 so PATH ORLA 22 gt DSUB_HSYNC EE 25 a Y13 Y20 1 R143 s s Oy ak HR o E SD_V3_AVSS_2 AUD_AVSS_2_1 Ge e e OD DSUB VSYNC 55 G So o o EE nee aup aves 2 P2222 co4 0 tur R1433 100 o 0 S6 o o E ni Mc omo gen go e Fee V4 CAVES AAT eng E HE EDID WP Re S 4 e 1 15D_V4_AVDD2P5 AUD_AVSS_2_3 73 0 T DPP DEBUG a Gg Y us Y gt Zr ara anis EE AUD_AVSS_2_4 0 DPP UART CCA D oo oo oo oo ec d SD V5 AVDD1P2 AUD SPDIF R1EX24002ASASOA 1 ya em an an e B AC19 Shoe Mies AD5 m uH 1 BCM UART gt mE A e F SD_V5_AVDD2P5 SPDIF_AVDD2P5 poe vos To Bale AFG e 239 0 1uF e 9 i SD_V5_AVSS SPDIF_IN_N zs AA 101400 hs SPDIECINID AE R1431 10K Sal IN
26. 01 o j 50v e e 9 oS oo e y M n S D3 3V Normal Power 1 e P201 E 12507WR 03L 5V NORMAL D bul TA amp 8 1203 2 BLM18PG121SN1D 5V AED R L8006 IC202 MLB 201209 0120P N2 3 p e TCA0372DM2ELG D1 2V L8018 1 2V Core diui JT FAN2 TACH C n BLM18PG121SN1D EN A 0 0 E m 0 1uPZm ope a D Ce IC10 16v Lov VEE GND1 VEE GND4 xo 2 Eis DPP6401 CS c8070 c8071 0 1uF 10uF 14 5V_FAN E mS A n s A2 APS VDDC_1 R210 E Y an em VDDC_2 z IN_A 4 13K C58 A13 VDDC_3 18009 18002 D8001 L205 c59 a A21 ER RL_ON e BUH R8208 BLM18PG121SN1D L8003 22 0uH RB160M 40 BLM18PG121SN1D Joo us 260 beau A22 R as o8 188007 e ain e AY e gt e TED 6 FAN2 c61 Bl E 1 10W 40V VDDC 6 n TPS54331D Se c62 B2 16V d IC8003 OUT B IN B4 RET VDDC 7 53 1uF ep C8021 C8022 FAN1 D BD9306AFVM C224 Lc225 d VDDC_8 CB027 at C8030 22uF 22uF 125 507 DEUM e C64 SC d B4 d 1oug 0 1u n BAS 0 25V 25V NC2 IN_B 13K C65 mA 10 B13 pu ROSE TOK EP P200 i cee yppc_i NN LB 201209 0120P N2 e Salad 8 e 267 B21 e Ne k e 1K NC3 NC4 5 m 53261 0390 ded VDDC 12 B5 1 m N e VDDC_13 L C8018 R8010 COMP als Yayi i d 269 E SCH EH c C m BLM18PG121SN1D enc id e O luF 1K S Sei 8020 VEE GND2 VEE GND3 uo o awe 2 e c70 i6 c3 mae 4 100pF Ra a pmo TIN PER VDDC_ ca GND T sov uL S s e VDDC 16 vSENSE D c72 ee c19 3 kd e E i C73 c20 ceoihcso16 Lagos t o E GE
27. 133 22 P72 KR2 ANT4 P24 TET S AC7 T NET ser CO gt POWER DET thru hole connector pin e WODNE SAVOD ZEE Aere SOC_RESET 5 05004HR 20B01S P71 KR1 ANT5 P25 R8191 22 H EAN60345904 ANN B NTC E 01026 P70 KRO ANI6 P26 l0uF T TE R8197 22 Moo C8110 e no E Es 0 01uF E SE P32 INTP3 0CD1B ANI7 P27 Mee 2 o EPHY_TDN R8136 22 EPHY_RDP CJ F 3 5V_ST P1403 c BER BPM A 0500HR 10N2 G CAUTION ne lolnl ol ol clololol ul oa A hr EH Glo 3 5V_ST 1 p m r4 Location numer is mixed ARS P8100 ai Es Es E Sex 258 3 19 V NORMAL 0500HR 10N2 G 013 ER zu mimo om Be e Ze 0 OO Hill Hill Ss TI NENT NY et Gi amp 3 5V_ST NPN ON oO st olQ co O tte A ni oa o o fi y xod wo Bo N LO 1 3 il A 5 Jot luF WS 22 T 7 ajo nHimila nm nm nm d X vorn AS ox sain BBS_SCL Bim RIO O R8179 BBS_SDA e e MICOM RESET Fi Ps vii 22 7 2 1o J ke rt roc R8177 far o O o vi Aa A Di ei 22 0 0 Pu A LED_CNT01 47 R1440 BCM_Tx a ER 144 R8145 BCM_RxL E 22 a LED_CNTO2 47 R1439 UARTO RXD C a 22 R8144 D UARTO_TXD E RER a ed Q 0 ST_5V USB_DAT_P Ge EES M USB DAT N Le T1200 EA BLM18PG121SN1D AR OCD1B ST 5V TEY 16v CD FLMDO Ocak 0 1uF eats C1413 S a R8103 10K x X C8111 2 ded To IR B D S S 3 Lov o S id S La EI 1 e E S o THE XN SYMBO
28. 1_CLKB DDROIZATO ppR1_crkb SD ROA WB 5 po DDRO_DO 7 EE Bo DDR1_DO 7 Pas A4 3 x J DDRO1_A00 E14 DDROI A 1 gt S A5 A5 J DDRO1_A01 AS DDROI A 2 2 A6 A6 DDR01_A02 A7 D15 DDROI A 3 gt DDRO1_A 0 3 B7 DDRO DOSO nee 2 DDR1_DQSO F DDR01_A03 DDR0_A 4 pes G2 ae A8 4 E13 DDR01_BA0 G2 Sos LE DDRO_DOSOb DDRO1_BAO DOS DDR1_DOS0b 3 a8 DDRO_A04 A9 E12 DDRO_A S DDR01_BA1 G3 DM RDOS lt DDRO_DMO DDR01_BA1 Ss DM RDQS B3 DDR1 DMO H2 A DDRO A05 EE DDRO_A 6 DDR01_A O yg DDRO1_A 0 os P A2 A10 AP A10 AP ppR0_a06 EVA DDROIZATIT 43 NU RDOS DDROI_AT1 43 NU RDQS EV s All DDR01_A07 TER DDR01_A 8 dom BT DDRO1_A 0 3 EN DDRO1_A 2 gj AS BRT eee N DDRO1 A 2 on e A12 A12 DDRO1_A08 f 73 DDROT AT9 DDRO1 A 3 55 H DDR01_A 3 55 A9 em A13 A13 T e DDRO1_A09 DDRO1_A 10 DDRO_A 4 ra hd DDR1_A 4 rs el i DDRO1 A10 GT DDROI_AT 11 DDRO_A 4 6 DDR0_A 5 33 C3 e DDR1 A 4 6 DDR1_A 5 J3 C3 i DDR01_A11 5 DDROIZATIZ DDR01_A 7 13 DDRO_AL6 57 kd DDRI A 6 y7 c7 L3 DDRO1 A12 113 DDR01 A 13 DDR01_A 7 xo c9 hg DDR01_A 7 xp c9 d L7 DDRO1_A13 DORI AA DDROI_AI8 xg T DDROI A 8 xg Al DDR1 A04 DDR1 AT5 DDR01_A 9 k3 ui DDRO1_A 9 xs i F9 DDR1_A0SF s DDR1_ ATG DDROI_ATIO y gt ES Sica rus DDRO1_A 10 ya i DDR1_A06 gt DDR1_A 4 6 Al DDR01_A 11 x7 o DDRO1_A 11 k7 DDR01_BA0 ees gt DDRO1_BAO DDR01_A 12 12 e DDRO1_A 12 gt e DDR01_BA1 z gt DDRO1_BA1 x E DDR01_BA2 gt DDRO1
29. 1_DATA1_N D1 E Y a R1043 0 OPT ggg C 79 23 NAND_DATA1 BCM 3 5 4 9 Boot SC ap LVDS TX 1 DATA2 P PHRGOOD lt amor SP 10 24 NAND_DATA2 lt NAND_10 3 LVDS_TX_1_DATA2_N 7 DPP6400 Reset aca IGPro_25 NAND_DATA3 see TE xxx NC 1 NC 29 A NAND_TO 4 E rvps_rx_i_paras_p ma GP 10 26 NAND DATA4 ee LVDS_TX_1_DATAS ee EPHY_ACTIVITYC ws lePro_27 NAND_DATAS NC_2 NC_28 Default Res of all NAND pin is Pull down LVDS_TX_1_DATA4_P EPHY_LINK lt GPIO_28 NAND DATA6 e im xou Les R955 25 E21 L25 NAND IO 7 alal a NC_3 NC_27 LVDS_TX_1_DATA4_N D3 HDMI_DET RISE S Se GPIO_29 NAND_DATA7 23 ES apa a R994 D3 3V 2 7K NC 4 NC 26 gt LVDS_TX_1_C1K_P ee A1 2V A2 5V DPE TX ROES S pas KEEN NAND CSO0B ES A NAND IO 0 Flash Select 1 A DPP_RX 1 NAND_IO 7 R LVDS TX 1 CLK ee 41038 pe A RX E c2 CP 10 31 NAND_ALE see Open prain NC_5 1 07 SA O Boot From Serial Flash LVDS_PLL_VREGI 7 EE 3 cs 6210 32 NAND_REB 77 i R634 MAN TE 1 Boot From NAND Flash LVDS TX AVDDClP2 e ss lepro_33 NaNp_cre e NC 6 1 06 NAND IO 6 NAND_IO 5 E 4 LVDS TX AVDD2P5 1 4 A i Lez t aede R961 0 ce por 10 34 HAND NERT NAND_RBb RB 1 05 NAND I0 5 AND T L scm e NAND_TO 1 NAND Block O Write DNS LVDS_TX_AVDD2PS ZE I I t 001 235 XC5000 RESET c4 GP 10 35 NAND_RBB z O Enable Block 0 Write 3 5y 8 E AS AS MAS ttes EE paez R986 22 F21 CP 19 35 NAND_REb 2 1795 NAND_TO 4 1 BAND TOI R608AA
30. 2 20 D LUE PAROI BKO R609 15 0 1uF 6 3V DDRO1_ODT e T e DDR01_BA2 R625 75 Se a e e e DDR01_WEb S I 0 1uF 003 B1 7003 D4 003 F2p0RGtFEGKDOR 75 M J DDR01_ODT R621 75 keng THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES m SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRE ODEI HW300 JE IE 2010 09 01 aa LG ELECTRONICS LULK HEET Copyright 2011 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only E E O I 1 E E I l a P401 104060 6017 5V NORMAL TEO DPP6401 EEPROM gas A Pa FOR DPP6400 four sae DPP GP IO AA17 10V A W16 AB18 IC400 C406 17 o e AT24C32D SSHM T nehme es ao dm E E AA18 go SR e 16v D DOWNLOAD NABLEZ S W mm _ AB19 o DMD_SAC_BUS Wee 3 3V W17 i DMD_DAD_OEZ Los 1c10 PLACE BOTTOM ue DMD_DAD_STRB Ze
31. 8 HDMI1 OK 0x4 OxAF 14 DDP SEQUENCE CTRL 15 DDP LED CURRENT CTR Fig 9 2 Adjustment Menu when IN START is selected 10 White Balance Adjustment 10 1 Used Device 1 llluminometer Model CL 200 1EA Chromaticity measurement from projection screen center 2 Remote control 1EA 3 CL200 and SET connection Interface Board 1EA 4 CL200 Uart Communication Cable 1EA 10 2 Equipment Composition pk os c set Fixed Board SCREEN 10 3 Adjustment Carry out a heat run on the set for 5 minutes before adjustment 1 Connect as in the equipment composition diagram then enter into adjustment mode by selecting ADJ on the remote control 2 Execute adjustment by pressing the right direction key on 3 DDP AUTO CCA Fig 10 3 1 EX ADJUST PCM EDID D L ACS EDID D L ADC Calibration DDP MANUAL CCA DDP LED CURRENT CTRL DDP OPTIC CHECK DDP DMD CHECK DDP TEST PATTERN MAC ADDRESS D L Fig 10 3 1 Selection Category on ADJ Adjustment Menu LGE Internal Use Only 3 Message as shown below can be verified after completion of adjustment and readjust following the 2 3 step if Fail occurs OK White Balance Process Successful and Warm Cool chromaticity diagram is within the target Fail White Balance Process Failure gt Execute readjustment Warm Fail White Balance Process Successful
32. A CF 30 A3 57 4C BO 23 Make sure to carry out AUTO SCAN on the first production set Lot 09 50 4E 21 08 00 81 CO 81 00 81 80 90 40 B3 00 71 40 01 01 01 01 9E 20 00 90 51 20 1F 30 48 80 2 Analog TV inspection 36 00 90 3F 63 00 00 1E 01 1D 00 72 51 DO 1E 1 Connect the signal to RF Jack 2 Select TV by pressing Input on the remote control GE 28 55 00 7E 8A 42 00 00 1E 21 39 90 30 62 3 Select CH2 CH4 by changing the channel using 27 40 68 BO 36 00 CO 41 84 00 00 20 00 00 00 CH CH on the remote control then check the display 00 4C 47 20 50 4A 54 52 OA 20 20 20 20 20 00 status 3 Digital TV Inspection 2 HDMI BLOCK 0 1 Connect the signal to RF Jack 3 5 6 2 Check the DTV reception status by selecting DTVCH 31 3 FF FF FF FF 03 80 73 41 21 08 00 81 01 01 01 9E 3F 63 00 00 00 7E 8A 42 BO 36 00 CO 20 50 4A 54 3 HDMI BLOCK 1 Copyright 2011 LG Electronics Inc All right reserved 12 LGE Internal Use Only Only for training and service purposes BLOCK DIAGRAM Joe pibas 50 20 490 8 130 4 llc c TEBOT VIN JM 031 lp pe 4 q EEN FITOOvdL die oni Nv wid T E iii auoydpeaH a mpou el Pell cy gn use ON DO Md REUS i HA AR v i KE DD josuas FStWJs HIINAL Ad qua L Y IOCZTIAPE ay DOC damog vad Orodda TT ace LH Vlad o T juauadur7 994 q q GO DSPIA IDEs aen WA TEISAu E1545 Cl zHiNcE Hr
33. ANY x 523 SGPTO_05 GPIO_06 z D24 a GPIO_07 c25 B4 R10 0 c26 E R1007 22 C24 LVDS_TX_0_DATA0_P D LVDS_TX_0_DATA0_P HP_DET e oii 0 Rs P 10 08 WEEN t p26 PKTO_DATA LVDS_TX_0_DATAO N D LVDS_TX_0_DATAO_N VOLUME GPIO 09 0 22 6 R95 0 R26 a25 PKTO_SYNC LVDS_TX_0_DATA1_P ee D LVDS_TX_0_DATA1_P GPIO 10 R962 100 R24 226 RMXO_CLK LVDS TX 0 DATA1 N CD LVDS TX 0 DATA1 N 001 J37 TU ATTEN C YA z eP 10 11 6 L SC RMX0_DATA LVDS_TX_0_DATA2_P Se LVDS_TX_0_DATA2_P DSUB DET gt GPIO 12 EAN60694001 EAN60997701 A3 L3 RMX0_SYNC LVDS TX 0 DATA2 NT O LVDS TX 0 DATA2 N REAR AV DET aprons MAIN_FLASH_8G_SAMSUNG 2 mE K c1006 c1007 ad ES A ee BCM_RX 25 CP 19 14 2 Z xi m E 100pF 100pF LVDS TX 0 DATA3 N D LVDS TX 0 DATA3 N as 10903 BCM_RX ECH TX Sa erro MAIN FLASH 8G NUMONYX MAIN FLASH AG TOSHIBA 50V 50V LVDS_TX_0_DATA4_P gt LVDS_TX_0_DATA4_P 74LVC1G126 BCM TX C GPIO 16 D6 m R1060 0 F25 LVDS_TX_0_DATA4_N C gt LVDS_TX_0_DATA4_N DDP_ASIC_READY GPIO_17 cs GC R924 1K R23 a LVDS TX 0 CLK P LVDS TX 0 CLK P vec DEBUG BCM HDMI_HPD_1 C SE as oP 10 18 LVDS TX 0 CLK N T D LVDS TX 0 CLK N GPIO_19 NAND_IO 0 7 G26 Ke LVDS_TX_1_DATAO_P ee Gest GPIO_20 D3 3V G25 a LVDS_TX_1_DATAO_N 0 1uF rox GPIO 21 D3 3V S A c2 16v R946 56 AF20 H26 NAND_IO 0 IC901 N LVDS TX 1 DATA1 P m 2 I2S_AUD_FS1_CLK C SOT GPIO 22 NAND DATAO ET WAND TOTT SOU EE i TO 1 2 4GW LVDS_TX_
34. BA2 A17 Ease EU DDRO_DQ pepe are DDRO1_BA2 1 BA2 N BA DDRO_DO00 eege DDRO_DO DDR01_BA2 NC_1 BA2 is NC 2 A DDRO_DQ01 ES DDRO_DO NC_2 A14 a e DDRO_DOO2f 1 DDRO_DO DDRO1 A 13 NC_3 A15 ppR01_A 131ra PN 9 2 T1G084Q0F BCF8 Pi GhS4or BCrs A13 T j DDR0_D003 DDR0 DO A13 HE FRS IC606 1 58 IC605 1 DQO oe DEV S DO1 DDRO_DQOS5 DDRO_DO C11 DDR01 ODT 553 e DDRO1_ODT e DO2 Ju DDR0_DO06 DDRO_DO DDRO_DQO 0 15 Ca GC C673 c674 DQ3 Dos DORO DOO E DDRO_DQ Do4 DO4 DDRO_DO08f 15 DDRO_DO 0 1uF 70pr m 470pF 0 1luF 56s ae DDRO DQ09 S DDRO_DOT EAN60992101 Bus DDRO_DQ1OF gt DDR0 DOT Do7 oe DDRO_DQ11 DDR0_pO DO7 DDR0_DO12 DDRO_DO 1 T d EE EB Dot IC604 Place Caps close to DRAM pin ur IC606 Place Caps close to DRAM pin D10 DDR0_DO NT5TU128MS8DE BD NTSTU128M8DE BD DDR1_DO 0 15 m DDRO_DQ14 en DDRO DOI DDRO_DQ 0 15 Ql BS DDR0_Do15 DDR1 DO ANYA_DDR ANYA_DDR ives 9 c PORRO NU RDOS 8 9 aja N o N N D3 DDR1_DO LA 8 co DDRI_DO p DDRI_DOI AO Al pj DDRI_DO AO o j al el of Hl FP of oi of A of ol wy GA Hl ra of Ui bi Oj Dn rel oo ol ou OF Pl al NH oc
35. DD33_29 K19 U10 T z P17 4 C93 0 1uF M U14 P11 SS S 3 hd 119 mio Welt SE ETE i C94 0 1uF vi 1553 30 P12 M19 xii DVSS 22 VSS 84 KSE c95 0 1uF 1 vo 2233 21 P13 DVSS_23 DVSS_85 N19 K11 ae 55 0 7 i C96 0 1uF bd y22 233 32 P14 Ki DVSS_24 DVSS_86 P19 1d AA17 M C97 0 1uF aals YDb33533 R1 DVSS 25 DVSS_87 VDD33_34 R19 M11 AB17 C98 0 1uF 1 AA22 Gest U8 D3 3V x DVSS_26 DVSS_88 e VDD33_35 T19 N11 618 c99 0 1uF ABl U15 43 3V NORMAL DVSS 27 DVSS 89 e Ld VDD33 36 18016 U19 SOL f v21 4 c100 0 1uF A AB9 v4 CIC21J501NE v19 R11 ic DV58 90 auis C101 0 1uF apis PP33 37 v5 z DVSS 29 DVSS 91 e VDD33 38 AN Tli AC18 4 C102 0 1uF AB21 v8 D3 3W L1007 VSS 30 VSS 92 w VDD33_39 1 C36 10uF 6 3V 4 C8063 C1065 c1071 C1077 C1083 c1089 ci095 c1099 A BLM18PG121SN1D vss_31 vss 93 ue e ue D Lut 1000PFzw 0 01UF a 0 1uF 4 7uF 1000pF ps 0 0 1uF 0 1uF D12 F26 c16 22uF 10V v18 16v S DVSS_ VSS_94 e zx M G12 D20 c22 10uF 6 A4 v19 DVSS 95 DMD18_1 c1302 K12 G20 4 c23 0 1uF All v20 DVSS_96 ab 0 1uF L12 n H20 C24 0 1uF ga DMD18_2 W3 S DVSS_97 e DMD18 3 v24 M12 J20 c25 0 1uF E10 wa s AGC_VDDO S DVSS_98 e DMD18 4 D3 3V N12 K20 M C26 0 1uF F8 W10 DVSS_99 DMD18_5 5 P12 a L20 c27 0 1uF F10 W12 S e DMD18_6 wit R12 M20 A 4 c28 0 1uF W19 VDDO_1 To REP TT EEN W17 U12 P20 DMD_REF_1 9V 148019 U11 Y2 Pate 0 3 ma ER A BLM18PG121SN1D v12
36. Fee d vcc Ge 5 FAN1_TACH lt oa VDDC_18 Cay A PAS me LC8034 EUROS e e USD VDDC 19 Se 25v 25v oO uF Og no m27PF mi y MAX 3 1A c8017 5 bd e VDDC 20 50v M 50V 50V 50V 10uFTT C121 D3 i AT ZK e 122 VDDC_21 10V 100pF a E VDDC 22 ue Ei 9 i te d C123 D19 E C124 ZE D20 n di VDDC 24 1K 4 i C125 E4 4 C126 M ES pe VDDC 26 4 C127 E18 Ka VDDC_27 C z C128 E19 VDDC_28 Ne C129 F9 VDDC 29 7 1 2V_Core 4 c130 Fil A VDDC_30 aia HE 110 BLM18PG121SN1D Typ 9mA E13 39 e TT PLLD_VDD ta 111 gt BLMI8PG12 S8N1D A E14 J10 5 t PLLM VDD Se A N t Lale t f 7 SEN D amO LL DO Typ 7mA ols D T D13 J12 Le E Sa To S D1 2V 5 Ju d eT Dia PLLD_VAD SC D1 8V c37 10uF 6 3V PLIM VAD J14 L12 ppp BLMIBPC1218N1D e C38 10uF 6 3V K9 ESA gt L13 BLM18PG121SN1D b c39 0 1uF A16 K10 POWER_DET ain e VDD33 1 7 c40 0 1uF A20 K11 C8065 n ae E e S d DN fu EE O VDD33 2 TUE Axe C1053 C1058 ci062 C1068 C1075 c1081 C1087 c1090 c1096 c10000 lio 3 3 3 C41 0 1uF El K12 10y Sie 0 1ur 4 7uF S31000pF S0 Diop ZZ0 1uF 10uF 10uF 22uF SS22ur e22uF Soe emer TM rem Cu CIE mis VDD33_3 XS E 10v 10v 10v LGE3549XS LGE3549XS P22 B2 version LGE3549XS LGE3549XS P22 B2 version D imt T9 vje ol og ie VDD33 4 1C900 IC900 9 A C43 0 1uF A F13 K14 e SR i C44 0 1uF Fis PD33 5 K22 d C45 0 1uF i G22 ES L9 1 4 C46 0 1uF A us 533
37. G 7 ape e Q Sau c1407 PI3USBIALE 7 AB12 SPDIF AVSS 1 3 fie e 3 3V_NORMAL C921 ins SD_R z Tape SCL R1429 22 HDMI SEL Loir AU M2 can brant ET NE sepir Avss 2 JK901 ROID Ma DIE AC11 sPDIF Avss a SDA R1427 22 HDMI_ SDA 5V_NORMAL a SD_G A Z KJA PH 1 0177 D DSUB DET amp AD11 C1401 C961 0 lur SD_INCM_G M5_GND PR iE C923 Que DELL p 8 R972 OPT Kee aeri Jo HDMI_RX_0_CEC_DAT SE I HDMI_DET 16v H B L Cc962 0 1uF ra TEE RX 0 CEC din es 1 L908 CM2012FR27KT a HDMI RX 0 HTPLG IN J OC pvt e e TER 27 R919 10 e C924 Q luF SD Y1 RX_0_ AAS R964 IK d E HDMI_DET Gem we L909 CM2012FR27KQ R91 Q ca 0 uE AC17 HDMI RX 0 HTPLG OUT gt EN yv sp_PR1 AB3 R999 22 D5B 99 M3 DETECT 10 Gest M2012 R27K Wl Q c9 FREE EE o ui HDMI_RX_0_DDC_SCL E AF17 FE HDMT_RX_0_DDC_SDA BCM_RX 0 ui x m z 0 HDF arta 5D_TNCM_COMP1 x rion E Sed M 0 RES x T 3 3V_NORMAL 2 mi 00 me ven een Re e Ee e SD_Y2 E R101 5 6 eS BoM Ts Ax et Sos oo Prem Eege E Cep al AF19 HDMI_RX_0_CLK_N c UARTO_RXD o o o o o o E SD PR2 R102 5 6 S M6 AD18 HDMT_RX_0_CLK_P 3 4 E DDP2230 UART FOR CCA IB2 0 b SD_PB2 ieee ce R103 5 6 x L UARTO_TXD S AF18 ep HU coit HDMI RX 0 DATAO N RT ENS x z R909 _INCM_ R104 USB DAT N AE16 HDMI_RX_0_DATAO_P e D COMP DET SD Y3 M LAE a R105 5 6 DDP2230 USB FOR DBG IB1 gt gt gt 2
38. IED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE SCHEMETIC 2010 09 01 MODEL uw300 gE DATE SECRET LG ELECTRONICS LOCK HEET LGElectronics Copyright 2011 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only P102 P101 FBXOOZOCMFFOUAOO HBXOO40CMFF 6UA00 VOFFSET_8 5V A e ES i DMD REE FL DMD_REF_2 5V B4 A A B4 VBIAS 16V A e c3 C4 c1 3 C4 T co 2 de VRST_ 10V A e L de e E E E ES O ES DMD_PWR_EN 9 Qe E f nS Se A P E E VE J TEL TPS65145PWPR EP H4 H1 H4 so soy R1 a 1000pF FB1 EN AE 1 24 A C9 d 1 16W S m 1 E FB4 ENR 3 J4 1 J4 E CA 5 EN 2 x o lt 4 a 8pPF m d NES d 50V i Un aN H 5V BASE COMP 3 22 A VRST_ 10V VIN FB2 K4 K1 K2 K3 K4 e e 4 21 R6 VOFFSET_8 5V SW 1 SC Geng A E 5 20 e m 1 16W 1 16W I 1 C
39. IS C14 SW 2 GND 2 a5 L Oi e e 6 9 put 2 0 1uF 1oug 10ur T54S 9 16v 16V Tev RB160M 40 S PGND_ DRV m Lu c2 L C3 D1 7 8 A ae lt 220 as D Lut a A v IO m C o ha 16V 16v D p PGND_2 C1 peu 8 7 lt VBIAS_16V A SUP GL SC 9 6 R3 9 0 PG C2 MODE 10 5 C12 C15 GND_1 C2 0 1uF S 10ur 11 4 16V 16V a FB3 OUT3 12 3 e a A x o lt gt a F0 Ss oe D Lo dw e VO ei u ow Ss d i mw do m y Se 2 Rusa ds aen ea DD NN elslcle cv ala Ads lz E reset s o a a a 9 ala N 2 N E 3 4 ala al ol alo AS F o ol al in ei es A i De em ASSES ala a a dela alalda Alea als al al al ala alal ala al al ala na dg Im E 22222 E salas Bass 2229 Sesa 4499 seas das ala bt q al ala A al aaa alal Oo a 5V A DMD_REF_1 9V Brem Een P103 104060 6017 IHE ZN SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE NN SYMBOL MARK OF THE SCHEMETIC SECRET LGElectronics MODEL Insi51 pe DATE BLOCK pswp ISHEET 7 LG ELECTRONICS Copyright 2011 LG El
40. L MARK OF THIS SCHEMETIC DIAGRAM TNCORPORATES zs J SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR SECRET MODEL seas DATE 920 THE CRITICAL COMPONENTS IN THE IN SYMBOL MARK OF THE SCHEMETIC LGEkctronics Ce ELE_TRONILS BCM BOOT FLASH GPIO HEET Copyright 2011 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only BEM DDR See so m A DDR2 1 8V By CAP Place these Caps near Memory A 1G0840F BCF8 r 1GO8AQF BCF8 e E8 IC604 1 IC603 1 pgo A1 2V F8 DO A i co Ey lt
41. L10 d C47 0 1uF e ue 7PP33 8 L11 H8 T6 P15 C48 0 1uF SEH PD33 9 L12 vss_1 VSS_63 e VDD33 10 J8 J R15 C49 0 1uF H18 113 VSS 2 VSS 64 VDD33 11 K8 K7 T15 A c50 0 1uF i J5 L14 DVSS_3 DVSS_65 L8 17 be U15 C51 0 1uF ze PPS 122 d i T T i ii ib x gt Ss vss 5 pvss e PET PERS sa vpp33_14 ET T 3 j J C1051 C1054 C1059 C1064 c1069 c1074 c1082 c1086 c1092 c1097 DVSS 6 DVSS 68 e e VDD33 15 L L E n C54 0 1uF 1 Zi 000p 0 01u S0 uF 4 7uF 1000pFZZ0 01uFZZo iur 4 7uF 1000pFZZo oiur Pa ART DVSs 7 DVSS 69 Ske x ES VDD33 16 a R8 T K16 C55 0 1uF K18 M12 DVSS_8 DVSS_70 e VDD33 17 H9 K26 L16 M c81 0 1uF Li M13 DVSS_9 DVSS_71 H10 AA8 une i C82 0 1uF i EN Don M14 VSS_10 DVSS_72 H11 D9 5 N16 M C83 0 1uF GE a M17 VSS S 3 x DVSS 12 VSS 74 e VDD33 21 H13 Y9 R16 4 c85 0 1uF P5 N9 DVSS 13 DVSS_75 D ET H14 K10 SR rie i C86 0 1uF Bop ese N10 3V DVSS_14 TS 7 H15 L10 DVSS_769 oie C87 0 1uF zs PP33 23 N11 DVSS_15 DVSS_77 VDD33_24 H16 M1 Ton i C88 0 1uF T6 N12 DVSS_16 DVSS_78 VDD33_25 e H17 N10 K17 c89 0 1uF T17 N13 ji ii 1 1 ii i i H18 pio 755 17 pvss es e Se ENS e See Vpp33_26 Er 10 7 f 4 c1052 C1057 C1063 c1070 c1076 c1080 c1088 c1094 c1098 fi DVSS 18 DVSS 80 e VDD33 27 E E H19 R10 M1 c91 0 1uF P9 Zei up 1000pF Ze 0 OLuF oa 0 1uF 4 7uF 22 1000pF S20 01ur S20 1uF S210ur pvyss 1i DVSS 81 y e 122 VDD33_28 J19 10 N17 d c92 0 1uF 4 U9 p10 DVSS_20 VSS_82 V
42. LINE elt 3 3V_TU 1 8V TU 0 1bhF BECAUSE THIS POINT MAKE ATTENUATOR E dc A A 16V i ur q aq C503 C506 H ec o 0 Pun 2200pF gt 1C502 50V l 5 se Moo 5V AZ1117D 3 3TRE1 3 3V_TU o 19 L513 NA a MLB 201209 0120P N2 DO NOT CHANGE ORDER M TL INPUT OUTPUT m XC5000 RESET 3 2 TIN elo el elrlalz 16v 10 EIN NIT 0 1uF R517 3 3V_TU de 1000pF slo d a pele 5 5 DIE C542 es EE cue ADJ GND pu Ee HE Se Se ala almlala a u u lu u 10u u 0 UF 22u 50v ee Kad EE pe pene p ne ER iov iov 16v 10V 3v e 3v 16v 10v 10V KCN BT 0 0089 C502 esos 12nH JK1502 us pon Luo C516 0 1uF Bu 50V V nnern e D O P SDA A J A V 1 e e EN e SDAO 3 3v SCL 1 8V_TU A e SCLO 3 3v A E d VDDD_2 C550 Ed x 1 508 IC501 EXTREF 18pF 1c503 ag x L5 C540 0 1uF 0 5 144 z z 9c LJ 50V 50V AZ1117BH 1 8TREL om E Pc514 0 1uF xi 25 8 TE IHi XC5000C Boi a Us o iz i perm LA ur GND 7 HT bene BLM18PG1218N1D S csoa 8 fesrr 0 1uF x2 he eee 18pF AIS Ld RCLAMP0502B 8 i120pr E e ADORED ER 4 E ENb 2g i Isolation amp Impedance 75ohm D500 o S gt 7 P pe DDI2 in 112 3 TAL 2 c507 C508 C560 csg4 C569 IC1500 PY NORMAL pa dit rue E 10uF 10uF 10u Loum 0 luF 74LVC1G126 A E poso por 1 TUNER2 12C Address 0xC8 See 6 3v 6 300 LOSS 16v DDI1 B VOLUME OE RI 5 ER VOLUME ES K i o ne ol s
43. MAL 10K 4 E pis e Aria SD INCM_CVBS2 HDMI_RX_1_HTPLG_OUT e lo TX R911 O REAR AV DET eS x29 SD_INCM_CVBS3 HDMI_RX_1_DDC_SCL PILE SE R903 1K OR Ze AE15 we OL EE 45V NORMAL MLB 201209 0120P N2 3 3V_NORMAL E gt Su Cx d x boa x z apis 8D_TNCM_CVBS4 HDMI RX 1 DDC SDA pot WR VOUT gt o E o D 3 9 5V da Eun ga S So Se oe Sole atone TU_SIF Ld SD SIF1 HDMI RX 1 RESREF p A2 5V ST awh S EN 5 aST 33 Ee coss IL ap AE19 da a a ba oa e SD INCM SIF1 HDMI RX 1 CLK N ILIMIT M Mo HDMI_RX_1_CLK_P E bd hd e SeS oes geS 238 affa ur ABLE EUN E E d De ALN DS eS o2 Te _VAFE_AVDD1P2 HDMI_RX_1_DATAO_N se C974 d z sz 4 EI 4 4 3 10 22UE 5 qc A BLMT8PGT2TSNTD _VAFE_AVSS HDMI_RX_1_DATAO_P e ev T dev FAULT ENABLE grey wit yy ape PLL_VAFE_TESTOUT HDMI_RX_1_DATA1_N Sp USB_PWRFLT1 US USB_PWRON1 _PW SE SB_PW S ace RGB_HSYNC HDMI RX 1 DATA1 P D1404 Yo X3v3v NORMAT RGB VSYNC HDMI RX 1 DATA2 H BIS A2 BY 1402 3 3V_I MP 5 5V ilur HDMI_RX_1_DATA2_P Mr HDMI RX 1 VDD3P3 D OF MI RX 1 VDD3P3 pe S HDMI_RX_1_VDD1P2 Bid When Low 3 When High HDMI_RX_1_VDD2P5 3 5V gp current limit DSUB_HSYNC A Ge e pid gt USB 5V out d HDMI_RX_1_AVSS_1 Ll 6940 c952 C956 a a a a D1400 HDMI_RX_1_AVSS_2 0 1uF 0 1uF a Se A EN f of at f os ox m HDMI_RX_1_AVSS_4 al al af al al sl of of amp 0 amp
44. North Latin America http aic lgservice com Europe Africa http eic lgservice com Asia Oceania http biz Igservice com CHASSIS FM12A MODEL HW300Y HW300Y JE CAUTION BEFORE SERVICING THE CHASSIS READ THE SAFETY PRECAUTIONS IN THIS MANUAL P NO MFL67213602 1105 REV00 Printed in Korea CONTENTS CONTENTS nia 2 SAFETY PRECAUTIONS ege geesde eege 3 SPECIFICATION cuan 4 ADJUSTMENT INSTRUCTION ura nnna 5 BLOCK DIAGRAM mm 13 EXPLODED VIEW Re 14 SCHEMATIC CIRCUIT DIAGRAM e eene rennen nennen nnn Copyright O 2011 LG Electronics Inc All right reserved LGE Internal Use Only Only for training and service purposes SAFETY PRECAUTIONS IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety related characteristics These parts are identified by in the Schematic Diagram and Replacement Parts List It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X RADIATION Shock Fire or other Hazards Do not modify the original design without permission of manufactu General Guidance An Isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line Use a transformer of adequate power rating as this protects the technician f
45. Only for Warm Mode and Cool Mode Copyright 2011 LG Electronics Inc All right reserved Only for training and service purposes 10 11 Brightness Inspection Measure the subjects below and it should satisfy the spec of product specification 1 Brightness Annsi Lumen 2 Whiteness color coordinate KAGA measures R G B color coordinate 3 Color Uniformity 4 Brightness Uniformity 11 1 Preparation for Adjustment and Device Composition 1 Adjustment Preparation 1 Input source Default No need to designate Source 2 The order of operating the adjustment remote controller buttons IN STAR 4 DDP OPTIC CHECK Select Full White 2 Brightness Measurement Screen Setting Projection Off set 10096 WWEES A Projection Distance D 1200mm H2 4 Screen H wwlgg Projection Distance D 1200mm Fig 11 1 1 Brightness Measurement Screen Setting Composition 3 Projector Brightness Measurement JIG Software Organization 1 Model Selection HW300 2 Selecting screen size W 861 H 539 C Inspection B Selecting screen size A Model Selection Uniformity WE ESB 70 0 x a BMJ x Color Uniforaity Aw t 000 raszsa F4 il 3 F Uniformity F ColorUniformity a233 I E UE NA a A ja IE EE SUR y Tem LGE Internal Use Only 3 Explanation of R G B Inspection and Method AE E
46. P 38 T11 o ENKMC2838 T112 C582 Lip use e 6 BpF sees LHP IN SHUTDOWN 10K R y E 50 4 0 1uF n mie 9 Rot R892 W26 AC20 Lev LOUE y A2 e DS AGCI CTL 128 CLK IN SEV O 4 PED 200 W25 AD20 22 R934 e gt dist DERECT o5 Sg Zu ER Ls L DS_AGCT_CTL 128 CLK OUT A ORE PVDD 2 LOUT SELECT 01514 47uE 6 3V 0 5 1C1402 oa zn gon so o Tao 929 R A519 11 e E 7 7 se o 2 x EDSAFE_AVSS_1 I2S_DATA_IN L RIEX24002ASAS0A no EIS pr gt a ole A1 2 W21 AF21 22 R935 D A N22 BDSAFE_AVSS_2 128 DATA OUT een C15 pe s S see 3 2 SCH BDMISPGIZISNLD GEHE S 128 LR een 52 Dose gS gs GND R1432 L900 EDSAFE_AVSS_4 I2S_LR_OUT 5 a 100 g AA24 AC26 0 R8218 _ KJA PH 0 0177 O EDID_WP vy EDSAFE_AVSS_5 AUD_LEFTO_N VW E A JK1501 R1428 J d 26 AC25 0 R8219 c M EDSAFE AVSS 6 AUD LEFTO P T WW E e RGB DDC SCL R505 0 MAIN_TU_IF_OUT Y24 E AB25 2 5v 22 lt e EDSAFE AVDD2P5 AUD AVDD2P5 0 fe E C1525 H R142 6 a z E AB26 ied ATE lio 0947 j 8 IIT LC J RGB_DDC_ISDA 0803 EDSAFE_DVDD1P2 AUD_AVSS_0_1F 0 1uF o o 22 AA26 W20 c94 Q 1uE S Sora NES a E S ISA1530AC1 C520 An25 1FDSAFE_TF_N AUD AVSS 0 2 3 5V ST Ped OPT_EMS se SES c i B R506 0 33pF 125 m moo Too So 1e 8 e P EDSAFE IF P AUD AVSS 0 3 C216 Dour D gt ojs oja SN Y B E 50v Y21 AA23 o P901 a B c ROT PEL DS_AVDD1P2 AUD_AVSS_0_4 KCN DS 3 0062 Ki m ISA1530AQ1 PLL_DS_TESTOUT 3528 a Rika B 804 J T
47. QS DDRO_DM1 DDRO1_A O ya m po A9 A10 AP E17 DDRO1_A 0 3 D1 8V DDR1_DO15 D1 8V DDRO1 A 2 gj A A11 A10 A A12 ppRo_pwo gt DDRO_DMO ETT En DDROI_AT3 55 5 Se A12 DDR0_DM1 DDRO_DM1 DDRO_AT4 ra vppo_ e DDR1_A 4 Je mm A13 P Exi gt DDRI_DMO DDRO_A 4 6 DDR0_AT5 vppo 2 e DDR1_A 4 6 N c3 T DDR1_DM1 gt PPRI_DM1 DDR0_A 6 34 VDDO_3 5 e DDRI_AL6 o c7 DEE DDRO_DOSO DDR01_A 7 go LES pun hg DDR01_A 7 x2 c9 T DRO_DOSOB B DDRO_DQSOb DDRO1_AT8 xg vppo_5 ee e DDRO1_A 8 xg F10 e sg posi DDR0_DOS1 DDRO1_AT9 x3 vpp_ e DDROI A 9 3 i R0 posis 75 DDR0_DOS1b DDROI AT10 5 vpp_2 e ne DDRO1 A 10 y DDR1_DOS0 DDRI_DOS0 ee ER DDROI A 11 VDD_3 o DDROIATII gy TOR C19 K7 i H9 e A11 e DR1_DoS0B DDR1_DQSOb DDROI_ATI21 p vpp_4 DDR01_A 121 DDR1_ DoS1 DDR1_DQS1 es ES Los DR1 DOS1B Die DDR1_DOS1b vsso_2F E C16 DDRO_VREFO B DRO1_RASB gt RRE RASH nues vsso ET DDRO1_BA2 NC_1 BA2 DDR_VREFO ooo o DDR01_BA2 NC_1 BA2 VSSQ 4 Qu A23 D8 NC_2 A14 DDR_VREFI Ee DIGEN oo 6 9 NC_2 A14 VSSQ 5 E NC_3 A15 DDRO1 vest A D DDRO1_WEb DDR01_A 13 Lg NC_3 A15 vss1 ee DDRO1 A 13 8 MS DDR_VDDP1P8_1 A13 vss_2 DDRO_VREFO DDR1_VREFO a Ce D22 003 D2 003 D4 003 D6 003 F2 003 F4 003 F6 J1 A A DDR_VDDP1P8_2 VSS_3 x9 La El Fa B D E V VSS 4 pe p 5 J Si EAN60345904 3p 4 ds J S 3448 DDRO1_ODT LEA Foe REP e DDRO1 ODT
48. SEN s VDDO_4 FPD12_2 113 v20 m sa VDDO_5 DVSS_43 ET c8072 FPD12_3 M13 A21 OCT c8073 v12 Y10 VDDO_6 DVSS_44 t SC ES FPD12_4 C1055 1060 C106 C1072 C1078 C1084 c1091 c1300 p13 IDVSS 45 Y14 nur 0 6 y 2 22 DVSS_46 o 1uF 0 1uF 0 1uF 0 1uF 4 7uF 4 7uF 4 7uF ZZ22ur ae IS EE L dt SC 10V s vss 47 E FPD33_1 A T13 U13 Y21 DVSS_48 FPD33_2 a A9 U13 iz e vio AA1 DVSS_49 G9 G14 tu c105 PED SEI AA2 DVSS_50 elt ee 0 OluF FPD33_4 L G11 K14 ETS 25v VSS_51 c G13 L14 ol olo AA11 VSS_52 vss_100 A14 M14 AA13 PA m wig DVSS_53 3 3V NORMAL 18020 3 3v vss_101 E e sir pvss_54 A BLM18PG121SN1D A vss_102 Poo vss 55 e as e VsS_103 A19 R14 C8076 Les wad c108 AB13 e G19 Tia 55 56 Zen Lob Cm Cm Ome 0 01uF vss_104 1522 Hpvss_57 16v sI ols able 25V VsS_105 eres Creer 1067 C1073 C1079 C1085 C1093 c1301 U14 Tu e iooopr 1000pF 1000pF 1000pF ZZ0 01uF ZZ0 01uF 2 0 01uF S20 01uF EAN60345904 Kis povss 58 h B15 VSS_59 E PLLM_VSS L15 B14 e M15 DVSS_60 PLLD_VSS pvss_e1 N15 C14 DVSS 62 PLLM VAS C13 RW I PLLD VAS EAN60345904 BCM3549 DDR 1 8V By CAP Place near to BCM3549 E THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECF
49. S_TX_0_DATA3_N LEE Dun SAC BUS BAGO AVA 20 DMD_SAC_BUS C409 C408 S TX 0 100pF 100pF 05004HR 20B01S LVDS_TX_0_DATA4_P R126 100 ABLA B T DD DE Sie AA14 _DAD_ LVDS_TX_0_DATA4_N DMD_DAD_OEZ Fos 20 L DMD_DAD_STRB ee RA62 AAA DMD_DAD_STRB KEE arr cix H Dun DAD BUS BAGS AAA 22 DMD_DAD_BUS 33 M22 M20 BCM INT gt AFE_IRQ AFE_ARSTZ S OPT A3 R464 150 ND ADC for TEMP Sensor DPP6400 FLASH ROM Se A 3 3V aos 5V_NORMAL 5V_NORMAL dav A I p 4 m 4 IC11 A c E KA2903 3 3V E E Sx A KA2 903 2 PMDATA 0 15 EG C404 5 m When Power On j 0 1ug os C402 ox s a lt en R402 33 OUTI vec 5 TN 0 1ug F E m ell 0 1uF gy R_TEMP_COMP_OUT lt e od Ke 16v Ri RER Sas Toy ze ela Bibel a h i IC10 IN1 OUT2 Cas Zei O DPP6401 PMADR 0 20 R_NTC e D G_TEMP_COMP_OUT x PWRGOOD R409 33 m SS CD AMBIENT_TEMP_COMP_OUT Y 4 33 IN1 IN2 A PMDATA 15 RED_NTC_PWM
50. V 3 3V 1 5K e c801 0 1uF 1C804 A m 0 1uF Ti v KIA75S358F a o te Ce GND RB lt He R801 V 9 5 19 5V o p 20K GND RB ES 1803 A a UBW2012 121F ox D ER ue KEE ER See OSN A T n e AIS C847 P801 a E803 S 0 ems Je lu eo 1 JT n e IFE med TT 16v am 0 1uF 20037WR 08A00 p Fee 20037WR 08A00 50V E Sch 1 od o oH H a E eo D GND S ER oj wm al oj a D807 D ws do nb Zi el z 3 5 amp RB160M 40 ESE GND RB e x PN ac gt of a OV D me p S OVI NC 2 D A C339 aj louF iour R803 R808 VCC_RB R904 TE Sieg Ge R NTC CA 20K 27K A A GND CLP DH 3 3 G KMB054N40DA 1 188 R844 en PROUT ix e 13 o es De 0 10K ERN gus R843 C822 l 2 2uH R862 E x A 29 MAX16821 11 IT e e e e GND on e 0 4 7uF 0 001 36825 x DIEP IC81 DE MAX5054 3 3V 74LVC2G17GW s IC813 E A RETT R827 SEN NC_1 D801 D805 E AN s RB160M 40 RB160M 40 D on Eis CSP PGND 40V La am GND ik Big 15K e p 0810 on as C821 40V G KMB054N40DA eso V_ADJ_CH1 C C gt ADJ R c Le 4 7uF 5 200 BE 2 VDD OUTB REIS S el laS C835 ce3e C857 C858 VCC 7V RB al 4 8l18 a gt 5 6 C862 Zelter Ziou Z iout jour Diou iour ENS s P al a al a ls I 2200pf 10V 10V 10V lov Lov Vos 8 amp 818 E OUTA GND 2A V_ADJ_CH3 CD ADJ B VCC RB INB INB v BAN ES t e e e E e e e o GND RB 9 5 19 5V C818 V C839 INA INA Zo 4 7
51. a 4 10V 4 4 4 Hd fe KZ LO iO LO M TN M M M M e Q A be bel bel be e EN on LS jo AW ow aos A R12 oe 28 va SQ va zs wa za YA ay YA 4 7K oo Qa Qa Qa Qa e e O12 4 E E 4 o N N W N W N N oo z SBT2222A_AUK Ke co oo oo e e e e e H a a Q a i C E E H R13 Y 4 7K B Q11 e e e e SBT2222A AUK e R21 R25 R28 R31 620 3K 5 6K 13K e ig j3 T 1 16W 1 16W 1 16W 1 16W y R R R o o 9 9 Eh 3 6K 5 6K 13K SS 2 e ts e A 1 16W 1 16W 1 16W M 5 5 1 D11 D12 5 6V 5 6V SW 1 SW 3 SW1 4 SW15 SW16 SW1 7 SW18 JTP 1127WEM JTP 1127WEM JTP 1127WEM JTP 1127WEM JTP 1127WE JTP 1127WE JTP 1127WEM o 9 0 POWER MENU OK LEFT RIGHT DOWN UP Wafer POWER MENU THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE A SYMBOL MARK OF THE SCHEMETIC Copyright 2011 LG Electronics Inc All rights reserved Only for training and service purposes SECRET LGElectronics LG ELECTRONICS MODEL Hw3oo DRTE BLOCK kgypap SHEET zd e LGE Internal Use Only
52. a KTA75S358F VCC_G pile PAS e ur yv 2 R845 bes PS 16V 0 0 Ep Bn o D806 Lut 3 3V G_ST_N SC B S Bou RB160M 40 IL B G E qe 2 gt Ov 10826 as of g al o a 74LVC2G17GW 815 D E rela 8A IZ z e 5 o GND G pu x ao 0 nx al gt ei m Si of a D G NTC C luF Ei oo oc dc 28 R902 9817 C842 ri 3 3 G KMB054N40DA 9841 2h eee 1Y y OVI jour v 10uF V ADJ CH2 C gt ADJ G R818 S 25V 25v 27K GND G GND CLP VCC 1 16w o R823 gs nour 13 7 Den S CRP zan R859 6829 2x 22 MAX16821BATI 11 e e ee 9 e t G So 0 0 001 S DIFF LOSES Uus MAX5054 e E LA ON C IC818 GND R873 814 Lo OK F Er D803 D800 ES z 9 RMBOS4N40DA 0 1uF 10K R848 RE SA D Be c 2 0 e ET RBl60M 40 B om gt 16V CSP OV 0809 Y E fra 15K 9 ass S cha ov A G KMB054N40HA a 4 7uF AA LC831 c844 C846 C848 c855 C856 VDD OUTB SE S LOUE 1 0 UF Toe 1 0 U Ems 1 DuE 1 Du e 10uF VCC_7V_G ul l 91 Bl S al iov iov iov iov iov 10v o El El o El OUTA GND LC861 af ai aj E ZZ 22008F 50V L VCC_G R856 t INB INB c827 C825 INA INA d e bd gt gt TuF 2 20 pun lov V RE E N i E D NS V GND G GND G Differential Pair e LO LED PWR ko dun a Sua Te Te nr nr R881 e 33 gt wr 9801 B REDEN KTC5103D E B1 SELECT Ree VCC_RB ADJ R Lok 1C802 C812 IC801 KTA758358F 0 1uF NLASB3157DFT2G 16v GND RB VCC_RB EX C805 A R830 GND Zen 1uF ADJ B C 2802 OS 16
53. and Warm chromaticity diagram deviated more than 0 005 from the target Cool Fail White Balance Process Successful and Cool chromaticity diagram deviated more than 0 005 from the target Warm and Cool Fail White Balance Process Successful and both Warm can Cool chromaticity diagrams deviated more than 0 005 from the target 4 For verification of White Balance adjustment results press ADJ Key and enter 4 DDP Manual CCA Fig 10 3 2 Manual CCA CCA Enable E Off Color Teap 4 Cool CCA Pattern 4 White Measured X Y 00 00 00 00 EZ ADJUST zn do 0 PCM EDID D L 00 D 1 AC3 EDID D L Target X Y 2 ADC Calibration 00 00 a8 eee RI es 00 5 Gei LED eee CTRL 6 DDP OPTIC CHECK 7 DDP DMD CHECK 00 8 DDP TEST PATTERN 00 9 MAC ADDRESS D L 00 Fig 10 3 2 Selection Category on INSTART Menu Left Fig 10 3 3 Menu after entering Manual CCA Right 00 00 5 Read the coordinate of CL200 changing the Color Temp Mode to Medium COOL Warm for checking the Spec of each mode Warm Mode x 0 313 0 004 y 0 326 0 004 Cool Mode x 0 283 0 004 y 0 297 0 004 If it goes over the deviation boundary with the value of 0 005 it has no problem During Auto CCA it becomes OK only when it comes within the above deviation boundary Afterwards if it goes out of the boundary a little bit when it is checked with a manual CCA it can be judged as a deviation due to meter environment
54. e 1 E ILIDI ILI I von e cee2 C663 CcC695 C696 E Il T me eben Serge EN gt 0 1uF 4700F 470pF 0 1uF 6 n 20 fal o RANE Ser 9 p EAN60992101 VO VO VO VO VO qe Wi M e ojlo ol o gt d J V Place Caps close to DRAM pin Place Caps close to DRAM pin DER VTT fe N A A DDR_VTT DDRO1_A 0 3 DDRO1_A 0 3 DDRO1_A 7 13 DDR01_RASb DDR_VTT DDR61 A 121 A R612 10K DDRO1_A 7 13 ORO SEC e C691 R8220 DATA 0 1uF 0 POWER_ON OFF1 DDR1_A 4 6 DDR01_RASb e DDRO1 A 0 P DDR01 A 2 e DDRO A 6 75 e IC602 DDRO1 A 0 e DDRO1_A 3 AR611 i C623 ce6e25 C626 C627 BD35331F E2 DDR1_A 6 75 DDRO1_A 1 22uF 10uF 0 10 R0 iur AR607 e gt GE Je 6 3V DDR01_CASb DDRO1_A 10 1u GND VTT 20 13 DDR01_BA1 T5 DDRO1 A 12 R611 75 ss 3 3V_NORMAL e DDRO1 A 12 T d L603 DDRO1_A 9 E a cIs21J121 HUEL ALZ C690 DDRO VREFO DDR1 VREFO EN VTT I DDR01_A 7 e DDRO1_A 7 0 1uF a e A vy DDR1_A 5 75 e DDR0_A 5 75 e i DDR1_A 4 AR608 AR613 VTTS vcc z e DDRO_A 4 o R8221 e e DDROI A 11 e DDRO1 A 11 e C692 0 DDRO1_A 8 0 1uF VREF 0 180 Vppo R613 B e DDRO1 AIS R8222 4 e DDR01 A 13 DDRO1 A 13 75 e 0 DDRO1_A 3 AR606 AR614 e 220 e DDRO1_BAO e e EAN52430901 DDRO1 A e DDR01_BA2 C693 DDRO1_A 10 4 DDRO1_WEb Ee aces C621 C622 C624 L C645 C646 C647 DDR01_BA 75 003 B1 003 D2 003 D4 003 D7pORGtFeKHO 75 m0 iur 0 1uF ZCZO 1uF 0 1uF ce28 TT 10uF
55. ector Fig 7 2 1 4 Select START Fig 7 2 4 5 When the adjustment is completed Success message is displayed and if it fails Fail message is displayed 6 While Success message is displayed release the connection of USB cable and press OK or EXIT to make the message disappear 7 When exiting from Fig 7 2 4 state press ADJ or EXIT of the adjustment remote controller again to exit 8 To verify the adjustment result enter ADC Calibration or IN START and verify Fig 7 2 3 Fig 7 2 4 Copyright 2011 LG Electronics Inc All right reserved 8 Only for training and service purposes EZ ADJUST PCM EDID D L AC3 EDID D L ADC Calibration ADC Comp 480i ADC Comp 1080p ADC RGB DDP AUTO CCA DDP MANUAL CCA DDP LED CURRENT CTRL DDP OPTIC CHECK DDP DMD CHECK DDP TEST PATTERN MAC ADDRESS D L 3 4 5 6 7 8 9 Fig 7 2 3 Adjustment Menu when ADJ is selected Left Fig 7 2 4 Selection Category on ADJ Adjustment Menu Right 8 MAC Address Download 8 1 Used Device Adjustment remote control Play file keydownload exe Interface Board 1EA RS232C cable USB Cable 1EA 8 2 Adjustment Setting 1 Connect PC and Interface Board with RS232C Cable and connect to the Set using USB Cable Fig 8 3 1 2 Activate Play file keydownload exe and select MAC_Only for INI File NAME Fig 8 3 2 Fig 8 3 3 8 3 Adjustment Method
56. ectronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only P21 0500HR 06N2 G LEZ KSM 503M2O_B e e Q N 791 C K THE N SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR IHE CRITICAL COMPONENTS EN THE N OYMBOL MARK OF THE SCHEMETIC MODEL ws300 DATE LG ELECTRONICS BLOCK re ISHEET Y Copyright 2011 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only Pil 0500HR 10N2 G COLE TOOL 013 RTRO30P02 A e GE e R17 E E GEI nos A 10K Lo Lo Lo cm COT wies dd xN oo mM od m LO ci ON x oo luF AMS cop N XS N oe MMS N dp MMS dp A HS o 22uF 16V LO ce dw vi D ei vi iu A MA dw ci D cl dw v
57. ge the video of the projector to Green Pattern After 2 3 seconds Green Color Coordinate Table Data is transmitted from CL200 In the Result Display Window at right center of the screen the coordinate of the Green color and the brightness are displayed 8 Press Next button on the screen 1 141 027 1 ES Fig 11 1 7 9 Screen status indication line Chromaticity Measurement Blue Color Purity Inspection changes to Blue Color Purity Inspection The color of the inspection boundary at top right of the screen changes to Blue 10 Press the direction key of the adjustment remote controller to change the video of the projector to Blue Pattern After 2 3 seconds Blue Color Coordinate Table Data is transmitted from CL200 In the Result Display Window at right center of the screen the coordinate of the Blue color and the brightness are displayed 11 Press Finish button on the screen 4 White Brightness Inspection Verify if it is at least HW300 Brightness Min Spec 210 ANSI Im Type 255 ANSI Im LGE Internal Use Only 12 TV Performance Inspection Reference 1 EDID Data 1 Channel Scan 1 RGB BLOCK 0 1 Connect the signal to RF Jack 0 1 2 3 4 5 6 7 8 9 ABCDEF 2 Select TV by pressing Input on the remote control 3 Inspect the channels by carrying out auto scan by 00 FF FF FF FF FF FF 00 1E 6D C7 36 01 01 01 01 selecting Menu Channel Auto Channel 01 15 01 03 68 73 41 78 O
58. he maximum Copyright O 2011 LG Electronics Inc All right reserved Only for training and service purposes 1 Up and Down Adjustment Before the adjustment first adjust the screws to be adequately tightened 1 Turn screw A up down adjustment to the right and mark where the image is aligned 2 Turn screw A up down adjustment to the left and mark where the image is aligned 3 Turn screw A up down adjustment to the right left and mark where the image is aligned Fix the adjustment screw in position Step 1 Step 2 Step 3 Fig 4 1 1 Illuminator Up Down Adjustment Sequence 2 Left and Right Adjustment 1 Before the adjustment first adjust the screws to be adequately tightened 1 Turn screw B Left Right adjustment to the right and mark where the image is aligned 2 Turn screw B Left Right adjustment to the left and mark where the image is aligned 3 Turn screw B Left Right adjustment to the right left and mark where the image is aligned Fix the adjustment screw in position Step 1 Step 2 Step 3 Fig 4 1 2 Illuminator Left Right Adjustment Sequence 1 3 Left and Right Adjustment 2 Before the adjustment first adjust the screws to be adequately tightened 1 Turn screw C up down adjustment to the right and mark where the image is aligned 2 Turn screw C up down adjustment to the left and mark where the image is aligned 3 Turn screw C up down adjustment to the r
59. ht 2011 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 8 Trouble shooting No audio out Digital TV audio Check RF Cable amp Signal Check Tuner 3 3V Power Main L513 iaa Check Main IC502 Replace IC502 Check Tuner 1 8V Power Main L515 Check IC503 Replace IC503 Bad Tuner Replace Tuner IC501 Check TU_SIF path No Including Q803 TR buffer H E ok Follow procedure 8 All source audio trouble shooting guide Copyright 2011 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 9 Trouble shooting No audio out Analog TV audio Check RF Cable amp Signal Check Tuner 3 3V Power Main L513 Check Tuner 1 8V Power Main L515 Follow procedure All source audio trouble shooting guide Check Main IC502 Replace IC502 3 Check IC503 Replace IC503 Bad Tuner Replace Tuner IC501 Copyright 2011 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only 10 Trouble shooting No audio out Head phone all audio source Check Volume level whether 0 level or not ok Check Audio mute on off Check Head phone Cable for damage or open conductor No Check Earphone output No Check JK1501 Replace or rework IC1501 Main B D JK1501 Pin 1 4 ok Replace or rework R1514 R1515 C1505 C1511 Replace JK1501 Cop
60. ight left and mark where the image is aligned Fix the adjustment screw in position Step 1 Step 2 Step 3 Fig 4 1 3 Illuminator Left Right Adjustment Sequence 2 LGE Internal Use Only 4 Final Adjustment Repeat the adjustments of 1 2 and 3 2 times and verify with a driver if the lights are adjusted in the direction of the screws being tightened to the maximum Also find the optimal position of the lights and visually verify if there is any part missing the light system find the light position with the highest brightness of the light system measure the brightness of the light system CL 200 and fix the adjustment screws of the light system after foreign object inspection focus line width measurement category refer to the picture inspection and Focus Stopper position inspection 4 2 Illuminator Phenomenon Adjustment Adjustment part Up down screw A left right screw B left right screw C Copyright 2011 LG Electronics Inc All right reserved Screw direction Right tighten direction Left loosen direction Right tighten direction Left loosen direction Right tighten direction Left loosen direction Screen state Initial state State after adjusting Only for training and service purposes Description At first upside illuminator goes down and right illuminator also goes down in detail At first downside illuminator goes down and left illuminator al
61. l slm ol sl el ol als aere ae lle o 5 v ajo jaja jo a zlala z lals E Ja 9g eee 5 gt gt gt e fa E 3 Ed 5V NORMAL g g M 2 t t Audio_5V A e N A tisi LES El LES BLM18AG151SN1D 44 J 44 e JT P1500 e do 12507WR 04L Sb 2 lt IC1501 Ke DES Oy I o du TPA6011A4PWPRG4 4 x o aq R512 0 luF MS 5V NORMAL esse TERNS Y PEND_1 ROUT lt SE BTL c539 1 16 e 0 1uF 5 L1501 TD BLM18AG151SN1D OUT SE BTL B y c1504 0 47uF Ne Be S c1515 cisi H R1504 a L802 TY ue are PVDD_1 HP LINE SCH Pre BG1608B501F i 16v 6 3V C15 9p our e e e e Fees versed I 5V_NORMAL CS4344 CZZR S RHPIN VOLUME l0uF a i RIS so EI c805 35 m3 Close to BCM for EMI oo m do e 10uF o o 3 C1512 a oo eo oo 9 co C1518 R1516 gt nw o moe O ES 6 3V E oo SDIN AOUTR 470 156 RLINEIN SEDIFF re ll f E C1520 T DEM SCLK 500pr RIN SEMAX ae M BCM3549 VIDEO S3 sovg apps E EP DET E OPT gt p R528 a 680 5V_NORMAL PRES T S m c1504 0 dur von AGND ox y e LAN T R1517 Sra Audio_5V T 151 Re aouTL C1519 470 ds an LIN BYPASS 0 47uF A D SE 12s AUD_F 1 cLK T 20 R929 IC900 4 Ture Xo E I B t Gu NORMAL R529 510 ee 1500pF SE BTL CO m zi 80 10 E Te C151Q luF LLINEIN FADE Q D907 d LGEB549XS LGE3549XS P22 B2 version z T 1509 or 6 94
62. mstance of 25 C 5 C of temperature and 65 10 of relative humidity 4 For the adjustment the receptor s input voltage shall be maintained at 220 V 60 Hz 5 The set must be on for 5 minutes prior to any adjustment After receiving possible 100 White Pattern it is ready for adjustment If it is inevitable it can be regardless of the signal 3 Composition of Adjustment Mode 1 Select Default Mode for input source 2 The adjustment mode can be entered by pressing ADJ key of the adjustment remote controller and it also exits by pressing EXIT key 3 Preparation for Adjustment 4 Power is connected in set to be power on 5 Do heat run 5minutes 4 Folding Mirror Adjustment 4 1 Illuminator Adjustment Sequence Up and Down Adjustment a A el e Left and Right Adjustment Fig 4 1 Check location of the bottom side of the folding mirror After putting the optical engine on the jig check whether the mirror part is fixated vertically At this time the screen size should be based on 40 With the screen in full white condition look at the change in screen and brightness of the illuminator to make appropriate adjustments During the adjustment of the lights adjust for the screws at the three locations to be fully tight After they were adjusted if they became loose and changed tighten the screws at the three locations and complete the adjustment of the lights when they are tightened to t
63. n 1up DMD_DAD_BUS zs 159 DPP6401 25V DM SAG GLE m 0 047uF SWI LE Sen mm a EEN JTP 1127WEM wis R403 33 B19 pig DOWN_ENZ Y19 GPTO_15 GPIO_19 powN_ENz SDA AA20 2 5V Dun REF 2 5V 404 M3 C18 4 i 1202 UN DMD REF 2 5V IICO_ GPIO 18 ERIS 33 DO USB ENZ Les BLM18PG121SN1D A M2 EPA W22 ave Address 2 EN So D RA7144A 33 33 D15 R 1 scr3_3 3v GPIO 08 PWM OUT1 GPIO_O1 CO FAN1 U19 C220 C221 BA72 5 A 33 A17 Rog cde v22 0 luF 10uF SDA3_3 3v C GPIO_09 PWM OUT2 GPIO_02 A p D FAN2 LT 16v 6 3V DMD_REF_1 9V iy U21 epro_07 Lg Rae FAN1_TACH IC10 GPIO_06 2127 u IT FAN2_TACH foe e DPP6401 e S 5 SS II soa 4 T19 DMD_D 12 GPIO_05 Ei a E is T aen e T20 DMD_DI14 L TE TS T21 DH BWKOEN DMD_PWR_EN DMD_DIIT 37 z 2 R22 A DMD_D120 epro_32 Fo GPIO_31 R21 fans DMD_TRC DMD_TRC P1_C E R20 FN DMD_D 23 3 3V_NORMAL P1_C_6 R19 LR DMD_SCTRL DMD_SCTRL c16 R421 1 5K X B9 DMD TRC G T RED NTC PWM p22 DMD LOADB RE DMD_LOADB DMD_D 22 BWM QUT A GE LOWS Suec Razo KEK gt p21 P2 lt 8 g PWM OUT3 GPIO_03 D GRN_NTC_PWM puc DMD DCLK DND DCLK wis C15 4 E PlA CLK DMD_LOADB ww outo epro_oo Raza S C AMBIENT NTC PWM P1B_CLK DMD_DCLK GPIO 23 fal ME A DMD_D23 DMD_D 21 e A t B DMD D22 DMD_D 13 N21 E V ADJ CH3 C Gro 22 keng Do R_TEMP_COMP_OUT Eee al acl P1_FIELD _TEMP_ S GPIO_28 AA16 z DMD_D20 DMD_D 18 F20 x zl 5 Pl DATEN Ss DMD_D 16 G_TEMP_COMP_OUT GPIO_29
64. rection key to get in EDID Download adjustment menu Fig 6 2 1 3 Select START 4 When adjustment is completed check RGB OK PCM HDMI1 OK PCM Fig 6 2 2 When it fails Reset and check by trying the 3 process again 5 To exit press ADJ or EXIT of the adjustment remote controller again to exit 6 To verify the adjustment result enter PCM EDID D L or IN START and verify PCM EDID D L OK PCM OK PCM Reset Fig 6 2 1 Adjustment Menu when ADJ is selected Left Fig 6 2 2 Selection Category on ADJ Adjustment Menu Right LGE Internal Use Only 7 ADC Adjustment 7 1 Used Device Adjustment remote control Master equipment MSPG 925FA RS232C Interface Board 1EA RS232C Cable 1EA USB Cable 1EA component cable 1EA component to jack cable 1EA RGB PC cable 1EA 7 2 Adjustment Method The installation for the adjustment is as follows Before the adjustment compose the remaining connections except USB cable MSPG 925FA En Component to jack Projector Fig 7 2 1 Device Setting Diagram Adjust Spec PattemNo ModeNo Resolution ADC Comp tosop 225 1920 1080 60p ADCRGB 126 1920 1080 60p Fig 7 2 2 Pattern No 65 Image 1 Enter to adjustment mode with selecting ADJ on remote control 2 Enter to 2 ADC CALIBRATION with pressing right direction key to get in ADC adjustment menu 3 Connect USB cable to the Proj
65. resina Replace Q803 Q804 ok Replace BCM IC10 or Main Board Copyright O 2011 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 3 Trouble shooting No video Analog TV video Check RF Cable amp Signal Check Tuner 3 3V Power Main L513 No A Check Main IC502 Replace IC502 No et Check IC503 Replace IC503 No mt Bad Tuner Replace Tuner No esesscscasssscosscoossescccooccecnos Check R921 R923 NO ee gt Replace C891 Check Tuner 1 8V Power Main L515 Check IF_P N Signal Main R526 R529 Check IF_P N Signal Main R530 R531 Replace BCM 10 or Main Board Copyright 2011 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 4 Trouble shooting No video AV Check input signal format Is it supported Check AV Cable for damage for damage or open conductor Check BCM Out signal line or DPP6401 Signal line With internal pattern Check JK902 CVBS Signal Line 1 R904 C903 1 Resolder R904 C903 Check CVBS DET Signal 1 R911 1 Replace R91 1 ok Replace BCM3549 IC10 or Main Board Copyright 2011 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 5 Trouble shooting No video RGB PC Component Check input signal format Is it supported ok Check RGB Cable conductor
66. rom accidents resulting in personal injury from electrical shocks It will also protect the receiver and it s components from being damaged by accidental shorts of the circuitary that may be inadvertently introduced during the service operation If any fuse or Fusible Resistor in this monitor is blown replace it with the specified When replacing a high wattage resistor Oxide Metal Film Resistor over 1W keep the resistor 10mm away from PCB Keep wires away from high voltage or high temperature parts Due to high vacuum and large surface area of picture tube extreme care should be used in handling the Picture Tube Do not lift the Picture tube by it s Neck Leakage Current Cold Check Antenna Cold Check With the instrument AC plug removed from AC source connect an electrical jumper across the two AC plug prongs Place the AC switch in the on positioin connect one lead of ohm meter to the AC plug prongs tied together and touch other ohm meter lead in turn to each exposed metallic parts such as antenna terminals phone jacks etc If the exposed metallic part has a return path to the chassis the measured resistance should be between 1MQ and 5 2MQ When the exposed metal has no return path to the chassis the reading must be infinite An other abnormality exists that must be corrected before the receiver is returned to the customer Copyright 2011 LG Electronics Inc All right reserved Only for training and service purpo
67. s Heg UK si 0 4 LOL 600221 JIPTBEnEId y asn i ee ee ee eom eomm eod san LGE Internal Use Only 13 Copyright 2011 LG Electronics Inc All right reserved Only for training and service purposes Pease refer to the work order standard for detail product disassembly assembly EXPLODED VIEW IMPORTANT SAFETY NOTICE Many electrical and mechanical parts in this chassis have special safety related characteristics These parts are identified by in the Schematic Diagram and EXPLODED VIEW It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X RADIATION Shock Fire or other Hazards Do not modify the original design without permission of manufacturer LGE Internal Use Only 14 Copyright 2011 LG Electronics Inc All right reserved Only for training and service purposes
68. s for damage or open conductor ok Check Mstar Out signal line or DPP6401 Signal line With internal pattern ok N Check EDID LL Ti H TT Re download EDID data LUNO a Re solder R1426 R1428 Replace 1C1402 No gt Replace P901 2 Replace P901 Replace BCM3549 IC10 or Main Board Copyright 2011 LG Electronics Inc All rights reserved Only for training and service purposes LGE Internal Use Only 6 Trouble shooting No video HDMI Check input signal format IS it supported Check HDMI Cable conductors for damage or open conductor NO sr este es Download EDID NO gt Replace Jack1 401 Check HDMI_DET HPD NO Replace R993 bam R993 R1403 Replace R993 R1403 Check HDMI Signal output Check resister R993 964 999 988 930 No Main R993 964 999 988 930 If no problem check signal line Re CREER er Replace BCM IC10 or Main Board Copyright 2011 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 7 Trouble shooting No Audio out Speaker all audio source Check state of audio mute on off Check Headphone output re Y9a gt Replace P1500 No gt Check 1 500 Check BCM Audio Output 3 Repl 1507 C1509 Check Output Signal R1508 R1510 2 Replace R1508 R1511 gt Re solder Pin5 9 Replace 101501 Check speaker resistance i St BE and connector damage eplace SD Copyrig
69. ses rer Leakage Current Hot Check See below Figure Plug the AC cord directly into the AC outlet Do not use a line Isolation Transformer during this check Connect 1 5K 10watt resistor in parallel with a 0 15uF capacitor between a known good earth ground Water Pipe Conduit etc and the exposed metallic parts Measure the AC voltage across the resistor using AC voltmeter with 1000 ohms volt or more sensitivity Reverse plug the AC cord into the AC outlet and repeat AC voltage measurements for each esposed metallic part Any voltage measured must not exceed 0 75 volt RMS which is corresponds to 3 5mA In case any measurement is out of the limits sepcified there is possibility of shock hazard and the set must be checked and repaired before it is returned to the customer Leakage Current Hot Check circuit AC Volt meter Good Earth Ground such as WATER PIPE To Instrument s CONDUIT etc exposed METALLIC PARTS 1 5 Kohm 10W LGE Internal Use Only SPECIFICATION NOTE Specifications and others are subject to change without notice for improvement 1 Application range This specification is applied all of the DLP Projector FM12A chassis 2 Requirement for Test Each part is tested as below without special appointment 1 Temperature 25 C 5 C CST 40 C 2 C 2 Relative Humidity 65 96 10 3 Power Voltage Standard input voltage 100 V 240 V 50 Hz 60 Hz Standard Voltage of
70. so goes down At first left illuminator goes down and downside illuminator also goes down At first right illuminator goes down and upside illuminator also goes down At first left illuminator goes down and downside illuminator also goes down At first right illuminator goes down and upside illuminator also goes down LGE Internal Use Only 4 3 Focus test method and subject Test pattern Resolution Pattern White Cross Hatch Pattern Tools Focus width measurement ruler 1 Focus adjustment method 1 Set the projection distance of Engine as 1200 mm 40 Inch screen 2 Pop up the Resolution Pattern among the Test Patterns of Set and fix the Focus on the part where the Resolution Pattern is classified on each part of screen all parts Balancing 3 Popup the White Cross Hatch Pattern and measure the width of each Point 4 Focus judging standard 3 5 mm or less Fig 4 3 Resolution Pattern 4 4 Focus Stopper Location Verification Verification corresponding to screen inch 1 Test pattern White cross hatch 2 Visually verify focus after locating a white board 586 mm from the projection lens so that screen is set to 20 inches 3 Inspect the location of the stopper after locating a white board 1200 mm from the projection lens so that screen is set to 40 inches 4 Evaluation criteria for stopper location Non defective Bushing shall be located within A marking Fig 4 4 Fig 4 4
71. u GND RB Zo iuf D808 D809 EG 19V 1N4148W DIODES 1N4148W DIODES e P804 gt gt 05004HR 20B018 100V 100v V 3 3V GND RB N L SENSE S hd R826 LT GND 15K Lis n n 5 A a g Differential Pair o G E D C816 D LD v ADJ CH1 0802 0 47uF 25V SBT2222A_AUK gt GRN EN gt LED PWR G NTC IC816 a OCPL 063H fa VCC_RB a L v_ADJ_CH2 A IC819 9 5 19 5V R885 ANODE1 MAX5054 VCC RB LD v ADJ CH3 RED EN 330 LS QUE CATHODE1 T2 INA SI4925BDY Os A S gt RED EN L13 L805 UBW2012 121F UBW2012 121F CATHODE2 INB AIS e D CD BLU EN D SC R886 0813 UBW2012 121F GND ANODE2 OUTA G KMB054N40DA R_NTC aves 6854 BLU EN La Wi hd C864 C852 ce53 Ioue iour 330 VCC_7V_RB S B NTC i0ur 2 10uF 10ur rt 9u 12507WR 06L DAS A cuts gt u 25v 25v GND R SV 25V 25V 25v P805 3N JPD003N N532 4F Las Lea E DEE o0 1uF Be 50V 50V 4 2 2uF D GND 10V 0815 K Pet KMBO54N40DA k GND RB 8 SENSE C 1 a o GND lt DC JACK gt LE GND RB THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X RADIATION FILRE AND ELECTRICAL SHOCK HAZARDS WHEN SERVICING IF IS SECRET ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE N SYMBOL MARK OF THE SCHEMETIC MODEL uxsoo se LG ELELTRONILS BLULK LGElectronics LED Driver Copyright 2011 LG Electronics Inc All rights reserved
72. yright 2011 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 11 Trouble shooting USB connection error Check USB 2 0 Cable Check USB device If device is 2 5 inch HDD Check power adaptor Ok Y Check USB jack N JK1401 Replace Jack OK d Check 5V voltage level at Bead or Jack YN gt Replace or rework L911 and IC1401 Pin1 OK Check IC 1401 Pin4 high Y gt Replace IC1401 OK 4 Maybe BCM3549 IC10 has problems Replace It Exception USB power could be disabled by inrushing current In this case remove the device and try to reboot the TV AC power off on Copyright 2011 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes 12 Trouble shooting SW download The latest S W put in the LG DTV folder of USB Memory USB connects to USB jack If SW update screen appears push the OK button The SW update is finished please check new SW version by in start menu Copyright 2011 LG Electronics Inc All rights reserved LGE Internal Use Only Only for training and service purposes

DLP PROJECTOR SERVICE MANUAL

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