Service Manual
Contents
1. u sore perit sam VIDEO OUTPUT TABLE Ven vecsa vecas n gt SVOE TRST CVS TA gen nnn a SEN a se m Qm mm gt T 5 Haat Geng Openg OPen k SEI gt seo SE dee cor 10006 7501 L1 x H m 92 VI Vee n RFGND 22 ws m od 5860 881 gt 16 m 5 sean ET AR m Qu Qm Qm QR Lat 000 n 3 SE RRT 9 9 474 m A Ed 102 3 oE 3 2 paz ER m IS 1 7 xj op DE icon GND GND ein pas HE SCH RFO 1 CDACT lar Dar a smog C ceel DAE s E d2. D 2 JP ENJANSBBBS mes bs cet ne Dm 2 010 dre 553 ccas RRS 805 opam lt TRACKI Mio opan 1000 cose RFO 2 VINSL J cer BS RESOV 2 RFGND I I de Sot co Fee opin L em 8 A SPINDLE UU BBR AOPEN RR N SS REV PREGND id 3 943 R GND pe NI BRAS sie x m A TRACK 2ae2uegezagesan gt voor ven mm SES 3 a 9 gt FOCUS vom optour 2 Ma ver paoa eg m NH Naa ss SCH 2 vorre Eod Sata SSE sen LOADJDCMO we eno HE DVDRIN spara HZ DATA DATA 2 voste volv E prem E m 2 EE GE 41 jr com zen vou mn HE
3. 12VA d Q un q 4558 1 Resour UN onm mn four 77 9 7 o a took zer zer A 4 Ai 1 e H m soe ee Ge E uc Ht Som our poo lt 7 77 R173 GNDA 2 Hee 22 2 77 s NDA DAW ca E woor Jf X M d S GNDA hue res Er 100K vocas X 1 n Quer mo uk Um Pt po cas 777 Rt02 77 4558 GNDA t 1 Lo bin cso w Q 1 LC OUT 1 805 1 899 sug 100K o IC R99 d Ki 14 O OHM 1 ERN 98 3 9 8 253906 di E pH aak kasa aran i war 4 rd con one Rios UK 1009 NK S PIAN 77 57 4 BVA 77 BEIM NDA GND 1000PF acte NDA 77 css Rus NDA 10 i m s gt 16 Ny css css 5 owe Larl vor D GNDA R107 M
4. vgen voca De emphasis OFF us A1132 ug veca Ari mene meinn voo 4 mm ap pos em voo a L um alar P nou TECK THE deck vom S AGND2 TWS 32 12 tous s 1500 DN von A Al MM so router amp i IRAM SoNDMG 1 vous FORMAT at MUTE GR2 normal_intlev k wes DEEMPH i uem MUTE vour WE OUTOR 2 D AOUTIR pven TH ZERO ZERO CAP 76901 T Y is Tour ZERO ws 1 AVOM OUTIL m CAP xw Ben 155 1 ant 777 DIN 1501 Reo A STON DNO H L MODE 7802 DN2 OUT2R 2 gt acuraR ve Le Treur vegga vee VgcA gv vegas us k vw ogg vegas vaer e wm AN 1C 441 AGND HL 19 2B F3 0805 I x 5VA 4 GNDA ka 58 L w rn u 8 E 18i FB 8191 330HM sw IB mo SEN TIS C EB 1208 5 5 5 99 jte RI ed GE Biel STANDBY HEERS MC gt gt pe KARR tege 92 MER
5. RECRb2 0 TRCR b TRCR2 b6 4 DPD COMP HYS ON dui DPD EQ Mir Defect Comp ATT 25 MRCR b6 4 CONTROL corus SIR oop rate n 5 ort Mi Coma eren De ATT Level COR 5 TOP HLD H gt __ Dual APC 5 V33 for Output but BTMHLD Bim clamp Ven E LL DVD Servo IC ES6603 Block Diagram 10 CIRCUIT OPERATIONAL DESCRIPTION ES6603 PHOTO DETECTOR AND LASER POWER AFE CD DVD PICKUP FOCUS LOAD OPEN CLOSE SPINDLE ES6629 CD DVD TRACK DVD PROCESSOR 1 0 MOTOR DRIVER 56603 56629 Block Diagram 11 CIRCUIT OPERATIONAL DESCRIPTION 3 Flash Memory A29800UV 70 A29800TV 70 ATA49F8192AT HY29F800ABT 70 This stores every program required for the operation of DVD player and holds the data of OSD languages and LOGO and send them upon request from u COM This allows the update of firmware by CD R RW For DVD module Description The A29800UV 70 is a 5 0 volt only Flash memory organized as 1048 576 bytes of 8 bits or 524 288 words of 16 bits each The A29800UV 70 offers the
6. GVG Digital Technology LTD 3830 PANEL REV A1 2004 03 20 25 4 MICROPHONE BOARD SCHEMATIC DIAGRAM CIRCUIT DIAGRAM 4 1 2 U2A A c30 3 4558 4 7UF 16V 026 R26 1 1 2V0C 2 NN U2A B A LI 10uH 4558 ul 10UF 50V R25 33K 5 R21 10UF 16V T R27 cas K 7 IC m AN L 27 1000P E Er K 1000P C25 100P A20K MICI R24 100K RI2 D 029 47K 1 EN 4 7UF 16V 24 100P i d 4 c21 c20 R19 CNS 4P C19 10K RI une 16V 4 7UF 50V 12 223 10k L R20 100K NWN AAA R2 PT5299 Jk CS _ 3 3UF 50V 16 ANS ge 2 2 15 66 336 R5 10K c2 3 14 100UF 16V S 4 Gr R amp 27K w 1 ANN s AN 10K 12k B i de AAA 22UF 16V 2 R17 E 2 2K 7 10 RB ko cu 10k lt vec 103 1 egi c5 co s63 lcs D p 04K 563 M 223 cn 220UF 16V w ds ES 1 2VCC 092 be Seele VC af R3 10k 100uF 16 ou o 2 1 5 R14 47K A Bur 25v pr RIS 10K 0 03 c PNP 1015 Cp 10UF 16V NPN C1815 Title 5 S
7. vooss 9 wis AD 000 019 2 A Ar Bet een ye ae 588 vg We DEE gen Wen 004 Hr DES MAZ 001 DBP ME 5 pos 18 DEE MAS abd 083 5 pos Ge MAG 003 684 E MAS d bas open m pos i DE MS a bas Fic 55 R97 H 22 poto L 0610 _ MAT be 087 11 aka 0611 yA pon m MAg p Das Fe pas bare m hi bas 5 MAT 4 55 R124 DSCK R41 33 DSCK 0013 MATT 10 0010 Fag 0811 55 28 05069 ton pau m Baan Dan Fa EE OPEN DOES aL 0015 R157 10 0012 A 0813 DSCK 0013 Cas 0814 ck pou Pas 884 gt EB Liat D en RAS0 RAS R167 10 vec voca csu als vee Ad CASH 1 CAS vcca BASOH vcca DS ale Weca cas gt DOM R49 33 d CIE 909 159 3 4 Bus open 0989 S he sue pow Vesa vss vssa vec 40 vss Xu Nc VS i M vss Ne S 4 16 SDRAM 715 lt gt OPEN SDRAM 512KX16X2 9ns OPEN 32 64MBIT SDRAM ms 55 a6 zen OPEN GND vo MAT 214 Bar MA3 2 Daz 4 bas M Bes SS 5 9 I bas MAB a par LE M Bas 9 CS a Ao pam Ban ban d pare Ban ES Ll cke KH vec 4 RAS Veca CASE 18 cas vcca Veca gt DAM 141 vssa es
8. 7 Spindle Actuator Driver 4X Driver 6x Thermal Shut down Sled Actuator Driver 4X Driver 6x TRAY 13 VINFC OP2IN VINSL OP2OUT FWD VCCI VOTR VOTR VOSL VOSL VOFC Motor Drive IC 58655 Block Diagram CIRCUIT OPERATIONAL DESCRIPTION MPEG Decoder The signal read from DVD disc is output into the RF signal and Servo related signal through the RF IC and they are input into the MPEG decoder and processed the MPEG decoding and divided into video audio signal The video signal is output into the analog audio signal through the built in encoder block and also the audio signal into the audio DAC through the audio decoder block MPEG decoder consists of existing MPEG 2 decoder and single chip combined the digital signal processing part which is the core technology of DVD player with the Servo controller 1 DVD Servo And MPEG 2 MPEG 4 DIVX Decoder ES6629 The ES6629 Vibratto VI processor is a highly integrated single chip DVD solution that integrates read channel ECC Servo DSP MCU and MPEG 2 MPEG 4 DivX decoder that has a state of the art 480p 576p progressive scan video feature to provide brilliant and sharp flicker free video output to the display and with built in gamma correction and S PDIF input and output support The ES6629 performs audio video stream data
9. CE EE a d ra zm gt IC 470 T x H SENDE mum Avons DA mu Ton wa 2 oo x ios 3 Focus K FOCUS RZ Era rima gt SCH Ree S SEGN RER OPEN aer pm Tes 215 5 veer s BREN d Tes att EC uos 2 F XSSLEGN VDD Ovec20 TRACK x J x K l m ez 028 poze TARA TES WE N x 7 ston IL WE re am zua ia e d Ce LAD a caz c RET Eed 56 ar Pr mj 528 32 inr XSDATA 1 ER TAT B E DG gv Sal Fa Pu SE l Ma s 3 SVREF15 CC SVREEIS Sc Geeks zat R s BE Lex e ven us E Br DE T close eB XSSPDON LAS us 27 5 1 or Eo Us gu wo SOATA SERIA NEZ ass Voss ths pa Y 3 3 INSW XGPIO 9 LAG ET 10828 m ess pose 3 HoMESW 1 88 ba EE 58 2 s asa tas 22 ve gt pem E pop tat GH SERIAL EEPROM A Ree RS232 DET ENEN Xenon SER G a ga STANDBY A00 9 w so L vec Mv 284 EAUX02 n 3 IM RE SE nr 215 5 SCARTOTL3 SS n GND SDA 3 ZERO KC 38 vss Hie TATE x SS oss H
10. om 14 Krone en cr 750HM D GNDV EEN us SCART VS T Document Numbor MESS003 j A 24 CIRCUIT DIAGRAM 3 CONTROL BOARD SCHEMATIC DIAGRAM SENSOR 5 2208 eg Aler 2529 4 ANN ed e 2 100 RIO 56K VN tv sey E Le 3955595559 gt i He e 229598555 Sp Tur gt t0uF T AN 29888558855 1186 36 1 swi 33 8 gt Rat RAT EA gt 6966 Hie 10K 10K 10K 3 sws RDS Bi 30 JST20 6P ru 30 Zi 5 pour u 5519 29 12 1 6312 sc13 L28 13 V55 27 H 8 20 45 4 CS 9 1518 scii 25 E E 10 Eder as DATA Z _ 20123 Gs 71 or 10 PBf enisens le 52859228858 PS Pacer tartrate 2 SWI p 544 SE pem SW2 26 0 0 0 9 one SIE SW3 20 PIS 0 59 0 9 d 514 ies sw7 5 32 34 F VFDI o o VFD AC3 5V 1 I CM2 D2 eq ius ni 4
11. 8192 Tour 537 2 54MM 10PIN 827 828 eue 11 MOK 113 1 M atur ug en ER d VREF CAP aie Troour Ra Ou en E 57 77 7 Gon 010 Vie ww am GNOA GNDA GNDA GNDA 77 E VCC20 vec vec 1 24C01 1 vocas vec V6CC33 RESOV 86 89 B 812 B37 38 B39 1 FB 03UF AUF our 40UF 01UF pur D veo sum rv ts SESCH cca _ cat 57 x 3 L F exo Xo 8 E toounev 9 veces ES60x8 m E mra aw gt 84 E es ME gt s Bis gt 89 gt 820 82 822 sss 824 100UF 0 1UF nur Baue nur mr pur gue us Fe Fo x o nee e SDRAM ven vocas 0M132 5 WM8738 81 83 829 832 B33 B35 836 otur d T ao DA1196 DE Bas E est paus BE and Power 77 77 GNDA GNDA M655003 E 21 4 Audio filter and output CIRCUIT DIAGRAM
12. No ERE ere pan SE dm UT apa E i AUS wars E zo VI RESETE AT l C pe F 5535322552292232522240225 J A TH d i ve x nc ps STI z T mn KRESETE Ee 5 LU UL kLELLE BESET Ki pa BEE 3 EI 8255 gt 2 Ee 22 L SBBBBBBI SBB 2 5 II OVENUURTOR SOCKET L sry Rar 4 PIN EXTENSION FOR EMULATOR INTERFACE 4144 4 444 4444 44 1 vec B Iz E 2 E 3 m Gio HE p13 e FD DAT H Cs amp 3 H EN H DATA 54444 Edd SI T d SN SZ 9552 959295 BB CC7 C6 C7CC74 9 SY 5v Vibratto Il ES66x8 Ko Xo ZERE ZEER SEES 5558 2 90 MESS003 19 CIRCUIT DIAGRAM 2 ES6603 and motor drivers
13. dE Focus ale TRACK ONDING HE Be eas e SCH ovo Ft I Glen MM alvor 99 vore H Tracee Rrour Hi 5 Fe Lan FEI 2 86 c m 2 5 8 o SBAD 2 5 vas e 18 SVREF15 9 ERVE 14 90 vus EE CL Be RESO t iles mikt TP36 1 e DEFCT 2 SPDON ES MM BRS Sysvrerzi 2 B A Zammer 2 8 k 2 LNK TPIT Par L 95505858987 526 2 Hora unga 88892029582 5 2 x lt REGND mevo i SPON 5220 RESO Syr Dr PETEN MVCC 8898 10 mans eee hae pae m Fe Er ox CONT MRR 2 L ium 2 Focus EK ie srov a MUTE REL m BRA A CFCERR1 BAS TRACK REGNO anid oss viv mic ad 2 SVREFIS 98005 BEN vins CTKERRI A RRSO 3 E Geh get e 2 Y vins es E amp vost Y gt SPINDLE 2 gt Focus VNFFC PREGND 4 Lecces we d 1 AM al pem TRACK af wm Li p DE 2224 seg Pam PN 100 40V e LOAD DCMO Dune SUED vost von H GE s 2 LOADHDCMO K RID VOSL H 1000P M
14. ADVANTAGES OF THIS PRODUCT DVD VCD CD CD R CD RW MP3 PIC CD CD G playback function Integrated remote control Multiplex sound playback Progressive scan file playback function GUI Graphical User Interface OSD On Screen Display By using the DISPLAY button on the remote control information on the DVD VCD CD player and disc can be displayed on the TV screen Screensaver function DVD 3D sound 3D sound effect using 2 speakers Coaxial digital output PCM Dolby Digital DTS You can enjoy high level digital audio by connecting with amp embedded with Dolby Digital DTS decoder Built in Dolby Digital decoder Analog audio 5 1 channels output Composite video out 1 Slow Forward Reverse DVD playback Fast Forward Reverse playback Search of title chapter and time in DVD disc and search of track and time in VCD and CD Repeat playback title and chapter for DVD track and disc for VCD CD Repeat a defined period from A to B DVD Selective Play DVD VCD CD You can select and play the desired title chapter of DVD and track of Video CD Various languages OSD On Screen Display function DVD You can select and display OSD among various languages English French Spanish Parental Lock function DVD This function can prevent playback of software that may be unsuitable for children Multi Audio function DVD The audio soundtrack can be heard in up to 8 languages In the case of SVCD or VCD it d
15. LI vssa FLASHVCC Ms M vss vss a GND GND SST37VFO40 PLCC SDRAM 512KX16X2 ns FLASH amp SDRAM Document Number M ES 5 23 6 SCART CIRCUIT DIAGRAM res SCARIERIN 4 SCART R Riet pm R R183 X Yo 240 240 20 240 vec V0C06C R126 RATT RIT 240 240 240 240 ouer 9 FDAC C E 243906 R148 68 suproy ONDA vore 2N3906 SCARTFLIN 4 18 SERES vec 50 mie Rus Rus 240 240 20 20 zer 77 NDA S 2N3906 dir acc Ries pm VEO KSCART_CvBS SCARTCTLP ei rem RIS2 68 SCARTOH A K S CART van 15K ScARTCTLS 3904 Rize R180 Apo Ruso 240 240 240 240 Ris vee gt SCART cvas Ries mer RM2 an 240 240 240 240 23908 gisa 68 2 RIS 68 u 2408 oo 23808 D 2 750Hm mer Ser 2408 pac T COAG m YOACT 7 d on amer E RIS Riso Rus Rus 4 240 240 cs 248 amer 470PF el Sg CMV u 2404 J ps mo soer vm
16. RESET function The 1024 Kbytes of data are further divided into nineteen sectors for flexible sector erase capability The 8 bits of data appear on 1 07 while the addresses are input on A1 to A18 the 16 bits of data appear on l Oo l O 5 The A29800UV 70 is offered in 44 pin SOP and 48 Pin TSOP packages This device is designed to be programmed in system with the standard system 5 0 volt VCC supply Additional 12 0 volt VPP is not required for in system write or erase operations However the A29800UV 70 can also be programmed in standard EPROM programmers VO o VO 15 A 1 Sector Switches State Control Command Register Chip Enable Output Enable Data Latch Logic i VCC Detector Cell Matrix Address Latch A29800UV 70 Block Diagram 12 CIRCUIT OPERATIONAL DESCRIPTION 4 EEPROM S524C20D21 HT24LC02 This stores the information related to setup of DVD menus This can read and write the optional information such as OSD voice language option after function for subtitle etc the aspect or method of TV display video option like display function and audio screen saver parental function through the I C transmission method Description The S524C20D21serial EEPROM has a 2 048 bit 256 byte capacity supporting the standard I C bus serial interface It is fabricated using Samsung most advanced CMOS technology One of its major feature is a hardware based write protection circuit for the entire memory are
17. gt 100K e R108 R109 3 3K E 1 1 isor l SES 18K 99 LM p en 3 ce cer ceo T Sour SPDIF OUT J a ET 2 Tate Teg c n g rU GNDA 2 GNDA 1000PF 15 rh uisa SCART FR IN RS 5 V 5 3 ER R112 RHS 10K OPEN j 4 IL I KARR kj KARR i ic ADU 3 S IV ur M 100K 77 e ROA AVEK2_0 Nov E E zr 77 NDA uo Ge 1 R amp 1 jer SCART Go 3 RIZ3 18K 3 SYNC X H SCR LI FH R125 d G T SY esc NDA Ke NDA H SYNC DI Ss sc m SCART VGA SST SCART D s 47 20MM S oe ue SCARTFLIN E 458 gt R131 10K n 9 R430 e vec C C N EN tour tour 77 50 R135 MON GY d we Ra zer EN 77 8137 11K NDA Ris aak GNDA mE 7 2 DEN MM 086 1000 pee 150PF 3904 1 H3 NDA E udo Fiter and output Uus T Document Number M655003 M x lt Ens gt 22 5 Flash amp SDRAM CIRCUIT DIAGRAM
18. screws 7 Remove four screws FIG 1 33 INSTRUMENT DISASSEMBLY FRONT PANEL DISASSEMBLY DRemove three hooks Remove two hooks Simultaneously remove panel I 1 FIG 2 34 INSTRUMENT DISASSEMBLY DECODE BOARD DISASSEMBLY Remove two screws Remove decode board D POWER SUPPLY BOARD DISASSEMBLY Remove four screws Remove power supply board i 35 INSTRUMENT DISASSEMBLY E YUV OUTPUT BOARD DISASSEMBLY VIII gt Remove two screws Remove SCART output board D Remove one screw RE P Remove YUV output board F DVD LOADER DISASSEMBLY e Remove four 5CICVV5 Remove DVD loader 1 FIG 6 36 PARTSLIST Unit pcs 1 6VV 1 5 5 EE 1 6W 15K 5 Uru E econ raw oct VAW 1 5 al NE EL ie EEE 1 16w 5 0603 S 29 1 16w 75E 5 0603 5 5 2 5 34 1 16w470E 5 0603 1 16w 1 5 0603 reo 37 2 gt a ALATA 12 22 T T 5 2 23 gt gt gt Ss 2 2 ALO o T 20 C N N w ui IN JN foo gt PARTSLIST 9 R chip 1 16w4 7K 5 0603 12 11 11 11 2 I 2 3 4 5 PARTSLIST 77 10V 220UF 20 78 c Electro 16V 100UF 20 D5 79 c Electro 50V 3 3
19. 0x8x10mm sticker 250 90x70x0 5mmPVC sticker 251 146x64x0 5mmPVC sticker 252 RDV 750 5 1CH Rear panel PVC sheet sticker 256 GV DPA268 10 NO STANDBY 258 RDV 750 silver 259 RDV 750 ESS6629 55003 4 5700232 43
20. 641620HGT H IC AMS1117 ADJ SOT 223 lc G690L438TX2 SOT 23 lC 29800 70 AMIC 5V CC 5524 20021 5 0 5 lt DA1196H 50 28 lC ES6629 PQFP208 27MHz 27P HC 49 S 20 d d 3 3 13 13 3 3 3 2 3 4 1 1 1 Mi HRP UW Alalalalalalalalalalalalala LI gt v O Jo Jo Jo Jo Joa Joa Ja Ja IN N IN lw uo J Ja Ja Ja Jo JN TKR u1 lt LI 5 C e o c KS D PARTSLIST 41 PARTSLIST mone 2549 356 C fz52 dowie ena rm 133 20 6 t va ao a pin teed stm yelow tram _ MI zor recover dest EN HOP 1200W with bus 3830 MTK1379 Shinwa loader 268 1 prre Ls BTPW3 8 9 0mm je PARTSLIST 227 RDV 750 silver 1 4 228 RDV 750 silver 230 3816 Left new 3816 Right new 240 RDV 750 silver 2version 242 RDV 750 English Russian 243 10x10x3mm sticker EVI 244 10x10x8mm sticker EVI rigidity 50 245 Cushon 20 12 3mm sticker EVI rigidity 64 246 25x20x13mm sticker EVI rigidity 50 247 3816 Front leg 46 6 6 6 8mm sticker rigidity 64 248 3816 Back leg 15 5mm Thickness 3mm sticker rigidity 64 249 1
21. D BY A ars ARE CRITICAL Y FOR SAFET REPLACE ONLY WITH TYPE IDENTICAL TO THOSE IN THE ORIGINAL CIRCUIT OR SPECIFIED IN THE PARTLIST DO NOT DEGRADE THE SAFETY OF THE APPLIANCE THROUGH IMPROPER SERVICING 1 1 D7 GND L GVG TNY268M A 1074004 wo 12 oui 03A psv 5 2 DOO ps UF4004 Aan i 13 1001 03A 4 Do psv R 1N5822 LA TA IND 5v T5 loui TA GND p r 2 2 100V 2 H 2 R2 ESCH ONIPIN 1 4W 200V IM 25V 100u SOV Di 14004 F 16 Di2 10uH gt UF4004 1 242V a i 013 V Ren 2 F 22u 40 22u 400V ND R3 1 aV 1 4W 200V IN TBSV 1 CI ps 245401 4007 CON 6PIN 1 LM VI TNY268 D Y 220 wl 1 a Dis i MES 1 1 1 1 4 18 1 Vibratto ll 2 DECODE BOARD SCHEMATIC DIAGRAM CIRCUIT DIAGRAM
22. DCD CD DA Mp3 and WMA CIRCUIT OPERATIONAL DESCRIPTION DVD CD ES6603 Video RF Amp M TV Display 8 16 MB gt Audio DAC Speakers DRAM ES6629 AudioADC 4 Microphone In EEPROM Vibratto ll S PDIF KAN Receiver ROM Flash lt VFD Driver L VFD Panel Remote ES6629 Vibratto ll system Block Diagram TV Encoder SRAM ROM Interface RISC Display Processor OSD Subpicture 18 Cache Controller Serial Audio Interface Gateway Controller DVD Descrambler Transport Huffman Decoder Video Processor ATAPI Servo Servo Memory uController Controller DRAM Interface Servo DSP ES6629 Vibratto ll Block Diagram 8 CIRCUIT OPERATIONAL DESCRIPTION 2 DVD Servo AFE IC ES6603 The ES6603 is a high performance single chip analog front end AFE device that contains the servo functions RF attenuator automatic gain controller AGC and programmable equalizer filter for a DVD player system and dual auto laser power control circuit to support twin pickups or twin laser systems The ES6603 incorporates a bi directional serial port for accessing the programmable functions of
23. IZE A3 GV 3828 GV 3830 DW 6 DW 12 MIC REV 01 Date Friday march 12 2004 SHEET 1 OF 1 26 5 YUV BOARD SCHEMATIC DIAGRAM CIRCUIT DIAGRAM bs R10 vee 47K u18 8 6 1 100UF 16V 75ohm Le 3 j 1815 4 4 R1 B M 1 1500hm 2 4 7K C 4 AV8X2 3 v R5 4 7K M1 C2 100UF 16V Q2 75ohm I 01815 R2 R8 1500hm 4 7K V R6 4 7K R12 75ohm 100UF 16V 03 J c1815 R3 R8 150 1 V T 100UF 16V X MIX BOARD Document Number GV DV950 YUV Baisse 27 PCB CIRCUIT BOARD 2 DECODE BOARD CS P Ee SCH CH d 29 PCB CIRCUIT BOARD 3 CONTROL BOARD CN3 GV 3830 REV 02 2004 3 2 7 24 m 30 PCB CIRCUIT BOARD 5 YUV VIDEO OUTPUT BOARD RCA2 PCB CIRCUIT BOARD INSTRUMENT DISASSEMBLY Perform all disassembly procedures in the order presented When reassembling use the reverse procedure Make sure that all leads wiring are routed correctly when reassembling r COVER REMOVAL Remove two
24. L I GE Zeen IL 3 FOACT to on A CR ma iA DEFCT i Ovccasv Tata 13 SSES we zeen Zemmer 8 open open TAS pen DS BERE C E Image DREFT lt 40 e SERA ED EE DO Vea TAE voc em zx en mu TO CN au LCE 22 woe w LL x ov 88 840 HB SEH d 58222 23 gt BS SPEL 2 7 6 522 92 2 Ser be B ee Reser oN me RRO ALD mm d d m ssraavroso EEN OPEN CC18 4333 83333333333333 s RRI TESTAD I II af ata fo ai i ae d la i la ia ba la l ES Go EE EPE T EET ETE E TIT C EE EE F sem 7 Ge SEET deeg 487787 RT 9 182 Ke poze x 2 2222 27 Kaaa 25557255555 E MORE m Oa S e 999 M voss pu veso EE ANN Am es ps 82 incu RAS FLASHVCC 158 Ass 8 LU le 122 gt Rack t s 189 xsroo L I ED RSD v Ge boza bel B iiz XSETROPI tr ir m com mws H Has 54 dap PL ipo Si DOEK SCH epp REGNO Pu F TRE ipe m TATE Lao 1 Bd IX H r 265 xsvnEro voss An bar 44 t m A zm ix 8 4140 FX ios SVREFISRRB 168 L 102 A9 006
25. ND FOCUS 5 8859 wone BREN A 10805 TRACK MOND on 2 RS VASOS lt 5 Focuse TRACK vore REGND J 1 88 mmm RR52 mm cos axe 4 4 85500 D bp RRIS 1K RR64 2 2 4 D Q gt RRS ARID RRIS a OPEN openga 8050 80500 mes OPEN 150 PNE LOAD IDCMO KR HoMESw dies ng OPEN mee KEN Close 3 59 2 GND 4 M OPEN 5 S 15 AE oor 17 DCLOAD 1k 03 Meno OPEN 2015 10 2 SLED Katz TL3472 Ee 4 a Pins 2 154 52 TRIM 11PIN RFGND RRS 9 MA Koursw 2 Sec 4 N Doren 2 me MOND ES6603 and motor divers T Domen Number gt MESS003 us 7 20 3 Audio and Power CIRCUIT DIAGRAM 125 format 16 24bits auto detect
26. ReLsen Service Manual MODEL RDV 750 OC cC me pue OPO HES Qr Or Or Qe CONTENTS SPECIFICATIONS tense onde neen meden ene EIEN 2 ADVANTAGES OF THIS 3 CIRCUIT OPERATIONAL DESCRIPTION HH 4 VOLTAGE CART Ss 17 CIRCUIT DIAGRAM caer te menu rennen ete an a d saati v ttar Ene e Ped d 18 Re elle TN EEN 28 INSTRUMENT 5 5 lt 33 EE 37 Caution In this Manual some parts can be changed for improving SPECIFICATIONS Audio distortion noise lt 60 dB 1KHz Channel separation 285dB 1KHz Audio out Output level 2V analog audio Load impedance 10KQ Audio out Output level 0 5Vp p digital audio Load impedance 750 Output level 1Vp p pur Load impedance 750 imbalance negative polarity Output level 1Vp p S video out Chromaticity C 0 286Vp p Load impedance 750 Jack type 6 35mm microphone jack Microphone1 2 Maxi input level 10mv Load impedance 600ohm Power supply 100 240 50Hz 60Hz DVD Audio output standards Disc type Output Analogue Audio output 48 96KHz sampling 44 1KHz sampling 44 1KHz sampling Digital Audio output 48KHz sampling 44 1KHz sampling 44 1KHz sampling
27. UF 20 80 celectro 25V 10V 20 05______ LL 81 celeco 25V 2208 20 D5 S2 C 25 47 20 05_____ Po 50V 100UF 20 08 NE 16V 220UF 20 D6 105 C 86 c Electro 16V 100UF 20 D6 8 gt 400V 22UF 20 D16x22 88 22 50V 10 0603 C Chi 102 50V 10 0603 Electro o 90 chip 121 50v 10 0603 92 Chip 194 25V 10 0603 o 93 chip 471 50V 10 0603 94 c Chio 153 50V 10 0603 95 IC ch 333 50V 10 0603 103 50V 10 0603 10 10V 10 0603 68 50V 10 0603 472 50V 10 0603 473 50V 10 0603 222 50V 10 0603 682 50V 10 0603 224 10V 10 0603 152 50V 10 0603 e 161 50V 5 0603 EE 821 25V 5 0603 39 C C C N A C JO 5 5 PARTSLIST No Specification 15 Bead core Chip 0805 FB 116 Coil chip Daun 10 0805 11 1mH 200mA 118 PowerTrans GVG TNY268M A 119 UF4004 I0 I0 121 Dio 1N4007 122 Dio 1N5817 D de de de de D D D D D 123 Diode Zener 5 ev 1 2VV 124 Diode Zener Bay 1 2W 125 Diode Zener 3 3 1 2W 126 Blue high bright b3mm 127 Diode Schottky SR260 2 60 128 545 SOT 23 129 TR C1815 B 100 300 130 TR 25A1015 C1815 B 70 700 2 3906 50123 5 TR Chip 9014 50723 6 TRChip 2581132 507 89 38 C 5299 lt F4558N DP 145585 SOP lC ES6603 TQFP64 lt HY57V
28. a Hardware based write protection is controlled by the state of the write protect WP pin Using one page write mode you can load up to 16 bytes of data into the EEPROM in a single write operation Another significant feature of the 524C20D21is its support for fast mode and standard mode Start Stop HV Generation Logic Timing Control P conrollogic EEPROM Cell Array EK Slave Address Word Address Row Comparator Pointer decoder 256 x 8 bits Column Decoder Dour and ACK 5524 20021 Block Diagram 13 CIRCUIT OPERATIONAL DESCRIPTION 5 SDROM HY57V641620HGT H HY57V641620HGT 55 This sends and receives data with MPEG decoder and performs the video signal processing Every video signal output from DVD player is once stored in SDRAM and then encoded in MPEG decoder and finally output into the analog signal SDRAM applied to DVD module has the capacity of 64MBit 1048576 x 16bit x 4Bank sends and receives data with MPEG decoder by 16 bit Description The Hynix HY57V641620HGT H is a 67 108 864 bit CMOS Synchronous DRAM ideally suited for the main memory applications which require large memory density and high bandwidth HY57V641620HGT H is organized as 4banks of 1 048 576x16 HY57V641620HGT H is offering fully synchronous operation referenced to a positive edge of the clock All inputs and outputs are synchro nized with the rising edge of the clock input The data paths are internally pipelined to achieve very high band
29. ch data before generating the final analog audio and video signal outputs Deck mechanism MPEG B D II MPEG Decoding Part ano 1 SDRAM Pickup Fl Read I L Channel Data iF Sub Picture I I 8050 Track Buffer Spnde Controller MPEG Video I Sled I Decoder motors I I I Servo lt MCU Controller I Y Audio DSP Sea I Motor Driver Peripheral I F l C a FLASH I I I 1 DVD MODULE Block Diagram CIRCUIT OPERATIONAL DESCRIPTION 3 Loader Part The loader which read the data of audio video from optic disc and transfer them to MPEG decoder can be divided into Deck total DVD assay in a short term Mecha and Servo Mecha mounts with the optical pick up which allows reading the signal of a disc using laser beam and makes it operates and consists of the deck mechanism which allows loading a disc and reading the data Servo is a sort of circuit which allows operating the loader and recovering the data and consists of Motor Drive IC operating the spindle the sled the loading motor Loader Part Deck Mechanism Servo Part MPEG Decoder IC11 DVD CD du Pickup Read Channel Spindle Sled motor
30. ckage CIRCUIT OPERATIONAL DESCRIPTION FCCRb6 0 wae FECR b6 0 OUTPUT ren 4 DVDRFP PROGRAMMABLE FULL WAVE SR DFFERENTATOR 2 RECR D54 SIGR b7 4 NPUTIMP SEL ATT RECRb7 6 SIGRb3 NeUTMP SEL INPUT SEL RESN Emiciame z cares Love 56061 Dac FS gain FocRb3 0 7 FO Gain zoe ter ss cancel mm 1248 is added high gain modo CTCRbT BCA DET 2 CBRb3 2 OUTPUT remm CO gain v SiGRb2 0 gt is added es righgainmode COR PDOR b3 corvo ToPHLD a CERb4 0 CE ofset D 54815 added gain mode Fe vas VI25 PIOR b7 5 1 90855 High gain RFCR b2 0 TROR2 b3 0 38 Dee 1248 is added high gain modo coRbs 1 t m DETECTOR E 3 TRCRb50 CFRb7 5 PDCRb3 TR offset TRGoh forTE FE amp oulputr t for PI output ref PHASE DETECTOR Low imp
31. d excellent performance Clock Generator CAP SRCIN Serial Audio BCKIN I VOUTLI DINI Data DIN2 Interface VOUTRI Digital Filters _VOUTI2 ML PS gt VOUTR2 DEM MD DM gt VOUTL3 RSTB VOUTR3 DA1196 Block Diagram 16 VOLTAGE CHARTS Power board output voltage 11 Pinnumber 1 2 3 4 5 6 7 8 9 12 3 4 Output voltage SW 24V STB5V Decode board input voltage CN1 Pinnumber 1 2 3 4 5 6 7 8 9 Output voltage GND S5V 3 3V D5V GND GND 12V 12V 17 CIRCUIT DIAGRAM 1 POWER SUPPLY SCHEMATIC DIAGRAM 2 3 4 5 6 HOT 1 4 4 HEADER CIRCUIT BE CAREFUL AND NOTE IF YOU CHECK THE VOLTAGE FOR PARTS IN HOT CIRCUIT YOU MUST USE PRIMARY GND AS A COMMON TERMINAL USE AN 2200P 250V VI EE A ISOLATION TRANSFORMER WHEN SERVICING CAUTION TO SERVICE TECHNICIANS BEFORE RETURING THE APPLIANCE TO THE CUSTOMER LEAKAGE CURRENT OR RESISTANCE MEASUREMENTS SHOULD BE PERFORMED TO DETERMINE THAT EXPOSED PARTS ARE PROPERLY INSULATED FROM SUPPLY CIRCUIT CAUTION THE PARTS IDENTIFIE
32. epends on the disc The number of audio languages depends on the software Multi Subtitle function DVD The subtitle can be seen in up to 32 languages In the case of SVCD or CVD it depends on the disc The number of subtitle languages depends on the software Multi Angle function DVD This function allows you to choose the viewing angle of scenes which were shot from a number of different angles The number of angles depends on the software Screen zoom function DVD VCD CIRCUIT OPERATIONAL DESCRIPTION DVD Module 1 Summary DVD One Board consists of Loader part that reads and transmits audio and video data saved at Optic Discs DVD CD DA VCD CD R to MPEG Decoder part MPEG Decoder part which by decoding and encoding data received from the Loader produces analog signals and u Com that controls the overall system including the loader and MPEG decoder 2 How Does it Operate Insert the power cord and then power transmitted to each IC and the SET will be the STANDBY status which requires the least power for input the front panel key input the STAND BY ON key extinguished the LED Once the Power On key is entered u Com recognizes it and initiates each chipset performs sequential algorithms such as determining whether the disc is in or not and if in what type of disc is loaded Through this process it can read disc data before transmitting it to the MPEG Decoder The MPEG Decoder will then decode and encode su
33. processing TV encoding Macrovision copy protection DVD system navigation system control and housekeeping functions The Vibratto ll DVD processor is built on the ESS proprietary dual CPU Programmable Multimedia Processor PMP core consisting of 32 bit RISC and 64 bit DSP processors and offers the best DVD feature set The processing units enable simultaneous parallel execution of system commands and data processing to perform specialized enconding and decoding tasks The RISC processor performs bit stream parsing control audio data output transfer video and audio data to the vector engine and service system control and housekeeping functions The vector engine performs audio and video micro code processing required by A V standards such as Dolby Digital MPEG and JPEG imaging These processing tasks include video motion compensation and estimation loop filtering Discrete Cosine Transforms DCT inverse DCT quantization and inverse quantization The Vibratto ll DVD processor supports all popular pick up units industry standard 125 audio data input and output EPROM and DRAM access It also supports both letterbox and pan and scan displays sub picture overlay and On Screen Display OSD The Vibratto ll s Unified Memory Architecture enables the lowest possible system memory cost by consolidating multiple memory subsystems into a single unit In addition the Vibratto ll DVD solution offers support for Karaoke CD G DVD Aduio H
34. s Servo Controller Motor Driver IC Loding Loader Block Diagram CIRCUIT OPERATIONAL DESCRIPTION 1 Motor Drive IC 58685 The 58685 is a 5 channel BTL driver IC for driving the motors and actuators in products such as CD ROM DVD ROM DVD Player drives Two of the channels use current feedback to minimize the current phase shift caused by the influence of load inductance Driver IC generates the focus signal and the tracking signal for pick up actuator the sled signal for feed spindle signal and the load signal for opening and closing of the tray The focus signal the tracking signal the sled signal and the spindle signal are input into each relaxant port of the drive IC in the order of No 26 pin 23 4 and 1 and set the gain amplification and the center voltage through the internal OP AMP and drive on both sides and then the focus signal and the tracking signal will be output as VOFC VOFC and VOTK VOTK on actuator the sled signal and the spindle signal will be output as VOSL VOSL and VOLD VOLD on each motor For the load signal the input opening closing signal is output as VOTR VOTR through the loading PRE FWD REV circuit MUTE BIAS VINTK OPIIN OPIN VINLD GND OPIOUT VCC2 VOLD VOLD VOTK XI or 2 1 5 LL 21 20 19 18 17 16 15 22 esj ml
35. the internal AGC including attenuation and boost equalization The DVD servo block of the 656603 includes mirror detection defect detection dual auto laser power control focus error center error and tracking error detection circuits The ES6603 provides AC coupled voltage inputs for photo detector signals used to detect center error focusing error tracking error and differential phase tracking error detection for DVD The ES6603 also provides an AC coupled differential or single ended RF signal input to the programmable attenuator with external AC coupling circuitry and an AC coupled single ended input for RF signals The attenuator outputs are AC coupled to the AGC inputs The AC coupled DVD and CD inputs are multiplexed in the input stage for accurate error detection The programmable bandwidth and boost equalization of the ES6603 is provided by internal 7 bit control DACs while a variable attenuator is used to program the zero locations The programmable bandwidth and cutoff range are set by the filter cutoff DAC Signal equalization with theprogrammable filter is supported with a wide bandwidth fullwave rectifier and a dual rate charge pump The ES6603 also provides inputs for its internal RF summing mode These inputs have the gain control amplifiers at the input stage The gain is controlled by the register bit settings of the serial port The ES6603 is available in an industry standard 64 pin low profile quad flat pack LQFP pa
36. width II input and output voltage levels are compatible with LVTTL Programmable options include the length of pipeline Read latency of 2 or 3 the number of consecutive read or write cycles initiated by a single control command Burst length of 1 2 4 8 or Full page and the burst count sequence sequential or interleave A burst of read or write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst read or write command on any cycle This pipelined design is not restricted by a 2N rule 14 CIRCUIT OPERATIONAL DESCRIPTION Self refresh logic Internal Row amp timer counter 1MX16 Bank 3 Row active Row 1MX16 Bank 2 Pre 1Mx16 Bank 1 Decoders 1 16 Bank 0 S19po2ep x 519002890 X Memory Cell Array 519002980 X refresh VIV26 V 5 519002890 X Column Active Column Pre Decoders 3185 9 dINV 95995 21607 8 19 8 Column Bank Select Counter Address Registers Burst Counter slang ssaippy Mode Registers Data Out Control Pipe tine Control HY57V641620HGT H Block Diagram 15 CIRCUIT OPERATIONAL DESCRIPTION 6 DAC DA1196 DA1196 is a digital to analog converter especially designed to work with MPEG2 AC 3 decoded data in applications such as DVD player home theater set top box and digital TV etc DA1196 integrates 6 DA channels providing customers a solution of both simplicity an
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