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SERVICE MANUAL - Agilent Technologies

1. START 2 900 GHz STOP 3 000 GHz RES BW 300 kHz VBW 1MHz SWP 20 0 msec 05507019 Figure 7 15 Typical 1st LO OSC Signal Triple Mode at A4A1J3 j Reconnect the semi rigid cable to A4A1J3 Then continue with 2 Check the 1st LO OSC Signal at A4A
2. COMB COMB E DC BIAS OUT ADJ ood 5 Board uy A5 Board 503008 Figure 8 7 Comb Generator Adjustment Location 9 Set the spectrum analyzer as follows Start Frequency 400 MHz Stop Frequency 1 GHz RBW 1 MHz Reference Level 20 dBm Scale 5 dB div 4 Turn the 4291B analyzer ON 5 Adjust 5 COMB DC BIAS ADJ until the spectrum analyzer display indicates the following 720 MHz Signal Level between 46 and 37 dBm 480 MHz to 920 MHz Flatness 8 dBm 480 MHz to 920 MHz Signal Level 51 dBm The adjustment location is shown in Figure 3 7 A typical spectrum analyzer display is shown in Figure 3 8 Adjustments and Correction Constants 3 11 46 dBm to 37 dB REF 20 0 ATTEN 10 dB at 720 MHz 719 8 MHz 40 50 dB START 400 MHz HES BW 1 MHz 6503023 STOP 1 000 GHz SWP 20 0 msec Figure 3 8 Comb Generator Output 3 12 Adjustments and Correction Constants gt 51 dBm STEP CORRECTION CONSTANTS The purpose of this procedure is to generate the correction constants that are used to pretune the step loop oscillator Required Equipment None Procedure 1 Run the adjustment program and display the main menu see
3. 00000000 J N m BNC f Adapter Adapter O Cable 122 cm 1 503017 Figure 3 13 Source Mixer Local Leakage Adjustment Setup 2 Set the spectrum analyzer as follows Center Frequency 100 MHz Span 100 MHz RBW 300 kHz 9 Press the following keys to execute adjustment Test No 38 PRESET SYSTEM SERVICE MENU TESTS 3 8 EXECUTE TEST 3 18 Adjustments and Correction Constants 4 Adjust the local leakage adjustments until the spectrum analyzer reading of the 78 58 MHz signal level is smaller than 40 dBm Then press CONT to complete the adjustment The adjustment locations are shown in Figure 3 14 Note Carefully rotate the local leakage adjustments so that the adjustments are not misadjusted by much It would be very difficult to recover from large misadjustment Source Mixer Leakage Adj
4. 513010 Figure 13 9 41 Amp Replacement 2 Disconnect the flexible cables and D from A41 3 Disconnect the wire designated in Figure 13 9 4 Remove the screw designated in Figure 13 9 to remove the cable clamp 5 Remove the five screws designated 3 in Figure 13 9 to remove A41 from the bottom cover 13 14 Replacement Procedures 50 DC DC CONVERTER REPLACEMENT Tools Required m Torx screwdriver T15 m Pozidriv screwdriver pt size 1 small and Z2 medium Removal Procedure 1 Remove the top cover as described in the COVER REMOVAL procedure 2 Remove the top shield plate 3 Lift the extractors at the top of 50 and remove all cables from the A50 A51 GSP REPLACEMENT Tools Required m Torx serewdriver T15 m Pozidriv screwdriver pt size 1 small and Z2 medium Removal Procedure 1 Remove the top cover as described in the COVER REMOVAL procedure 2 Remove the top shield plate 3 Remove all cables from the top of A51 4 Lift the extractors at the top of A51 and lift A51 out Replacement Procedure 1 Insert the new A51 into the analyzer by half 2 Connect the flat cable from the rear to A51J 9 Connect the wire from LCD to 51 4 Connect the flat cable from the LCD to A51 then push the A51 into the analyzer completely Note Marked side of flat cabl
5. Measurement Uncertainty 0 0 pS 0 3 pS 3 4 pS 6 7 uS 10 0 pS 17 pS 21 pS 28 uS 35 pS 46 pS 63 pS 71 pS Measurement Uncertainty 0 0 pS 0 3 pS 3 4 pS 6 7 uS 10 0 pS 17 pS 21 pS 28 uS 35 pS 46 pS 63 pS 71 yS Performance Tests 241 Test Head Standard Osc Level Frequency Measurement Calibration Parameter 1 MHz 10 MHz 100 MHz 200 MHz 300 MHz 500 MHz 600 MHz 800 MHz 1 GHz 1 3 GHz 1 6 GHz 1 8 GHz Test Head Standard Osc Level Frequency Measurement Calibration Parameter 1 MHz 10 MHz 100 MHz 200 MHz 300 MHz 500 MHz 600 MHz 800 MHz 1 GHz 1 3 GHz 1 6 GHz 1 8 GHz 2 48 Performance Tests High Temp Low Z 250 mV Z N N N NN NN EN PEN N High Temp Low Z Z N N N NON NN ON ON Value 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ Value 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ Test Limit 31 0 mQ 40 0 mQ 130 mQ 230 mQ 330 mQ 530 mQ 630 mQ 830 mQ 21 03 Q 1 33 Q 1 63 Q 1 83 Q Test Limit 51 0 mQ 60 0 mQ 150 mQ 250 mQ 350 mQ 550 mQ 650 mQ 850 mQ 1 05 0 1 35 0 1 65 0 1 85 0 Test Result Test Result mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ
6. FOR HIGH TEMPERATURE TEST HEAD APC 7 N f Adapter BN Test Station Test Head 0000 Power Meter 0 00 005 oo 9 00 00 00 00 OOOOQ BODO DO 0059 BB y 0000 00000000 00 ooo 00 o Oa E Test Station Stand Fixture Stand Extension Rod 502009 Figure 2 2 OSC Level Accuracy Test Setup 3 Press to initialize the 4291B 4 Press Source OSC UNIT dBm to set the OSC level unit to dBm 5 Set the controls as follows Control Key Strokes Settings Frequency Span 0 1 Span 0 Hz Center Center 1 Frequency 1 MHz OSC Level Source O 1 9 19 6 Subtract 19 dBm analyzer setting from the power meter reading and record the result on the performance test record 2 6 Performance Tests Table 2 1 Test Setting for Normal Temperature Test Heads OSC Level Center Freq 19 dBm 1 MHz 13 dBm 10 MHz 7 dBm 100 MHz 1 dBm 1 8 GHz 7 dBm 1 GHz Table 2 2 Test Setting for High Temperature Test Heads OSC Level Center Freq OSC Level Center Freq 19 dBm
7. A5 Board A5 Board CES03004 Figure 3 3 40 MHz Reference Oscillator Frequency Adjustment Location 2 Set the frequency counter as follows Input Impedance 50 Q Frequency Range 10 Hz 500 MHz 3 Adjust 5 40 MHz FREQ ADJ until the frequency counter reading is within 20 MHz 20 Hz The adjustment location is shown in Figure 3 3 Adjustments and Correction Constants 3 7 520 MHz LEVEL ADJUSTMENT The purpose of this procedure is to adjust the 520 MHz output level Required Equipment Spectrum Analyzer 2 24 24 8566A B SMC f BNC f adapter 2 2 2 2 4 1250 0832 N m BNC f adapter 242 1250 1476 BNC cable 61 em e eee PN 8120 1839 Procedure 1 Turn the analyzer OFF 2 Remove the J cable from the 5 520 MHz OUT connector The connector location is shown in Figure 3 4 520 MHz 520 MHz LEVEL ADJ OUT ve oot
8. CES05002 Figure 5 2 50 SHUTDOWN LED Location A50 SHUTDOWN LED The A50 SHUTDOWN LED turning off indicates some of A50 power supply is shut down by the 50 shutdown circuitry There are two FAN conditions rotating and not rotating when the SHUTDOWN LED turns off When the fan is rotating the shutdown circuit is probably activated by the over current condition on the power lines in the 50 DC DC Converter or the A2 Post Regulator In this condition though the 50 power supplies 24 V 5 VD 18 V 7 8 V 7 8 V and 18 V are shut down the Fan Power 24 V is still supplied to the fan When the fan is not rotating the shutdown circuit is probably activated by the FAN LOCK signal missing For more information about the 50 SHUTDOWN circuit operation see Figure 5 12 Power Supply Block Diagram 1 Note Once the A50 SHUTDOWN circuit is activated the only way to reset the circuit is turning the analyzer power off Wait a minute after turning the analyzer off Then turn it on 5 4 Power Supply Troubleshooting 4 Check the A1 5 VD LED a Remove the analyzer s bottom cover b Turn the analyzer power on c Look at the 5 VD LED Figure 5 3 shows the 5 VD LED location on A1 CPU The LED is normally m If the 4 chapter m If the 4 on 5 VD LED is off continue with TROUBLESHOOT 5 VD POWER SUPPLY in this 5 VD LED is on the 5 VD powe
9. m BNC f A5J3 5 apter BNC m BNC m Cable 61 cm 507010 Figure 7 10 520 MHz Signal Test Setup c Initialize the spectrum analyzer Then set the controls as follows Controls Settings Center Frequency 520 MHz Span 200 MHz 7 14 Source Troubleshooting d On the spectrum analyzer press PEAK SEARCH to move the marker the peak of the 520 signal e Check that the frequency is 520 MHz the level is 15 dBm 0 2 dB and the harmonic levels at 480 MHz and 560 MHz are lower than 0 dBc lower than the 520 MHz signal level The trace displayed on the spectrum analyzer should be as shown in Figure 7 14 m If the signal is good continue with 5 Check the EXT REF Operation m If the signal level is out of the limits perform the 520 MHz Level Adjustment see Chapter 3 If the adjustment is successfully completed continue with 5 Check the EXT REF Operation If the adjustment fails the X13 multiplier is faulty Replace A5 m If the signal is bad the X13 multiplier is faulty Replace A5 5 Check the EXT REF Operation When an external reference signal 10 MHz 0 dBm is applied to the EXT REF input connector on the rear panel the message ExtRef appears on the display When the external reference signal is removed the ExtRef message disappears Perform the following steps to
10. 10 34 DC BIAS AUTO man DIAG SERV DCB MODE AUTO MAN 10 35 POLARITY 1 DIAG SERV DCB POL AUTO POSINEG 10 35 CUR OFST 1 DIAG SERV DCB OFFS AUTO POSINEG aa 10 35 DAC lll e sl 10 35 RELAY ON off DIAG SERV DCB STAT 0 0 10119 10 36 TRANSDUCER CONTROL MENU 10 37 TRD AUTO man DIAG SERV TRAN MODE AUTO MAN 10 38 TRD RANGE DIAG SERV TRAN RANG AUTO EXP NORM 10 38 MEAS 1 DIAG SERV TRAN SENS FUNC IMP VOLT CURRIVIR 10 39 TEST HEAD 1 DIAG SERV TRAN THE HIMP LIMP HTHI HTLI 10 39 IF CONTROL MENU 10 40 IF GAIN AUTO man DIAG SERV IF GAIN MODE AUTO MAN 10 41 GAIN XV DIAG SERV IF GAIN X XV DBO DB6 DB12 10 41 GAIN XI DIAG SERV IF GAIN X XI DBO DB6 DB12 10 41 GAIN Y DIAG SERV IF GAIN Y DBO DB6 DB12 DB18 10 41 GAIN Z DIAG SERV IF GAIN Z DBO DB2 DB4 DB18 10 41 IF BW 10 42 BOOTLOADER MENU 10 43 SYSTEM UPDATE 2 10 43 SYSTEM BACKUP 2 10 43 PREVIEW DISK 10 44 REBOOT a 10 44 11 Theory of Operation OVERALL ANALYZER OPERATION 11 1 ANALYZER FUNCTIONAL GROUPS 2 2 11 2 POWER SUPPLY OPERATION 2 1 1 we 11 3 Line Power Module
11. CENTER 2 05858 GHz SPAN 100 MHz RES BW 10 kHz VBW 30 kHz SWP 30 0 msec Figure 7 22 Typical 2 05858 GHz Signal g Reconnect the E semi rigid cable to A3A2J23 At this point the A3A2 2nd LO is verified 7 26 Source Troubleshooting 5 0 two input signals to A3A3 are the 1st local oscillator signal coming from 4 1 and the 2 05858 GHz signal coming from A3A2 See Figure 7 1 Before performing the procedures in this section verify the 1st local oscillator signal at A4A1J3 in accordance with the Check A4A1 Ist LO Outputs section and verify the 2 05858 GHz signal in accordance with the Check A1A2 2nd LO Outputs The two output signals from are the RF signal 100 kHz to 1 8 GHz 10 dBm to 20 dBm going to the output attenuator and the level detector s signal going to the Source Vernier Only the RF signal is checked in the following procedure because the level detector s signal were already verified in internal test 15 SOURCE LEVEL Perform the following procedure to verify the RF signal If the signal is bad replace A3A3 1 Check the A3A3 RF Signal The A3A3 source generates the RF signal 1 MHz to 1 8 GHz Perform the following steps to verify the frequency and level of the RF signal a Connect the power sensor to the power meter and calibrate the power meter for the power sensor b Connect the equipment as shown in Fig
12. 2 44 1 PN 1250 0562 Option 001 time base is required for testing the analyzer with option 1D5 This adapter is used to protect the 5343A s APC 3 5 Input connector it is sometimes called a connector saver In the test setup the BNC m SMA f adapter is connected to the 5343A s 3 5 Input connector through this adapter For more information on microwave connectors and connector care see MICROWAVE CONNECTOR CARE PN 08510 90064 Procedure 1 Connect the test equipment as shown in Figure 2 1 For testing the analyzer equipped with Option 1D5 connect a BNC m BNC m cable between the EXT REF Input connector and the REF OVEN connector on the analyzer rear panel Performance Tests 2 3 0000 Frequency Counter 0 00 0000 00 0000 2008 oo E Sample Rate Midrange 00000000 OD 00 00 OO 00 00 Connector Saver N m BNC f Adapter E BNC f SMA f Adapter 3 LS BNC m BNC m Cable 61 cm CES02001 Figure 2 1 Frequency Accuracy Test Setup Note An APC3 5 m APC3 5 f adapter is used between the BNC f SMA f adapter i and the 5343A s APC 3 5 Input connector to protect the 5343A s APC 3 5 Input connector In Figure 2 1 the 5 connector
13. 503018 Figure 3 14 Source Mixer Leakage Adjustment Location Adjustments and Correction Constants 3 19 OSC LEVEL CORRECTION CONSTANTS The purpose of this procedure is to obtain the correction constants that correct the OSC signal linearity and flatness Required Equipment Power Meter 22 2 2 2 22222 2 2 2 4 486 Power 2 2 24 2 2 2 2 2 2 2 2 8482 Procedure 1 Run the adjustment program and display the main menu see UPDATING Correction Constants USING THE ADJUSTMENTS PROGRAM 2 Choose the OSC Level Correction Constants 9 Follow the adjustment program instructions to update the correction constants Figure 3 15 shows the equipment setup for the Correction Constants Power Meter 00000000 oOo 2 OO Oa Power Sensor 503019 Figure 3 15 OSC Level Correction Constants Setup 3 20 Adjustments and Correction Constants HOLD STEP ADJUSTMENT The purpose of this procedure is to minimize the hold step of the A6 receiver sample and hold output Required Equipment None Procedure an co N Turn the analyzer OFF To gain access to the adjustment component remove the side panel on the control keys side Do not connec
14. 2 11 Open Measurement 2 12 Short Measurement Test 2 12 50 Q Measurement 2 13 10 em Airline with Open o 2 13 10 em Airline with Short 2 15 DC BIAS LEVEL ACCURACY TEST OPTION 001 2 17 Description 2 2 2 17 2 17 Test Equipment ZEE VV 2 17 Procedure 2 17 PERFORMANCE TEST RECORD 2 20 Frequency Accuracy Test 2 20 Without Option 100 2 20 With Option 1 5 2 20 Osc Level Accuracy Test 2 20 Contents 1 Norm Temp High Impedance Test Head 2 20 Norm Temp Low Impedance Test Head Option 012 2 21 High Temp High Impedance Test Head Option 013 2 21 High Temp Low Impedance Test Head Option 014 2 22 Measurement Accuracy 2 28 Norm Temp High Impedance Test Head 2 23 Norm Temp Low Impedance Test Head Option 012 2 31 High Temp High Impedance Test Head Option 013 2 39 High Temp Low Impedance Test Head Option 014 2 47 DC Bias Accuracy Test 2 55 3 Adjustments and Correction Constants INTRODUCTION 8 1 S
15. Second Edition part number 04291 90111 June 2000 Third Edition part number 04291 90111 March 2001 Fourth Edition part number 04291 90111 Safety Summary The following general safety precautions must be observed during all phases of operation service and repair of this instrument Failure to comply with these precautions or with specific WARNINGS given elsewhere in this manual violates safety standards of design manufacture and intended use of the instrument The Agilent Technologies Company assumes no liability for the customer s failure to comply with these requirements Note 4291B comply with INSTALLATION CATEGORY II and POLLUTION DEGREE 2 i in IEC1010 1 4291B are INDOOR USE product Y Note LEDs in 4291B are Class 1 in accordance with IEC825 1 CLASS 1 LED PRODUCT Ground The Instrument This is a Safety Class 1 product provided with a protective earth terminal An uninterruptible safety earth ground must be provided from the main power source to the product input wiring terminals power source to the product input wiring terminals power cord or supplied power cord set Whenever it is likely that the protection has been impaired the product must be made inoperative and secured against any unintended operation DO NOT Operate In An Explosive Atmosphere Do not operate the instrument in the presence of f
16. 2 Power Cable Supplied a a a a a B 3 Contents 14 Tables 1 1 2 1 2 2 2 3 2 4 3 1 4 1 4 2 4 3 5 1 5 2 7 1 7 2 7 3 1 4 7 5 9 1 10 1 10 2 11 1 11 2 11 3 12 1 12 2 12 3 12 4 12 5 12 6 12 7 12 8 12 9 12 10 12 11 12 12 12 13 12 14 12 15 12 16 12 17 12 18 12 19 12 20 12 21 12 22 12 23 12 24 Recommended Test Equipment 2 2 2 2 2 25 2 2 5 2 1 4 Test Setting for Normal Temperature Test 2 7 Test Setting for High Temperature Test Heads 2 7 DC Bias Voltage Accuracy Test Settings 2 19 DC Bias Current Accuracy Test 5 2 19 Required Binaries 3 4 Troubleshooting Information for Internal Test Failure 4 6 Source Test Settings 2 2 4 4 4 8 Test Head Tests List a a a a 4 11 A50 Power Supplies 5 16 Power Supplies on 2 Post Regulator 5 19 STEP OSC Frequency 1 13 RF Signal Test Settings 2 2 a a a a 7 28 Attenuation Test 5 7 30 7 32 7 32 Test Head Tests List 1 2 a a a a a 9 6 Test Status Terms 10 7 Typical STEP VTUNE Values 10 23 STE
17. 5 5 503005 Figure 8 4 520 MHz Level Adjustment Location 9 Connect the equipment as shown in Figure 3 5 3 8 Adjustments and Correction Constants Spectrum Analyzer BNC f SMC f Adapter A5 520 MHz OUT N m BNC f Adapter 00000000 Cable 61 cm CES03006 Figure 3 5 520 MHz Level Adjustment Setup 4 Set the spectrum analyzer as follows CENTER Frequency 520 MHz SPAN 1 MHz RBW 100 kHz 5 Turn the 4291B analyzer ON 6 Adjust A5 520 MHz LEVEL ADJ until the spectrum analyzer reading for the 520 MHz signal level is within 15 0 2 dBm The adjustment location is shown in Figure 3 4 7 Turn the 4291B analyzer OFF 8 Reconnect the J cable to the A5 520 MHz OUT connector Adjustments and Correction Constants 3 9 COMB GENERATOR ADJUSTMENT The purpose of this procedure is to adjust the co
18. EN 4 1 Receiver Test MEE VV 4 9 Test Equipment MM MM o 4 9 Procedure 2 6 6 2 4 9 Transducer Test 2 4 4 10 Test Equipment 2 4 10 Procedure 2 4 10 INSPECT THE REAR PANEL FUNCTION 4 12 Check the GPIB Interface 4 12 Check the Parallel Interface ll lll 4 12 Check the mini DIN Keyboard Connector 4 12 Power Supply Troubleshooting INTRODUCTION 2 2 a 5 1 START HERE 5 3 1 Check Error lt 5 8 2 Check the Fan is 5 3 3 Check the 50 SHUTDOWN LED 5 3 A50 SHUTDOWN LED 5 4 4 Check the Al 5 VD LED oaa a a a a 5 5 Measure the Al 5 VD 5 5 5 Check the Eight A2 LEDs 5 5 6 Run Internal Test 4 2 POST 5 6 FIND OUT WHY THE FAN IS NOT ROTATING 5 8 1 Check the Line Voltage Selector Switch Setting and Fuse 5 8 2 Check the 50 8 5 8 FIND OUT WHY THE A50 SHUTDOWN LEDISOFF 5 9 1 Disconnect the Cable from the 5 9 2 Disconnect the Cable from the 51 2 5 9 3 Disconnect the Cable from A22J1 Optio
19. 1431S ZHN oz 250 18201 ISL ZHN 086 quoy OL 1 lt Ld ZHD 8586878 ZHN S zo OL OL BNC m BNC m Cable ZHD esesoz ZHW 5515 puooes 1544 12007 151 C ZHN OF zHIN OL 43 438 1X3 2 ZHW OL day LNI m A m m rm A OFF svia 94 Svla Y ZH5 80 ZH 858686 pug ZHD 888502 12907 ISL 1949094 OL 06511005 11 13 Theory of Operation Figure 11 5 Source Simplified Block Diagram 5 Synthesizer 5 synthesizer provides 40 MHz reference frequency an INT REF signal a FRAC OSC signal a STEP OSC signal and a 520 MHz signal The 40 MHz reference signal is supplied to the A3A1 level vernier and the receiver IF and is used as the reference signal The FRAC N OSC and the STEP OSC signals are supplied to the 4 1 1st LO and are used to generate the 1st local oscillator signal The 520 MHz signal is supplied to the A3A2 2nd LO and is used to generate the second local oscillator signal The A5 Synthesizer consists of the following circuits REF OSC Reference Oscillator FRAC N OSC Fractional N Oscillator STEP OSC Step Oscillator x 1
20. The STEP OSC consists of a comb generator and a phase locked oscillator that is phase locked to the 10 MHz reference signal of the REF OSC The comb generator receives the 40 MHz reference signal from the REF OSC and multiples the fundamental signal into a comb of harmonic frequencies 40 MHz x N The level of the harmonics is adjusted in the Comb Generator Adjustment The phase locked oscillator consists of a 470 MHz to 910 MHz VCO a phase detector a mixer a pretune DAC and 1 converters See Figure 11 10 The VCO frequency is mixed with the comb generator output the mixer The mixer produces multiple harmonics Fyco 40 MHz N through the LPF low pass filter The mixer output is compared with the 10 MHz reference signal in the phase detector Phase locking imposes the condition of 10 MHz 40 MHz x N and the locks to the nearest 40 MHz harmonic satisfying that condition The initial frequency is set to the desired harmonic frequency of 40 MHz x 12 to 23 using the pretune DAC This locks the output frequency to the desired 40 MHz x N 10 MHz Theory of Operation 11 15 selection of the frequencies listed in Table 11 1 The polarity of the 10 MHz offset is controlled by the 1 converters in the loop An unlock detector monitors the control voltage to the VCO When the control voltage is out of limits the detector sends the status to the Al CPU
21. g Reconnect the L cable to the A5J2 STEP PLL OUT connector Continue with 5 Check the 520 MHz Signal 4 Check the 520 MHz Signal The 520 MHz signal 520 MHz 15 dBm 0 2 dB is derived from the 40 MHz reference signal through the X 13 Multiplier See the A5 Synthesizer block in Figure 7 1 Therefore the signal contains 40 MHz harmonics as shown in Figure 7 9 Perform the following steps to verify the 520 MHz signal Source Troubleshooting 7 13 Harmonic at 480 MHz 520 MHz Signal Harmonic at 560 MHz Level 0 dBc 15 dBm 0 2 dB Level 0 dBc 520 0 MHz ATTEN 20 dB 14 90 dBm CENTER 520 MHz SPAN 200 MHz RES BW 1 MHz VBW 3 MHz SWP 20 0 msec 05507014 Figure 7 9 Typical 520 MHz Signal a Press Preset to initialize the 4291B b Remove the J cable from the A5J3 520 MHz OUT connector After the PHASE LOCK LOOP UNLOCKED message appears connect the equipment as shown in Figure 7 10 BNC m BNC m Cable 122 cm TO EXT REFERENCE Spectrum Analyzer OUTPUT TO EXT REF Input 4291B Top View m O SMC f BNC f Adapter com gt
22. 11 17 Divider o aa a 11 17 Source OSC 11 17 Level Vernier a 11 17 A3A22nd LO oaa e 11 18 2nd LO 2 2 2 11 18 Source First 11 18 Source 11 18 Output Attenuator es 11 19 A22 A23 DC Bias aoaaa 11 19 RECEIVER THEORY 11 20 A4A2 Receiver 11 22 Receiver IF auaa a 11 22 Third Local Oscillator 2 2 2 11 22 Third Converter oa a 4 ll n 11 22 Sample Hold and A D Converter 11 23 Gains X Y and Z e 11 23 TRANSDUCER THEORY 11 24 Test Heads 11 26 41 TRD 11 27 Gv Gi ATT and Level 11 27 Multiplexer 2 a 11 28 2 11 28 12 Replaceable Parts INTRODUCTION 2 2 a 12 1 ORDERING INFORMATION 12 1 Direct Mail Order 12 1 EXCHANGE ASSEMBLIES 2 12 2 REPLACEABLE PARTS LIST 12 2 Top View Assemblies 0 12 4 Bottom View Assemblies 2 1 2 1 ee lll 12 10 Front Assembly Parts 12 16 Rear Assembly 12 21 Miscellaneous Par
23. CES12014 Figure 12 10 Front Assembly Parts 4 5 Inside Table 12 13 Front Assembly Parts 4 5 Inside Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 4970 25002 18 1 INSULATOR 28480 4970 25002 2 0515 0977 8 2 SCR MACH 2 0 4 28480 0515 0977 3 0950 2924 6 1 54 Inverter 28480 0950 2924 4 04396 61709 5 1 CABLE ASSY 28480 04396 61709 5 0400 0010 2 1 GROMET 28480 0400 0010 6 4970 04002 4 1 LCD COVER 28480 E4970 04002 Replaceable Parts 12 19 812015 Figure 12 11 Front Assembly Parts 5 5 Inside Table 12 14 Front Assembly Parts 5 5 Inside Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 E4970 66539 2 1 Mini Board 28480 4970 66539 2 2090 0574 8 1 52 LCD 28480 2090 0574 04896 25071 8 1 GASKET 28480 04396 25071 3 0515 1550 0 5 SCR M3 L 8 28480 0515 1550 12 20 Replaceahle Parts Rear Assembly Parts CES12009 Figure 12 12 Rear Assembly Parts 1 Outside Table 12 15 Rear Assembly Parts 1 Outside Ref Agilent Part
24. 7 28 Typical 2nd Local Oscillator Signal 7 24 2 05858 GHz Signal Test Setup 7 25 Typical 2 05858 GHz Signal 7 26 RF Signal Test Setup 7 27 Output Attenuator 1 7 29 A22 Output Voltages Check Location 7 31 Receiver Group Block Diagram oa o a a a a 8 2 Receiver Group Troubleshooting Flow llc lll en 8 8 GAIN Test 8 4 Transducer Group Block Diagram 1 2 9 2 Transducer Group Block Diagram 2 of 2 9 3 Transducer Group Troubleshooting Flow 9 4 Test Station Connectors 9 5 Cable Isolation Check Points 9 7 Service Key 10 1 Service Menu os 10 3 Tests Menu os 10 5 Test Status on the Display 2 10 6 Service Modes Menu 2 1 1 ee a 10 15 Bus Measurement Menu 10 17 Fan Power Typical Trace 0 0 10 21 Ist LO VTUNE Typical 10 22 FN VTUNE Typical Trace aa a 10 23 FN INTEG OUT Typical Trace 10 24 Correction Constants Menu 0 10 27 Synthesizer Control Menu 10 29 OSC Control Menu 10 32 DC Bias Control M
25. A5J4 EXT REF IN I CABLE to EXT REF Input 507012 Figure 7 12 544 Location 7 16 Source Troubleshooting CHECK 4 1 15 LO OUTPUTS The input signals to A4A1 are the FRAC N OSC signal and the STEP OSC signal see Figure 7 1 Before performing the procedures in this section verify the FRAC OSC signal and STEP OSC signal in accordance with the previous section The output signals from A4A1 are two Ist local oscillator signals 2 05858 GHz to 3 85858 GHz One goes from the A4A1J3 connector to the A3A3 source The other goes from the A4A1J4 connector to the A4A2 Receiver RF If the two signals are good the A4A1 Ist LO is verified Perform the following procedures sequentially to verify the two 4 1 output signals at A4A1J3 and A4A1JA Note If one or both of the signals are bad the 4 1 1st LO is faulty Replace the A4 i 1st LO Receiver RF which consists of the A4A1 1st LO and the A4A2 Receiver In these procedures the two 4 1 outputs are observed using test equipment and the 4291B self test functions For detailed information about the 4291B self test functions see the Service Key Menus Also the signals are verified in two A4A1 operation modes single loop mode and triple loop mode For a description
26. 11 5 40 Preregulator 2 2 2 2 11 5 A50 DC DC Converter 2 2 2 11 5 Switching Regulator 2 2 2 2 2 2 25 25 Z2 25 5 4 11 5 Switching 22 11 5 Regulated 5V Digital Supply 5 VD 11 5 A50 Shutdown LED 11 5 A2 Post Regulator 2 2 2 ww 11 6 Shutdown Circuit 2 2 11 6 Eight Status 5 2 11 6 Output Attenuator Drive 11 7 DIGITAL CONTROL OPERATION 11 8 AILCPU 1 Dw a 11 10 Contents 8 A30 Front Panel Keyboard 11 10 A31 Connector 4 2 2 4 4 4 11 10 A32 I BASIC Interface 11 10 GSP 11 11 A52 LCD Liquid Crystal 11 11 A53 FDD 11 11 A54 Inverter aoaaa a 11 11 SOURCE THEORY 11 12 Ab Synthesizer ww 2 11 14 5 11 14 FRAC OSC 11 14 STEP OSO 1 11 15 Multiplier 158 11 16 A4Al Ist LO 2 e 11 16 15 Local OSC Circuit 2 2 0 11 16 Single Loop Operation at Frequency Spans gt 45 MHz 11 16 Triple Loop Operation at Frequency Spans lt 45 MHz 11 16 Source
27. o m BNC f apter Figure 7 5 FRAC N OSC Signal Level Test Setup On the 4291B press Preset Sweep SWEEP TIME 2 to set the sweep speed slow enough to check the FRAC N OSC signal with the spectrum analyzer f Press Trigger SWEEP HOLD to hold the sweep Source Troubleshooting 7 9 Initialize the spectrum analyzer Then set the controls as follows sweep time must be less than 24 msec Controls Settings Start Frequency 30 MHz Stop Frequency 70 MHz Reference Level 10 dBm Max Hold ON h On the 4291 press SINGLE to make a sweep i Wait for the completion of the sweep and check that the signal level is 4 5 dBm 5 dB over the frequency range of 32 18 MHz to 60 29 MHz The displayed trace should be as shown in Figure 7 6 m If the signal is good the FRAC OSC is working Continue with the next step m If the signal is bad the FRAC OSC is faulty Replace A5 4 25 dBm 5 dB over the frequency range 32 18 MHz to 60 290 MHz MKR 3216 MHz REF 10 0 dBm ATTEN 20 dB 3 80 dBm START 30 0 MHz STOP 70 0 MHz RES BW 100 kHz VBW 300 kHz SWP 20 0 msec 6507006 Figure 7 6 FRAC OSC Typical
28. ADJ 1 to maximize the trace Then adjust BPF ADJ 2 to maximize the trace and press CONT to complete the adjustment The adjustment location is shown in Figure 3 18 The interaction of BPF ADJ1 and BPF ADJ 2 is negligible 3 22 Adjustments and Correction Constants ADJ 6503016 Figure 3 18 Band Pass Filter Adjustment Location Adjustments and Correction Constants 3 23 DC BIAS LEVEL CORRECTION CONSTANTS OPTION 001 ONLY The purpose of this procedure is to obtain the correction constants that correct the DC bias voltage and current level Multimeter 2 2 2 2 2 2 2 2 2 2 2 2 22 2 222 4 4 2 2 3458A APC 7 N f Adapter 2 2 2 2 2 22 2 2 11524 N m BNC f Adapter 2 2 2 2 PN 1250 1476 BNC f Banana Adapter 2 2 1251 2277 BNC cable 61 em e eee PN 8120 1839 Procedure 1 Run the adjustment program and display the main menu see UPDATING Correction Constants USING THE ADJUSTMENTS PROGRAM 2 Choose the DC Bias Correction Constants 3 Follow the adjustment program instructions to update the correction constants
29. I O Port CES11004 Figure 11 4 Digital Control Group Simplified Block Diagram Theory of Operation 11 9 1 CPU The A1 CPU consists of the following circuits and parts See Figure 11 4 CPU central processing unit that controls the analyzer DSP digital signal processor that is used for fast data processing Memory storages consists of BOOT ROMs Flash Memory EEPROM Backup SRAM DRAM and Dual Port SRAM The backup SRAM is powered from a large capacitor that is charged when the analyzer is turned on Therefore the SRAM keeps its data at least 72 hours after the analyzer is turned off The Dual Port SRAM is used for communication between the CPU and DSP F Bus Timer is used in the frequency bus measurement that is a diagnostic function of the analyzer For a description of the frequency bus measurement see the Service Key Menus chapter Analog Board Interface interfaces between the CPU and analog assemblies A3 through A7 Keyboard Controller controls the A30 front panel keyboard Audio Interface controls the beeper on the A30 front panel keyboard FDD Control controls the A53 FDD GPIB Control communicates with the external GPIB devices through the GPIB connector on the A31 I O connector External Keyboard Control interfaces between the CPU and the external keyboard through the mini DIN connector on the A32 I BASIC Interface I O Control controls the external devices through the I O PORT
30. mrad 4 0 mrad 600 MHz Z Q 476 mQ 88 mQ 600 MHz 8 rad 48 6 mrad 9 0 mrad 800 MHz Z 0 633 mQ mQ 122 mQ 800 MHz 0 rad 46 6 mrad 9 0 mrad 1 GHz Z 0 1 34 0 0 0 27 9 1 GHz 0 rad 30 2 mrad 6 0 mrad 1 6 GHz Z 0 3 96 0 0 0 86 0 1 6 GHz 0 rad 46 2 mrad 10 0 mrad 1 8 GHz Z 0 1 84 0 0 0 38 Q 1 8 GHz 0 rad 55 7 mrad mrad 10 0 mrad 2 36 Performance Tests Test Head Norm Temp Low Z Standard 10 em Airline with Short Osc Level 400 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz Z me 11 2 mQ mQ 1 7 mQ 1 MHz 0 98 7 mrad 15 0 mrad 10 MHz 7 0 21 5 mQ mQ 4 3 mQ 10 MHz 0 rad 20 0 mrad 4 0 mrad 100 MHz Z Q 139 mQ mQ 27 mQ 100 MHz 0 rad 13 0 mrad 2 5 mrad 200 MHz Z 0 324 mQ 67 mQ 200 0 rad 14 5 mrad 3 0 mrad 300 MHz Z 0 542 110 mQ 300 MHz 8 rad 14 8 mrad _ 3 0 mrad 500 MHz Z 0 1 58 Q Q 0 31 0 500 MHz 8 rad 18 1 mrad 3 5 mrad 600 MHz Z 0 4 35 0 0 0 78 Q 600 MHz 0 rad 28 0 mrad 5 0 mrad 1 GHz 7 0 2 52 Q Q 0 52 Q 1 GHz 0 rad 29 2 mrad mrad 6 0 mrad 1 8 GHz Z 0 1 19 9 0 0 22 0 1 3 GHz 8 rad 53 9 mrad mrad 10 0 mrad 1 6 GHz Z 0 1 06 0 0 0 16 0 1 6 GHz 0 rad 97 8 mrad mrad 15 0 mrad 1 8 GH
31. 1 Beep sounds in about a second 2 The LED turns on 3 The display should come up bright and focused In case of unexpected results continue with Chapter 6 First This Turn On Sequence Beep is sounding 4291B 00000000 Then This Operating State Only CH1 LED on LCD bright and Fan audible 504002 Figure 4 2 Front Panel LEDs 4 4 Overall Troubleshooting Check Error Message Turn the analyzer power on and inspect the display No error message should be displayed If one of the error messages listed below is displayed follow the related instructions For any other message see the Error Messages in the Messages appendix Error Messages POWER ON TEST FAILED EEPROM CHECK SUM ERROR Svc Status Annotation POWER FAILED ON POWER FAILED ON PostRegHot PHASE LOCK LOOP UNLOCKED Instruction This indicates the power on self test failed Continue with Troubleshooting When Power On Self test Failed This indicates that the correction constants stored in the EEPROM on the Al CPU are invalid or the EEPROM is faulty Continue with Chapter 6 This indicates that the correction constants stored in the EEPROM on the Al CPU are invalid or the EEPROM is faulty Continue with Chapter 6 One or more of the AZ power supplies 15 V 8 5 V 5 3 5 V 5 V 15 V is displayed in of the message The displayed power supplies are s
32. 10 25 DOME 10 25 1 SOURCE OSC Source 10 25 2 DIVIDER OUT Divider Output 10 25 3 STEP OSC Step Oscillator 10 25 4 FN OSC Fractional N 10 26 5 REF OSC Reference Oscillator 10 26 6 3RD LO OSC Third Local Oscillator 10 26 7 SAMPLE HOLD 1 1 1 ww 10 26 CORRECTION CONSTANTS MENU 10 27 OSC LVL CC 1 DIAG SERV CCON OLEV NORM FRON OFF 10 27 DC BIAS CC ON off DIAG SERV CCON DCB OFF ON Ol1 10 28 Correction Constants 2 s 10 28 SYNTHESIZER CONTROL MENU 10 29 ist LO OSC DIAG SYNT FLOC MODE AUTO SING ITRIP 10 30 FN OSC DIAG SERV STNT FN MODE AUTO NARR WIDE 10 30 STEP OSC Joo aa a 10 30 FREQUENCY OFFSET DIAG SERV SYNT FREQ OFFS 2 10 31 Contents 7 OSC CONTROL MENU 10 32 OSC AUTO man 01 0 5 5008 0 2 10 32 OUTPUT ATT 1 DIAG SERV SOUR ATT AUTO DBO DB10 DB20 DB30 DB40 DBS50 DB60 2 10 32 OSC DAC AUTO man DIAG SERV SOUR LEV DAC MODE AUTO MAN 10 33 OSC DAC VALUE DIAG SERV SOUR LEV DAC VAL lt numeric gt 10 33 OSC OUT ON off DIAG SERV SOUR STAT 0 0 011 10 33 DC BIAS CONTROL MENU
33. 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad Test Head Norm Temp High Z Standard 10 em Airline with Open Osc Level 400 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz Z kQ c1 13 kQ kQ 0 04 kQ 1 MHz 8 rad 51 8 mrad mrad 2 0 mrad 10 MHz 7 kQ 27 50 0 4 4 0 10 MHz 0 rad 12 6 mrad 2 0 mrad 100 MHz 7 0 2 22 0 0 0 43 Q 100 MHz 0 rad 10 3 mrad mrad 2 0 mrad 200 MHz Z 0 1 29 Q Q 0 25 Q 200 0 rad 12 7 mrad 2 5 mrad 300 MHz Z 0 874 mQ 182 mQ 300 MHz 0 rad 14 4 mrad 8 3 0 mrad 500 7 0 559 mQ mQ 90 mQ 500 MHz 0 rad 24 8 mrad _ mrad 4 0 mrad 600 MHz Z 0 524 mQ 88 0 600 MHz 0 rad 53 4 mrad 7 9 0 mrad 800 MHz Z 0 679 122 mQ 800 MHz 0 rad 50 0 mrad 9 0 mrad 1 GHz Z 0 1 34 9 0 0 27 9 1 GHz 0 rad 30 3 mrad mrad 6 0 mrad 1 6 GHz Z 0 3 84 0 0 0 86 0 1 6 GHz 0 rad 44 8 mrad 10 0 mrad 1 8 GHz Z 0 1 87 0 0 0 38 Q 1 8 GHz 0 rad 56 4 mrad 10 0 mrad Performance Tests 2 27 Test Head Norm Temp High Z Standard 10 em Airline with Open Osc Level 41 mV Frequency Measurement Calibration Test Limit Test Result Measurem
34. Kit Test Heads Measurement Terminal Mainframe Digital Source Receiver Display Power Supply 651001 Figure 11 1 Analyzer Simplified Block Diagram Theory of Operation 11 1 The source generates stimulus signal the range of 1 MHz to 1 8 GHz The stimulus signal goes through the test station the test head and the test fixture to the device under test DUT The test station senses the voltage across the DUT and the current through the DUT The test station multiplexes the two signals and applies each signal to the receiver The receiver converts the signal to a digital signal and forward it to the digital control The raw data is processed in the digital control Then the processed data is routed to the CRT for display The calibration kit is used to calibrate the analyzer system Calibration ensures the impedance measurement accuracy at the test head terminal The power supply in the mainframe supplies all necessary power for the analyzer ANALYZER FUNCTIONAL GROUPS The analyzer consists of six main functional groups a power supply a digital control a source a receiver a transducer and a calibration kit Each group consists of several major assemblies and performs a distinct function in the analyzer In fact all the groups are interrelated to some extent and affect each other s performance Power Supply The power supply fun
35. The stimulus subgroup generates a stable and accurate stimulus signal This signal is a CW or swept signal between 1 MHz to 1 8 GHz with a power level from 60 dBm to 20 dBm The DC bias subgroup generates 0 to 40 V DC bias voltage and 0 to 100 mV DC bias current Figure 11 5 shows the simplified block diagram of the source functional group The source group consists of the following assemblies 5 Synthesizer 4 1 1st LO A60 High Stability Frequency Reference Option 1062 Source Vernier A3A2 2nd LO A3A3 Source Output Attenuator A22 DC Bias 1 2 A23 DC Bias 2 2 The first three assemblies and part of the A3A2 2nd LO belong to the synthesizer subgroup The next four assemblies belong to the stimulus subgroup A3A2 contains the second local oscillator and the source first mixer The second local oscillator is part of the synthesizer subgroup The source first mixer is part of the stimulus subgroup The last two assemblies belong to the DC bias subgroup 11 12 Theory of Operation ZHW H3H LOIN 1 4315 OL T PUZ y 09 OL apo 1 sonos gt lt m3 T 110 9819q 1 898902 JexiN 181 1 i oso pug Iaounos lt cVEV 1
36. e is OSV ONIHOLIAAS HOLIAAS YIMOd YyOLVINDAYAYd 31ndou YIMOd 505012 gure 5 12 Power Supply Block Diagram 1 i F 5 20 Power Supply Troubleshooting YOLYNNILLY e H 1400 2 ogrozy YOLYNNALLY 9v Zv TOYULNOS SYNLWYAdWALYSAO e AOVLIOAYSCNN JOVITIOANJAO e INIYENDUJAO e A8 NYL O3NYNL 1 TWNOIS NAAOGLNHS NA OQ LRHS Y 3901 NvJ 50 OL AGL E NAAOOLAHS NMOQLNHS y 1437Y 71 6 Old 338 NAAOOLAHS Y Sco sca OL uaria as Y m3 L ASI uaria XNWASL Lerozv XNWASL XNWAS lt 8 012 019 YIMOd 01 Yala 60 69 quvogu3HLow 029 ASV 434 09 sa pee YILEITANI 25
37. pS YIMOd vrev dIN3 L H3AO us LY OL YOLVINDAY LSOd ev MJIMJANOO 08V 2 2 1 505013 Figure 5 13 Power Supply Block Diagram 2 5 21 Power Supply Troubleshooting 2 MOTHERBOARD LI J3 1 2 SOURCE VERNIER 1 J4 15 3 4 5 5V 6 5V 15V 7 5VD 5 3V 8 5V T5V 15 15V 5V 15 T5 3V 8 5 6 2nd LO 5V 15 15V 7 AGAS SOURCE 5V 15 T5 3V 8 5 A4A1 1st LO Ji 15 T5V 5V 15V 5VD 7 1 4 2 RECEIVER RF 1 5V 3 AS SYNTHESIZER 15V 3 5V 5V 15V 5VD 2 4 5 6 7 4 AG RECEIVER J2 15 T5V e EN a 5V 15V T5VD 6505014 41 TRD 1 Ji 2 15V 3 15 1 Figure 5 14 Power Supply Block Diagram 3 5 22 Power Supply Troubleshooting 2 HSV 1 Digital Control Troubleshooting INTRODUCTION Use this procedure only if you have followed the
38. 10 dB sets the TRD AMP setting to 10 dB TRD RANGE DIAG SERV TRAN RANG AUTO EXP NORM Displays the control menu that allows you to control the TRD ranges of auto expand and normal The softkeys in this control menu are described below 10 38 EXPAND NORMAL Service Key Menus sets the TRD range to automatic mode normal operation In this mode the analyzer controls the TRD range setting automatically according to the measurement setting sets the TRD range to expand sets the TRD range to normal MEAS 1 DIAG SERV TRAN SENS FUNC IMP VOLT CURR VIR Displays the control menu that allows you to select the display parameter from impedance voltage current or voltage divided by current The softkeys in this control menu are described below The abbreviation of the current setting is displayed in the brackets of the menu IMPEDANCE 7 sets the display parameter to impedance VOLTAGE V sets the display parameter to voltage CURRENT 1 sets the display parameter to current V I RATIO V I Sets the display parameter to voltage divided by current TEST HEAD DIAG SERV TRAN THE HIMP LIMP HTHI HTLI Displays the control menu that allows you to set the analyzer operation of the high impedance low impedance high temperature high impedance and high temperature low impedance test heads The softkeys in this control menu are described below The abbreviation of the current setting is displ
39. 1ST LO OSC AUTO sets the 1st LO control to the automatic mode normal operation In this mode the analyzer controls the 1st LO automatically according to the measurement settings SINGLE sets the 1st LO to single mode TRIPLE sets the 1st LO to triple mode FN OSC 1 CDIAG SERV STNT FN MODE AUTO WIDE Displays the control menu that allows you to control the FN OSC fractional N oscillator in the 5 synthesizer The softkeys in this control menu are described below The abbreviation of the current setting auto narrow or wide is displayed in the brackets of the menu FN OSC AUTO sets the FN OSC control to automatic mode normal operation In this mode the analyzer set the FN OSC setting to the narrow or wide automatically according to the measurement setting NARROW sets the FN OSC to narrow mode WIDE sets the FN OSC to wide mode STEP OSC Displays the control menus that allow you to control the STEP OSC step oscillator in the 5 synthesizer The softkeys in these control menus are described below The abbreviation of the current setting AUTO or MANUAL is displayed in the brackets of the menu STEP OSC AUTO man DIAG SERV SYNT STEP MODE AUTO MAN Toggles the STEP OSC control mode to automatic mode normal operation or manual mode In the automatic mode the analyzer controls the STEP OSC automatically according to the measurement setting In the manual mode the STEP OSC is controlled by the
40. CES13003 Figure 13 3 A3 Replacement 4 Remove the semi rigid cable from A3A3 and clamp the cable with the cable clamp designated 0 in Figure 13 3 The cable needs to be clamped so that the cable is not caught by when is lifted out Disconnect the flexible cable Q from Disconnect the wire designated in Figure 13 3 if the option 105 is installed Remove the two screws designated 3 in Figure 13 3 Lift the extractors at the top of and lift A3 out ASAI Removal C a Remove cables and wires from b Place facing upward as shown in Figure 13 4 13 6 Replacement Procedures 05513004 Figure 13 4 1 A3A2 A3A3 Replacement c Remove the four screws designated 1 in Figure 13 4 to remove the shield case on d Remove the four screws designated 2 in Figure 18 4 remove 1 from A3A2 Note When using a re built A3A1 return the defective 1 without the shield i case Y 10 A3A2 Removal a Remove all cables from A3A2 b Remove as described in 4341 Removal Remove A3A3 as described in Removal Pull the gasket out from 2 shield and install the gasket in the replacement A3A2 Note When using a re built A3A2 return the defective A3A2 without the gasket
41. OSC LVL CC DIAG SERV CCON OLEV NORM FRON OFF Displays the control menu that allows you to select one of the OSC level correction constants settings of normal front panel and off The softkeys in this control menu are described below The abbreviation of the current setting is displayed in the brackets of the menu 05 CC NORMAL sets the OSC level correction constants to normal mode In this mode the OSC level setting applies to the measurement terminal FRONT sets the OSC level correction constants to front panel mode In this mode the OSC level setting applies to the mainframe front S output OFF sets the OSC level correction constants to off In this mode the OSC level is not corrected Service Key Menus 10 27 DC BIAS ON off DIAG SERV CCON DCB OFF ONJO 17 Toggles the DC bias level correction on and off When this correction is turned off the analyzer does not perform the compensation using the DC bias level correction constants Note corrections must be turned to on except when checking the analog circuits Y Correction Constants The analyzer has the following two correction constants in the EEPROM on the Al CPU It uses them to control the internal circuits and to achieve optimum performance by compensating for errors due to circuit characteristics Each of the correction constants is described below For the circuits that appear in the following description see Chapter 11 m OSC
42. Oscilloscope Fan Power Cable Depend on the fan speed Disassembled Rear Panel 505009 Figure 5 9 Fan Troubleshooting Setup e Turn the DC power supply on Adjust the output voltage to 24 V f Check the fan is rotating Check the FAN LOCK signal is as shown in Figure 5 9 5 m If the fan is not rotating or the FAN LOCK signal is unexpected replace the fan m If these are good the fan is verified m Reconnect the fan power cable to the Motherboard A20J18 14 Power Supply Troubleshooting 2 Troubleshoot the A50 DC DC Converter 4291B Top View Pulse Generator 1 2 A50J2 Pin10 GND To A50J2 Pin9 A50 DC DC Converter FANLOCK 777 To A50J2 5 Resistor 6800
43. Qty Description Mfr Mfr Part Desig Number D Code Number 1 1250 0252 6 3 Connector 28480 1250 0252 2190 0102 8 3 Washer for Connector 18189 1922 01 2950 0035 8 3 for Connector 28480 2950 0035 2 7120 0381 3 1 Label Opt 001 28480 7120 0381 7120 0382 4 1 Label Opt 002 28480 7120 0382 5080 3923 7 1 Label Opt 1D5 28480 5080 3923 3 04291 00203 0 1 Panel Rear 28480 04291 00203 4 1252 6951 8 1 AC Inlet 28480 1252 6951 2110 0917 5 1 Fuse 28480 2110 0030 2110 1134 0 1 Fuse Holder 28480 2110 1134 5 0380 0644 4 2 Standoff 28480 0380 0644 2190 0577 9 1 Washer for Standoff 28480 2190 0577 6 1251 7812 0 4 Jackscrew 28480 1251 7812 7 0515 1550 0 2 Screw 28480 0515 1550 8 5041 8821 2 4 Stand Off 28520 5041 8821 0515 1232 5 4 Screw 28480 0515 1232 9 6960 0041 1 1 Plug Hole Std 28520 2643 BLACK 1250 0252 6 1 Connector BNC Opt 1D5 28480 1250 0252 2190 0102 8 1 Washer for Connector 78189 1922 01 2950 0035 8 1 for Connector 28480 2950 0035 Replaceahle Parts 12 21 2 1 5 3 Alphabetic designators in this figure show the cable markers CES12013 Figure 12 13 Rear Assembly Parts 2 Inside Table 12 16 Rear Assembly Parts 2 Inside Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 81 E4970 66536 9 1 1 Connec
44. Run internal test 10 If this test fails replace the A3A2 2nd LO Run external test 21 If this test fails check the A7 Output Attenuator control signals in accordance with the Check Output Attenuator Control Signals section in this chapter If the control signals are good replace A7 If they are bad replace the A2 post regulator 00 1 Check 5 Synthesizer Outputs Check the INT REF signal If it is bad replace 5 Check the FRAC OSC signal If it is bad replace 5 Check the STEP OSC signal If it is bad replace 5 Check the 520 MHz signal If it is bad replace 5 Check the EXT REF operation If it is bad replace 5 Check 4 1 1st LO Outputs 1 Check the 1st local oscillator signal at A4A1J3 If it is bad replace A4 2 Check the 1st local oscillator signal at A4A1J4 If it is bad replace A4 Check an 1 Source Vernier Output 1 Check the 21 42 MHz signal If it is bad replace Check A3A2 2nd LO Outputs 1 Check the 2nd local oscillator signal If it is bad replace A3A2 2 Check the 2 05858 GHz signal If it is bad replace A3A2 Check A3A3 Source Output 1 Check the A3A3 RF signal If it is bad replace A3A3 Source Troubleshooting 7 3 Check A7 Output Attenuator Control Signals 1 Check the control signals If the control signals are good replace A7 If the control signals are bad replace A2 Check A22 DC Bias 1 2 Output 1 Check
45. 10 0 4S 16 7 uS 21 uS 28 uS 35 pS 46 uS 63 uS E71 uS Performance Tests 2 31 Test Head Standard Osc Level Frequency Measurement Calibration Parameter 1 MHz 10 MHz 100 MHz 200 MHz 300 MHz 500 MHz 600 MHz 800 MHz 1 GHz 1 3 GHz 1 6 GHz 1 8 GHz Test Head Standard Osc Level Frequency Measurement Calibration Parameter 1 MHz 10 MHz 100 MHz 200 MHz 300 MHz 500 MHz 600 MHz 800 MHz 1 GHz 1 3 GHz 1 6 GHz 1 8 GHz 2 32 Performance Tests 400 mV Z N N N NN NN N PEN N N Z Norm Temp Low Z Value 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ Norm Temp Low Z Value 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ Test Limit 10 5 mQ 15 0 mQ 60 0 mQ 110 mQ 160 mQ 260 mQ 310 mQ 410 mQ 510 mQ 660 mQ 810 mQ 910 mQ Test Limit 50 5 mQ 55 0 mQ 100 mQ 150 mQ 200 mQ 300 mQ 350 mQ 450 mQ 550 mQ 700 mQ 850 mQ 950 mQ Test Result Test Result mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ Measurement Uncertainty 1 8 mQ 2 0 mQ 10 0 mQ 20 mQ 30 mQ 40 mQ 50 mQ 70 mQ 80 mQ 100 mQ 120 mQ 130 mQ Measurement Uncertainty 1 8 mQ 2 0 mQ 10 mQ 20 mQ 30 mQ 40 mQ 50 mQ 70 mQ
46. 2 2 10 13 42 TEST 9 10 13 43 TEST PATTERN 4 10 14 44 TEST PATTERN 5 oaa a 10 14 SERVICE 8 10 15 BUS MEAS OFF 10 15 CORRECTION CONSTANTS 10 15 SYNTH 10 15 SC 10 15 DC BIAS 10 16 TRD 10 16 10 16 Service Modes 6 6 a a 10 16 BUS MEASUREMENT 10 17 BUS MEAS on OFF DIAG SERV BUS STAT ONIOFF 2 2 10 17 DC BUS OFF DIAG SERV BUS DC lt numeric gt 10 17 FREQ BUS OFF DIAG SERV BUS FREQ lt nwmeric gt 10 17 AZ SWITCH on OFF DIAG SERV BUS AZER OFFIONIJOJ1 2 2 2 10 18 Contents 6 WAIT COUNT DIAG SERV BUS WAIT lt numeric gt 2 10 18 Bus Measurement 10 18 Bus Measurement Procedure 10 18 Bus Measurement Values 2 1 2 a a 10 19 DC Bus Node Descriptions 10 19 0 OFF s s 10 19 1 20250 10 19 21 15 V 1 92U 2 2 a 10 19 3 12 6V 2 124U 4 10 19 4 2 025 U ww 10 20 5 5 2 025 U
47. 5 V 5 V AUX 5 V 12 6 V 15 Theory of Operation 11 3 od EZY ZZY 50 LW OW SW ev YOLOANNOO Lev OWA 008 duvog ADA 1NOYy3 05 snd AS AES XI AG AG ASL AS8 SAD AER NY4 A S lA zA pA 9 1 1 6 xnv A SL 4 NY4 DOTNVJ gt A8l AGL YIMOd QuvOSHU3HLON OZY sal 340 O384 09v AGE ASh 459 15 1 YIMOd 82 ASL ASC SYOLVINDAY 2 9c YOLWINOIY 1SOd ZY NAAOG LNHS YOLWINOIY Alddns YIMOd ONIHOLIAAS YI LEJANO 05 1 CES11002 iagram lified Block Di imp Figure 11 2 Power Supply Functional Group S 11 4 Theory of Operation Line Power Module The line power module includes the main fuse The main fuse which protects the input side of the preregulator from drawing too much line current is also accessible at the rear panel See Power Requirements in appendix B for the fuse replacement and other power considerations A40
48. Measurement Accuracy Test Setup Sweep List for Measurement Accuracy Test cr 10 em Airline with Open Measurement Test 10 em Airline with Short Measurement Test Setup lr DC Bias Level Accuracy Test Setup 2 2 a a a Updating Correction Constants 40 MHz Reference Oscillator Frequency Adjustment Setup 2 40 MHz Reference Oscillator Frequency Adjustment Location 520 MHz Level Adjustment Location 2 MM 520 MHz Level Adjustment Comb Generator Adjustment Comb Generator Adjustment Comb Generator Output 4 2 s 4 a 4 4 es Second Local PLL Adjustment Location M Second Local PLL Adjustment Source VCXO Adjustment Location Third Local VCXO Adjustment Location ccr nn o Source Mixer Local Leakage Adjustment Setup MM Source Mixer Leakage Adjustment Location OSC Level Correction Constants Setup 22 Step Adjustment Band Pass Filter Adjustment o Band Pass Filter Adjustment Location M DC Bias Level Correction Constants 10 MHz Reference Osc
49. Table 12 24 High Temp Test Heads Parts Fixture Side Option 013 6512006 Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 1510 0130 1 1 B POST 28480 1510 0130 2 16190 25011 3 1 CAB APC 7 28480 16190 25011 3 04291 04005 8 1 TOP COVER 28480 04291 04005 4 1250 0820 4 1 CMPNT RF CONN 02788 7098 4012 00 5 1250 1465 5 1 NUT RF 02788 7098 5052 15 6 04291 00684 1 1 PLATE 28480 04291 00634 4 04291 04001 4 1 BOTTOM COVER 28480 04291 04001 8 0515 0914 8 10 SCR MACH M3x0 5 01125 Replaceable Parts 12 31 Table 12 25 High Temp Test Heads Parts Fixture Side Option 014 6512007 Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 16190 25011 3 1 CAB 7 28480 16190 25011 2 1510 0130 1 1 28480 1510 0130 3 04291 04006 9 1 TOP COVER 28480 04291 04006 4 1250 0820 4 1 CMPNT RF CONN 02788 7098 4012 00 5 1250 1465 5 1 NUT RF CONN 02788 7098 5052 15 6 04291 00636 181 1 28480 04291 00636 7 04291 04023 0 1 COVER 28480 04291 04023 8 0515 0914 8 8 SCR MACH M3x0 5 01125 12 32 Replaceable Parts Table 12 26 High Temp Test Heads Parts Test Station Side Opt 013 and 014 6512005 Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Nu
50. m If the test passes continue with the next step m If the test fails go to the CABLE ISOL N Test Failure Troubleshooting procedure 5 Press f to access the TRD ISOL N I to V test When TRD ISOL N I to V is displayed press EXECUTE TEST Transducer Troubleshooting 9 5 6 Perform the test according to the displayed instructions Test station connector locations are shown in Figure 9 4 m If the test passes continue with the next step m If the test fails replace the A41 TRD amp 7 Press 1 to access TRD ISOL N V toI test When ISOL N V to I is displayed press EXECUTE TEST 8 Perform the test according to the displayed instructions Test station connector locations are shown in Figure 9 4 m If the test passes continue with the next step m If the test fails replace the A41 TRD amp Note The 4291B has the following four test heads including the optional heads m High impedance test head except Option 011 m Low impedance test head Option 012 m High temperature high impedance test head Option 013 m High temperature low impedance test head Option 014 Perform the following steps for all the available test heads 9 Select the test according to the test head to be verified using the numeric keys and the key Table 9 1 lists the test head tests and applicable test numbers Table 9 1 Test Head Tests List Test Number Test Name 30 HI Z HEAD 31 LO Z
51. 04291 00621 6 1 Shield A23 Component Side 28480 04291 00621 0515 0914 8 5 Screw for Case Shield 28480 0515 0914 04291 00623 8 1 Case Shield A23 Circuit Side 28480 04291 00623 0515 1550 0 4 Screw 28480 0515 1550 1 Included in A6 2 Included in A23 12 26 Replaceahle Parts Table 12 21 Miscellaneous Parts 5 Accessories Agilent Part Qty Description Mfr Mfr Part Number D Code Number 04291 18000 2 1 Program Disk Set 28480 04291 18000 See Figure B 2 Power Cable 1250 1859 1 1 Adapter BNC to BNC 28480 1250 1859 3757 60401 1 Mini DIN Keyboard Calibration Kit 04191 85302 7 1 05 Termination 28480 04191 85302 04191 85300 15 1 00 Termination 28480 04191 85302 04291 65006 2 1 50 Q Termination 28480 04291 65006 04291 60042 1 1 Low loss Capacitor 28480 04291 60042 04291 60041 O0 1 Carrying Case 28480 04291 60041 Service Software 04291 65003 4 Adjustment Program 28480 04291 65003 Documentation 04291 90020 8 1 Operating Manual 28480 04291 90020 04291 90027 5 1 Programming Manual 28480 04291 90027 2083 90005 0 1 HPIBASIC Handbook 28480 E2083 90005 04291 90111 8 1 Service Manual 28480 04291 90111 1 Option 1D5 only 2 Calibration Kit Contents List must be filled out in the 50 Q replacement 3 Not furnished 4 Option 0BW only Replaceahle Parts 12 27 Test Station and Test Head
52. 28480 2190 0014 2190 0586 1 2 Washer FL for Knob 28480 2190 0586 7 04291 01282 7 1 Angle 28480 04291 01282 0515 0914 8 2 Screw for angle 28480 0515 0914 8 1250 0820 41 1 Connector 28480 1250 0820 85020 20001 7 1 Center conductor collet 6 slot 28480 85050 20001 9 04291 60141 1 1 HighZ Test Head 28480 04291 60141 04291 60142 2 1 Low Z Test Head Opt 012 28480 04291 60142 10 1400 0015 8 1 Clamp Cable 28480 1400 0015 0515 2079 O 1 Screw M4 28480 0515 2079 11 0515 2079 0 5 Screw MA for 41 28480 0515 2079 12 04291 04056 9 1 Cover Bottom 28480 04291 04056 0403 0424 8 4 Foot 133 04291 61041 2 1 Cable Assembly 28480 04291 61041 1 Part of test head designated 9 2 Cover Bottom must be replaced from a defective head see Chapter 13 for details 3 Part of A41 Replaceable Parts 12 29 High Temperature Test Head Parts Option 013 and 014 Table 12 23 High Temperature Test Head Parts 6512010 Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 04291 601431 3 1 High Temp High Z Test Head 28480 04291 60143 Opt 013 2 04291 6014412 141 1 High Temp Low Z Test Head 28480 04291 60144 Opt 014 1 Agilent internal only part number 2 Bottom cover must be replaced from a defective unit in order to maintain serial number See Chapter 13 for details 12 30 Replaceahle Parts
53. 4 0 10 MHz 8 rad 73 6 mrad 2 0 mrad 100 MHz 7 0 8 190 0 0 43 Q 100 MHz 0 rad 14 9 mrad 2 0 mrad 200 MHz Z 0 1 44 0 0 0 25 Q 200 MHz 0 rad 14 2 mrad 2 5 mrad 300 MHz Z 0 879mQ 182 mQ 300 MHz 0 rad 14 4 mrad 38 0 500 2 7 0 491 mQ 90 mQ 500 MHz 0 rad 21 8 mrad _ 4 0 600 MHz 7 0 446 mQ 88 0 600 MHz 0 rad 45 5 mrad 9 0 mrad 800 MHz Z Q 603 mQ 122 mQ 800 MHz 8 rad 44 4 mrad _ 9 0 mrad GHz 7 0 1 31 0 0 0 270 1 GHz 0 rad 29 5 mrad mrad 6 0 mrad 1 6 GHz Z 0 3 93 Q 0 0 86 0 1 6 GHz 0 rad 45 9 mrad mrad 10 0 mrad 1 8 GHz Z 0 1 81 0 0 0 38 0 1 8 GHz 0 rad 54 8 mrad mrad 10 0 mrad Performance Tests 2 35 Test Head Norm Temp Low Z Standard 10 em Airline with Open Osc Level 41 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz Z kQ c14 4 kQ kQ 0 0 kQ 1 MHz 8 rad 662 mrad 2 mrad 10 MHz Z kQ 1610 0 4 0 10 MHz 0 rad 73 6 mrad 2 0 mrad 100 MHz Z 0 3 22 Q Q 0 43 Q 100 MHz 0 rad 15 0 mrad 2 0 mrad 200 MHz Z 0 1 47 0 0 0 25 Q 200 MHz 0 rad 14 5 mrad 2 5 mrad 300 MHz Z 0 909 mQ 182 mQ 300 MHz 0 rad 14 9 mrad 3 0 mrad 500 MHz Z Q 521 mQ mQ 90 mQ 500 MHz 0 rad 23 1
54. 8 5 V is derived from the 15 V supply regulated in the A2 post regulator It powers the A3A3 source 5 3 V is derived from the 7 8 V supply from A50 It powers the A3A3 source 5 V is derived from the 7 8 V supply from A50 It powers analog assemblies A3 through 9 5 V AUX is derived from the 25 V or 18 V supplies from 50 It powers 2 5 is derived from the 7 8 V supply from A50 It powers analog assemblies through 12 6 is derived from the 18 V supply from A50 It powers the probe power connector 15 is derived from the 18 V supply from A50 It powers analog assemblies A3 through The A2 post regulator is equipped with a protective shutdown circuit The A2 post regulator provides two LED arrays visible at the top edge of the A2 post regulator Each LED array consists of four LEDs and indicates the status of the seven power supplies Shutdown Circuit Four regulators for power supplies 15 V 5 V 5 V and 15 V are equipped with the capability of sensing overcurrent and overvoltage undervoltage on their output lines When a regulator senses one of these conditions it triggers the protective shutdown circuit The circuit is also triggered by an over temperature condition in A2 The following power supplies are not shutdown FAN POWER 12 6 V 15 V AUX 5 V AUX The shutdown circuit also provides the shutdown status to the A1 CPU When the circuit is activated it t
55. A50J2 Pin4 GND 505011 Figure 5 10 A50 DC DC Converter Troubleshooting Setup a Turn the analyzer power off b Disconnect cables from the A50J2 and A50J3 The connector locations are shown in Figure 5 10 c Connect the pulse generator to the A50J2 as shown in Figure 5 10 The pulse generator is used to feed the substitute of the FAN LOCK signal to the 50 DC DC converter This purposes not to shut down the A50 DC DC converter d Turn the pulse generator power on Set the controls as follows Wave Form Square Frequency Approximately 30 Hz Amplitude 7 8 e Connect a resister approximately 6800hms 125mW between the A50J2 pin 5 7 8 V and pin 4 GND as shown in Figure 5 10 f Turn the analyzer power on g Measure all power supply voltages on A50J2 and A50J3 using a voltmeter with a small probe See the Table 5 1 for power lines connector pins and limits Power Supply Troubleshooting 5 15 Table 5 1 A50 Power Supplies Supply Connector Pin GND Connector Pin Range 5 VD 18 V 18 V 7 8 7 8 V 24 V A50J3 Pin 1 2 and 3 A50J2 Pin 1 A50J2 Pin 2 A50J2 Pin 5 A50J2 Pin 6 A50J2 Pin 8 A50J3 Pin 4 5 and 6 A50J2 Pin and 4 A50J2 Pin 3 and 4 A50J2 Pin 3 and 4 A50J2 Pin 3 and 4 A50J2 Pin 10 4 6 V to 5 7 V 14 0 V to 27 0 V 14 0 V to 27 0 V 7 0 V to 9 0 V 6 0 V to 12 0 V 22 0 V to 27 0 V m If any of the power supply voltages are out of the
56. Figure 3 19 shows the equipment setup for the Correction Constants the GND side of the BNC f Banana adapter must be connected to the multimeter s LO terminal BNC m BNC m Cable 61 cm N m BNC f Adapter v APC 7 N f Adapter 7 Adapter Multimeter 00000000 oooan 02007 Figure 3 19 DC Bias Level Correction Constants Setup 3 24 Adjustments and Correction Constants 10 MHz REFERENCE OSCILLATOR FREQUENCY ADJUSTMENT OPTION 1D5 ONLY The purpose of this procedure is to adjust the 10 MHz high stability reference oscillator Option 1D5 frequency Required Equipment Frequency Counter 2 2 2 22 22 22 2 2 22 5343A Frequency Standard 2 2 2 24 22 2 5061B APC3 5 m APC3 5 f adapter PN 1250 1866 BNC f SMA f adapter 2 0 2 2 PN 1250 0562 N m BNC f adapter 2 2 PN 1250 1476 BNC cable 61 em 3 required PN 8120 1839 Procedure 1 Turn the analyzer OFF 2 Pull the A60 assembly out Place it on the analyzer with the bracket facing upward The A60 location is shown in Figur
57. HFS 5 8 Hierarchical File System COMPLEX 5 1 Complex Arithmetic 3 4 Adjustments and Correction Constants Updating Correction Constants Correction Constants are updated using the following procedure 1 Connect the equipment as shown in Figure 3 1 Controller GPIB Cable 00000000 Disk Drive 503001 Figure 3 1 Updating Correction Constants Setup Note Steps 2 to 5 are used to select the equipment and to set their GPIB addresses i When you perform the Adjustments Program the first time perform these steps to select the equipment and the GPIB address After that perform the 4291 program only when you want to change the equipment or the GPIB address 2 Locate the Equipment Configuration Program A4291B in the address of the drive or the directory where the Adjustment Program ADJ4291B will be run 9 Set the mass storage unit specifier MSUS to the address of the drive or the directory where A4291P is located 4 Load and run TE A4291B 5 Follow the instructions on the controller s screen until the program ends 6 Set the mass storage unit specifier MSUS to the address of the drive or the directory where the Adjustment Program ADJ4291B is located 7 Load and run ADJ4291B 8 A window format menu is displayed 9 Choose INITIAL SETUP if you want to update
58. The analyzer starts the operation using the installed firmware 8 Verify that no error message is displayed and that the revision displayed is that of the revision label m In case of unexpected results inspect the firmware diskette for any damage Clean the built in FDD and retry the procedure 14 4 Post Repair Procedures Manual Changes Introduction This appendix contains the information required to adapt this manual to earlier versions or configurations of the 4291B than the current printing date of this manual The information in this manual applies directly to the 4291 RF Impedance Material Analyzer serial number prefix listed on the title page of this manual Manual Changes adapt this manual to your 4291B refer to Table 1 and Table 2 and make all of the manual changes listed opposite your instrument s serial number and firmware version Instruments manufactured after the printing of this manual may be different than those documented in this manual Later instrument versions will be documented in a manual changes supplement that will accompany the manual shipped with that instrument If your instrument s serial number is not listed on the title page of this manual or in Table A 1 it may be documented in a yellow MANUAL CHANGES supplement Turn on the line switch or execute the IDN command by GPIB to confirm the firmware version See Programming Manual for information on the IDN command Fo
59. cable to the ALC Out connector Adjustments and Correction Constants 3 15 SOURCE VCXO ADJUSTMENT The purpose of this procedure is to optimize the source VCXO oscillation Required Equipment None Procedure 1 Do not connect anything to the analyzer mainframe front terminals 2 Press the following keys to execute adjustment Test No 39 PRESET SYSTEM SERVICE MENU TESTS 3 9 EXECUTE TEST 3 Rotate VCXO LEV and confirm that a voltage peak appears during a rotation to confirm that the VCXO circuit is correct Then press CONT 4 Rotate VCXO LEV slowly to enable the instrument to memorize the peak voltage Then press CONT 5 Adjust VCXO LEV until the VCXO level is within the limits and PASS is displayed Then press CONT to complete the adjustment VCXO LEV CES03012 Figure 3 11 Source VCXO Adjustment Location 3 16 Adjustments and Correction Constants THIRD LOCAL ADJUSTMENT The purpose of this procedure is to optimize the source VCXO oscillation Required Equipment None Procedure N Turn the analyzer OFF To gain access to the adjustment component remove the
60. mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ Measurement Uncertainty 1 8 mQ 2 0 mQ 10 mQ 20 mQ 30 mQ 40 mQ 50 mQ 70 mQ 0 08 Q 0 10 Q 0 12 Q 0 13 Q Measurement Uncertainty 1 8 mQ 2 0 mQ 10 mQ 20 mQ 30 mQ 40 mQ 50 mQ 70 mQ 0 08 Q 0 10 9 0 12 Q 0 13 8 Test Head Standard Osc Level Frequency Measurement 1 MHz 1 MHz 10 MHz 10 MHz 100 MHz 100 MHz 200 MHz 200 MHz 300 MHz 300 MHz 500 MHz 500 MHz 600 MHz 600 MHz 800 MHz 800 MHz 1 GHz 1 GHz 1 3 GHz 1 3 GHz 1 6 GHz 1 6 GHz 1 8 GHz 1 8 GHz High Temp Low Z 500 250 mV Calibration Parameter Value 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad Test Limit 407 mQ 8 13 mrad 420 mQ 48 40 mrad 555 mQ 11 1 mrad 805 mQ 16 1 955 mQ 19 1 1 26 Q 25 1 mrad 1 76 9 35 1 mrad 2 06 0 41 1 mrad 2 36 0 47 1 mrad 3 56 0 71 1 mrad 4 01 0 80 1 mrad 4 31 0 86 1 mrad Test Result mQ mrad mQ mrad mQ mrad mQ mrad mQ mrad mQ mrad mrad mrad mrad mrad mrad mrad Performance Tests Measurement Uncertainty 90 mQ 1 80 mrad 90 mQ 1 80 mrad 100 mQ 2 0 mrad 125 mQ 2 5 mrad 150 mQ 3 0 mrad 0 20 8 4 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mr
61. selected the trace is typically flat at approximately 1 92 U 10 10 22 V 2 002 1 This node is located on the A2 post regulator and detects the voltage of the 5 V power When this node is 5 V power When this node is 5 3 V power When this node is 8 5 V power When this node is 15 V AUX When this node is 15 V power When this node is 122 V power supplied to the S parameter test set through the TEST SET I O INTERCONNECT connector on the rear panel To observe this node perform the steps in the Bus Measurement Procedure selected the trace is typically flat at approximately 42 002 U 10 11 FAN POWER This node is located on the A2 post regulator and detects the voltage of the nominal 24 V supplied to the fan on the rear panel 10 20 Service Key Menus When this node is FAN POWER observe this node perform the steps in the Bus Measurement Procedure The typical trace is shown in Figure 10 7 BW 40 kHz SWP 40 msec START 100 kHz STOP 1 8 GHz 5510028 Figure 10 7 Fan Power Typical Trace 12 65 V 2 0605 0 This node is not connected to anywhere Ignore this node 13 SRC VTUNE Source Oscillator VCO Tuning Voltage This node is located in the source oscillator on the A3A1 Source Vernier and detects the 85 68 MHz VCO tuning voltage To observe this node perfor
62. settings must be turned to auto except when checking the analog circuits Y Service Key Menus 10 31 OSC CONTROL MENU Figure 10 13 shows the OSC control menu hierarchy To display the OSC control menu press System SERVICE MENU SERVICE MODES and OSC Each softkey in the OSC control menus is described below Source Control Menu osc OUT ATT AUTO man 2 AUTO OUTPUT ATT AUTO 0dB Osc DAC AUTO man 10dB 05 DAC VALUE 050 OUT ON off RETURN 06510013 Figure 10 13 OSC Control Menu OSC AUTO man DIAG SERV SOUR MODE AUTO MAN Toggles the OSC control mode to automatic mode and manual mode In the automatic mode the analyzer sets the OSC level automatically according to the measurement settings In the manual mode the OSC level is controlled by the following softkeys OUTPUT ATT DIAG SERV SOUR ATT AUTO DBO DB10 DB20 DB30 DB40 DB50 DB60 Displays the control menu that allows you to control the A7 output attenuator The softkeys in this control menu are described below The abbreviation of the current setting is displayed in the brackets of the menu 10 32 Service Key Menus 00 AUTO sets the A7 control to automatic mode In this mode the analyzer controls the A7 automatically according to the measurement setting 0 dB sets the output attenuator to 0 dB 10 dB sets the A7 output attenuator to 10 dB 20 dB sets the A7 output
63. 0 18 dB 13 dBm 10 MHz 3 03 dB dB 0 19 dB 100 MHz 3 33 dB 0 20 dB 1 dBm 1 8 GHz 8 00 dB dB 0 19 dB 7 dBm 1 GHz 5 33 dB dB 0 19 dB High Temp High Impedance Test Head Option 013 Osc Level Frequency Test Limit Test Result Measurement Uncertainty 19 dBm 1MHz 5 00 dB dB 0 22 dB 19 dBm 15 MHz 5 07 dB dB 0 22 dB 19dBm 200 MHz 5 89 dB dB 0 24 dB 19dBm 300 MHz 6 33 dB dB 0 24 dB 19dBm 500 MHz 7 24 dB 0 24 dB 19dBm 800 MHz 8 56 dB dB 0 24 dB 19 dBm 1 2 GHz 410 33 dB 0 283 dB 19 dBm 1 5 GHz 11 67 dB 0 283 dB 13 dBm 10MHz 5 04 dB dB 0 22 dB 7 dBm 1MHz 4 00 dB dB 0 22 dB 7 dBm 10MHz 4 04 dB dB 0 22 dB 7 dBm 15 MHz 4 07 dB dB 0 22 dB 7 dBm 100 MHz 4 44 dB 0 24 dB 200 2 4 89 dB dB 024 300 MHz 5 33 dB dB 0 24 dB 500 2 6 22 dB dB 0 24 dB 800 MHz 7 56 dB 024 7 dBm 1 GHz 8 44 dB dB 0 23 dB 7 dBm 1 2GHz 9 33 dB dB 0 283 dB 7 dBm 1 5 GHz 10 67 dB 0 283 dB 7 dBm 1 8 GHz 412 00 dB 0 283 dB 1 dBm 1MHz 4 00 dB dB 0 22 dB 1 dBm 1 GHz 8 44 dB dB 0 23 dB Performance Tests 2 21 High Temp Low Impedance Test Head Option 014 Osc Level Frequency Test Limit Test Result Measurement Uncertainty 19 dBm 1MHz 5 00 dB 0 22 dB 19 dBm 15 MHz 5 07 dB dB 0 22 dB 19dBm 200 MHz 5 89 dB 0 24 dB 19 dBm 300 MHz 6 33 d
64. 0515 1718 2 4 Screw M4 28480 0515 1718 5 04291 60001 2 1 Chassis 28480 04291 60001 Replaceable Parts 12 23 FRAME P Figure 12 15 Miscellaneous Parts 2 Chassis Table 12 18 Miscellaneous Parts 2 Chassis Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 5041 9186 4 2 Cap Front 28480 5041 9186 0515 1132 4 2 Screw 5 28480 0515 1132 2 5063 9210 1 2 Strap Handle 28480 5063 9210 3 5041 9187 5 2 28480 5041 9187 0515 1132 4 2 Screw 5 28480 0515 1132 4 5002 3989 1 2 Side Cover 28480 5002 3989 5 5021 5808 1 Frame 28480 5021 5808 6 5021 5837 2 4 Strut 28480 5021 5837 7 5002 1047 8 1 Cover 28480 5002 1047 8 5041 9176 2 1 Top Trim 28480 5041 9176 9 5022 1190 4 1 Front Frame 28480 5022 1190 10 5041 9167 1 4 Foot 28480 5041 9167 1460 1345 5 2 Tilt Stand 28480 1460 1345 12 5002 1088 7 1 Bottom Cover 28480 5002 1088 19 5041 9173 9 2 Side Trim 28480 5041 9173 12 24 Replaceable Parts 5512002 Figure 12 16 Miscellaneous Parts 3 5 Table 12 19 Miscellaneous Parts 3 On A5 5 Board Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 04396 00651 8 1 Shield Component Side 28480 043
65. 1 CPU fails Replace the 1 CPU with a new one See Chapter 6 200 GPIB CHIP TEST FAILED The A1 CPU s GPIB chip does not work properly This message is displayed when an internal test 1 Al CPU fails Replace the Al CPU with a new one See Chapter 6 207 KEY CHIP TEST FAILED The A1 CPU s front keyboard control chip does not work properly This message is displayed when an internal test 1 Al CPU fails Replace the Al CPU with a new one See Chapter 6 238 LO Z HEAD TEST FAILED An external test 31 LOW 7 HEAD fails Replace the low impedance test head See Chapter 9 245 VCXO LEVEL OUT OF SPEC Maximum VCXO level is incorrect in performing an adjustment test 36 3RD VCXO LEVEL ADJ or an adjustment test 39 SOURCE VCXO LEVEL ADJ In the 3RD VCXO LEVEL ADJ replace the receiver IF In the SOURCE VCXO LEVEL ADJ replace the source vernier 233 OUTPUT ATTENUATOR TEST FAILED An external test 21 OUTPUT ATTENUATOR fails Troubleshoot the output attenuator in accordance with Chapter 7 40 PHASE LOCK LOOP UNLOCKED A phase lock loop PLL circuits within the analyzer does not work properly Troubleshoot the analyzer in accordance with Chapter 6 When a annotation is displayed Service Modes are activated this error message does not appear even if a PLL circuit is not working 215 POST REGULATOR OUTPUT VOLTAGE OUT OF SPEC A power supply voltage of the A2 post regulator is out of its l
66. 1 MHz 7 dBm 100 MHz 19 dBm 15 MHz 7 dBm 200 MHz 19 dBm 200 MHz 7 dBm 300 MHz 19 dBm 300 MHz 7 dBm 500 MHz 19 dBm 500 MHz 7 dBm 800 MHz 19 dBm 800 MHz 7 dBm 1 GHz 19 dBm 1 2 GHz 7 dBm 1 2 GHz 19 dBm 1 5 GHz 7 dBm 1 5 GHz 13 dBm 10 MHz 7 dBm 1 8 GHz 7 dBm 1 MHz 1 dBm 1 MHz 7 dBm 10 MHz 1 dBm 1 GHz 7 dBm 15 MHz Performance Tests 7 Change the analyzer OSC level and frequency settings using 09C LEVEL Center and the numeric keys to test the analyzer at the following test points 2 1 MEASUREMENT ACCURACY TEST Description In this test calibrated standards from the 16190A Performance Test Kit are measured with the analyzer Then the analyzer measurement values are compared with the standards calibration values Specification See the Specifications of Operating Manual Set for details Measurement Accuracy Basic Accuracy 0 8 Test Equipment Performance Test Kit 2 2 4 2 2 16190A 3 4 inch Torque Wrench 136 N em PN 8710 1766 Fixture Stand only for High Temp Test Heads PN 04291 60121 Test Stage Stand only for High Temp Test Heads PN 04291 65021 Extension Rod only for High Temp Test 5 PN
67. 13 A3A1 SOURCE OSC 10 10 14 SEQUENCER 10 10 15 SOURCE LEVEL 10 10 16 DC BIAS 10 10 EXTERNAL TESTS 10 10 17 FRONT PANEL DIAG 10 10 18 DSK DR FAULT ISOL N 2 ee 10 10 19 POWER SWEEP LINEARITY 2 2 2 2 52 5 5 4 10 11 20 SOURCE FLATNESS 10 11 21 OUTPUT ATTENUATOR 10 11 22 RECEIVER GAIN 2 10 11 23 GAIN 2 2 2 10 11 24 VI NORMALIZER 10 11 25 FRONT 10 11 26 TRD LOSS 2 e 10 11 27 CABLE ISOLATION 10 12 28 TRDISOL NI TOV oaa a 10 12 29 TRD ISOL N V TOI 0 10 12 30 HIGH Z HEAD a 10 12 LOW Z HEAD 10 12 32 HIGH 10 12 33 HIGH TEMP LOW 10 12 ADJUSTMENT TESIS 10 13 34 HOLD STEP ADJ 10 13 35 BPF ADJ 10 13 36 3RD VCXO LEVEL ADJ 0 10 13 37 2ND LO PLL LOCK ADJ 2 e e o 10 13 38 SOURCE MIXER LEAK ADJ 10 13 39 SOURCE VCXO LEVEL ADJ oaaae 10 13 DISPLAY TESTS 10 13 40 TEST PATTERN I 2 10 13 41 TEST
68. 2 2 to access the RECEIVER GAIN test When RECEIVER GAIN is displayed press EXECUTE TEST 2 Perform the test according to the displayed instructions m If the test passes go to step 7 m If the test fails continue with the next step 9 Turn the analyzer power off Remove the D cable from the 1 ALC out connector remove the cable from the A4A2 second IF connector then connect the cable to the A3A1 ALC out connector The connector locations are shown in Figure 8 3 TOP VIEW A4A2 SECOND IF ALC Out 508003 Figure 8 3 A6 GAIN Test Location 4 Turn the analyzer power on 5 Press System SERVICE MENUS TESTS 2 3 to access the GAIN test When GAIN is displayed press EXECUTE TEST 6 Perform the test according to the displayed instructions m If the test passes reconnect the cables and replace the A4 First LO Receiver RF m If the test fails replace the receiver IF and reconnect the cables 8 4 Receiver Troubleshooting 7 Press f twice to access the FRONT ISOL N test When FRONT ISOL N is displayed press EXECUTE TEST 8 Perform the test according to the dis
69. 2 Check the 1st LO OSC Signal at A4A1J4 The 1st local oscillator signal at A4A1J4 is a swept 2 05958 GHz to 3 85858 GHz signal with the power level gt 16 dBm over the frequency range Perform the following steps to verify the 1st local signal at A4A1J4 a Remove the semi rigid cable from A4A1J4 and A4A2J3 and connect the equipment as shown in Figure 7 13 In this procedure connect the spectrum analyzer input to A4A1J4 b On the 4291B press Preset Sweep SWEEP TIME 2 0 x1 Trigger SWEEP HOLD During this procedure the start and stop frequencies are set to 1 MHz and 1 8 GHz respectively Source Troubleshooting 7 19 c Initialize the spectrum analyzer Then set the controls as follows Controls Settings Start Frequency 2 GHz Stop Frequency 4 GHz Reference Level 20 dBm Max Hold ON d On the 4291B press SINGLE to make a sweep Wait for the completion of the sweep and check that the signal level is higher than 16 dBm over the frequency range of 2 059 GHz to 3 858 GHz The displayed trace should be as shown in Figure 7 16 The measured level is lower than the actual level due to the BNC m BNC m cable s insertion loss in the high frequency range If the measured level is lower than the limit measure the cable s loss and compensate the signal level by the cable s loss m If the signal level and the trace are good continue with the next step m If the signal level or the trace is bad the
70. 3 17 SOURCE MIXER LOCAL LEAKAGE ADJUSTMENT 3 18 Required Equipment 3 18 3 18 OSC LEVEL CORRECTION CONSTANTS 3 20 Required Equipment 3 20 3 20 HOLD STEP ADJUSTMENT 2 2 1 2 1 a 3 21 Required Equipment 9 21 3 21 BAND PASS FILTER ADJUSTMENT ooa a 3 22 Required Equipment 3 22 Contents 2 3 22 DC BIAS LEVEL CORRECTION CONSTANTS OPTION 001 ONLY 3 24 9 24 10 MHz REFERENCE OSCILLATOR FREQUENCY ADJUSTMENT OPTION 1D5 ONLY 2 2 3 25 Required Equipment 3 25 3 25 Overall Troubleshooting TROUBLESHOOTING SUMMARY 4 2 INSPECT THE POWER ON SEQUENCE 4 4 Check the 4 4 Check the Front Panel LEDS o 4 4 Check Error Message o 4 5 Troubleshooting When Power Self test Failed MM 4 5 2 POST REGULATOR Test 4 6 VERIFY FUNCTIONAL GROUPS ME 4 1 Source MEL VV o 4 7 Test Equipment D 4 1
71. 4 mrad 2 0 mrad 200 MHz Z 0 1 78 0 0 0 25 8 200 MHz 0 rad 17 6 mrad 2 5 mrad 300 MHz Z 0 1 17 0 0 18 Q 300 MHz 0 rad 19 2 mrad 3 0 mrad 500 MHz Z Q 796 mQ mQ 90 mQ 500 MHz 0 rad 35 3 mrad mrad 4 0 mrad 600 MHz Z 0 812 mQ 88 mQ 600 MHz 8 rad 82 7 mrad 9 0 mrad 800 MHz Z 0 1 09 0 mQ 122 mQ 800 MHz 0 rad 80 1 mrad 9 0 mrad 1 GHz Z 0 2 16 0 0 0 27 9 1 GHz 0 rad 48 9 mrad mrad 6 0 mrad 1 6 GHz Z 0 6 79 9 0 0 86 0 1 6 GHz 0 rad 79 3 mrad 10 0 mrad 1 8 GHz Z 0 3 27 0 0 0 38 Q 1 8 GHz 0 rad 98 9 mrad 10 0 mrad 2 52 Performance Tests Test Head High Temp Low Z Standard 10 em Airline with Short Osc Level 250 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz 7 mQ 31 7 mQ mQ 1 7 mQ 1 MHz 0 280 mrad mrad 15 mrad 10 MHz 7 0 46 5 mQ 4 3 mQ 10 MHz 0 rad 43 3 mrad mrad 4 0 mrad 100 MHz Z Q 200 mQ mQ 27 mQ 100 MHz 0 rad 18 7 mrad 2 5 mrad 200 MHz Z 0 444 mQ 67 mQ 200 0 rad 19 8 mrad 3 0 mrad 300 MHz Z 0 742 mQ _ 110 mQ 300 MHz 0 rad 20 3 mrad 3 0 mrad 500 2 7 0 2 22 0 0 0 31 0 500 MHz 0 rad 25 4 mrad mrad 3 5 mrad 600 MHz Z 0 6580 0 0 78 Q 600 MHz 0 rad 42 4 mrad 5 0 mra
72. 4 1 1st LO is faulty Replace A4 Level gt 16 dBm over the frequency range 2 059 GHz to 3 858 GHz 2 6 GHz REF 20 0 dBm ATTEN 30 dB 17 51 dBm START 2 00 GHz STOP 4 00 GHz RES BW 3 MHz SWP 50 0 msec C6507016 Figure 7 16 1st LO OSC Typical Signal Single Mode at A4J4 f Reconnect the semi rigid cable to A4A1J4 and A4A2J3 At here the A4A1 1st LO is verified 7 20 Source Troubleshooting CHECK A3A1 SOURCE VERNIER OUTPUT The input signal to the Source Vernier is the 40 MHz reference signal coming from 5 see Figure 7 1 Before performing the procedures in this section verify the INT REF signal in accordance with the Check A5 Synthesizer Outputs section This ensures that the 40 MHz reference signal is good The three output signals from 1 are the 21 42 MHz signal with the level controlled by the level vernier the 8 MHz reference signal and the 40 kHz reference signal Perform the following procedures sequentially to verify the 21 42 MHz signal If the signal is bad replace In this procedure only the 21 42 MHz signal is verified This is because the 8 MHz and 40 kHz reference signals are verified by running internal test 11 in the Start Here The 21 42 MHz signal is observed using test equipment and its level is controlled by the 4291B self test functions For detailed information about the 4291B self test functions see the Service Key Menus 1 Check the 21 4
73. 8 0955 0701 81 1 Output 3 dB 28480 0955 0701 9 0955 0701 3 1 Input 3 dB ATT 28480 0955 0701 A20 04291 66520 2 1 Motherboard 28480 04291 66520 A22 04291 66522 4 1 DC Bias 1 2 Opt 001 28480 04291 66522 28 04291 66528 5 1 DC Bias 2 2 Opt 001 28480 04291 66523 58 0950 8208 1 1 FDD 28480 0950 3208 Replaceahle Parts 12 11 3 Under 6 Flat Cable 7 512006 Figure 12 5 Bottom View 2 RF Cables and Wires Note Alphabetic designators in Figure 12 5 show the cable markers Y 12 12 Replaceable Parts Table 12 8 Bottom View 2 RF Semi rigid Cables and Wires Ref Agilent Part Qty Description Connection Desig Number D B 04291 61006 9 Front Conn and Cable Assy STD Front A20 04291 61001 4 Front Conn and Cable Assy Opt 001 Front A20 A23 C 04291 61001 4 Front Conn and Cable Assy Opt 001 Front A20 A23 D See Table 12 4 RF Cable D 04291 61612 3 1 RF Cable Front S A8 See Table 12 4 RF Cable H Front A4 2 04396 61662 9 1 Flat Cable 1 A31 3 04396 61672 1 1 Wire 1 58 4 See Table 12 5 Wire 1 40 5 See Table 12 5 Flat Cable 1 6 04896 61651 6 1 Flat Cable 1 A53 T 04396 61662 9 1 Flat Cable Al A30 8 See Table 12 5 Wire Opt 001 A40 A2 A22 9 04291 61608 7 1 Flat C
74. ALL INT is selected as the default test The test number name and status abbreviation is displayed in the active entry area of the display See Figure 10 4 For the test status see Figure 10 4 The diagnostic tests are numbered from 0 to 44 select a test enter the desired test number using the numeric keypad 1 RPG knob GPIB command DIAG TEST lt numeric gt Each softkey in the tests menu is described below Tests Menu SERVICE EXCUTE system MENU TESTS TEST INTERNAL TESTS EXTERNAL TESTS ADJUSTMENT TESTS DISPLAY TESTS RETURN C6 10003 Figure 10 3 Tests Menu EXECUTE TEST DIAG TEST EXET Runs the selected test When the executed test requires user interaction CONT DIAG TEST CONT and the instruction appear on the display Follow the displayed instruction and press CONT to continue the test INTERNAL TESTS DIAG TEST 0 Selects the first internal test 0 ALL INT Service Key Menus 10 5 EXTERNAL TESTS DIAG TEST 17 Selects the first external test 17 FRONT PANEL DIAG ADJUSTMENT TESTS DIAG TEST 34 Selects the first adjustment test 34 HOLD STEP ADJ DISPLAY TESTS DIAG TEST 40 Selects the first display test 40 TEST PATTERN 1 Note After executing a test by pressing EXECUTE TEST an annotation Svc is displayed indicate any tests executed the analyzer settings changed to the test settings To return the analyzer to
75. Agilent Technologies service center and provide the revision of the analyzer s firmware The part number of the firmware diskette depends on the firmware revision The firmware revision of the analyzer is indicated on the revision label attached on the rear panel as shown in Figure 14 1 Firmware Rev 01 00 05514001 Figure 14 1 Firmware Revision Label Installing the Firmware Perform the following procedure to install the firmware into the analyzer 1 Turn the analyzer power off 2 Press the key While pressing the key turn the analyzer power on 3 Wait until the bootloader menu appears on the CRT as shown in Figure 14 2 Post Repair Procedures 14 3 SYSTEM UPDATE SYSTEM Rights Reserved BACKUP 0 c Copyright 1992 1997 Hewlett Packard Company BootLoader REV N NN MMM DD YYYY Current Firmwave Revision HP 4291B REV N NN MMM DD YYYY M 0 2 PREVIEW 1 2 Select Softkey REBOOT CES14002 Figure 14 2 Bootloader Menu Display 4 Insert the firmware diskette into the floppy disk drive on the front panel 5 Press SYSTEM UPDATE and CONTINUE The analyzer displays Loading From Disk and starts the firmware installation 6 Wait until the analyzer displays Update Complete 7 Press or turn the analyzer power off and on
76. Bottom View Miscellaneous Parts 12 14 Front Assembly Parts 1 5 Outside 12 16 Front Assembly Parts 2 5 12 17 Front Assembly Parts 3 5 2 12 18 Front Assembly Parts 4 5 12 19 Front Assembly Parts 5 5 12 20 Rear Assembly Parts 1 Outside 12 21 Rear Assembly Parts 2 Inside 12 22 Miscellaneous Parts 1 Side Viwes 12 23 Miscellaneous Parts 2 Chassis 12 24 Miscellaneous Parts 3 5 12 25 Test Station and Test Head Parts 12 28 ID Connector 2 2 12 34 Al EEPROM Location 2 13 4 2 Post Regulator Replacement 13 5 Replacement 2 13 6 A3A2 and 13 7 4 First Lo Receiver RF Replacement 13 8 Input and A8 dB Replacement 2 2 13 10 A22 A23 DC Bias Replacement 13 11 40 Preregurator Replacement 13 13 41 TRD Amp Replacement 13 14 Firmware Revision 1 14 3 Bootloader Menu Display 2 2 2 ee 14 4 Serial Number Plate
77. Chapter 9 180 CORR CONST DATA LOST DEFAULT DATA IS USED This message is displayed when the correction constants EEPROM data is lost and turned on in the service mode Troubleshoot the analyzer in accordance with Chapter 6 212 BACKUP SRAM R W ERROR The A1 CPU s BACKUP SRAM does not work properly This message is displayed when an internal test 2 Al VOLATILE MEMORY fails Replace the Al CPU with a new one See Chapter 6 211 CPU INTERNAL SRAM R W ERROR The A1 CPU s internal SRAM does not work properly This message is displayed when an internal test 2 Al VOLATILE MEMORY fails Replace the Al CPU with a new one See Chapter 6 223 DC BIAS TEST FAILED The DC bias level is out of limits This message is displayed when an internal test 16 DC BIAS fails Troubleshoot the source group in accordance with Chapter 7 204 DSP CHIP TEST FAILED The A1 CPU s DSP Digital Signal Processor does not work properly This message is displayed when an internal test 1 Al CPU fails Replace the Al CPU with a new one See Chapter 6 213 DSP SRAM R W ERROR The DSP s SRAM on the A1 CPU does not work properly This message is displayed when an internal test 2 A1 VOLATILE MEMORY fails Replace the 1 COU with a new one See Chapter 6 214 DUAL PORT SRAM R W ERROR The DSP s dual port SRAM on the Al CPU does not work properly This message is displayed when an internal test 2 Al VOLATILE MEMORY fails Replace the Al CPU with
78. DC bias circuit To observe this node perform the steps in the Bus Measurement Procedure When this node is selected the trace is typically flat and within 0 1 to 0 1 V 29 GND This node is located on the A2 post regulator and detects the ground voltage To observe this node perform the steps in the Bus Measurement Procedure When this node is selected the trace is typically flat and within 0 1 to 0 1 V Frequency Bus Node Descriptions The following paragraphs describe the 6 frequency bus nodes They are listed in numerical order 0 OFF The frequency bus is off This is the default setting 1 SOURCE OSC Source Oscillator This node is located in the source oscillator on the 1 Source Vernier and measures the loop back frequency of 40 kHz from the 85 68 MHz VCO The typical trace is flat and within 30 992 mU to 40 008 mU To observe this node perform the steps in the Bus Measurement Procedure At step 2 in the procedure press the following keys Preset Sweep NUMBER OF POINTS 2 x1 2 DIVIDER OUT Divider Output This node is located in the divider on the A3A1 Source Vernier and measures the 1 200 divider output frequency 40 kHz The typical trace is flat and within 30 992 mU to 40 008 mU To observe this node perform the steps in the Bus Measurement Procedure At step 2 in the procedure press the following keys Preset Sweep NUMBER OF POINTS 1 0 1 8 STEP
79. FOOT 01125 5 04291 04088 2 1 COVER 28480 04291 04083 04291 60121 7 1 FIXTURE STAND 28480 04291 60121 1 The entire part 12 34 Replaceable Parts 13 Replacement Procedures INTRODUCTION This chapter describes how to replace the analyzer s major assemblies The cover and panel removal procedures that are required for some assembly replacements are described first Then the replacement procedures for each major assembly is described TOP COVER REMOVAL Tools Required m Torx serewdriver T15 m Pozidriv screwdriver pt size 2 medium Procedure 1 Disconnect the power cable from the analyzer 2 Remove the two rear feet behind the top cover 8 Loosen the top cover rear screw 4 Slide the top cover toward the rear and lift it off BOTTOM COVER REMOVAL Tools Required m Torx serewdriver T15 m Pozidriv screwdriver pt size 2 medium Procedure 1 Disconnect the power cable from the analyzer 2 Place the analyzer upside down 3 Remove the two rear feet behind the bottom cover 4 Loosen the bottom cover rear screw 5 Slide the bottom cover toward the rear and lift it off Replacement Procedures 13 1 SIDE COVER REMOVAL Tools Required m Torx screwdriver T15 m Pozidriv screwdriver pt size 2 medium Procedure 1 Remove the top cover as described the COVER REMOVAL procedure 2 Remove the bottom cover as described in the BOTTOM COVER
80. INTERFACE yo Control I O Port CES11004 Figure 6 1 Digital Control Group Simplified Block Diagram 6 2 Digital Control Troubleshooting 5 1 Check the Power On Sequence See the INSPECT THE POWER ON SEQUENCE in the chapter 3 for checking the Power On Sequence Check the cn 1 and cn 2 Operations b Press and alternately Check that the two LEDs alternately light each time you press the keys m If both LEDs would not light continue with the next Check the A1 Eight LEDs m If the two LEDs do not alternately light the LED is still lit even if pressing the Ch 2 the Al CPU is probably faulty Replace the Al CPU m If the two LEDs alternately light each time you press the keys the Al CPU is probably working properly Continue with the TROUBLESHOOT THE A51 GSP AND A52 LCD in this chapter Check the A1 Eight LEDs There are eight LEDs on the 1 CPU These LEDs should be in the pattern shown in Figure 6 2 at the end of the power on sequence Perform the following procedure to check the A1 eight LEDs a a Turn the analyzer turn off b Remove the bottom cover of the analyzer Turn the analyzer power on Look at the A1 eight LEDs Some of the LEDs light during the power on sequence At the end of the power on sequence the LEDs should stay in the pattern shown in Figure 6 2 If the LEDs stay in the other pattern
81. MHz Z 0 2 21 Q Q 0 31 0 500 MHz 8 rad 25 3 mrad 3 5 mrad 600 MHz Z Q 6 41 0 Q 0 78 Q 600 MHz 8 rad 41 2 mrad 5 0 mrad 1 GHz Z 0 4 02 0 0 0 52 Q 1 GHz 0 rad 46 7 mrad 6 0 mrad 1 8 GHz Z 0 2 20 9 0 0 22 0 1 3 GHz 8 rad 99 6 mrad 10 0 mrad 1 6 GHz 7 0 2 06 0 0 0 16 0 1 6 GHz 0 rad 191 mrad mrad 15 mrad 1 8 GHz Z 0 3 51 9 0 0 37 Q 1 8 GHz 8 rad 95 8mrad mrad 10 0 mrad 2 46 Performance Tests High Temp Low Impedance Test Head Option 014 Test Head Standard Osc Level Frequency Measurement Test Limit Parameter 1 MHz Y uS 80 2 uS 10 MHz Y uS 32 2 uS 100 MHz Y uS 52 4 uS 200 MHz uS 76 4 uS 300 MHz Y mS 99 9 5 500 MHz Y mS 148 5 600 MHz Y mS 189 S 800 MHz Y mS 245 ps 1 GHz Y mS 305 5 1 3 GHz Y mS 478 yS 1 6 GHz mS 604 pS 1 8 GHz Y mS 695 pS Test Head High Temp Low Z Standard Open Osc Level 41 mV Frequency Measurement Test Limit Parameter 1 MHz Y uS 30 2 pS 10 MHz Y uS 32 2 pS 100 MHz Y uS 52 4 5 200 MHz Y uS 76 5 uS 300 MHz Y mS 99 9 uS 500 MHz Y mS 148 pS 600 MHz Y mS 189 pS 800 MHz Y mS 246 pS 1 GHz Y mS 305 pS 1 3 GHz Y mS 479 uS 1 6 GHz mS 604 pS 1 8 GHz Y mS 696 pS High Temp Low Z Open 250 mV Test Result Test Result
82. Option 013 m High Temperature Low Impedance Test Head Option 014 Note Make sure all of the assemblies listed above are firmly seated before performing i the procedures in this chapter Y Y Allow the analyzer to warm up for at least 30 minutes before you perform any procedure in this chapter Figure 9 1 and Figure 9 2 are transducer group simplified block diagrams For more information about the circuit operation see Chapter 11 Transducer Troubleshooting 9 1 31 9v o 0410023 selg 90 Wold dwy 1891 s9uepadul jueuieJnseelA Figure 9 1 Transducer Group Block Diagram 1 of 2 9 2 Transducer Troubleshooting FLO 140 1891 4 91 46 190 1891 oouepedui duiej u6iH 9142 UGZ 506 482 1750 1256 91920 2001 91480 VOS puue JUSUISIASTAA eus jueuieJnsee U0G 1 e m m e mom mom mom nd 6509004 Figure 9 2 Transducer Group Block Diagram 2 of 2 9 3 Transducer Troubleshooting TRANSDUCER GROUP TROUBLESHOOTING SUMMARY This section summarizes the troubleshooti
83. Oscillator VCO Tuning Voltage This node is located in the third local oscillator on the A6 receiver IF and detects the 85 6 MHz VCXO tuning voltage To observe this node perform the steps in the Bus Measurement Procedure When this node is selected the trace is typically flat and within 0 1 U to 3 0 U 24 3RD LO LEVEL This node is located in the A6 receiver IF and detects the third local oscillator signal level To observe this node perform the steps in the Bus Measurement Procedure 25 AD VREF A D Converter Voltage Reference This node is located in the A6 receiver IF and detects the reference voltage of the A D converter The typical trace at preset condition is flat and within 0 16 U to 0 24 To observe this node perform the steps in the Bus Measurement Procedure 26 DC BIAS VOLTAGE This node is located on the A23 DC bias 2 2 and detects the DC bias voltage To observe this node perform the steps in the Bus Measurement Procedure When this node is selected the trace is typically 1 10 of the DC bias voltage setting 10 24 Service Key Menus 27 DC BIAS CURRENT This node is located on the A23 DC bias 2 2 and detects the DC bias current To observe this node perform the steps in the Measurement Procedure When this node is selected the trace is typically 100 9 V of the DC bias current setting I 28 GND A22A23 This node is located on the A23 DC bias 2 2 and detects the ground voltage of the
84. REMOVAL procedure 3 Remove the two screws at the side strap handle caps to remove the strap 4 5 Slide off the side cover toward the rear For the other side cover repeat steps 8 and 4 FRONT PANEL REMOVAL Tools Required m Pozidriv screwdriver pt size 2 medium m Flat blade screwdriver Procedure 1 Place the analyzer upside down 2 Remove two front feet 3 Remove four screws from the bottom of the front frame 4 5 Turn the analyzer over into the correct position Remove the top trim strip from the front frame by prying the trim strip up with a flat screwdriver Remove six screws from the top of the front frame Gently pull the front panel knob to remove the front panel assembly from the front frame 13 2 Replacement Procedures REAR PANEL REMOVAL Tools Required m Torx screwdriver T15 m Pozidriv screwdrivers pt size 1 small size 2 medium Procedure 1 OO 5 Remove the top bottom and side covers as described in the SIDE COVER REMOVAL procedure Place the analyzer upside down Remove four screws from the bottom of the rear frame Turn the analyzer over into the correct position Remove the top shield plate Disconnect the two cables power line Remove the RF flexible cables and from A5 Synthesizer Remove the RF cable V from A60 Frequency Reference Option 1D5 Gradually push the A40
85. System SERVICE MENU TESTS 2 EXECUTE TEST to run the internal test 2 Al VOLATILE MEMORY c Check no error message displayed At the end of this test the analyzer returns the control settings to the default values power on reset If the test fails the analyzer displays an error messages for a few second before returning to the defaults m If no error message is displayed the 1 volatile memories are verified Continue with the next Check the A30 Front Keyboard m If one of error messages listed below is displayed the A1 CPU is faulty Replace the A1 CPU CPU INTERNAL SRAM R W ERROR DSP SRAM R W ERROR DUAL PORT SRAM R W ERROR CPU BACKUP SRAM R W ERROR 5 Check the A30 Front Keyboard The A30 front keyboard can be checked using the external test 17 FRONT PANEL DIAG Press PRESET SYSTEM SERVICE MENU TESTS 1 7 EXECUTE TEST to run the external test 17 b Press all of the front panel keys The pressed abbreviated key name should be displayed at a key pressed When you rotate the RPG knob the RPG tuned direction CW or CCW and its response speed SLOW MID FAST should be displayed So you can check every key on the A30 Keyboard except for PRESET If you want to exit this test press PRESET If one or more keys seems to be defective replace the A30 front keyboard m If all keys seem to be good the A30 front keyboard is verified Continue with the next Check the A53 FDD 6 Check the
86. Voltage 90 to 132 Vac 198 to 264 Vac Frequency 47 to 63 Hz Power 3800 VA maximum Power Cable In accordance with international safety standards this instrument is equipped with a three wire power cable When connected to an appropriate ac power outlet this cable grounds the instrument frame The type of power cable shipped with each instrument depends on the country of destination Refer to Figure B 1 for the part numbers of the power cables available Warning For protection from electrical shock the power cable ground must not be defeated The power plug must be plugged into an outlet that provides a protective earth ground connection B 2 Power Requirement OPTION 900 United Kingdom Earth Plug BS 1363A 250V Cable 8120 1351 OPTION 902 European Continent Earth Neutral Plug CEE VIL 250V Cable 8120 1689 OPTION 904 U S Canada OS AC Line2 Farth Line 1 Plug NEMA 6 15P 250V 15A Cable 8120 0698 OPTION 906 Switzerland Line Plug SEV 1011 1959 24507 12 250V Cable 8120 2104 India Republic of S Africa a Ground earth 3 Neutral OPTION 917 Plug SABS 164 250V Cable 8120 4211 NOTE Each option number includes family of cords and connectors of varoius materials and plug body configurations straight 90 etc OPTION 901 Australia New Zealand Neutral Line Plug NZSS 198 AS C112 250V Cable 8120 1369 OP
87. adjust troubleshoot and repair the instrument 7 is a U S registered trademark of the Bunker Ramo Corporation viii Contents 1 General Information INTRODUCTION 2 0 2 a 1 1 ORGANIZATION OF SERVICE 1 1 ANALYZERS COVERED BY 1 8 TABLE OF SERVICE TEST 1 4 2 Performance Tests INTRODUCTION 1 2 2 2 1 GENERAL INFORMATION 2 1 Warm Up Time 2 1 Ambient Conditions 2 1 Calibration Cycle sn 2 1 Performance Test o 2 1 Recommended Test Equipment o 2 2 FREQUENCY ACCURACY TEST M 2 8 Description rn MEL 2 8 Specification MEL 2 8 Test Equipment 220202022222 2 8 E 2 8 OSC LEVEL ACCURACY TEST MM 2 5 Description rn MEL 2 5 Specification ML 2 5 Test Equipment 220202022222 2 5 Procedure ML 2 5 MEASUREMENT ACCURACY 5 2 8 Description 2 MEL 2 8 Specification ML 2 8 Test Equipment 2 2 MM 2 8 Procedure E 2 8 Save the Analyzer Setup MV 2 8 Analyzer
88. an external test 18 DSK DR FAULT ISOL N fails Replace the A58 FDD with a new one See Chapter 6 231 POWER SWEEP LINEARITY OUT OF SPEC This message is displayed when an external test 19 POWER SWEEP LINEARITY fails Troubleshoot the analyzer in accordance with Chapter 4 232 SOURCE FLATNESS TEST FAILED An external test 20 SOURCE FLATNESS fails Troubleshoot the source group in accordance with Chapter 7 Messages 10 233 OUTPUT ATTENUATOR TEST FAILED An external test 21 OUTPUT ATTENUATOR fails Troubleshoot the output attenuator in accordance with Chapter 7 2344 LOSS TEST FAILED An external test 22 LOSS fails Troubleshoot transducer group in accordance with Chapter 9 235 TRD ISOL N I TO V TEST FAILED An external test 28 TRD ISOL N I TO V fails Troubleshoot the transducer group in accordance with Chapter 7 236 TRD ISOL N V TO I TEST FAILED An external test 29 ISOL N V TOT fails Troubleshoot the transducer group in accordance with Chapter 9 237 HEAD TEST FAILED An external test 30 HIGH 7 HEAD fails Replace the high impedance test head See Chapter 9 238 LO Z HEAD TEST FAILED An external test 31 LOW 7 HEAD fails Replace the low impedance test head See Chapter 9 239 FRONT ISOL N TEST FAILED An external test 25 FRONT ISOL N fails Troubleshoot the receiver group in accordance with Chapter 8 240 CABLE ISOL N TEST FAILE
89. analyzer because the test head characteristics don t affect the DC bias level The following test procedure is common for all test heads 1 Connect the power sensor to the power meter Calibrate the power meter for the power sensor 2 Connect the test equipment as shown in Figure 2 7 The BNC f Banana adapter must be connected to voltage measurement connectors with the GND connector connecting to the LO terminal Performance Tests 2 11 FOR NORMAL TEMPERATURE TEST HEAD BNC m BNC m Cable 61 cm BNC f Banana Adapter Multimeter 00000000 DO 0000 FOR HIGH TEMPERATURE TEST HEAD BNC m BNC m Cable 61 cm N m BNC f Adapter Adapter D gt E Test Station Test Head PNC Banana apter Multimeter P V Meas oe 1 00000000 DO 0000 E Coo Test Station Stand Fixture Stand Extension Rod 502011 Figure 2 7 DC Bias Level Accuracy Test Setup 3 Initialize the multimeter then set the NPLC to 100 4 Press Preset to initialize the 4291B 5 Press Source 0 to minimize the OSC level 6 Toggle on OFF to BIAS off to t
90. attenuator to 20 dB 30 dB sets the A7 output attenuator to 30 dB 40 dB sets the A7 output attenuator to 40 dB 50 dB sets the A7 output attenuator to 50 dB 60 dB sets the A7 output attenuator to 60 dB OSC DAC AUTO man DIAG SERV SOUR LEV DAC MODE AUTO MAN Toggles the OSC DAC control mode the 1 source vernier to automatic mode and manual mode In the automatic mode the analyzer sets the OSC DAC according the measurement settings In the manual mode the OSC DAC output is controlled by the 050 DAC VALUE softkey OSC DAC VALUE DIAG SERV SO0UR LEV DAC VAL lt numeric gt Allows you to enter the level DAC control value 0 to 32767 This value is used when the OSC DAC control mode is set to manual OSC OUT ON off DIAG SERV SOUR STAT OFFJ ONJO 17 Toggles the OSC switch in the 1 source vernier to turn on and off the OSC signal Note settings must be turned to auto except when checking the analog circuits Y Service Key Menus 10 33 DC BIAS CONTROL MENU Figure 10 14 shows the DC bias control menu hierarchy To display the DC bias control menu press System SERVICE MENU SERVICE MODES and DC BIAS Each softkey in the source control menus is described below POLARITY AUTO CUR OFST AUTO SERVICE MENU SERVICE MODES DC BIAS C6 10014 10 34 Service Key Menus DC BIAS CONTROL MENU DC BIAS AUTO man POLARITY AUTO CUR OFST AUT
91. be performed after the replacement of an assembly or the EEPROM These are the recommended minimum procedures to ensure that the replacement is successfully completed When you replace an assembly or the EEPROM on the A1 CPU perform the adjustments and updating correction constants CC then verify the analyzer performance according to Table 14 1 For the detailed procedure of the adjustments and updating correction constants see Chapter 3 For the detailed verification procedures see this manual s chapter specified in Table 14 1 Table 14 1 Post Repair Procedures Replaced Assembly or Part Adjustments Correction Constants CC Verification Al CPU Firmware Installation Inspect the Power On Sequence 2 Internal Test 2 1 VOLATILE MEMORY Al EEPROM Step Pretune CC OSC Level CC DC Bias Level CC Inspect the Power On Sequence 2 OSC Level Accuracy Test 4 DC Bias Level Accuracy Test 4 A2 Post Regulator CAL OUT Level Inspect the Power On Sequence 2 Frequency Accuracy Test 1 Source Vernier Source VCXO Adjustment OSC Level CC Inspect the Power On Sequence 2 OSC Level Accuracy Test 4 External Test 25 FRONT ISOL N A3A2 2nd LO Second LO PLL Lock Adjustment Source Mixer Local Leakage Adjustment OSC Level CC Inspect the Power On Sequence 2 OSC Level Accuracy Test 4 External Test 25 FRONT ISOL N 1 See the Firmware Installation procedure in this
92. by using the numeric keypad fr 1 or RPG knob The node number and name are displayed in the active entry area of the display and the node abbreviation is displayed in the brackets of the menu FREQ BUS OFF DIAG SERV BUS FREQ lt numeric gt Allows you to select one of the frequency bus nodes The frequency bus nodes are numbered from 0 to 7 To select the desired frequency bus node press this softkey and then enter the frequency node number by using the numeric keypad 1 or RPG knob The node number and name are displayed in the active entry area of the display and the node abbreviation is displayed in the brackets of the menu Service Key Menus 10 17 AZ SWITCH on OFF DIAG SERV BUS AZER 10FFl ONIOI 17 Toggles the auto zero switch on and off WAIT COUNT DIAG SERV BUS WAIT lt numeric gt Sets the wait count to specify the wait time in the DC bus measurement The wait count is an integer from 2 to 32767 When the wait count is the analyzer waits N 12 5 before each DC bus measurement Bus Measurement In this service mode the analyzer measures and displays the signal voltage or frequency at the selected bus node This service mode allows you to check the circuit operation by monitoring the circuit signal without accessing the inside of the analyzer The analyzer has 36 bus nodes for this service mode Of these 29 bus nodes are for DC voltage measurement These nodes are connected to the A D conv
93. cable O 8 8000800 4 fe 509005 Figure 9 5 Cable Isolation Check Points High Temperature Test Head Trouble Isolation Opt 013 and 014 If the test numbers 32 or 33 fail perform the following trouble isolation procedures High Z Test Head Opt 013 1 Visually inspect the test head s 7 mm connector and three connectors to be connected to the test station m If the connector is good continue with the next step m If the connector is bad replace the connector Connect SHORT standard to the 7 mm connector Measure the test head impedance by pressing Preset Marker and enter desired frequency m If the measurement value is greater than 1 at 1 MHz I ch contact may be bad m If the measurement value is almost 25 0 at all frequencies V ch contact may be bad m If the measurement value is unstable and has much noise S ch contact may be bad Connect OPEN standard to the 7 mm connector Transducer Trouhleshooting 9 7 5 Measure the test head admittance by pressing Meas MORE 1 5 ADMITTNCE MAGCIYI m If the measurement data around 1 MHz is unstable it is possible that the guard conductor in the triaxial cable is shorting to the ground conductor of the cable in the test head Low Z Test Head Opt 014 1 Visually inspect the test head s 7 mm connector and three connectors to be connected to the test station m If the connector is good continue with the next step m If the conne
94. condition or the like which if not correctly performed or adhered to could result in damage to or destruction of part or all of the product This Note sigh denotes important information It calls attention to a procedure practice condition or the like which is essential to highlight Affixed to product containing static sensitive devices use anti static handling procedures to prevent electrostatic discharge damage to component Certification Agilent Technologies Company certifies that this product met its published specifications at the time of shipment from the factory Agilent Technologies further certifies that its calibration measurements are traceable to the United States National Institute of Standards and Technology to the extent allowed by the Institution s calibration facility or to the calibration facilities of other International Standards Organization members Warranty This Agilent Technologies instrument product is warranted against defects in material and workmanship for a period of one year from the date of shipment except that in the case of certain components listed in General Information of this manual the warranty shall be for the specified period During the warranty period Agilent Technologies Company will at its option either repair or replace products that prove to be defective For warranty service or repair this product must be returned to a service facility designated by Agilent Technologies Buy
95. each measured value is within limits 14 A6 SEQUENCER Verifies the A D sequencer circuit in the receiver IF This test measures the frequency 80 kHz of the A D sequence output at frequency bus node 7 and checks that the measured value is within limits 15 SOURCE LEVEL Verifies the source circuit This test measures the A3A3 output at DC bus node 15 in 1 It then checks that each measured value is within limits 16 DC BIAS Verifies the A22 and A23 DO bias circuit This test measures A23 output at DC bus node 26 and 27 It then checks that each measured value is within limits EXTERNAL TESTS This group of tests require either external equipment and connections or operator interaction torun These tests are used in the T roubleshooting chapter 17 FRONT PANEL DIAG Checks the RPG and all front panel keys on the A30 keyboard The abbreviated name is displayed when pressing one of the keys or rotating the RPG 18 DSK DR FAULT ISOL N Checks the FDD Flexible Disk Drive When this test is started a bit pattern is written to the flexible disk Then the pattern is read back and checked This write pattern check is repeated from the low to high addresses 10 10 Service Key Menus Note After this test is performed the data stored on the floppy disk is lost Y 19 POWER SWEEP LINEARITY Checks that the power sweep linearity is within limits As a result A3AI A3A2 and A3A3 verified The analyzer mai
96. equipped with option 1D5 4 Required for adjusting an analyzer equipped with Option 105 1 4 General Information Table 1 1 Recommended Test Equipment continued Equipment Critical Specifications Recommended Model Qty Usel Agilent Part Number Cables TRD cable PN 04291 65001 1 T Type N cable 50 Q 11500B or part of 1185181 4 A T BNC cable 61 cm 50 Q PN 8120 1839 3 P A T BNC cable 122 cm 50 Q PN 8120 1840 2 P A T GPIB cable 10833A B C 3 BNC f SMA f adapter 50 9 1350 0562 1 SMC f BNC f adapter 50 Q 1250 0832 1 SMB f BNC f adapter 50 0 1250 1236 1 N m BNC f adapter 50 9 1250 1476 2 P A T SMA m BNC f adapter 50 9 PN 1250 1548 1 T SMA m SMA f right angle adapter 50 9 PN 1250 1741 1 T APC3 5 m APC3 5 f adapter 50 Q PN 1250 1866 1 PA APC7 N f adapter 50 0 11524 or part of 85032B 1 P BNC SMA m adapter 50 9 PN 1250 1548 1 A BNC f Banana adapter PN 1251 2277 1 1 11851B includes three N m N m cables of 61 and N m N m cable of 88 2 The 85032B includes two APC7 N f adapters General Information 1 8 Performance Tests INTRODUCTION This chapter provides the 4291B RF Impedance Material Analyzer performance tests These performance tests are used to verify that the analyzer s performance meets its specifications General information about the performance tests is provided first Then step by ste
97. error message If no error message is displayed continue with Check the Fan is Rotating Error Messages Instruction POWER FAILED ON One or more of the A2 power supplies 15 V 8 5V 5 3 V 5 V 5 V 15 V are displayed in of the message The displayed power supplies are shut down because of trouble on the A2 post regulator Continue with CHECK THE A2 EIGHT LEDs in this START HERE POWER FAILED ON PostRegHot This indicates the A2 power supplies 15 V 8 5 V 45 3 V 5 V 5 V 15 V are shut down because the hot heat sink on the A2 post regulator is too hot Cool down the analyzer for about 30 minutes Then turn the analyzer power on If this message is still displayed replace A2 post regulator These messages are associated with the power supply functional group These messages indicate the A2 protective shutdown circuit is shutting down some of the 2 power supplies to protect them from over current over voltage under voltage or too hot conditions For more information about the A2 shutdown circuit see Figure 5 18 Power Supply Block Diagram 2 Note These messages are displayed only after the power on sequence When one of these messages is displayed the analyzer s front panel keys are disabled In the power on sequence the analyzer checks the shutdown status of the A2 power supplies 15 V 5 V 5 V 15 V If a power supply is shutdown the analyzer displays an error message and stops its operat
98. frequency through a 1 16 divider Therefore the measured value is 1 16 of the actual frequency For example the measured value at the start frequency 1 MHz is 2 0113 U 32 181 MHz divided by 16 The unit U in the frequency bus measurement is equivalent to MHz ii Press Marker 1 C 8 to move the marker to the stop frequency 1 8 GHz Then check that the marker reading is 3 7681 U 0 01 0 iii Check that the displayed trace is straight see Figure 7 4 m If the marker readings and the trace are good continue with the next step m If one or more of the marker readings or the trace is bad the FRAC OSC is probably faulty Replace A5 7 8 Source Troubleshooting Straight Trace 2 0113 0 0 01 U at Hz 7 2 C 3 7681 U 0 010 1 8 2 8 1MHz MHz 5507007 Figure 7 4 Typical FRAC OSC Signal in Frequency Bus Measurement d Remove the H cable from the A5J7 FN OUT connector Then connect the equipment as shown in Figure 7 5 BNC m BNC m Cable 122 cm 4291B Top View Adapter cea 507005 TO EXT REF Input SMB f BNC Do TO EXT REFERENCE Spectrum Analyzer OUTPUT
99. is faulty See the instruction of the EEPROM CHECK SUM ERROR message POWER FAILED ON One or some of A2 power supplies 15 V 8 5 V 5 3 V 5 V 5 V 15 V are displayed in of the message The displayed power supplies are shut down due to the trouble on the A2 post regulator Continue with the Power Supply Troubleshooting chapter POWER FAILED PostRegHot This indicates A2 power supplies 15 V 8 5 V 5 3 V 5 V 5 V 15 V are shut down due to too hot heat sink on A2 post regulator Cool down the analyzer for about 30 minutes Then turn the analyzer power on If this message is still displayed replace A2 post regulator PHASE LOCK LOOP UNLOCKED This indicates one or some of PLLs phase lock loops in the oscillators listed below is not working properly These oscillators are checked in the internal test 0 ALL INT Continue with the next Check the Power On Selftest in where the ALL INT test is executed Identify the First Failed Test If the power on selftest fails and POWER ON TEST FAILED message is displayed execute the ALL INT test to identify the first failed test using the following procedure If internal test 1 A1CPU is the first failed test replace 1 CPU Otherwise see Chapter 4 Press PRESET 5 5 SERVICE MENU TESTS 0 and to access the internal test 0 ALL INT b Press EXECUTE TEST to execute the ALL INT test c Wait until the test result PASS or FAIL is
100. limits The typical voltages are listed in Table 7 3 m If the control voltages are good continue with the next step m If the control voltages are bad inspect the cable between A7 and A20J20 If the cable is good the attenuator control circuit in the A2 post regulator is probably faulty Replace A2 Source Troubleshooting 7 29 Table 7 3 A7 Attenuation Test Settings Attenuation A7J1 A7J2 A7J3 Voltage Voltage Voltage OdB High Low Low 10 dB Low Low Low 20dB High High Low 30 dB Low High Low 40 dB Low Low High 50 dB High High High 60 dB Low High High 1 Is within 8 4 V to 16 12 V typical 2 Is 0 V typical d Repeat steps b and c to check A7 in accordance with Table 7 3 At this point the A7 attenuator control signals are verified 7 30 Source Troubleshooting CHECK A22 DC BIAS 1 2 OUTPUT Use this procedure for a DC bias out failure to isolate the trouble between A22 and A23 The 4291B DC bias circuit consists of A22 and A23 as shown in Figure 7 1 Therefore if A22 is operating correctly A23 should be faulty Perform the following procedures to verify the A22 output If the output is bad replace A22 Otherwise replace A23 In this procedure the control signal is set using the 4291B service functions For detailed information about the service functions see the Service Key Menus 1 Check A22 Output Voltages A22 generates the DC bias
101. move the marker to the peak of the 21 42 MHz signal f Check that the frequency is 21 42 MHz and the level is higher than 18 dBm The displayed trace should be as shown in Figure 7 18 m If the signal is good is verified m If the signal is bad replace 1 21 42 MHz Level gt 18 dBm MKR 21422 MHz REF 0 0 dBm ATTEN 20 dB 16 20 dBm 10 dB CENTER 2142 MHz SPAN 1 00 MHz RES BW 10 kHz VBW 30 kHz SWP 30 0 msec 7507018 Figure 7 18 Typical 21 42 MHz Signal 7 22 Source Troubleshooting CHECK 2 2ND OUTPUTS The two input signals to A3A2 are the 520 MHz signal coming from A5 and the 21 42 MHz signal coming from 1 See Figure 7 1 Before performing the procedures in this section verify the 520 MHz signal in accordance with the Check A5 Synthesizer Outputs section and verify the 21 42 MHz signal in accordance with the Check A3A1 Source Vernier Output section The two output signals from A3A2 are the 2 08 GHz 2nd local oscillator signal going to the A442 Receiver IF and the 2 05858 GHz signal going to the A3A3 source Perform the following procedures sequentially to verify these signals If one of the signals is bad replace A3A2 In this procedure the 2 05858 GHz signal level is controlled by the 4291B self test functions For detailed information about the 4291B self test functions see the Service Key Menus 1 Che
102. normal operation cycle the analyzer power off then on or press PRESET Note While any test is being executed do not change the analyzer setting using the i front panel keys the GPIB or the I BASIC program If the setting is changed during test execution the test result and the analyzer operation are undefined Test Status When selecting a test the test status abbreviation is displayed as shown in Figure 10 4 TEST O ALL INT a Test Number M Test Status Abbreviation Test Name C6 10004 Figure 10 4 Test Status on the Display To see the test status of the desired test enter the desired test number using the numeric keypad fr or RPG knob Also the three GPIB commands listed below are available to get the test status using GPIB 10 6 Service Key Menus returns the test status The lt numeric gt specifies the test number and is an integer from 0 to 44 DIAG TEST RES numeric TST executes internal test 0 ALL INT and returns the test result gt DIAG INIT RES A sample program using the command DIAG TEST RES is as shown below This program displays the test status of internal test 1 See the 4291B Programming Manual for more information returns the power on self test result ASSIGN Hp4291 TO 717 When IBASIC is used replace 717 to 800 OUTPUT 0Hp4291 DIAG TEST RES 1
103. of the BNC f SMA f adapter is mated with the APC 3 5 connector of a different type 2 Initialize the frequency counter Then set the controls as follows Controls Settings Sample Rate Midrange Range Switch 500 MHz 26 5 MHz INT EXT Internal Switch rear panel 9 Press to initialize the analyzer Then set the controls as follows Control Keystrokes Settings Frequency Span 9 x1 Span ZERO Center Center 1 G n Frequency 1 GHz OSC Level 0 2 Source 2 x1 V 4 Wait for the frequency counter reading to settle 5 Subtract 1 GHz analyzer setting from the frequency counter reading and record the result on the performance test record 2 4 Performance Tests OSC LEVEL ACCURACY TEST Description This test uses a power meter and a power sensor to measure the actual power level of the stimulus signal at several frequencies from 1 MHz to 1 8 GHz Specification See the Specifications of Operating Manual Set for details e dB x f M Hz OSC level accuracy 1500 where depends on temperature conditions as follows when referenced to 235 C 2 2 2 2 2 2 22 2 24 2 dB other environmental temperature conditions 4 dB B depends on OSC level as follows Pose gt 5 UBM 2 2 22 2 2 2 2
104. of these operation modes see Chapter 11 1 Check the 1st LO OSC Signal at A4A1J3 The 1st local oscillator signal at A4A1J3 is a swept 2 05958 GHz to 3 85858 GHz signal with the power level between 5 dBm to 5 dBm over the frequency range Perform the following steps to verify the 1st local oscillator signal at A4A1J3 a Remove the C semi rigid cable from A4A1J3 and connect the equipment as shown in Figure 7 13 In this procedure connect the spectrum analyzer input to A4A1J3 4 2 BNC m BNC m Cable 122 TO EXT REF Input REFERENCE 4291B Top View 2 Spectrum Analyzer H oo 9 OO C3 SMA m BNC f oo gt OUTPUT A4A1J3 A4A2J8 A4A1J4 E Adapter BNC m BNC m Cable 61 cm n 507013 Figure 7 13 1st LO OSC Signal Test Setup b Press Preset Sweep SWEEP TIME 2 0 1 SWEEP HOLD Source Troubleshooting 7 17 During this procedure the start and stop frequencies are set to 1 MHz and 1 8 GHz respectively These start an
105. ordering and shipment from the Agilent Technologies Parts Center in Mountain View California 2 No maximum or minimum on any mail order there is a minimum order amount for parts ordered through a local Agilent Technologies office when the orders require billing and invoicing 9 Prepaid transportation there is a small handling charge for each order 4 No invoices To provide these advantages a check or money order must accompany each order Mail order forms and specific ordering information are available through your local Agilent Technologies office addresses and phone numbers are located at the back of this manual Replaceable Parts 12 1 EXCHANGE ASSEMBLIES Under the rebuilt exchange assembly program certain factory repaired and tested assemblies are available on a trade in basis These assemblies are offered at lower cost than a new assembly while meeting all of the factory specifications required of a new assembly REPLACEABLE PARTS LIST Replaceable parts tables list the following information for each part 1 Agilent Technologies part number 2 Part number check digit CD 3 Part quantity as shown in the corresponding figure There may or may not be more of the same part located elsewhere in the instrument Part description using abbreviations see Table 12 2 A typical manufacturer of the part in a five digit code see Table 12 1 The manufacturer s part number Table 12 1 Manufacturer
106. peak inverse voltage cadmium plate PNP positive negative positive CRT cathode ray tube P O part of CW clockwise POLY polystyrene DE PC deposited carbon PORC porcelain DR drive POS position s ELECT electrolytic POT potentiometer ENCAP encapsulated PP peak to peak EXT external PT point F farads PWV peak working voltage f femto RECT rectifier FH flat head RF radio frequency FILH fillister head RH round head or right hand FXD fixed RMO rack mount only G giga RMS root mean square GE germanium RWV reverse working voltage GL glass S B slow blow GRD ground ed SCR screw H henries SE selenium HEX hexagonal SECT section s HG mercury SEMICON semiconductor HR hour s SI Silicon Hz hertz SIL silver IF intermediate freq SL slide IMPG impregnated SPG Spring INCD incandescent SPL special INCL include s SST stainless steel INS insulation ed SR split ring INT internal STL Steel k kilo TA tantalum LH left hand TD time delay LIN linear taper TGL toggle LK WASH lock washer THD thread LOG logarithmic taper TI titanium LPF low pass filter TOL tolerance m milli TRIM trimmer M meg TWT traveling wave tube MET FLM metal film H micro MET OX metallic oxide VAR variable MFR manufacturer VDCW de working volts MINAT miniature W with MOM momentary watts MT
107. pin 6 GND of the cable within 22 0 V to 27 0 V using a voltmeter with a small probe m If the voltmeter reading is out of the limits replace the A40 pre regulator m If the voltmeter reading is within the limits the A40 pre regulator is verified Turn the analyzer power off and reconnect the cable to the 45031 Then continue with the next Check the 50 DC DC Converter section 4291B Top View A50 DC DC Converter A40 Pre Regulator Pin1 Brown 24V A2 Post Regulato GND 000000 CES05007 Figure 5 7 A40J1 Output Voltage 2 Check the A50 DC DC Converter Turn the analyzer power off Disconnect a cable form the A50J3 The A50J3 location is shown in Figure 5 7 Turn the analyzer power on Check the voltage between the A50J3 pin 1 and pin 6 GND within 4 59 V to 5 61 V using a voltmeter with a small probe m If the voltmeter reading is out of the limits replace the 50 DC DC Converter Power Supply Troubleshooting 5 11 m If the voltmeter reading is within the limits the 50 5 VD power supply is verified Turn the analyzer power off and reconnect the cable to the A50J3 Then continue with the next Disconnect Cables on the A1 CPU section 3 Disconnec
108. preregulator toward the rear to pull the rear panel assembly out from the rear frame and remove the all cables connected to the rear panel 1 CPU REPLACEMENT Tools Required m serewdriver T15 m Pozidriv screwdriver pt size 1 small and Z2 medium m IC Extractor Removal Procedure 1 2 3 Remove the bottom cover as described in the BOTTOM COVER REMOVAL procedure Disconnect all cables and wires from A1 Remove the EEPROM from Al see Figure 13 1 Mount the EEPROM on the replacement 1 Replacement Procedures 13 3 4291B Bottom View Rear EEPROM N J12 U79 CES13008 Figure 13 1 A1 EEPROM Location Note When using a re built A1 return the defective A1 with the EEPROM originally mounted on the re built A1 Y 4 Remove all screws from Al to remove Al from the chassis Replacement Procedure 1 Place the replacement Al on the analyzer 2 Attach Al with the screws removed in the Removal Procedure procedure 3 Connect all cables disconnected in the Removal Procedure to Al 4 Replace the bottom cover 13 4 Replacement Procedures 2 POST REGULATOR REPLACEMENT Tools Required m Torx screwdriver T15 m Poz
109. procedure 3 Disconnect the flat cable assembly from A30 4 Remove the eight screws on A30 to remove A30 from the front panel A40 PREREGULATOR REPLACEMENT Tools Required m Torx serewdriver T15 m Pozidriv screwdriver pt size 1 small and Z2 medium Removal Procedure 1 Remove the top cover as described in the COVER REMOVAL procedure 2 Remove the top shield plate 13 12 Replacement Procedures CES13009 Figure 13 8 A40 Preregurator Replacement 3 Remove three screws designated in Figure 13 8 4 Lift the A40 and remove all cables from the A40 A41 TRD AMP REPLACEMENT Tools Required m Pozidriv screwdriver pt size Z1 small m Open end wrench 9 16 inch m driver 11 32 inch Removal Procedure 1 Remove the ten screws to remove the top cover from the test station Replacement Procedures 13 13
110. procedures in the Troubleshooting chapter and believe the problem to be in the digital control group This procedure is designed to let you identify the bad assembly within the digital control group in the shortest possible time Whenever an assembly is replaced in this procedure refer to the Table of Related Service Procedures in the Post Repair Procedures chapter in this manual Figure 6 1 shows the digital control group in simplified block diagram form The following assemblies make up the digital control group Al CPU A30 Front Keyboard A31 I O Connector A32 I BASIC Interface Ab1 GSP A52 LCD Liquid Crystal Display A53 FDD Digital Control Troubleshooting 6 1 Internal VOLATILE MEMORY SRAM BOOT ROM A20 MOTHERBOARD FLASH MEMORY SRAM EEPROM J7 44 fi A41 TRD Amp cx A6 Reciver IF NON VOLATILE MEMORY H t Backup SRAM DUAL PORT SRAM DSP A D Converter Real Time Clock 42 43 44 J5 J2 5 BOARDS A2 A4 AS Analog Boards yo Keyboard Control A30 FRONT KEYBOARD Audio Interface FDD PRINTER A31 HP IB i vo Control CONNECTOR PRINTER Con lt gt HP IB 3 DIN KEY DIN KEY A32 IBASIC Run Cont TRIG
111. ps 1 GHz Y mS 164 5 1 3 GHz Y mS 259 pS 1 6 GHz Y mS 329 pS 1 8 GHz mS 379 pS uS Test Head Norm Temp High Z Standard Open Osc Level 41 mV Frequency Measurement Calibration Test Limit Test Result Parameter Value 1 MHz Y uS 20 1 pS uS 10 MHz Y uS 21 2 5 uS 100 MHz Y uS 32 4 pS uS 200 MHz Y uS 46 4 pS uS 300 MHz Y mS 59 8 pS uS 500 MHz Y mS 87 1 pS uS 600 MHz mS 111 S 800 MHz Y mS 143 pS uS 1 GHz Y mS 177 pS uS 1 3 GHz Y mS 272 5 uS 1 6 GHz Y mS 342 pS uS 1 8 GHz Y mS 392 pS uS 0 03 pS 0 34 uS 3 4 pS 6 7 uS 10 0 uS 16 7 uS 21 uS 28 uS 35 pS 46 uS 63 uS 71 pS Performance Tests 2 23 Test Head Norm Temp High Z Standard Short Osc Level 400 mV Frequency Measurement Calibration Test Limit Parameter Value 1 MHz 7 0 00 0 101 mQ 10 MHz Z 0 00 mQ 105 mQ 100 MHz Z 0 00 mQ 150 mQ 200 MHz Z 0 00 mQ 200 mQ 300 MHz Z 0 00 mQ 250 mQ 500 MHz Z 0 00 mQ 350 mQ 600 MHz Z 0 00 mQ 400 mQ 800 MHz Z 0 00 mQ 500 mQ 1 GHz Z 0 00 mQ 600 mQ 1 8 GHz Z 0 00 mQ 750 mQ 1 6 GHz Z 0 00 mQ 900 mQ 1 8 GHz Z 0 00 mQ 1 00 Q Test Head Norm Temp High Z Standard Osc Level Frequency Measurement Calibration Test Limit 1 MHz 10 MHz 100 MHz 200 MHz 300 MHz 500 MHz 600 MHz 800 MHz 1 GHz 1 3 GHz 1 6 GHz 1 8 GHz 2 24 Performance Tests Parameter Z Value 0 00 mQ 0 00 mQ 0
112. side panel on the control keys side Do not connect anything to the analyzer mainframe front terminals Press the following keys to execute adjustment Test No 36 PRESET SYSTEM SERVICE MENU TESTS 3 6 EXECUTE TEST Rotate VCXO ADJ and confirm that two voltage peaks appear during a rotation to confirm that the VCXO circuit is correct Then press CONT Rotate VCXO ADJ slowly to enable instrument to memorize the peak voltage Then press CONT Adjust VCXO ADJ until the VCXO level is with in the limits and PASS is displayed Then press CONT to complete the adjustment VCOX ADJ C6503013 Figure 3 12 Third Local VCXO Adjustment Location Adjustments and Correction Constants 3 17 SOURCE MIXER LOCAL LEAKAGE ADJUSTMENT The purpose of this procedure is to minimize the source mixer local leakage Required Equipment Spectrum Analyzer 2 24 24 8566A B N m BNC f adapter 2 required PN 1250 1476 BNC cable 122 2 required PN 8120 1840 Procedure 1 Connect the equipment as shown in Figure 3 13 BNC m BNC m Cable 122 cm Spectrum Analyzer To Reference Out
113. sound and the LEDs blink twice If the is faulty three beeps sound and the LEDs blink three times 4 A2 POST REGULATOR Verifies all A2 post regulator output voltages 5 V AUX 15 V AUX 15 V 12 6 V 5 V 5 V 5 3 V 8 5V 15 V 22 V FAN POWER GND This test measures the A2 output voltages at DC bus nodes 1 through 12 and 26 It checks that each measured value is within limits 5 A6 A D CONVERTER Verifies the following circuit blocks on the A6 Receiver IF A D Converter Gain Y Gain Z Range R This test measures the A D converter s reference voltage VREF at DC bus node 25 through the gain Y the gain Z and the range R These circuits are set to several settings in the test For each setting this test checks that the measured value is within limits 6 A5 REFERENCE OSC Verifies the reference oscillator in the A5 synthesizer This test measures the VCO tuning voltage at DC bus node 22 and the frequency 2 5 MHz at frequency bus node 6 It then checks that each measured value is within limits 7 5 FRACTIONAL N OSC Verifies the fractional N oscillator in the A5 synthesizer This sets the oscillator frequency to several frequencies over the entire range For each setting this test measures the VCO tuning voltage at DC bus node 20 and the frequency at frequency bus node 4 It then checks that each measured value is within limits 8 A5 STEP OSC Runs only when selected It verifies the s
114. to make extra copies for performance testing Performance Tests 2 1 Recommended Test Equipment Table 1 1 lists the equipment required for performance testing the analyzer Other equipment may be substituted if the equipment meets or exceeds the critical specifications given in Table 1 1 2 2 Performance Tests FREQUENCY ACCURACY TEST Description This test uses a frequency counter to measure the actual frequency of the analyzer stimulus signal when it is tuned to 1 GHz This test checks the frequency accuracy of the internal frequency reference or the high stability frequency reference for Option 105 Specification See the Specifications of Operating Manual Set for details Frequency reference Accuracy PA 2 2 2 24 2 22 2 2 4 2 7 2 2 2 lt 10 ppm Precision frequency reference Option 1D5 Accuracy 096 to 5596 2 2 2 2 2 lt 1 ppm Test Equipment 1 2 Frequency Counter 2 2 2 2 2224 2 2 22 5343A cable 61 em 22 2 22 2 2 ee PN 8120 1839 APC3 5 m APC3 5 f adapter 2 PN 1250 1866 N m BNC f adapter 4 2 4 PN 1250 1476 BNC f SMA f adapter
115. verify the operation of the EXT REF input a Connect the equipment as shown in Figure 7 11 Then check that the ExtRef message appears on the display If Option 1D6 is installed in the 4291B connect the cable between the EXT REF Input connector and REF OVEN Opt 105 connector b Disconnect the cable from the EXT REF input Then check that the ExtRef message disappears m If the ExtRef message appears and disappears correctly the EXT REF circuit probably working At this point the A5 synthesizer is verified m If the ExtRef message does not appear inspect the cable and connections between the EXT REF input connector and A5J4 See Figure 7 12 for the A5J4 location If the cable and connections are good the most probable faulty assembly is A5 Replace A5 BNC m BNC m Cable 122 TO EXT REFERENCE TO EXT REF OUTPUT Spectrum Analyzer 507011 Figure 7 11 EXT REF Test Setup Source Trouhleshooting 7 15 4291 Top View A5 Synthesizer
116. voltage control signal and current control signal The voltage control signal voltage is about 1 10 of the DC bias voltage output The current control signal voltage is about 500 9 V A of the DC bias current output Perform the following steps to verify A22 output voltages a Turn the 4291B off and remove the flat cable designated D in Figure 7 25 T A22TP3 V DAC A22TP1 GND A22TP4 I DAC rr 507025 HP 4291B Bottom View Figure 7 25 A22 Output Voltages Check Location b Turn the 4291B on Then press the following keys to set DC bias voltage to 0 V Source BIAS on OFF then the label changes to BIAS ON off DC BIAS MENU BIAS VOLTAGE 9 c Change the DC bias voltage settings and check that the A22TP3 V DAC voltage from A22TP1 GND is within the limits shown in Table 7 4 See Figure 7 25 for the test point locations m If the voltage is good continue with the next step m If the voltage is bad A22 is faulty Replace A22 Source Troubleshooting 7 31 Table 7 4 Bias Setting TP3 Voltage Limit OV 10 mV 4 400 mV 20 mV 10 V 50 mV 40 V 4 V 40 2 4 V 400 mV
117. ww 10 20 6 5 3 V 2 1465 U 2 10 20 T 85 1 8955007 10 20 8 15 1021 10 20 9 15 V 1 92U 2 a 10 20 10 22 2 0021 10 20 11 2 10 20 12 65 V 2 0605 U 10 21 13 SRC VTUNE Source Oscillator VCO Tuning Voltage 10 21 14 2ND LO VTUNE Second Local Oscillator VCO Tuning Voltage 10 21 15 DET OUT Detector Output lll 10 21 16 SRC LO LEVEL a 10 21 17 DAC OUT Level DAC Output 10 22 18 1ST LO VTUNE First Local Oscillator VCO Turning Voltage 10 22 19 STEP VTUNE Step Oscillator VCO Turning Voltage 10 22 20 FN VTUNE Fractional N Oscillator VCO Turning Voltage 10 23 21 FN INTEG OUT Fractional N Oscillator Integrator Output Voltage 10 23 22 REF VTUNE Reference Oscillator VCO Tuning Voltage 10 24 23 3RD LO VTUNE Third Local Oscillator VCO Tuning Voltage 10 24 24 3RD LO LEVEL 10 24 25 AD VREF A D Converter Voltage Reference 10 24 26 DC BIAS 10 24 27 DC BIAS CURRENT 10 25 28 GND 22 429 10 25 A a 10 25 Frequency Bus Node
118. 0 3 14 Adjustments and Correction Constants Spectrum Analyzer BNC f SMA m Adapter To A3A2 4291B Second Local Out L N m BNC f Adapter g 00000000 Cable 61 cm 503011 Figure 3 10 Second Local PLL Adjustment Setup Set the spectrum analyzer as follows Center Frequency 2 08 GHz Span 400 MHz RBW 1 MHz Turn the 4291B analyzer ON 6 Press the following keys to execute adjustment Test No 37 PRESET SYsTEM SERVICE MENU TESTS 3 7 EXECUTE TEST Adjust 2 Local Adj until 2 08 GHz appears constantly on the spectrum analyzer display and the 4291B analyzer reading is between the limit lines Then press CONT to complete the adjustment If 2 24 GHz appears rotate Local Adj clockwise If 1 92 GHz appears rotate Local Adj counterclockwise The adjustment location is shown in Figure 3 9 Turn the analyzer OFF 9 Reconnect the I cable to the A3A2 Second Local Out connector Reconnect the D
119. 0 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz Z 14 5 kQ 0 0 1 MHz 0 665 2 10 7 165 0 0 4 0 10 MHz 8 rad 75 8 mrad 2 0 mrad 100 MHz 7 0 8 710 0 0 43 Q 100 MHz 0 rad 17 3 mrad 2 0 mrad 200 MHz Z 0 1 76 0 0 0 25 Q 200 MHz 0 rad 17 4 mrad 2 5 mrad 300 MHz Z 0 1 15 0 0 18 Q 300 MHz 0 rad 18 9 mad 8 mrad 3 0 mrad 500 MHz 7 0 776 mQ mQ 90 mQ 500 MHz 0 rad 34 4 mrad 4 0 600 MHz Z 0 792 mQ 88 0 600 MHz 0 rad 80 7 mrad 9 0 mrad 800 MHz Z 0 41 0070 0 12 0 800 MHz 0 rad 78 7 mrad 9 0 mrad 1 GHz Z 0 2 14 0 0 0 27 9 1 GHz 0 rad 48 5 mrad 6 0 mrad 1 6 GHz Z 0 6 77 Q 0 0 86 0 1 6 GHz 0 rad 79 0 mrad 10 0 mrad 1 8 GHz Z 0 3 25 0 0 0 38 0 1 8 GHz 0 rad 98 2 mrad 10 0 mrad Performance Tests 2 51 Test Head High Temp Low Z Standard 10 em Airline with Open Osc Level 41 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz Z 14 5 0 0 kQ 1 MHz 0 665 mrad 2 mrad 10 MHz Z kQ 165 Q 0 4 0 10 MHz 0 rad 75 8 mrad 2 0 mrad 100 MHz Z 0 3 73 0 0 0 43 Q 100 0 rad 17
120. 00 MHz 1 GHz 1 GHz 1 3 GHz 1 3 GHz 1 6 GHz 1 6 GHz 1 8 GHz 1 8 GHz DN TN DN DBN DN DN DN DTN DN DN OM 2 34 Performance Tests Calibration Value 0 mrad mrad mrad mrad mrad mrad mrad mrad mrad mrad mrad mrad Test Limit 426 mQ 8 52 mrad 433 mQ 8 65 mrad 500 mQ 10 0 mrad 675 mQ 13 5 mrad 750 mQ 15 0 mrad 900 mQ 18 0 mrad 1 18 0 23 5 mrad 1 33 Q 26 5 mrad 1 48 Q 29 5 mrad 2 10 0 42 0 mrad 2 33 0 46 5 mrad 2 48 Q 49 5 mrad Test Result 2 mQ mrad Y w Y w Y w Y w Y w mrad 21112221 mrad mrad 21112221 mrad mrad 21112221 mrad mrad Measurement Uncertainty 90 mQ 1 80 mrad 90 mQ 1 80 mrad 100 mQ 2 0 mrad 125 mQ 2 5 mrad 150 mQ 3 0 mrad 200 mQ 4 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad Test Head Norm Temp Low Z Standard 10 em Airline with Open Osc Level 400 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz Z 14 4k0 kQ 0 0 kQ 1 MHz 0 662 2 10 7 1610 0
121. 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 101 mQ 105 mQ 150 mQ 200 mQ 250 mQ 350 mQ 400 mQ 500 mQ 600 mQ 750 mQ 900 mQ 1 00 9 Test Result mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ Test Result mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ Measurement Uncertainty 2 mQ 2 mQ 10 mQ 20 mQ 30 mQ 40 mQ 50 mQ 70 mQ 80 mQ 100 mQ 120 mQ 0 13 8 Measurement Uncertainty 2 mQ 2 mQ 10 mQ 20 mQ 30 mQ 40 mQ 50 mQ 70 mQ 80 mQ 100 mQ 120 mQ 0 13 8 Test Head Standard Osc Level Frequency Measurement 1 MHz 1 MHz 10 MHz 10 MHz 100 MHz 100 MHz 200 MHz 200 MHz 300 MHz 300 MHz 500 MHz 500 MHz 600 MHz 600 MHz 800 MHz 800 MHz 1 GHz 1 GHz 1 3 GHz 1 3 GHz 1 6 GHz 1 6 GHz 1 8 GHz 1 8 GHz Norm Temp High Z 500 400 mV Calibration Parameter Value 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad Test Limit 418 mQ 8 37 mrad 425 mQ 8 50 mrad 493 mQ 9 85 mrad 668 mQ 13 4 mrad 743 mQ 14 9 mrad 893 mQ 17 9 mrad 1 17 0 23 4 mrad 1 32 Q 26 4 mrad 1 47 Q 29 4 mrad 2 09 Q 41 9 mrad 2 32 Q 46 4 mrad 2 47 Q 49 4 mrad Test Result mQ mrad mQ mrad mQ mrad mQ mrad mQ mrad mQ mrad mrad mrad mrad mr
122. 04291 65022 Procedure Note Measurement accuracy test must be done for all test heads attached to the analyzer because the test head characteristics affect the measurement The following test procedure is common for all test heads Save the Analyzer Setup Note The five calibrated standards are measured in the measurement accuracy test The analyzer setup for the test is saved and recalled in each standard measurement to reduce setup time The two setups for each test head of 400 mV 250 mV setup and 41 mV setup are saved This saving procedure can be skipped if the status is already saved 1 Connect the test equipment as shown in Figure 2 3 2 8 Performance Tests FOR NORMAL TEMPERATURE TEST HEAD Test Station Test Head A 00000000 FOR HIGH TEMPERATURE TEST HEAD Test Station Test Head N 00000000 Test Station Stand Fixture Stand Extension Rod 502010 Figure 2 3 Measurement Accuracy Test Setup 2 Press to initialize the analyzer 3 Press Sweep LIST MENU EDIT LIST to the sweep list editor 4 Create the sweep list shown in Figure 2 4 using the following procedure Performance T
123. 04396 69505 A6 04291 65506 4 1 IF 28480 04291 65506 A6 04291 69506 0 1 Receiver IF rebuilt exchange 28480 04291 69506 A30 04396 66530 0 1 Front Keyboard 28480 04396 66530 A40 0950 3246 7 1 Preregulator 28480 0956 3246 E4970 66550 7 1 DC DC Converter 28480 E4970 66550 51 4970 66552 9 1 GSP 28480 E4970 66552 52 2090 0574 6 1 LCD 28480 2090 0574 A60 04396 61060 1 1 Ref opt 105 28480 04396 61060 Replaceahle Parts 12 5 512002 Figure 12 2 Top View 2 RF Flexible and RF Semi rigid Cables Note Alphabetic designators in Figure 12 2 show the cable markers Y 12 6 Replaceable Parts Table 12 4 View 2 RF Flexible and RF Semi rigid Cables Ref Agilent Part Qty Description Connection Desig Number D A 04396 61621 0 1 RF Cable 1 Di 04396 61622 1 1 RF Cable A3A2 H 04396 61623 2 1 RF Cable H A4 A5 04291 61615 6 1 Cab
124. 1274 0515 0999 9 2 Screw M2 5 28480 0515 0999 5 04896 01275 4 1 Holder 28480 04396 01205 0515 0914 8 4 for Holder 28480 0515 0914 04396 25004 7 1 Sponge for Holder 28480 04395 25004 6 1400 0611 0 1 Flat Cable 04726 3484 1000 7 0515 1550 0 9 Screw for A22 A23 28480 0515 1550 8 0515 0889 6 6 Screw M3 5 28480 0515 0889 10 04291 01231 6 1 Holder 28480 04291 01231 0515 1550 0 4 Screw for Holder 28480 0515 1550 11 1400 0015 8 1 Clamp Cable 28480 1400 0015 0515 2079 O 1 Screw M4 28480 0515 2079 12 0515 1550 O 14 Screw for A20 28480 0515 1550 13 0515 1550 0 13 Screw for Al 28480 0515 1550 14 04291 01291 8 1 Shield 28480 04291 01291 0515 0914 8 5 Screw for Chassis 28480 0515 0914 1400 1334 6 2 Cable 28480 1400 1334 0403 0179 0 2 Bumper Foot 28480 0403 0719 15 1818 5146 1 1 EEPROM 10572 X28C64P 20 1 Included in A1 Replaceable Parts 12 15 Front Assembly Parts 6512001 Figure 12 7 Front Assembly Parts 1 5 Outside Table 12 10 Front Assembly Parts 1 5 Outside Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 04291 87121 3 1 Label 28480 04291 87121 2 04896 40051 6 1 Bezel 28
125. 2 2 4 2 1250 1476 Procedure 1 Perform the frequency accuracy test according to Chapter 2 m If the test fails go to Chapter 7 2 Calibrate the power meter for the power sensor 9 Connect the equipment as shown in Figure 4 3 Power Meter 00000000 Power Sensor CES04003 Figure 4 3 Source Test Setup 4 Turn the analyzer power on 5 Press SYSTEM SERVICE MENU SERVICE MODES CORRECTION CONSTANTS OSC LVL CC FRONT to select the source correction constants for the front output connector 6 Press Source OSC UNIT dBm gt 1 6 x1 to set the OSC level to 19 dBm 7 Press Span 0 x1 Center 1 to set the frequency to 1 MHz Overall Troubleshooting 4 7 8 Confirm that the power meter reading is within the test limits shown in Table 4 2 10 11 12 13 14 4 8 Table 4 2 Source Test Settings Frequency Osc Level Test Limit 1 MHz 19 dBm 2 dB 10 MHz 13 dBm 2 dB 100 MHz 7 dBm 2dB 1 GHz dBm 2 dB 1 8 GHz 1 dBm 3 dB Perform the test for all settings listed in Table 4 2 m If the test fails perform the OSC level correction constants according to Chapter 3 If the test still fails go to Chapter 7 m If the test passes continue with the next step Press Center 1 8
126. 2 6 a Remove the open termination from the airline b Gently inserts the airline center conductor into the short termination center conductor Mate the outer conductors Then torque the connection to 136 N cm 1 2 inch open end wrench may be necessary to hold the airline stationary C6902006 Figure 2 6 10 cm Airline with Short Measurement Test Setup Performance Tests 2 15 71 72 73 74 75 76 77 78 Recall the test settings and the calibration data When the Normal Temperature Test Head is connected press Recall 400 STA to recall the 400 mV settings When the High Temperature Test Head is connected press Recall 250 STA to recall the 250 mV settings Press Trigger SINGLE to make a measurement Press Copy MORE LIST VALUES to display the test results Subtract the 10 cm airline with short calibrated values from the analyzer Z 6 display values Then record the test results on the performance test record Ignore the analyzer display values at 800 MHz Press Recall 41 STA to recall the 41 mV test settings and the calibration data Press Trigger SINGLE to make a measurement Press Copy MORE LIST VALUES to display the test results Subtract the 10 cm airline with short calibrated values from the analyzer Z 6 display values Then record the test results on the performance test record Ignore the analyzer disp
127. 2 MHz Signal Perform the following steps to verify the 21 42 MHz signal a Remove the D cable from A3A2J22 and connect the equipment as shown in Figure 7 17 BNC m BNC m Cable 122 TO EXT TO EXT REF Input REFERENCE Spectrum Analyzer OUTPUT SMB m SMB m ANBI jog SMB f BNC Ar 0 EX pu IL 74 4291B View N m BNC f gt Adapter BNC m BNC m Cable 61 cm 507017 Figure 7 17 21 42 MHz Signal Test Setup b Press to initialize the 4291B c Initialize the spectrum analyzer Then set the controls as follows Controls Settings Center Frequency 21 42 MHz Span 1 MHz Reference Level 0 dBm Source Troubleshooting 7 21 d On the 4291 press the following keys to set the OSC DAC value to 13 000 System SERVICE MENU SERVICE MODES 056 050 AUTO man then the label changes to OSC auto OSC DAC AUTO man then the label changes to OSC DAC auto MAN osc DAC VALUE 9 9 0 EO e On the spectrum analyzer press PEAK SEARC to
128. 2 is probably faulty continue with CHECK A22 DC BIAS 1 2 OUTPUT in Chapter 7 1 EEPROM with data needs to be placed see Chapter 13 A2 POST REGULATOR Test Fail If internal test 4 A2 POST REGULATOR is the first failed test the power supply functional group is the most probable faulty group See Chapter 5 Also the test failure might be caused by A6 A D converter trouble Execute internal test 5 A6 A D CONVERTER to verify the A D converter by performing the following procedure If the test 5 fails suspect the A5 synthesizer and A6 receiver IF in addition to the power supply functional group 1 Press 5 EXECUTE TEST to execute internal test 5 A D CONVERTER ii Wait until the test result PASS or FAIL is displayed 4 6 Overall Troubleshooting VERIFY FUNCTIONAL GROUPS This section provides faulty group isolation procedures Source Test Verify the source group operation by performing following procedure Test Equipment Frequency Counter 22 2 2 2 22 2 5343A Option 001 Power meter 436A Opt 022 437B or 438A Power Sensor 2 2 2 2 2 24 2 2 2 24 8482 BNC cable 61 em 2 2 2 eben ened 8120 1839 adapter
129. 20 mV d Press the following keys to set DC bias current to 0 A Source BIAS SRC VOLTAGE then the label changes to BIAS SRC CURRENT BIAS CURRENT 0 x1 e Change the DC bias current settings and check that the A22TP4 I DAC voltage from A22TP1 GND is within the limits shown in Table 7 5 See Figure 7 25 for the test pin location the voltage is good continue with the next step m If the voltage is bad 22 is faulty Replace A22 Table 7 5 Bias Setting TP4 Voltage Limit 0A 0 V 10 mV 10 mA 556 mV 56 mV 100 mA 5 56 V 0 56 V f Press the following keys to check the DC bias gain control circuit operation DC bias gain is determined using a GAIN DAC Source BIAS SRC CURRENT then the label changes to BIAS SRC VOLTAGE BIAS VOLTAGE 2 System SVC MODE DC BIAS DC BIAS AUTO man then the label changes to DC BIAS auto MAN DAC GAINDAC AUTO then the label changes to GAINDAC auto MAN 8 Press the following keys to set the GAIN DAC value to 0 GAINDAC VALUE 0 h Measure the A22TP3 voltage from A22TP1 and note the measured value See Figure 7 25 for the test pin location i Change the GAIN DAC value to 255 using numeric keys j Measure the A22TP3 voltage from A22TP1 and check that the voltage increases by 80 20 mV compared with the voltage noted in step m the voltage is good 22 is verifi
130. 252525252 2522D52525252 2 13 16 Removal Procedure 13 16 A53 FDD REPLACEMENT 2 2 0 a 13 16 Tools Required 13 16 Removal Procedure 13 16 A60 FREQ REF REPLACEMENT 13 16 Tools Required 13 16 Removal Procedure 13 16 TEST HEAD REPLACEMENT aaa a 13 17 Tools Required 13 17 Replacement Procedure 13 17 CENTER CONDUCTOR COLLET REPLACEMENT 13 17 Post Repair Procedures INTRODUCTION 2 14 1 POST REPAIR PROCEDURES 14 1 FIRMWARE INSTALLATION 14 3 Ordering the Firmware Diskette 14 3 Installing the Firmware 14 3 Manual Changes Introduction o a a A 1 Manual Changes ME 1 Serial Number 2 a a a A 2 Power Requirement AN Replacing Fuse o B 1 Fuse o B 1 Power Requirements 2 Power Cable LUV o B 2 Messages Error Messages in Alphabetical Messages 1 Error Messages in Numerical Order Messages 7 Index Contents 11 Figures Serial Number Plate 2 Frequency Accuracy Test OSC Level Accuracy Test
131. 27 0 5 dBm gt Pose gt 45 UBM 1 other OSC levels 2 2 2 2 24 22 2 22 2 22 2 2 Test Equipment Power Meter 436A Opt 022 437B or 488A Power Sensor 2 2 24 2 22 2 4 2 22 2 2 24 2 222 24 22 2 2 22 4 8482A APC T N f Adapter 42 434 4 11524A Fixture Stand only for High Temp Test Heads PN 04291 60121 Test Stage Stand only for High Temp Test Heads PN 04291 65021 Extension Rod only for High Temp Test 5 PN 04291 65022 Procedure Note The OSC level accuracy test must be done for all test heads attached to the i analyzer because the test head characteristics affect the OSC level The following test procedure is common for all test heads 1 Connect the power sensor to the power meter Calibrate the power meter for the power sensor 2 Connect the test equipment as shown in Figure 2 2 Performance Tests 2 5 FOR NORMAL TEMPERATURE TEST HEAD Power Meter 00000000 ooo 0 00 Oa
132. 3 A51 GSP The A51 GSP can be checked using the internal test 3 A51 GSP If the test fails the Ch 1 and 2 LEDs blink several time and a few beeps sound at the end of the test Then the analyzer returns the control settings to the power on default setting values a Press PRESET SYSTEM SERVICE MENU TESTS 3 EXECUTE TEST to run the internal test 3 When this test starts ch 1 LED and cn 2 LED are turned off b Check the Ch 1 and Ch 2 LEDs and the beeps at the end of the test m If no beep sound and the LEDs don t blink the A51 GSP is probably working Continue with the next Check the Two LEDs on A51 GSP m If a beep sounds and the LEDs blink one time the A51 GSP chip is faulty Replace the A51 GSP m If two beep sound and the LED blinks two time the A51 GSP s DRAM is faulty Replace the A51 GSP m If three beep sound and the LED blinks three time the A51 GSP s is faulty Replace the A51 GSP 2 Check the A52 LCD Liquid Crystal Display The A52 LCD can be tested using the internal test 40 to 44 Press PRESET SYSTEM SERVICE MENU TESTS 4 0 EXECUTE TEST CONTINUE to run the internal test 40 and run the other tests with the same manner b If any defects on the LCD replace the LCD c If no correct patterns are displayed check the A54 Inverter 6 8 Digital Control Trouhleshooting Source Troubleshooting INTRODUCTION Use these procedures only if you
133. 3 GHz 8 rad 57 3 mrad mrad 10 0 mrad 1 6 GHz Z 0 1 14 9 0 0 16 0 1 6 GHz 0 rad 105 mrad mrad 15 mrad 1 8 GHz Z 0 2 00 0 0 0 37 Q 1 8 GHz 8 rad 54 6mrad mrad 10 0 mrad 2 30 Performance Tests Norm Temp Low Impedance Test Head Option 012 Test Head Standard Osc Level Frequency Measurement Test Limit Parameter 1 MHz Y uS 30 1 4S 10 MHz Y 31 2 pS 100 MHz Y pS 42 4 pS 200 MHz uS 56 4 pS 300 MHz mS 69 7 uS 500 MHz mS 96 8 uS 600 MHz Y mS 120 ps 800 MHz mS 152 5 1 GHz mS 185 ps 1 3 GHz mS 280 pS 1 6 GHz Y mS 349 pS 1 8 GHz mS 398 pS Test Head Norm Temp Low Z Standard Open Osc Level 41 mV Frequency Measurement Test Limit Parameter 1 MHz Y uS 30 1 pS 10 MHz Y uS 31 2 pS 100 MHz Y uS 42 4 pS 200 MHz Y uS 56 4 pS 300 MHz mS 69 7 uS 500 MHz mS 96 9 uS 600 MHz mS 120 pS 800 MHz mS 152 pS 1 GHz mS 186 pS 1 8 GHz mS 281 pS 1 6 GHz mS 350 pS 1 8 GHz mS 399 5 Norm Temp Low Z Open 400 mV Test Result uS Test Result uS uS uS uS uS uS uS uS uS uS uS uS Measurement Uncertainty 0 0 uS 0 3 uS 3 4 uS 6 7 uS 10 0 pS 16 7 pS 21 pS 28 uS 35 pS 46 pS 63 uS 71 pS Measurement Uncertainty 0 0 uS 0 3 pS 3 4 pS 6 7 uS
134. 3 Multiplier REF OSC The REF OSC generates stable 10 MHz and 40 MHz reference frequencies It does this by dividing the output of a 40 MHz VCXO voltage control crystal oscillator as required The 40 MHz reference signal is supplied to the A3AI level vernier The 10 MHz reference frequency is routed to the INT REF Output connector on the rear panel When a 10 MHz external reference signal is applied to the EXT REF Input connector on the rear panel the REF OSC output signals are phase locked to the external reference signal The REF OSC is a phase locked oscillator and contains a 40 MHz VCXO a phase detector and three 1 2 dividers See Figure 11 10 When the 10 MHz external reference signal is applied to the EXT REF Input connector on the rear panel the reference frequency is divided by two It is then compared with the VCXO frequency Fyexo divided by eight in the phase detector Phase locking imposes the condition of 10 MHz Z 8 Therefore the output frequency is locked to 40 MHz detector circuit detects the external reference input signal and sends the status to the Al CPU Then the Al CPU displays a message ExtRef on the CRT In addition an unlock detector monitors the control voltage to the VCXO When the control voltage is out of limits the detector sends the status to the A1 CPU Then the A1 CPU causes the message CAUTION PHASE LOCK LOOP UNLOCKED to be displayed The 40 MHz Reference Oscillator Fre
135. 480 04396 40051 3 04291 00221 2 1 Panel Front 28480 04291 00221 04191 08000 O 1 Spring between Front Panel and 28480 04191 08000 Sub Panel 4 5182 7522 6 1 Knob 28480 5182 1522 5 04396 25051 4 1 Rubber Key 28480 04396 25051 12 16 Replaceable Parts 512009 Figure 12 8 Front Assembly Parts 2 5 Inside Table 12 11 Front Assembly Parts 2 5 Inside Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 04291 00222 9 1 PANEL SUB 28480 04396 00272 2 4970 25001 7 1 FILTER 28480 4970 25001 3 04396 40071 0 1 BEZEL BACK 28480 04396 40071 4 0515 1550 0 2 SCR M3 L 8 28480 0515 1550 3050 0891 2 WASHER 28480 3050 0891 Replaceable Parts 12 17 CBS12070 Figure 12 9 Front Assembly Parts 3 5 Inside Table 12 12 Front Assembly Parts 3 5 Inside Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 04396 40008 18 1 GUIDE 28480 04396 40003 2 04396 25051 14 1 KEYPAD RUBBER 28480 04396 25051 3 04396 66530 0 1 A30 Front Keyboard 28480 04396 66530 4 0515 1550 0 8 SCR M3 L 8 28480 0515 1550 12 18 Replaceahle Parts
136. 5 Check the A30 Front Keyboard 6 6 5 6 6 7 Check the A32 I BASIC Interface and the mini DIN Keyboard 6 7 TROUBLESHOOT THE A51 GSP 2 6 8 1 Run the Internal Test 3 51 GSP 6 8 2 Check the A52 LCD Liquid Crystal 6 8 7 Source Troubleshooting INTRODUCTION 7 1 SOURCE GROUP TROUBLESHOOTING SUMMARY 7 3 Start Here 2 7 3 Check 5 Synthesizer Outputs 7 3 Check 4 1 1st LO Outputs l l 7 3 Check an 1 Source Vernier Output 7 3 Check 8 22 1 0 5 7 3 Check Source Output 2 7 3 Check A7 Output Attenuator Control Signals 7 4 Check A22 DC Bias 1 2 Output 7 4 Check A60 High Stability Frequency Reference Option 1 5 7 4 START 7 5 CHECK A5 SYNTHESIZER OUTPUTS 7 6 1 Check the INT REF Signal n 7 6 2 Check the FRAC 5 1 2 7 8 3 Check the STEP OSC Signal 7 10 4 Check the 520 MHz Signal lll lees 1 13 5 Check the EXT REF 7 15 CHECK A4A1 IST LO OUTPUTS 7 17 1 Check the 1st LO O
137. 50 DC DC converter a Turn the analyzer power off b Remove the cable from A2J4 e Remove A2 post regulator from the analyzer a Reconnect the cable between the 2 and the A50J2 as shown in Figure 5 11 Power Supply Troubleshooting 5 17 4291B View Pulse Generator A50 DC DC Converter Frequency 30Hz Rear Panel To 26 Ray 7 To 2 GN gp A2 Post Regulator 15V 5 3V oo 8 5 Noo CES05014 Figure 5 11 A2 Output Voltage Measurement Setup e Connect the pulse generator to the A2J4 as shown in Figure 5 11 f Turn the pulse generator power on Set the controls as follows Wave Form Square Frequency Approximately 30 Hz Amplitude 7 8 5 Turn the analyzer power on h Measure the A2 output voltages at the A2J3 pins using a voltmeter with a small probe See Figure 5 11
138. 6 N cm C6 02005 Figure 2 5 10 cm Airline with Open Measurement Test Setup 61 Recall the test settings and the calibration data m When the Normal Temperature Test Head is connected press Recall 400 5 to recall the 400 mV settings m When the High Temperature Test Head is connected press Recall 250 STA to recall the 250 mV settings 62 Press Trigger SINGLE to make a measurement 63 Press Copy MORE LIST VALUES to display the test results 2 14 Performance Tests 64 65 66 67 68 Subtract the 10 em airline with open calibrated values from the analyzer Z 0 display values Then record the test results on the performance test record Ignore the analyzer display values at 1 3 GHz Press Recall 41 STA to recall the 41 mV test settings and the calibration data Press Trigger SINGLE to make a measurement Press Copy MORE LIST VALUES to display the test results Subtract the 10 em airline with open calibrated values from the analyzer Z 0 display values Then record the test results on the performance test record Ignore the analyzer display values at 1 3 GHz 10 cm Airline with Short Test 69 70 Record the 10 cm airline with short termination calibration values on the performance test record Connect the 10 cm airline and short termination to the test head Apc 7 connector using the following procedure see Figure
139. 61 cm 503022 Figure 3 21 10 MHz Reference Oscillator Frequency Adjustment Setup 5 Press to initialize the analyzer Then set the analyzer controls as follows Control Settings Key Strokes Frequency Span 0 Hz Span 0 Center Frequency 1 8 GHz Center 1 8 G n Source Power 33 dBm Source POWER 5 6 Set the frequency counter as follows Input Impedance 500 Frequency Range 500 MHz 26 5 GHz 7 Remove the dust cap screw on the A60 assembly to gain access to the adjustment screw 8 Adjust the A60 adjustment screw until the frequency counter reading is within 1 8 GHz 1 Hz 9 Turn the analyzer OFF 10 Replace the dust cap screw into the A60 assembly and replace the A60 assembly into the slot 3 26 Adjustments and Correction Constants Overall Troubleshooting This chapter consists of the following sections m Troubleshooting Summary m Inspect the Power ON Sequence m Verify Functional Groups m Troubleshooting the GPIB System The Troubleshooting Summary outlines how to troubleshoot the 4291B using the troubleshooting flow diagram The Inspect the Power ON Sequence begins the troubleshooting procedures by inspecting the power on sequence The Verify Functional Groups provides verification procedures to isolate the problem to the faulty functional group Troubleshooting the GPIB System gives some hints for troubleshooting when the 4291B is used in an GPIB syste
140. 8 7 19 7 20 7 21 7 22 7 23 7 24 7 25 8 1 8 2 8 3 9 1 9 2 9 3 9 4 9 5 10 1 10 2 10 3 10 4 10 5 10 6 10 7 10 8 10 9 10 10 10 11 10 12 10 13 10 14 10 15 10 16 10 17 11 1 Power Supply Block Diagram 8 5 22 Digital Control Group Simplified Block Diagram 6 2 Al Eight LEDs Pattern 6 8 Bootloader Display 6 5 Source Group Block 7 2 INT REF Test Setup 7 7 Typical INT REF Signal 7 8 Typical FRAC OSC Signal in Frequency Bus Measurement 7 9 FRAC OSC Signal Level Test Setup 7 9 FRAC OSC Typical Signal 7 10 STEP OSC Test 2 7 11 Typical STEP OSC Signal at Center 1 2 7 12 Typical 520 MHz Signal 7 14 520 Signal Test 7 14 EXT REF Test 7 15 541 os 7 16 lst LO OSC Signal Test 7 17 Typical 1st LO OSC Signal Single Mode at 4 143 7 18 Typical 1st LO OSC Signal Triple Mode at A4A1J3 7 19 Ist LO OSC Typical Signal Single Mode at 444 7 20 21 42 MHz Signal Test Setup 2 7 21 Typical 21 42 MHz Signal 7 22 2nd LO OSC Test
141. 80 mQ 100 mQ 120 mQ 130 mQ Test Head Standard Osc Level Frequency Measurement 1 MHz 1 MHz 10 MHz 10 MHz 100 MHz 100 MHz 200 MHz 200 MHz 300 MHz 300 MHz 500 MHz 500 MHz 600 MHz 600 MHz 800 MHz 800 MHz 1 GHz 1 GHz 1 3 GHz 1 3 GHz 1 6 GHz 1 6 GHz 1 8 GHz 1 8 GHz Norm Temp Low Z 500 400 mV Calibration Parameter Value 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad Test Limit 396 mQ 7 92 mrad 403 mQ 8 05 mrad 470 mQ 9 40 mrad 645 mQ 12 9 mrad 720 mQ 14 4 mrad 870 mQ 17 4 mrad 1 15 Q 22 9 mrad 1 30 0 25 9 mrad 1 45 Q 28 9 mrad 2 07 Q 41 4 mrad 2 30 Q 45 9 mrad 2 45 Q 48 9 mrad Test Result mQ mrad mQ mrad mQ mrad mQ mrad mQ mrad mQ mrad mrad mrad mrad mrad mrad mrad Performance Tests Measurement Uncertainty 90 mQ 1 80 mrad 90 mQ 1 80 mrad 100 mQ 2 00 mrad 125 mQ 2 5 mrad 150 mQ 9 0 mrad 200 mQ 4 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 2 33 Test Head Norm Temp Low Z Standard 500 Osc Level 41 mV Frequency Measurement Parameter 1 MHz Z 1 MHz 10 MHz 10 MHz 100 MHz 100 MHz 200 MHz 200 MHz 300 MHz 300 MHz 500 MHz 500 MHz 600 MHz 600 MHz 800 MHz 8
142. 96 00651 04396 00652 9 1 Case Shield Component Side 28480 04396 00652 0515 0914 8 4 Screw 28480 0515 0914 2 04396 00653 0 1 Shield Component Side 28480 04396 00653 04396 00654 1 1 Case Shield Component Side 28480 04396 00654 0515 0914 8 7 Screw 28480 0515 0914 3 04396 00655 2 1 Case Shield Component Side 28480 04396 00655 04396 00656 3 1 Case Shield Component Side 28480 04396 00656 0515 0914 8 4 Screw M3 28480 0515 0914 Parts listed in Table 12 19 are included in A5 Replaceahle Parts 12 25 Table 12 20 Miscellaneous Parts 4 Other Shields Agilent Part Qty Description Mfr Mfr Part Number D Code Number 04396 00611 101 1 Plate Shield Top 28480 04396 00611 8160 0694 6 19 em Gasket for Plate Shield 12085 UC300275 8160 0781 2 8 cm Gasket for Plate Shield 12085 UC300227 0515 0913 3 Screw MA for Plate Shield 28480 0515 0913 0515 0914 8 12 Screw M3 for Plate Shield 28480 0515 0914 04396 00632 5 1 Case Shield A3A1 Circuit Side 28480 04396 00632 0515 1005 0 4 Screw for Case Shield 28480 0515 1005 8160 0512 7 23 Gasket A3A2 Case Shield 28480 8160 0512 0515 1550 0 4 Screw for A3A2 28480 0515 1550 04291 00625 10 1 Shield Component Side 28480 04291 00625 04291 00626 1 1 Shield 6 Circuit Side 28480 04291 00626 0515 0914 8 5 Screw for Case Shield 28480 0515 0914
143. A53 FDD The A53 FDD Flexible Disk Drive can be checked using the external test 18 DISK DR FAULT ISOL N a Press PRESET SYSTEM SERVICE MENU TESTS 1 8 EXECUTE TEST to run the external test 18 b As the analyzer instructs insert a flexible disk into FDD Use a formatted but blank flexible disk otherwise the data on the disk will be overwritten by this test Then press CONT c Check the test result PASS or FAIL that is displayed at the end of the test m If this test fails replace the A53 FDD 6 6 Digital Control Troubleshooting 7 Check the A32 I BASIC Interface and the mini DIN Keyboard The mini DIN external keyboard is connected to the A32 I BASIC I O connector and is used to develop programs If the external keyboard of the I Basic is not working perform the following procedure to verify the keyboard Press PRESET SYSTEM SERVICE MENU TESTS 1 1 EXECUTE TEST to run the internal test 1 Al CPU m If the internal test 1 passes the HP HIL driver circuit on the Al CPU is probably working Inspect cables between the external keyboard and the A1 CPU through the A32 I BASIC interface If the cable is good replace the external keyboard m If the internal test 1 fails replace the Al CPU Digital Control Troubleshooting 6 7 TROUBLESHOOT THE A51 GSP and A52 LCD Use this procedure when the LCD Liquid Crystal Display is unacceptable or not being bright 1 Run the Internal Test
144. AFETY CONSIDERATIONS 9 1 REQUIRED EQUIPMENT 2 2 2 3 2 WARM UP FOR ADJUSTMENTS AND CORRECTION CONSTANTS 3 2 INSTRUMENT COVER REMOVAL 3 2 ORDER OF ADJUSTMENTS 2 1 a 3 2 UPDATING Correction Constants USING THE ADJUSTMENTS PROGRAM 3 3 Adjustments Program 3 3 Keyboard and Mouse 3 3 Controller Requirement 3 4 Updating Correction Constants 3 5 40 MHz REFERENCE OSCILLATOR FREQUENCY ADJUSTMENT 3 6 Required Equipment 3 6 Procedure oaoa a a 3 6 520 MHz LEVEL ADJUSTMENT 3 8 Required Equipment 3 8 Procedure oaoa a a 3 8 COMB GENERATOR ADJUSTMENT aaa a 3 10 Required Equipment 3 10 3 10 STEP PRETUNE CORRECTION 5 3 13 Required Equipment 3 13 Procedure 3 13 SECOND LOCAL PLL LOCK ADJUSTMENT 2 2 2 2 2 3 14 Required Equipment 4 ll 9 14 Procedure a oa o a a a 3 14 SOURCE VCXO ADJUSTMENT 3 16 Required Equipment 3 16 3 16 THIRD LOCAL VCXO ADJUSTMENT 2 2 2 3 17 Required Equipment 0 3 17 Procedure oaoa a a
145. Agilent 4291B RF Impedance Material Analyzer SERVICE MANUAL SERIAL NUMBERS This manual applies directly to instruments with serial number prefix JP1KE or firmware revision 01 00 For additional important information about serial numbers read ANALYZERS COVERED BY THIS MANUAL in General Information of this service manual E PB Agilent Technologies ee Agilent Part No 04291 90111 Printed in JAPAN March 2001 Notice The information contained in this document is subject to change without notice This document contains proprietary information that is protected by copyright rights are reserved No part of this document may be photocopied reproduced or translated to another language without the prior written consent of the Agilent Technologies Company Agilent Technologies Japan Ltd Component Test PGU Kobe 1 3 2 Murotani Nishi ku Kobe shi Hyogo 651 2241 Japan Copyright 1998 2000 2001 Agilent Technologies Japan Ltd Manual Printing History The manual printing date and part number indicate its current edition The printing date changes when a new edition is printed Minor corrections and updates that are incorporated at reprint do not cause the date to change The manual part number changes when extensive technical changes are incorporated January 1998 2 2 2 2 7 222 2 2 2 22 First Edition 1998
146. B 0 24 dB 19 dBm 500 MHz 7 22 dB 0 24 dB 19 dBm 800 MHz 8 56 dB 0 24 dB 19 dBm 1 2 GHz 410 33 dB 0 23 dB 19 dBm 1 5 GHz 11 67 dB 0 23 dB 13 dBm 10 MHz 5 04 dB 0 22 dB 7 dBm 1 MHz 4 00 dB 0 22 dB 7 dBm 10 MHz 4 04 dB 0 22 dB 7 dBm 15 MHz 4 07 dB 0 22 dB 7 dBm 100 MHz 4 44 dB 0 24 dB 7 dBm 200 MHz 4 89 dB 0 24 dB 7 dBm 300 MHz 5 33 dB 0 24 dB 7 dBm 500 MHz 6 22 dB 0 24 dB 7 dBm 800 MHz 7 56 0 24 dB 7 dBm 1 GHz 8 44 dB 0 23 dB 7 dBm 1 2 GHz 9 33 dB 0 23 dB 7 dBm 1 5 GHz 10 67 0 23 dB 7 dBm 1 8 GHz 12 00 0 23 dB 1 dBm 1 MHz 4 00 dB 0 22 dB 1 dBm 1 GHz 8 44 dB 0 23 dB 2 22 Performance Tests Measurement Accuracy Test Norm Temp High Impedance Test Head Measurement Uncertainty 0 08 uS 0 34 pS 3 4 pS 6 7 uS 10 0 pS 16 7 uS 21 3 uS 28 uS 35 pS 46 pS E63 uS 71 pS Measurement Uncertainty Test Head Norm Temp High Z Standard Open Osc Level 400 mV Frequency Measurement Calibration Test Limit Test Result Parameter Value 1 MHz uS 2 12 5 10 2 uS 3 24 pS 100 MHz 14 4 ps 200 MHz uS 28 4 uS 300 MHz Y mS 41 8 5 500 MHz Y mS 69 1 600 MHz Y mS 97 6 uS 800 MHz mS 130
147. Cable 122 cm TOEXT TO EXT REF Input REFERENCE 4291B Top View Spectrum Analyzer OUTPUT O 200 ODO o 00 20 CI A3A2J23 SMA m BNC f Adapter capt gt N m BNC f Adapter BNC m BNC m Cable 61 cm 507021 Figure 7 21 2 05858 GHz Signal Test Setup Press to initialize the 4291B Initialize the spectrum analyzer Then set the controls as follows Controls Settings Center Frequency 2 05858 GHz Span 1 MHz Reference Level 0 dBm On the 4291B press the following keys to set the level control DAC value to 13 000 System SERVICE MENU SERVICE MODES OSC OSC AUTO man then the label changes to OSC auto MAN OSC DAC AUTO man then the label changes to USC DAC auto MAN OSC DAC VALUE 2 3 O On the spectrum analyzer press to move the marker to the peak of the ALC output signal Check that the frequency is 2 05858 GHz and the level is higher than 13 dBm The displayed trace should be as shown in Figure 7 22 m If the signal is good continue with the next step m If the signal is bad the Source First Mixer is faulty Replace A3A2 Source Troubleshooting 7 25 2 05858 GHz Level gt 13 dBm MKR 2 058579 GHz 8 80 dBm REF 0 0 dBm ATTEN 10 dB
148. D An external test 27 fails Troubleshoot the transducer group in accordance with Chapter 9 241 RECEIVER GAIN TEST FAILED An external test 22 RECEIVER GAIN fails Troubleshoot the receiver group in accordance with Chapter 8 22 RECEIVER GAIN OUT OF SPEC An external test 25 FRONT ISOL N fails receiver IF gain is incorrect Troubleshoot the receiver group in accordance with Chapter 8 243 GAIN TEST FAILED An external test 23 GAIN fails Replace the receiver IF See Chapter 8 24 A6 VI NORMALIZER TEST FAILED An external test 24 VI NORMALIZER fails Replace the receiver IF See Chapter 8 Messages 11 245 VCXO LEVEL OUT OF SPEC Maximum VCXO level is incorrect in performing an adjustment test 36 3RD VCXO LEVEL ADJ or an adjustment test 39 SOURCE VCXO LEVEL ADJ In the 3RD VCXO LEVEL ADJ replace the receiver IF In the SOURCE VCXO LEVEL ADJ replace the A3AI source vernier 248 VCXO TUNING VOLTAGE OUT OF LIMIT VCXO tuning voltage is incorrect in performing an adjustment test 36 3RD VCXO LEVEL ADJ or an adjustment test 39 SOURCE VCXO LEVEL ADJ In the 3RD VCXO LEVEL ADJ replace the receiver In the SOURCE VCXO LEVEL ADJ replace the A3AT source vernier Messages 12
149. ENTER 0Hp4291 Test status PRINT Test status 1 Sample Program Using DIAG TEST RES Table 10 1 shows the test status abbreviation its definition and the GPIB test status code Table 10 1 Test Status Terms Status Abbreviation Definition GPIB Code PASS Pass PASS FAIL Fail FAIL IP In progress BUSY ND Not done NDON DONE Done DONE The test status is stored in nonvolatile memory battery backup memory If the power to the nonvolatile memory is lost the analyzer will set all test status abbreviations to ND not done If a test is aborted by pressing any key during its execution the test status is undefined Diagnostic Tests The analyzer has 45 built in diagnostic tests The analyzer performs the power on self test every time the power on sequence occurs when the analyzer is turned on These tests are used to test verify adjust and troubleshoot the analyzer The 45 built in diagnostic tests are divided by function into three categories internal tests external tests adjustment tests and display test Each group is described below Descriptions of the tests in each category are given in the Test Descriptions section To access the first test in each category the category softkey is available in the tests menu The power on self test consists of internal tests 4 5 6 7 and 9 through 16 They are executed in the listed order If any of the tests fail that t
150. G mounting WIV working inverse voltage MY mylar WW wirewound n nano W O without Replaceable Parts 12 3 Top View Assemblies A2 A3A1 A3A2 A4 A60 Opt 1D5 CES12001 Figure 12 1 Top View 1 Major Assemblies 12 4 Replaceable Parts Table 12 3 Top View 1 Major Assemblies Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number A2 04396 66522 0 1 Post Regulator 28480 04396 66522 1 04291 66508 1 1 Source Vernier 28480 04291 66503 2 04396 66513 9 1 Second Lo 28480 04896 66518 2 04396 69513 5 Second Lo rebuilt exchange 28480 04396 69513 5086 7620 1 1 Source 28480 5086 7620 5086 6620 Source rebuilt exchange 28480 5086 6620 4 04396 61004 3 1 First LO Receiver RF 28480 04396 61004 4 04396 69004 9 First Lo Receiver RF 28480 04396 69004 rebuilt exchange Ab 04396 66505 9 1 Synthesizer 28480 04396 66505 Ab 04396 69505 5 Synthesizer rebuilt exchange 28480
151. HEAD 32 HI TEMP HI Z HEAD 33 HI TEMP LO Z HEAD 10 Press EXECUTE TEST and perform the test according to the displayed instructions Test station connector locations are shown in Figure 9 4 m If the test is passed perform the test for the other available test heads in the same manner If all the tests pass the analyzer is probably operating correctly m If a test fails on test number 30 or 31 visually inspect the test heads 7 mm connector and calibration kit Troubleshoot them if necessary If the 7 mm connector and calibration kit are correct and the test still fails replace the test head m If a test fails on test number 32 or 33 go to the High Temperature Test Head Trouble Isolation procedure CABLE ISOL N Test Failure Troubleshooting In the CABLE ISOL N test the receiver gain is tested first Then the isolation between the test station connectors is tested When the CABLE ISOL N test fails troubleshoot the analyzer as follows m When RECEIVER GAIN OUT OF SPEC is displayed confirm the connection between the S and R connectors and reperform the test If the test still fails replace the A4 First LO Transducer RF 9 6 Transducer Troubleshooting When CABLE ISOL N TEST FAILED is displayed confirm the connection between the test station and the mainframe and reperform the test If the test still fails confirm the connections shown in Figure 9 5 and reperform the test If the test still fails replace the test station
152. HESIZER OUTPUTS The output signals from the A5 Synthesizer are listed below The input signal to A5 is the external reference signal from the EXT REF connector See Figure 7 1 If all the output signals and the 4291B operation using the EXT REF input signal are good A5 is probably good INT REF signal on the rear panel FRAC OSC signal going to 4 1 STEP OSC signal going to A4A1 520 MHz signal going to 2 40 MHz signal going to 1 and A6 Perform the following procedures sequentially to verify all the signals listed above and to verify the 4291B operation when the EXT REF signal is used In these procedures the 40 MHz signal is not verified because it is indirectly verified if the INT REF signal is good The signals are observed using test equipment and the 4291B self test functions For detailed information about the self test functions see the Service Key Menus 1 Check the INT REF Signal The INT REF signal 10 MHz 2 dBm typical on the rear panel is derived from the 40 MHz reference signal through the first and second 1 2 dividers See the A5 Synthesizer block in Figure 7 1 Perform the following steps to verify the INT REF signal s frequency and level a On the 4291B press the following keys to measure the INT REF frequency by using the bus measurement function Preset Sweep NUMBER OF POINTS 2 x1 System SERVICE MENU SERVICE MODES BUS MEAS OFF FREQ BUS OFF 5 1 BUS MEAS on OFF then t
153. K is recommended because the internal memory data is lost when the analyzer power is off Press STATE to select status save Save the status as m When the Normal Temperature Test Head is connected press 4 0 0 DONE to save the status with a file name of 400 STA The setup for the test at 400 mV OSC level is now saved m When the High Temperature Test Head is connected press 2 5 0 DONE to save the status with a file name of 250 STA The setup for the test at 250 mV OSC level is now saved Press Sweep LIST MENU EDIT LIST to call the sweep list editor Change all OSC level settings to 41 mV using the following procedure Press SEGMENT 1 to select the first segment Press EDIT to edit the segment Press OSC LEVEL 4 1 k m to set the OSC level to 41 mV Press SEGMENT DONE to store the segment e Edit the other segments in the same manner f Press LIST DONE to complete the sweep list a Press Save to enter the save menu Press STATE to select status only save Press 4 1 DONE to save the status with a file name of 41 STA The setup for the test at 41 mV OSC level is now saved Analyzer Calibration Note Calibration must be done when the test head is replaced because the calibration data is valid only for the test head used in the calibration Y Y Calibration must be done when the analyzer is turned ON because the calibration data is erased w
154. Level Frequency Measurement Parameter 1 MHz 10 MHz 100 MHz 200 MHz 300 MHz 500 MHz 600 MHz 800 MHz 1 GHz 1 3 GHz 1 6 GHz 1 8 GHz High Temp High Z Open 250 mV lt ej c c nd c c KK d High Temp High Z Open 4 mV lt ej c c nd cd c on cd Test Limit uS 10 2 pS 12 2 pS uS 32 4 pS uS 56 5 uS mS 80 0 uS mS 128 pS mS 169 aS mS 226 pS mS 286 uS mS 460 pS mS 586 uS mS 678 uS Test Limit uS 20 2 pS uS 22 2 pS uS 42 4 pS uS 66 5 pS mS 90 0 uS mS 188 pS mS 179 uS mS 236 uS mS 296 uS mS 470 aS mS 596 uS mS 688 uS Test Result uS Test Result uS uS uS uS uS uS uS uS uS uS uS uS Measurement Uncertainty 0 0 pS 0 3 pS 3 4 pS 6 7 uS 10 0 pS 17 pS 21 pS 28 uS 35 pS t46 uS 63 uS 71 pS Measurement Uncertainty 0 0 pS 0 3 pS 3 4 pS 6 7 uS 10 0 uS 17 pS 21 uS 28 uS 5 uS 46 uS 63 uS E71 uS Performance Tests 2 39 Test Head Standard Osc Level Frequency Measurement Calibration Test Limit Parameter 1 MHz 10 MHz 100 MHz 200 MHz 300 MHz 500 MHz 600 MHz 800 MHz 1 GHz 1 3 GHz 1 6 GHz 1 8 GHz Test Head Standard Osc Level Frequency Measurement Calibration Test Limit Parameter 1 MHz 10 MH
155. Level Correction Constants are control values for the level DAC in the A3A1 Source Vernier These affect the following performance specifications OSC Level Accuracy DC Bias Correction Constants are control values for the level DACs in the 22 DC bias 1 2 These affect the following performance specifications DC Bias Level Accuracy 10 28 Service Key Menus SYNTHESIZER CONTROL MENU Figure 10 12 shows the synthesizer control menus To display the synthesizer control menu press System SERVICE MENU SERVICE MODES and SYNTH Each softkey in the synthesizer control menu is described below 1ST LO osc AUTO SINGLE TRIPLE SYNTHESIZER RETURN SERVICE MENU CONTROL MENU SERVICE ist Lo ose FN 086 MODES AUTO AUTO 4 05 AUTO NARROW STEP 05 AUTO WIDE FREQUENCY OFFSET RETURN RETURN STEP 05 POLARITY AUTO man AUTO OSC OUT ON off LOOP open CLOSE POLARITY AUTO STEP DAC AUTO man DAC VALUE RETURN RETURN 05510025 Figure 10 12 Synthesizer Control Menu Service Key Menus 10 29 ist LO OSC 1 DIAG SYNT FLOC MODE AUTO SING TRIP Displays the control menu that allows you to control the 1st LO first local oscillator in the AAA Ist LO The softkeys in this control menu are described below The abbreviation of the current setting auto single or triple is displayed in the brackets of the menu
156. MEAS on OFF then the label changes to BUS MEAS ON off Initialize the spectrum analyzer Then set the controls as follows Controls Settings Start Frequency 400 MHz Stop Frequency 1 GHz Reference Level 10 dBm On the 4291B press Span 0 x1 Center 1 to set the center frequency to the first setting of 1 MHz Perform the following steps to verify the STEP OSC signal at a center frequency of 1 MHz i Check that the 4291B marker reading is 1 8359 U 0 01 The frequency bus measures the STEP OSC frequency through a 1 256 divider Therefore the measured value is 1 256 of the actual frequency For example the measured value at a center frequency of 1 MHz is 1 8359 U 470 MHz divided by 256 The unit U in the frequency bus measurement is equivalent to MHz ii On the spectrum analyzer press to move the marker to the peak of the STEP OSC signal and check that the spectrum analyzer s marker reading is between 3 dBm to 5 dBm iii Check that the trace displayed on the spectrum analyzer is as shown in Figure 7 8 Source Troubleshooting 7 11 STEP OSC Signal 470 MHz at Center 1 MHz and Span 0 Hz uro Second Harmonic REF 10 0 dBm 20 dB START 400 MHz STOP 1000 GHz RES BW 1 2 VBW 3MHz AWP 20 0 msec C6 07008 Figure 7 8 Typical STEP OSC Signal at Center 1 MHz m If the signal is good continue with the ne
157. Measurement Procedure selected the trace is typically flat at approximately 2 025 U 10 5 5 V 2 025 0 This node is located on the A2 post regulator and detects the voltage of the supplied to the analog boards To observe this node perform the steps in the Bus Measurement Procedure selected the trace is typically flat at approximately 42 025 U 10 6 45 3 V 2 1465 U This node is located on the A2 post regulator and detects the voltage of the supplied to the A3A3 source To observe this node perform the steps in the Bus Measurement Procedure selected the trace is typically flat at approximately 2 1465 U 10 7 48 5 V 1 8955 U This node is located on the A2 post regulator and detects the voltage of the supplied to the A3A3 source To observe this node perform the steps in the Bus Measurement Procedure selected the trace is typically flat at approximately 1 8955 U 10 8 15 V AUX 1 92 U This node is located on the A2 post regulator and detects the voltage of the power supplied to the probe power connectors on the front panel To observe this node perform the steps in the Bus Measurement Procedure selected the trace is typically flat at approximately 1 8955 U 45 9 15 V 1 92 U This node is located on the A2 post regulator and detects the voltage of the supplied to the analog boards To observe this node perform the steps in the Bus Measurement Procedure
158. O RETURN RETURN DAC RELAY ON off RETURN VDAC AUTO man VDAC VALUE IDAC AUTO man IDAC VALUE GAIN DAC AUTO man GAIN DAC VALUE RETURN Figure 10 14 DC Bias Control Menu DC BIAS AUTO man DIAG SERV DCB MODE AUTO MAN Toggles the DC bias control mode to automatic mode and manual mode In the automatic mode the analyzer sets the DC bias automatically according to the measurement settings In the manual mode the DC bias is controlled by the following softkeys POLARITY 1 DIAG SERV DCB POL AUTO POS NEG Displays the control menu that allows you to control the DC bias polarity control in A22 DC bias 1 2 The softkeys in this control menu are described below The abbreviation of the current setting is displayed in the brackets of the menu POLARITY AUTO sets the DC bias polarity control to automatic mode In this mode POS NEG the analyzer controls the A22 automatically according to the measurement setting sets the DC bias polarity control to positive sets the DC bias polarity control to negative CUR OFST 1 DIAG SERV DCB OFFS AUTO POS NEG Displays the control menu that allows you to control the DC bias current offset The softkeys in this control menu are described below The abbreviation of the current setting is displayed in the brackets of the menu CUR OFST AUTO sets the DC bias current offset to automatic mode In thi
159. OSC Step Oscillator This node is located in the step oscillator on the A5 synthesizer and measures the step oscillator frequency through the 1 256 divider The typical trace is flat and the trace value depends on the measurement settings center and span settings The typical values for several settings are provided in Table 7 1 STEP OSC Frequency in chapter 7 Service Key Menus 10 25 4 FN OSC Fractional N Oscillator This node is located in the fractional N oscillator on the A5 synthesizer and measures the fractional N oscillator frequency through the 1 16 divider The typical trace is flat and the trace value depends on the measurement settings center and span settings The typical values for several settings are provided in the Check the FRAC N OSC Signal in chapter 7 5 REF OSC Reference Oscillator This node is located in the INT REF output circuit on the A5 synthesizer and measures the INT REF output frequency 10 MHz through the 1 4 divider The typical trace is flat and within 2 4996 U to 2 5004 U To observe this node perform the steps in the Bus Measurement Procedure At step 2 in the procedure press the following keys to make a fast sweep Preset Sweep NUMBER OF POINTS 1 0 1 6 3RD LO OSC Third Local Oscillator This node is located in the third local oscillator on the A6 receiver IF and measures the loop back frequency of 40 kHz from the 85 6 MHz 85 68 MHz VCO The typical trace is fl
160. OSC Step Oscillator generates a CW signal between 470 MHz and 910 MHz in 20 MHz steps The signal is supplied to the A4A1 1st LO and is used to generate the 1st local oscillator signal only in the triple loop mode The output signal frequency depends on the frequency center setting as shown in Table 11 1 Table 11 1 STEP OSC Frequency 4291B STEP OSC Center Frequency Frequency 1 MHz lt Center lt 48 92 MHz 470 MHz 48 92 MHz Center 128 92 MHz 490 MHz 128 92 MHz lt Center 208 92 MHz 510 MHz 208 92 MHz lt Center 288 92 MHz 530 MHz 288 92 MHz lt Center 368 92 MHz 550 MHz 368 92 MHz lt Center 448 92 MHz 570 MHz 448 92 MHz lt Center 528 92 MHz 590 MHz 528 92 MHz lt Center lt 608 92 MHz 610 MHz 608 92 MHz lt Center lt 688 92 MHz 630 MHz 688 92 MHz lt Center 768 92 MHz 650 MHz 768 92 MHz Center 848 92 MHz 670 MHz 848 92 MHz lt Center lt 928 92 MHz 690 MHz 928 92 MHz lt Center 1008 92 MHz 710 MHz 1008 92 MHz lt Center 1088 92 MHz 730 MHz 1088 92 MHz lt Center 1168 92 MHz 750 MHz 1168 92 MHz x Center 1248 92 MHz 770 MHz 1248 92 MHz lt Center lt 1328 92 MHz 790 MHz 1328 92 MHz lt Center 1408 92 MHz 810 MHz 1408 92 MHz lt Center lt 1488 92 MHz 830 MHz 1488 92 MHz lt Center lt 1568 92 MHz 850 MHz 1568 92 MHz lt Center 1648 92 MHz 870 MHz 1648 92 MHz lt Center 1728 92 MHz 890 MHz 1728 92 MHz lt Center 1800 00 MHz 910 MHz
161. P OSC Frequency 11 15 Osc Level Setting vs Output Attenuator Setting a 11 19 TRD Amplifier Gain Settings 2 11 28 Manufacturers Code List 12 2 List of Abbreviations a a a a a a a 12 3 Top View 1 Major Assemblies 12 5 Top View 2 RF Flexible and RF Semi rigid Cables 12 7 View 12 0 View Misc 12 9 Bottom View 1 Major Assemblies 12 11 Bottom View 2 RF Semi rigid Cables and Wires 12 18 Bottom View Miscellaneous Parts 12 15 Front Assembly Parts 1 5 Outside 12 16 Front Assembly Parts 2 5 12 17 Front Assembly Parts 3 5 12 18 Front Assembly Parts 4 5 12 19 Front Assembly Parts 5 5 12 20 Rear Assembly Parts Outside 12 21 Rear Assembly Parts 2 Inside 12 22 Miscellaneous Parts 1 Side Viwes 12 23 Miscellaneous Parts 2 Chassis 12 24 Miscellaneous Parts 5 12 25 Miscellaneous Parts 4 Other Shields 12 26 Miscellaneous Parts 5 Accessori
162. Parts CES12012 Figure 12 17 Test Station and Test Head Parts 12 28 Replaceable Parts Table 12 22 Test Station and Test Head Parts Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 41 04291 65041 0 1 TRD Amp 28480 04291 65041 41 04291 69041 8 1 TRD Amp rebuilt exchange 28480 04291 69041 1 04291 04051 4 1 Cover Top 28480 04291 04051 0515 0914 8 10 Screw for cover top 28480 0515 0914 2 04291 61061 6 1 Cable Assembly 28480 04291 61061 3 04291 20071 2 1 Case Top 28480 04291 20071 04291 20072 3 1 Case Bottom 28480 04291 20072 04291 87151 9 1 Label 28480 04291 87151 0515 1718 2 2 Screw M4 for case 28480 0515 1718 6960 0081 9 1 Plug Hole 28480 6960 0081 4 1250 2468 0 2 Connector N SMA 0515 0907 9 8 Screw M3L8 for connector 5 04291 61061 6 Cable Assembly 28480 04291 61061 1460 2369 5 2 Spring 28480 1460 2369 6 04291 24068 5 2 Knob 28480 04291 24068 04291 25062 1 2 Insulator for Knob 28480 04291 25062 2190 0014 1 2 Washer LK for Knob
163. Preregulator The A40 preregulator contains a rectifier and a switching regulator converts the line voltage to 25 V and provides it to the 50 DC DC converter 50 DC DC Converter The A50 DC DC Converter consists of the two switching regulators 1 and 2 The DC DC converter provides an LED visible at the top to indicate circuit status See Figure 5 12 in chapter 5 The shutdown LED is turned off when the overcurrent protection circuit activates The circuit activates when an overcurrent is sensed on the 5 VD power line when an overcurrent is sensed on the four power supplies 18 V and 7 8 V or when the FAN LOCK signal is sensed It shuts down the five power supplies of the switching regulators 1 and 2 For A50 to work properly the 7 8 V must be loaded approximately 680 ohms more than 125mW If it is not the other preregulated voltages in the A50 DC DC converter will not be correct Switching Regulator 1 Switching regulator 1 converts the 25 V to the regulated 5 VD digital supply The 5 VD goes directly to the A1 CPU Switching Regulator 2 Switching preregulator 2 converts the 24 V to four DC voltages 7 8 V 7 8 V 18 V 18 V The voltages are routed to the A2 post regulator for final regulation Regulated 5V Digital Supply 5 VD The 5VD power supply is fully regulated in the A50 DC DC converter It goes directly to the Al CPU and is supplied to all assemblies requiring a digital 5 V supply
164. Q 2 mQ 1 MHz 0 897 mrad mrad 15 mrad 10 MHz Z Q 116 mQ mQ 4 mQ 10 MHz 0 rad 109 mrad mrad 4 mrad 100 MHz 7 0 268 mQ mQ 27 mQ 100 MHz 0 25 0 mrad mrad 2 5 mrad 200 MHz Z Q 504 mQ mQ 67 mQ 200 MHz 0 rad 22 5 mrad 3 0 mrad 300 MHz Z 0 786m2 _ 110 mQ 300 MHz 0 rad 21 5 mrad _ 3 0 mrad 500 MHz Z 0 2 13 Q Q 0 31 0 500 MHz 8 rad 24 5 mrad _ 3 5 mrad 600 MHz Z 0 6 16 0 0 0 78 Q 600 MHz 0 rad 39 7 mrad mrad 5 0 mrad 1 GHz Z 0 3 95 Q 0 0 52 Q 1 GHz 0 rad 45 9 mrad mrad 6 0 mrad 1 8 GHz Z 0 2 19 0 0 0 22 0 1 3 GHz 8 rad 99 4 mrad mrad 10 0 mrad 1 6 GHz Z 0 2 06 0 0 0 16 0 1 6 GHz 0 rad 191 mrad mrad 15 mrad 1 8 GHz Z 0 3 50 0 0 0 37 0 1 8 GHz 0 rad 95 4 mrad mrad 10 0 mrad Performance Tests 2 45 Test Head High Temp High Z Standard 10 em Airline with Short Osc Level 41 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz Z mQ 102 mQ 2 mQ 1 MHz 0 rad 897 mrad rad 15 mrad 10 MHz 7 0 116 mQ mQ 4 mQ 10 MHz 0 rad 109 mrad 4 mrad 100 MHz Z 0 269 mQ 27 mQ 100 0 rad 25 1 mrad 2 5 mrad 200 MHz Z Q 509 mQ mQ 67 mQ 200 MHz 0 rad 22 7 mrad 3 0 mrad 300 MHz Z 0 799 mQ 110 mQ 300 MHz 0 rad 21 9 mrad 3 0 mrad 500
165. RETURN RETURN Figure 10 15 TRD Control Menu Service Key Menus 10 37 AUTO man DIAG SERV TRAN MODE AUTO MAN Toggles the TRD gain control mode to automatic mode normal operation manual mode In the automatic mode the analyzer controls the TRD gains GV ATT GI ATT and TRD AMP settings automatically according to the measurement setting In the manual mode the TRD gains are controlled by the following softkeys GV ATT DIAG SERV TRAN GVAT DBO DB18 Displays the control menu for the GV ATT The softkeys in this control menu are described below The abbreviation of the current setting 0 dB or 18 dB is displayed in the brackets of the menu GV OdB sets the TRD GV ATT setting to O dB 18 dB sets the TRD GV ATT setting to 18 dB GI DIAG SERV TRAN GIAT DBO DB18 Displays the control menu for the GI ATT The softkeys in this control menu are described below The abbreviation of the current setting 0 dB or 18 dB is displayed in the brackets of the menu GI OdB sets the TRD GI ATT setting to 0 dB 18 dB sets the TRD GI ATT setting to 18 dB TRD AMP 1 DIAG SERV TRAN GAIN DBO DB10 Displays the control menu for the TRD The softkeys in this control menu are described below The abbreviation of the current setting 0 dB or 10 dB is displayed in the brackets of the menu TRD AMP OdB sets the TRD AMP setting to 0 dB
166. SC Signal at A4A1J8 7 17 2 Check the Ist LO OSC Signal at A4A1J4 7 19 CHECK AN A3A1 SOURCE VERNIER OUTPUT 7 21 1 Check the 21 42 2 7 21 CHECK A3A2 2ND LO OUTPUTS 7 23 1 Check the 2nd Local Oscillator Signal 1 28 2 Check the 2 05858 GHz Signal 1 24 CHECK A3A3 SOURCE OUTPUT 7 27 Contents 4 10 1 Check the RF 7 27 CHECK OUTPUT ATTENUATOR CONTROL SIGNALS 2 202 2 7 29 1 Check Control Signals 7 29 CHECK A22 DC BIAS 1 2 OUTPUT 2 2 7 31 1 Check A22 Output Voltages 7 31 CHECK THE A60 HIGH STABILITY FREQUENCY REFERENCE 7 38 Receiver Troubleshooting INTRODUCTION ss 8 1 RECEIVER GROUP TROUBLESHOOTING 8 8 START 8 4 Test Equipment sn 8 4 2 8 4 FRONT ISOL N Test Failure Troubleshooting 8 5 Transducer Troubleshooting INTRODUCTION 2 9 1 TRANSDUCER GROUP TROUBLESHOOTING SUMMARY 9 4 START HERE 9 5 Test Equipment 2 a a a a a 9 5 Procedure a 9 5 CABLE ISOL N Test Failure Troubleshooting ccs 9 6 Hi
167. Sequence External Test 17 FRONT PANEL DIAG A3 I O Connector None Inspect the Power On Sequence 1 Check the GPIB Interface 1 A32 I BASIC Interface None Inspect the Power On Sequence 1 Check the A32 EBASIC Interface and the mint DIN Keyboard 4 A40 Pre Regulator None Internal Test 4 A2 POST REGULATOR 41 Amp Inspect the Power On Sequence 1 External Test 12 CABLE ISOL N Test Station Cable None Inspect the Power On Sequence 1 External Test 12 CABLE ISOL N A50 DC DC Converter None Internal Test 4 A2 POST REGULATOR A51 GSP None Inspect the Power On Sequence 1 A52 LCD None Inspect the Power On Sequence 1 A53 FDD Inspect the Power On Sequence 1 External Test 18 DSK DR FAULTY ISOLN A60 High Stability Frequency Reference 10 MHz Reference Oscillator Frequency Inspect the Power On Sequence 1 Frequency Accuracy Test Opt 1D5 2 1 See Chapter 4 2 See Chapter 2 3 See Chapter 10 4 See Chapter 6 14 2 Post Repair Procedures FIRMWARE INSTALLATION No firmware is installed in new Al CPU assembly When you replace a faulty Al CPU with a new one perform the following steps to install the firmware into the A1 CPU Ordering the Firmware Diskette A firmware diskette 3 5 inch that contains the analyzer s firmware is required for the firmware installation If you do not have a firmware diskette you must order one For ordering information contact your nearest
168. Signal j Reconnect the H cable to the A5J7 FN OUT connector Continue with 3 Check the STEP OSC Signal 3 Check the STEP OSC Signal The step oscillator STEP OSC generates the signal for frequencies from 470 MHz to 910 MHz with a 20 MHz step The signal level is typically between 3 dBm and 5 dBm over the frequency range Perform the following steps to verify the STEP OSC signal a Remove the L cable from the A5J2 STEP PLL OUT connector Then connect the equipment as shown in Figure 7 7 7 10 Source Troubleshooting BNC m BNC m Cable 122 cm TO EXT TO EXT REF Input REFERENCE 4291B Top View nn Spectrum Analyzer OUTPUT joo C3 Oo o0 5 0 Adapter aa 2 4 1 N m BNC apter m BNC m Cable 61 cm 507007 Figure 7 7 STEP OSC Test Setup On the 4291B press the following keys to measure the STEP OSC frequency by using the bus measurement function Preset Sweep NUMBER of POINTS 2 GI System SERVICE MENU SERVICE MODES BUS MEAS OFF FREQ BUS OFF 5 BUS
169. TION 903 U S Canada 4 gt A Earth gt E Neutral Line Plug NEMA 5 15 125V 15 Cable 8120 1378 OPTION 905 Any country Neutral Plug CEE 22 250 Cable 8123 1396 OPTION 912 Denmark Neutral Plug DHCR 107 220V Cable 8120 2956 OPTION 918 Neutral Plug JIS C 8303 125V 15A Cable 8120 4753 Plug option 905 is frequently intercomnecting system peripherals used for components Figure B 1 Power Cable Supplied Power Requirement B 3 Error Messages This section lists the service related error messages that may be displayed on the analyzer display or transmitted by the instrument over GPIB Each error message is accompanied by an explanation and suggestions are provided to help in solving the problem When displayed error messages are usually preceded with the word CAUTION That part of the error message has been omitted here for the sake or brevity Some messages are for information only and do not indicate an error condition Two listings are provided the first is in alphabetical order and the second in numerical order Error Messages in Alphabetical Order 222 Ist LO OSC TEST FAILED The Ist LO OSC first local oscillator on the A4A1 1st LO does not work properly This message is displayed when an internal test 9 A4A1 IST LO OSC fails Troubleshoot the source group in accordance with Chapter 7 223 2nd LO OSC TEST FAILED The 2nd LO OSC secon
170. The Al CPU causes the message CAUTION PHASE LOCK LOOP UNLOCKED to be displayed The pretune DAC values are predefined by performing the Step Pretune Correction Constants and are stored in the EEPROM in the A1 CPU Multiplier x 13 The multiplier receives the 40 MHz reference signal and generates a 520 MHz signal This signal is supplied to A3A2 2nd LO and is used to generate the second local oscillator signal See Figure 11 10 The 520 MHz signal level is adjusted in the 520 MHz Level Adjustment 4 1 Ist LO The 4 1 1st LO generates the swept 1st local oscillator signal 2 05958 GHz to 3 85858 GHz with 1 mHz resolution The sweep range depends on the start and stop or center and span settings of the analyzer The signal frequency sweeps between the start frequency 2 05958 GHz to the stop frequency 4 3 85858 GHz The 1st local oscillator signal is supplied to the A3A3 source and the A4A2 receiver RF In the local oscillator signal is used to convert the 2 05858 GHz IF intermediate frequency signal to the 1 MHz to 1 8 GHz RF signal A4A2 also uses the first local to convert the RF input signal to the IF signal In addition the A4A1 1st LO decodes two digital control signals for the A4A2 Receiver RF and the decoded signals are supplied to A4A2 1st Local OSC Circuit The 1st local oscillator circuit is a phase locked oscillator The output signal is phase locked to the FRAC N OSC output signal The oscillator contain
171. This section summarizes the troubleshooting sequence in this chapter The receiver group troubleshooting flow is shown in Figure 8 2 Receiver Gain A4 Replacement F 6 Normalizer Replacement Front Isolation Fail Isolation Troubleshooting No Trouble Found Figure 8 2 Receiver Group Troubleshooting Flow C6 08002 Troubleshooting consists of two parts The first part is to isolate the fault between the A4A2 receiver RF and A6 receiver The second part is to verify signal isolation between the source circuits and the receiver circuits Fault isolation between A4A2 and 6 is done by using the following three self tests Test Number Description 22 RECEIVER GAIN 23 A6 GAIN 24 NORMALIZER After both the RECEIVER GAIN test and V I NORMALIZER test pass signal isolation between the source circuits and the receiver circuits is verified using the FRONT ISOL N test If the test passes the receiver group is probably operating correctly Receiver Troubleshooting 8 3 START HERE This section provides the step by step troubleshooting procedure using the 4291B self test functions external tests For detailed information about the self test functions see Chapter 10 Test Equipment Type N Cable 61 11500B or part of 11851B Procedure l Press Preset System SERVICE MENUS TESTS
172. UPDATING Correction Constants USING THE ADJUSTMENTS PROGRAM 2 Choose the Step Pretune Correction Constants 3 Follow the adjustment program instructions to update the correction constants Adjustments and Correction Constants 3 13 SECOND LOCAL PLL LOCK ADJUSTMENT The purpose of this procedure is to lock the second local Phase Lock Loop PLL Required Equipment Spectrum Analyzer 2 22 2 2 24 24 8566A B BNC f 5MA m adapter 4 PN 1250 1548 N m BNC f adapter 2 2 24 4 2 PN 1250 1476 cable 122 em 2 2 22 2 2 2 PN 8120 1840 Procedure 1 Turn the 4291B analyzer OFF 2 Remove the D cable from the A3A1 ALC Out connector Remove the I cable from the Second Local Out connector The connector locations are shown in Figure 3 9 Second Local Out 1 ALC Out 503010 Figure 3 9 Second Local PLL Adjustment Location 3 Connect the equipment as shown in Figure 3 1
173. V LED Normally A50 DC DC Converter T 5 V LED Normally On 5 V AUX LED Normally On L Normally Off 5 3 V LED Normally On tT 15 V LED Normally On A2 Post Regulator i 5 V LED Normally On CES05004 Figure 5 4 Eight A2 LED Locations 6 Run Internal Test 4 A2 POST REGULATOR Internal test 4 A2 POST REGULATOR verifies the A2 post regulator Perform the following procedure to check the A2 post regulator Internal test 4 is described in Internal Test 4 A2 POST REGULATOR Note Internal test 4 A2 POST REGULATOR is a built in diagnostic test The test i checks all A2 power supply voltages within limits using the DC BUS and the A D converter on the receiver IF If a power supply failure is found the analyzer stops the test process and displays the test result as shown in Figure 5 5 For more information about the internal test and the DC BUS see Chapter 10 Press System SERVICE MENU TESTS 4 x1 EXECUTE TEST to execute internal test 4 A2 POST REGULATOR After the test is completed the test result is displayed as shown in Figure 5 5 5 8 Power Supply Troubleshooting TEST 4 A2 POST REGULATOR PASS or FAIL 6505005 Figure 5 5 Displayed Test R
174. Y 11 Removal Place A3 facing A3A2 upward as shown in Figure 13 4 b Remove all cables and wires from c Remove the connector cover designated 3 in Figure 13 4 d Remove the four screws designated 2 in Figure 13 4 to remove A3A3 from A3A2 Replacement Procedures 13 7 A4 FIRST LO RECEIVER REPLACEMENT Tools Required m Torx screwdriver T15 m Pozidriv screwdriver pt size 1 small and Z2 medium m Open end wrench 1 4 inch and 5 16 inch Removal Procedure 1 Remove the top cover as described in the TOP COVER REMOVAL procedure 2 Remove the top shield plate 3 Remove the semi rigid cables D and D completely from the analyzer CES13005 Figure 13 5 A4 First Lo Receiver RF Replacement 4 Disconnect the flexible cables O 2 D and M from A4 5 Remove the two screws designated 2 in Figure 13 5 and lift A4 out Note AAA First LO and A4A2 Receiver RF must not be separated Y 13 8 Replacement Procedures 5 SYNTHESIZER REPLACEMENT Tools Required m Torx screwdriver T15 m Pozidriv screwdriver pt size 1 small m Open end wrench 1 4 inch Remova
175. YS Boldface type is used when a term is defined For example icons are symbols Italic type is used for emphasis and for titles of manuals and other publications Italic type is also used for keyboard entries when a name or a variable must be typed in place of the words in italics For example copy filename means to type the word copy to type a space and then to type the name of a file such as filet Computer font is used for on screen prompts and messages Labeled keys on the instrument front panel are enclosed in Softkeys located to the right of the LCD are enclosed in Safety Symbols General definitions of safety symbols used on equipment or in manuals are listed below NE Dh o Warning 4 Y Note vi Instruction manual symbol the product is marked with this symbol when it is necessary for the user to refer to the instruction manual Alternating current Direct current On Supply Off Supply In position of push button switch Out position of push button switch Frame or chassis terminal A connection to the frame chassis of the equipment which normally include all exposed metal structures This Warning sign denotes a hazard It calls attention to a procedure practice condition or the like which if not correctly performed or adhered to could result in injury or death to personnel This Caution sign denotes a hazard It calls attention to a procedure practice
176. a new one See Chapter 6 Messages 2 203 EEPROM CHECK SUM ERROR The data Correction Constants and so on stored in the A1 CPU s EEPROM are invalid This message is displayed when an internal test 1 A1 CPU fails Troubleshoot the A1 CPU in accordance with Chapter 6 199 EEPROM WRITE ERROR Data cannot be stored properly into the on the A1 CPU This message is displayed when performing the display background adjustment or updating correction constants in the EEPROM using the adjustment program Troubleshoot the A1 CPU in accordance with Chapter 6 205 F BUS TIMER CHIP TEST FAILED The A1 CPU s F BUS Frequency Bus timer does not work properly This message is displayed when an internal test 1 Al CPU fails Replace the Al CPU with a new one See Chapter 6 218 FAILURE FOUND FROM A D MUX TO A D CONVERTER trouble is found on the signal path from the A D multiplexer to A D converter on the A6 receiver IF This message is displayed when an internal test 5 A6 A D CONVERTER fails Troubleshoot the A6 receiver IF in accordance with Chapter 8 217 FAN POWER OUT OF SPEC The voltage of the fan power supply at the DC bus node 11 is out of its limits This message is displayed when an internal test 4 A2 POST REGULATOR fails Troubleshoot the power supply functional group in accordance with Chapter 5 208 FDC CHIP TEST FAILED The A1 CPU s FDC Flexible Disk drive control ship does not work properly This message is di
177. able Opt 001 A22 A23 10 04291 61609 8 1 Flat Cable Opt 001 A20 A22 1 04291 61604 3 1 Wire 20 12 04291 61006 9 Front Conn and Cable Assy STD Front A20 04291 61001 4 Front Conn and Cable Assy Opt 001 Front A20 A23 13 04396 61661 8 1 Flat Cable 1 20 Replaceahle Parts 12 13 e pee e 2 512007 Figure 12 6 Bottom View 3 Miscellaneous Parts 12 14 Replaceable Parts Table 12 9 Bottom View 3 Miscellaneous Parts Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 0515 1719 3 3 Screw M4 28480 0515 1719 3 0535 0031 2 4 M3 28480 0535 0031 4 04396 61701 7 1 PS Switch Assy 28480 04396 61701 5041 0564 41 1 Key Cap 28480 5041 0564 04896 01274 3 1 Switch Holder 28480 04396 0
178. ace Check the analyzer s Parallel Interface with a known working printer 1 Connect a known working printer to the PRINTER port on the 4291B s rear panel 2 Press PRINT STANDARD to print Check the mini DIN Keyboard Connector Check the analyzer s mini DIN Keyboard Connector with a known working keyboard 1 Connect a known working mini DIN keyboard to the KEYBOARD connector on the 4291B s rear panel 2 Press Display DISPLAY ALLOCATION HALF INSTR HALF BASIC then type any keys of the keyboard m If the typed characters are displayed on the LCD the Keyboard connector is working in the analyzer m If the result is not correct continue with Digital Control Troubleshooting chapter 4 12 Overall Troubleshooting Power Supply Troubleshooting INTRODUCTION Use this procedure only if you have read Troubleshooting and you believe the problem is in the power supply The procedure is designed to let you identify the bad assembly within the power supply functional group in the shortest possible time The power supply functional group consists of m A40 Pre Regulator m A50 DC DC Converter m A2 Post Regulator assemblies however are related to the power supply functional group because power is supplied to each assembly Figure 5 1 shows all power lines in simplified block diagram form For more information about the signal paths and specific connector pin numbers see Figure 5 12 Figure 5 13 and Figure 5 14 at the end o
179. ad mrad mrad Performance Tests Measurement Uncertainty 90 mQ 1 80 mrad 90 mQ 1 80 mrad 100 mQ 2 00 mrad 125 mQ 2 5 mrad 150 mQ 9 0 mrad 200 mQ 4 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 2 25 Test Head Norm Temp High Z Standard 500 Osc Level 41 mV Frequency Measurement Parameter 1 MHz Z 1 MHz 10 MHz 10 MHz 100 MHz 100 MHz 200 MHz 200 MHz 300 MHz 300 MHz 500 MHz 500 MHz 600 MHz 600 MHz 800 MHz 800 MHz 1 GHz 1 GHz 1 3 GHz 1 3 GHz 1 6 GHz 1 6 GHz 1 8 GHz 1 8 GHz DN TN DN DBN DN DN DN DTN DN DN OM 2 26 Performance Tests Calibration Value 0 mrad mrad mrad mrad mrad mrad mrad mrad mrad mrad mrad mrad Test Limit 451 mQ 9 02 mrad 458 mQ 9 15 mrad 525 mQ 10 5 mrad 700 mQ 14 0 mrad 775 mQ 15 5 mrad 925 mQ 18 5 mrad 1 20 Q 24 0 mrad 1 35 Q 27 0 mrad 1 50 0 30 0 mrad 2 13 0 42 5 mrad 2 35 Q 47 0 mrad 2 50 Q 50 0 mrad Test Result mQ mrad mQ mrad mQ mrad mQ mrad mQ mrad mQ mrad mrad mrad mrad mrad mrad mrad Measurement Uncertainty 90 mQ 1 80 mrad 90 mQ 1 80 mrad 100 mQ 2 0 mrad 125 mQ 2 5 mrad 150 mQ 3 0 mrad 200 mQ 4 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q
180. ad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 2 49 Test Head Standard Osc Level Frequency Measurement Parameter 1 MHz 1 MHz 10 MHz 10 MHz 100 MHz 100 MHz 200 MHz 200 MHz 300 MHz 300 MHz 500 MHz 500 MHz 600 MHz 600 MHz 800 MHz 800 MHz 1 GHz 1 GHz 1 3 GHz 1 3 GHz 1 6 GHz 1 6 GHz 1 8 GHz 1 8 GHz Z DN TN DN DBN DN DN DN DTN DN DN OM High Temp Low Z 50 9 41 mV Calibration Value 0 mrad mrad mrad mrad mrad mrad mrad mrad mrad mrad mrad mrad 2 50 Performance Tests Test Limit 427 mQ 8 53 mrad 440 mQ 8 80 mrad 575 mQ 11 5 mrad 825 mQ 16 5 mrad 975 mQ 19 5 mrad 1 28 0 25 5 mrad 1 78 0 35 5 mrad 2 08 0 41 5 mrad 2 38 0 47 5 mrad 3 58 0 71 5 mrad 4 08 0 80 5 mrad 4 33 0 86 5 mrad Test Result mQ mrad mQ mQ mQ mQ mQ 21112221 mrad mrad 21112221 mrad mrad 21112221 mrad mrad mrad Measurement Uncertainty 90 mQ 1 80 mrad 90 mQ 1 80 mrad 100 mQ 2 0 mrad 125 mQ 2 5 mrad 150 mQ 3 0 mrad 0 20 8 4 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad Test Head High Temp Low Z Standard 10 em Airline with Open Osc Level 25
181. ad 300 MHz Z 0 592 mQ 110 mQ 300 MHz 0 rad 16 2 mrad mrad 3 0 mrad 500 MHz Z 0 1 48 Q Q 0 31 0 500 MHz 8 rad 17 0 mrad _ 3 5 mrad 600 MHz Z 0 3 88 0 0 0 78 Q 600 MHz 0 rad 25 0 mrad _ mrad 5 0 mrad GHz 7 0 2 43 0 0 0 52 Q 1 GHz 0 28 2 mrad mrad 6 0 mrad 1 8 GHz Z 0 1 26 0 0 0 22 0 1 3 GHz 8 rad 57 0 mrad 10 0 mrad 1 6 GHz Z 0 1 14 9 0 0 16 0 1 6 GHz 0 rad 105 mrad mrad 15 mrad 1 8 GHz Z 0 1 98 Q 0 0 37 Q 1 8 GHz 8 rad 54 1mrad mrad 10 0 mrad Performance Tests 2 29 Test Head Norm Temp High Z Standard 10 em Airline with Short Osc Level 41 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz Z mQ 101 mQ 2 mQ 1 MHz 0 rad 893 15 10 MHz 7 0 111 mQ mQ 4 mQ 10 MHz 0 rad 104 mrad mrad 4 mrad 100 MHz Z 0 218 mQ 27 mQ 100 MHz 0 rad 20 3 mrad 2 5 mrad 200 MHz Z 0 399 mQ 67 mQ 200 MHz 0 rad 17 8 mrad 3 0 mrad 300 MHz Z 0 609 mQ 110 mQ 300 MHz 0 rad 16 7 mrad 3 0 mrad 500 MHz Z 0 1 58 0 0 0 31 0 500 MHz 0 rad 18 1 mrad mrad 3 5 mrad 600 MHz Z 0 4 19 Q 0 0 78 Q 600 MHz 8 rad 27 0 mrad 5 0 mrad 1 GHz Z 0 2 52 0 0 0 52 Q 1 GHz 0 rad 29 3 mrad 6 0 mrad 1 8 GHz Z 0 1 26 0 0 0 22 0 1
182. ad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad Test Limit 427 mQ 8 53 mrad 440 mQ 8 80 mrad 575 mQ 11 5 mrad 825 mQ 16 5 mrad 975 mQ 19 5 mrad 1 28 Q 25 5 mrad 1 78 Q 35 5 mrad 2 08 Q 41 5 mrad 2 38 Q 47 5 mrad 3 58 Q 71 5 mrad 4 03 Q 80 5 mrad 4 33 Q 86 5 mrad Test Result mQ mrad mQ mrad mQ mrad mQ mrad mQ mrad mQ mrad mrad mrad mrad mrad mrad mrad Performance Tests Measurement Uncertainty 90 mQ 1 80 mrad 90 mQ 1 80 mrad 100 mQ 2 0 mrad 125 mQ 2 5 mrad 150 mQ 3 0 mrad 0 20 8 4 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 0 25 Q 5 0 mrad 2 41 Test Head High Temp High Z Standard 500 Level 41 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz Z 0 452 mQ mQ 90 mQ 1 MHz 0 mrad 9 03 mrad mrad 1 80 mrad 10 MHz Z Q 465 mQ mQ 90 mQ 10 MHz 0 mrad 9 30 mrad mrad 1 80 mrad 100 MHz Z 0 600 mQ 100 mQ 100 MHz 0 mrad 12 0 mrad mrad 2 0 mrad 200 MHz Z 0 850 mQ 125 mQ 200 MHz 0 mrad 17 0 mrad 2 5 mrad 300 MHz Z 0 1 00 0 0 15 9 300 MHz 0 mrad 20 0 mrad mrad 3 0 mrad 500 MHz Z 0 1 30 0 0 20 8 500 MHz 0 mrad 26 0 mrad mrad 4 0 mrad 600 MHz Z 0 1 80 0 0 0 25 Q 600 MHz 0 mrad 36 0 m
183. ad mrad 10 0 mrad Performance Tests 2 43 Test Head High Temp High Z Standard 10 em Airline with Open Osc Level 41 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz Z 9 74 kQ 0 04 kQ 1 MHz 0 rad 447 mrad 2 mrad 10 MHz Z kQ 1180 0 4 0 10 MHz 0 rad 54 0 mrad 2 0 mrad 100 MHz Z 0 3 32 0 0 0 43 Q 100 MHz 0 rad 15 5 mrad mrad 2 0 mrad 200 MHz Z 0 1 73 0 0 0 25 Q 200 MHz 0 rad 17 0 mrad 2 5 mrad 300 MHz Z 0 1 18 0 0 18 mQ 300 MHz 0 rad 19 4 mrad 3 0 mrad 500 MHz Z 0 841 mQ 90 mQ 500 MHz 0 rad 37 3 mrad mrad 4 0 mrad 600 MHz Z 0 861 mQ 88 mQ 600 MHz 8 rad 87 7 mrad 9 0 mrad 800 MHz Z 0 1 140 mQ 0 12 Q 800 MHz 0 rad 83 7 mrad 9 0 mrad 1 GHz Z 0 2 19 9 0 0 27 9 1 GHz 0 rad 49 6 mrad 6 0 mrad 1 6 GHz Z 0 6 77 Q 0 0 86 0 1 6 GHz 0 rad 79 0 mrad mrad 10 0 mrad 1 8 GHz Z 0 3 31 9 0 0 38 Q 1 8 GHz 0 rad 100 mrad mrad 10 mrad 2 44 Performance Tests Test Head High Temp High Z Standard 10 em Airline with Short Osc Level 250 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz Z mQ 102 m
184. age 800 to 1000 VAC from the A54 Inverter as backlight power and the digital horizontal and the vertical signals from the A51 GSP A53 FDD The analyzer has a built in 3 1 2 inch FDD Flexible Disk Drive on the front panel It uses 2 high density or 2 double density 3 1 2 inch flexible disks The A53 FDD stores and retrieves data to and from the disk 54 Inverter The A54 Inverter is located in the LCD module on the front panel assembly The A54 receives 15 V from A1 CPU and provides a high voltage 800 to 1000 VAC to the backlight of the LCD See Figure 5 1 for more details Theory of Operation 11 11 SOURCE THEORY The three functional subgroups of the source group are the synthesizer the stimulus and the DC bias The synthesizer subgroup generates the 40 MHz reference frequency the 1st local oscillator signal 2 05958 GHz to 3 85858 GHz and the second local oscillator signal 2 08 GHz These signals are used in the stimulus signal subgroup in both the source functional group and in the receiver functional group There are two synthesizer operation modes used in generating the first local oscillator signal the single loop mode and the triple loop mode The single loop mode is used to generate the 1st local oscillator signal when the frequency span setting of the analyzer is wider than 45 MHz At frequency span settings 45 MHz the triple loop mode is used to generate the 1st local oscillator signal with low phase noise
185. agreements are available for Agilent Technologies products For any assistance contact your nearest Agilent Technologies Sales and Service Office Addresses are provided at the back of this manual Documentation Map The following manuals are available for the analyzer m Quick Start Guide Agilent Part Number 04291 90031 The Quick Start Guide walks you through system setup and initial power on shows how to make measurements explains commonly used features and typical application measurement examples m Operation Manual Agilent Part Number 04291 90030 The Operation Manual describes all function accessed from the front panel keys and softkeys It also provides information on option and accessories available and the analyzer features m Programming Manual Agilent Part Number 04291 90027 The Programming Manual provides information on GPIB programming m HP Instrument BASIC Users Handbook Agilent Part Number E2083 90005 The HP Instrument BASIC Users Handbook introduces you to the HP Instrument BASIC programming language provides some helpful hints on getting the most use from it and provides a general programming reference It is divided into three books HP Instrument BASIC Programming Techniques HP Instrument BASIC Interface Techniques and HP Instrument BASIC Language Reference m Service Manual Option OBW only Agilent Part Number 04291 90111 The Service Manual explains how to do performance tests and to
186. and Table 5 2 for the power supplies A2J3 and the limits 5 18 Power Supply Troubleshooting Table 5 2 Power Supplies on A2 Post Regulator Supply Connector Pin Range 22 V 15 V AUX 15 V 8 5 V 5 3 V 5 5 12 V 15 FAN POWER GND J3 Pin 8 J3 Pin 4 J3 Pin 31 J3 Pin 25C J3 Pin 25A 25B J3 Pin 30 29 J3 Pin 28 J3 Pin 5 J3 Pin 27 J3 Pin 8 J3 Pin 3 4 10 J5 Pin 4 19 8 V to 24 2 V 18 5 V to 16 5 V 18 5 V to 16 5 V 1 65 V to 9 35 V 4 77 to 5 83 V 4 5 V to 5 5 V 4 5 V to 5 5 V 10 8 V to 13 2 V 13 5 V to 16 5 V 19 2 V to 28 8 V m If any of the line voltages are out of the limits replace the A2 post regulator m If all line voltages are within the limits the A2 post regulator is verified Power Supply Troubleshooting 5 19 AQTZL XNWASL XNWASL 1907 LNOYA 05 ASL Srecvi zesviaoaezy 3901 YOLVINOIY ONIHOLIAAS AjeuuoN 1371 lt 4 ASL 7041405 NAAOOLAHS YyOLOINGAY ONIHOLIAAS YOLVINOIY 3 5 YIMOd Wolvino3auU 150424 i ilel elce e e e e YALYAANOD 90 90
187. and the calibration data 2 12 Performance Tests 42 43 44 45 46 47 48 When the Normal Temperature Test Head is connected press Recall 400 5 to recall the 400 mV settings When the High Temperature Test Head is connected press Recall 250 STA to recall the 250 mV settings Press Trigger SINGLE to make a measurement Press Copy MORE LIST VALUES to display the test results Subtract the open calibrated values from the analyzer Z display values Then record the test results on the performance test record Press Recall 41 STA to recall the 41 mV test settings and the calibration data Press Trigger SINGLE to make a measurement Press Copy MORE LIST VALUES to display the test results Record the Z display values on the performance test record 50 0 Measurement Test 49 50 51 52 53 54 55 56 57 58 Record the 50 0 termination calibration values on the performance test record Connect the 50 9 termination to the test head 7 connector Then torque the connection to 136 N cm Recall the test settings and the calibration data When the Normal Temperature Test Head is connected press Recall 400 STA to recall the 400 mV settings m When the High Temperature Test Head is connected press Recall 250 5 to recall the 250 mV settings Press Trigger SINGLE to make a measurement Press Copy MORE LIST VALUES to di
188. are stored in the firmware diskette as shown below Before pressing this softkey insert a firmware diskette into the FDD on the front panel Update Disk Revision 4291B Format Disk REVN NN MON DD YEAR where N NN Revision Number MON DD YEAR Implementation Date Month Day Year REBOOT Reboots the analyzer If the new firmware is installed the analyzer boots up using the new firmware After pressing the softkey the analyzer performs the normal power on sequence 10 44 Service Key Menus 11 Theory of Operation This chapter contains the theory of operation for the analyzer It begins with an overall description of the operation of the 4291B RF Impedance Material Analyzer Then the analyzer s functional groups are briefly described Next the operation of each group is described to the extent necessary to support assembly level repair Simplified block diagrams of each group support the group description Detailed component level circuit theory is not provided in this manual Figure 11 10 and Figure 11 11 at the end of the chapter provide additional block diagrams to help you understand the analyzer s operation OVERALL ANALYZER OPERATION The 4291B consists of a mainframe a test station test heads and a calibration kit see Figure 11 1 The mainframe includes a source a receiver a digital control and a power supply DUT Test Fixture Calibration Optional
189. at and within 39 992 mU to 40 008 mU To observe this node perform the steps in the Pus Measurement Procedure At step 2 in the procedure press the following keys to make a fast sweep Preset Sweep NUMBER OF POINTS 1 0 1 7 SAMPLE HOLD This node is located in the sequencer on the A6 receiver IF and measures the 80 kHz sampling signal in the sequencer The typical trace is flat and within 79 984 mU to 80 016 mU To observe this node perform the steps in the Pus Measurement Procedure At step 2 in the procedure press the following keys to make a fast sweep Preset Sweep NUMBER OF POINTS 1 0 1 10 26 Service Key Menus CORRECTION CONSTANTS MENU Figure 10 11 shows the correction constants menu This menu allows you to turn off one or more of the corrections When one or more corrections are turned off the analyzer displays the raw measured data You can check the raw characteristics of the source and receiver circuit For the corrections see the Correction Constants To display the menu press System SERVICE MENU SERVICE MODES and CORRECTION CONSTANTS Each softkey in the correction constants menu is described below Correction Constants Menu SERVICE CORRECTION 950 LVL osc cc system 2 9 0 4 constants NORMAL DC BIAS ON off FRONT OFF RETURN RETURN 06510011 Figure 10 11 Correction Constants Menu
190. ations One is to control the TRD amplifier circuit the other is to send the test head ID data to the mainframe The TRD control receives the control data from the A6 receiver IF as serial data It uses this data to control the TRD amplifier circuits The TRD control receives the test head ID data and converts the data to serial data Then it forwards the data to the A6 receiver IF 11 28 Theory of Operation LEMOIXXX Figure 11 10 Source Group Block Diagram Theory of Operation 11 29 LEMOIXXX Figure 11 11 Receiver and Transducer Groups Block Diagram 11 30 Theory of Operation 12 Replaceable Parts INTRODUCTION This chapter lists the analyzer s replaceable parts How to order the parts is also described ORDERING INFORMATION To order a part listed in the replaceable parts table quote the Agilent Technologies part number with a check digit indicate the quantity required and address the order to the nearest Agilent Technologies office The check digit will ensure accurate and timely processing of the order To order a part not listed in the replaceable parts table include the instrument model number the description and function of the part and the quantity of parts required Address the order to the nearest Agilent Technologies office Direct Mail Order System Within the USA Agilent Technologies can supply parts through a direct mail order system Advantages of using this system are 1 Direct
191. ayed in the brackets of the menu TEST HEAD HICH sets the analyzer for high impedance test head operation LOW sets the analyzer for low impedance test head operation HI TEMP HIGH sets the analyzer for high temperature high impedance test head operation HI TEMP LOW sets the analyzer for high temperature low impedance test head operation Note settings must be turned to auto except when checking the analog circuits Service Key Menus 10 39 CONTROL MENU Figure 10 16 shows the IF control menu hierarchy To display the IF control menu press System SERVICE MENU SERVICE MODES and IF A softkey in the IF control menu displays one of menus used to control one of the A6 receiver IF circuits Each softkey in the IF control menu is described below GAIN XV GAIN XI 0 dB 0 dB IF SERVICE Bi 3 CONTROL MENU IF GAIN RETURN RETURN MODES AUTO man GAIN XV 0 dB GAIN 0 GAIN Y 6 dB GAIN Z 0 dB IF RETURN RETURN RETURN 6510016 Figure 10 16 IF Control Menu 10 40 Service Key Menus GAIN AUTO man DIAG SERV IF GAIN MODE AUTO MAN Toggles the IF gain control mode to automatic mode normal operation or manual mode In the automatic mode the analyzer controls the IF gain XV XI Y and Z settings automatically according to the measurement setting In the manua
192. bed below Service Menu System SERVICE Tests Menu MENU TESTS SERVICE MODES Service Modes Menu READ ID FIRMWARE REVISION RETURN C6 10002 Figure 10 2 Service Menu TESTS Displays the tests menu For more information about the tests menu see the Tests Menu later in this chapter SERVICE MODES DIAG SERV MODE 401113 Activates the service modes and displays the service modes menu For more information about the service modes menu see the Service Modes Menu later in this chapter READ ID Displays which test station and test head are connected Service Key Menus 10 3 FIRMWARE REVISION DIAG FREV Displays the current firmware revision information The number and implementation date appear in the active entry area of the display as shown below Another way to display the firmware information is to cycle the analyzer power off then on 4291B REVN NN MON DD YEAR 55 Revision Number where N NN MON DD YEAR Implementation Date Month Day Year HH MM SS Implementation Time Hour Minute Second 10 4 Service Key Menus TESTS MENU Figure 10 3 shows the tests menu The tests menu is used to select and execute one of the 45 built in diagnostic tests More information about the diagnostic tests is provided in the Diagnostic Tests later in this section To display the tests menu press System SERVICE MENU and TESIS When entering the tests menu internal test 0
193. bly faulty Replace A3AI If the INT REF signal is bad replace 5 2 Press 5 EXECUTE TEST to run internal test 5 A D CONVERTER If the test fails replace 9 6 EXECUTE TEST to run internal test 6 A5 REFERENCE OSC If the test fails replace A5 4 Press 7 x1 EXECUTE TEST to run internal test 7 Ab FRACTIONAL N OSC If the test fails replace A5 9 Press 8 EXECUTE TEST to run internal test 8 5 STEP OSC If the test fails replace A5 6 Press 9 a EXECUTE TEST to run internal test 9 4 1 1st LO OSC If the test fails replace A4 7 Press 1 3 EXECUTE TEST to run internal test 13 A3A1 SOURCE OSC If the test fails replace 1 8 Press 1 0 x1 EXECUTE TEST to run internal test 10 2 2ND LO OSC If the test fails replace A3A2 9 2 1 EXECUTE TEST to run external test 21 OUTPUT ATTENUATOR Then connect the front S and R connectors and press CONTINUE to start the test If the test fails the A7 Output Attenuator is probably faulty Perform the procedure provided in the A7 Output Attenuator Control Signals section to confirm that is faulty If all the tests listed above pass and you still believe that the problem is in the source group verify all the outputs of each assembly in the source group The procedures to do this are provided in the following sections Source Troubleshooting 7 5 CHECK 5 SYNT
194. by using the 4291B self test functions external tests Remember that these tests are done on the assumption that the source group is operating correctly The receiver group consists of the following two assemblies m A4A2 Receiver RF Part of A4 First LO Receiver RF m A6 Receiver IF Note Make sure all of the assemblies listed above are firmly seated before performing i the procedures in this chapter Y Y Allow the analyzer to warm up for at least 30 minutes before you perform any procedure in this chapter Figure 8 1 is a receiver group simplified block diagram For more information about circuit operation see Chapter 11 Receiver Troubleshooting 8 1 4 ILL lazonanoas 1X3 pue H S LNdNI ev ZHW HSNOYHL 1 6 04 ZHIN EN sna 151 IVv V wold pug vev 4 2 88988886 2 9 80 OL ZHD 898802 e907 pug 16201 181 8 2 oso O1 PIE ZHW ZHb 898907 ZHW ZHW Y dd1 lt yi L gt ANOD al 31 191 ANOS ANOO ISl Y3A13938 9V i JH HHAlI3O3H ev vv 6511006 Figure 8 1 Receiver Group Block Diagram 8 2 Receiver Trouhleshooting RECEIVER GROUP TROUBLESHOOTING SUMMARY
195. ce of a FAIL message for tests 1 and 4 through 16 Overall Troubleshooting 4 5 Table 4 1 Troubleshooting Information for Internal Test Failure Test No First Failed Test Troubleshooting Information 1 1 CPU Replace A1 CPU 4 A2 POST REGULATOR Continue with the A2 POST REGULATOR Test Fail section 5 A6 A D CONVERTER The A6 receiver IF is the most probable faulty board Replace the A6 receiver IF 6 Ab REFERENCE OSC The A5 synthesizer is the most probable faulty board Replace the A5 synthesizer 7 A5 FRACTIONAL N The A5 synthesizer is the most probable faulty board Replace the A5 synthesizer 8 A5 STEP OSC The A5 synthesizer is the most probable faulty board Replace the A5 synthesizer 9 4 1 IST LO OSC The 4 1 1st LO OSC is the most probable faulty board Replace the 4 1st LO Receiver 10 A3A2 2ND LO OSC The A3A2 2nd LO OSC is the most probable faulty board Replace the A3A2 2nd LO 11 1 DIVIDER 1 Source Vernier is the most probable faulty board Replace the 1 Source Vernier 12 3RD LO OSC The receiver IF is the most probable faulty board Replace the A6 receiver IF 13 1 SOURCE OSC The 1 Source Vernier is the most probable faulty board Replace the 1 Source Vernier 14 A6 SEQUENCER The A6 receiver IF is the most probable board Replace the A6 receiver IF 15 SOURCE LEVEL Continue with Chapter 7 16 DC BIAS A22 DC Bias 1 2 or A23 DC Bias 2
196. ch cable is connected The assembly related with the cable turning the 5 VD LED off is probably faulty Replace the assembly 5 12 Power Supply Troubleshooting 4 Remove Assemblies Turn the analyzer power off Remove the A4 5 and assemblies Do not remove the A2 post regulator b Turn the analyzer power on Look at the 5 VD LED m If the LED is still off replace the A2 post regulator If the 5 VD LED is still off after replacing the A2 post regulator inspect the A20 motherboard for soldering bridges and shorted traces on the 5 VD power line m If the LED goes on the A2 post regulator and the A20 motherboard are verified Continue with the next step c Reinstall one of the removed assemblies at a time Turn the analyzer power on after each is installed The assembly that turns the Al 5 VD LED on is the most probable faulty assembly Replace the assembly Power Supply Troubleshooting 5 13 TROUBLESHOOT THE FAN AND THE A50 DC DC CONVERTER Perform the following procedure to troubleshoot the fan and the 50 DC DC Converter 1 a Troubleshoot the Fan a Turn the analyzer power off b Remove the fan power cable from the Motherboard A20J18 Disassemble the rear panel using appropriate wires as shown in Figure 5 9 DC Power Supply 4 GND BLUE FAN LOCK YELLOW FAN POWER RED Connect DC power supply a 10 resistance and a oscilloscope to the fan power cable
197. chapter 2 See Chapter 4 3 See Chapter 10 4 See Chapter 2 Post Repair Procedures 14 1 Table 14 1 Post Repair Procedures continued Replaced Assembly or Part Adjustments Correction Constants CC Verification Source OSC Level CC Inspect the Power On Sequence 1 OSC Level Accuracy Test 2 External Test 25 FRONT ISOL N 15 LO Receiver RF None Inspect the Power On Sequence 1 External Test 25 FRONT 18012 3 A5 Synthesizer 40 MHz Reference Oscillator Adjustment 520 MHz Level Adjustment Comb Generator Adjustment Step Pretune CC Inspect the Power On Sequence 1 Internal Test 8 5 STEP OSC Frequency Accuracy Test 2 A6 Receiver IF Source VCXO Adjustment Hold Step Adjustment Band Pass Filter Adjustment Inspect the Power On Sequence 1 Output OSC Level Inspect the Power On Sequence 1 External Test 21 OUTPUT ATTENUATOR OSC Level Accuracy Test 2 AS Output 3 dB ATT OSC Level CC OSC Level Accuracy Test 2 A9 Input 3 dB ATT None External Test 22 RECEIVER GAIN A20 Motherboard None Inspect the Power On Sequence 1 22 1 2 DC Bias Level Inspect the Power On Sequence 1 DC Bias level accuracy test 2 A23 DO Bias 2 2 DC Bias Level CC Inspect the Power On Sequence 1 DC Bias level accuracy test 2 1 A30 Keyboard None Inspect the Power On
198. ck the 2nd Local Oscillator Signal The 2nd local oscillator signal is the 2 08 GHz CW signal a with signal level gt 7 dBm typical Perform the following steps to verify the frequency and level of the 2nd local oscillator signal a Remove the I semi rigid cable from A3A2J19 and remove the D cable from A3A1J3 See Figure 7 19 for the locations of A3A2J19 and A3A1J3 Then connect the equipment as shown in Figure 7 19 BNC m BNC m Cable 122 cm TO EXT REFERENCE Spectrum Analyzer OUTPUT o0 oo SMA m BNC f Adapter cml 1 TO EXT REF Input 4291B Top View o 219 1 N m BNC f Adapter BNC m BNC m Cable 61 50719 Figure 7 19 2nd LO OSC Test Setup b Initialize the spectrum analyzer Then set the controls as follows Controls Settings Center Frequency 2 08 GHz Span 1 MHz Reference Level 20 dBm c On the spectrum analyzer press PEAK SEARCH to move the marker to the peak of th
199. connector on the A32 IBASIC interface It also interfaces between the CPU and the external inputs through the EXT PROG RUN CONT connector A30 Front Panel Keyboard The A30 front panel keyboard assembly detects your inputs key inputs and RPG inputs from the front panel of the analyzer and transmits them to the keyboard controller on A1 A31 Connector The two A31 I O connector consist of the GPIB connector VGA connector and PRINTER connector These connectors are connected to the GPIB controller on A1 through the A20 motherboard A32 I BASIC Interface The three A32 I O connectors are the EXT PROG RUN CONT connector the I O Port connector and the mini DIN Keyboard connector These connectors are connected to the I O control and mini DIN control circuit on 1 through the A20 motherboard 11 10 Theory of Operation 51 5 The A51 GSP graphics system processor provides an interface between the 1 CPU and the A52 LCD The A1 CPU converts the formatted data to GSP commands and writes them to the 51 GSP The A51 GSP processes the data to obtain the necessary signals and sends these signals to the A52 LCD The A51 GSP receives two power supply voltages 5 VD which is used for data processing and converted to 3 3 V and 15 V which is passed on the A54 Inverter The 3 3 V goes to the A52 LCD See Figure 5 1 for more details A52 LCD Liquid Crystal Display The A52 LCD is a 8 4 TFT Color LCD receives a high volt
200. ctional group consists of the A40 preregulator 50 DC DC converter and the A2 post regulator It supplies power to the other assemblies in the analyzer Digital Control The digital control group consists of the A1 CPU the A30 keyboard the A32 Instrument BASIC interface the A51 GSP Graphics System Processor the A52 LCD Liquid Crystal Display and the A53 FDD Flexible Disk Drive These assemblies combine to provide digital control for the analyzer Source The source group consists of the 5 synthesizer the A4A1 1st LO 1st local oscillator the A3AT level vernier the A3A2 2nd LO second local oscillator the A3A3 source the output attenuator the A22 A23 DO bias option 001 only and the A60 high stability frequency reference option 1D5 only The source supplies a phase locked stimulus signal to the device under test through the transducer and supplies the 1st and 2nd local oscillator signals to the receiver The source supplies a DC bias signal to the device under test when the option 001 is installed Receiver The receiver group consists of the A4A2 receiver RF and the A6 receiver IF The receiver measures RF signal inputs and forwards the measured data to the digital control Transducer The transducer group consists of the A41 TRD Amplifier and the test heads The transducer interfaces the source and the receiver to the device under test to measure the device impedance Calibration Kit The calibration kit consis
201. ctor is bad replace the connector 2 Connect OPEN standard to the 7 mm connector Measure the test head impedance by pressing Preset Marker and enter desired frequency m If the measurement value is almost 100 0 at all frequencies I ch contact may be bad m If the measurement value is less than 50 0 at 1 MHz V ch contact may be bad m If the measurement value is unstable and has much noise S ch contact may be bad 4 Connect SHORT standard to the 7 mm connector m If the measurement data around 1 MHz is unstable it is possible that the guard conductor in the triaxial cable is shorting to the ground conductor of the cable in the test head 9 8 Transducer Troubleshooting 10 Service Key Menus INTRODUCTION The service key menus are used to test verify adjust and troubleshoot the analyzer They are also used to install and update the firmware in the analyzer The service key menus consist of several menus that are accessed through the service menu and the Bootloader menu as shown in Figure 10 1 The service menu is displayed by pressing System SERVICE MENU The Bootloader menu is displayed by turning the analyzer power on while pressing Preset Service Menu l System BASIC TESTS Tests Menu PROGRAM MENU MEMORY PARTITION SET CLOCK BEEPER SERVICE MENU MODES Service Modes Menu LIMIT MENU READ ID LOGGING FIRMWARE on OFF REVISION SERVICE MENU RETURN BootLoader Me
202. cy Test Bias Level Test Limit OV 4 10 V 40 V 4V 10 V 40 20 pA mA 10 mA 100 mA 20 pA mA 10 mA 100 mA 4 00 mV 8 00 mV 14 0 mV 44 0 mV 8 00 mV 14 0 mV 44 0 mV 30 0 uA 30 1 uA 35 0 pA 80 0 pA 530 pA 30 1 pA 35 0 pA 80 0 pA 530 pA Test Result _ _ _ _ _ _ _ Measurement Uncertainty 0 02 mV 0 07 mV 0 1 mV 1 1 mV 0 07 mV 0 1 mV 1 1 mV 0 0 pA 0 0 pA 0 1 pA 0 9 pA 18 pA 0 0 pA 0 1 pA 0 9 pA 18 pA Performance Tests 2 55 Adjustments and Correction Constants INTRODUCTION This chapter describes the Adjustments and Correction Constants procedures required to ensure that the 4291B RF Impedance Material Analyzer is within its specifications These adjustments should be performed along with periodic maintenance to keep the analyzer in optimum operating condition The recommended calibration period is 12 months If proper performance cannot be achieved after the Adjustments and Correction Constants procedures are performed see Chapter 4 Note The correction constants are empirically derived data that is stored in memory and then recalled to refine the analyzer s measurement and to define its SAFETY CONSIDERATIONS This manual contains NOTEs CAUTIONs a
203. d 1 GHz 7 0 4 03 0 0 0 52 Q 1 GHz 0 rad 46 8 mrad mrad 6 0 mrad 1 8 GHz Z 0 2 13 0 0 0 22 0 1 3 GHz 8 rad 96 6 mrad 10 0 mrad 1 6 GHz Z 0 2 00 9 0 0 16 0 1 6 GHz 0 rad 184 mrad mrad 15 mrad 1 8 GHz Z 0 3 45 0 0 0 37 Q 1 8 GHz 8 rad 94 2 mrad mrad 10 0 mrad Performance Tests 2 53 Test Head High Temp Low Z Standard 10 em Airline with Short Osc Level 41 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz 7 mQ 51 7 mQ mQ 1 7 mQ 1 MHz 0 rad 456 mrad 15 mrad 10 MHz Z Q 66 5 mQ mQ 4 3 mQ 10 MHz 0 rad 62 0 mrad mrad 4 0 mrad 100 MHz Z 0 220 mQ 27 mQ 100 MHz 0 rad 20 5 mrad 2 5 mrad 200 MHz Z 0 464 mQ 67 mQ 200 MHz 0 rad 20 7 mrad 3 0 mrad 300 MHz Z 0 762 mQ 110 mQ 300 MHz 0 rad 20 9 mrad 3 0 mrad 500 MHz Z 0 2 24 0 0 0 31 0 500 MHz 0 rad 25 6 mrad 3 5 mrad 600 MHz Z Q 6 60 Q Q 0 78 Q 600 MHz 8 rad 42 5 mrad 5 0 mrad 1 GHz Z 0 4 05 0 0 0 52 Q 1 GHz 0 rad 47 0 mrad mrad 6 0 mrad 1 8 GHz Z 0 2 15 Q 0 0 22 0 1 3 GHz 8 rad 97 5 mrad 10 0 mrad 1 6 GHz 7 0 2 02 0 0 0 16 0 1 6 GHz 0 rad 186 mrad mrad 15 mrad 1 8 GHz Z 0 3 47 0 0 0 37 Q 1 8 GHz 8 rad 94 8 mrad 10 0 mrad 2 54 Performance Tests DC Bias Accura
204. d local oscillator on the A3A2 2nd LO does not work properly This message is displayed when an internal test 10 A3A2 ZND LO fails Troubleshoot the source group in accordance with Chapter 7 225 3rd LO OSC TEST FAILED The 3rd LO OSC third local oscillator on the A6 receiver IF does not work properly This message is displayed when an internal test 12 A6 3RD LO OSC fails Troubleshoot the receiver group in accordance with Chapter 8 224 DIVIDER OUTPUT FREQUENCY OUT OF SPEC The output frequency of the divider circuit on the 1 ALC is out of its limits This message is displayed when an internal test 11 1 DIVIDER fails Troubleshoot the source group in accordance with Chapter 7 243 GAIN TEST FAILED An external test 23 GAIN fails Replace the receiver IF See Chapter 8 24 A6 VI NORMALIZER TEST FAILED An external test 24 VI NORMALIZER fails Replace the receiver IF See Chapter 8 Messages 1 200 ALL INT TEST FAILED This message is displayed when an internal test 0 ALL INT fails Troubleshoot the analyzer in accordance with Chapter 4 202 BACKUP SRAM CHECK SUM ERROR The data GPIB Address and so on stored in the A1 CPU s BACKUP SRAM are invalid This message is displayed when an internal test 1 Al CPU fails Replace the Al CPU with a new one See Chapter 6 240 CABLE ISOL N TEST FAILED An external test 27 fails Troubleshoot the transducer group in accordance with
205. d stop settings set the 1st LO OSC to the single loop mode and sweep the frequency from 2 05958 GHz at the start frequency 1 MHz to 3 85858 GHz at the stop frequency 1 8 GHz c Initialize the spectrum analyzer Then set the controls as follows The sweep time must be less than 24 msec Controls Settings Start Frequency 2 GHz Stop Frequency 4 GHz Reference Level 10 dBm Max Hold ON d On the 4291B press SINGLE to make a sweep e Wait for the completion of the sweep and check that the signal level is 5 dBm to 5 dBm over the frequency range of 2 059 GHz to 3 858 GHz The displayed trace should be as shown in Figure 7 14 The measured level is lower than the actual level due to the BNC m BNC m cable s insertion loss at high frequencies If the measured level is lower than the limit measure the cable s loss and compensate the signal level by the cable s loss m If the signal level and the trace are good continue with the next step m If the signal level or the trace is bad the A4A1 1st LO is faulty Replace A4 O dBm 5 dB over the frequency range 2 059 GHz to 3 858 GHz REF 100 ATTEN 20 dB START 2 00 GHz STOP 400 GHz RES BW 3 MHz VBW 3 MHz SWP 50 0 msec 6507014 Figure 7 14 Typical 1st LO OSC Signal Single Mode at A4A1J3 f On the 4291B press Center 9 0 0 Span 4 5 MZ During this procedure the start and stop frequencies are set to 877 5 MHz and 922 5 MHz respecti
206. d the open termination calibration values on the performance test record Connect the open termination to the test head 7 connector Then torque the connection to 136 N cm Recall the test settings and the calibration data When the Normal Temperature Test Head is connected press Recall 400 5 to recall the 400 mV settings m When the High Temperature Test Head is connected press Recall 250 5 to recall the 250 mV settings Press meas DUAL PARAMETER 0 to set the measurement parameter to Y 0 Press Trigger SINGLE to make a measurement Press Copy MORE LIST VALUES to display the test results Subtract the open calibrated values from the analyzer display values Then record the test results on the performance test record Press Recall 41 STA to recall the 41 mV test settings and the calibration data Press meas DUAL PARAMETER 0 to set the measurement parameter to Y 6 Press Trigger SINGLE to make a measurement Press Copy MORE LIST VALUES to display the test results Subtract the open calibrated values from the analyzer Y display values Then record the test results on the performance test record Short Measurement Test 39 40 41 Record the short termination calibration values on the performance test record Connect the short termination to the test head 7 connector Then torque the connection to 136 N cm Recall the test settings
207. d to the A D converter through the A D multiplexer and then converted to a digital value The A D multiplexer multiplexes the hold signal and the DC bus The DC bus is a single multiplexed line that networks 26 nodes within the analyzer When the DC bus is connected to the A D converter the A D converter is used to measure the voltage at a selected node within the analyzer For more information about the DC bus measurement see Chapter 10 The analyzer has a 16 bit A D converter capable of sampling at 100 ks s In this application it samples at the rate of 80 ks s The sequencer consists of four GALs gate array logic ICs that are used as follows m Timing generator for the sample hold the A D converter m Timing generator Gate shaper for the real time gated analysis m Timer driver Input multiplexer driver Frequency increment driver controlling Ab FRAC N OSC Decoder for the control signal from the Al CPU Gains X Y and Z The gains X 0 dB 6 dB 12 dB Y 0 dB 6 dB 12 dB 18 dB and Z 0 dB 2 dB 4 dB 18 dB variable amplifiers These amplifiers are used to optimize the IF gain total gain through the 1st 2nd 3rd IF signal path in order to use the A D converter s widest possible dynamic range The analyzer coarsely measures device impedance to determine the amplifiers gains then measures device impedance with optimum gain setting Theory of Operation 11 23 TRANSDUCER THEORY The transducer group receives t
208. displayed d Press the fr keys to find the first occurrence of a FAIL message for tests 1 and 4 through 16 6 4 Digital Control Trouhleshooting 3 Check the A1 DRAM and Flash Memory The A1 DRAM and flash memory are tested on the sequence to access the bootloader menu For the bootloader menu see the Service Key Menus chapter Perform the following procedure to verify the A1 DRAM and flash memory a Turn the analyzer power off b Push two keys Start and Preset With keeping the two keys pushed down turn the analyzer power on c Wait for the display shown in Figure 6 3 appears on the LCD d Check no error message displayed on the LCD m If no error message is displayed the A1 DRAM and flash memories are verified Continue with the next Check the 1 Volatile Memory m If an error message is displayed or the display shown in Figure 6 3 does not appear the 1 CPU is probably faulty Replace the A1 CPU c Copyright 1992 1997 Hewlett Packard Company Rights Reserved BootLoader REV N NN MMM DD YYYY Current Firmware Revision 4291B REV N NN MMM DD YYYY Select Softkey If the test fails the error message is displayed instead of Select Softkey 506004 Figure 6 3 Bootloader Display Digital Control Troubleshooting 6 5 4 Check the 1 Volatile Memory a Turn the analyzer power on b Press
209. e 204 Local Source Troubleshooting 7 23 d Check that the frequency is 2 08 GHz and the level is higher than 7 dBm The 2nd local oscillator signal should be as shown in Figure 7 20 The measured level is lower than the actual level due to the BNC m BNC m cable s insertion loss at high frequency If the measured level is lower than the limit measure the cable s loss and compensate the signal level by the cable s loss m If the signal is good continue with the next step m If it is bad perform the Second Local PLL Lock Adjustment see Chapter 3 If the problem persists after the adjustment the A3A2 2nd LO OSC is faulty Replace A3A2 2 08 GHz Level gt 47 dBm REF 20 0 dBm ATTEN 30 dB CENTER 2 08000 GHz SPAN 100 MHz RES BW 10 kHz VBW 30 kHz SWP 30 0 msec Figure 7 20 Typical 2nd Local Oscillator Signal e Reconnect the I semi rigid cable to A3A2J19 and reconnect the D cable to A3A1J3 Then continue with 2 Check the 2 05858 GHz Signal 2 Check the 2 05858 GHz Signal The 2 05858 GHz signal level is controlled by the ALC loop See the 2 2nd LO block in Figure 7 1 Perform the following steps to verify the frequency and level of the 2 05858 GHz signal a Remove the E cable from A3A2J23 See Figure 7 21 for the location of A3A2J23 Then connect the equipment as shown in Figure 7 21 7 24 Source Troubleshooting BNC m BNC m
210. e 3 20 A60 Assembly 502023 Figure 8 20 10 MHz Reference Oscillator Frequency Adjustment Location Note The analyzer must be ON continuously for at least 24 hours immediately prior to the oscillator adjustment This warm up time allows both the temperature and frequency of the oscillator to stabilize Failure to allow sufficient stabilization time could result in oscillator misadjustment 3 Allow the analyzer to remain ON continuously for at least 24 hours to ensure that both the temperature and frequency of A60 can stabilize Adjustments and Correction Constants 3 25 4 Connect BNC m BNC m cable between the EXT REF input connector and the REF connector on the analyzer rear panel Then connect the equipment as shown in Figure 3 21 Frequency Standard TO EXT FREQ STD Sample Rate Midrange 00000000 Connector Saver N m BNC f Adapter APC3 5 m APC3 5 f Adapter BNC f SMA f Adapter BNC m BNC m Cable
211. e A3A1 ALC is out of its limits This message is displayed when an internal test 11 A3A1 DIVIDER fails Troubleshoot the source group in accordance with Chapter 7 225 3rd LO OSC TEST FAILED The 3rd LO OSC third local oscillator on the A6 receiver IF does not work properly This message is displayed when an internal test 12 A6 3RD LO OSC fails Troubleshoot the receiver group in accordance with Chapter 8 220 SOURCE OSC TEST FAILED The source oscillator on the A3A1 ALC does not work properly This message is displayed when an internal test 13 1 SOURCE OSC fails Troubleshoot the source group in accordance with Chapter 7 227 SAMPLE FREQUENCY OUT OF SPEC The sampling frequency of the sample hold circuit on the A6 receiver IF is out of its limits This message is displayed when an internal test 15 A6 SEQUENCER fails Troubleshoot the receiver group in accordance with Chapter 8 228 SOURCE LEVEL TEST FAILED The source level output from the A3A3 source is out of limits This message is displayed when an internal test 15 SOURCE LEVEL fails Troubleshoot the source group in accordance with Chapter 7 223 DC BIAS TEST FAILED The DC bias level is out of limits This message is displayed when an internal test 16 DC BIAS fails Troubleshoot the source group in accordance with Chapter 7 2300 FLOPPY DISK DRIVE FAILURE FOUND The A53 built in FDD floppy disk drive does not work properly This message is displayed when
212. e A6 receiver IF This message is displayed when an internal test 5 A6 A D CONVERTER fails Troubleshoot the A6 receiver IF in accordance with Chapter 8 2190 REF OSC TEST FAILED The reference oscillator on the A5 synthesizer does not work properly This message is displayed when an internal test 6 Ab REFERENCE OSC fails Troubleshoot the source group in accordance with Chapter 7 220 FRACTIONAL OSC TEST FAILED The fractional N oscillator on the A5 synthesizer does not work properly This message is displayed when an internal test 7 Ab FRACTIONAL N OSC fails Troubleshoot the source group in accordance with Chapter 7 221 STEP OSC TEST FAILED The step oscillator on the A5 synthesizer does not work properly This message is displayed when an internal test 8 A5 STEP OSC fails Troubleshoot the source group in accordance with Chapter 7 222 Ist LO OSC TEST FAILED The Ist LO OSC first local oscillator on the A4A1 1st LO does not work properly This message is displayed when an internal test 9 A4A1 IST LO OSC fails Troubleshoot the source group in accordance with Chapter 7 Messages 9 2230 2nd LO OSC TEST FAILED The 204 LO OSC second local oscillator on the 2 2nd LO does not work properly This message is displayed when an internal test 10 A3A2 ZND LO fails Troubleshoot the source group in accordance with Chapter 7 224 DIVIDER OUTPUT FREQUENCY OUT OF SPEC The output frequency of the divider circuit on th
213. e has to be connected to J3 of A51 not to LCD Y 5 Replace the top shield plate and replace the top cover Replacement Procedures 13 15 A52 LCD REPLACEMENT m Torx screwdriver T15 m Pozidriv screwdriver pt size 1 small and Z2 medium Removal Procedure See Front Assembly Parts in chapter 12 A53 FDD REPLACEMENT Tools Required m screwdriver T15 m Pozidriv screwdriver pt size 1 small m Hex socket 7 32 inch 5 5 mm Removal Procedure Remove the bottom cover as described in the BOTTOM COVER REMOVAL procedure Remove the flat cable from the cable clamp on A53 holder Disconnect A53 s flat cable from the A1 CPU Remove the four nuts from the A53 holder Remove A53 with holder from the chassis Remove the four screws from the holder to remove it from A53 43 WH Disconnect the flat cable and wire from A53 A60 FREQ REF REPLACEMENT Tools Required m Torx serewdriver T15 m Pozidriv screwdriver pt size 1 small and Z2 medium Removal Procedure 1 Remove the top cover as described in the COVER REMOVAL procedure 2 Remove the top shield plate 9 Remove the screw that fix A60 and lift A60 out 4 Remove the flexible cable from A60 5 Remove the A60 wire from A2 13 16 Replacement Procedures TEST HEAD REPLACEMENT Tools Required m Pozidriv screwdriver pt size 1 small Replacement Procedure 1 Remove
214. e mixer The mixer then produces the shifted frequency of 4 Fstep The mixer output is compared with the FRAC OSC output signal in the phase detector Phase locking imposes the condition of 4 Fstep Therefore the output frequency is locked to Frrac x 4 Fstep x 4 11 16 Theory of Operation Sweeps over the appropriate range determined by the start and stop setting according to the Frac The Fstep is determined by the center frequency of the analyzer as shown in Table 11 1 The Sweeps between start frequency 2 05958 GHz 4 Fstep 4 to stop frequency 2 05958 GHz 4 Fstep 4 Source Vernier The source vernier generates the level controlled 21 42 MHz IF signal an 8 MHz reference signal and a 40 kHz reference signal The 21 42 MHz signal is supplied to the A3A2 2nd LO and converted to a 2 05858 GHz IF signal through the source first converter The 8 MHz and 40 kHz signals are supplied to the A6 receiver IF and used as reference signals The level vernier consists of the following circuits m Divider m Source Oscillator m Level Vernier Divider The divider contains a 1 5 divider and a 1 200 divider The 40 MHz reference frequency from the A5 synthesizer is down converted to 8 MHz and 40 kHz through the two dividers The two signals are then supplied to the A6 receiver IF through the A20 motherboard Source OSC The so
215. ed and A23 should be faulty Replace A23 m If the voltage is bad A22 is faulty Replace A22 7 32 Source Troubleshooting CHECK THE A60 HIGH STABILITY FREQUENCY REFERENCE Perform the following procedures to verify the A60 High Stability Frequency Reference 1 Observe the REF OVEN signal on the rear panel using a spectrum analyzer Check that the frequency is 10 MHz and the level is approximately 0 dBm m If the signal is good continue with the next step m If the signal is bad inspect the cable and connections between A60 and the REF OVEN If the cable and connections are good replace the A60 High Stability Frequency Reference 2 Perform the 10 MHz Reference Oscillator Frequency Adjustment Option 1D5 Only For the procedure see Chapter 3 m If the adjustment is successfully completed the A60 High Stability Frequency Reference is verified m If the adjustment fails check the CAL OUT Signal and the EXT REF operation in accordance with the procedures provided in the Check A5 Synthesizer Outputs section of this chapter If both are good the A60 High Stability Frequency Reference is probably faulty Replace A60 Source Troubleshooting 7 33 Receiver Troubleshooting INTRODUCTION Use these procedures only if you have read Chapter 4 and you believe the problem is in the receiver group This chapter provides procedures to isolate the faulty assembly in the receiver group The procedures isolate the faulty assembly
216. ena 2 1 we 10 34 Control Menu 2 1 a a 10 37 IF Control Menu 10 40 Bootloader Menu 10 43 Analyzer Simplified Block Diagram 11 1 Contents 13 11 2 11 3 11 4 11 5 11 6 11 7 11 8 11 9 11 10 11 11 12 1 12 2 12 8 12 4 12 5 12 6 12 7 12 8 12 9 12 10 12 11 12 12 12 18 12 14 12 15 12 16 12 17 12 18 18 1 18 2 18 8 18 4 18 5 18 6 18 7 18 8 18 9 14 1 14 2 1 1 Power Supply Functional Group Simplified Block Diagram 11 4 A2 Eight Status 11 7 Digital Control Group Simplified Block Diagram 11 9 Source Simplified Block Diagram 11 13 Receiver Simplified Block Diagram 11 21 Transducer Simplified Block Diagram 11 25 High Impedance Measurement Block Diagram 11 26 Low Impedance Measurement Block Diagram 11 27 Source Group Block Diagram 11 29 Receiver and Transducer Groups Block Diagram 11 30 Top View 1 Major Assemblies 12 4 Top View 2 RF Flexible and RF Semi rigid 12 6 Top View Wires and Misc 12 8 Bottom View 1 Major Assemblies 12 10 Bottom View 2 RF Cables and Wires 12 12
217. ent Parameter Value Uncertainty 1 MHz Z 9 69 kQ 0 04 kQ 1 MHz 0 444 mrad 2 mrad 10 MHz Z kQ 1180 0 4 0 10 MHz 0 rad 51 8 mrad 2 0 mrad 100 MHz Z 0 2 81 Q 0 0 43 Q 100 0 rad 13 1 mrad 2 0 mrad 200 MHz Z 0 1 42 0 0 0 25 Q 200 MHz 0 rad 14 0 mrad 2 5 mrad 300 MHz Z 0 922 mQ mQ 182 mQ 300 MHz 0 rad 15 2 mrad 3 0 mrad 500 MHz Z Q 566 mQ mQ 90 mQ 500 MHz 0 rad 25 1 mrad 4 0 mrad 600 Z Q 525 mQ mQ 88 mQ 600 MHz 0 rad 53 6 mrad 9 0 mrad 800 MHz Z 0 682 mQ mQ 122 mQ 800 MHz 0 rad 50 2 mrad 9 0 mrad 1 GHz Z 0 1 37 0 0 0 27 9 1 GHz 0 rad 30 9 mrad 6 0 mrad 1 6 GHz Z 0 3 94 0 0 0 86 0 1 6 GHz 0 rad 45 9 mrad mrad 10 0 mrad 1 8 GHz Z 0 1 88 0 0 0 38 Q 1 8 GHz 0 rad 56 9 mrad 10 0 mrad 2 28 Performance Tests Test Head Norm Temp High Z Standard 10 em Airline with Short Osc Level 400 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz Z mQ 101 mQ 2 mQ 1 MHz 0 893 mrad mrad 15 mrad 10 MHz Z Q 111 mQ mQ 4 mQ 10 MHz 0 rad 104 mrad mrad 4 mrad 100 MHz 7 0 216 mQ mQ 27 mQ 100 MHz 0 20 2 mrad 2 5 mrad 200 MHz Z 0 393 mQ 67 mQ 200 0 rad 17 5 mrad 3 0 mr
218. er shall prepay shipping charges to Agilent Technologies and Agilent Technologies shall pay shipping charges to return the product to Buyer However Buyer shall pay all shipping charges duties and taxes for products returned to Agilent Technologies from another country Agilent Technologies warrants that its software and firmware designated by Agilent Technologies for use with an instrument will execute its programming instruction when property installed on that instrument Agilent Technologies does not warrant that the operation of the instrument or software or firmware will be uninterrupted or error free Limitation Of Warranty The foregoing warranty shall not apply to defects resulting from improper or inadequate maintenance by Buyer Buyer supplied software or interfacing unauthorized modification or misuse operation outside the environmental specifications for the product or improper site preparation or maintenance No other warranty is expressed or implied Agilent Technologies specifically disclaims the implied warranties of merchantability and fitness for a particular purpose vii Exclusive Remedies The remedies provided herein buyer s sole and exclusive remedies Agilent Technologies shall not be liable for any direct indirect special incidental or consequential damages whether based on contract tort or any other legal theory Assistance Product maintenance agreements and other customer assistance
219. erminations ADJUSTMENT TESTS This group of tests is used when adjusting the analyzer These tests make the adjustment procedure easier For more detailed operating information see Chapter 3 34 HOLD STEP ADJ Used when the Hold Step Adjustment the receiver IF is performed 35 BPF ADJ Used when the Band Pass Filter Adjustment on the A6 receiver IF is performed 36 3RD VCXO LEVEL ADJ Used when the Third Local VCXO Adjustment on the receiver IF is performed 37 2ND LO PLL LOCK ADJ Used when the Second Local PLL Lock Adjustment on the A3A2 2nd LO is performed 38 SOURCE MIXER LEAK ADJ Used when the Source Mixer Local Leakage Adjustment on the A3A2 2nd LO is performed 39 SOURCE VCXO LEVEL ADJ Used when the Source VCXO Adjustment on the 1 level vernier is performed DISPLAY TESTS These tests are test patterns that are used in the factory for display adjustments diagnostics and troubleshooting They are not used for field service Test patterns are executed by entering the test number 40 through 44 then pressing EXECUTE TEST CONTINUE The test pattern is displayed and the softkey labels are blanked To exit the test pattern and return to the softkey labels press softkey 8 on the bottom The following is a description of the test patterns Note Do NOT press any keys except softkey 8 on the bottom while the test pattern i is being executed If you do you CANNOT quit the test pattern that is yo
220. erter in the A6 receiver IF through the DC Bus a single multiplexer line with twenty nine channels The other 7 bus nodes are for frequency measurement These nodes are connected to the frequency bus timer in the A1 CPU through the frequency bus a single multiplexer line with 7 channel Each of the DC bus nodes and the frequency bus nodes is described in the DC Bus Nodes and Frequency Nodes in this section Bus Measurement Procedure Use this procedure to perform the bus measurement 1 Press to initialize the analyzer 2 Set the analyzer controls to the settings that you desire to observe in the bus measurement 3 Press System SERVICE MENU SERVICE MODES BUS MEAS to display the bus measurement menu 4 Select the desired bus node as follows m If a DC bus measurement is desired press DC BUS OFF Then enter a node number between 1 and 29 m If a frequency bus measurement is desired press FREQ BUS Then enter a node number between 1 and 7 5 Press BUS MEAS on OFF to activate the bus measurement The menu changes to BUS MEAS ON off The DC or frequency bus measurement value is displayed in the marker value See the Bus Measurement Values section 6 Observe the bus measurement trace and marker value 7 Press to exit the bus measurement To change the bus node to another node repeat the steps above Both the DC bus and the frequency bus can be monitored simultaneously This helps when observing the relationship between t
221. es 12 27 Test Station and Test Head Parts 12 29 High Temperature Test Head Parts 12 30 High Temp Test Heads Parts Fixture Side Option 018 12 31 Contents 15 12 25 12 26 12 27 14 1 2 B 1 High Temp Test Heads Parts Fixture Side Option 014 12 32 High Temp Test Heads Parts Test Station Side Opt 013 and 014 12 33 High Temp Test Heads Parts Fixture 12 34 Post Repair Procedures 14 1 Manual Changes by Serial Number 2 2 2 2 2 4 1 Manual Changes by Firmware Version MM o A 1 Fuse Contents 16 General Information INTRODUCTION The Service Manualis a guide to servicing the 4291B RF Impedance Material Analyzer The manual contains information required to performance test adjust troubleshoot and repair the analyzer ORGANIZATION OF SERVICE MANUAL This manual consists of the chapters and appendices listed below They are divided by tabs This section lists the names of the tabs and the describes content of each chapter and the appendices m Performance Tests Provides the procedures required to performance test the analyzer m Adjustments and Correction Constants Provides procedures for adjusting the analyzer after repair or replacement of an assembly Some of the adjustments update the c
222. ese signals are supplied to A7 through the A20 motherboard Theory of Operation 11 7 DIGITAL CONTROL OPERATION The digital control functional group consists of the following assemblies Al CPU A30 Front Keyboard A31 I O Connector A32 I BASIC Interface Ab1 GSP A52 LCD Liquid Crystal Display A53 FDD Flexible Disk Drive These assemblies provide math processing functions as well as communications between the analyzer and an external controller and or peripherals Figure 11 4 is a simplified block diagram of the digital control functional group 11 8 Theory of Operation Internal VOLATILE MEMORY SRAM BOOT ROM A20 MOTHERBOARD FLASH MEMORY SRAM EEPROM J7 44 fi A41 TRD Amp cx A6 Reciver IF NON VOLATILE MEMORY H t Backup SRAM DUAL PORT SRAM DSP i AID Converter Real Time Clock J2 43 52 Analog Boards i 5 BOARDS 9 j 2 4 5 Keyboard Control A30 FRONT KEYBOARD Audio Interface FDD PRINTER AM HP IB vo Control CONNECTOR PRINTER Con lt gt HP IB i lt DIN KEY DIN KEY i A32 IBASIC amp Run Cont TRIG INTERFACE yo Control
223. est displays a POWER ON TEST FAILED message at the end of the power on sequence The first failed test indicates the most probable faulty assembly Service Key Menus 10 7 Internal Test These tests are completely internal and self evaluating They do not require external connections or user interaction The analyzer has 16 internal tests External Tests These are additional self evaluating tests However these tests require some user interaction such as key entries The analyzer has 17 external tests Adjustment Tests These tests are used to adjust the analyzer See the Adjustments and Correction Constants chapter The analyzer has 7 adjustment tests Display Tests These tests are used to adjust and check for proper operation of the display circuits The analyzer has 5 display tests Test Descriptions This section describes all 45 diagnostic tests INTERNAL TESTS This group of tests run without external connections or operator interaction return a PASS or indication on the display Except as noted all are run during the power on self test and when is pressed 0 ALL INT Runs only when selected It consists of internal tests 1 and 4 through 16 If any of these tests fail this test displays the FAIL status indication Use the RPG knob to scroll through the tests to see which test failed If all pass the test displays the PASS status indication Each test in the subset retains its own test s
224. ests 2 9 START STOP POINTS OSC AVG 1M 10 M 400 mV 100M 200M mV 390 M 500M 400 mV 600 M 800M 400 mV 1G 1 3 G 400 mV 1 6 186 400 06502004 Figure 2 4 Sweep List Measurement Accuracy Test Press EDIT Thenif the normal temperature test head is connected edit the first segment as follows Control Settings Key Strokes Stop Frequency Stop 1 0 10 MHz M Level 400 gsc LEVEL 4 0 0 k m for normal temperature test heads m averaging on AVERAGING ON POINT E oint b If the high temperature test head is connected edit the first segment as follows Control Settings Key Strokes Stop Frequency top 1 0 10 MHz M Level 250 gsc LEVEL 2 5 6 for high temperature test heads m averaging on AVERAGING ON POINT E oint C Press SEGMENT DONE to store the segment d Press ADD to display the second segment Then edit the segment in the same manner 6 Edit all the necessary segments Then press LIST DONE to complete the sweep list 5 Press Sweep SWEEP MENU LIST to activate the list sweep 6 Press Ch2 Format and toggle PHASE UNIT DEG to PHASE UNIT RAD to set the phase unit of channel 2 to rad 7 Press to activate channel 1 2 10 Performance Tests 8 Press to enter the save menu 10 11 12 13 14 15 16 Toggle STOR DEV DISK or STOR DEV MEMORY to select the storage device DIS
225. esult m PASS is displayed the power supply function group are working properly with a 95 confidence level To confirm the last 5 uncertainty of the A2 power supplies measure all A2 power supply voltages See the MEASURE A2 POST REGULATOR OUTPUT VOLTAGE at the end of this chapter m If FAIL is displayed perform the following steps Press RETURN SERVICE MODES BUS MEAS ON DC BUS Then the abbreviated faulty power supply is displayed on the LCD b Continue with TROUBLESHOOT A2 POST REGULATOR in this chapter In particular check the faulty power supply Power Supply Troubleshooting 5 7 FIND OUT WHY THE IS NOT ROTATING If the fan is not rotating the problem may be in the A40 pre regulator the 50 DC DC Converter the A2 post regulator or the fan 1 Check the Line Voltage Selector Switch Setting and Fuse Check the main power line cord line fuse and actual line voltage to see that they are all correct Figure 5 6 shows how to remove the line fuse using a small flat bladed screwdriver to pry off the fuse holder For more information about the line cord see the Power Requirements in Appendix B Fuse nov gt T 63A Sov 260v 50 60 Hz 500A 06505006 Figure 5 6 Removing Line Fuse 2 Check the 50 SHUTDOWN LED When the fan stops the SHUTDOWN LED is off See Figure 5 12 Power Supply Block Diagram 1 The fan genera
226. f this chapter If an assembly is replaced see Chapter 14 It tells what additional tests or adjustments need to be done after replacing any assembly Power Supply Troubleshooting 5 1 od EZY ZZY AS AES XI AG AG ASL AS8 SAD AER ANY A S LA ASL zA 9 AQTL AS pe 9 AS9 1A ASL 6 xnv A ga 4 snd Od AS AS AE Gt LW OW bY ASEE ASL 50 1 2 0 1 Lev NY4 YIMOd QuvOSHU3HLON OZY sal 340 O384 09v DOTNVJ gt A81 ASL AK e ASZ 81 NModinHs YIMOd SYOLVINDAY OWA 008 ASt YOLVIND3Y 91 459 15 J Alddns 92 15 4 ZY ONIHOLIMS 1 ADA 90 90 uolvinedudud lNOWJ 05 05 CES11002 Figure 5 1 Power Supply Lines Simplified Block Diagram 5 2 Power Supply Troubleshooting 5 1 Check Error Messages Turn the analyzer power on If one of error messages listed below appears on the display follow the instruction of the displayed
227. following softkeys OSC OUT ON off DIAG SERV SYNT STEP OUTP OFF ON 0 1 Toggles the STEP OSC output to on or off LOOP open CLOSE DIAG SERV SYNT STEP LOOP OPEN CLOSE Toggles the phase locked loop of the STEP OSC to open or close 10 30 Service Key Menus POLARITY 1 DIAG SERV SYNT STEP POL AUTO 0 Displays the control menu for 1 converter in the STEP OSC The softkeys in this control menu are described below The abbreviation of the current setting AUTO POS or NEG is displayed in the brackets of the menu POLARITY AUTO sets the 1 converter control to automatic mode In this mode the analyzer selects one of the 1 converter automatically according to the measurement setting POS selects the 1 converter NEG selects the 1 converter STEP DAC AUTO man DIAG SERV SYNT STEP DAC MODE AUTO MAN Toggles the STEP DAC mode in the STEP LO to automatic mode or manual mode In the automatic mode the analyzer sets the STEP DAC control value according to the measurement settings In the manual mode the STEP DAC control value is set by using the DAC VALUE softkey DAC VALUE DIAG SERV SYNT STEP DAC VAL lt numeric gt Allows you to enter the STEP DAC control value 0 to 4095 This value is used when the STEP DAC is set to manual mode FREQUENCY OFFSET DIAG SERV SYNT FREQ OFFS lt numeric gt Allows you to enter the frequency offset value Factory use only Note
228. formance test record Change the DC bias current setting to test the analyzer at the following test points The multimeter measurement range must be set to auto mode except for the 0 A and 20 pA tests Table 2 4 DC Bias Current Accuracy Test Settings Bias Voltage Setting 20 pA 1 mA 10 mA 100 mA 20 pA mA 10 mA 100 mA Performance Tests 2 19 PERFORMANCE TEST RECORD Agilent Technologies 4291B RF Impedance Material Analyzer Serial No Mainframe Test Date Test Station Temperature C Norm Temp High Z Head Humidity RH Norm Temp Low Z Head Tested by High Temp High Z Head High Temp Low Z Head Frequency Accuracy Test Without Option 1D5 Frequency Test Limit Test Result Measurement Uncertainty 1 GHz 10 0 kHz kHz 2 3 kHz With Option 1D5 Frequency Test Limit Test Result Measurement Uncertainty 1 GHz 1 00 kHz kHz 0 19 kHz Osc Level Accuracy Test Norm Temp High Impedance Test Head Osc Level Frequency Test Limit Test Result Measurement Uncertainty 19 dBm 1 MHz 3 00 dB dB 0 18 dB 13 dBm 10 MHz 3 03 0 19 dB 100 MHz 3 33dB _ dB 0 20 48 1 dBm 1 8 GHz 8 00 dB 0 19 dB 7 dBm 10 455348 _ dB 0 19dB 2 20 Performance Tests Norm Temp Low Impedance Test Head Option 012 Osc Level Frequency Test Limit Test Result Measurement Uncertainty 19 dBm 1 MHz 3 00 dB
229. gh Temperature Test Head Trouble Isolation Opt 018 and 014 9 7 Service Key Menus INTRODUCTION 10 1 SERVICE MENU 10 3 TESTS 10 3 SERVICE MODES DIAG SERV MODE ON 1 10 3 READ ID 10 3 FIRMWARE REVISION DIAG FREV 0 2 20 0084 10 4 TESTS MENU a 10 5 EXECUTE TEST 5 10 5 INTERNAL TESTS CDIAG TESTO 10 5 EXTERNAL TESTS DIAG TEST 17 0 0 00084 10 6 ADJUSTMENT TESTS DIAG TEST 34 2 10 6 DISPLAY TESTS DIAG TEST40 10 6 Test Status s 10 6 Diagnostic Tests 2 a a a a a 10 7 Test Descriptions 2 10 8 INTERNAL TESTS 10 8 0 ALLINT 2 10 8 1 ALCPU 10 8 2 Al VOLATILE 10 8 3 A51 GSP 2 ww 10 9 4 2 POST REGULATOR 10 9 5 A D CONVERTER 10 9 6 5 REFERENCE OSC 10 9 7 FRACTIONAL N 5 6 10 9 8 5 5 10 9 9 A4A1ISTLOOSC 10 10 10 ABA22NDLO0OSC a 10 10 Contents 5 11 DIVIDER aoaaa 10 10 12 A6 3RD LO OSC aoaaa 10 10
230. hapter 4 199 EEPROM WRITE ERROR Data cannot be stored properly into the EEPROM on the A1 CPU This message is displayed when performing the display background adjustment or updating correction constants in the EEPROM using the adjustment program Troubleshoot the A1 CPU in accordance with Chapter 6 200 ALL INT TEST FAILED This message is displayed when an internal test 0 ALL INT fails Troubleshoot the analyzer in accordance with Chapter 4 201 FLASH MEMORY CHECK SUM ERROR The data Firmware stored in the A1 flash memory are invalid This message is displayed in the bootloader menu Troubleshoot the A1 CPU in accordance with Chapter 6 202 BACKUP SRAM CHECK SUM ERROR The data GPIB Address and so on stored in the Al CPU s BACKUP SRAM are invalid This message is displayed when an internal test 1 Al CPU fails Replace the Al CPU with a new one See Chapter 6 203 CHECK SUM ERROR The data Correction Constants and so on stored in the Al CPU s EEPROM are invalid This message is displayed when an internal test 1 A1 CPU fails Troubleshoot the A1 CPU in accordance with Chapter 6 Messages 7 204 DSP CHIP TEST FAILED The A1 CPU s DSP Digital Signal Processor does not work properly This message is displayed when an internal test 1 Al CPU fails Replace the Al CPU with a new one See Chapter 6 205 F BUS TIMER CHIP TEST FAILED The Al CPU s F BUS Frequency Bus timer does not work properly This me
231. have read Chapter 4 and you believe the problem is in the source group This procedure is designed to let you identify the bad assembly within the source group in the shortest possible time Whenever an assembly is replaced in this procedure refer to Chapter 14 Figure 7 1 shows a simplified block diagram of the source group The source group consists of the following assemblies m A5 Synthesizer m 4 1 Ist LO m A3AI Source Vernier m A3A2 2nd LO m A3A3 Source m A7 Output Attenuator m A22 DC Bias 1 2 m A23 DC Bias 2 2 m A60 High Stability Frequency Reference Option 1D5 Note Make sure all of the assemblies listed above are firmly seated before performing i the procedures in this chapter Allow the analyzer to warm up for at least 30 minutes before you perform any procedure in this chapter Source Troubleshooting 7 1 ZHW H3H LOIN 1 4315 I 1 JOXIW PUZ y 09 OL GPO 1 5 gt lt JOIUIOA T 858502 d 18481 110108194 1 JexiW 181 Jepiaid 5 LI 1 i oso pug Iaounos lt anz ZVEV gay 40 81885 1431S ZHN oz oso 12907 181 l _ quod lt Ld ZHD 8586878 ZHN 629 oL OL ZHO 858502 ZHN 621 puooes 1544 18907 181 21 lt 2 l
232. he 21 42 MHz second IF through the low pass filters The second IF signal is routed to A6 receiver IF 6 Receiver IF The A6 Receiver IF converts the 21 42 MHz 2nd IF from A4A2 to the final 3rd IF The 3rd IF is then converted to a digital value in the A D converter The digital signal is routed to the DSP on the A1 CPU The A6 receiver IF consists of the following circuits see Figure 11 11 Third Local Oscillator Third Converter Sample Hold and A D Converter Gains X Y and Z Third Local Oscillator The third local oscillator is a phase locked oscillator The output signal is phase locked to the 40 kHz frequency of the divider output The oscillator generates the 85 6 MHz signal The signal divided by the 1 4 divider The resulting 21 4 MHz signal is supplied to the third converter The oscillator contains an 85 6 MHz VCXO a phase detector a 1 2 divider a mixer and a 1 70 divider See Figure 11 10 The VCXO frequency Fyexo is divided by 2 and mixed with the 40 MHz reference frequency in the mixer The mixer then produces a shifted frequency Fyexo 2 40 MHz The mixer output is divided by 70 and then compared with the 40 kHz reference signal in the phase detector Phase locking imposes the condition of 40 kHz Fyexo 2 40 MHz 70 Therefore the output frequency is locked to 85 6 MHz 40 kHz x 70 40 MHz x 2 An unlock detector monitors the control voltage to the VCXO When the control voltage is o
233. he A1J10 Continue with the next Remove Assemblies Power Supply Troubleshooting 5 9 5 Remove Assemblies a Turn the analyzer power off b Remove the assemblies 4 5 and Don t remove the A2 post regulator Turn the analyzer power on m If the 50 SHUTDOWN LED is still off the A2 post regulator is probably faulty Replace the A2 post regulator If the SHUTDOWN LED is still off after replacing the A2 post regulator inspect the A20 motherboard for soldering bridges and shorted traces on the FAN POWER and the FAN LOCK signal paths m If the SHUTDOWN LED goes on the A2 post regulator and the A20 motherboard are verified Continue with the next step d Reinstall each assembly one at a time Turn the analyzer power on after each is installed The assembly that causes the 50 SHUTDOWN LED to go on is the most probable faulty assembly Replace the assembly 5 10 Power Supply Troubleshooting FIND OUT WHY THE 5 VD LED IS NOT ON STEADILY If the 5 VD LED is not on steadily the 5 VD line voltage is missing or is not steady enough to power the analyzer The problem may be in the A40 pre regulator A50 DC DC Converter the Al CPU or any of assemblies obtaining power from 5 VD supply 1 Check the A40 Pre regulator a Turn the analyzer power off b Disconnect the cable from A40J1 The A40J1 location is shown in Figure 5 7 Turn the analyzer power on Check the voltage between the pin 1 and
234. he OSC signal to the channel 30 HIGH Z HEAD Checks that the analyzer high impedance test head characteristics are correct As a result the test head is verified The test station S and V connectors are connected and the test station and mainframe are calibrated Then test head characteristics are verified while connecting the 0 S 00 and 500 terminations 31 LOW Z HEAD Checks that the analyzer low impedance test head characteristics are correct As a result the test head is verified The test station S and V connectors are connected and the test station and mainframe are calibrated Then test head characteristics are verified while connecting the 0 S 00 and 500 terminations 32 HIGH TEMP HIGH Z HEAD Checks that the analyzer high temperature high impedance test head characteristics are correct As a result the test head is verified The test station S and V connectors are connected and the test station and mainframe are calibrated Then test head characteristics are verified while connecting the 0 S 00 and 500 terminations 33 HIGH TEMP LOW Z HEAD Checks that the analyzer high temperature low impedance test head characteristics are correct As a result the test head is verified 10 12 Service Key Menus The test station 5 and V connectors are connected and the test station and mainframe calibrated Then test head characteristics are verified while connecting the 0 S 0 Q and 500 t
235. he VCO tuning voltage and the VCO output frequency of the fractional N oscillator See the Bus Measurement Values section 10 18 Service Key Menus Bus Measurement Values The bus measurement value is displayed with a unit U m The DC bus measurement s 1 U is equivalent to 1 V The displayed value in the DC bus measurement does not corresponding to the measured voltage because the voltage detected at the DC bus node is scaled appropriately and measured The scaling factor depends on each DC node For example the scaling factor at the DC bus node 1 of 5 V AUX is approximately 0 405 Therefore the displayed value is nominally 2 025 U 5 U x 0 405 A typical value for each DC bus node measurement is provided in the DC Bus Node Descriptions m The frequency bus measurement s 1 U is equivalent to 1 MHz For example a measured value of 1 kHz is displayed as 1 mU A typical value for each frequency bus measurement is provided in the Frequency Bus Node Descriptions The DC bus measurement values are displayed using real format The frequency bus measurement values are displayed using imaginary format When a DC or Frequency bus node is measured the Re or Im notation appears on the display and indicates the used format When both a DC bus node and a frequency bus node are measured simultaneously the DC bus versus frequency bus measurement values are displayed using a polar chart format This is helpful to observe the relationship between
236. he label changes to BUS MEAS ON off b Check that the marker reading is 2 5 U 0 01 U The frequency bus measures the INT REF frequency 10 MHz through a 1 4 divider Therefore the measured value is 2 5 U 10 MHz divided by 4 The unit U in the frequency bus measurement is equivalent to MHz If the marker reading is good continue with the next step If the marker reading is bad the second 1 2 divider in is probably faulty Replace 5 c Connect the equipment as shown in Figure 7 2 7 8 Source Troubleshooting BNC m BNC m Cable 122 TO EXT TO EXT REF REFERENCE Spectrum Analyzer OUTPUT ooo ooo AO C3 Lac 001710000 N m BNC f TO INT REF Output E Adapter BNC m BNC m Cable 61 cm 507002 Figure 7 2 INT REF Test Setup d Initialize the spectrum analyzer Then set the controls as follows Controls Settings Center Frequency 10 MHz Span 15 MHz Reference Level 10 dBm e On the spectrum analyzer press PEAK SEARCH to move the marker to the peak of the INT REF signal f Check that the frequency is approximately 10 MHz and the level is 2 dBm 4 dB The INT REF signal should be as shown in Figure 7 3
237. he stimulus signal from the source group and applies it to the device under test DUT At the same time the transducer group senses two signals that represent the voltage across the DUT and the current through the DUT multiplexes these signals and applies them to the receiver group Figure 11 7 is the transducer group simplified block diagram The transducer group consists of the following assemblies m Test Heads m 41 Amp The A41 TRD amp is a main part of the test station 11 24 Theory of Operation 31 9v o 0410023 selg Od wold S peeH 1691 jueuieJnseelN Figure 11 7 Transducer Simplified Block Diagram 11 25 Theory of Operation Test Heads There are two types of the test heads One is a high impedance test head and the other is a low impedance test head See Figure 11 7 Having two types of test heads expands the analyzer s high accuracy impedance measurement range When the high impedance test head is used the analyzer operates as shown in Figure 11 8 Vv Voltage Detector Vi Current Detector C6 11008 Figure 11 8 High Impedance Measurement Block Diagram The high impedance test head configuration is used for measuring high impedance devices In high i
238. hen turned OFF The analyzer furnished calibration kit must be used for calibration Do not use the 16190A performance test kit Do not perform the low loss capacitor calibration because the analyzer performance is specified without the low loss capacitor calibration Calibration must be done for each sweep list setting 17 18 19 Press Recall 400 STA or 250 STA when the High Temperature Test Head is being tested to recall the sweep list setup Press Cal CALIBRATE MENU to start the calibration Connect the 0 5 termination of the analyzer calibration kit to the test head connector Then press OPEN to do the open calibration Performance Tests 2 11 20 21 22 23 24 25 26 Disconnect the 0 S and connect the 0 0 termination then press SHORT to do the short calibration Disconnect the 0 Q and connect the 50 Q termination then press LOAD to do the short calibration Press DONE CAL to complete the calibration Press Save RE SAVE FILES 400 5 or 250 5 for the High Temperature Test Head to overwrite the status data with calibration data Press Recall 41 5 to recall the sweep list setup for 41 mV setting Repeat step list item 18 to list item 22 with 41 STA setting Press Save RE SAVE FILES 41 5 to overwrite the status data with calibration data Open Measurement Test 2T 28 29 30 81 32 33 34 35 36 37 38 Recor
239. hutdown due to trouble on the A2 post regulator Continue with Chapter 5 This indicates the A2 power supplies 15 V 8 5 V 5 3 V 5 V 5 V 15 V are shutdown because the heat sink on the A2 post regulator is too hot Cool down the analyzer for about 30 minutes Then turn the analyzer power on If this message is still displayed replace the A2 post regulator This indicates one or more of the PLLs phase lock loops in the oscillators is not working properly Continue with Troubleshooting When Power On Self Test Failed Troubleshooting When Power On Self test Failed Note The analyzer performs the power on self test every time the analyzer is turned i on In the power on self test internal diagnostic tests 1 4 5 6 7 and 9 through 16 are executed sequentially first failed test indicates the most probable faulty assembly For more information about the internal tests see Chapter 10 If the power on self test fails and the POWER ON TEST FAILED message is displayed execute the ALL INT test according to the following procedure to identify the first failed test Then replace the probable faulty assembly see the Table 4 1 Press PRESET 5 5 SERVICE MENU TESTS 0 and x1 to access internal test 0 ALL INT b Press EXECUTE TEST to execute the ALL INT test e Wait until the test result PASS or FAIL is displayed d Press the 1 1 keys to find the first occurren
240. idriv screwdriver pt size 1 small Removal Procedure 1 Remove the top cover as described in the COVER REMOVAL procedure 2 Remove the top shield plate 9 Disconnect the wire designated T in Figure 13 2 4 Disconnect the wire designated 2 in Figure 13 2 if the option 1D6 is installed CES13002 Figure 13 2 A2 Post Regulator Replacement 5 Remove the three screws designated 3 in Figure 13 2 6 Lift the extractors at the top of A2 and lift A2 out Replacement Procedures 13 5 1 Source 2 SECOND LO AND SOURCE REPLACEMENT Tools Required m Torx screwdriver T15 m Pozidriv screwdriver pt size 1 small and Z2 medium m Open end wrench 1 4 inch and 5 16 inch Removal Procedure 1 Remove the top cover as described in the COVER REMOVAL procedure 2 Remove the top shield plate 3 Remove the semi rigid cables and D completely from the analyzer
241. illator Frequency Adjustment Location o 10 MHz Reference Oscillator Frequency Adjustment Setup Overall Troubleshooting MM Front Panel LEDS 2 ee Source Test Setup 2 2 6 a a a a Transducer Test Power Supply Lines Simplified Block Diagram A50 SHUTDOWN LED Al 5 VD LED EN Eight A2 LED Locations Displayed Test Result Removing Line Fuse 1 a A40J1 Output Voltage Al CPU Connector Fan Troubleshooting A50 DC DC Converter Troubleshooting Setup A2 Output Voltage Measurement Power Supply Block Diagram 1 5 13 Power Supply Block 2 Qo bo bo Do DO bo 1 1 do ww Qo 00068 eu GP 1 1 1 co gt e 1 1 1 1 1 1 1 DN 00 1 Contents 12 5 14 6 1 6 2 6 3 7 1 7 2 7 3 1 4 7 5 7 6 T T 7 8 7 9 7 10 7 11 7 12 7 13 7 14 7 15 7 16 7 17 7 1
242. imits This message is displayed when an internal test 4 A2 POST REGULATOR fails Troubleshoot the power supply functional group in accordance with Chapter 5 POWER FAILED ON Power failure occurs on the power lines listed in the message One or some of 65 V 15 V 5 V 5 V 15 V and PostRegHot follow the message Troubleshoot the power supply functional group in accordance with Chapter 5 Messages 4 198 POWER ON TEST FAILED An internal test fails in the power on sequence This message is displayed when the power on selftest fails Troubleshoot the analyzer in accordance with Chapter 4 231 POWER SWEEP LINEARITY OUT OF SPEC This message is displayed when an external test 19 POWER SWEEP LINEARITY fails Troubleshoot the analyzer in accordance with Chapter 4 22 RECEIVER GAIN OUT OF SPEC An external test 25 FRONT ISOL N fails A6 receiver IF gain is incorrect Troubleshoot the receiver group in accordance with Chapter 8 241 RECEIVER GAIN TEST FAILED An external test 22 RECEIVER GAIN fails Troubleshoot the receiver group in accordance with Chapter 8 2190 REF OSC TEST FAILED The reference oscillator on the A5 synthesizer does not work properly This message is displayed when an internal test 6 Ab REFERENCE OSC fails Troubleshoot the source group in accordance with Chapter 7 206 CHIP TEST FAILED The A1 CPU s RTC Real Time Clock does not work properly This message is displayed when an inter
243. ing the OSC Level Correction Constants Theory of Operation 11 17 2 2nd LO The A3A2 2nd LO generates the second local oscillator signal a 2 08 GHz CW signal and converts the 21 42 MHz signal from the 1 level vernier to a 2 05858 GHz IF signal by mixing the 21 42 MHz and the second local oscillator signal The 2 05858 GHz IF signal is supplied to the A3A3 source and then converter to a swept RF signal The second local oscillator signal is supplied to the A4A2 receiver RF The A3A2 2nd LO consists of the following circuits m 2nd LO m Source First Mixer 2nd LO The 2nd Local oscillator circuit is a phase locked oscillator The output signal is phase locked to the 520 MHz frequency from the 5 synthesizer The oscillator generates a 2 08 GHz signal The signal is supplied to the source first mixer and the 4 1 receiver The oscillator contains a 1 04 GHz VCO a phase detector and a 1 2 divider See Figure 11 10 The frequency Fyco is divided by 2 and then compared with the 520 MHz reference signal the phase detector Phase locking imposes the condition of 520 MHz 2 Therefore the output frequency is locked to 1 04 GHz 520 MHz x 2 Then the signal frequency is converted to 2 08 GHz by the doubler The 520 MHz reference signal contains 40 MHz harmonics because it is generated by multiplying the 40 MHz reference signal in the A5 synthesizer The Second Local PLL Adjustment adjust
244. ion Once the analyzer stops the operation all front panel key operations are disabled The only way to reset the analyzer is by turning the analyzer power off 2 Check the Fan is Rotating Look at the fan on the rear panel Check the fan is rotating m If the fan is not rotating continue with FIND OUT WHY THE FAN IS NOT ROTATING in this chapter m If the fan is rotating continue with Check the 50 SHUTDOWN LED 3 Check the A50 SHUTDOWN LED There is a SHUTDOWN LED on the A50 DC DC Converter Perform the following procedure to check it The SHUTDOWN LED is described in the A50 SHUTDOWN LED paragraph a Turn the analyzer power off b Remove the analyzer s top cover and shield plate Turn the analyzer power on Look at the 50 SHUTDOWN LED The LED is normally on Figure 5 2 shows the SHUTDOWN LED location on the A50 DC DC Converter a Power Supply Troubleshooting 5 3 m If the 50 SHUTDOWN LED is off check the cable connection between 4012 and A2J4 If the connection is good continue with FIND OUT WHY THE A50 SHUTDOWN LED IS ON in this chapter m If the SHUTDOWN LED is on continue with Check the A1 5 VD LED in this procedure 4291B Top View Rear A50 DC DC Converter A2 Post Regulator Shutdown 71 LED Normally On
245. ire Opt 001 2 40 22 W3 04396 61707 3 1 Flat Cable Al 51 WA 04396 61673 21 1 Wire 1 W5 04396 61709 5 1 Wire 51 LCD W6 E4970 61651 9 1 Flat Cable 51 LCD W7 04396 61709 5 1 Wire A40 A50 W8 04396 61671 0 1 Al A50 Table 12 6 Top View 3 Misc Parts Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 0515 1719 3 3 Screw for A40 28480 0515 1719 2 1400 2198 2 3 Saddle Edge 28480 1400 2198 3 0515 1550 0 3 Screw for 2 28480 0515 1550 4 0515 2079 O 4 M4 for 2 4 28480 0515 2079 5 1400 1048 9 3 Saddle Edge 28480 1400 1048 6 1400 1934 6 1 Cable 08747 1046 7 See Table 12 3 1 Termination Part of 5 8 0515 1550 0 1 5 for A60 28480 0515 1550 9 1810 0118 1 2 Termination SMA 28480 1810 0118 10 0515 0889 6 8 Screw M3 5 for front frame 28480 0515 0889 Replaceable Parts 12 9 Bottom View Assemblies A20 Under 1 A53 Covered by Case Shield CES12005 Figure 12 4 Bottom View 1 Major Assemblies 12 10 Replaceable Parts Table 12 7 Bottom View 1 Major Assemblies Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 4970 66501 8 1 CPU 28480 4970 66501 0955 0664 7 1 Output 28480 0955 0664
246. is trace perform the steps in the Pus Measurement Procedure At step 2 in the procedure press the following keys Preset Sweep NUMBER of POINTS 5 y Typically _ Typically ithin 0 1 within 2 3 U to 1 2 U within 0 1 U to 1 9 U at 1 8 GHz at 1 MHz 6510008 Figure 10 8 1st LO VTUNE Typical Trace 19 STEP VTUNE Step Oscillator VCO Turning Voltage This node is located in the step oscillator on the A5 synthesizer and detects the 470 MHz to 930 MHz VCO tuning voltage The typical trace for the following keystrokes setting is flat and within 0 U to 2 U The typical values for the three center frequency ranges are provided in Table 10 2 To observe this trace perform the steps in the Bus Measurement Procedure At step 2 in the procedure press the following keys Preset Span 0 1 10 22 Service Key Menus Table 10 2 Typical STEP VTUNE Values Center Frequency Typical STEP VTUNE Value 1 MHz Hz to 400 MHz 0 Uto 20 400 Hz to 1 GHz OU to 3 0 1 GHz Hz to 1 8 GHz 0 5 Uto 4 U 20 FN VTUNE Fractional N Oscillator VCO Turning Voltage This node is located in the fractional N oscillator on the A5 synthesizer and detects the 31 25 MHz to 62 5 MHz VCO tuning voltage The typical trace for the following keystrokes setting is displayed in Figure 10 9 The di
247. l Pozidriv screwdriver pt size 2 medium Open end wrench 1 4 inch Open end wrench 5 16 inch Torque wrench 3 4 inch 136 N cm Hex socket 7 32 inch 5 5 mm Flat edge screwdriver Table 1 1 Recommended Test Equipment Equipment Critical Specifications Recommended Model Qty Usel Agilent Part Number Computer HP 9000 Series 200 300 1 BASIC Operating System Revision 5 0 above 1 Mass Storage 3 5 inch Micro floppy Disk Drive 1 Program 4291B Adjustments Program 3 5 inch PN 04291 18010 1 Performance Test Kit No substitute 16190A 1 Frequency Counter Frequency Range 20 MHz to 1 GHz Time Base 5343A Opt 0013 1 Error lt 1 9 107 7 Frequency Standard Frequency 10 MHz Time Base Error lt 5061B 1 A 1x107 year Spectrum Analyzer Frequency Range 100 kHz to 4 GHz 8566A B 1 A T Power Meter No substitute 436A Opt 022 437B or 1 PA 438A Power Sensor Frequency Range 20 MHz to 1 8 GHz Power 8482 1 PA 5 dBm to 20 dBm Multimeter Voltage Range 40 Vdc to 40 Vdc 8458 1 Voltage Accuracy lt 0 02 Current Range 100 mAdc to 100 mAdc Current Accuracy lt 0 1 Oscilloscope Band width gt 100 MHz 54111D 1 T Oscilloscope Probe Impedance 1 MQ 10431A 1 1 P Performance Tests Adjustments and Correction Constants T Troubleshooting 2 Excluding HP 9826A 3 Option 001 optional time base is required for performance testing an analyzer
248. l Procedure 1 Remove the top cover as described the COVER REMOVAL procedure 2 Remove the top shield plate 9 Disconnect all cables from A5 4 Lift the extractors at the top of A5 and lift A5 out A6 RECEIVER IF REPLACEMENT Tools Required m serewdriver T15 m Pozidriv screwdriver pt size 71 small Removal Procedure 1 Remove the top cover as described in the COVER REMOVAL procedure Remove the top shield plate Disconnect the flexible cable from 6 2 3 4 Lift the extractors at the top of A6 to disconnect the flexible cable from 5 Lift A6 out Replacement Procedures 13 9 OUTPUT ATT AND 8 3 dB ATT REPLACEMENT Tools Required m Torx screwdriver T15 m Pozidriv screwdriver pt size Z1 small and Z2 medium m Open end wrench 5 16 inch Removal Procedure 1 Remove the bottom cover as described in the BOTTOM COVER REMOVAL procedure 2 Remove the flexible cable from A8 CES13006 Figure 13 6 A7 Input ATT and A8 3 dB ATT Replacement Remove A8 from Unsolder the cable designated in Figure 13 6 from the A7 Remove the semi rigid cable D from 0 C Remove the two screws designa
249. l is set by current and the bias limit is set by voltage A22 consists of three DACs that generate bias voltage control and bias current control signals The bias voltage control signal is 1 10 of the bias voltage level or limit setting The bias current control signal is 100 9 V A of the bias current level or limit setting A The bias voltage control signal is output from the voltage DAC and the bias current control signal is output from the current DAC The gain DAC is used to adjust the voltage step magnitude These DAC output levels are set according to the predefined data in the EEPROM on the 1 CPU This data is stored by performing the DC Bias Level Correction Constants procedure A23 is a power amplifier with a feedback loop A23 provides bias voltage and current according to the control signals from A22 In the voltage setting mode A23 generates a bias voltage of bias voltage control signal x 10 In the current setting mode A23 generates a bias current of bias current control signal V x 9 100 A V Theory of Operation 11 19 RECEIVER THEORY The receiver receives the RF signal from the transducer group and converts the signal to digital data The RF signal is converted to the 1st IF intermediate frequency then to 2nd IF and finally to the 3rd The 3rd IF is converted to a digital signal using A D converter Figure 11 6 shows the simplified block diagram of the receiver functional group The receiver gro
250. l mode the IF gains are controlled by the following softkeys GAIN XV GDIAG SERV IF GAIN X XV DBO DB6 DB12 Displays the control menu for the IF GAIN XV IF gain X in voltage measurement The softkeys in this control menu are described below The abbreviation of the current setting 0 dB 6dB or 12 dB is displayed in the brackets of the menu GAIN XV OdB sets the IF GAIN XV to 0 dB 6 dB sets the IF GAIN XV to 6 dB 19 dB sets the IF GAIN XV to 12 dB GAIN XI CDIAG SERV IF GAIN X XI DBO DB6 DB12 Displays the control menu for the IF GAIN XI IF gain X in current measurement The softkeys in this control menu are described below The abbreviation of the current setting 0 dB 6dB or 12 dB is displayed in the brackets of the menu GAIN XI OdB sets the IF GAIN XI to 0 dB 6 dB sets the IF GAIN XI to 6 dB 19 dB sets the IF GAIN XI to 12 dB GAIN Y DIAG SERV IF GAIN Y DBO DB6 DB12 DB18 Displays the control menu for the IF GAIN Y The softkeys in this control menu are described below The abbreviation of the current setting 0 dB 6dB 12 dB or 18 dB is displayed in the brackets of the menu GAIN Y OdB sets the IF GAIN Y to 0 dB 6 dB sets the IF GAIN Y to 6 dB 19 dB sets the IF GAIN Y to 12 dB 18 dB sets the IF GAIN Y to 18 dB GAIN Z DIAG SERV IF GAIN Z DBO DB2 DB4 DB18 Displays the control menu for the IF GAIN Z The softkeys in this control menu are described below The abbreviati
251. lammable gasses or fumes Operation of any electrical instrument in such an environment constitutes a safety hazard Keep Away From Live Circuits Operating personnel must not remove instrument covers Component replacement and internal adjustments must be made by qualified maintenance personnel Do not replace components with the power cable connected Under certain conditions dangerous voltages may exist even with the power cable removed To avoid injuries always disconnect power and discharge circuits before touching them DO NOT Service Or Adjust Alone Do not attempt internal service or adjustment unless another person capable of rendering first aid and resuscitation is present DO NOT Substitute Parts Or Modify Instrument Because of the danger of introducing additional hazards do not substitute parts or perform unauthorized modifications to the instrument Return the instrument to a Agilent Technologies Sales and Service Office for service and repair to ensure the safety features are maintained Dangerous Procedure Warnings Warnings such as the example below precede potentially dangerous procedures throughout this manual Instructions contained in the warnings must be followed Warning Dangerous voltages capable of causing death are present in this instrument Use extreme caution when handling testing and adjusting this instrument Typeface Conventions Bold Italics Computer HARDKEYS SOFTKE
252. lay values at 800 MHz 2 16 Performance Tests DC BIAS LEVEL ACCURACY TEST OPTION 001 Description This test uses a multimeter to measure the actual DC bias voltage and current levels of the analyzer Specification See the Specifications of Operating Manual Set for details DC bias level accuracy Voltage open terminal 22 0 1 4 mV Current short terminal 2 2 4 2 2 2 2 0 5 30 Test Equipment Multimeter 2222 2 2 2 22 2 2 2 2 2 22 222 24 2 2 2 22 2 2 2 2 222 2 2 24 4 9458A APC T N f Adapter 4 4242 42 42 1 4 4 11524A N m BNC f Adapter 4 2 1250 1476 BNC f Banana Adapter 2 2 0 7 4 PN 1251 2277 BNC cable 61 em 4 42 2 2 8120 1889 Fixture Stand only for High Temp Test Heads PN 04291 60121 Test Stage Stand only for High Temp Test Heads PN 04291 65021 Extension Rod only for High Temp Test PN 04291 65022 Procedure Note The DC bias level accuracy test is done for only one test head attached to the
253. le 4 Front 04396 61634 15 1 RF Cable 4 Rear EXT REF J 04896 61625 4 1 RF Cable J A3A2 5 L 04396 61624 3 1 RF Cable L 4 5 04396 61626 5 1 RF Cable 4 6 04396 61633 14 1 RF Cable 5 Rear INT REF V 04896 61686 7 1 RF Cable Opt 1D5 A60 Rear REF OVEN C 04396 61608 8 1 Semi Risgid Cable 4 04291 61616 7 1 RFSemi Rigid Cable D 04396 61605 0 1 j RFSemi Rigid Cable 2 04896 61606 11 1 RF Semi Rigid Cable 4 4 I 04396 61609 14 1 RF Semi Rigid Cable 2 A4 Replaceable Parts 12 7 Figure 12 8 View 3 Wires Misc Parts 12 8 Replaceable Parts Table 12 5 Top View 3 Wires Ref Agilent Part Qty Description Connection Desig Number D W2 04396 61674 3 1 Wire A2 40 04291 61605 41 1 W
254. limits replace the 50 DC DC Converter m If all 50 power supply voltages are good the A50 pre regulator is verified 5 16 Power Supply Troubleshooting TROUBLESHOOT THE A2 POST REGULATOR Use this procedure when the fan is rotating and the 50 SHUTDOWN LED turns on If one or some of the A2 eight LEDs are not on steadily the corresponding A2 power supply voltages 15 V 5 V 5 V 5 3 V 15 VD are missing or are not enough to power the analyzer The problem may be in the A40 pre regulator the 50 DC DC Converter the A2 post regulator and any of assemblies obtaining the A2 post regulator 1 Check the A40 Pre Regulator See FIND OUT WHY THE Al 5VD LED IS NOT ON STEADILY section to verify the A40 Pre Regulator 2 Check the A50 DC DC Converter See TROUBLESHOOT THE FAN AND THE A50 DC DC CONVERTER section to verify the 50 DC DC Converter 3 Remove Assemblies See FIND OUT WHY THE Al 5VD LED IS NOT ON STEADILY section to verify the A4 Ab A6 and A60 4 Measure the A2 Post Regulator Output Voltages Use this procedure to measure all A2 post regulator voltages If all A2 output voltages are within the limits the A2 post regulator is verified with 100 confidence This procedure put out the 2 post regulator from the analyzer and measure the voltages on the A2J3 pins A pulse generator is used to feed the substitute of the FAN LOCK signal to the A2 post regulator This purposes not to shut down the
255. llow Manual Changes supplement or have a different manual part number The Manual Changes supplement contains change information that explains how to adapt the manual to newer instruments In addition to change information the supplement may contain information for correcting errors Errata in the manual To keep this manual as current and accurate as possible Agilent Technologies recommends that you periodically request the latest Manual Changes supplement The supplement for this manual is identified by this manual s printing data and is available from Agilent Technologies If the serial prefix or number of an instrument is lower than that on the title page of this manual see Appendix A Mamual Changes For information concerning serial number prefixes not listed on the title page or in the Manual Changes supplement contact the nearest Agilent Technologies office General Information 1 3 TABLE SERVICE TEST EQUIPMENT The first part of Table 1 1 lists all of the equipment required to performance test adjust and troubleshoot the analyzer The table also notes the use and critical specifications of each item and the recommended models Equipment other than the recommended models may be substituted if the equipment meets or exceeds the critical specifications In addition to the test equipment listed in Table 1 1 the following tools are also required IC extractor Torx screwdriver T15 Pozidriv screwdriver pt size 1 smal
256. m Overall Troubleshooting 4 1 TROUBLESHOOTING SUMMARY The troubleshooting strategy of this manual is based on a verification rather than symptomatic approach Verification procedures and the resulting corrective actions are given in the manual By following these directions you will determine the faulty assembly that must be replaced Figure 4 1 shows the overall troubleshooting flow The following paragraphs provide brief descriptions of the troubleshooting sequence Troubleshooting is started by performing the inspecting the power on sequence Inspecting the power on sequence and verifying faulty groups indicate one or more faulty groups in the analyzer s five functional groups The analyzer can be divided into five functional groups power supply digital control source receiver and transducer faulty assembly is isolated to a faulty functional group according to the troubleshooting procedure for each faulty group The troubleshooting procedures are given in Chapters 5 to 9 A faulty assembly is replaced according to Chapters 12 and 13 Chapter 12 lists the replaceable parts and Chapter 13 gives replacement procedures for the major parts The procedures required after assembly replacement such as adjustments and performance tests are given in Chapter 14 Troubleshooting hints that can be used when the analyzer is used in an GPIB system are given in this chapter When the analyzer is used in an GPIB system the analyze
257. m If the INT REF signal is good continue with 3 Check the FRAC OSC Signal m If the INT REF signal is bad inspect the cable and connections between the INT REF connector and A5J10 See Figure 7 2 for the location of A5J10 If the cable and connections are good replace A5 Source Troubleshooting 7 7 INT REF Output Signal 10 MHz 2 dBm typical 10 02 MHz REF 10 0 dBm ATTEN 20 dB 2 90 dBm CENTER 10 MHz SPAN 15 0 MHz RES BW 100 kHz VBW 300 kHz SWP 20 0 msec 5507006 Figure 7 3 Typical INT REF Signal 2 Check the FRAC N OSC Signal The fractional oscillator FRAC OSC generates the signal for frequencies from 31 25 MHz to 62 5 MHz The signal level must be 4 25 dBm 5 dB over the frequency range Perform the following steps to verify the frequency and level of the FRAC N OSC signal a Press the following keys to measure the FRAC N OSC frequency by using the bus measurement function Preset System SERVICE MENU SERVICE MODES BUS MEAS OFF FREQ BUS OFF 4 BUS MEAS on OFF then the label changes to BUS MEAS off b Wait for the completion of the sweep c Perform the following steps to verify the frequencies of the FRAC N OSC signal i Press Marker 1 to move the marker to the start frequency 1 MHz Then check that the marker reading is 2 0113 U 0 01 U The frequency bus measures the FRAC N OSC
258. m the steps in the Bus Measurement Procedure When this node is selected the trace is typically flat and within 0 1 U to 8 0 U 14 2ND LO VTUNE Second Local Oscillator VCO Tuning Voltage This node is located in the second local oscillator on the A3A2 2nd LO and detects the 1 04 GHz VCO tuning voltage To observe this node perform the steps in the Bus Measurement Procedure When this node is selected the trace is typically flat and within 130 mU to 130 mU 15 DET OUT Detector Output This node is located in the level detector circuit on the 1 Source Vernier and detects the level detector voltage that loops back from A3A3 source 16 SRC LO LEVEL This node is located in the source oscillator circuit on the A3A1 Source Vernier and detects the source VCXO output voltage Service Key Menus 10 21 17 DAC OUT Level DAC Output Voltage This node is located in the level vernier circuit on the Source Vernier and detects the level DAC output voltage 18 15 LO VTUNE First Local Oscillator VCO Turning Voltage This node is located in the 1st local oscillator on the A4A1 1st LO and detects the 2 05858 GHz to 3 85858 GHz VCO tuning voltage The typical trace for the following keystrokes setting is displayed in Figure 10 8 The displayed trace is typically straight The typical marker value is within 2 3 U to 1 2U at a frequency of 1 MHz and within 0 1 U to 1 9 U at a frequency 1 8 GHz To observe th
259. mb generator output level Required Equipment Spectrum Analyzer 4 224 2 2 24 8566A B SMB f BNC f adapter PN 1250 1236 N m BNC f adapter 242 PN 1250 1476 cable 122 em 7 2 2 2 2 2 PN 8120 1840 Procedure 1 Turn the 4291B analyzer OFF 2 Remove the SMB connector termination from The A5 OUT connector and connect the equipment as shown in Figure 3 6 The A5 COMB OUT connector location is shown in Figure 8 7 Spectrum Analyzer BNC f SMB f Adapter To A5 COMB OUT N m BNC f Adapter c 00000000 BNC m BNC m Cable 122 cm 503007 Figure 3 6 Comb Generator Adjustment Setup 3 10 Adjustments and Correction Constants
260. mber 1 1252 5593 2 1 ID CONNECTOR 9PIN 06369 HDE 9P 05 2 04291 24067 4 3 SLEEVE 28480 04291 24067 3 1250 2450 0 3 RF CONNECTOR 02788 4552 1852 00 4 2190 0014 1 6 WASHER 04805 1902 00 00 2580 5 0520 0129 8 6 SCREW 01125 6 0515 0914 8 12 SCR MACH M3x0 5 01125 7 Not assigned 1 BOTTOM COVER 8 04291 04015 0 1 TOP COVER OPT 013 28480 04291 04015 04291 04025 2 1 TOP COVER OPT 014 28480 04291 04025 9 04291 01282 7 1 ANGLE PLATE 28480 04291 01282 10 04291 25062 1 2 INSULATOR 28480 04291 25062 11 3050 0893 9 2 WASHER 06691 12 2190 0586 21 2 WASHER 06691 A2WASPSRO158 13 04291 24068 5 2 28480 04291 24068 1 Refer to Figure 12 18 for ID connector wiring for option 013 and 014 2 Bottom cover has a serial number label so that it cannot be replaced with a new one Replaceahle Parts 12 33 High Impedance Test Head Low Impedance Test Head Option 013 Option 014 Figure 12 18 ID Connector Wiring Table 12 27 High Temp Test Heads Parts Fixture Stand 3 6512009 Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 04291 04081 0 1 COVER TOP 28480 04291 04081 2 0515 0914 8 11 SCR MACH M3x0 5 01125 3 04291 04082 1 1 COVER BOTTOM 28480 04291 04082 4 04291 25081 4 4 FOOT 28480 04291 25081 3050 0893 9 4 WASHER FL MTLC FOR FOOT 06691 0515 1718 2 4 SCR MACHINE FOR
261. mpedance device measurements the current through the device changes according to the device impedance and the voltage across the device is almost constant Therefore the current measurement is the key for high impedance measurement The high impedance test head configuration measures the current through the device because all the current through the device flows through the current detector as shown in Figure 11 8 When a low impedance test head is used the analyzer operates as shown in Figure 11 9 11 26 Theory of Operation 1 Vv Voltage Detector Vi Current Detector 6511009 Figure 11 9 Low Impedance Measurement Block Diagram The low impedance test head configuration is suited for measuring low impedance devices In low impedance device measurements the voltage across the device changes according to the device impedance and the current through the device is almost constant Therefore the voltage measurement is the key for low impedance measurement The low impedance test head configuration is suited for measuring the voltage across the device because the voltage detector is directly connected to the device as shown in Figure 11 9 A41 TRD Amplifier The A41 TRD amplifier receives V and I signals from the test head and transmits the signals to the receiver group The TRD amplifier multiplexes and normalizes the signals so that the signals can be measured accurately with one
262. n 001 5 9 4 Disconnect the Cable from the 10 5 9 5 Remove Assemblies ll les 5 10 FIND OUT WHY THE Al 5 VD LED IS ON STEADILY 5 11 1 Check the A40 Pre regulator 5 11 2 Check the A50 DC DC Converter 5 11 3 Disconnect Cables on the Al CPU 5 12 Contents 3 4 Remove TROUBLESHOOT THE FAN AND THE A50 DC DC CONVERTER 1 Troubleshoot the Fan 2 Troubleshoot the 50 DC DC Converter 2 2 2 TROUBLESHOOT THE A2 POST REGULATOR 2 2 2 2 2 5 2 1 Check the A40 Pre Regulator 2 2 2 2 2 2 2 2 5 52 2 Check the 50 DC DC 3 Remove AMON og Ri A A A Ay A 1 1 1 1 1 19454 6 Digital Control Troubleshooting INTRODUCTION 2 2 2 1 6 1 START HERE 6 3 1 Check the Power On Sequence 6 8 Check the Ch 1 and Ch 2 Operations 6 3 Check the Al Eight LEDS 6 3 2 Check Error 6 4 Identify the First 6 4 3 Check the Al DRAM and Flash Memory 2 2 2 2 6 5 4 Check the Al Volatile 6 6
263. nal test 1 A1 CPU fails Replace the A1 CPU with a new one See Chapter 6 227 SAMPLE FREQUENCY OUT OF SPEC The sampling frequency of the sample hold circuit on the A6 receiver IF is out of its limits This message is displayed when an internal test 15 A6 SEQUENCER fails Troubleshoot the receiver group in accordance with Chapter 8 228 SOURCE LEVEL TEST FAILED The source level output from the A3A3 source is out of limits This message is displayed when an internal test 15 SOURCE LEVEL fails Troubleshoot the source group in accordance with Chapter 7 232 SOURCE FLATNESS TEST FAILED An external test 20 SOURCE FLATNESS fails Troubleshoot the source group in accordance with Chapter 7 220 SOURCE OSC TEST FAILED The source oscillator on the 1 ALC does not work properly This message is displayed when an internal test 13 A3A1 SOURCE OSC fails Troubleshoot the source group in accordance with Chapter 7 Messages 5 221 STEP OSC TEST FAILED The step oscillator on the 5 synthesizer does not work properly This message is displayed when an internal test 8 5 STEP OSC fails Troubleshoot the source group in accordance with Chapter 7 235 TRD ISOL N I TO V TEST FAILED An external test 28 TRD ISOL N I TO V fails Troubleshoot the transducer group in accordance with Chapter 7 238 ISOL N TO I TEST FAILED An external test 29 TRD ISOL N V TOT fails Troubleshoot the transducer group in accorda
264. nce with Chapter 9 234 LOSS TEST FAILED An external test 22 TRD LOSS fails Troubleshoot transducer group in accordance with Chapter 9 248 VCXO TUNING VOLTAGE OUT OF LIMIT VCXO tuning voltage is incorrect in performing an adjustment test 36 3RD VCXO LEVEL ADJ or an adjustment test 39 SOURCE VCXO LEVEL ADJ In the 3RD VCXO LEVEL ADJ replace the receiver IF In the SOURCE VCXO LEVEL ADJ replace the source vernier Messages 6 Error Messages in Numerical Order POWER FAILED ON Power failure occurs on the power lines listed in the message One or some of 465 V 15 V 5 V 5 V 15 V and PostRegHot follow the message Troubleshoot the power supply functional group in accordance with Chapter 5 40 PHASE LOCK LOOP UNLOCKED A phase lock loop PLL circuits within the analyzer does not work properly Troubleshoot the analyzer in accordance with Chapter 6 When a Svc annotation is displayed Service Modes are activated this error message does not appear even if a PLL circuit is not working 19 CORR CONST DATA LOST DEFAULT DATA IS USED This message is displayed when the correction constants EEPROM data is lost and turned on in the service mode Troubleshoot the analyzer in accordance with Chapter 6 198 POWER ON TEST FAILED An internal test fails in the power on sequence This message is displayed when the power on selftest Troubleshoot the analyzer in accordance with C
265. nd WARNINGs that must be followed to ensure the safety of the operator and to keep the instrument in a safe and serviceable condition The adjustments must be performed by qualified service personnel Warning Any interruption of the protective ground conductor inside or outside the analyzer disconnection of the protective ground terminal can make the instrument dangerous Intentional interruption of the protective ground system for any reason is prohibited The removal or opening of covers for adjustment or removal of parts other than those that are accessible by hand will expose circuits containing dangerous voltage levels Remember that the capacitors in the analyzer can remain charged for several minutes even through you have turned the analyzer OFF and unplugged it Warning The adjustments described in this chapter are performed with power applied and the protective covers removed Dangerous voltage levels exist at many points and can result serious personal injury or death if you come into contact with them Adjustments and Correction Constants 3 1 REQUIRED EQUIPMENT Table 1 1 lists the equipment required to perform the Adjustments and the Correction Constants procedures described in this chapter Use only calibrated test equipment when adjusting the analyzer If the recommended test equipment is not available equipment whose specifications are equal to or surpasses those of the recommended test e
266. nframe 5 and connectors are connected and the 5 output level is measured at the R input 20 SOURCE FLATNESS Checks that the source flatness is within limits As a result 1 2 and are verified The analyzer mainframe 5 and connectors are connected and the 5 output level is measured at the input 21 OUTPUT ATTENUATOR Checks that the A7 attenuation accuracy is within limits As a result A7 is verified The analyzer mainframe 5 and connectors are connected and the S output level is measured at the R input 22 RECEIVER GAIN Checks that the receiver circuit gain is within limits As a result A4A2 and are verified The analyzer mainframe 5 and connectors are connected and the input gain is tested using the 5 output 23 A6 GAIN Checks that the A6 gain is within limits As are result A6 is verified The A3A1 21 42 MHz output is directly applied to the A6 input 24 A6 NORMALIZER Checks that the A6 V I normalizer GAIN X Y and Z gain change is within limits As a result is verified The analyzer mainframe 5 and connectors are connected and the input gain change is tested using the S output 25 FRONT ISOL N Checks that the analyzer mainframe front isolation is sufficient The analyzer mainframe 5 and connectors are connected and the 5 o
267. ng sequence in this chapter The transducer group troubleshooting flow is shown in Figure 9 3 P Pass F Fail A41 Replacement Cable Isolation Fail Isolation Troubleshooting TRD A41 Isolation Replacement Test Head Replacement No Trouble Found Figure 9 3 Transducer Group Troubleshooting Flow C6 09002 9 4 Transducer Troubleshooting 5 This section provides the step by step troubleshooting procedure using the 4291 self test functions external tests For detailed information about the self test functions see Chapter 10 Test Equipment Type N Cable 61 em 11500B or part of 11851B TRD Cable 2 2 2 2 2 22 22 2 22 ere 04291 65001 Procedure l Press Preset System SERVICE MENUS TESTS 2 6 x1 to access the TRANSDUCER LOSS test When TRANSDUCER LOSS is displayed press EXECUTE TEST 2 Perform the test according to the displayed instructions Test station connector locations are shown in Figure 9 4 05509003 Figure 9 4 Test Station Connectors Locations m If the test passes continue with the next step m If the test fails replace the A41 TRD amp 3 Press f to access the CABLE ISOL N test When CABLE ISOL N is displayed press EXECUTE TEST 4 Perform the test according to the displayed instructions
268. ngs the 41 TRD Amp IF Control allows you to control the internal circuit settings in the A6 receiver IF Note After pressing SERVICE MODES an annotation Svc is displayed to indicate that the service modes are activated The settings made in the service modes are kept until the analyzer is turned off or PRESET is pressed 10 16 Service Key Menus BUS MEASUREMENT MENU Figure 10 6 shows the bus measurement menu This menu is used to control the bus measurements For more information about the bus measurements see the Pus Measurement For the bus measurement procedure see the Bus Measurement Procedure To display the bus measurement menu press System SERVICE MENU SERVICE MODES and BUS MEAS Each softkey in the bus measurement menu is described below Bus Measurement Menu SER BUS MEAS BUS MEAS system _ OFF on OFF DC BUS OFF FREQ BUS OFF AZ SWITCH on OFF WAIT COUNT RETURN Figure 10 6 Bus Measurement Menu BUS MEAS on OFF DIAG SERV BUS STAT ON OFF Toggles the bus measurement on and off After pressing this softkey the menu changes to BUS MEAS ON off and the measured value of the bus measurement is displayed DC BUS OFF DIAG SERV BUS DC lt numeric gt Allows you to select one of the DC bus nodes The DC bus nodes are numbered from 0 to 29 To select the desired DC bus node press this softkey and then enter the node number
269. nu STSTEM While pressing Preset UPDATE SYSTEM turn the analyzer on BACKUP REBOOT CES10001 Figure 10 1 Service Key Menus The service key menus allow you to perform the following functions m Select and execute a built in diagnostic test The analyzer has 45 built in diagnostic tests For detailed information see the Tests Menu in this chapter m Control and monitor various circuits for troubleshooting For detailed information see the Service Modes Menu this chapter m Display which test station and test head are connected Service Key Menus 10 1 m Display the firmware revision See the Service Menu this chapter m Install and update the firmware in the analyzer For detailed information see the Bootloader Menu in this chapter When applicable the GPIB mnemonic is written in parentheses following the softkey using the following symbol conventions 11 necessary appendage numeric A necessary numerical appendage delimiter for applicable appendages For example OFF ON O 1 means OFF ON 0 or 1 For more about the GPIB commands general information see the 4291 B Programming Manual 10 2 Service Key Menus SERVICE MENU Figure 10 2 shows the service menu This menu is used to display the tests menu the service modes menu and the firmware revision information To display the service menu press System SERVICE MENU Each softkey in the service menu is descri
270. nu Otherwise slide the mouse to the left to exit When you exit menus the program displays another menu Note Press the right hand mouse button to access on screen help information for the selection you have highlighted Help information appears in display window Y Y Press the left hand mouse button to turn off the help screen Adjustments and Correction Constants 3 3 Controller Requirement The following controller system is required to run the adjustments program Controller HP 9000 Series 200 300 computer Excluding HP 9826A computers Must have inverse video capability At least 4 M bytes of RAM Mass Storage At least one 3 5 inch GPIB Flexible Disk Drive HFS formatted hard disk system or SRM system are supported The controller must be equipped with HP BASIC versions between 5 1 and 5 13 and the language extension files listed in Table 3 1 Table 3 1 Required Binaries Name Version Description GRAPH 5 2 Graphics GRAPHX 5 2 Graphics Extensions IO 5 1 110 5 1 Matrix Statements PDEV 5 0 Program Development KBD 5 1 Keyboard Extensions CLOCK 5 0 Clock MS 5 1 Mass Storage ERR 5 1 Error Message DISC 5 0 Small Disc Driver 580 5 0 580 Disc Driver GPIB 5 0 GPIB Interface Driver FGPIB 5 0 GPIB Interface Driver CRTB 5 2 Bit mapped CRT Driver CRTA 5 1 Alpha CRT Driver CRTX 5 1 CRT Extensions EDIT 5 1 List and Edit SRM 5 1 Shared Resource Management DCOMM 5 0 Datacomm Interface Driver
271. o be verified using the numeric keys and the x1 key Table 4 3 lists the test head tests and the test numbers 4 10 Overall Troubleshooting Table 4 3 Test Head Tests List Test Number Test Name 30 HI Z HEAD 31 LO Z HEAD 32 HI TEMP HI Z HEAD 33 HI TEMP LO Z TEST 5 Press EXECUTE TEST and perform the test according to the displayed instructions m If the test fails go to Chapter 9 If the test passes perform the test for the other available test heads in the same manner If all the tests pass the analyzer is probably operating correctly Overall Troubleshooting 4 11 INSPECT THE REAR PANEL FUNCTION If the analyzer is operating unexpectedly after these checks are verified continue with Digital Control Troubleshooting chapter Check the GPIB Interface If the unexpected operations appear when controlling the analyzer with an external controller perform the following checks to verify the problem is not with the controller m Compatibility must be HP 9000 series 200 300 see the manuals of the controller and the BASIC system m GPIB interface hardware must be installed in the controller see the manuals of the controller and the BASIC system I O and GPIB binaries loaded see the manuals of the BASIC system Select code see the manuals of the BASIC system GPIB cables see the manuals of the BASIC system Programming syntax see the manuals of the BASIC system Check the Parallel Interf
272. oftkey CONTINUE and CANCEL softkeys appear on the display Press CONTINUE to continue the firmware installation Press CANCEL to cancel the firmware installation SYSTEM BACKUP Displays the control menu that allows you to make a system backup diskette in which the current firmware is stored The applicable diskette is a 3 5 inch 1 44 MByte flexible disk The softkeys in the control menu are described below FORMAT OPTION toggles format option on and off When the format option is set to on the flexible diskette is initialized before storing the firmware When the format option is set to off the diskette is not initialized The default setting is on The format option setting is displayed as shown below Service Key Menus 10 43 Backup Options Format Disk ON OFF Verify Data ON OFF VERIFY OPTION toggles verify option on and off When the verify option is set to on the system stored in the flexible diskette is verified to be the same as the current firmware in the analyzer after storing the firmware When the verify option is set to off the verification is not performed The default setting is on The verify option setting is displayed as shown above CONTINUE continues making the system backup Before pressing this softkey insert a diskette into the FDD on the front panel CANCEL stops making the system backup and return to the Bootloader menu PREVIEW DISK Displays the revision information of the firmw
273. on of the current setting 0 dB 2dB 4 dB or 18 dB is displayed in the brackets of the menu GAIN Z OdB sets the IF GAIN Y to 0 dB 2 dB sets the IF GAIN Y to 2 dB 4 dB sets the IF GAIN Y to 4 dB 18 dB sets the IF GAIN Y to 18 dB Service Key Menus 10 41 IF BW Displays the IF band pass filter band width of 1 kHz Note settings must be turned to auto except when checking the analog circuits Y 10 42 Service Key Menus BOOTLOADER MENU Figure 10 17 shows the Bootloader menus and the associated menus To display the menu turn the analyzer on while pressing Preset The Bootloader menu is used to install the firmware into the analyzer using a firmware diskette and the built in FDD Also these menus are used to make a system backup diskette Each softkey in the Bootloader menus is described below BootLoader Menu While pressing Start and Preset URBEM turn the analyzer on SYSTEM BACKUP OPTION VERIFY OPTION PREVIEW DISK CONTINUE CONTINUE REBOOT CANCEL CANCEL Figure 10 17 Bootloader Menu SYSTEM UPDATE Allows you to install and update the firmware in the analyzer Before pressing this softkey insert the firmware diskette into the FDD on the front panel Then press this softkey to install the firmware from the diskette to the analyzer The detailed procedure is provided in the Firmware Installation chapter 14 After pressing this s
274. orrection constants stored in the EEPROM on the A1 CPU The correction constants are updated by using the adjustment program PN 04291 65003 Note The next six chapters are the troubleshooting chapters Y Overall Troubleshooting Outlines the analyzer troubleshooting and provides troubleshooting procedures to isolate the faulty functional group Faulty assembly isolation procedures for each functional group are contained in the remaining trouble shooting chapters Power Supply Troubleshooting Digital Control Troubleshooting m Source Troubleshooting Receiver Troubleshooting m Transducer Troubleshooting Note The following chapters are for the most part reference material Y m Service Key Menus Documents the functions of the menus accessed from System SERVICE MENU These menus allow you to test verify adjust control and troubleshoot the analyzer GPIB service mnemonics are included General Information 1 1 m Theory of Operation Explains the overall operation of the analyzer the division into functional groups and the operation of each functional group m Replaceable Parts Provides part numbers and illustrations of the replaceable assemblies and miscellaneous chassis parts together with the ordering information m Replacement Procedures Provides procedures to disassemble portions of the analyzer when certain assemblies have to be replaced m Post Repatrr Procedures Contains the table of related
275. ous assembly for example if external test 20 fails is controlled by the three signals at A7J1 A7J2 and A7J3 that come from the A2 post regulator Perform the following procedure to verify the A7 control signals If the signals are good replace A7 If the signals are bad replace A2 In this procedure the control signal is set using the 4291B self test functions For detailed information about the 4291B self test functions see the Service Key Menus 1 Check A7 Control Signals The Output Attenuator is controlled by the three lines at A7J1 A7J2 and A7J3 as shown in Figure 7 23 Perform the following steps to verify the A7 control signals ATJ3 A7J2 A7J1 GND Dav HP 4291B Bottom View 507024 Figure 7 24 A7 Output Attenuator Control Signals a Press the following keys to set the 4291B OSC level to manual mode Preset Source 0 x1 System Service Menu Service Modes USC OSC AUTO man then the label changes to USC auto MAN On the 4291B press OUTPUT AUTO 0 dB to set to the first test setting of O dB in Table 7 3 c Measure the voltage at A7J1 A7J2 and A7J3 using a voltmeter Then check the measured values are within
276. p procedures for each test are provided The each test procedure consists of the following parts Description Describes the test procedure Specification Describes the performance verified in the test Test Equipment Describes test equipment required in the test Procedure Describes the test procedure step by step GENERAL INFORMATION This section provides general information about the performance tests Warm Up Time Allow the analyzer to warm up for at least 30 minutes before you execute any of the performance tests Ambient Conditions Perform all performance tests in ambient conditions of 23 5 C lt 70 Calibration Cycle The analyzer requires periodic performance verification to remain in calibration The frequency of performance verification depends on the operating and environmental conditions under which the analyzer is used Verify the analyzer s performance at least once a year using the performance tests given in this chapter Performance Test Record The performance test record lists all test points acceptable test limits test result entry columns and measurement uncertainties The measurement uncertainty shows how accurately the analyzer s specifications are measured and depends on the test equipment used The listed measurement uncertainties are valid only when the recommended test equipment is used The performance test record is provided at the end of this chapter Use this record as a master
277. played instructions m If the test passes the receiver group is probably operating correctly m If the test fails go to the FRONT ISOL N Test Failure Troubleshooting procedure FRONT ISOL N Test Failure Troubleshooting In the FRONT ISOL N test the receiver gain is tested first Then the isolation between the front S and R connectors is tested Troubleshoot the analyzer as follows when this test fails m When RECEIVER GAIN OUT OF SPEC appears confirm the connection between S and R connectors and perform the test If the test still fails replace the A4 First LO Receiver RF m When FRONT ISOL N TEST FAILED appears check the connectors and semi rigid cables connected to A3 and A4 Loose connectors and cracked cables can affect the isolation Receiver Troubleshooting 8 5 Transducer Troubleshooting INTRODUCTION This chapter provides procedures to isolate the faulty assembly in the transducer group Use these procedures only if you have read Chapter 4 and you believe the problem is in the transducer group The procedures isolate the faulty assembly by using the 4291B self test functions external tests Remember that these tests are done on the assumption that the source group and receiver group are operating correctly The transducer group consists of the following assemblies m Test Station m High Impedance Test Head except Option 011 m Low Impedance Test Head Option 012 m High Temperature High Impedance Test Head
278. quency Adjustment adjusts the VCXO to lock to the 40 MHz when the external reference signal is not applied FRAC N OSC The FRAC N OSC Fractional N Oscillator generates a swept signal of 31 25 MHz to 62 5 MHz with a high frequency resolution The signal is supplied to the A4A1 1st LO and is used to generate the swept 1st local oscillator signal The FRAC N OSC is a phase locked oscillator The output signal is phase locked to the 10 MHz reference signal of the REF OSC The oscillator contains a 31 25 MHz to 62 5 MHz VCO a phase detector and a fractional N divider divider l integerfraction See Figure 11 10 The 10 MHz reference signal from the REF OSC is applied to the phase detector through the 1 10 divider The reference signal is then compared with the VCO frequency Fyco divided by the fractional divider in the phase detector Phase locking imposes the condition of 10 MHz 10 Therefore the output frequency is locked to 1 MHz x The fractional N divider is a dedicated divider used to generate the high frequency resolution signal It divides the signal frequency by a real value The resolution of the fractional part is 3 55 x 10715 1 275 Therefore the FRAC OSC generates a swept signal with 11 14 Theory of Operation 3 55 nHz 1 MHz x 3 55 x 10715 frequency resolution The fractional N divider is controlled by the Al CPU and the Receiver IF STEP OSC The STEP
279. quipment may be used WARM UP FOR ADJUSTMENTS AND CORRECTION CONSTANTS Warm up the analyzer for at least 30 minute before performing any of the following Adjustments and Correction Constants procedures to ensure proper results and correct instrument operation INSTRUMENT COVER REMOVAL To gain access to the adjustment components you need to remove the top cover and the side covers When removing these covers see Chapter 13 ORDER OF ADJUSTMENTS When performing more than one Adjustments or Correction Constants procedure perform them in the order they appear in this chapter The procedures are presented in the following order 40 MHz Reference Oscillator Frequency Adjustment 520 MHz Level Adjustment Comb Generator Adjustment Step Pretune Correction Constants Second Local PLL Lock Adjustment Source VCXO Adjustment Third Local Adjustment Source Mixer Local Leakage Adjustment OSC Level Correction Constants Hold Step Adjustment Band Pass Filter Adjustment DC Bias Level Correction Constants Option 001 3 2 Adjustments and Correction Constants UPDATING Correction Constants USING THE ADJUSTMENTS PROGRAM This section provides general information on how to update the Correction Constants using the adjustments program Adjustments Program The adjustments program is provided on one double sided diskette The diskette s Agilent part number is 04291 65003 The files contained on the diskette are as follo
280. r additional information on serial number coverage see front page of the Operation Manual Table A 1 Manual Changes by Serial Number Serial Prefix or Number Make Manual Changes JPIKE None Table A 2 Manual Changes by Firmware Version Version Make Manual Changes 1 00 and below None Manual Changes A 1 Serial Number Agilent Technologies uses a two part ten character serial number that is stamped on the serial number plate see Figure A 1 attached to the rear panel The first five digits are the serial prefix and the last five digits are the suffix Agilent Technologies Japan Ltd SERNO JP1KG12345 AK MADE IN JAPAN 33 Figure A 1 Serial Number Plate 2 Manual Changes Power Requirement NReplacing Fuse Fuse Selection Select proper fuse according to the Table B 1 Table B 1 Fuse Selection Fuse Rating Type Fuse Part Number 250 UL CSA type 2110 0030 Time Delay For ordering the fuse contact your nearest Agilent Technologies Sales and Service Office Open the cover of AC line receptacle on check or replace the fuse pull the fuse the rear panel using a small minus holder and remove the fuse To reinstall screwdriver the fuse insert a fuse with the proper rating into the fuse holder Power Requirement 1 Power Requirements The 4291B requires the following power source
281. r s GPIB function needs to be verified as the first step in troubleshooting 4 2 Overall Troubleshooting Chapter 4 Inspect Power ON LED Check Sequence P Chapter 5 Power Supply Troubleshooting Chapter 4 HPIB System Chapter 6 Digital Control Troubleshooting Troubleshooting Chapter 4 Receiver Transducer Chapter Source Troubleshooting Chapter 8 Receiver Troubleshooting Chapter 9 Transducer Troubleshooting No Trouble Found CES 04002 Chapter 12 13 Board Replacement Y Chap Post Repair Procedure Y End Figure 4 1 Overall Troubleshooting Flow Overall Troubleshooting 4 3 INSPECT THE POWER SEQUENCE This section begins the troubleshooting procedures by inspecting the power on sequence Check the Fan Turn the analyzer power on Inspect the fan on the rear panel m The fan should be rotating and audible In case of unexpected results check the AC line power to the analyzer Check the fuse the rating is listed on the rear panel Check the line voltage setting To set the line voltage see the Power Requirements in Appendix B If the problem persists continue with Chapter 5 Check the Front Panel LEDs Turn on the analyzer and watch for the following events in this order
282. r supply is verified with a 95 confidence level Continue with Check Eight A2 LEDs in this procedure If you want to confirm the last 5 uncertainty perform the Measure the A1 5 VD Voltage procedure 505003 4291B Bottom View Rear J10 7 5VD LED Normally On A1 CPU 1 Figure 5 3 A1 5 VD LED Location Measure the A1 5 VD Voltage Measure the reading is w DC voltage at test point AITP8 5 VD using a voltmeter Check the voltmeter ithin 4 59 V to 5 61 V m If the voltmeter reading is out of limits continue with FIND OUT WHY THE Al LED IS NOT ON STEADILY m If the voltmeter reading is within limits continue with the next step 5 Check the Eight A2 LEDs a Remove the analyzer s top cover and shield b Turn the analyzer power on c Look at all eight A2 LEDs The A2 LED locations are shown in Figure 5 4 Check the LEDs are correctly on m If two or more LEDs are off continue with TROUBLESHOOT A2 POST REGULATOR in this chapter Power Supply Troubleshooting 5 5 m If the LEDs are correctly on continue with Run the Internal Test 4 POST REGULATOR 4291B Top View Rear H 8 5 V LED Normally On 15
283. rad mrad 5 0 mrad 800 MHz Z 0 2 10 0 0 0 25 Q 800 MHz 0 mrad 42 0 mrad mrad 5 0 mrad 1 GHz Z 0 2 40 9 0 0 25 8 1 GHz 0 mrad 48 0 mrad mrad 5 0 mrad 1 8 GHz Z 0 3 60 0 0 0 25 Q 1 8 GHz 0 mrad 72 0 mrad mrad 5 0 mrad 1 6 GHz Z 0 4 05 0 0 0 25 8 1 6 GHz 0 mrad 81 0 mrad mrad 5 0 mrad 1 8 GHz Z 0 4 35 0 0 0 25 8 1 8 GHz 0 mrad 87 0 mrad 5 0 mrad 2 42 Performance Tests Test Head High Temp High Z Standard 10 em Airline with Open Osc Level 250 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz Z kQ 4 98 0 04 kQ 1 MHz 0 rad 228 mrad mrad 2 mrad 10 7 kQ 70 50 0 4 4 0 10 MHz 0 rad 32 2 mrad mrad 2 0 mrad 100 MHz 7 0 2 86 0 0 0 43 Q 100 MHz 0 rad 13 4 mrad 2 0 mrad 200 MHz Z 0 1 62 Q Q 0 25 Q 200 MHz 0 rad 16 0 mrad 2 5 mrad 300 MHz Z 0 1 15 Q 0 18 Q 300 MHz 0 rad 18 8 mrad _ mrad 3 0 mrad 500 MHz Z 0 836 mQ 90 mQ 500 MHz 0 rad 87 1mrad 4 0 mrad 600 MHz 7 0 860 mQ 88 0 600 MHz 0 rad 87 6 mrad 9 0 mrad 800 MHz Z 0 1 14 0 mQ 0 12 9 800 MHz 0 rad 83 5 mrad 9 0 mrad 1 GHz Z 0 2 17 0 0 0 27 9 1 GHz 0 rad 49 2 mrad mrad 6 0 mrad 1 6 GHz Z 0 6 70 Q 0 0 86 0 1 6 GHz 0 rad 78 1 mrad 10 0 mrad 1 8 GHz Z 0 3 30 0 0 0 38 Q 1 8 GHz 0 rad 99 7 mr
284. receiver The A41 TRD amplifier consists of the following circuits m Gv Gi ATT and Level Normalizer m V I Multiplexer m Control Gv Gi ATT and Level Normalizer The Gv ATT x1 x1 8 Gi ATT x1 x1 8 and Level Normalizer x2 x2 3 consists of attenuators an amplifier and semiconductor switches Gv Gi ATT settings are determined from the oscillator level and device impedance The level normalizer setting is determined from the oscillator level The analyzer coarsely measures device impedance to determine Gv Gi ATT settings then measures the device impedance with an optimum gain setting Table 11 3 shows the gain settings Theory of Operation 11 27 Table 11 3 Amplifier Gain Settings Normal Hi Z Lo Z Level Oscillator Level Gv Gi Gv Gi Gv Gi Normalizer 0 35 Vrms lt OSC lt 1 0 Vrms 1 8 1 8 1 8 1 1 1 8 2 3 0 12 Vrms OSC lt 0 35 Vrms 1 8 1 8 1 8 1 1 1 8 2 40 mVrms lt OSC lt 0 12 Vrms 1 1 2 8 0 2 mVrms lt OSC lt 40 mVrms 1 1 NA NA 2 1 Hi Z range appears when the impedance is higher than approx 250 9 and the frequency lt 200 MHz 2 10 7 range appears when the impedance is lower than approx 10 9 and the frequency lt 200 MHz V I Multiplexer The V I multiplexer multiplexes the V and I signals from the test head The multiplexer is a semiconductor switch Control The TRD control has two oper
285. riggers the Al CPU The Al CPU checks the shutdown status on the A2 post regulator and displays a warning message Then the analyzer stops its operation Once the analyzer stops the operation the front panel keys are disabled The only way to reset the analyzer is to turn the analyzer power off then on Eight Status LEDs The eight status LEDs on the A2 post regulator are on during normal operation They indicate that the correct voltage is present in each supply See Figure 11 3 If one or more of them is off or flashing there is a problem in the corresponding power supply 11 6 Theory of Operation 4291B View Rear H 8 5 V LED Normally On 15 V LED Normally A50 DC DC Converter T 5 V LED Normally On 5 V AUX LED Normally On L Normally Off 5 3 V LED Normally On tT 15 V LED Normally On A2 Post Regulator i 5 V LED Normally On 505004 Figure 11 3 A2 Eight Status LED A Output Attenuator Drive Circuit The A2 post regulator has the drive circuit for the A7 output attenuator The circuit decodes the control signal from the A1 CPU and generates the following TTL signals m 7 output attenuator drive signals 10 ON OFF 20 ON OFF 30 dB ON OFF Th
286. ructions m If the test fails replace receiver IF Press to access the FRONT ISOL N test When FRONT ISOL N is displayed press EXECUTE TEST Perform the test according to the displayed instructions m If the test fails go to Chapter 8 If the test passes continue with the Transducer Test procedure Overall Troubleshooting 4 9 Transducer Test Verify the transducer operation by performing following procedures Test Equipment Calibration Kit 4291B furnished accessory Procedure Note The 4291B has the following four test heads including the optional test heads Perform this test for all the available test heads Y Y High impedance test head Standard Low impedance test head Option 012 High temperature high impedance test head Option 013 High temperature low impedance test head Option 014 1 Connect the test station to the mainframe Then connect the test head to the test station as shown in Figure 4 4 4291B Mainframe Test Station Test Head 00000000 04004 Figure 4 4 Transducer Test Setup 2 Turn the analyzer power on 3 Press SYSTEM SERVICE MENU TESTS to enter test display 4 Select the test according to the test head t
287. s Code List Mfr Name Location Zipcode 00779 AMP INC HARRISBURG PA US 17111 01125 LEWIS SCREW CO CHICAGO IL US 60609 02788 INC BURLINGTON US 01803 04726 3M CO ST PAUL MN 05 55144 04805 ILLINOIS TOOL WORKS INC SHAKEPROOF ELGIN IL US 60126 06369 HIROSE ELECTRIC CO JP 06691 HOUSE OF METRICS LTD SPRING VALLEY NY US 10977 08747 KITAGAWA KOGYO TOKYO JP 10572 XICOR INC MILPITAS CA 12085 SCHLEGEL CORP ROCHESTER NY US 14692 13160 TEAC OF AMERICA INC MONTEBELLO CA US 90640 28480 AGILENT TECHNOLOGIES CO CORPORATE HQ PALO ALTO CA US 94304 28520 HEYCO MOLDED PRODUCTS KENTWORTH NJ US 07033 12 2 Replaceable Parts Table 12 2 List of Abbreviations A amperes normally closed automatic frequency control NE neon AMPL amplifier NIPL nickel plate beat frequency oscillator N O normally open BECU beryllium copper NPO negative positive zero zero temperature coefficient BH binder head NPN negative positive negative BP bandpass NRFR not recommended for field replacement BRS brass NSR not separately replaceable BWO backward wave oscillator order by description COW counter clockwise OH oval head CER ceramic oxide CMO cabinet mount only P peak COEF coefficient PC printed circuit COM common p pico COMP composition PH BRZ phosphor bronze COMPL complete PHL Philips CONN connector PIV
288. s a 2 05958 GHz to 3 85858 GHz VCO a phase detector a 1 4 divider a mixer a 1 16 divider and a single triple switch See Figure 11 10 The single triple switch is for the single triple mode and switches the VCO signal to one of the mixers and the 1 16 divider An unlock detector monitors the control voltage to the VCO When the control voltage is out of the limits the detector sends the status to the Al CPU The Al CPU causes the message CAUTION PHASE LOCK LOOP UNLOCKED to be displayed Single Loop Operation at Frequency Spans 45 MHz In the single loop mode the VCO signal loops back to the phase detector through the 1 4 divider and the 1 16 divider The VCO frequency is divided by 64 and then compared with the OSC signal frequency Frac 31 25 MHz to 62 5 MHz in the phase detector Phase locking imposes the condition Of Frac 64 Therefore the output frequency is locked to Ffrae x 64 The sweeps from 2 GHz 31 25 MHz x 64 to 4 GHz 62 5 MHz x 64 according to the FRAC OSC swept signal The frequency range actually used in the analyzer is 2 05958 GHz at a measurement frequency 1 MHz to 3 85858 GHz at a measurement frequency 1 8 GHz Triple Loop Operation at Frequency Spans lt 45 MHz In the triple loop mode the signal loops back to the phase detector through the 1 4 divider and the mixer The VCO frequency Fyco is mixed with the STEP OSC output in th
289. s mode POS NEG DAC the analyzer set the current offset automatically according to the measurement setting sets the DC bias current offset to positive sets the DC bias current offset to negative Displays the control menus that allow you to control the DC bias level DACs in the A22 DC bias 1 2 The softkeys in the control menu are described below VDAC AUTO man DIAG SERV DCB VDAC MODE AUTO MAN Toggles the VDAC mode in A22 to automatic mode or manual mode In the automatic mode the analyzer sets the VDAC control value according to the measurement settings In the manual mode the VDAC control value is set by using the VDAC VALUE softkey VDAC VALUE DIAG SERV DCB VDAC VAL lt numeric gt Allows you to enter the VDAC control value 0 to 65535 This value is used when the VDAC is set to manual mode IDAC AUTO man DIAG SERV DCB IDAC MODE AUTO Toggles the IDAC mode in A22 to automatic mode or manual mode In the automatic mode the analyzer sets the IDAC control value according to the measurement settings In the manual mode the IDAC control value is set by using the VALUE softkey Service Key Menus 10 35 IDAC VALUE DIAG SERV DCB IDAC VAL lt numeric gt Allows you to enter the IDAC control value 0 to 65535 This value is used when the IDAC is set to manual mode GDAC AUTO man DIAG SERV DCB GDAC MODE AUTO MAN Toggles the GAINDAC mode in A22 to automatic mode or man
290. s the 2nd LO to lock to the 520 MHz harmonic rather than the neighboring harmonics 480 MHz 560 MHz An unlock detector monitors the control voltage to the VCO When the control voltage is out of the limits the detector sends the status to the Al CPU The Al CPU causes the message CAUTION PHASE LOCK LOOP UNLOCKED to be displayed Source First Mixer The 21 42 MHz CW signal from the A3AI level vernier is mixed with the 2 08 GHz second local oscillator signal through the first source mixer Then the signal is converted to a 2 05858 GHz CW signal through the band pass filter The 2 05858 GHz signal is supplied to the ASAS source A3A3 Source The A3A3 source generates a stable and accurate RF signal This signal is CW or swept signal between 1 MHz to 1 8 GHz with a power level from 10 dBm to 20 dBm The RF signal is supplied to the A7 output attenuator The A3A3 source consists of the following circuits see Figure 11 10 m Source Second Mixer m Source Amplifier m Level Detector The 2 05858 GHz IF signal from the A3A2 2nd LO is applied to the source second mixer It is then converted to the CW or swept RF signal 1 MHz to 1 8 GHz by mixing with the CW or swept 1st local oscillator signal 2 05958 GHz to 3 85858 GHz from the 4 1 1st LO The RF signal is amplified with a constant gain through the source amplifier It is then supplied to the output attenuator through the level detector The level detector loops
291. service procedures This is a table of adjustments and verification procedures that must be performed after repair or replacement of each assembly m Appendices Contains the manual changes information required to make this manual compatible with earlier shipment configurations of the analyzer and the power requirements m Messages Contains the service related error message list 1 2 General Information ANALYZERS COVERED BY MANUAL Agilent Technologies uses a two part ten character serial number that is stamped on the serial number plate see Figure 1 1 attached to the rear panel The first five digits are the serial prefix and the last five digits are the suffix The same prefix is used for all identical instruments The prefix changes only when a change is made to the instrument However the suffix is assigned sequentially and is unique to each instrument The contents of this manual apply to instruments with the serial number prefixes listed under SERIAL NUMBERS on the title page Agilent Technologies Japan Ltd SERNO JP1KG12345 AK MADE IN JAPAN 33 Figure 1 1 Serial Number Plate An instrument manufactured after the printing date of this manual may have a serial number prefix that is not listed on the title page This unlisted serial number prefix indicates that the instrument is different from those described in this manual The manual for an unlisted instrument may be accompanied by a ye
292. splay the test results Subtract the 50 9 calibrated values from the analyzer Z 0 display values Then record the test results on the performance test record Press Recall 41 STA to recall the 41 mV test settings and the calibration data Press Trigger SINGLE to make a measurement Press Copy MORE LIST VALUES to display the test results Subtract the 50 9 calibrated values from the analyzer Z 0 display values Then record the test results on the performance test record 10 cm Airline with Open Test 59 Record the 10 cm airline with open termination calibration values on the performance test record Performance Tests 2 13 60 Connect the 10 cm airline and open termination to the test head Apc 7 connector using the following procedure see Figure 2 5 a Fully retract the threads on the test head 9 connector Then insert the marked side tip of the airline center conductor into the connector center conductor b Gently cover the airline center conductor with the airline outer conductor with the Agilent logo side down To prevent damage do not let the center conductor scrape the edge of the outer conductor Mate the outer conductors Then torque the connection to 136 N cm A 1 2 inch open end wrench may be necessary to hold the airline stationary c Gently inserts the airline center conductor into the open termination center conductor Mate the outer conductors Then torque the connection to 13
293. splayed trace is typically flat and higher than 2 U To observe this trace perform the steps in the Bus Measurement Procedure At step 2 in the procedure press the following keys Preset NUMBER of POINTS 5 x1 Typically within 0 1 U to 1 9 U at 1 8 GHz Typically within 2 3 U to 1 2 9 at 1MHz 6510008 Figure 10 9 FN VTUNE Typical Trace 21 FN INTEG OUT Fractional N Oscillator Integrator Output Voltage This node is located in the fractional N oscillator on the A5 synthesizer and detects the integrator output voltage The typical trace for the following keystrokes setting is displayed in Figure 10 10 The displayed trace is typically straight To observe this trace perform the steps in the Bus Measurement Procedure At step 2 in the procedure press the following keys Preset Sweep NUMBER of POINTS 5 Service Key Menus 10 23 START 1MHz 6510010 Figure 10 10 FN INTEG OUT Typical Trace 22 REF VTUNE Reference Oscillator VCO Tuning Voltage This node is located in the reference oscillator on the A5 synthesizer and detects the 40 MHz VCXO tuning voltage To observe this node perform the steps in the Pus Measurement Procedure When this node is selected the trace is typically flat and within 0 U to 43 0 U 23 3RD LO VTUNE Third Local
294. splayed when an internal test 1 A1 CPU fails Replace the 1 CPU with a new one See Chapter 6 201 FLASH MEMORY CHECK SUM ERROR The data Firmware stored in the A1 flash memory are invalid This message is displayed in the bootloader menu Troubleshoot the A1 CPU in accordance with Chapter 6 2300 FLOPPY DISK DRIVE FAILURE FOUND The A53 built in FDD floppy disk drive does not work properly This message is displayed when an external test 18 DSK DR FAULT ISOL N fails Replace the A53 FDD with a new one See Chapter 6 220 FRACTIONAL OSC TEST FAILED The fractional N oscillator on the A5 synthesizer does not work properly This message is displayed when an internal test 7 Ab FRACTIONAL N OSC fails Troubleshoot the source group in accordance with Chapter 7 239 FRONT ISOL N TEST FAILED An external test 25 FRONT ISOL N fails Troubleshoot the receiver group in accordance with Chapter 8 Messages 3 216 GND LEVEL OUT OF SPEC The voltage of the GND Ground at the DC bus node 26 is out of its limits This message is displayed when an internal test 4 A2 POST REGULATOR fails Troubleshoot the power supply functional group in accordance with Chapter 5 237 HI Z HEAD TEST FAILED An external test 30 HIGH 7 HEAD fails Replace the high impedance test head See Chapter 9 210 HP HIL CHIP TEST FAILED The A1 CPU s HP HIL control chip does not work properly This message is displayed when an internal test 1
295. ssage is displayed when an internal test 1 Al CPU fails Replace the Al CPU with a new one See Chapter 6 206 RTC CHIP TEST FAILED The A1 CPU s RTC Real Time Clock does not work properly This message is displayed when an internal test 1 1 CPU fails Replace the 1 CPU with a new one See Chapter 6 207 KEY CHIP TEST FAILED The A1 CPU s front keyboard control chip does not work properly This message is displayed when an internal test 1 Al CPU fails Replace the Al CPU with a new one See Chapter 6 208 FDC CHIP TEST FAILED The A1 CPU s FDC Flexible Disk drive control ship does not work properly This message is displayed when an internal test 1 A1 CPU fails Replace the CPU with a new one See Chapter 6 209 GPIB CHIP TEST FAILED The A1 CPU s GPIB chip does not work properly This message is displayed when an internal test 1 Al CPU fails Replace the Al CPU with a new one See Chapter 6 210 HP HIL CHIP TEST FAILED The Al CPU s HP HIL control chip does not work properly This message is displayed when an internal test 1 Al CPU fails Replace the Al CPU with a new one See Chapter 6 211 CPU INTERNAL SRAM R W ERROR The A1 CPU s internal SRAM does not work properly This message is displayed when an internal test 2 Al VOLATILE MEMORY fails Replace the Al CPU with a new one See Chapter 6 212 CPU BACKUP SRAM R W ERROR The A1 CPU s BACKUP SRAM does not work properly This message is displayed when an in
296. t ZHN OF zHIN OL 1X3 2 ZHW OL day LNI BNC m BNC m Cable eee A m m oso A OFF svia 94 Svla Y ZH5 80 ZH 858686 pug ZHD 888502 12907 ISL 1949094 OL 06511005 Figure 7 1 Source Group Block Diagram 7 2 Source Troubleshooting SOURCE GROUP TROUBLESHOOTING SUMMARY This overview summarizes the sequence of checks included in this chapter Experienced technicians may save time by following this summary instead of reading the entire procedure Headings in this summary match the headings in the procedure Start Here 1 Run internal test 11 If the test fails check the INT REF signal If the INT REF signal is good replace the A3A1 Source Vernier If the INT REF signal is bad replace the A5 Synthesizer Run internal test 5 If the test fails replace the A6 Receiver IF in the receiver group Run internal test 6 If the test fails replace 5 Run internal test 7 If the test fails replace 5 Run internal test 8 If the test fails replace 5 Run internal test 9 If the test fails replace the A4 1st LO Receiver RF Run internal test 13 If the test fails replace the A3A1 Source Vernier
297. t Cables on the A1 CPU a Turn the analyzer power off b Disconnect cables from the A1 CPU s connectors J10 J11 if option 1C2 installed J12 J13 J14 J16 and J17 The connector locations are shown in Figure 5 8 4291B Bottom View Front To A20 Motherboard 505008 EN OE To A32 To A50 To A31 51 53 DC DC CONN GSD FDD Converter t J11 J15 31600 J12 TP8 5VD GND 5VD LED Normally On y on J13 J17 ToA30 ToA53 Front FDD KBD Control Figure 5 8 A1 CPU Connector Locations Turn the analyzer power on Look at the A1 5 VD LED m If the LED is still off the Al CPU is probably faulty Replace the Al CPU m If the LED goes on the Al CPU is verified Continue with the next step d Turn the analyzer power off Reconnect the cable to A1J10 Turn the analyzer power on Look at the A1 5 VD LED m If the 5 VD LED goes out the problem may be in the analog assemblies Continue with Remove Assemblies m If the 5 VD LED is still on continue with the next step e Reconnect one of the disconnected cables to its connector at a time Turn the analyzer power on after ea
298. t anything to the analyzer mainframe front terminals Turn the analyzer ON Press the following keys to execute adjustment Test No 34 PRESET SYSTEM SERVICE MENU TESTS 3 4 EXECUTE TEST Adjust HOLD STEP ADJ until the hold step level is within the limits and PASS is displayed Then press CONT to complete the adjustment The adjustment location is shown in Figure 3 16 HOLD STEP ADJ O C6503014 Figure 3 16 Hold Step Adjustment Location Adjustments and Correction Constants 3 21 BAND PASS FILTER ADJUSTMENT The purpose of this procedure is to optimize the A6 receiver IF band pass filter Required Equipment Type N Cable 61 11500B or part of 11851B Procedure 1 Turn the analyzer OFF 2 gain access to the adjustment component remove the side panel on the control keys side 9 Connect the equipment as shown in Figure 3 17 DODODODO Cable 503015 Figure 3 17 Band Pass Filter Adjustment Setup 4 Turn the analyzer ON 5 Press the following keys to execute adjustment Test No 35 5 5 SERVICE MENU TESTS 3 5 TEST 6 Adjust
299. tatus 1 A1 CPU Verifies the following circuit blocks on the A1 CPU Digital Signal Processor DSP System Timer Real Time Clock Front Key Controller Flexible Disk Drive Controller GPIB Controller EEPROM 2 Al VOLATILE MEMORY Runs only when selected It verifies the A1 volatile memories CPU internal SRAM DSP SRAM Dual Port SRAM Backup SRAM At the end of the test the analyzer is set to the power on default state because the data in the tested memories is destroyed During this test a test pattern is written into the memories and then the pattern is read back and checked If the test fails the test displays an error message for a few seconds and then sets the analyzer to the default state The error message indicates the faulty memory 10 8 Service Key Menus 8 51 GSP Runs only when selected It verifies the following circuit blocks on the A51 GSP GSP Chip DRAM VRAM When this test starts ch 1 LED and ch 2 LED are turned off At the end of this test the analyzer is set to the power on default state because the data in the tested memories is destroyed During this test a test pattern is written into the memories and then the pattern is read back and checked If the test fails the test indicates the faulty circuit using the Ch 1 LED the Ch 2 LED and beeps It then sets the analyzer to the default state If the GSP chip is faulty a beep sounds and the LEDs blink once If the DRAM is faulty two beeps
300. ted 2 in Figure 13 6 to remove the holder from the chassis 7 Remove the two screws to remove from the holder 13 10 Replacement Procedures A22 BIAS 1 2 A23 DC BIAS 2 2 REPLACEMENT Tools Required m Torx screwdriver T15 m Pozidriv screwdriver pt size 1 small and Z2 medium Removal Procedure 1 Remove the bottom cover as described in the BOTTOM COVER REMOVAL procedure 2 Disconnect the flat cables and wire designated D 2 and 3 in Figure 13 7 CES13007 Figure 13 7 A22 A23 DC Bias Replacement Loosen the four screws designated 0 in Figure 13 7 to remove A22 from 23 4 Disconnect the flexible cable from A23 5 Remove the five screws designated 5 in Figure 13 7 to remove A23 from the chassis Replacement Procedures 13 11 A30 KEYBOARD REPLACEMENT Tools Required m Pozidriv screwdrivers pt size 1 small and 2 medium m Flat blade screwdriver m Hex key 0 063 inch across flats Removal Procedure 1 Loosen the two hex set screws in the front panel knob and pull the knob off 2 Remove the front panel as described in the FRONT PANEL REMOVAL
301. tep oscillator in the A5 synthesizer This test sets the oscillator frequency to several frequencies over the entire range For each frequency the test measures the VCO tuning voltage at DC bus node 19 and the frequency at frequency bus node 8 It then checks that each measured value is within limits Service Key Menus 10 9 9 A4A1 1ST LO OSC Verifies the 1st LO oscillator in the A4A1 1st LO This test sets the oscillator frequency to several frequencies over the entire range For each frequency the test measures the VCO tuning voltage at DC bus node 18 and checks that each measured value is within limits 10 A3A2 2ND LO OSC Verifies the 2nd LO oscillator in the 2 2nd LO This test measures the VCO tuning voltage at DC bus node 14 and checks that the measured value is within limits 11 1 DIVIDER Verifies the divider circuit the 1 Source Vernier This test measures the frequency 40 kHz at frequency bus node 2 and checks that the measured value is within limits 12 A6 3RD LO OSC Verifies the 3rd LO oscillator on the A6 receiver IF This test measures the VCXO tuning voltage at DC bus node 23 and the frequency 40 kHz at frequency bus node 6 It then checks that each measured value is within limits 13 A3A1 SOURCE Verifies the source oscillator in the 1 Source Vernier This test measures the VCXO tuning voltage at DC bus node 13 and the frequency 40 kHz at frequency bus node 1 It then checks that
302. ternal test 2 Al VOLATILE MEMORY fails Replace the Al CPU with a new one See Chapter 6 213 DSP SRAM R W ERROR The DSP s SRAM on the A1 CPU does not work properly This message is displayed when an internal test 2 A1 VOLATILE MEMORY fails Replace the 1 COU with a new one See Chapter 6 Messages 8 214 DUAL PORT SRAM R W ERROR The DSP s dual port SRAM on the A1 CPU does not work properly This message is displayed when an internal test 2 Al VOLATILE MEMORY fails Replace the Al CPU with a new one See Chapter 6 215 POST REGULATOR OUTPUT VOLTAGE OUT OF SPEC power supply voltage of the 2 post regulator is out of its limits This message is displayed when an internal test 4 A2 POST REGULATOR fails Troubleshoot the power supply functional group in accordance with Chapter 5 216 LEVEL OUT OF SPEC The voltage of the GND Ground at the DC bus node 26 is out of its limits This message is displayed when an internal test 4 A2 POST REGULATOR fails Troubleshoot the power supply functional group in accordance with Chapter 5 217 FAN POWER OUT OF SPEC The voltage of the fan power supply at the DC bus node 11 is out of its limits This message is displayed when an internal test 4 A2 POST REGULATOR fails Troubleshoot the power supply functional group in accordance with Chapter 5 218 FAILURE FOUND FROM A D MUX TO A D CONVERTER A trouble is found on the signal path from the A D multiplexer to A D converter on th
303. tes a FAN LOCK signal The signal is fed into the FAN LOCK SENSE circuit in the 50 DC DC Converter If the FAN stops the FAN LOCK signal is missing Then the FAN LOCK SENSE circuit activates the 50 SHUTDOWN circuit and turns off the SHUTDOWN LED Perform the following procedure to check the 50 SHUTDOWN LED Remove the analyzer s top cover and shield plate a b Make sure the 2 post regulator is firmly seated and the cables are connected properly e Turn the analyzer power on a Look at the 50 SHUTDOWN LED The LED location is shown in Figure 5 2 m If the SHUTDOWN LED is on replace the 50 DC DC Converter m If the SHUTDOWN LED is off check the cable connection between A50J2 and A2J4 If the connection is good continue with TROUBLESHOOT THE FAN AND THE A50 DC DC Converter in this chapter 5 8 Power Supply Troubleshooting FIND OUT WHY THE A50 SHUTDOWN LED IS OFF Use this procedure when the fan is rotating If the fan is not rotating see the FIND OUT WHY THE FAN IS NOT ROTATING If the fan is rotating the 50 SHUTDOWN LED turning off indicates the A50 shutdown circuit is protecting the 5 VD power supply from the over voltage condition The 5 VD power line may be shorted with one of power lines higher than 5 V The problem may be in the A50 DC DC Converter the A2 post regulator and any of assemblies obtaining the power from 5 VD supply and the higher power supplies 1 Disconnect the Cable from
304. the A1 CPU is probably faulty Replace the A1 CPU e OFF 00000000 Normal Condition 4291B Bottom View 506003 Figure 6 2 1 Eight LEDs Pattern Digital Control Troubleshooting 6 3 2 Check Error Messages Turn the analyzer power on Check no error message appears on the LCD m If no error message is displayed continue with the Check 1 DRAM and Flash Memory in this START HERE m If one of error messages listed below is displayed follow the instruction described below For the other message see the Error Messages in Messages Error Messages Instruction POWER ON TEST FAILED This indicates the power on selftest failed Continue with the next Check Power On Selftest EEPROM CHECK SUM ERROR This indicates that the correction constants stored in the EEPROM on the A1 CPU are invalid or the EEPROM is faulty Rewrite all correction constants into the EEPROM For the detailed procedure See the Adjustments amd Correction Constants chapter in this manual If the rewriting is not successfully performed replace the EEPROM and then rewrite the all correction constants into the new EEPROM Svc Status Annotation This indicates that the correction constants stored in the EEPROM on the A1 CPU are invalid or the EEPROM
305. the A22 output signals If the signals are bad replace A22 Otherwise replace A23 Check A60 High Stability Frequency Reference Option 1D5 1 Check the REF OVEN signal If it is bad replace A60 2 Perform the 0 MHz Reference Oscillator Frequency Adjustment If the adjustment fails replace A60 74 Source Troubleshooting 5 The following procedure verifies the operation of each assembly the source group by using the 4291B s self test functions internal and external tests For detailed information about the self test functions see the Service Key Menus In this procedure the A3A1 s divider and the A6 s A D converter receiver group are verified first This is done because the internal tests use the A D converter to measure voltages at DC bus nodes within the source group Also the A3A1 s divider output is used to generate the A D converter s control signals Perform the following steps to troubleshoot the source group l Press Preset System SERVICE MENUS TESTS 1 1 EXECUTE TEST to run internal test 11 A3A1 DIVIDER m If the test fails there is a possibility that the A5 synthesizer is faulty This possibility exists because the 1 divider obtains the 40 MHz reference signal from A5 Perform the 1 Check the INT REF Signal procedure in the Check A5 Synthesizer Outputs section This procedure verifies the 40 MHz reference signal If the INT REF signal is good 1 is proba
306. the A50J1 Turn the analyzer power off Disconnect the cable from the A50J1 Turn the analyzer power on m If the A50 SHUTDOWN LED is still off replace the 50 DC DC Converter m If the A50 SHUTDOWN LED goes on the 50 DC DC Converter is verified Turn the analyzer power off and reconnect the cable to the A50J1 Continue with the next Disconnect the Cable from the A51J2 2 Disconnect the Cable from the A51J2 Turn the analyzer power off Disconnect the cable from the A51J2 Turn the analyzer power on m If the A50 SHUTDOWN LED goes on replace the 51 GSP m If the A50 SHUTDOWN LED is still off the 51 GSP is verified Turn the analyzer power off and reconnect the cable to the A51J2 Continue with the next Disconnect the Cable from the 1410 3 Disconnect the Cable from A22J1 Option 001 Only Turn the analyzer power off Disconnect the cable from A22J1 Turn the analyzer power on m If the A50 SHUTDOWN LED goes on replace the A22 DC Bias 1 2 m If the A50 SHUTDOWN LED is still off the A22 DC Bias 1 2 is verified Turn the analyzer power off and reconnect the cable to A22J1 Continue with Disconnect the Cable from 1410 4 Disconnect the Cable from the A1J10 Turn the analyzer power off Disconnect the cable from A1J10 Turn the analyzer power on m If the A50 SHUTDOWN LED goes on replace the Al CPU m If the 50 SHUTDOWN LED is still off the Al CPU is verified Turn the analyzer power off and reconnect the cable to t
307. the Calibrated Value for the power sensor 10 Choose the item that you want to perform 11 Follow the instruction on the controller s screen until the program ends The equipment connections are shown in each Correction Constants procedure in this chapter Adjustments and Correction Constants 3 5 40 MHz REFERENCE OSCILLATOR FREQUENCY ADJUSTMENT The purpose of this procedure is to adjust the 40 MHz reference oscillator frequency Required Equipment Frequency Counter 5343A Option 001 SMB f BNC f adapter e e 2 2 2 4 PN 1250 1236 BNC cable 61 em 2 222222222222 PN 8120 1839 Procedure 1 Connect the equipment as shown in Figure 3 2 The A5 CAL OUT connector location is shown in Figure 3 3 Do not connect anything to the rear panel EXT REF input connector BNC f SMB f Adapter To A5 CAL OUT Frequency Counter 00000000 BNC m BNC m Cable 61 503003 Figure 3 2 40 MHz Reference Oscillator Frequency Adjustment Setup 3 6 Adjustments and Correction Constants 40 2 FREQ ADJ CAL OUT
308. the Correction Constant Menu in this chapter SYNTH Displays the Synthesizer Control Menu See the Synthesizer Control Menu in this chapter 05 Displays the OSC Control Menu See the OSC Control Menu in this chapter Service Key Menus 10 15 DC BIAS Displays the DC Bias Control Menu See the DC Bias Control Menu in this chapter TRD Displays the Transducer Control Menu See the T ransducer Control Menu in this chapter IF Displays the IF Control Menu See the IF Control Menu in this chapter Service Modes The analyzer has various service modes These service modes are powerful tools to test verify adjust and troubleshoot the analyzer The service modes are divided by function into the five groups listed below Bus Measurement Correction Constants On Off Synthesizer Control OSC Control DC Bias Control Transducer Control measures and displays the signal voltage or frequency at the selected bus node of the analyzer This service mode allows you to check the circuit operation by monitoring the circuit signal without accessing the inside of the analyzer allows you to turn one or more of the corrections on off allows you to control the internal circuit settings in the A5 synthesizer allows you to control the internal circuit settings in the Source Vernier allows you to control the internal circuit settings in the A22 and A23 DC Bias allows you to control the internal circuit setti
309. the RF signal level back to the A3A1 level vernier 11 18 Theory of Operation Output Attenuator The output attenuator is a 10 dB step attenuator from 0 dB to 60 dB consists of three segments 10 dB 20 dB and 30 dB Attenuation from 0 dB to 60 dB is obtained by combining one or more of the three segments Each segment is activated by the TTL signals from the A2 post regulator Table 11 2 shows the relationship between the oscillator level setting and the setting Table 11 2 Osc Level Setting vs A7 Output Attenuator Setting Osc Level Attenuation 0 22 Vrms lt Ose lt 1 0 Vrms 0 dB 70 mVrms lt Osc lt 0 22 Vrms 10 dB 22 mVrms Osc 70 mVrms 20 dB 7 0 mVrms lt Ose lt 22 mVrms 30 2 2 mVrms lt Osc lt 7 0 mVrms 40 0 70 mVrms lt Osc lt 2 2 mVrms 50 0 20 mVrms lt lt 0 70 mVrms 60 1 Osc lt 0 5 Vrms for frequency gt 1 GHz A22 A23 DC Bias The A22 DC bias 1 2 and A23 DO bias 2 2 are DC bias sources that provide constant bias voltage up to 40 V and constant bias current up to 100 mA The DC bias source has two operational modes a voltage setting mode and a current setting mode In the voltage setting mode the bias level is set by voltage and the bias limit is set by current In this mode the bias source provides a constant bias voltage until the bias current rises above the current limit setting In the current setting mode the bias leve
310. the VCO tuning voltage and the VCO output frequency of the fractional N oscillator DC Bus Node Descriptions The following paragraphs describe the 26 DC bus nodes They are listed in numerical order 0 OFF The DC bus is off This is the default setting 1 5 V AUX 2 025 0 This node is located on the A2 post regulator and detects the voltage of the 5 V AUX power supplied to the A2 post regulator To observe this node perform the steps in the Bus Measurement Procedure When this node is selected the trace is typically flat at approximately 42 025 U 10 2 15 V 1 92 U This node is located on the A2 post regulator and detects the voltage of the 5 V AUX power supplied to the analog boards To observe this node perform the steps in the Bus Measurement Procedure When this node is selected the trace is typically flat at approximately 1 92 U 10 3 12 6 V 2 124 U This node is located on the A2 post regulator and detects the voltage of the 12 6 V power supplied to the probe power connectors on the front panel To observe this node perform the steps in the Bus Measurement Procedure When this node is selected the trace is typically flat at approximately 2 124 U 10 Service Key Menus 10 19 4 5 V 2 025 U This node is located on the A2 post regulator and detects the voltage of the supplied to the analog boards To observe this node perform the steps in the Bus
311. the bottom covers from the defective test head and the replacement test head 2 Replace the defective test head s bottom cover on the replacement test head Note The bottom cover replacement is required to maintain the serial number label that is put on the bottom cover serial number label is required to identify the test head and guarantee the analyzer system specifications CENTER CONDUCTOR COLLET REPLACEMENT The analyzer uses 7 mm connectors The center conductor collets of the connectors can be replaced as usual 7 mm connectors m Use precision 6 slot collet Agilent PN 85050 20001 as a replacement part m Use the removing tool guide Agilent PN 04291 21002 to remove a collet from the low loss capacitor Note There are two Agilent Technologies publications available to help you learn 7 mm connector maintenance Y Y Microwave Connector Care Agilent 08510 90064 explains in detail how to care for microwave connectors Agilent Application Note 326 Coaxial Systems Agilent PN 5954 1516 summarizes microwave connector care It is available free from the nearest Agilent Technologies office Replacement Procedures 13 17 Post Repair Procedures 14 INTRODUCTION This chapter lists the procedures required to verify the analyzer operation after an assembly is replaced with a new one POST REPAIR PROCEDURES Table 14 1 Post Repair Procedures lists the required procedures that must
312. through Al and the A20 motherboard See Figure 11 2 A50 Shutdown LED The A50 shutdown LED is on during normal operation It turns off when the A50 protective circuits are activated and shut down some power lines The shutdown LED turns off when one of the following conditions is sensed Overcurrent on 5 VD Power Line Overcurrent on the four power supplies 18 V and 7 8 V Fan is not rotating FAN LOCK signal is sensed The fan obtains its power 25 V from A40 preregulator through the A50 DC DC converter and the A2 post regulator When the power is missing the FAN LOCK signal shuts the switching regulators down and turns the 50 shutdown LED off Theory of Operation 11 5 A2 Post Regulator The A2 post regulator consists of seven filters nine regulators and the drive circuits for the output attenuator See Figure 5 13 in chapter 5 The A2 post regulator distributes the following eleven power supply voltages to individual assemblies throughout the analyzer Each of the nine regulators receives the DC voltage pre regulated in A50 through a filter and converts it to one of the fully regulated constant DC voltages listed below FAN POWER is derived from the 25 V supply from A40 It powers the fan 15 V is derived from the 18 V supply from 50 It powers analog assemblies through A9 15 V AUX is derived from the 18 V supply from A50 It powers the three probe power outputs on the front panel
313. to set the frequency to 1 8 GHz Press SYSTEM Service Menu Service Modes 05 050 AUTO man and verify the label changes to 08C auto MAN to set the analyzer manual OSC level mode Press OUTPUT ATT AUTO 10 dB then the label changes to OUTPUT ATT 10 dB to set the output attenuator to 10 dB Press GSC DAC AUTO man and verify the label changes to 08 DAC auto Then press OSC DAC VALUE 3 2 0 0 to set the value to 32 000 Confirm that the power meter reading is greater than 2 5 dBm m If the test fails go to Chapter 7 m If the test passes continue with the Receiver Test procedure Overall Troubleshooting Receiver Test Verify the receiver operation by performing following procedure Test Equipment Type N Cable 61 em 11500B or part of 11851B Procedure 1 Verify that nothing is connected to the front panel of the analyzer mainframe Turn the analyzer power on 2 3 4 Press PRESET to initialize the analyzer Press SYSTEM SERVICE MENU TESTS 2 2 to access the RECEIVER GAIN test When RECEIVER GAIN is displayed press EXECUTE TEST Perform the test according to the displayed instructions m If the test fails go to Chapter 8 Press to access the A6V I NORMALIZER test When NORMALIZER is displayed press EXECUTE TEST Perform the test according to the displayed inst
314. tor 28480 4970 66536 A32 E4970 66532 5 1 IBASICU F 28480 E4970 66532 3050 1546 1 1 Spacer for BNC A32 rear panel 28480 3050 1546 2190 0054 91 1 Washer for BNC 18189 1924 12 2950 0054 1 1 Nut for BNC 28480 2950 0054 1251 7812 0 2 Screw for I O Port 28480 1251 7812 1 3050 0893 9 4 Washer Flat 28480 3050 0893 2190 0586 2 4 Washer Spring 06691 A2WASPSR 0158 0515 1598 6 4 Screw M4 28480 0515 1598 2 04396 61001 O 1 Fan Assembly 28480 04396 61001 3 04396 61706 2 1 Flat Cable 28480 04396 61706 4 1400 1334 6 1 Clamp Cable 28480 1400 1334 5 See Table 12 8 Flat Cable A32 to A20 E 04396 61635 6 1 RF Cable to A20 28480 04396 61635 I See Table 12 4 RF Cable I See Table 12 4 RF Cable O V See Table 12 4 RF Cable Opt 1D5 12 22 Replaceable Parts Miscellaneous Parts 6512003 Figure 12 14 Miscellaneous Parts 1 Side Viwes Table 12 17 Miscellaneous Parts 1 Side Viwes Ref Agilent Part Qty Description Mfr Mfr Part Desig Number D Code Number 1 0515 1668 1 16 Screw 28480 0515 1668 2 0515 1719 3 8 5 M4 28480 0515 1719 3 0515 2079 0 5 Screw M4 28480 0515 2079 4
315. ts 12 28 Test Station and Test Head 12 28 High Temperature Test Head Parts Option 013 014 12 30 Contents 9 13 Replacement Procedures INTRODUCTION oaa TOP COVER REMOVAL Tools Required BOTTOM COVER REMOVAL ee a a Tools SIDE COVER REMOVAL Tools Required ll FRONT PANEL REMOVAL Tools Required ll REAR PANEL REMOVAL Tools Required ll Al CPU REPLACEMENT 2 a Tools sn Removal Procedure Replacement Procedure A2 POST REGULATOR REPLACEMENT 5 4 Tools Required ll Removal Procedure A3A Source Vernier 2 SECOND LO AND A3A3 SOURCE REPLACEMENT Tools Required ll Removal Procedure A4 FIRST LO RECEIVER RF REPLACEMENT 2 2 2 Tools Required ll Removal Proced
316. ts of the open short 50 0 and low loss capacitor termination The calibration kit is used to calibrate the analyzer The following pages describe the operation of the functional groups 11 2 Theory of Operation POWER SUPPLY OPERATION The power supply functional group consists of the following assemblies m A40 Preregulator m 50 DC DC Converter m A2 Post Regulator These three assemblies comprise a switching power supply that provides regulated DC voltages to power all assemblies in the analyzer See Figure 11 2 The A40 preregulator steps down and rectifies the line voltage and provide 24 V to the A50 DC DC converter The A50 DC DC converter contains two switching regulators and provides the following six power supply voltages 25 V 18 V 4 7 8 V 5 VD 7 8 V 18 V The 5 VD 5 V digital supply is fully regulated in A50 and is directly supplied to the Al CPU The other five power supplies are preregulated in 50 and go to the A2 post regulator for final regulation The 18 V and 18 V are directly supplied to A22 DC bias 1 2 also when the option 001 is installed A50 receives the FAN LOCK signal from the fan through the A20 motherboard and the A2 post regulator The A2 post regulator filters and regulates the five power supply voltages from A50 It distributes the following eleven regulated voltages to individual assemblies throughout the analyzer FAN POWER 25 V 15 V 15 V AUX 8 5 5 3 V
317. u can quit the test pattern only when the analyzer is turned OFF 40 TEST PATTERN 1 Black This pattern is used to verify the color purity of the LCD 41 TEST PATTERN 2 White This pattern is used to verify the color purity of the LCD 42 TEST PATTERN 3 Red This pattern has the same use as TEST PATTERN 2 Service Key Menus 10 13 48 TEST PATTERN 4 Green This pattern has the same use as TEST PATTERN 2 44 TEST PATTERN 5 All Blue This pattern has the same use as TEST PATTERN 2 10 14 Service Key Menus SERVICE MODES MENU Figure 10 5 shows the service modes menu The service modes menu leads to one of the menus used to control the analyzer service modes For the analyzer s service modes see the Service Modes display the service modes menu press System SERVICE MENU and SERVICE MODES Each softkey in the service modes menu is described below Service Modes Menu system SE MENO ODES BUS Bus Measurement Menu CORRECT ION Correction CONSTANTS Constants Menu Synthesizer SYNTH Control Menu ose OSC Control Menu DC Bias Control DC BIAS Menu TRD Control Menu IF 7 IF Control Menu RETURN 6510005 Figure 10 5 Service Modes Menu BUS MEAS OFF Displays the Bus Measurement Menu See the Bus Measurement Menu in this chapter CORRECTION CONSTANTS Displays the Correction Constant Menu See
318. ual mode In the automatic mode the analyzer sets the GAINDAC control value according to the measurement settings In the manual mode the GAINDAC control value is set by using the GDAC VALUE softkey GDAC VALUE DIAG SERV DCB GDAC VAL lt numeric gt Allows you to enter the GAINDAC control value 0 to 255 This value is used when the GAINDAC is set to manual mode RELAY ON off DIAG SERV DCB STAT OFF ON O 17 Toggles the DC bias output relay in the A23 DC bias 2 2 to turn on and off the DC bias Note settings must be turned to auto except when checking the analog circuits Y 10 36 Service Key Menus TRANSDUCER CONTROL MENU Figure 10 15 shows the transducer TRD control menu hierarchy To display the TRD control menu press System SERVICE MENU SERVICE MODES and TRD A softkey in the control menu displays one of menus used to control one of the A41 TRD amp circuits Each softkey in the TRD control menu is described below System SERVICE MENU SERVICE MODES 06510015 CONTROL MENU TRD AMP 0 dB TRD TRD ATT AUTO man GV ATT RETURN RETURN o dB GI ATT 0 dB TRD AMP 0 dB RETURN TRD RANGE MEAS 2 TEST HEAD NONE TEST HEAD IMPEDANCE HIGH 2 AUTO VOLTAGE RETURN AGE EXPAND CURRENT D NORMAL V I RATIO v 1 RETURN
319. up consists of the following assemblies m Receiver RF m Receiver IF 11 20 Theory of Operation 4 1X3 ILL lazonanoas L lon x8 9 pue H S LNdNI ev L L ubnoau ZHW HSNOYHL LVEV 04 16 wold O1 Wold ZHD 898986 ZH5 80 OL 2 9 898907 e907 pug e507 ISL ZHW 8 ZHM OV oso O1 PIE sna I ZHW ddr yi L gt ANOD al puz 31 191 ANOS ANOO ISl Y3A13938 9V i JH HHAlI3O3H ev vv 6511006 Figure 11 6 Receiver Simplified Block Diagram 11 21 Theory of Operation Receiver RF The A4A2 receiver RF converts the RF input signal from the transducer group to the 21 42 MHz 2nd IF The 2nd IF is routed to the A6 receiver IF The A4A2 receiver RF consists of the following circuits see Figure 11 11 m Converter m 2nd Converter In the first converter the RF signal 1 MHz to 1 8 GHz is mixed with the 1st local oscillator signal 2 05958 GHz to 3 85858 GHz from 4 1 and then converted to the 2 05858 GHz 1st IF through the band pass and low pass filters In the second converter the 1st IF is mixed with the 2 08 GHz second local oscillator signal from A3A2 This converts it to t
320. urce OSC source oscillator is a phase locked oscillator The output signal is phase locked to the 40 kHz frequency of the divider output The oscillator generates the 85 68 MHz signal The signal is divided by the 1 4 divider The resulting 21 42 MHz signal is supplied to the level vernier circuit The oscillator contains an 85 68 MHz VCXO a phase detector a 1 2 divider a mixer and a 1 71 divider See Figure 11 10 The frequency is divided by 2 and mixed with the 40 MHz reference frequency in the mixer The mixer then produces a shifted frequency Fyco 2 40 MHz The mixer output is divided by 71 and then compared with the 40 kHz reference signal the phase detector Phase locking imposes the condition of 40 kHz 2 40 2 71 Therefore the output frequency is locked to 85 68 MHz 40 kHz x 71 40 MHz x 2 The VCXO is optimized by the Source VCXO Adjustment Level Vernier The level vernier controls the level of the 21 42 MHz signal from the source OSC The signal is routed to the output connector on the front panel through the A3A2 2nd LO the A3A3 source and the A7 Output Attenuator The level vernier consists of a level DAC and a level vernier See Figure 11 10 The level vernier changes the 21 42 MHz signal level according to the DAC output level The DAC output level is set according to the predefined data in the EEPROM on the A1 CPU The data is stored by perform
321. ure 5 SYNTHESIZER REPLACEMENT Tools Required ll Removal Procedure RECEIVER IF REPLACEMENT a Tools Required ll Removal Procedure OUTPUT AND A83 dB ATT REPLACEMENT Tools Required ll Removal Procedure A22 DC BIAS 1 2 A23 DC BIAS 2 2 REPLACEMENT Tools Required ll Removal Procedure A30 KEYBOARD REPLACEMENT Tools sn Removal Procedure A40 PREREGULATOR REPLACEMENT Tools Required ll Removal Procedure 41 TRD AMP REPLACEMENT 0 0 0 0 008 28 Tools Required Removal Procedure A50 DC DC CONVERTER Tools Required 4 2l 4 2 4 Removal Procedure A51 GSP REPLACEMENT 2 2 2 2 25 22 425 2552259 Contents 10 Tools 13 15 Removal Procedure 13 15 Replacement Procedure 13 15 A52 LCD REPLACEMENT 2 2 2 2
322. ure 7 23 Power Meter 00000000 oOo 2 OO Oa Power Sensor CES03019 Figure 7 23 A3A3 RF Signal Test Setup c Press the following keys to set the first setting of the RF signal test Preset System Service Menu Service Modes OSC 050 AUTO man then the label changes to OSC auto MAN OUTPUT ATT AUTO O dB then the label changes to OUTPUT ATT O dB OSC DAC AUTO man then the label changes to OSC DAC auto MAN osc DAC VALUE Gan 64 Cored GD d Check that the power meter reading is 0 6 dBm Source Troubleshooting 7 27 m If the signal level is good continue with the next step m If the signal level is bad A3A3 is the most probable faulty assembly Replace A3A3 e Perform the above check for all the settings listed in Table 7 2 Table 7 2 A3A3 RF Signal Test Settings Frequency Output ATT OSC DAC Test Limit 1 MHz 0 dB 1000 0 dBm 6 dB 1 GHz 0 dB 3222 6 dBm 6 dB 1 8 GHz 0 dB 5000 4 dBm 6 dB 1 8 GHz 10 dB 32000 2 5 dBm m If all the signal levels are good A3A3 is verified m If any signal level is bad A3A3 is the most probable faulty assembly Replace A3A3 7 28 Source Troubleshooting CHECK A7 OUTPUT ATTENUATOR CONTROL SIGNALS Use this procedure when the A7 Output Attenuator is the most suspici
323. urn on the DC bias T Press DC BIAS MENU BIAS CUR LIMIT 1 6 0 k m to set the bias current limit to 100 mA 8 Record the multimeter reading on the 0 V test result column of the performance test record The analyzer DC bias voltage is set to 0 V as a preset value 9 Press BIAS VOLTAGE 4 x1 to set the DC bias voltage to 4 V 10 Subtract 4 V analyzer setting from the multimeter reading and record the result on the performance test record 11 Change the DC bias voltage setting to test the analyzer at the following test points 2 18 Performance Tests 12 13 14 15 16 17 18 Table 2 3 DC Bias Voltage Accuracy Test Settings Bias Voltage Setting 0 4 10 40 4V 10V 40V Toggle BIAS SRC VOLTAGE to BIAS SRC CURRENT to set the DC bias current setting mode Set the multimeter to DCI function and 100 A range Then connect the BNC f Banana adapter to current measurement connectors with the GND connector connecting to the LO terminal Press BIAS VOLT LIMIT 2 0 to set the bias voltage limit to 20 V Record the multimeter reading on the 0 A test result column of the performance test record The analyzer DC bias voltage is set to O A as a preset value Press BIAS CURRENT 2 0 to set the DC bias current to 20 yA Subtract 20 yA analyzer setting from the multimeter reading and record the result on the per
324. ut of limits the detector sends the status to the A1 CPU Then the A1 CPU causes the message CAUTION PHASE LOCK LOOP UNLOCKED to be displayed The VCXO is optimized by the Third Local VCXO Adjustment Third Converter In the third converter the 21 42 MHz second IF is mixed with the 21 4 MHz third local signal and then converted to the final 20 kHz third IF The third converter is an image rejection mixer that rejects the 20 kHz signal converted from 21 38 MHz and 21 4 MHz It also rejects errors caused by the 21 38 MHz component mixed into the second IF 11 22 Theory of Operation In the mixer the 21 42 MHz second IF is divided into two paths 0 path and 90 path and then mixed with the 90 phase different 21 4 MHz signals Therefore the 90 phase different 20 kHz signals are converted The 90 path 20 kHz lags the 0 path 20 kHz by 90 s Then the two phase shifters shift the 90 path 20 kHz forward by 90 Therefore the 90 path and the 0 path signals are in phase Then the third IF signal is generated by adding the two 20 kHz signals that are in phase When 21 38 MHz signal is applied to the mixer The 90 path mixer output 20 kHz forwards that of 0 path by 90 Therefore the 90 path phase sifter output 20 kHz forwards that of 0 path by 180 These two signals are canceled by being added to each other Sample Hold and A D Converter The 3rd IF is sampled and held in the Sample Hold circuit The hold signal is applie
325. utput level is measured at the R input Then the S and R connectors are disconnected and the R measurement result is compared with the previous measurement result 26 TRD LOSS Checks that the analyzer test station loss is within limits As a result the test station is verified Service Key Menus 10 11 analyzer mainframe 5 and connectors connected and mainframe is calibrated Then the loss through the test station is measured with the mainframe 2 CABLE ISOLATION Checks that the analyzer test station cable isolation is sufficient As a result the test station cable is verified The analyzer mainframe S and R connectors are connected and the S output level is measured at the input Then the test station is connected to the mainframe and the measurement result is compared with the previous measurement result 28 TRD ISOL N I TO V Checks that the analyzer test station V channel isolation when the OSC signal is applied to the I channel is sufficient As a result the test station is verified The analyzer test station V channel input is measured while applying the OSC signal to the channel 29 TRD ISOL N V TOI Checks that the analyzer test station I channel isolation when the OSC signal is applied to the V channel is sufficient As a result the test station is verified The analyzer test station I channel input is measured while applying t
326. vely These start and stop settings set the 1st LO to the triple loop mode and sweep the 1st LO frequency from 2 93608 GHz at the start frequency 877 5 MHz to 2 98108 GHz at the stop frequency 922 5 GHz g Initialize the spectrum analyzer Then set the controls as follows The sweep time must be less than 24 msec 7 18 Source Troubleshooting Controls Settings Start Frequency 2 9 GHz Stop Frequency 9 GHz Reference Level 10 dBm Max Hold ON h On the 4291B press SINGLE to make a sweep i Wait for the completion of the sweep and check that the signal level is 5 dBm to 5 dBm over the frequency range of 2 936 GHz to 2 981 GHz The displayed trace should be as shown in Figure 7 15 The measured level is lower than the actual level due to the BNC m BNC m cable s insertion loss in the high frequency range If the measured level is lower than the limit measure the cable s loss and compensate the signal level by the cable s loss m If the signal level and the trace are good continue with the next step m If the signal level or the trace is bad the A4A1 1st LO is faulty Replace A4 O dBm 5 dB over the frequency range 2 936 GHz to 2 981 GHz REF 10 0 dBm ATTEN 20 dB
327. ws ADJ4291B Adjustments Program TE_A4291B Equipment Configuration Program Note To prevent accidental deletion or destruction of the program make working copies of the furnished master diskette HFS or SRM system Use the working copies for daily use Keep the master diskettes in a safe place and use them only for making working copies Keyboard and Mouse Operation The menus in ADJ4291B use a window format The window format menu supports keyboard and mouse operations as follows m Keyboard Operation 1 Press 4 v keys until your preference is highlighted 2 Choose the highlighted item by pressing RETURN or SELECT Press ENTER or EXECUTE if Nimitz Keyboard 3 If QUIT or EXIT is displayed in a menu select one of these to exit the menu Otherwise press v CONTINUE if Nimitz Keyboard to exit When you exit menus the program displays another menu Note Press 2 to access on screen help information for the selection you have i highlighted Help information appears in a display window Press RETURN or SELECT press ENTER EXECUTE if Nimitz Keyboard to turn off the help screen m Mouse Operation 1 Slide the mouse up or down until your preference is highlighted 2 Choose the highlighted item by pressing the left hand button on the mouse or slide the mouse to the right 3 If QUIT or EXIT is displayed in a menu select one of these to exit the me
328. xt step m If the signal is bad perform the Comb Generator Adjustment and Step Pretune Correction Constants procedures see Chapter 3 If the signal is still bad after the adjustments are performed the STEP OSC is probably faulty Replace A5 f On the 4291B change the center frequency using numeric keys and check the STEP OSC signal at the frequencies listed Table 7 1 as the same manner Table 7 1 lists typical STEP OSC frequencies and their bus measurement limits 7 12 Source Troubleshooting Table 7 1 STEP OSC Frequency 4291B STEP OSC Bus Measurement Center Frequency Frequency Limits 1 MHz 470 MHz 1 8359 U 0 01 U 80 MHz 490 MHz 1 9140 U 0 01 U 160 MHz 510 MHz 1 9921 U 0 01 U 240 MHz 530 MHz 2 0703 U 0 01 U 320 MHz 550 MHz 2 1484 U 0 010 400 MHz 570 MHz 2 2265 U 0 01 U 480 MHz 590 MHz 2 3046 U 0 01 U 560 MHz 610 MHz 2 3828 U 0 01 0 640 MHz 630 MHz 2 4609 U 0 01 U 720 MHz 650 MHz 2 5390 U 0 01 U 800 MHz 670 MHz 2 6171 U 0 01 U 880 MHz 690 MHz 2 6953 U 0 01 U 960 MHz 710 MHz 2 7734 U 0 01 U 1040 MHz 730 MHz 2 8515 U 0 01 U 1120 MHz 750 MHz 2 9296 U 0 01 U 1200 MHz 770 MHz 3 0078 U 0 01 U 1280 MHz 790 MHz 3 0859 U 0 01 U 1360 MHz 810 MHz 3 1640 U 0 01 U 1440 MHz 830 MHz 3 2421 U 0 010 1520 MHz 850 MHz 3 3203 U 0 01 U 1600 MHz 870 MHz 3 3984 U 0 01 U 1680 MHz 890 MHz 3 4765 U 0 01 U 1800 MHz 910 MHz 3 5546 U 0 01 U
329. z 100 MHz 200 MHz 300 MHz 500 MHz 600 MHz 800 MHz 1 GHz 1 3 GHz 1 6 GHz 1 8 GHz 2 40 Performance Tests High Temp High Z 250 mV Z N N N NN NN EN PEN N High Temp High Z Z N N N NON NN ON ON Value 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ Value 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 0 00 mQ 101 mQ 110 mQ 200 mQ 300 mQ 400 mQ 600 mQ 700 mQ 900 mQ 1 10 0 1 40 0 1 70 9 1 90 Q 101 mQ 110 mQ 200 mQ 300 mQ 400 mQ 600 mQ 700 mQ 900 mQ 1 10 9 1 40 0 1 70 9 1 90 8 mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ mQ Measurement Uncertainty 2 mQ 2 mQ 10 mQ 20 mQ 30 mQ 40 mQ 50 mQ 70 mQ 0 08 Q 0 10 Q 0 12 Q 0 13 Q Measurement Uncertainty 2 mQ 2 mQ 10 mQ 20 mQ 30 mQ 40 mQ 50 mQ 70 mQ 0 08 Q 0 10 9 0 12 Q 0 13 8 Test Head Standard Osc Level Frequency Measurement 1 MHz 1 MHz 10 MHz 10 MHz 100 MHz 100 MHz 200 MHz 200 MHz 300 MHz 300 MHz 500 MHz 500 MHz 600 MHz 600 MHz 800 MHz 800 MHz 1 GHz 1 GHz 1 3 GHz 1 3 GHz 1 6 GHz 1 6 GHz 1 8 GHz 1 8 GHz High Temp High Z 500 250 mV Calibration Parameter Value 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mrad 7 0 0 mr
330. z Z 0 1 94 0 0 0 37 Q 1 8 GHz 8 rad 52 8mrad mrad 10 0 mrad Performance Tests 2 37 Test Head Norm Temp Low Z Standard 10 em Airline with Short Osc Level 41 mV Frequency Measurement Calibration Test Limit Test Result Measurement Parameter Value Uncertainty 1 MHz 7 mQ 51 2 mQ mQ 1 7 mQ 1 MHz 0 rad 452 mrad mrad 15 mrad 10 MHz Z Q 61 5 mQ mQ 4 3 mQ 10 MHz 0 rad 57 3 mrad 4 0 mrad 100 MHz Z Q 169 mQ 27 mQ 100 MHz 0 rad 15 8 mrad 2 5 mrad 200 MHz Z Q 354 mQ mQ 67 mQ 200 MHz 0 rad 15 8 mrad 3 0 mrad 300 MHz Z 0 572 mQ 110 mQ 300 MHz 0 rad 15 7 mrad mrad 3 0 mrad 500 MHz Z 0 1 61 0 0 0 31 0 500 MHz 0 rad 18 4 mrad 3 5 mrad 600 MHz Z Q 4 38 Q Q 0 78 Q 600 MHz 8 rad 28 2 mrad 5 0 mrad 1 GHz Z 0 2 55 0 0 0 52 Q 1 GHz 0 rad 29 6 mrad 6 0 mrad 1 8 GHz Z 0 1 22 9 0 0 22 0 1 3 GHz 8 rad 55 2 mrad mrad 10 0 mrad 1 6 GHz Z 0 1 09 Q 0 0 16 0 1 6 GHz 0 rad 101 mrad mrad 15 mrad 1 8 GHz Z 0 1 97 Q 0 0 37 Q 1 8 GHz 8 rad 53 6mrad mrad 10 0 mrad 2 38 Performance Tests High Temp High Impedance Test Head Option 013 Test Head Standard Osc Level Frequency Measurement Parameter 1 MHz 10 MHz 100 MHz 200 MHz 300 MHz 500 MHz 600 MHz 800 MHz 1 GHz 1 3 GHz 1 6 GHz 1 8 GHz Test Head Standard Osc

SERVICE MANUAL - Agilent Technologies

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