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LCD Television Service Manual

1. DV10 9 DV10 vo 23 3V3 3 3V3 226701344 DV10 D DV33 DV33 3 AV33_SIFDIG n cE62 C886 C887 C888 C889 C890 C891 C892 C898 C894 AV33 SIFDIG 9 4 7UF 10V MTOUF 0v LowEBH CAP 0 1uF 3300pF 0 1uF 6800pF 0 1UF 3300pF 0 1uF 0 1uF AV33 SIFDIG 3 2 ZY av 2 i 4 J AV12D_RGB DDRV U AVID RGB CS 3 L DDRV gt DDRV 235 AV12_USB 3V3 DV33 e T ro LAvi2 USE USB 3 0603 Bead T T C896 G897 C898 C899 C900 AV12_HDMI T 100uF 16v 3300pF 0 1uF 3300pF 0 1uF 1 i Avgs_ ADCREF L AV33 ADCREF lt gt AV33 ADCREF 3 BEM AVI2A ROBB AV12_PLL AV12A_RGBB AVI2A RGBB 3 KD AVI2 PLL 3 T 1 T 1 AV12 C901 C903 C904 C905 C906 C907 C908 C909 C910 C912 C913 C914 AV12 MEMPLL TC 220uF 16v LowESR CAP 4 7uF 10V 0 1uF 3300 0 1uF 0 1uF 6800pF 3300pF 0 1uF 0 1uF Nhi GY Avie MEL t 4 AVIZ LVDS AvizLVDS 3 7 AV12 LVDSPLL L AVIZ LVDSPLL lt lt Avia LvpsPLL AV12 AV12_PLL 7 FB52 0
2. TP86 TP87 TP88 TP89 90 TP91 92 TP93 94 TP95 TP96 97 99 TP101 TP100 TP103 LIII AJ JET l dao DV10 9 H12 HOLE GND 2 2 of Lz 680 1 _ 222 8 81 TC 100uF 16v LowESR 7 8 4 5 R1164 D62 1 8 1 A SCHOTTKY DIODE B340A HOLE GND a 28 m S 0 8 x 1 0 51K 2K 1 0V 3 w Label P 5V to 1 0 5 6 ARROW Estimated Power consumed 5 MARK MARK MARK MARK H7 HOLE GND 2 22 8 ON ES 71 4 5 12V M Utt u LT1084 252 3 Reto n 5V_TUNER R TO3N 2 28 9 70 HX 4 L vin FB14 2 IN our 10R 2W 10R 2W 40 C199 287 l 68574 R956 08573 _ CES E 100uF 85v 0 1uF 100uF 16v 0 1uF T 100uF 16v 0 1uF 110 196 100uF 16v E T 12V to 5V R ux Vout 1 25 x 1 110 110 2 5V for DDR200 266 33 E 1 25 x 1 120 110 2 6V for DDR400 500 5V to DDRV Estimated Power consumed If use sdram FB14 If use ddr NC FB14 For Tuner 5V power MediaTek Confidential MediaTek ShenZhen Inc Power LDO Size Document Number Date HISENSE_MT8222_EU Jiu Ni 00871725
3. AV33 4 AVIDRGB Avi2D RGB 4 C90 C965 4 7nFINS 4 7nF NS 919 4 7nF NS G i 0987 4 7nF NS 10uF 16V 2 6 8 12 13 lt Media Tek ShenZhen Inc 2 System 2 CVBS input UTE 2404 NS 00 Ea zB 8 2 OSCLO 6811 14 CVBS1 8 OFF MUTE gt gt OFF 14 OSDAO 6 8 11 14 CVBS2 8 CVBSS CVBS3 8 lt gt GND 2 4 5 6 7 8 9 10 11 12 13 14 8 aj a C BSE 5 CVBS5 10 U0RX 2 S E E SPDIF IN OUT CVBS6 10 uon 8 R R SERM es loss i lt oves 10 am 8 e DIFOUT Se SPI SPDIFOUT 12 UTX mea ze EB a t 6 91861588 BSS SS 2 VGA input m GEAGND 2 8 12 8 034 ORESET gt gt ORESET 6 1 VGASOG d coz 2 585 58 0 49 257 228 EEEE E ET
4. E pi 20081223 5pF 5V_TUNER 5V_TUNER R152 10K plur ccc rescue R RESC1005L HX TUNER CVBS GE8 100uF 16V R117 10 4 Qs NEARLY TUNER NEARLY MT8222 2N3904 A E6 3 R HX R142 F RESC1005L HX R42 75 GET 33K R RESC 005L HX T Ta R120 R RESC100 L HX 7pF 75 R44 R RESG100BL HX 75 5 10051 REG 1 ESCTOQBL HX ente Olde R234 0 014 2N3904 R RESC1005L HX R232 R RESC1005L HX 0 75 PEL S R RESC1005L HX R215 T Y Fa RsoTaN095275HX TUNER R RESC1005L HX R233 NS 10K N I R RESC1005L HX 5 MUTE ais R RESC1005L HX MediaTek Confidential ile Size Document Number Fev Drawn 1 z 1 HISENSE MT8222 EU Jiu Ni Date 200871725 heet 11 14 1 AUD LOUT 164 10uE 10 RALtO 20K AUD L 5V 5V_M wa AUD ROUT __CA155 10uF 10v_ 20K AUD_R 23681344 4 0603_Bead CA68 4 7uF 16v D 100uF 16v 70
5. 1 AV1 S Video1 Input P16B FB1 0 8 AVLIN Ri 100 Ci 47nF CVBS1 eve 1 T T ovesi _ 9 CVBSZ 059 CVBS3 3 CVBS3 3 T R441 12K EZJZOV800AA R2 G5 CVBS4 CVBS4 3 10 AVI IN L 75 47pF 4 1 A R440 12K 12 AVIR IN AVI R D 14 SY1 IN R3 100 C4 47nF GVBS2 4 lt GND 2 3 4 5 6 7 9 10 11 12 13 14 R443 065 R442 EZJZOV8O0AA EZJZOV800AA 10K 060 75 4TpF EZJZOV800AA AV2I 0 SCi IN AP 801 RS 100 C7 47nF GVBS3 put WL T P16A RZ CM 52 d 063 75 2 L AV2 IN EZJZOV800AA AwL 12 12 m E R444 12K IN AV2_L T FB4 0 apl 1 AV2_IN rm PEN EN Rit 100 C12 47nF cves4 8446 12K 5 AV2R IN AV2 R 066 EZJZOV800AA R6 C10
6. m epedewiputoropu 6 e AMUX_5V R398 10K 21 gt 100uF 16v OK 029 L ae 2 2uF MUX1 L AV2 L aa YE jzu x2 Y2t GB a 84 x3 MUXI R C397 22uF 6 9 2 MP s Yi Y2 413 2 4 D iuF 10 R331 100 0 MUX CTLB 539100 a 30 AMUX_5V Q R409 10K R406 10K CA22 100uF 16V MUX1 L C420 AUD LOUT AUD_ROUT MUX CTLC MUX sc2_R L TV_MITN ROA 20080911 74HC4052 31 LCD Service Manual 04459 Absolute Maximum Ratings 25 unless otherwise noted Parameter symbol Ung Drain Source Voltage Gate Source Voltage T 25 CG Current Tc Pulsed Drain Current Ta 25 C Power Dissipation 70 unction and Storage Temperature Range Ty Te om Thermal Characteristics Parameter O Max Maximum Junction to Ambient Maximum Junction to Ambient Maximum Junction to Lead FAH 25V 22000H f 20090105 LOW gt LVDS POWER OFF gt LVDS POWER ON R351 GPIO 4 Q41 2N3904 R SOT3N 0 95 2 80 HX 22 LCD Service Manual 1122 1 2V 1A
7. gt gt GND 2 3 4 6 7 8 9 10 11 12 13 14 MediaTek Confidential Media Tek ShenZhen Inc DDR1 DRAM Size Document Number Rev HISENSE MT8222 EU Jiu Ni Date 2008 1 25 Sheet 5 14 1 15 System E2PROM sioe eiim System Reset For Code download and Debug m 8 3V3 i 3V3 ORESET ORESETK T 10KNG ges U18 ja S m ii ene ORESET R RESC1005L R RESC100 L HX 9 SDAGND R21 1 EIN4 PWR 3 U0RX 3 EEPROM24C0WNC 2408 05 05 MODIFY 5 AE 5 UOTX 3 R SOIC08N 1 270 6 00 H place 4 PIN1 GND U1RX Di 3 UIRX 3 R28 4x1 WHOUSING UITX 3 40K M TJC10 4A HX 014 USB DPO s al USB DMT USB_DPO 3 ONET vec NC 3 Se N USB_DP1 44 1 i SDAGND USE NI USB_DP1 10K R198 EEPRORT24C16 DM USBDM 3 R SOICOBN 1 270 6 00 HX a OSCLO 3 8 11 14 2nd UA
8. E m 4 POWER 029 1 1K 262 3904 zx Rbso e ome _ CE67 CB216 K TOURNEY ofuF 220uF 25v ti u us DER DDRV 345 nga 7 LA ave for 8222 only T ower for MT8 only Always MUST USE 1122 LDO 1 therm HF LDO 2 LSVM KV 368121314 25 08 1122 s i UP31 55554 4 2008 6 IN OUT 2008 6 4 0603 Bead GND lt GND 3 4 5 6 7 8 9 10 11 12 13 14 R262 10K paca aw 9 NS 100 CB860 _ BL ON OFF 4 L 1 0883 Teu ZT 100uF 16v KBLONOFF 14 CEBB9 CB891 R SOTAN 2 30 7 00 HX BL ADJUST 100uF 16v 27 TC0 1UF P01 SHIELD M MKBLADJUST 14 R857 085 R858 M RSAG7 070 198 HX CE13 CBB CB8 21K 1 T 220uF 16v 0 1uE 0 c 47uF 16v 0 1uF R859 12K 196 L gt s 1 2 x 21K 12K 12K 3 3V z Test GND P in 5V to 3 3V 3 3V to 1 2V Estimated Power consumed A Estimated Power consumed A Switch Regulator use 1533 Core Power 1 0V AP1533 SOP 8 5V_ON Lar R1161 _ cey 2 11635 100uF 16v 0 1uF 100K 27uH POWER CHOKE G512 R1162 NS 100nF Spread Around PCB
9. gt 75 47pF 7 R445 R447 4 10K 10K 067 068 2 EZJZOV EZJZOV800AA 5V_M SV SUM 256181814 SCT2 AV OUT CB205 CB206 4 7uF 0 1uF R CAPC2012N HX R CAPC1005L HX SCT2_AVOUT AV OUT 10 Vides g gdi ay I SEEK s SCT2_AUL_OUT p R RESC1005L HX SCT2_AUL_OUT 10 13 978 10 CVBS_BYPASS GVBS BYPASS 3 4 CVBS BYPASS CE4 100uF 16V 1 05 g i 3904 CE230 A E6 3 R HX R RESC1005L HX R66 75 SCT2 AUR OUT SCT2 AV OUT 57157 n R RESC1005L HX 1 5158515 ge R RE C1005L HX R115 470uF 10 98207 4 7K 47K 2008 06 10 75 j et R RESC1005L HX CAPC1005L HX Bu BH SCT2 AVO GND 7 ON Only for 05 EU stuff 25 2 KG VGASOG 3 R347 510 16 VGAGND HSYNC VGAHSYNG ERNE L NEAR CONNECTOR NEAR IC w D SUB15 FEMALE VERTICAL M DSUB 15A L HX 2008 06 10 GZ FB27 086 R130 C95 VGAHSYNG R206 RED REDE R133 100 092 10nE EZJZ0V800AA 2 2K VGAVSYNGE 3 OSCLO 099 GRN GND 1 70 VGASDA IN 2122512 GREEN 299 BLU GND NC O VGA_PLUGPWR 096 R132 C90 HSYNC 13 BLUE EZ JZOV8O0AA 75 r 02 A 14 348 10 5v M VSYNC 14 4 OSDA NS0uF 25V VSYNC VGAVSYNG SVM 236121314 SOT3N 0 95 2 75 HX RED GND R13 I n R134 100Yc89 0nF VGAGND VGASCL IN a
10. After the RF Signal enter TV Tuner the RF Signal will become IF Signal after the TV Tuner converted and then the Signal will become SIF and VIF signal by sawfilter U16 and U20 finally send to Main IC through U19 Video signal Video of AV1 input through P16B pass by R2 C5 enter No 1 feet of U34 Video of AV2 input through P16A pass by R6 C10 R11 C12 enter No 4 feet of U34 25 LCD Service Manual CVBS4 Input by P9 pass the below circuit diagram and enter U34 for disposal PC signal enter through XS11 input U34 by passing the below similar disposal check the diagram for detail 4TnF 1012 YIP YPSPR1 10nF 10nF PRIE The Audio signal of HDMI and USB directly input U34 for disposal AV output send out by the No 11 feet of U34 through the below diagram finally come out by P4 Video output ous The input Video signal send out the LVDS signal after the U34 managed the LVDS signal will pass CN9 and go to LCD panel display 26 LCD Service Manual Audio signal then directly go out to U34 TV Audio signal is get by SIF signal which is come out through TV Tuner after the U19 managed and reduce it The Audio of AV1 AV2 and YPbPr input by P16B P16A and 9 firstly pass the below diagram to AVIL 1 064 EZJZOV800AA And then pass 029 to shift and choose one then together with PC and SCART Audio t
11. OUT TV_AIN 3904 3904 7 OUT lt WAIN n 10K 10k x X 1 0 VGA OUT X X 0 1 TV AUDIO OUT x x 5 0 SCART2 OUT oo AOSDATAO 3 6 13 LR AOBCK 313 P10 AOSDATAO R61 AOLRCK 3 13 x COAXIAL amp AOMGLK IEIN SPDIFOUT g3 SPDIF C SPDIFIN 0141 SPDIFIN R465 casi 100 NG 33pF EZJZOV800AA JSTTZZ3 SPDIF OUT MediaTek Confidential ille AudioMUX SPDIF Size Document Number c HISENSE MT8222 EU Jiu Ni Date ZUUHT She 12 of 5 4 8 VER D LVDS SELP BE3 3V 20081223 3V3 LVDSVDD 45V ON SV M J R352 LVDS
12. gy maa R RESC1005L HX dos oe LVD IVDSVDD 21 3 LVDSVDD x L e 3 4 6 7 11 13 164 NN gt oper BEES LVDSVDD An sos NSOR aa FB 1208 NS 2 7 Eum 5 GRU NA aye 5 3 32788102 R355 oR 10 4 FARTA A H NG BUM 23681213 FB 1206 paz C329 4 7K OUT 12 B N 12V _ t tai 04459 R RESC1005L HX GND 14 13 T 4 ERA 15 0uF NG R SOICOBN 1 270 6 00 HX es 1 ON an R 12V M 2 NS KZ ND 1 si NSAR L 9ND K amp K GND 23456789 10111213 vER p 25VY 22000 on RAR ANSIOR EXT VBR LOW gt LVDS POWER OFF 47K 799020090105 8 10BITSEL T EON HIGH gt LVDS POWER ON Em n Bone 4 es R351 4 3 aa Gplo 4 VBR_OUTR358 NS 0F DJUST 3 GPIO 7 JE 0 3 R SOT3N 0 95 2 80 HX 8360 5 0 van 40 FAN GPO8 26 9 or 3 8362 8374 8378 GPIO 9 O1P 3 NS 4K7 NS 4K7 eros EN zm H 120Hz GpIo O2P 3 Wangxiyu 20080721 9419820090301 20x2 ZZ OBN 3 M 2P40 2 00X2 00 180 HX or gt 1 0N SV M m O4P 3 EON Wangxiyu 20080721 H BE EIN 3 E2N E1P 3 E2P E2N 3 E2P 3 ECKN E PWM MU
13. 0 1uF sv KD GND 234567 89 101113 14 AMUX 5V x 398 10K D 399 59 5 5 R406 CA22 AUD L Kika I RIK 10K _ __ AUDR 3 55515596 00uF 16V CA21 INT 3 100uF 16v u30 PWM3 3 S S S 2 i 2 BF MUXi L 6420 22uF 12 xLi AUD LOUT Y2R U29 zar 1 14 X EE PN E VH AVIL C415 2 2uF 1 MUXI L C382 2 2u I 16 Xa Y C354 22uF 1 14 0 G218 2AF 4 1 Y T o YIR 9 C381 220 1 3 1 YEL C366 22uF je 8 a yl MUXI R pu pa AMUX 5V YTL 8 1 16 AMUX 5V C384 220 ns 322 0358 MU vea i 8 R C397 2 20 1 16 C4i6 2 2uF 2 v2 NH HE AVR C383 2 2uF Baliye MEER 321 0355 SC2 R av 8 YER C n 2F fe T A2L 8 2 4 Y3 100 E IN 100 8 MUX CTLA 831 100 MUX CTLB A 100 74HC4052 S veaAL 8 VGA R 74HC4052 m AMUX 5V AMUX 5V 10 gt E 5 3 sc2l 10 AMUX 5V AMUX 5V RAB O SPDIFOUT 3 10K 10K lt gt GPIO 20 3 RA9 RA10 196 196 MUX CTLD KA GPIO 20 AUDIO OUTPUT lt AU QA1 1 GPIO_20 QA2 1 AU_MUX 1 1 1 AV1 OUT RA13 3904 3904 T 0 1 1 AV2 OUT QA3 1 PWM QAE 1 om 10K 10K 7 1 1 T
14. 104 50V 8k2 2 p p S6P IK V C842 474 16 223 630 1 R845 VD842 VD843 16 VZ832 7 4 VD835 i RMIIC RMIIC D1 V831 14148 1N4148 R847 2907 ammo mem 870 9 5kl R852 1K 3W R840 R846 2K 848 0802 33K ik Vy 832 1000u 25 v 1 1 IN4148 TL41 R853 R854 2 2 G2 15k 5K6 2 4 3 3 c 840 C849 R866 8865 4 4 104 50V 474 IK TR 18K 04 C834 R841 C835 08 102 50V 2K_ 102 50V 1 eee Pun 200K
15. EYPASS MUTE VERE MEM VREF 5 RDOI2S 155 AVDD33 27 r H s 06080 2 AVDD33 REFP AADG Hi np ARET Mux out from CD4052B 157 nDO13_ ANR 0015 1884 AN L AUD WWID RDQ14 00015 159 AUDL 12 AVIZ 160 015 MEMPLL 1 AADC 82 Ac 09 HDMI VOD AVDD12 bud RCLKO AVDD12 SYSPLL CEC lt gt RETO ROLKO AVDD12 ADCPLL 6 ee 20 2 AVDD12_PSPLL AVDD12_DMPLL Tuner Signals RXO 2 EET a 58 RA12 XTALI oB SC Vece XTAL EN CVBSOP 11 BSN wow BR 9020 2 ADINS e A 32 CVBSON 11 RX01B 7 RAB 170 22 ADING RAE 7 RA7 171 ADIN3 MPX1 0 Of 171 ADINS 3 oc RR nio ADN I ADN MPX2 P 11 Boc A eerie a A LEM MA Ra 18 0 19020081113 WER 09 T Eme B P 3175 RW Avppaa SEDIS RA2 7 RCASF 176 RUR MEX1 z RI RXI2B 7 reg H MPX2 N Audio DAC out Re Some I R RS RCS MPX2_P 800 094 RBA0 AVDD33_SIF mA Boo 7 AVDD33 CVBS RXI C Rim imi Raro CVBS BYPASS 20 Serial Flash IF PRICE 7 e nao CVBS BYPASSO 1 7 19 CVBSON RX2
16. RX2_CB CECA TP17 100 2 5 100 0123 ESD RX2 2 1 est RX2 2B bid 2 D12 50 RX2_1 1 2 55 1 1 2 RX2 18 Di27 ESD RX2 0 1 2 HDMI_PLUGPWR2 WANGXIYU20081113 VER CHER HDMICAB2 Q8 3904 5 5060 OPWR2_5V I ESD ESD ESD ESD RX2 0B 1 2 b T RX2 C 2 D13t 50 RX2_CB 1 0131 ESD o KD 2346111314 EK creas RX0_2 TX 98 RX02 3 mon mom 3 RXO0 RX01B 3 RX0 0 3 RX0 0B x 3 Tc RAO 5 RX0CB RXI2B 3 PE RX11B 3 RX 1_0 3 RXI0B 3 lt RXICB 3 RX2 2 3 RX2 28 CRX21 RX22B 3 RX2 1 RX2 1B RE 3 3 TEm RX2 0B 3 RX2 CB ao 3 RX2CB OPWRO SV 3 OPWRI 5V OPWRZ OPWRI SV 3 OPWRZ SV 3 3 HDMIDDCSCL 0 3 HDMIDDCSDA 0 3 HDMIDDCSCL_1 3 HDMIDDCSDA_1 3 HDMIDDCSCL 2 3 HDMIDDCSDA_2 3 HDMI Hot Plug Detect GND GND 23456 89 1011121314 5V_ON ECT KD 5V 0N 2 MediaTek Confidential Media Tek ShenZhen Inc HDMIX3 Size Document Number Rev HISENSE 8222 EU Jiu Ni Date 2008 1 25 Sheet 7 of 14
17. SGT1 FB IN soyo SCT1 AUR OUT PROIN 9 GND_Video_OUT 4 4 AUR GND Video IN SCT1 GND SETI AULTN 3 SCT AUR 9 SCTi AV OUT D53 050 R410 SCT1_AULIN 9 VIDEO OUT Composite X 75 X 47K VIDEO_IN Composite SCTLAV_N ADINI gt 3 Common GND P12 SCART Connector VER SCT2 AUR OUT poe PE NEAR CONNECTOR NEAR IC pim FB34 ScT2 OUT AUDIO OUT L 5072 AVN M S612 AV R210 100 C93 47nF CVBSB CVBS6 GND_Audio F4 0 H CVBS7 __ lt Soves7 SCT2 GB GND 067 U GND_Blue X EZJZOV800AA Res 502 R ANNC SCT2 AUL IN 75 sca R 3 sun Blue lO SCT2 AVI GND SCT2 FS IN T a FS 3 SCT2 AUR OUT 8 13 U GND Green SCT2 GB FB33 SGT2 OUT 8 13 m SCT2 R IN me SCT2 RIN SY R20 100 G106 47nF CVBS7 Commas data2 t S 2 lt Av our N Green_VO ADIN4 X R128 C104 3 Comms data1 EZJZOV800AA 75 47pF SCT2 R GND SCT2 GND GND Blanking H4 aia SGT2 R IN Fast Blanking SCT2 AVO GND R129 33K GND Viisa QUT SCT2FS IN ADIN4 SCT2 AUR IN 12K S02 R SCT2 AVI GND IN SCT2_AUL IN R471 12 SC2_L VIDEO OUT Composite QUT D146 C80 4 EEN EZJZ0V800AA H o m 15K 052 lt 47 R473 R472
18. The 8501 supports data input word lengths from 16 to 24 bits and sampling rates up to 192kHz The WM8501 consists of a serial interface port digital interpolation filters multi bit sigma delta modulators and stereo DAC in a 14 lead SOIC package The hardware control interface is used for the selection of audio data interface format enable and de emphasis The WM8501 supports S right Justified or DSP interfaces Operating on separate analog and digital supplies the WM8501 offers very lower power consumption from the digital section whilst supporting enhanced load drive from the analogue output FEATURES Stereo DAC with 1 7Vrms line driver from 5V analogue supply Audio performance 10048 SNR weighted 48kHz 88dB THD DAC Sampling Frequency 8kHz 192kHz PinSelectable Audio Data Interface Format S 16 bit Right Justified or DSP 14 ead SOIC package 4 5V 5 5V analogue 2 7V 5 5 digital supply operation APPLICATIONS STB DVD Digital TV LCD Service Manual BLOCK DIAGRAM FORMAT ENABLE DEEMPH BK CONTROL INTERFACE AUDIO DIGITAL INTERFACE FILTERS SIGMA DELTA MODULATOR i DYDD DGND MCLK AVDD AGND PIN CONFIGURATION LRCLK 1 14 MCLK 13 FORMAT BCLK 42 DEEMPH ENABLE WM8501 11 DVDD VMID 10 ROUT 6 9 LOUT AGND 8 AVDD 50 LCD Service Manual PIN DESCRIPTION DESCRIPTION 5 5 iD
19. 60 OU 61 6 Schematic circuit diagram 61 LCD TV Service Manual Service Manual 1 Precautions and notices BEFORE SERVICING THE LCD TV READ THE SAFETY PRECAUTIONS IN THIS MANUAL WHEN REPLACEMENT PARTS ARE REQUIRED BE SURE TO USE REPLACEMENT PARTS SPECIFIED BY THE MANUFACTURER Proper service and repair is important to the safe reliable operation of all Hisense Electric Co Ltd Equipment The service procedures recommended by Hisense and described in this Service Guide are effective methods of performing service operations Some of these service operations require the use of tools specially designed for the purpose The special tools should be used when and as recommended It is important to note that this manual contains various CAUTIONS and NOTICES which should be carefully read in order to minimize the risk of personal injury to service personnel The possibility exists that improper service methods may damage the equipment It is also important to understand that these CAUTIONS and NOTICES ARE NOT EXHAUSTIVE Hisense could not possibly know evaluate and advise the service trade of all conceivable ways in which service might be done or of the possible hazardous consequences of each way Consequently Hisense has not undertaken any such broad evaluation Accordingly a serviceman that uses a service procedure or tools 23 5 LCD Service Manual which are not recommended by Hisense must first
20. LDO 2 AP1534 Input voltage 4 4V to 18V Output voltage 0 8V to Duty ratio 0 to 99 PWM control Oscillation frequency 300KHz typ Current limit Enable function Thermal Shutdown function Built in internal SW P channel MOS SOP 8L Available Green Molding Compound no Br Sb Lead Free Finish RoHS Compliant Note 1 33 LCD Service Manual SOP 8L Pin Descriptions CT Pinno OOO Power off pin H Normal operation 2 Step down operation L Step down operation stopped All circuits deactivated OCSET 203 an external resistor to set max output current Switch Pin Connect external inductor diode here Minimize trace area at this pin to reduce EMI w re pum 34 LCD Service Manual 24 1050 2 7 En name Functor mozna Adress Sp Serial Clock Input we amm Organization AT24C01A 1K SERIAL EEPROM Internally organized with 16 pages of 8 bytes each the 1K requires a 7 bit data word address for random word addressing AT24C02 2K SERIAL EEPROM Internally organized with 32 pages of 8 bytes each the 2K requires an 8 bit data word address for random word addressing AT24C04 4K SERIAL EEPROM Internally organized with 32 pages of 16 bytes each the 4K requires a 9 bit data word address for random word addressing AT24C08A 8K SERIAL EEPROM Internally
21. STD Saturation Saturation of STD mode Soft Brightness Brightness of Movie mode Soft Contrast Contrast of Movie mode Soft Saturation Saturation of Movie mode Audio Set When value is 1 Volume Min m about the Audio out power before adJusting 25 When value 15 25 Fhink about the 12 LCD Service Manual before adjusting Volume Mid Volume 75 When value is 50 Think about the Audio out power before adjusting When value is 75 Think about the Audio out power before adjusting Volume Max When value is 100 Think about the Audio out power before adjusting The above Factory Service OSD Menu are reference only please refer to the actual units to determine the appearances 13 Audio Mode Standard user Audio Mode Music Speech Music 120HZ Different frequencies 500 7 for different Audio 1 5kHZ Mode 5kHZ 10kHZ Backlight co PVM 0 350 PVM 350 500 500 1000 1000 10000 10000 0 Power Last station LCD TV Service Manual 3 Software Upgrading 3 1 Before upgrading read the following 1 Before upgrading Write down the ADC Calibration values of the sources of VGA and component 2 Upgrade the software 3 clear the EEPROM A Select the item Clear Unprotected B Press VOL button to clear the EEPROM data Close the OSD menu after 5 seco
22. TU 33V 616 617 N MOSFET 0182 MPX1 m OSDAO 2 SDA_V50 Nonnatde MPXI 3 R CAPC1005L HX aoc 3 3 Hr LIE MPX2P 3 4 E D a e CAPC1005l 47uF 16 2 R SOT3N 0 95 2 75 HX 2 Wangxiyu 20080721 08010 36844 9503504 5V OUT 12V M 5V OUT linm 12V_M 2 14 12 ADDRESS READ is 0X87 nun E WRITE is 0X86 22 Dom D 234671314 4 IF TUNER IF AGC FE v2 c T AM 20081223 T T 4 5 R19 amp 17 3 R252 3 1 511 BYPASS MUTE amp BYPASS MUTE 3 1 5 C pz v SAW 22bnF 470nF 2 l p 5V OUT 45V TUNER C 8 TV ter 2 4 R188 NG roar dE R184 2 4 4 4 3 Ol m AJ S e 47uFI16V 47 NC 5V OUT w 2 SEZ 8 9 8 gt 9 6 186 R170 5 U20 TDA9886 3 8 ep Bf ia 2H E honF 68K 82K 8 2 1 saw ound s 5 53 0 E x 5 184 jm 1 4 my mmm TUNER CVBS TV G186 MPX2 P R200 l i WE 100 ScL s S Ri 100 SDA V50 1 AN TV AUDIG G102 tonF MPX2_N 1 TV SIE 8 8 TU CVBS GND 1 19 197 137 p196 is 197 R141 R187 i e TT i R251 NS 0 R669 08 CE131 Rezo 39K R671 39K TV_AUDIO CT AN gt MPX1 7K a 4 7uF 16v gi 4 7UF I8v
23. 2 CVBSOP SPLSCK SPLSCK 6 RX22 7 HAE 185 me aS SPLSI 6 RT RX2 2B 7 MEM OE SPI SO SEU v mor BI 7 VE 52 SPLGSF RX2 1B s 2 VCC2lO 1 CVBS3P SPLCS 6 meo CVBS_SYO Tb i DVDD10 2 CVBS SCO EXC 7 VDD33 2 CVBS SY1 RX2 CB x VGA_SDA CVBS_SC1 CVBS OUT 2 CB 7 x BYPASS CVBS_BYPASS 2 5 MUTE TV BYPASS MUTE 11 BE BYPASS BYPASS 8 OPWRO 5V HN S cm AU MUX 12 OPWRI 5V AUDI Pm 9 252 2 ae P PWM 14 GPIO OPARE TV OPWRLSV m zuo Zao m m NON 3928 2008 B oo 8_ nae Sante ZEW BM 125 IF m PLL Avia PLL smBSs8smBSSES Sai 229568950900 52 Jada PWM3 12 AR 3 AR 13 TREMDDCSDEU X HDMIDDGSOL 7 T 2229299292002 e 885 4 m0 00 405 MEE 18 HDMIDDCSDA 0 7 up39 ZARY cip 1 SRR HDMIDDCSCL 1 TAOSDATAT S 13 HDMIDDCSDA 1 SSHDMIDDCSDA 1 7 UP3 2 UP31 2 6 ROBCK AOSDATAO 6 12 13 HpMippcscL 2 _ pie D UP30 7 AOBCK 12 13 e e AOLRCK HDMIDDCSCL 2 7 ee 868 lalala lap 55 6 6 SPOIFIN SPDIFIN 12 AOMCLK AOLRCK 1213 HDMIDDCSDA 2 _ 5 5 HDMIDDCSDA_2 7 2 EE ooo 98 e al 55 l 2 l ADINO AOMCLK 1213 25
24. Dram 1888 flashless LOG Start to upgrade LOG Init Rs232 Usb gt Flash 24 MT1818 106 Flash Type M G9lV320AB M gt 23IV320CBTC MX23LV320B Mx Verify BlankCheck 7 High Speed ots Baudrate to 921600 USB to UART Bridge Controller ShakeHand Verify File create failed Verify File create failed Huming 0 HEX LOG Erasing LOG Updating Burning LOG Begin Thu Jan 10 10 50 53 2008 Direct Control LOG end Thu Jan 10 10 52 18 2008 Finishedi 8FBD Log Set Baudrate to 115200 Clear MSG 20 LCD TV Service Manual 3 4 Update with USB directly The second update method is with USB directly MTK8222 Series can update with USB the software name should be HISENSE bin The Updating Steps is set the Source to DMP interface insert the USB the update file HISENSE bin which should be in root directory The TV automatic identify the upgrading software step by step according as the informations of the upgrading process USB to the Main board directly 21 After upgrading you must confirm the software the Factory Menu you d better CLEAR UNPROTECTLY 22 LCD Service Manual 4 Circuit instruction 4 1 Power assign and block diagram Power assign Power voltage includes 12V M 5V M 5VS and VPA Voltage Power for Audio normally 14 16V some small size TV s small tha
25. NANGXTYU20081113 EZJZovaooaa d FZJZOV800AA 10K Common VER c MediaTek Confidential Media Tek ShenZhen Inc SCART1 2 Size Document Number Rev HISENSE MT8222 EU Jiu Ni 5 TUNER 75 5V_TUNER 45V TUNER V TUNER TUNER 5V TUNER 2 12V M R17 R18 47K 47K 2N7002 GND N MOSFET lt GND 2 3 4 5 6 7 8 9 10 12 13 14 179 10uH OSCLO 2 SCL v50 45V TUNER IF TUNER 081 NS 1N4148 6 cvesor 3 613 644 47K IF o TU 33V 4 mue CVBSON CE94 Wangxiyu 20080721 SCTLAV OUT scri AV OUT 10 10UE 18VZZT nh SDA V50 de ee R CAPC2012N HX 1uF T R643 33 SCL_V50 QF2 CE36 27 202 4 7K PWM1 gt gt 12 2N7002 10uF 50V 1uF 50V C1815TL1
26. R909 916 104 91 10K N903 VD811 KA431AZ 300 BOGS Poe n 878 RENO we SFF806 L811 100K 2W l n c i O 3 2810 V5 Sion 294 220u 450V 12V od ENT R815 R816 R823 ee 1N5822 IM VD8I3 560K 1254148 2 EU2A 811 V811 5V_M 812 100K 2W 1 6812 NCP33262 VD815 R819 7811 201460 R824 R828 47u 25v JE 18V Csdg 60K R813 EH REIS Kl 221 2 C917 C918 R825 2 560K 2200u 6y 10004 16 820 R822 R817 Ga o o 1 ai 18827 V905 0 Ul T 819 R814 C821 814 7812 C816 R829 C815 C817 C818 R820 R821 R826 R830 R922 R921 C911 C912 R889 R920 224 50V 20 102 50 22u 50V 18V 104 50V NC NC 101 50 0 22 3W 0 22 3W 10K NC NC 105 102 27 30 N831 T831 VD838 se N _ R842 VD831 VCC po MBRF20H100 C843 C844 24V XP800 24V 803 24V 16V XP804 5V 14 1 EM 16 MUR160 VD836 R856 836 EHS nek 104 50V V832 C832 105 1 gt 1000u 35V 1000u 35V 1 141 C845 T I R831 a 10N60 1000u 35V 808 RS R858 862 R832 a dm R859 VD839 ae RT 10N60 1 101 C846 12V R833 R836 C833 R837 R860 18861 2200u 25V IM 2 105 15K C838 843 SR 5 4 22uF 25V 2 208 SKI 1 3 gt E R834 R844 R848 R851 R850 VD840 C841
27. Typical 100 000 erase program cycle 10 years data retention SOFTWARE FEATURES Erase Suspend Erase Resume Suspends sector erase operation to read data from or program data to another sector which is not being erased Status Reply Data Polling amp Toggle bits provide detection of program and erase operation completion Support Common Flash Interface HARDWARE FEATURES Ready Busy Output Provides a hardware method of detecting program and erase operation completion Hardware Reset RESET Input Provides a hardware method to reset the internal state machine to read mode WP ACC input pin Provides accelerated program capability 43 LCD TV Service Manual PIN CONFIGURATION 44 SOP Wes o 44 18 2 43 A17 3 42 A7 4 41 AB 5 40 AS 6 39 A4 7 38 8 37 A2 36 1 35 AD 34 GND 32 DE 31 29 a1 os a2 010 011 DESCRIPTION LOGIC SYMBOL NN VGG SYMBOL PIN NAME 0 20 Address Input 00 014 15 Data Inputs Outputs Q15 A 1 Q15 Data Input Output word mode 16 or 8 A 1 LSB Address Input byte mode CE Chip Enable Input WE Write Enable Input OE Output Enable Input BYTE Word Byte Selection Input RESET Hardware Reset Pin Active Low RY BY Ready Busy Output Vcc 3 0 single power supply WP ACC Hardware Write Protect Acceleration Pin GND Device Ground NC Pin Not Connected Internally 44 LCD TV Service Manua
28. a 5582128 R439 NTO hae OEB4 2382328883886 0 47uF 100K b 1 882 5 56 8 2552 8 88 C386 0136 Meum e 1K SI 4444 4 46 4 4 Eon de dh 1 15 gt GND R368 D95 pl 2200 25V 0 N4148 R369 C408 0428 10K 0 1uF T D139 0 1uF oe GPIO 21 RIR AK b GND T 038044148 ee 4 ana T ET gt C441 0 047LFING KHE C432 R474 0 47 10uF 8481 330K d ev 08260 GND 0433 2x 174 0 1uF NC 10 NC gt gt to 22uH Lc4z 0 47uF 8476 8477 2 gt S100K as MediaTek Confidential MediaTek ShenZhen Inc 4 ille LVDS out MUTE TPA3101 Size Document Number HISENSE MT8222 EU Jiu Ni Date 200871725 14 T4 1 5 z AC C907 5VS F801 RV801 RT801 C803 E 300v M ROZA WE VD903 470u 16V 1901 T6 3A 250VAC 100561 NTC5D 20 474 AC275V 102 AC250V IWB60 4u7 450V 470P IKV 100K2W 6 71 5 C807 A C908 801 1801 1022K1 100u 16V uus FA 3 471 AC275V TJC2 3A LCL 2420H LCL 2420H C806 R903 VD902 102 2KY lt 75 155819 0 801 C804 10A 600V C901 474 AC250V Ne 102 AC250V 1000P 400V 1 906 Tu J801 Z 2K4 OMI SS 212DM C850 RA T STB 1000P 400V ng TE 104 seals 901 1144148 R
29. bits readable via PC bus TakeOver Point TOP adjustable I2C bus or Fully integrated sound carrier trap for 4 5 5 5 6 0 and 6 5 MHz controlled by FM PLL oscillator Sound IF SIF input for single reference Quasi Split Sound 255 mode PLL controlled 4 ORDERING INFORMATION TDA9885 TDA9886 SIF AGC for gain controlled SIF amplifier single reference QSS mixer able to operate in high performance single reference QSS mode and in intercarrier mode switchable via PC bus AM demodulator without extra reference circuit Alignment free selective FM PLL demodulator with high linearity and low noise Four selectable 12C bus addresses 2C bus control for functions 12 transceiver with pin programmable Module Address MAD 2 GENERAL DESCRIPTION The TDA9885 is alignment free multistandard PAL and NTSC vision and sound IF signal PLL demodulator for negative modulation only and FM processing The TDA8886 is alignment free multistandard PAL SECAM and NTSC vision and sound IF signal PLL demodulator for positive and negative modulation including sound AM and FM processing 3 APPLICATIONS TV VTR PC and STB applications PACKAGE CC Me TDAS885T V3 5024 small outline package 24 leads body width 7 5 mm TDA9885TS V3 SSOP24 plastic shrink small outline package 24 leads body width 5 3 mm TDA9885HN V
30. e Beer ESSE 22 1 2 ADINO 6 CVBS 2185 elbl I I l IclElellclclclclclclclcl lslsl5El lslsl lt l l EiElrlElslslelelslb ADIN1 6 GPIO 6 BOSDATAO so SEB Saa EP ERER ERI om _BOSDA BOSDATAO 6 13 AV33 CVBS 2 ie EM E pl as ADIN3 10 ORO BOBCK 6 13 USB a gt gt AV33_0VBS 4 g b gt 3 ADIN4 10 BOLRCK 6 13 E 4 z gt GPIO 2 USB lt 2 3 3 6 13 USE DM 2 USBDP0 6 6 USB_DMO 6 SIF 1 AV33_SIF 4 GPIO_1 6 USB DP1 AV33_SIFDIG GPIO_2 6 13 LVDS INTERFACE USB BWT USB DPI x 51K 196 i 3 6 13 Ae B ipo Close to MT8222 As possible Audio VMID control z R lt AV33 SIFDIG 4 R171 NS 200 Epo 9 05 GPIO_5 6 13 or O0N 14 AV33 XTL e GPIO 6 6 13 OIN O0P 14 AUD_YMID ores GPIO 7 6 OIN 14 TRAP c 14 ROSDATAO ICE 6 AGE KY aves xT 4 t obla lied See 8 oN O2N 14 AOSDATAO 6 12 13 7 OFF_MUTE G977 GPIO 2 AV33_ADC al GPIO 10 6 2 14 AVI2 LV SPLL LVDSPLL 4 10uF16V R CAPC1005L HX aoii aplo it 13 E OCKN 14 AOLRCK 12 13 L_AV33
31. i0 PRIP 4 Y BPRI AUR IN 6 80 100MHz P9 YPBPR1_AUR_IN E Y2 R YPBPRi AUL IN You R435 8434 040 10K 041 EZJZ0V800AA 10K EZJZ0V800 MediaTek Confidential f YPbPr Sire Document Number Rev Drawn _ A 1 HISENSE MT8222 EU Jiu Ni Date 2008 1 25 Sheet 9 of 14 for EU US stuff NEAR CONNECTOR Near swtich P11 SCART Connector VER AUDIO_OUT_R SCT1_AUR_OUT FB13 SCT AV IN m SGT1 AV R39 100 65 47nF CVBSS SCT1_AUR_IN A AUDIO_OUT_L SCT AUL QUT 078 2 EZJZOV800AA R50 C55 GND_Audio 75 pF 50 ov REGA 1 Aion SCTi IN B IN PRO IN dla Se SGT1 FS IN rA 5 3 GND Green 6835 CVBS5 R53 33K Scri AV OUT CS Commas data2 SCT1_FS IN SCT1_AUL_OUT SCT1_AV_OUT 11 SCT G IN PBO IN 4 SCT1_AUR_OUT RR E js 59 5 2 SCT1_AUL_OUT 13 H Comms data1 082 X D58 AUL lt Ki n EZJZOV800AA EZJZOV800AA 47K GND C O Aann T A SCT1_AV_OUT xivu2 GND Blanking SCH 4 n IN YO IN sovo P gt LU 074 tN YON n Fast_Blanking SOTI FE IN 213 EZ EDVBODAA PBOIN 9
32. 080911 AOLRCK R306 036 AOSDATAO 8307 8339 LRCK MCLK DIN FORMAT 10uF 16V Ramo f CB188 BCLK DEEMPH 11 ENABLE DVDD VMID 10uF VOUTR DGND Hz 0 192 AGND ink 10uF 16V DAC_AUR_OUT M8501 R SOICTAN 1 270 6 00 HX DAC OUT NEAR IC U7 SDIN AOUTR 2008 06 10 O vA LRCK GND MCLK AOUTL AOTL va FILT 034344 20H AudioDac 10uF 16 T 10uF 16v 5 4 3 2 1 5V8 suu 45V ON eve 9 L3 3 348711134 1 Eu pos CE68 219 9259 CE66 CB218 FB64 D187 r l1 BL ON OFF 12 M 4uF16 9663 Bead W CIF gt INM 11 14 BL ADJUST 240A ON ale D T gt 5V_ON 1 V_TUNER n 1 m UP POWER us 9 sw 9 xxx 46V_TUNER TUNER 11 Es
33. 2008 05 05 MODIFY Only for US EU not stuff Y0_IN_GND sa li 1 R46 1005056 10nF_ YPBPR0_GND FB29 PBO_IN R77 68 C82 10nF___PBOP 80 100MHz R52 C57 033 X EZJZOV800AA e 16pF YPbPr0 PERO IN OND 4 E KY GND 234567 810 11213 4 Yo IN R83 C73 YOIN 10 045 IN X EZJZOV800AA 75 PE PROIN 10 FB17 PROIN 10 PRO IN Gi 1 1 855 68 C61 10nF PROP ri AUE ni SCT1_AUR_IN 10 MH SOTLAULIN 80 100MHz SCT1_AUL_IN 10 R 2 50 0 3 10 YOP 0 GND YOP 3 YPBPR0 GND 3 PRIP PBOP 3 PROP R417 12K SCT1_AUR_IN YLR it 3 UR R416 12K SGT1_AUL_IN YiL S6T1_AUL_IN H 3 R418 2 R419 10K D46 10K EZJZOVEQBAA 043 EZJZOV800AA YPbPrl port FB21 R84 0 47nF SOYi Yi IN 3 ES R72 68 C74 10nF 4 80 100MHz D37 R74 C75 EZJZOV800AA 75 15pF 1 Y1_IN 2008 05 05 MODIFY 4 x 45V ON Yi GND ee 4 R48 100 676 10nE_ YPBPRI GND 9 LUON FB22 A 4 A PB1LIN PBI A 875 68 77 1onF PBIP 4 80 100MHz m KY 2 3 4 5 6 7 8 10 11 12 13 14 9 036 R76 G78 1 EZJZOV800AA 75 15pF 8 PBR1_IN GND 1 1 SOY 4 YPBPRi GND LM S pr 3 YpBPR1_AUL_IN 7 044 R81 C80 PRIP 3 EJ 3 EZJZOV800AA 75 15pF Y2 R 12 2 FB23 vei 12 IN 4 Pria R82 68
34. 3 54 008 2008 06 02 DOMI 22 RD3 RDOMI Dar Esas CD19 180 Y RD13 MEM 6051 22 RD4 RDOSI 5 52 0 1uF paso 71 181 000 AOS os 0051 AM No vb VREF 49 eee 5 BURG 4 MEM DOMO zaj MEM 7 2 MEM 0610 2 RDQiU MEM WEF 21 We GLK 48 MEM CD21 8 1 M 1 Mi 22 CAS GLK 45 3300pF 150 4 MEM_RASH a MEM_CLKEN R RESCA3216 8N HX R RESCA2010 8N HX MEM COE 2 CS NC 42 MEM ADDRI2_ 7 BANIA 4 MEM 002 4 RDOI2 BAO 2 A M i I 6 3 DO 3 6 3 2 40 DG ROO MEM_ADDRTO 28 p pd 39 MEM ADDRS 035 CD33 020 1 MEM 6015 8 1 RDG15 MEM_ADDRO 8 38 MEM_ADDA7 T 1000F I8v BR fav ADDRT 30 40 AT La MEM ADDRS R RESCA3216 8N HX R RESCA2010 8N HX MEM ADDR2 1 36 5 MEM_ADDR3 re 5 Cas BANIS 4 MEM WEJ BUSA RWER 33 vDD vss 3 3 6 RCAS MEM RRAS 15M x 16 DDR TSOP 66 CD22 R TSOP66N 0 650 11 84 HX 3300pF 86 DDR1 R RESCA3216 8N HX R RESCA2010 8N HX 2008 6 4 BANIS 4 MEM CSF BNDGA 4 ROSI s Ti 2 EN CD23 1 8 1 0 1uF x 2 R RESCA3216 8N HX R RESCA2010 8N HX DDRV BANZ 4 MEM DDR4 4 RIDA A RAG 6 3 M 3 amp RAS ii T T T ADDRG RAG CD25 4v MEM JADD
35. 3 plastic thermal enhanced very thin quad flat package no leads 32 terminals body 5 x 5 x 0 85 mm SOT137 1 SOT340 1 SOT617 3 TDA9886T V4 5024 plastic small outline package 24 leads body width 7 5 mm SOT137 1 TDA9886TSA4 SSOP24 plastic shrink small outline package 24 leads body width 5 3 mm SOT340 1 TDA9886HN V4 HVQFN32 plastic thermal enhanced very thin quad flat package no leads 32 terminals body 5 x 5 x 0 85 mm SOT617 3 LCD Service Manual TJ2996 R1 3 DDR Termination Regulator TJ2996 FEATURES e Source and sink current Low output voltage offset No extemal resistors required Linear topology Suspend to Ram STR functionality Low external component count Thermal Shutdown Available in SOP8 SOP8 PP Packages APPLICATION ORDERING INFORMATION DESCRIPSION The TJ2996 linear regulator is designed to meet the JEDEC SSTL 2 and SSTL 3 specifications for termination of DDR SDRAM The device contains a high speed operational amplifier to provide excellent response to load transients The output stage prevents shoot through while delivering 1 5A continuous current and transient peaks up to 3A in the application as required for DDR SDRAM termination The TJ2996 also incorporates Vsense pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs An additional feature found on the TJ2996 is an active low shutdown 5D pin that provides Suspend To RAM STR functi
36. 40K FCICLK a R168 USB VDD1 GPIO 10 TOK FCICMD 2K 22K ee USB DMiO zi xev ADINO NC 2 2K NC 2 2K UB DPIO a B ADINO 3 x 4 63 ADIN1 z CE48 AN NDOO ADINO R167 o KEY1 ESD EGA 0603 220uF 16V 3 1 USB DM0O USB DUAL 8 R169 0 4 USB lt m GPIO 0 GPlo 0 a ar io 7 GPIO 1 KP IO IR CN3 czg C85 USB DM10 0 1uF gt 0EO 37 on 5 5 See 2 45VS LED G OSGL0_ R16 100 EXT ili 5 so 8 OSDA0 168 V100 SDA EXT SDA EXT 8 3V8 OPTION for CEC Stand by Function 8 20 D108 M TJC10 8A HX 229 25 R221 R220 0603 Bead ORI A A100 p IR IN 2008 05 05 MODIFY VERD cgc 20090105 GPIO 0 R218 A10 LED1 GPIO 1 219 A A10 LED2 I I 5VS 10K R228 Q45 3904 MediaTek Confidential 7 7 WANGXIYU20081113 ShenZhen Inc WANGXIYU20081113 VER c m FCI USB Flash Peripheral Size Document Number Rev c HISENSE MT8222 EU P Jiu ni Date 2008 1 25 Sheet 6 14 1 E2P 2 ESsD HDMI port 0 2008 06 10 061 HDMI_PLUGPWRO HDMI PLUGPWRO RB520S 30 R S
37. 603 Bead 1 AV33_CVBS C918 G921 C922 4 7uF 10V 0 1uF 0 01uF 23 CVBS CVBS 1 1 AVSS_SIF Avaa vss SIF AV33_XTL 9 AV33 XTL AV12 AV12 AV12 AV12A_RGBB avs xm 3 AV12 AV12 LVDS Avi 12 MEMPLL AV12 AV12_USB 9 FB42 9 FB43 AV33_ADC bd 7 1 0603_Bead 0603_Bead 1 AV33 N N N ADC _ 0603 Bead 0603 Bead 0603 Bead lt ADC C932 C934 C985 C936 AV33 DAC p C925 0938 0939 0 1uF 4 7uF 10V 0 1uF 3300pF 4 70F 10V 0 1uF Room Nu 4 7uF 10V 0 1uF LAV33 DAC AV33 DAC 3 2007 12 26 AV33_LVDS 9 1 4 L_AV33 LVDS AV33_LVDS AV33_USB AVI2 AV12D_RGB USB AV12 AVI2 LVDSPLL 9 FB45 lt AV33 USB ry AV33_HDMI za 0603_Bead 9 3 Bi AV33 0603 Bead G870 cave 33 AV33 4 7uFH10V VGA L AVSS VGA VGA 2 3V3 AV33_DAC 8V3 AV33_USB 3V3 3V3 AV33_CVBS 8V3 AV33_XTL 9 2007 12 26 FB56 9 9 ti u e T FB58 FB59 Faai 0603 Bead 0603 Bead 0603 Bead 0603 Bead C944 C945 C947 C948 C949 C955 C956 47uFA0V 0 1uF 4 7uF 10V T 100uF 16v 0 1uF 4 7uF 10V 0 1uF 3V3 AV33_SIF 3V3 AV33 ADC 8V3 AV33 LVDS 8V3 HDMI 3V3 AV33_VGA 7 FB62 7200711 2 26 FB61 T 9 FB57 FB55 FB53 0603 Bead 0603 Bead 0603 Bead 1 0603 Bead 0603 Bead C960 C968 972 C974 C975 0 1uF 0 1uF 0 1uF 0 1uF 0 1uF 4 7uF 10V 0 1uF 8V3 AV33_SIFDIG
38. 8V3 AV33_ADCREF o FBGG t FB67 NN CY 0603 Bead 0603 Bead 0085 Gaur MediaTek Confidential ille f 8222 5 Size Document Number Rev Drawn _ 1 6 HISENSE MT8222 EU Jiu Ni Date 2008 1 25 eet 4 14 DDR1 DRAM With Termination 0603 181 VIT o MEM 060 A 4 RDQO DOT 6 AAM DDRV DDRV MEM 002 RDOZ ui 9 CD32 CD17 8 1 003 1 8003 66 4 7uF 1 0 1uF 150 2274 060 ca Ces 0015 W R RESCA3X 6 8N HX R RESCA2010 8N HX 3 64 2 34 001 4 0014 UA 4 MEM 004 4 RDQ4 MEM DGz R 0914 MEM 013 amp WANA 3 WEM 005 6 BRN RDQS 6 002 0613 EM DOS DOS vssa 003 80 DQ12 CD18 8 1 7 8 1 RDQ7 _ g 004 batt R RESCA2010 8N HX Y BN pa5 101 E Eo MEM DQ10 06 11 09 150 0050 22 RD 80050 096 Dag YN pi 2 vsso VDDQ 55 151 RD11 MO 22 RD2 RDOM0 007 1
39. ADC gt gt Apo 4 2 LVDS 6810 51 gt M ze M Ey AV33 ADCREF O3P 14 y AVIZ LVDS KY AVi2LVDS 4 OdN 14 BR qos EE EE O4P 14 4 AV33 ADCREF ADCREF AVI2 MEMPLL Wangxiyu EON EON 14 12 AV33 DAC AVID MEMPLL via MEMPLL 4 Game Port Connection a GH e E Am KV INM 21114 Sy AV33 DAC Avas pac 4 AV12 USB Dip SMD Dual Layout EN EN 14 ovio vas R224 5 225 R226 FB 0603 Bead E2N 14 24 AVIZ USB USB 4 47K 9 ATQ ATK ATK s SIB E2P 14 DV38 AVSSLVDS AV3 LVDS 4 HDMI 20081223 ECKP 14 ma AV33_USB GPIO_22 E 14 lt ovs 4 7 AV33 USB AVIZ C3 HDMI 4 GE R183 E3P 14 o um Ll CC o RIT EAN on nh L33 gt gt s3V3 2467111314 RGBB p GPIO 25 5 2 14 7 AV33_HDMI 12 AV12A RGBB 4 Pe MediaTek Confidential NE CD Av 3 HDMI 4 _24 AV33 VGA AV12D_RGB Title MT8222 Size Document Number c HISENSE MT8222 EU Pm Siu Ni Rev 1 Date 2008 1725 heot 3 of 14 Bypass CAPs arround 8222
40. E Yon x 88 2 al 2 EE 557965 SS ue Kap DDR1 DRAM aa 8 8 Ig DVDD10 2 3 3 lt m PWMO 83 o I GUT VGAVSYNCK 8 Rs 3 RDQS0 5 139 DvDD10_2 SPDIF_OUT e a VGASCL 80051 5 DDRV RDQO TXD1 at WRK VGASDA VGASCL 8 RDOMO 182 RXD1 60 Sr VGASDA 8 ROOM 5 3 RDQM0 5 7 VCC2IO 2 Hw soi 28 OSDAU RDQM1 5 3 RDQ2 E GPIO 25 RDO3 136 GPIO25 82 RCASF EE 5 BDO i38 GPIO24 YPbPr input BRASH ROASE 5 vcc2zo 2 GPIO23 25 o RDOS GPIO22 Sie ROSY 5 Boa GPIO21 RCKE Fa __140 npo 871020 22 sn ROKE s H VCCZIO_3 25 Yor 9 2ol50 n 950 142 125 AOSDATAO AOBCR GRO YPBPRO GND 9 0 05 01 5 4 aw 2 28 AOBCLK S AV33 DAC PBOP 9 si PEM 144 a 125 AOLRCK 48 12 0 125 42 rss De eng 5 E a DVDDI0 3 45 m bic m SOY1 9 f RCLKO 5 1 UO e AR EE NL P RCLKO 5 gt 19 43 RBAO noaa 150 2 2 42 PBIP 9 _ 5 Rbos l i AR2 LAG aed G180 C151 9 4 4 mam EH vcCalo 2 Am AU MU 4 7UFOV 0 1uF art 8 e
41. OD371 R121 CEC HDMI TYPE A R HDMI L HX P13 RX0 2 1 ESD 1 3 USDED 083 RX0 2B 1 0 SV CB140 CB138 HDMIDDCSCL 0 896 47K um 41 514 TECA P 100 e HDMIDDCSDA 0 100 PLUGPWRO WANGXIYU20081113 VER CHER 06 HDMI port 1 2008 06 10 069 HDMI_PLUGPWR1 HDMI PLUGPWRI 3904 OPWR1_5V CB143 CB139 0 1uF HDMIDDCSCL 1 899 47K 8 2 9 D 09 OPWRO 5V ESD ESD ESD ESD HDMI TYPE A R DC1R019JD1 HX P1 2 1 D110 ESD 1 1 2 1 1 RX1 FA RX1 RXi M TP1 100 e best 1 94 0114 HDMIDDCSDA 1 100 HDMI_PLUGPWRI WANGXIYU20081113 R103 VER CHER 20K HDMICAB1 8100 R104 HDMT port 2 2008 06 10 HDMI_PLUGPWR2 PLUGPWR2 3904 OPWR2 5V CB141 CB142 BATS4C 0 1uF HDMIDDCSCL 2 R105 R106 4TK 47K bo OPWRi 5V 1 1K ba 0118 ESD 100K ESD ESD ESD ESD HDMI TYPE A R HDMI L HX P2 RX2 2 1 RX2 2B RX2 1 RX2 18 RX2 0 I RX2 0B 2 515
42. R4 47 3V8 420090303 ATI MM ae ii 100F 16v 10uE 16 ME KD 234671114 22uF R695 ONS AL2 686 10k_C278 2 2VF_ R699 OFEMUTE COFFE MUTE 34 L mm AMUTE 14 lt SCTi AUR QUT AUR OUT 10 SC AUL OU _ 3 SCT1_AUL_OUT 10 SCT2 AUR OUT SCT2 AUR OUT 810 ENLO OUT DAC AULOUT Gy pac OUT 14 DAC AUR OUT 14 AOSDATAO 3 6 12 312 AOMGLK AOLRCK 312 AOMCLK 312 89 gt 2 3 4 5 6 7 8 9 10 11 12 14 20080911 SCT2 AUR OUT AR 3 10uF 16v 05 ARQ 3 mm AL2 3 MUTE RZ 10K R696 BOSDATAO 3 6 BOLACK 36 R698 o AOTR BOMCLK 3 6 GPIO 21 K 21 3 14 3V3 29 2008 06 10 bk DAC AUL OUT 47uF16V HPDET GPIO 11 C637 CE61 CE60 220uF 16v 100UF 16v Q51 2N3906 HPQUTR1 2008 06 10 CE63 HPOUTR V 220uF 16v EZJZOV800AA DAC AUL OUT HPOUTL DAC AUR OUT HPOUTR 10KNG DAC AUR OUT c237 4 7UFT16V N TJC3 4A GPIO_21 GND HPOUTRT HPOUTLI Q58 2N3906 WANGXIYU20081113 20090301 VER c 5V_8501 20080911 20
43. R7 605 CD7 CD8 9 CD10 0011 CD12 CD13 CD15 3300pF BORY 2623 220uF 16v LowESR CAP 10duF 16v 4 7uF 10V O 1uF 0 1uF 0 1uF 0 1uF 3300pF 3800pF 3300 3300pF R RESCA3216 8N 1 R RESCA2010 8N HX 4 ADDRi2 BA 4 RAIZ 4 4 MEA ADORIS BURA j i 8 p 1 7 2 20080911 216 8 R RESCA2010 8N HX MEM ADDRO A 4 NEN ADDEZ A R CD26 1 MEM ADDRS 1 4 7uF 10v 3300pF 150x Zw R RESCAS216 8N HX R RESCA2010 8N HX MEM CLKO ROG A22 RCLKO If use sdram CD34 CD26 CD27 RD9 CD28 CD29 CD30 UD2 NC If use ddr CD34 CD26 CD27 RD9 CD28 CD29 CD30 UD2 ON LP2996 for Vref and 100uF 16v CD27 10uF 10v RD9 VTT of DDR1 20080911 VT MEM_VREF U2 1 VE GND MEM_VREF CD28 0 01uF IC LP2886 DDR Termination SOP 8 R SOICOBN 1 270 6 00 HX 3150 4 VSENSE AVIN VREF VDDQ FB30 0603 181 CD36 100uF 16v RDS 22 I 3 RWE 13 RRAS _ RCS RCKE 8095 9 yy 80980 80081 RDQMO RDQM1 RWE RCAS RRAS RCS RCKE 3 3 3 3 3 RDal15 0 3 gt Rano 3 met RBAO 01 93 Em 3 VREF _ DDRV 234
44. RT IF FY MT8222 Trapping 2 R RESC1005L 0R RESC1005L HX J4 103 MS R159 NS O i 5 y i Wangxiyu 20080721 2 GPIOB 99 GPIOS 343 R163 NS O GPO E H c AR 8V3 oe Q GPO7 3 Serial Flash 9 AOSDATAO N8 4x1 W HOUSING GPIO 9 23 ANSAK R27 1K M TJ010 4A HX SPO10 8 3 8222 EMc P14 ICE Description Normal operation ST SST FB24 i flash 0603 Bead mode 9 U17 w 4 5 Used in simulation and 2008 06 10 gt gt 3V3 2 3 4 7 11 13 14 1 1 e 2 DOUT HOLD pattern gener ation n FRESETE 3 Were 8 SPI_SCK PU test patterns LssVON svON 2 5v M 1 OLT mode s 9 USB_VDD1 5V_M 238121314 CE47 C285 deve SDA Description USB VDDO 220uF 16V 0 1uF GND gt gt GND 2 3 4 5 7 8 9 10 11 12 13 14 MEMORY CARD I F GPIO RESERVED STOST fad ATMEL flash 3 3 ICE 3 USB DMO 2323 3 1213 USB_DPO R327 0 GPIO 2 40K 50 WP VER D 5V 3 3V r3 Raf 5 SPLSCK 3 GPIO 3 10K FCIDET 20081223 SPI_SI 3 ca tai P19 SSS SPSO 3 GPIO 5 NS 10K___FCIDAT3 ADC KEYPAD USB_VDDO roce SPLCS 3 5 GPIO 6 NS 10K FCIDATZ 3V3 3V3 SB 0 00 22 GPIO 7 FCIDATT USB DP0O p n GPIO 8 FCIDATO E 217 GPIO 9
45. TEL LOW FOR MUTE Amplifier Gain dB AGAINI AGAINO ce R70 R24 47K G192 Rip EN 3 1 A 10uF 20 0 0 3 I PWM 2N3904 Tu 26 0 1 E4P 3 Q48 TE PWM0 3 2N3904 32 1 0 UP34 2 UP34 3 Wangxiyu 20080721 36 1 1 OSCLO 368 1 OSDA0 3 681 C447 0448 NC a OUT DAC AUL QUT DAC OUT 13 enol Pa 0445 R485 A AA OUT 2 DACAURLOUT 18 100 C446 tour 100K 1 R482 lt gt 13 BL ON OFF 330K BLONOFF 2 INITAL PULL UP BEEN L68 BISADIUST BLADJUST 2 22uH T OFF MUTE ore MUTE UP34 Q2 C448 450 2N3904 R 1 C439 8478 424 0 1UE NC 4444434 9 85434 8 2 Tu C440 GRE 0 1UF NC IONC z p o a vsBi 1 0425 35 0 47uF NC GNO R461 SUM ROSC 34 VN D137 R46482K SAB VPA R391 Roc 33 gg EH 12 OUT 32 42 D134 1441486 393 ps CEGO sud 8392 or OFF MUTE MUTE R2A15108FP 21 i AA 220uF 25V 4K7_NC R448 AGND 30 AZ NC DAC AUR QUT ia cPRo 28 10UF 16V O 8458 NG 0 VREF 28 TJC3 4A 2 10 GAIN2 Z 4 D140 7 OFSDET NC O 13 9922 1L PROT 28 R437 100K 42 47UF 16y vens
46. UT Supply Ground reference for analog and substrate connection Supy Positive supply for analog cireuts Digital input De emphasis select Internal pull down High de emphasis Low de emphasis OFF Digital input Data input format select Internal pull up Low 16 bit right justified or DSP Mode B High 16 24 bit 125 or DSP Mode Digital input Master clock input Note 1 Digital input pins have Schmitt trigger input buffers 53 LCD Service Manual 4 4 Troubleshooting 4 4 1 Troubleshooting for Remote Control YES NO gt NO Tape g N LCD Service Manual 4 4 2 Troubleshooting for Function Key Em 55 LCD TV Service Manual 4 4 3 TV won t Power On LCD Service Manual 4 4 4 Troubleshooting for Audio 57 LCD TV Service Manual 4 4 5 Troubleshooting for TV VGA HDMI input 58 LCD Service Manual 4 4 6 Troubleshooting for YPbPr input 59 LCD TV Service Manual 4 4 7 Troubleshooting for Video S Video input 60 LCD Service 5 Explode View 6 Schematic circuit diagram 61 KD svM 23681214 344 817 ou 1uF 12V_M t P ME TEN KY INM 21114 apro ouT SCTI AUL QUT 6673 47 R6
47. also adjustable using external resistors Typical Application Circuit Volts 12 R1 R2 R2 R2 12k is recommended R3 should be connected for current lg restriction as Viy gt V 0 3V LCD TV Service Manual MX29LV320DT 32M BIT 4M x 8 2M x 16 SUPPLY FLASH MEMORY FEATURES GENERAL FEATURES Byte Word switchable 4 194 304 x 8 2 097 152 x 16 Sector Structure 8K Byte x 8 and 64K Byte x 63 Extra 64K Byte sector for security Features factory locked and identifiable and customer lockable Twenty Four Sector Groups Provides sector group protect function to prevent program or erase operation in the protected sector group Provides chip unprotect function to allow code changing Provides temporary sector group unprotect function for code changing in previously protected sector groups Power Supply Operation Vcc 2 7 to 3 6 volt for read erase and program operations Latch up protected to 100mA from 1V to 1 5 x Vcc Low Vcc write inhibit Vcc lt Viko Compatible with JEDEC standard Pinout and software compatible to single power supply Flash Functional compatible with MX29LV320C T B device PERFORMANCE High Performance Fast access time 70ns Fast program time 1 1us word typical utilizing accelerate function Fast erase time 0 75 5 35s chip typical Low Power Consumption Low active read current 10 typical at 5MHz Low standby current 5uA typical
48. ck Power supply for power output stage VD is supplied H1 A block Power supply for power output stage VD is supplied H1 A block Power output pin H1 A block Power output pin supply pin Adjustment for overcurrent detection value by external resistance Aq LCD Service Manual TDA9885TS I C bus controlled single and multistandard alignment free IF PLL demodulators 1 FEATURES 5 V supply voltage Gain controlled wide band Vision Intermediate Frequency VIF amplifier AC coupled Multistandard true synchronous demodulation with active carrier regeneration very linear demodulation excellent pulse response Gated phase detector for L L accent standard Fully integrated VIF Voltage Controlled Oscillator VCO alignment free frequencies switchable for all negative and positive modulated standards via 2 Digital acquisition help VIF frequencies of 33 4 33 9 38 0 38 9 45 75 and 58 75 MHz 4 MHz reference frequency input signal from Phase Locked Loop PLL tuning system or operating as crystal oscillator VIF Automatic Gain Control AGC detector for gain control operating as peak sync detector for negative modulated signals and as a peak white detector for positive modulated signals External AGC setting via pin OP 1 Precise fully digital Automatic Frequency Control AFC detector with 4 bit digital to analog converter AFC
49. desired source 1 Auto Color For VGA and Component Video sources WB values must be adjusted And at others signal sources the auto colour does not work Before adjusting prepare the signal instruments such as DVD or K 8256 first and find the video picture with gray and color bars Then please change to desired source source Timing Pattern Notes 1 ADC VGA 1024 768 gray 3color For VGA source 2 ADC HDTV 720P gray 3color For Component Video Notes a Press button and enter factory mode b Press Menu button and enter factory OSD menu Select the item Auto Color Press VOL button to auto color Close the OSD menu after 5 seconds 10 LCD TV Service Manual 2 2 2 Factory Option Item 0 Item 1 Note White Balance sd R DRV Red Driver adjust DRV Green Driver adjust B DRV Blue Driver adjust R CUT Red Cut adjust G CUT Green Cut adjust B CUT Blue Cut adjust values Note Before adjusting please change to desired source Different source has different WB FactoryRESET Zhong Shi Qingdao Jiangxi Road factory Huang Dao Huangdao Industrial Park Gui Yang Gui Yang Industrial Park Liao Ning Liao Ning Industrial Park Hungary Hisense Hungary Australia Hisense Australia France Hisense France Clean Protected Clean data except WB data and Auto Color data Clean All Clean all data For VGA and Comp
50. e sure it is green as the below picture 4 Set the flash baud rate to 115200 as the below picture 5 Click the browse button to select the bin file that will be updated 6 Click the start button to update software 17 MtkTool 1776 Flash Load Bin file DAPut _8225 8 80 01 backup b Browse Backs USB Config 5 232 Usb gt Dram Usb gt Flash Usb gt P MT1888 flag C R5232 gt MT Verify BlankCheck High Speed USB to UART Bridge Controller ShakeHand Custom Burning Address HEX Custom Burning End HEX Direct Control Clear MSG 18 LCD TV Service Manual MEW EA e gt 22 YUJINGFEN DVD CD ROM ATA ATAPI amp IEEE 1394 PCHCIA R f BRE COM LPT COM gt E 7 C E9 1394 EH EI EI EI E E EI Open Device Manager and find which port is connected with In this operation 5 is connected to TV so select 5 in
51. er than metal tools This will prevent any short circuits and the danger of a circuit becoming unstable 1 1 3 To prevent electrical shock do not use this polarized ac plug with an extension cord receptacle or the outlet unless the blades can be fully inserted to prevent blade exposure To prevent electrical shock match wide blade or plug to wide slot fully insert 1 1 4 When replacement parts are required be sure to use replacement parts specified by the manufacturer or have the same characteristics as the original part Unauthorized substitutions may result in fire electric shock or other hazards 1 1 5 Safety regulations require that after a repair the set must be returned in its original condition In particular attention should be paid to the following points Note The wire trees should be routed correctly and fixed with the mounted cable clamps The insulation of the mains lead should be checked for external damage 1 1 6 1 Do not touch Signal and Power Connector while this product operates Do not 5 LCD Manual touch EMI ground part and Heat Sink of Film Filter 2 Do not supply a voltage higher than that specified to this product This may damage the product and may cause a fire 3 Do not use this product in locations where the humidity is extremely high where it may be splashed with water or where flammable materials surround it Do not install or use the product in a location that does no satisf
52. formats and the individual devices differ only in the supported interface format The CS4344 family is based on a fourth order multi bit delta sigma modulator with a linear analog low pass fil ter This family also includes auto speed mode detection using both sample rate and master clock ratio as a meth od of auto selecting sampling rates between 2 kHz and 200 kHz The CS4344 family contains on chip digital de empha sis operates from a single 3 3 V or 5 V power supply and requires minimal support circuitry These features are ideal for DVD players amp recorders digital televisions home theater and set top box products and automotive audio systems 3 3 Vor5V Switched Multib it Capacitor AX Modulator DAC and Filte r Le ft 0 utput es Switched M ultib it Capacitor AX Modulator DAC and Filte r Right Output Inte ma Voltage Re fe rence LCD Service Manual EM6AA160256DDR Features e Fast clock rate 250 200MHz e Differential Clock CK amp CK e Bi directional 005 e DLL enable disable by EMRS e Fully synchronous operation e Internal pipeline architecture e Four internal banks 4M x 16 bit for each bank e Programmable Mode and Extended Mode registers CAS Latency 3 Burst length 2 4 8 Burst Type Sequential amp Interleaved e Individual byte write mask control e DM Write Latency 0 e Auto Refresh and Self Refresh e 8192 refresh cycles 64ms e Precharge amp acti
53. id injury from tip over 1 2 Notes Notes on Safe Handling of the LCD panel and during service The work procedures shown with the Note indication are important for ensuring the safety of the product and the servicing work Be sure to follow these instructions Before starting the work secure a sufficient working space At all times other than when adjusting and checking the product be sure to turn OFF the POWER Button and disconnect the power cable from the power source of the TV during servicing To prevent electric shock and breakage of PC board start the servicing work at least 30 seconds after the main power has been turned off Especially when installing and removing the power board start servicing at least 2 minutes after the main power has been turned off While the main power is on do not touch any parts or circuits other than the ones specified If any connection other than the one specified is made between the measuring LCD Service Manual equipment and the high voltage power supply block it can result in electric shock or activation of the leakage detection circuit breaker When installing the LCD module in and removing it from the packing carton be sure to have at least two persons perform the work When the surface of the panel comes into contact with the cushioning materials be sure to confirm that there is no foreign matter on top of the cushioning materials before the surface of the panel comes into co
54. l R2A15108FP 2ch 15W 8 Q DIGITAL AUDIO POWER AMPLIFIER m R2A15108FP 1 General Description R2A15108FP is a Digital Power Amplifier Standard IC developed for FPD or Home audio etc R2A15108FP can realize maximum Power 15W x 2ch VD 15V THD 10 BTL at 80 load It is possible to replace from the conventional analog amplifier system to the digital amplifier system easily E G v 2 ee JUDPTATITATATU 1 2 Features Output Power 15W at 8 Q VD 15V THD 10 Note Basically it is necessary thermal pad is connected with the board heat radiation part with solder A continuous output is 10W x 2ch at Ta 60 C by Renesas 2layer EVB Built in DC offset detection circuit of Speaker output Built in the 2 channels BTL output drivers by Nch MOS FET Power supply voltage Single power supply operation 11V to 24V recommendation Built in Over Current Protection Over Temperature Protection and Under Voltage Protection are built into Built in monitor terminal for protection mode The over current protection value can be adjusted by external Resistor The carrier frequency can be adjusted by external Resistor The gain can be changed to four setting by two terminals Package 48 pins HTQFP Body 7x7mm Lead pitch 0 5mm 45 LCD TV Service Manual Pin Layout and Internal Block Diagram View Stand by control pin 717 Stand by status This terminal haspull down 50 O typ The ca
55. la el R205 NC O oe 4 0100 2 2098 05 05 087 R131 C96 VGASCL IN R156 100 VGASCL VGASCL 3 EZJZOV800AA EZJZ0V800AA 2 2K 5pF VGASDA_IN R151 100 VGASDA 3 c99 4 VGASOG VGASDA 3 FE26 80ohmQ 100MHZ GREEN gt R138 100 10nE GRNP 1 1 12 VGA R D R136 JE EZUZOV800AA 75 pF PLUGPWR OSDAO GRN_GND 1 VGA_PLUGPWR XXoSDAo OSCLO P3 R450 12K KO CL0 3 6 11 14 1 VGAL IN VGA L R147 R146 T FB2 80bhm 100MHZ NG 47K 2 12K BLUE JP BLU R143 100 C87 10nF BLUP Eia VGAR_IN VGASCL IN AUDI zl D97 Q94 VGASDA IN R452 R451 EZJZOV800AA 5pF 070 DA 10K 10K EZJZOV800AA EZJZ0V800AA 072 EN EZJZOV800AA 4 MediaTek Confidential ille f CVBS S Video VGA Size Document Number Rev Drawn _ 1 HISENSE MT8222 EU Jiu Ni Date 2008 1 25 Sheet 8 14 G58 5 4 7150 0 FB16 YO IN Y SCR nh 68 C62 10nF m 80 100MHz 042 X EZJZOV800AA 75 T t
56. n 37 inch VPA will use 12V_M directly other voltages are converted from the above voltages a 5V_TUNER that power supply for Tuner is converted U9 from 12 The power supply for panel is converted by chosen output between U31 from 12 M and 5V M The power supply for the audio IC U35 of small size TVs is converted by the output of 12V M connects ferrite bead and the last the 33V rising circuit and mute circuit are converted by the 12 M directly b Both of the 5VM and 5VS pass through diodes then output 5V which used for 3 3V 1 2V DV10 convertion U36 DAC U29 U30 audio switch U7 DAC UI9 CIF and USB are converted from 5V M directly The power supply for DDR U1 2 6V is converted by 011 from 5 M too c 3 3V supply for U17 FLASH 014 is converted by U4 from 5 1 0V supply for U34Cthe main IC 8222 is converted by U3 from the 3 3V 1 2V power supply for the main IC MT8222 is converted by the 3 3V 204 LCD TV Service Manual Block diagram M17 2513206 414 24718 cm m E G362 18ADJ avs CH3 BOARD KEY BOARD U11 DORY LT11E4 DDR 255M 54544 uit WASIN 74 4052 131 AD4459 LVDSVDD TUNER 145 LMTEDS TUNER 019 TOASSEE 135 RZA1510E C CE Ld e o 12V M LCD Service Manual 4 2 Image and signal process U16 SAW FILTER U20 SAW FILTER RF signal
57. nds D Restart the TV 4 Write the ADC Calibration values copied just now into the the channels of VGA and component 5 After the operation above all necessarily Renew search the channels for the users The first upgrading method The software is upgraded by a burning toll MtkTool which can burn the program file bin to the main board of the unit 3 2 Get ready for upgrading 3 2 1 Install the driver Ne Ne MTKtools2 44 04 cp210xDriver rar Double click the icon install the driver InstallShield Wizard PL 2303 Driver Installer Setup is preparing the InstallShield Wizard which will guide you through the rest of the setup process Please wait Select the default value the driver will be installed step by step 14 LCD TV Service Manual 3 2 2 Hardware connecting Connect the unit to your with a USB to serial port cable USB port connects to your pc and serial port to the TV s RS232 port USB connector to PC Serial connector to TV s RS232 port For the first connecting the pc will recognize and automatically install the USB device The process is just like the installation of a mini disk see the following picture Find New Hardware Wizard The wizard is installing software Please wait J Prolific USB to Serial Comm Port Lastitep NextStep Cancele 15 LCD TV Service Manual Find New Hardware Wizard Finish Finding New Hardware Wizarde The
58. ntact with the cushioning materials Failure to observe this precaution may result in the surface of the panel being scratched by foreign matter When handling the circuit board be sure to remove static electricity from your body before handling the circuit board Be sure to handle the circuit board by holding the large parts as the heat sink or transformer Failure to observe this precaution may result in the occurrence of an abnormality in the soldered areas Do not stack the circuit boards Failure to observe this precaution may result in problems resulting from scratches on the parts the deformation of parts and short circuits due to residual electric charge Routing of the wires and fixing them in position must be done in accordance with the original routing and fixing configuration when servicing is completed the wires are routed far away from the areas that become hot such as the heat sink These wires are fixed in position with the wire clamps so that the wires do not move thereby ensuring 8 LCD Service Manual that they are not damaged and their materials do not deteriorate over long periods of time Therefore route the cables and fix the cables to the original position and states using the wire clamps Perform a safety check when servicing is completed Verify that the peripherals of the serviced points have not undergone any deterioration during servicing Also verify that the screws parts and cables remo
59. o do convertion through U30 choose one input U34 for disposal Digital audio signal output by feet 47 50 after the disposal of U34 transfer digital to analogue from the to speaker U36 change to analogue Signal One pass the driving diagram to earphone the other one pass the sound IC 20040511 20001911 27 LCD Service Manual The main control signal as list Internet mark Control Signal Instruction Remark UP31 Low level power on Standby signal UP31pass 029 inverse High power phase SW High level power on Power control Low level UP34 Low level BL BL control BL ON OFF UP34 passQ2 inverse Low level BL on phase PWMO BL brightness BL ADJUST Adjust duty ratio PWMOpassQ18 inverse phase E2prom written PWM2 protect FRESET High voltage for Flash written protect protect ADINO Key 0 key ADINI Key 1 key IR IN IR signal PWMI Tuner 33V Adjust duty ratio TU 33V PWMI rise voltage GPIO_21 Audio amplify mute Low level mute 28 LCD Service Manual 4 3 The main IC description 74HC4052D 29 LCD TV Service Manual PINNING ww w 1 mo 8 faz common input or out 6 E 8 8 9 em s m wi m epeewipuorou
60. onality When 55 is pulled low the output will tri state providing a high impedance output but will remain active A power savings advantage be obtained in this mode through lower quiescent current SOP8 SOP8 PP PKG Absolute Maximum Ratings CHARACTERISTIC SYMBOL NX TKE I UNIT Supply Voltage to GND Lead Temperature Soldering 10 sec Storage Temperature Range Operating Junction Temperature Range 49 LCD Service Manual Recommended Operation Range CHARACTERISTIC SYMBOL MIN UNIT NwtoGND AM 22 55 Ordering Information sors 1126960 DDR Termination Regulator 296 SOP8 PP TJ2996DP DDR Termination Regulator TJ2996 Rel PIN CONFIGURATION GND 1 1 wr sD 2 SES 1 7 VSENSE 3 F 6 AVIN VREF 4 i 115 VDDQ SOP8 PIN DESCRIPTION 3 e 22172777 2222711 em LIC NN ON TYPICAL APPLICATION SD Vpga 2 5V Voo 25V LCD Service Manual WM8501 24 bit 192kHz Stereo DAC with 1 7Vrms Line Driver DESCRIPTION The WM8501 is a high performance stereo DAC with an integrated 1 7Vrms line driver It is designed for audio applications that require a high voltage output along with enhanced load drive capability
61. onent Video sources WB values must be And at others signal sources the auto colour does not work adjusted Color Standard R Offset G Offset B Offset Brightness Min Min Brightness Brightness Mid Mid Brightness Brightness Max Max Brightness Contrast Min Min Contrast Contrast Mid Mid Contrast Contrast Max Max Contrast s Saturation Min Min Saturation Saturation Mid Mid Saturation Saturation Max Max Saturation OSD English Logo Option Devant To FAC M MODE is only used for factory production 11 LCD Service Manual Version Current Software version Panel Info The date of current version Flash Note The factory menu date varies according to different sources ncase changing the factory data by error you can choose to Clean Protected by which you can resume the default value To clear the EEPROM a Select the item Clean All b Press VOL button to clear the EEPROM data c Close the OSD menu after 5 seconds Restart the TV 2 3 Designer Menu Item 0 Item 1 Item 2 Note Designer Menu Picture Mode SOURCE The current program source Brightness Brightness Brightness of VIVID mode Brightness Contrast Contrast of VIVID mode Brightness Saturation Saturation of VIVID mode STD Brightness Brightness of STD mode STD Contrast Contrast of STD mode
62. organized with 64 pages of 16 bytes each the 8K requires a 10 bit data word address for random word addressing AT24C16A 16K SERIAL EEPROM Internally organized with 128 pages of 16 bytes each the 16K requires an 11 bit data word address for random word addressing 35 LOD Service Manual System E2PROM memcs Aem EEPROM 24C16 R SOICOBN 1 270 6 00 HX IIC ADRESS 0 206 LCD Service Manual AZ1084 Pin Configuration T Package D Package TO 220 3 TO 252 2 1 3 gt INPUT d INPUT 2 OUTPUT OUTPUT 7 ADJ GND 5 52 263 3 263 3 263 2 3 INPUT 3 INPUT 2 OUTPUT 2 OUTPUT TAB T ADJ GND 1 ADJIGND 5A LOW DROPOUT LINEAR REGULATOR AZ1084 General Description Features AZ1084 is a series of low dropout positive voltage Low Dropout Voltage 1 3V Typical at 5A regulators with a maximum dropout of 1 5V at 5 Current Limiting and Thermal Protection load current Output Current Limit 6 5 The series features on chip thermal limiting which pro 5 vides protection against any combination of overload Operating Junction Temperatur pr and ambient temperatures that would create excessive 1259 junction temperatures It also includes a trimmed band Line Regulation Adj Version 0 015 Typical gap reference and a current limi
63. risense LCD Television Service Manual Chassis MTK8222 Ver 1 2 Hisense Electric Co Ltd December 2010 LCD TV Service Manual Contents 2 Manual 3 3 4 T c 7 2 Factory Service OSD Menu Adjustment 5 E3 E3 10 2 1 To emer the Factory OSD MU 10 2 2 Factory OSD Men own 10 3 Solware Upgrading Em 14 3 1 Before upgrading read the following we 14 3 2 Get ready for 2c rere 14 3 3 Upgrading with the MtkTool 16 3 4 Update with USB directly uii 1011 544 RU e e E 21 1 CALCU GANS WUC m ETE 23 4 1 Power assign and block 23 4 2 mage and ww 25 29 4 4 Troubleshooting we 54 4 4 1 Troubleshooting for Remote Control 54 4 4 2 Troubleshooting for Function 55 AA WON RPR 56 4 4 4 Troubleshooting for 010 57 4 4 5 Troubleshooting for TV VGA HDMII 1npuLL nnne entente nh 58 4 4 6 Troubleshooting for YPbPr 1nDUK 5 5 1131810 10 E3 10 9xx H 59 4 4 7 Troubleshooting for Video S Video inPUt
64. rrier clock is output at Master mode and is input at slave mode Carrier frequency is triangle wave 717 Detect Open drain output 5 8 m 3 2 8 L Protection status Open drain output side 2 block Capacitor connection pin for bootstrap on H side block Unusual detection input pin of offset voltage of speaker 3 3 5 gt gt gt gt gt gt ojoj oj o AUE 18 8 8 ABE SBE AREREE ol v THE o ii E lelg EE 95 HH ain setting terminal L GND H Open Built in Pull up Resistance 46 LCD TV Service Manual setting terminal L GND H Open Built in Pull up Resistance The time from protection mode to normal mode can be set by extemal capacitor Ground pin re circuit 10V in built in power supply filter pin DO pp Adjustment for carrier frequency by external resistance When it is connected to the the IC s mode becomes a slave mode ER 1 block Power output pin 1 block Power output pin H1 B block Power supply for power output stage VD is supplied H1 B block Power supply for power output stage VD is supplied ICH1 A block Capacitor connection pin for bootstrap on side CH1 A block Input pin for detecting unusual operations of DC offset voltage at speaker pin H1 A blo
65. rvice Manual Pin Assignment Top View 65 65 54 63 62 61 60 59 58 57 55 55 54 s3 52 51 50 49 gBEb55kb5555 40 LCD Service Manual Block Diagram 10 0 1 9 11 12 0 ma BA1 LDQS UDQS 41 LCD Service Manual G962 Features m Adjustable Output from 1 2V to 4 8V Using Ex ternal Resistors 1 5V 1 8V and 2 5V options by Setting ADJ Pin Below 0 2V Over current and over temperature protection 500 dropout 2A Enable pin 10pA quiescent current in shutdown Output recovery mode in OTP Connect ADJ to GND for fixed output mode TO 252 5 Package Applications Battery powered systems m Motherboards Peripheral cards m Set Top Boxes m Notebook Computers Pin Configuration 42 General Description The G962 is a high performance positive voltage regulator designed for use in applications requiring very low dropout voltage at up to 2 Amps Since it has superior dropout characteristics compared to regular LDOs it can be used to supply 2 5V motherboards or 1 5V 1 8V on peripheral cards from the 3 3V supply thus allowing the elimination of costly heatsinks An enable pin further reduces power dissipation while shut down The G962 provides excellent regulation over variations in line load and temperature The TO 252 5 is available with 1 5V 1 8V and 2 5V internally preset outputs that are
66. satisfy himself thoroughly that neither his safety nor the safe of the equipment will be jeopardized by the service method selected Hereafter throughout this manual Hisense Electric Co Ltd will be referred to as Hisense 1 1 Warning 1 1 1 Critical components having special safety characteristics are identified with a by Ref No in the parts list Use of substitute replacement parts which do not have the same specified safety characteristics may create shock fire or other hazards Under no circumstances should the original design be modified or altered without written permission from Hisense Hisense assumes no liability express or implied arising out of any unauthorized modification of design Serviceman assumes all liability DANGER CAUTION TO ENSURE THE CONTINUED RELIABILITY OF THIS PRODUCT USE ONLY ORIGINAL MANUFACTURER S REPLACEMENT PARTS WHICH ARE LISTED WITH THEIR PART NUMBERS IN THE PARTS LIST SECTION OF THIS SERVICE GUIDE 1 1 2 ICs many other semiconductors are susceptible to electrostatic discharges ESD Careless handling during repair can reduce life drastically When repairing make sure LCD TV Service Manual that you are connected with the same potential as the mass of the set by a wristband with resistance Keep components and tools also at this same potential 1 Never replace modules or other components while the unit is switched on 2 When making settings use plastic rath
67. the MtkTool main interface Select the right baud rate according to chip model For this unit chip model is MT8226 select 115200 5 choose Auto Set Flash BaudRate Note Whether or not click the Auto Set Flash Baud Rate in the window menu depends on the chip type If the flash chip does not support high speed transport do not select this option otherwise reserve the selected mood 19 LCD Service Manual A MtkTool 8226 Flash Upgrade A Port Baud Rate Window Operation Tool Help MT8226 coms Cascade Bridge Partial Erase Load Bin file D Put Download v Auto Set Flash BaudRate Backup back B B ackur Flash Upgrade OWSE ackup Log USB Confi RS 232 Usb gt Dram Usb gt Flash Verify BlankCheck High Speed USB to UART Bridge Controller ShakeHand Custom Burning Address o HEX Custom Burning End Direct Control Clear MSG Click Browse button find the upgrading program file and select it Press Upgrade button and start upgrading The following interface appears on the screen indicating upgrading successfully 4 MtkTool 8226 Flash Upgrade Port BaudRate Window Operation Tool Help 22 gt 115200 1 4 ms Load Bin D Pubs_Dev MTK_8226 src 8280_011 Browse Backup file backup bin Browse Backup mm C Usb
68. ting circuit Load Regulation Adj Version 0 1 Typical The AZ1084 is available in 1 5V 1 8V 2 5V 3 3V and Applications 5 0V versions The fixed versions integrate the adjust resistors It is also available in an adjustable version which can set the output voltage with two external High Efficiency Linear Regulators resistors Battery Chargers Post Regulation for Switching Supply The AZ1084 series is available in standard packages Microprocessor Supply TO 263 2 TO 263 3 TO 220 3 and 252 2 1 Desktop PCs RISC and Embedded Processors Supply 37 LCD Service Manual cs4344czz 10 Pin 24 Bit 192 kHz Stereo D A Converter Features n n D D Audio Multi bit Delta Sigma 24 Bit Conversion Automatically Detects Sample Rates up to 192 kHz 105 dB Dynamic Range 95 dB Low Clock Jitter Sensitivity Single 3 3 or 5 Power Supply Filtered Line Level Outputs On Chip Digital De emphasis Popguard Technology Small 10 Pin TSSOP Package Se ra Filte r interface 38 Interpolation De emphasis Filte r PCM Inte polation Description The CS4344 family members are complete stereo digital to analog output systems including interpolation multi bit D A conversion and output analog filtering in a 10 pin package The CS4344 5 6 8 support all major audio data interface
69. ve power down e Power supplies 2 5V 596 VDDQ 2 5V 590 e Interface SSTL 2 I O Interface Package 66 Pin TSOP II 0 65mm pin pitch Pb and Halogen free 39 Overview EM6AA160 SDRAM is a high speed CMOS double data rate synchronous DRAM containing 256 Mbits It is internally configured as a quad 4M x 16 DRAM with a synchronous interface all signals are registered on the positive edge of the clock signal CK Data outputs occur at both rising edges of CK and CK d Read and write accesses to the SDRAM are burst oriented accesses start at a selected location and continue for a programmed number of locations in a programmed sequence Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command The EM6AA160 provides programmable Read or Write burst lengths of 2 4 or 8 An auto precharge function may be enabled to provide a self timed row precharge that is initiated at the end of the burst sequence The refresh functions either Auto or Self Refresh are easy to use In addition EM6AA160 features programmable DLL option having a programmable mode register and extended mode register the system can choose the most suitable modes to maximize its performance These devices are well suited for applications requiring high memory bandwidth result in a device particularly well suited to high performance main memory and graphics applications LCD Se
70. ved for servicing purposes have all been returned to their proper locations in accordance with the original setup The lightning flash with arrowhead symbol within an equilateral triangle is intended to alert the user to the presence of uninsulated dangerous voltage within the products enclosure that may be of sufficient magnitude to constitute a risk of electric shock The exclamation point within an equilateral triangle is intended to alert the user to the presence of important operating and maintenance servicing instructions in the literature accompanying the set LCD Service Manual 2 Factory Service OSD Menu and Adjustment 2 1 To enter the Factory OSD Menu With factory RC remote control 1 Press button and enter factory mode 2 Press Menu button and enter factory OSD menu 3 Press button select the function menu press VOL VOL enter the selected function menu Press VOL VOL button adjust values in the menu b With user s RC 1 Power TV On 2 Press Menu button and call up User OSD Menu 3 Select Audio Balance 4 Enter 0 gt 5 gt 3 22 in sequence If re do number keys not appear the OSD then renew enter 1 gt 9 gt 6 gt 9 in sequence 5 Factory OSD appears 6 Press Menu again and leave factory OSD 2 2 Factory OSD Menu 2 2 1 White Balance Note Different source has different WB values Before adjusting please change to
71. wizard has finished the software installation 7 Prolific USB to Serial Comm Port If you close the wizard Please click Finish Last Sten B Fiushe Cancel 3 3 Upgrading with the MtkTool MTKtool is a green program needing no installation It is saved in the folder 20061027 There are five folders files in this folder altergether VO flashinf ini MtkTool ini Shortcut to MtkLog MtkTool exe 001 exe MtkLog DR k gt 1 KB MtkTool using log is restored the MtkLog folder It records the running time date whenever the tool is used The log will be a txt file named by the date and time 216 LCD TV Service Manual gtkLog20061202 10 51 32 txt XEO 80 xO SEV 80 Log start 10 51 32 2886 12 2 MtkTool exe After connecting the TV with your PC double click icon open the MtkTool If following error appears it means the related port is be set properly Error BaudRate AutoSet Fail Please reset target board Ignore these errors click Confirm and enter the MtkTool main interface see the following picture Flash chip model Please refer to follow steps to update the software 1 Select mode of Flash chip to MT8226 as the below picture 2 Refer to the next page instruction to select the communicate port 3 Press the icon beside the baud rate and mak
72. y the specified environmental conditions This may damage the product and may cause a fire 4 If a foreign substance such as water metal or liquid gets inside the panel module immediately turn off the power Continuing to use the product may cause fire or electric shock 5 If the product emits smoke and abnormal smell or makes an abnormal sound immediately turn off the power Continuing to use the product it may cause fire or electric shock 6 Do not disconnect or connect the connector while power to the product is on It takes some time for the voltage to drop to a sufficiently low level after the power has been turned off Confirm that the voltage has dropped to a safe level before disconnecting or connecting the connector 7 Do not pull out or insert the power cable from to an outlet with wet hands It may cause electric shock 8 Do not damage or modify the power cable It may cause fire or electric shock 9 If the power cable is damaged or if the connector is loose do not use the product 6 LCD Service Manual otherwise this can lead to fire or electric shock 10 If the power connector or the connector of the power cable becomes dirty or dusty wipe it with a dry cloth Otherwise this can lead to fire 11 Use only with the cart stand tripod bracket or table specified by the manufacturer or sold with the apparatus When a cart is used use caution when moving the cart apparatus combination to avo

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